1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) 2015 Broadcom Corporation
4 *
5 */
6 /*
7 * DESCRIPTION: The Broadcom iProc RNG200 Driver
8 */
9
10 #include <linux/hw_random.h>
11 #include <linux/init.h>
12 #include <linux/io.h>
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/platform_device.h>
16 #include <linux/delay.h>
17
18 /* Registers */
19 #define RNG_CTRL_OFFSET 0x00
20 #define RNG_CTRL_RNG_RBGEN_MASK 0x00001FFF
21 #define RNG_CTRL_RNG_RBGEN_ENABLE 0x00000001
22
23 #define RNG_SOFT_RESET_OFFSET 0x04
24 #define RNG_SOFT_RESET 0x00000001
25
26 #define RBG_SOFT_RESET_OFFSET 0x08
27 #define RBG_SOFT_RESET 0x00000001
28
29 #define RNG_INT_STATUS_OFFSET 0x18
30 #define RNG_INT_STATUS_MASTER_FAIL_LOCKOUT_IRQ_MASK 0x80000000
31 #define RNG_INT_STATUS_STARTUP_TRANSITIONS_MET_IRQ_MASK 0x00020000
32 #define RNG_INT_STATUS_NIST_FAIL_IRQ_MASK 0x00000020
33 #define RNG_INT_STATUS_TOTAL_BITS_COUNT_IRQ_MASK 0x00000001
34
35 #define RNG_FIFO_DATA_OFFSET 0x20
36
37 #define RNG_FIFO_COUNT_OFFSET 0x24
38 #define RNG_FIFO_COUNT_RNG_FIFO_COUNT_MASK 0x000000FF
39
40 struct iproc_rng200_dev {
41 struct hwrng rng;
42 void __iomem *base;
43 };
44
45 #define to_rng_priv(rng) container_of(rng, struct iproc_rng200_dev, rng)
46
iproc_rng200_enable_set(void __iomem * rng_base,bool enable)47 static void iproc_rng200_enable_set(void __iomem *rng_base, bool enable)
48 {
49 u32 val;
50
51 val = ioread32(rng_base + RNG_CTRL_OFFSET);
52 val &= ~RNG_CTRL_RNG_RBGEN_MASK;
53
54 if (enable)
55 val |= RNG_CTRL_RNG_RBGEN_ENABLE;
56
57 iowrite32(val, rng_base + RNG_CTRL_OFFSET);
58 }
59
iproc_rng200_restart(void __iomem * rng_base)60 static void iproc_rng200_restart(void __iomem *rng_base)
61 {
62 uint32_t val;
63
64 iproc_rng200_enable_set(rng_base, false);
65
66 /* Clear all interrupt status */
67 iowrite32(0xFFFFFFFFUL, rng_base + RNG_INT_STATUS_OFFSET);
68
69 /* Reset RNG and RBG */
70 val = ioread32(rng_base + RBG_SOFT_RESET_OFFSET);
71 val |= RBG_SOFT_RESET;
72 iowrite32(val, rng_base + RBG_SOFT_RESET_OFFSET);
73
74 val = ioread32(rng_base + RNG_SOFT_RESET_OFFSET);
75 val |= RNG_SOFT_RESET;
76 iowrite32(val, rng_base + RNG_SOFT_RESET_OFFSET);
77
78 val = ioread32(rng_base + RNG_SOFT_RESET_OFFSET);
79 val &= ~RNG_SOFT_RESET;
80 iowrite32(val, rng_base + RNG_SOFT_RESET_OFFSET);
81
82 val = ioread32(rng_base + RBG_SOFT_RESET_OFFSET);
83 val &= ~RBG_SOFT_RESET;
84 iowrite32(val, rng_base + RBG_SOFT_RESET_OFFSET);
85
86 iproc_rng200_enable_set(rng_base, true);
87 }
88
iproc_rng200_read(struct hwrng * rng,void * buf,size_t max,bool wait)89 static int iproc_rng200_read(struct hwrng *rng, void *buf, size_t max,
90 bool wait)
91 {
92 struct iproc_rng200_dev *priv = to_rng_priv(rng);
93 uint32_t num_remaining = max;
94 uint32_t status;
95
96 #define MAX_RESETS_PER_READ 1
97 uint32_t num_resets = 0;
98
99 #define MAX_IDLE_TIME (1 * HZ)
100 unsigned long idle_endtime = jiffies + MAX_IDLE_TIME;
101
102 while ((num_remaining > 0) && time_before(jiffies, idle_endtime)) {
103
104 /* Is RNG sane? If not, reset it. */
105 status = ioread32(priv->base + RNG_INT_STATUS_OFFSET);
106 if ((status & (RNG_INT_STATUS_MASTER_FAIL_LOCKOUT_IRQ_MASK |
107 RNG_INT_STATUS_NIST_FAIL_IRQ_MASK)) != 0) {
108
109 if (num_resets >= MAX_RESETS_PER_READ)
110 return max - num_remaining;
111
112 iproc_rng200_restart(priv->base);
113 num_resets++;
114 }
115
116 /* Are there any random numbers available? */
117 if ((ioread32(priv->base + RNG_FIFO_COUNT_OFFSET) &
118 RNG_FIFO_COUNT_RNG_FIFO_COUNT_MASK) > 0) {
119
120 if (num_remaining >= sizeof(uint32_t)) {
121 /* Buffer has room to store entire word */
122 *(uint32_t *)buf = ioread32(priv->base +
123 RNG_FIFO_DATA_OFFSET);
124 buf += sizeof(uint32_t);
125 num_remaining -= sizeof(uint32_t);
126 } else {
127 /* Buffer can only store partial word */
128 uint32_t rnd_number = ioread32(priv->base +
129 RNG_FIFO_DATA_OFFSET);
130 memcpy(buf, &rnd_number, num_remaining);
131 buf += num_remaining;
132 num_remaining = 0;
133 }
134
135 /* Reset the IDLE timeout */
136 idle_endtime = jiffies + MAX_IDLE_TIME;
137 } else {
138 if (!wait)
139 /* Cannot wait, return immediately */
140 return max - num_remaining;
141
142 /* Can wait, give others chance to run */
143 usleep_range(min(num_remaining * 10, 500U), 500);
144 }
145 }
146
147 return max - num_remaining;
148 }
149
iproc_rng200_init(struct hwrng * rng)150 static int iproc_rng200_init(struct hwrng *rng)
151 {
152 struct iproc_rng200_dev *priv = to_rng_priv(rng);
153
154 iproc_rng200_enable_set(priv->base, true);
155
156 return 0;
157 }
158
iproc_rng200_cleanup(struct hwrng * rng)159 static void iproc_rng200_cleanup(struct hwrng *rng)
160 {
161 struct iproc_rng200_dev *priv = to_rng_priv(rng);
162
163 iproc_rng200_enable_set(priv->base, false);
164 }
165
iproc_rng200_probe(struct platform_device * pdev)166 static int iproc_rng200_probe(struct platform_device *pdev)
167 {
168 struct iproc_rng200_dev *priv;
169 struct device *dev = &pdev->dev;
170 int ret;
171
172 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
173 if (!priv)
174 return -ENOMEM;
175
176 /* Map peripheral */
177 priv->base = devm_platform_ioremap_resource(pdev, 0);
178 if (IS_ERR(priv->base)) {
179 dev_err(dev, "failed to remap rng regs\n");
180 return PTR_ERR(priv->base);
181 }
182
183 dev_set_drvdata(dev, priv);
184
185 priv->rng.name = "iproc-rng200";
186 priv->rng.read = iproc_rng200_read;
187 priv->rng.init = iproc_rng200_init;
188 priv->rng.cleanup = iproc_rng200_cleanup;
189
190 /* Register driver */
191 ret = devm_hwrng_register(dev, &priv->rng);
192 if (ret) {
193 dev_err(dev, "hwrng registration failed\n");
194 return ret;
195 }
196
197 dev_info(dev, "hwrng registered\n");
198
199 return 0;
200 }
201
iproc_rng200_suspend(struct device * dev)202 static int __maybe_unused iproc_rng200_suspend(struct device *dev)
203 {
204 struct iproc_rng200_dev *priv = dev_get_drvdata(dev);
205
206 iproc_rng200_cleanup(&priv->rng);
207
208 return 0;
209 }
210
iproc_rng200_resume(struct device * dev)211 static int __maybe_unused iproc_rng200_resume(struct device *dev)
212 {
213 struct iproc_rng200_dev *priv = dev_get_drvdata(dev);
214
215 iproc_rng200_init(&priv->rng);
216
217 return 0;
218 }
219
220 static const struct dev_pm_ops iproc_rng200_pm_ops = {
221 SET_SYSTEM_SLEEP_PM_OPS(iproc_rng200_suspend, iproc_rng200_resume)
222 };
223
224 static const struct of_device_id iproc_rng200_of_match[] = {
225 { .compatible = "brcm,bcm2711-rng200", },
226 { .compatible = "brcm,bcm7211-rng200", },
227 { .compatible = "brcm,bcm7278-rng200", },
228 { .compatible = "brcm,iproc-rng200", },
229 {},
230 };
231 MODULE_DEVICE_TABLE(of, iproc_rng200_of_match);
232
233 static struct platform_driver iproc_rng200_driver = {
234 .driver = {
235 .name = "iproc-rng200",
236 .of_match_table = iproc_rng200_of_match,
237 .pm = &iproc_rng200_pm_ops,
238 },
239 .probe = iproc_rng200_probe,
240 };
241 module_platform_driver(iproc_rng200_driver);
242
243 MODULE_AUTHOR("Broadcom");
244 MODULE_DESCRIPTION("iProc RNG200 Random Number Generator driver");
245 MODULE_LICENSE("GPL v2");
246