1 // SPDX-License-Identifier: ISC 2 /* 3 * Copyright (c) 2005-2011 Atheros Communications Inc. 4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc. 5 * Copyright (c) 2018, The Linux Foundation. All rights reserved. 6 * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. 7 */ 8 9 #include <linux/export.h> 10 11 #include "core.h" 12 #include "htc.h" 13 #include "htt.h" 14 #include "txrx.h" 15 #include "debug.h" 16 #include "trace.h" 17 #include "mac.h" 18 19 #include <linux/log2.h> 20 #include <linux/bitfield.h> 21 22 /* when under memory pressure rx ring refill may fail and needs a retry */ 23 #define HTT_RX_RING_REFILL_RETRY_MS 50 24 25 #define HTT_RX_RING_REFILL_RESCHED_MS 5 26 27 /* shortcut to interpret a raw memory buffer as a rx descriptor */ 28 #define HTT_RX_BUF_TO_RX_DESC(hw, buf) ath10k_htt_rx_desc_from_raw_buffer(hw, buf) 29 30 static int ath10k_htt_rx_get_csum_state(struct ath10k_hw_params *hw, struct sk_buff *skb); 31 32 static struct sk_buff * 33 ath10k_htt_rx_find_skb_paddr(struct ath10k *ar, u64 paddr) 34 { 35 struct ath10k_skb_rxcb *rxcb; 36 37 hash_for_each_possible(ar->htt.rx_ring.skb_table, rxcb, hlist, paddr) 38 if (rxcb->paddr == paddr) 39 return ATH10K_RXCB_SKB(rxcb); 40 41 WARN_ON_ONCE(1); 42 return NULL; 43 } 44 45 static void ath10k_htt_rx_ring_free(struct ath10k_htt *htt) 46 { 47 struct sk_buff *skb; 48 struct ath10k_skb_rxcb *rxcb; 49 struct hlist_node *n; 50 int i; 51 52 if (htt->rx_ring.in_ord_rx) { 53 hash_for_each_safe(htt->rx_ring.skb_table, i, n, rxcb, hlist) { 54 skb = ATH10K_RXCB_SKB(rxcb); 55 dma_unmap_single(htt->ar->dev, rxcb->paddr, 56 skb->len + skb_tailroom(skb), 57 DMA_FROM_DEVICE); 58 hash_del(&rxcb->hlist); 59 dev_kfree_skb_any(skb); 60 } 61 } else { 62 for (i = 0; i < htt->rx_ring.size; i++) { 63 skb = htt->rx_ring.netbufs_ring[i]; 64 if (!skb) 65 continue; 66 67 rxcb = ATH10K_SKB_RXCB(skb); 68 dma_unmap_single(htt->ar->dev, rxcb->paddr, 69 skb->len + skb_tailroom(skb), 70 DMA_FROM_DEVICE); 71 dev_kfree_skb_any(skb); 72 } 73 } 74 75 htt->rx_ring.fill_cnt = 0; 76 hash_init(htt->rx_ring.skb_table); 77 memset(htt->rx_ring.netbufs_ring, 0, 78 htt->rx_ring.size * sizeof(htt->rx_ring.netbufs_ring[0])); 79 } 80 81 static size_t ath10k_htt_get_rx_ring_size_32(struct ath10k_htt *htt) 82 { 83 return htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring_32); 84 } 85 86 static size_t ath10k_htt_get_rx_ring_size_64(struct ath10k_htt *htt) 87 { 88 return htt->rx_ring.size * sizeof(htt->rx_ring.paddrs_ring_64); 89 } 90 91 static void ath10k_htt_config_paddrs_ring_32(struct ath10k_htt *htt, 92 void *vaddr) 93 { 94 htt->rx_ring.paddrs_ring_32 = vaddr; 95 } 96 97 static void ath10k_htt_config_paddrs_ring_64(struct ath10k_htt *htt, 98 void *vaddr) 99 { 100 htt->rx_ring.paddrs_ring_64 = vaddr; 101 } 102 103 static void ath10k_htt_set_paddrs_ring_32(struct ath10k_htt *htt, 104 dma_addr_t paddr, int idx) 105 { 106 htt->rx_ring.paddrs_ring_32[idx] = __cpu_to_le32(paddr); 107 } 108 109 static void ath10k_htt_set_paddrs_ring_64(struct ath10k_htt *htt, 110 dma_addr_t paddr, int idx) 111 { 112 htt->rx_ring.paddrs_ring_64[idx] = __cpu_to_le64(paddr); 113 } 114 115 static void ath10k_htt_reset_paddrs_ring_32(struct ath10k_htt *htt, int idx) 116 { 117 htt->rx_ring.paddrs_ring_32[idx] = 0; 118 } 119 120 static void ath10k_htt_reset_paddrs_ring_64(struct ath10k_htt *htt, int idx) 121 { 122 htt->rx_ring.paddrs_ring_64[idx] = 0; 123 } 124 125 static void *ath10k_htt_get_vaddr_ring_32(struct ath10k_htt *htt) 126 { 127 return (void *)htt->rx_ring.paddrs_ring_32; 128 } 129 130 static void *ath10k_htt_get_vaddr_ring_64(struct ath10k_htt *htt) 131 { 132 return (void *)htt->rx_ring.paddrs_ring_64; 133 } 134 135 static int __ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num) 136 { 137 struct ath10k_hw_params *hw = &htt->ar->hw_params; 138 struct htt_rx_desc *rx_desc; 139 struct ath10k_skb_rxcb *rxcb; 140 struct sk_buff *skb; 141 dma_addr_t paddr; 142 int ret = 0, idx; 143 144 /* The Full Rx Reorder firmware has no way of telling the host 145 * implicitly when it copied HTT Rx Ring buffers to MAC Rx Ring. 146 * To keep things simple make sure ring is always half empty. This 147 * guarantees there'll be no replenishment overruns possible. 148 */ 149 BUILD_BUG_ON(HTT_RX_RING_FILL_LEVEL >= HTT_RX_RING_SIZE / 2); 150 151 idx = __le32_to_cpu(*htt->rx_ring.alloc_idx.vaddr); 152 153 if (idx < 0 || idx >= htt->rx_ring.size) { 154 ath10k_err(htt->ar, "rx ring index is not valid, firmware malfunctioning?\n"); 155 idx &= htt->rx_ring.size_mask; 156 ret = -ENOMEM; 157 goto fail; 158 } 159 160 while (num > 0) { 161 skb = dev_alloc_skb(HTT_RX_BUF_SIZE + HTT_RX_DESC_ALIGN); 162 if (!skb) { 163 ret = -ENOMEM; 164 goto fail; 165 } 166 167 if (!IS_ALIGNED((unsigned long)skb->data, HTT_RX_DESC_ALIGN)) 168 skb_pull(skb, 169 PTR_ALIGN(skb->data, HTT_RX_DESC_ALIGN) - 170 skb->data); 171 172 /* Clear rx_desc attention word before posting to Rx ring */ 173 rx_desc = HTT_RX_BUF_TO_RX_DESC(hw, skb->data); 174 ath10k_htt_rx_desc_get_attention(hw, rx_desc)->flags = __cpu_to_le32(0); 175 176 paddr = dma_map_single(htt->ar->dev, skb->data, 177 skb->len + skb_tailroom(skb), 178 DMA_FROM_DEVICE); 179 180 if (unlikely(dma_mapping_error(htt->ar->dev, paddr))) { 181 dev_kfree_skb_any(skb); 182 ret = -ENOMEM; 183 goto fail; 184 } 185 186 rxcb = ATH10K_SKB_RXCB(skb); 187 rxcb->paddr = paddr; 188 htt->rx_ring.netbufs_ring[idx] = skb; 189 ath10k_htt_set_paddrs_ring(htt, paddr, idx); 190 htt->rx_ring.fill_cnt++; 191 192 if (htt->rx_ring.in_ord_rx) { 193 hash_add(htt->rx_ring.skb_table, 194 &ATH10K_SKB_RXCB(skb)->hlist, 195 paddr); 196 } 197 198 num--; 199 idx++; 200 idx &= htt->rx_ring.size_mask; 201 } 202 203 fail: 204 /* 205 * Make sure the rx buffer is updated before available buffer 206 * index to avoid any potential rx ring corruption. 207 */ 208 mb(); 209 *htt->rx_ring.alloc_idx.vaddr = __cpu_to_le32(idx); 210 return ret; 211 } 212 213 static int ath10k_htt_rx_ring_fill_n(struct ath10k_htt *htt, int num) 214 { 215 lockdep_assert_held(&htt->rx_ring.lock); 216 return __ath10k_htt_rx_ring_fill_n(htt, num); 217 } 218 219 static void ath10k_htt_rx_msdu_buff_replenish(struct ath10k_htt *htt) 220 { 221 int ret, num_deficit, num_to_fill; 222 223 /* Refilling the whole RX ring buffer proves to be a bad idea. The 224 * reason is RX may take up significant amount of CPU cycles and starve 225 * other tasks, e.g. TX on an ethernet device while acting as a bridge 226 * with ath10k wlan interface. This ended up with very poor performance 227 * once CPU the host system was overwhelmed with RX on ath10k. 228 * 229 * By limiting the number of refills the replenishing occurs 230 * progressively. This in turns makes use of the fact tasklets are 231 * processed in FIFO order. This means actual RX processing can starve 232 * out refilling. If there's not enough buffers on RX ring FW will not 233 * report RX until it is refilled with enough buffers. This 234 * automatically balances load wrt to CPU power. 235 * 236 * This probably comes at a cost of lower maximum throughput but 237 * improves the average and stability. 238 */ 239 spin_lock_bh(&htt->rx_ring.lock); 240 num_deficit = htt->rx_ring.fill_level - htt->rx_ring.fill_cnt; 241 num_to_fill = min(ATH10K_HTT_MAX_NUM_REFILL, num_deficit); 242 num_deficit -= num_to_fill; 243 ret = ath10k_htt_rx_ring_fill_n(htt, num_to_fill); 244 if (ret == -ENOMEM) { 245 /* 246 * Failed to fill it to the desired level - 247 * we'll start a timer and try again next time. 248 * As long as enough buffers are left in the ring for 249 * another A-MPDU rx, no special recovery is needed. 250 */ 251 mod_timer(&htt->rx_ring.refill_retry_timer, jiffies + 252 msecs_to_jiffies(HTT_RX_RING_REFILL_RETRY_MS)); 253 } else if (num_deficit > 0) { 254 mod_timer(&htt->rx_ring.refill_retry_timer, jiffies + 255 msecs_to_jiffies(HTT_RX_RING_REFILL_RESCHED_MS)); 256 } 257 spin_unlock_bh(&htt->rx_ring.lock); 258 } 259 260 static void ath10k_htt_rx_ring_refill_retry(struct timer_list *t) 261 { 262 struct ath10k_htt *htt = timer_container_of(htt, t, 263 rx_ring.refill_retry_timer); 264 265 ath10k_htt_rx_msdu_buff_replenish(htt); 266 } 267 268 int ath10k_htt_rx_ring_refill(struct ath10k *ar) 269 { 270 struct ath10k_htt *htt = &ar->htt; 271 int ret; 272 273 if (ar->bus_param.dev_type == ATH10K_DEV_TYPE_HL) 274 return 0; 275 276 spin_lock_bh(&htt->rx_ring.lock); 277 ret = ath10k_htt_rx_ring_fill_n(htt, (htt->rx_ring.fill_level - 278 htt->rx_ring.fill_cnt)); 279 280 if (ret) 281 ath10k_htt_rx_ring_free(htt); 282 283 spin_unlock_bh(&htt->rx_ring.lock); 284 285 return ret; 286 } 287 288 void ath10k_htt_rx_free(struct ath10k_htt *htt) 289 { 290 if (htt->ar->bus_param.dev_type == ATH10K_DEV_TYPE_HL) 291 return; 292 293 timer_delete_sync(&htt->rx_ring.refill_retry_timer); 294 295 skb_queue_purge(&htt->rx_msdus_q); 296 skb_queue_purge(&htt->rx_in_ord_compl_q); 297 skb_queue_purge(&htt->tx_fetch_ind_q); 298 299 spin_lock_bh(&htt->rx_ring.lock); 300 ath10k_htt_rx_ring_free(htt); 301 spin_unlock_bh(&htt->rx_ring.lock); 302 303 dma_free_coherent(htt->ar->dev, 304 ath10k_htt_get_rx_ring_size(htt), 305 ath10k_htt_get_vaddr_ring(htt), 306 htt->rx_ring.base_paddr); 307 308 ath10k_htt_config_paddrs_ring(htt, NULL); 309 310 dma_free_coherent(htt->ar->dev, 311 sizeof(*htt->rx_ring.alloc_idx.vaddr), 312 htt->rx_ring.alloc_idx.vaddr, 313 htt->rx_ring.alloc_idx.paddr); 314 htt->rx_ring.alloc_idx.vaddr = NULL; 315 316 kfree(htt->rx_ring.netbufs_ring); 317 htt->rx_ring.netbufs_ring = NULL; 318 } 319 320 static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt) 321 { 322 struct ath10k *ar = htt->ar; 323 int idx; 324 struct sk_buff *msdu; 325 326 lockdep_assert_held(&htt->rx_ring.lock); 327 328 if (htt->rx_ring.fill_cnt == 0) { 329 ath10k_warn(ar, "tried to pop sk_buff from an empty rx ring\n"); 330 return NULL; 331 } 332 333 idx = htt->rx_ring.sw_rd_idx.msdu_payld; 334 msdu = htt->rx_ring.netbufs_ring[idx]; 335 htt->rx_ring.netbufs_ring[idx] = NULL; 336 ath10k_htt_reset_paddrs_ring(htt, idx); 337 338 idx++; 339 idx &= htt->rx_ring.size_mask; 340 htt->rx_ring.sw_rd_idx.msdu_payld = idx; 341 htt->rx_ring.fill_cnt--; 342 343 dma_unmap_single(htt->ar->dev, 344 ATH10K_SKB_RXCB(msdu)->paddr, 345 msdu->len + skb_tailroom(msdu), 346 DMA_FROM_DEVICE); 347 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ", 348 msdu->data, msdu->len + skb_tailroom(msdu)); 349 350 return msdu; 351 } 352 353 /* return: < 0 fatal error, 0 - non chained msdu, 1 chained msdu */ 354 static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt, 355 struct sk_buff_head *amsdu) 356 { 357 struct ath10k *ar = htt->ar; 358 struct ath10k_hw_params *hw = &ar->hw_params; 359 int msdu_len, msdu_chaining = 0; 360 struct sk_buff *msdu; 361 struct htt_rx_desc *rx_desc; 362 struct rx_attention *rx_desc_attention; 363 struct rx_frag_info_common *rx_desc_frag_info_common; 364 struct rx_msdu_start_common *rx_desc_msdu_start_common; 365 struct rx_msdu_end_common *rx_desc_msdu_end_common; 366 367 lockdep_assert_held(&htt->rx_ring.lock); 368 369 for (;;) { 370 int last_msdu, msdu_len_invalid, msdu_chained; 371 372 msdu = ath10k_htt_rx_netbuf_pop(htt); 373 if (!msdu) { 374 __skb_queue_purge(amsdu); 375 return -ENOENT; 376 } 377 378 __skb_queue_tail(amsdu, msdu); 379 380 rx_desc = HTT_RX_BUF_TO_RX_DESC(hw, msdu->data); 381 rx_desc_attention = ath10k_htt_rx_desc_get_attention(hw, rx_desc); 382 rx_desc_msdu_start_common = ath10k_htt_rx_desc_get_msdu_start(hw, 383 rx_desc); 384 rx_desc_msdu_end_common = ath10k_htt_rx_desc_get_msdu_end(hw, rx_desc); 385 rx_desc_frag_info_common = ath10k_htt_rx_desc_get_frag_info(hw, rx_desc); 386 387 /* FIXME: we must report msdu payload since this is what caller 388 * expects now 389 */ 390 skb_put(msdu, hw->rx_desc_ops->rx_desc_msdu_payload_offset); 391 skb_pull(msdu, hw->rx_desc_ops->rx_desc_msdu_payload_offset); 392 393 /* 394 * Sanity check - confirm the HW is finished filling in the 395 * rx data. 396 * If the HW and SW are working correctly, then it's guaranteed 397 * that the HW's MAC DMA is done before this point in the SW. 398 * To prevent the case that we handle a stale Rx descriptor, 399 * just assert for now until we have a way to recover. 400 */ 401 if (!(__le32_to_cpu(rx_desc_attention->flags) 402 & RX_ATTENTION_FLAGS_MSDU_DONE)) { 403 __skb_queue_purge(amsdu); 404 return -EIO; 405 } 406 407 msdu_len_invalid = !!(__le32_to_cpu(rx_desc_attention->flags) 408 & (RX_ATTENTION_FLAGS_MPDU_LENGTH_ERR | 409 RX_ATTENTION_FLAGS_MSDU_LENGTH_ERR)); 410 msdu_len = MS(__le32_to_cpu(rx_desc_msdu_start_common->info0), 411 RX_MSDU_START_INFO0_MSDU_LENGTH); 412 msdu_chained = rx_desc_frag_info_common->ring2_more_count; 413 414 if (msdu_len_invalid) 415 msdu_len = 0; 416 417 skb_trim(msdu, 0); 418 skb_put(msdu, min(msdu_len, ath10k_htt_rx_msdu_size(hw))); 419 msdu_len -= msdu->len; 420 421 /* Note: Chained buffers do not contain rx descriptor */ 422 while (msdu_chained--) { 423 msdu = ath10k_htt_rx_netbuf_pop(htt); 424 if (!msdu) { 425 __skb_queue_purge(amsdu); 426 return -ENOENT; 427 } 428 429 __skb_queue_tail(amsdu, msdu); 430 skb_trim(msdu, 0); 431 skb_put(msdu, min(msdu_len, HTT_RX_BUF_SIZE)); 432 msdu_len -= msdu->len; 433 msdu_chaining = 1; 434 } 435 436 last_msdu = __le32_to_cpu(rx_desc_msdu_end_common->info0) & 437 RX_MSDU_END_INFO0_LAST_MSDU; 438 439 /* FIXME: why are we skipping the first part of the rx_desc? */ 440 trace_ath10k_htt_rx_desc(ar, (void *)rx_desc + sizeof(u32), 441 hw->rx_desc_ops->rx_desc_size - sizeof(u32)); 442 443 if (last_msdu) 444 break; 445 } 446 447 if (skb_queue_empty(amsdu)) 448 msdu_chaining = -1; 449 450 /* 451 * Don't refill the ring yet. 452 * 453 * First, the elements popped here are still in use - it is not 454 * safe to overwrite them until the matching call to 455 * mpdu_desc_list_next. Second, for efficiency it is preferable to 456 * refill the rx ring with 1 PPDU's worth of rx buffers (something 457 * like 32 x 3 buffers), rather than one MPDU's worth of rx buffers 458 * (something like 3 buffers). Consequently, we'll rely on the txrx 459 * SW to tell us when it is done pulling all the PPDU's rx buffers 460 * out of the rx ring, and then refill it just once. 461 */ 462 463 return msdu_chaining; 464 } 465 466 static struct sk_buff *ath10k_htt_rx_pop_paddr(struct ath10k_htt *htt, 467 u64 paddr) 468 { 469 struct ath10k *ar = htt->ar; 470 struct ath10k_skb_rxcb *rxcb; 471 struct sk_buff *msdu; 472 473 lockdep_assert_held(&htt->rx_ring.lock); 474 475 msdu = ath10k_htt_rx_find_skb_paddr(ar, paddr); 476 if (!msdu) 477 return NULL; 478 479 rxcb = ATH10K_SKB_RXCB(msdu); 480 hash_del(&rxcb->hlist); 481 htt->rx_ring.fill_cnt--; 482 483 dma_unmap_single(htt->ar->dev, rxcb->paddr, 484 msdu->len + skb_tailroom(msdu), 485 DMA_FROM_DEVICE); 486 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx netbuf pop: ", 487 msdu->data, msdu->len + skb_tailroom(msdu)); 488 489 return msdu; 490 } 491 492 static inline void ath10k_htt_append_frag_list(struct sk_buff *skb_head, 493 struct sk_buff *frag_list, 494 unsigned int frag_len) 495 { 496 skb_shinfo(skb_head)->frag_list = frag_list; 497 skb_head->data_len = frag_len; 498 skb_head->len += skb_head->data_len; 499 } 500 501 static int ath10k_htt_rx_handle_amsdu_mon_32(struct ath10k_htt *htt, 502 struct sk_buff *msdu, 503 struct htt_rx_in_ord_msdu_desc **msdu_desc) 504 { 505 struct ath10k *ar = htt->ar; 506 struct ath10k_hw_params *hw = &ar->hw_params; 507 u32 paddr; 508 struct sk_buff *frag_buf; 509 struct sk_buff *prev_frag_buf; 510 u8 last_frag; 511 struct htt_rx_in_ord_msdu_desc *ind_desc = *msdu_desc; 512 struct htt_rx_desc *rxd; 513 int amsdu_len = __le16_to_cpu(ind_desc->msdu_len); 514 515 rxd = HTT_RX_BUF_TO_RX_DESC(hw, msdu->data); 516 trace_ath10k_htt_rx_desc(ar, rxd, hw->rx_desc_ops->rx_desc_size); 517 518 skb_put(msdu, hw->rx_desc_ops->rx_desc_size); 519 skb_pull(msdu, hw->rx_desc_ops->rx_desc_size); 520 skb_put(msdu, min(amsdu_len, ath10k_htt_rx_msdu_size(hw))); 521 amsdu_len -= msdu->len; 522 523 last_frag = ind_desc->reserved; 524 if (last_frag) { 525 if (amsdu_len) { 526 ath10k_warn(ar, "invalid amsdu len %u, left %d", 527 __le16_to_cpu(ind_desc->msdu_len), 528 amsdu_len); 529 } 530 return 0; 531 } 532 533 ind_desc++; 534 paddr = __le32_to_cpu(ind_desc->msdu_paddr); 535 frag_buf = ath10k_htt_rx_pop_paddr(htt, paddr); 536 if (!frag_buf) { 537 ath10k_warn(ar, "failed to pop frag-1 paddr: 0x%x", paddr); 538 return -ENOENT; 539 } 540 541 skb_put(frag_buf, min(amsdu_len, HTT_RX_BUF_SIZE)); 542 ath10k_htt_append_frag_list(msdu, frag_buf, amsdu_len); 543 544 amsdu_len -= frag_buf->len; 545 prev_frag_buf = frag_buf; 546 last_frag = ind_desc->reserved; 547 while (!last_frag) { 548 ind_desc++; 549 paddr = __le32_to_cpu(ind_desc->msdu_paddr); 550 frag_buf = ath10k_htt_rx_pop_paddr(htt, paddr); 551 if (!frag_buf) { 552 ath10k_warn(ar, "failed to pop frag-n paddr: 0x%x", 553 paddr); 554 prev_frag_buf->next = NULL; 555 return -ENOENT; 556 } 557 558 skb_put(frag_buf, min(amsdu_len, HTT_RX_BUF_SIZE)); 559 last_frag = ind_desc->reserved; 560 amsdu_len -= frag_buf->len; 561 562 prev_frag_buf->next = frag_buf; 563 prev_frag_buf = frag_buf; 564 } 565 566 if (amsdu_len) { 567 ath10k_warn(ar, "invalid amsdu len %u, left %d", 568 __le16_to_cpu(ind_desc->msdu_len), amsdu_len); 569 } 570 571 *msdu_desc = ind_desc; 572 573 prev_frag_buf->next = NULL; 574 return 0; 575 } 576 577 static int 578 ath10k_htt_rx_handle_amsdu_mon_64(struct ath10k_htt *htt, 579 struct sk_buff *msdu, 580 struct htt_rx_in_ord_msdu_desc_ext **msdu_desc) 581 { 582 struct ath10k *ar = htt->ar; 583 struct ath10k_hw_params *hw = &ar->hw_params; 584 u64 paddr; 585 struct sk_buff *frag_buf; 586 struct sk_buff *prev_frag_buf; 587 u8 last_frag; 588 struct htt_rx_in_ord_msdu_desc_ext *ind_desc = *msdu_desc; 589 struct htt_rx_desc *rxd; 590 int amsdu_len = __le16_to_cpu(ind_desc->msdu_len); 591 592 rxd = HTT_RX_BUF_TO_RX_DESC(hw, msdu->data); 593 trace_ath10k_htt_rx_desc(ar, rxd, hw->rx_desc_ops->rx_desc_size); 594 595 skb_put(msdu, hw->rx_desc_ops->rx_desc_size); 596 skb_pull(msdu, hw->rx_desc_ops->rx_desc_size); 597 skb_put(msdu, min(amsdu_len, ath10k_htt_rx_msdu_size(hw))); 598 amsdu_len -= msdu->len; 599 600 last_frag = ind_desc->reserved; 601 if (last_frag) { 602 if (amsdu_len) { 603 ath10k_warn(ar, "invalid amsdu len %u, left %d", 604 __le16_to_cpu(ind_desc->msdu_len), 605 amsdu_len); 606 } 607 return 0; 608 } 609 610 ind_desc++; 611 paddr = __le64_to_cpu(ind_desc->msdu_paddr); 612 frag_buf = ath10k_htt_rx_pop_paddr(htt, paddr); 613 if (!frag_buf) { 614 ath10k_warn(ar, "failed to pop frag-1 paddr: 0x%llx", paddr); 615 return -ENOENT; 616 } 617 618 skb_put(frag_buf, min(amsdu_len, HTT_RX_BUF_SIZE)); 619 ath10k_htt_append_frag_list(msdu, frag_buf, amsdu_len); 620 621 amsdu_len -= frag_buf->len; 622 prev_frag_buf = frag_buf; 623 last_frag = ind_desc->reserved; 624 while (!last_frag) { 625 ind_desc++; 626 paddr = __le64_to_cpu(ind_desc->msdu_paddr); 627 frag_buf = ath10k_htt_rx_pop_paddr(htt, paddr); 628 if (!frag_buf) { 629 ath10k_warn(ar, "failed to pop frag-n paddr: 0x%llx", 630 paddr); 631 prev_frag_buf->next = NULL; 632 return -ENOENT; 633 } 634 635 skb_put(frag_buf, min(amsdu_len, HTT_RX_BUF_SIZE)); 636 last_frag = ind_desc->reserved; 637 amsdu_len -= frag_buf->len; 638 639 prev_frag_buf->next = frag_buf; 640 prev_frag_buf = frag_buf; 641 } 642 643 if (amsdu_len) { 644 ath10k_warn(ar, "invalid amsdu len %u, left %d", 645 __le16_to_cpu(ind_desc->msdu_len), amsdu_len); 646 } 647 648 *msdu_desc = ind_desc; 649 650 prev_frag_buf->next = NULL; 651 return 0; 652 } 653 654 static int ath10k_htt_rx_pop_paddr32_list(struct ath10k_htt *htt, 655 struct htt_rx_in_ord_ind *ev, 656 struct sk_buff_head *list) 657 { 658 struct ath10k *ar = htt->ar; 659 struct ath10k_hw_params *hw = &ar->hw_params; 660 struct htt_rx_in_ord_msdu_desc *msdu_desc = ev->msdu_descs32; 661 struct htt_rx_desc *rxd; 662 struct rx_attention *rxd_attention; 663 struct sk_buff *msdu; 664 int msdu_count, ret; 665 bool is_offload; 666 u32 paddr; 667 668 lockdep_assert_held(&htt->rx_ring.lock); 669 670 msdu_count = __le16_to_cpu(ev->msdu_count); 671 is_offload = !!(ev->info & HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK); 672 673 while (msdu_count--) { 674 paddr = __le32_to_cpu(msdu_desc->msdu_paddr); 675 676 msdu = ath10k_htt_rx_pop_paddr(htt, paddr); 677 if (!msdu) { 678 __skb_queue_purge(list); 679 return -ENOENT; 680 } 681 682 if (!is_offload && ar->monitor_arvif) { 683 ret = ath10k_htt_rx_handle_amsdu_mon_32(htt, msdu, 684 &msdu_desc); 685 if (ret) { 686 __skb_queue_purge(list); 687 return ret; 688 } 689 __skb_queue_tail(list, msdu); 690 msdu_desc++; 691 continue; 692 } 693 694 __skb_queue_tail(list, msdu); 695 696 if (!is_offload) { 697 rxd = HTT_RX_BUF_TO_RX_DESC(hw, msdu->data); 698 rxd_attention = ath10k_htt_rx_desc_get_attention(hw, rxd); 699 700 trace_ath10k_htt_rx_desc(ar, rxd, hw->rx_desc_ops->rx_desc_size); 701 702 skb_put(msdu, hw->rx_desc_ops->rx_desc_size); 703 skb_pull(msdu, hw->rx_desc_ops->rx_desc_size); 704 skb_put(msdu, __le16_to_cpu(msdu_desc->msdu_len)); 705 706 if (!(__le32_to_cpu(rxd_attention->flags) & 707 RX_ATTENTION_FLAGS_MSDU_DONE)) { 708 ath10k_warn(htt->ar, "tried to pop an incomplete frame, oops!\n"); 709 return -EIO; 710 } 711 } 712 713 msdu_desc++; 714 } 715 716 return 0; 717 } 718 719 static int ath10k_htt_rx_pop_paddr64_list(struct ath10k_htt *htt, 720 struct htt_rx_in_ord_ind *ev, 721 struct sk_buff_head *list) 722 { 723 struct ath10k *ar = htt->ar; 724 struct ath10k_hw_params *hw = &ar->hw_params; 725 struct htt_rx_in_ord_msdu_desc_ext *msdu_desc = ev->msdu_descs64; 726 struct htt_rx_desc *rxd; 727 struct rx_attention *rxd_attention; 728 struct sk_buff *msdu; 729 int msdu_count, ret; 730 bool is_offload; 731 u64 paddr; 732 733 lockdep_assert_held(&htt->rx_ring.lock); 734 735 msdu_count = __le16_to_cpu(ev->msdu_count); 736 is_offload = !!(ev->info & HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK); 737 738 while (msdu_count--) { 739 paddr = __le64_to_cpu(msdu_desc->msdu_paddr); 740 msdu = ath10k_htt_rx_pop_paddr(htt, paddr); 741 if (!msdu) { 742 __skb_queue_purge(list); 743 return -ENOENT; 744 } 745 746 if (!is_offload && ar->monitor_arvif) { 747 ret = ath10k_htt_rx_handle_amsdu_mon_64(htt, msdu, 748 &msdu_desc); 749 if (ret) { 750 __skb_queue_purge(list); 751 return ret; 752 } 753 __skb_queue_tail(list, msdu); 754 msdu_desc++; 755 continue; 756 } 757 758 __skb_queue_tail(list, msdu); 759 760 if (!is_offload) { 761 rxd = HTT_RX_BUF_TO_RX_DESC(hw, msdu->data); 762 rxd_attention = ath10k_htt_rx_desc_get_attention(hw, rxd); 763 764 trace_ath10k_htt_rx_desc(ar, rxd, hw->rx_desc_ops->rx_desc_size); 765 766 skb_put(msdu, hw->rx_desc_ops->rx_desc_size); 767 skb_pull(msdu, hw->rx_desc_ops->rx_desc_size); 768 skb_put(msdu, __le16_to_cpu(msdu_desc->msdu_len)); 769 770 if (!(__le32_to_cpu(rxd_attention->flags) & 771 RX_ATTENTION_FLAGS_MSDU_DONE)) { 772 ath10k_warn(htt->ar, "tried to pop an incomplete frame, oops!\n"); 773 return -EIO; 774 } 775 } 776 777 msdu_desc++; 778 } 779 780 return 0; 781 } 782 783 int ath10k_htt_rx_alloc(struct ath10k_htt *htt) 784 { 785 struct ath10k *ar = htt->ar; 786 dma_addr_t paddr; 787 void *vaddr, *vaddr_ring; 788 size_t size; 789 struct timer_list *timer = &htt->rx_ring.refill_retry_timer; 790 791 if (ar->bus_param.dev_type == ATH10K_DEV_TYPE_HL) 792 return 0; 793 794 htt->rx_confused = false; 795 796 /* XXX: The fill level could be changed during runtime in response to 797 * the host processing latency. Is this really worth it? 798 */ 799 htt->rx_ring.size = HTT_RX_RING_SIZE; 800 htt->rx_ring.size_mask = htt->rx_ring.size - 1; 801 htt->rx_ring.fill_level = ar->hw_params.rx_ring_fill_level; 802 803 if (!is_power_of_2(htt->rx_ring.size)) { 804 ath10k_warn(ar, "htt rx ring size is not power of 2\n"); 805 return -EINVAL; 806 } 807 808 htt->rx_ring.netbufs_ring = 809 kzalloc_objs(struct sk_buff *, htt->rx_ring.size); 810 if (!htt->rx_ring.netbufs_ring) 811 goto err_netbuf; 812 813 size = ath10k_htt_get_rx_ring_size(htt); 814 815 vaddr_ring = dma_alloc_coherent(htt->ar->dev, size, &paddr, GFP_KERNEL); 816 if (!vaddr_ring) 817 goto err_dma_ring; 818 819 ath10k_htt_config_paddrs_ring(htt, vaddr_ring); 820 htt->rx_ring.base_paddr = paddr; 821 822 vaddr = dma_alloc_coherent(htt->ar->dev, 823 sizeof(*htt->rx_ring.alloc_idx.vaddr), 824 &paddr, GFP_KERNEL); 825 if (!vaddr) 826 goto err_dma_idx; 827 828 htt->rx_ring.alloc_idx.vaddr = vaddr; 829 htt->rx_ring.alloc_idx.paddr = paddr; 830 htt->rx_ring.sw_rd_idx.msdu_payld = htt->rx_ring.size_mask; 831 *htt->rx_ring.alloc_idx.vaddr = 0; 832 833 /* Initialize the Rx refill retry timer */ 834 timer_setup(timer, ath10k_htt_rx_ring_refill_retry, 0); 835 836 spin_lock_init(&htt->rx_ring.lock); 837 838 htt->rx_ring.fill_cnt = 0; 839 htt->rx_ring.sw_rd_idx.msdu_payld = 0; 840 hash_init(htt->rx_ring.skb_table); 841 842 skb_queue_head_init(&htt->rx_msdus_q); 843 skb_queue_head_init(&htt->rx_in_ord_compl_q); 844 skb_queue_head_init(&htt->tx_fetch_ind_q); 845 atomic_set(&htt->num_mpdus_ready, 0); 846 847 ath10k_dbg(ar, ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n", 848 htt->rx_ring.size, htt->rx_ring.fill_level); 849 return 0; 850 851 err_dma_idx: 852 dma_free_coherent(htt->ar->dev, 853 ath10k_htt_get_rx_ring_size(htt), 854 vaddr_ring, 855 htt->rx_ring.base_paddr); 856 ath10k_htt_config_paddrs_ring(htt, NULL); 857 err_dma_ring: 858 kfree(htt->rx_ring.netbufs_ring); 859 htt->rx_ring.netbufs_ring = NULL; 860 err_netbuf: 861 return -ENOMEM; 862 } 863 864 static int ath10k_htt_rx_crypto_param_len(struct ath10k *ar, 865 enum htt_rx_mpdu_encrypt_type type) 866 { 867 switch (type) { 868 case HTT_RX_MPDU_ENCRYPT_NONE: 869 return 0; 870 case HTT_RX_MPDU_ENCRYPT_WEP40: 871 case HTT_RX_MPDU_ENCRYPT_WEP104: 872 return IEEE80211_WEP_IV_LEN; 873 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC: 874 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA: 875 return IEEE80211_TKIP_IV_LEN; 876 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2: 877 return IEEE80211_CCMP_HDR_LEN; 878 case HTT_RX_MPDU_ENCRYPT_AES_CCM256_WPA2: 879 return IEEE80211_CCMP_256_HDR_LEN; 880 case HTT_RX_MPDU_ENCRYPT_AES_GCMP_WPA2: 881 case HTT_RX_MPDU_ENCRYPT_AES_GCMP256_WPA2: 882 return IEEE80211_GCMP_HDR_LEN; 883 case HTT_RX_MPDU_ENCRYPT_WEP128: 884 case HTT_RX_MPDU_ENCRYPT_WAPI: 885 break; 886 } 887 888 ath10k_warn(ar, "unsupported encryption type %d\n", type); 889 return 0; 890 } 891 892 #define MICHAEL_MIC_LEN 8 893 894 static int ath10k_htt_rx_crypto_mic_len(struct ath10k *ar, 895 enum htt_rx_mpdu_encrypt_type type) 896 { 897 switch (type) { 898 case HTT_RX_MPDU_ENCRYPT_NONE: 899 case HTT_RX_MPDU_ENCRYPT_WEP40: 900 case HTT_RX_MPDU_ENCRYPT_WEP104: 901 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC: 902 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA: 903 return 0; 904 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2: 905 return IEEE80211_CCMP_MIC_LEN; 906 case HTT_RX_MPDU_ENCRYPT_AES_CCM256_WPA2: 907 return IEEE80211_CCMP_256_MIC_LEN; 908 case HTT_RX_MPDU_ENCRYPT_AES_GCMP_WPA2: 909 case HTT_RX_MPDU_ENCRYPT_AES_GCMP256_WPA2: 910 return IEEE80211_GCMP_MIC_LEN; 911 case HTT_RX_MPDU_ENCRYPT_WEP128: 912 case HTT_RX_MPDU_ENCRYPT_WAPI: 913 break; 914 } 915 916 ath10k_warn(ar, "unsupported encryption type %d\n", type); 917 return 0; 918 } 919 920 static int ath10k_htt_rx_crypto_icv_len(struct ath10k *ar, 921 enum htt_rx_mpdu_encrypt_type type) 922 { 923 switch (type) { 924 case HTT_RX_MPDU_ENCRYPT_NONE: 925 case HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2: 926 case HTT_RX_MPDU_ENCRYPT_AES_CCM256_WPA2: 927 case HTT_RX_MPDU_ENCRYPT_AES_GCMP_WPA2: 928 case HTT_RX_MPDU_ENCRYPT_AES_GCMP256_WPA2: 929 return 0; 930 case HTT_RX_MPDU_ENCRYPT_WEP40: 931 case HTT_RX_MPDU_ENCRYPT_WEP104: 932 return IEEE80211_WEP_ICV_LEN; 933 case HTT_RX_MPDU_ENCRYPT_TKIP_WITHOUT_MIC: 934 case HTT_RX_MPDU_ENCRYPT_TKIP_WPA: 935 return IEEE80211_TKIP_ICV_LEN; 936 case HTT_RX_MPDU_ENCRYPT_WEP128: 937 case HTT_RX_MPDU_ENCRYPT_WAPI: 938 break; 939 } 940 941 ath10k_warn(ar, "unsupported encryption type %d\n", type); 942 return 0; 943 } 944 945 struct amsdu_subframe_hdr { 946 u8 dst[ETH_ALEN]; 947 u8 src[ETH_ALEN]; 948 __be16 len; 949 } __packed; 950 951 #define GROUP_ID_IS_SU_MIMO(x) ((x) == 0 || (x) == 63) 952 953 static inline u8 ath10k_bw_to_mac80211_bw(u8 bw) 954 { 955 u8 ret = 0; 956 957 switch (bw) { 958 case 0: 959 ret = RATE_INFO_BW_20; 960 break; 961 case 1: 962 ret = RATE_INFO_BW_40; 963 break; 964 case 2: 965 ret = RATE_INFO_BW_80; 966 break; 967 case 3: 968 ret = RATE_INFO_BW_160; 969 break; 970 } 971 972 return ret; 973 } 974 975 static void ath10k_htt_rx_h_rates(struct ath10k *ar, 976 struct ieee80211_rx_status *status, 977 struct htt_rx_desc *rxd) 978 { 979 struct ath10k_hw_params *hw = &ar->hw_params; 980 struct rx_attention *rxd_attention; 981 struct rx_mpdu_start *rxd_mpdu_start; 982 struct rx_mpdu_end *rxd_mpdu_end; 983 struct rx_msdu_start_common *rxd_msdu_start_common; 984 struct rx_msdu_end_common *rxd_msdu_end_common; 985 struct rx_ppdu_start *rxd_ppdu_start; 986 struct ieee80211_supported_band *sband; 987 u8 cck, rate, bw, sgi, mcs, nss; 988 u8 *rxd_msdu_payload; 989 u8 preamble = 0; 990 u8 group_id; 991 u32 info1, info2, info3; 992 u32 stbc, nsts_su; 993 994 rxd_attention = ath10k_htt_rx_desc_get_attention(hw, rxd); 995 rxd_mpdu_start = ath10k_htt_rx_desc_get_mpdu_start(hw, rxd); 996 rxd_mpdu_end = ath10k_htt_rx_desc_get_mpdu_end(hw, rxd); 997 rxd_msdu_start_common = ath10k_htt_rx_desc_get_msdu_start(hw, rxd); 998 rxd_msdu_end_common = ath10k_htt_rx_desc_get_msdu_end(hw, rxd); 999 rxd_ppdu_start = ath10k_htt_rx_desc_get_ppdu_start(hw, rxd); 1000 rxd_msdu_payload = ath10k_htt_rx_desc_get_msdu_payload(hw, rxd); 1001 1002 info1 = __le32_to_cpu(rxd_ppdu_start->info1); 1003 info2 = __le32_to_cpu(rxd_ppdu_start->info2); 1004 info3 = __le32_to_cpu(rxd_ppdu_start->info3); 1005 1006 preamble = MS(info1, RX_PPDU_START_INFO1_PREAMBLE_TYPE); 1007 1008 switch (preamble) { 1009 case HTT_RX_LEGACY: 1010 /* To get legacy rate index band is required. Since band can't 1011 * be undefined check if freq is non-zero. 1012 */ 1013 if (!status->freq) 1014 return; 1015 1016 cck = info1 & RX_PPDU_START_INFO1_L_SIG_RATE_SELECT; 1017 rate = MS(info1, RX_PPDU_START_INFO1_L_SIG_RATE); 1018 rate &= ~RX_PPDU_START_RATE_FLAG; 1019 1020 sband = &ar->mac.sbands[status->band]; 1021 status->rate_idx = ath10k_mac_hw_rate_to_idx(sband, rate, cck); 1022 break; 1023 case HTT_RX_HT: 1024 case HTT_RX_HT_WITH_TXBF: 1025 /* HT-SIG - Table 20-11 in info2 and info3 */ 1026 mcs = info2 & 0x1F; 1027 nss = mcs >> 3; 1028 bw = (info2 >> 7) & 1; 1029 sgi = (info3 >> 7) & 1; 1030 1031 status->rate_idx = mcs; 1032 status->encoding = RX_ENC_HT; 1033 if (sgi) 1034 status->enc_flags |= RX_ENC_FLAG_SHORT_GI; 1035 if (bw) 1036 status->bw = RATE_INFO_BW_40; 1037 break; 1038 case HTT_RX_VHT: 1039 case HTT_RX_VHT_WITH_TXBF: 1040 /* VHT-SIG-A1 in info2, VHT-SIG-A2 in info3 1041 * TODO check this 1042 */ 1043 bw = info2 & 3; 1044 sgi = info3 & 1; 1045 stbc = (info2 >> 3) & 1; 1046 group_id = (info2 >> 4) & 0x3F; 1047 1048 if (GROUP_ID_IS_SU_MIMO(group_id)) { 1049 mcs = (info3 >> 4) & 0x0F; 1050 nsts_su = ((info2 >> 10) & 0x07); 1051 if (stbc) 1052 nss = (nsts_su >> 2) + 1; 1053 else 1054 nss = (nsts_su + 1); 1055 } else { 1056 /* Hardware doesn't decode VHT-SIG-B into Rx descriptor 1057 * so it's impossible to decode MCS. Also since 1058 * firmware consumes Group Id Management frames host 1059 * has no knowledge regarding group/user position 1060 * mapping so it's impossible to pick the correct Nsts 1061 * from VHT-SIG-A1. 1062 * 1063 * Bandwidth and SGI are valid so report the rateinfo 1064 * on best-effort basis. 1065 */ 1066 mcs = 0; 1067 nss = 1; 1068 } 1069 1070 if (mcs > 0x09) { 1071 ath10k_warn(ar, "invalid MCS received %u\n", mcs); 1072 ath10k_warn(ar, "rxd %08x mpdu start %08x %08x msdu start %08x %08x ppdu start %08x %08x %08x %08x %08x\n", 1073 __le32_to_cpu(rxd_attention->flags), 1074 __le32_to_cpu(rxd_mpdu_start->info0), 1075 __le32_to_cpu(rxd_mpdu_start->info1), 1076 __le32_to_cpu(rxd_msdu_start_common->info0), 1077 __le32_to_cpu(rxd_msdu_start_common->info1), 1078 rxd_ppdu_start->info0, 1079 __le32_to_cpu(rxd_ppdu_start->info1), 1080 __le32_to_cpu(rxd_ppdu_start->info2), 1081 __le32_to_cpu(rxd_ppdu_start->info3), 1082 __le32_to_cpu(rxd_ppdu_start->info4)); 1083 1084 ath10k_warn(ar, "msdu end %08x mpdu end %08x\n", 1085 __le32_to_cpu(rxd_msdu_end_common->info0), 1086 __le32_to_cpu(rxd_mpdu_end->info0)); 1087 1088 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, 1089 "rx desc msdu payload: ", 1090 rxd_msdu_payload, 50); 1091 } 1092 1093 status->rate_idx = mcs; 1094 status->nss = nss; 1095 1096 if (sgi) 1097 status->enc_flags |= RX_ENC_FLAG_SHORT_GI; 1098 1099 status->bw = ath10k_bw_to_mac80211_bw(bw); 1100 status->encoding = RX_ENC_VHT; 1101 break; 1102 default: 1103 break; 1104 } 1105 } 1106 1107 static struct ieee80211_channel * 1108 ath10k_htt_rx_h_peer_channel(struct ath10k *ar, struct htt_rx_desc *rxd) 1109 { 1110 struct ath10k_hw_params *hw = &ar->hw_params; 1111 struct rx_attention *rxd_attention; 1112 struct rx_msdu_end_common *rxd_msdu_end_common; 1113 struct rx_mpdu_start *rxd_mpdu_start; 1114 struct ath10k_peer *peer; 1115 struct ath10k_vif *arvif; 1116 struct cfg80211_chan_def def; 1117 u16 peer_id; 1118 1119 lockdep_assert_held(&ar->data_lock); 1120 1121 if (!rxd) 1122 return NULL; 1123 1124 rxd_attention = ath10k_htt_rx_desc_get_attention(hw, rxd); 1125 rxd_msdu_end_common = ath10k_htt_rx_desc_get_msdu_end(hw, rxd); 1126 rxd_mpdu_start = ath10k_htt_rx_desc_get_mpdu_start(hw, rxd); 1127 1128 if (rxd_attention->flags & 1129 __cpu_to_le32(RX_ATTENTION_FLAGS_PEER_IDX_INVALID)) 1130 return NULL; 1131 1132 if (!(rxd_msdu_end_common->info0 & 1133 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU))) 1134 return NULL; 1135 1136 peer_id = MS(__le32_to_cpu(rxd_mpdu_start->info0), 1137 RX_MPDU_START_INFO0_PEER_IDX); 1138 1139 peer = ath10k_peer_find_by_id(ar, peer_id); 1140 if (!peer) 1141 return NULL; 1142 1143 arvif = ath10k_get_arvif(ar, peer->vdev_id); 1144 if (WARN_ON_ONCE(!arvif)) 1145 return NULL; 1146 1147 if (ath10k_mac_vif_chan(arvif->vif, &def)) 1148 return NULL; 1149 1150 return def.chan; 1151 } 1152 1153 static struct ieee80211_channel * 1154 ath10k_htt_rx_h_vdev_channel(struct ath10k *ar, u32 vdev_id) 1155 { 1156 struct ath10k_vif *arvif; 1157 struct cfg80211_chan_def def; 1158 1159 lockdep_assert_held(&ar->data_lock); 1160 1161 list_for_each_entry(arvif, &ar->arvifs, list) { 1162 if (arvif->vdev_id == vdev_id && 1163 ath10k_mac_vif_chan(arvif->vif, &def) == 0) 1164 return def.chan; 1165 } 1166 1167 return NULL; 1168 } 1169 1170 static void 1171 ath10k_htt_rx_h_any_chan_iter(struct ieee80211_hw *hw, 1172 struct ieee80211_chanctx_conf *conf, 1173 void *data) 1174 { 1175 struct cfg80211_chan_def *def = data; 1176 1177 *def = conf->def; 1178 } 1179 1180 static struct ieee80211_channel * 1181 ath10k_htt_rx_h_any_channel(struct ath10k *ar) 1182 { 1183 struct cfg80211_chan_def def = {}; 1184 1185 ieee80211_iter_chan_contexts_atomic(ar->hw, 1186 ath10k_htt_rx_h_any_chan_iter, 1187 &def); 1188 1189 return def.chan; 1190 } 1191 1192 static bool ath10k_htt_rx_h_channel(struct ath10k *ar, 1193 struct ieee80211_rx_status *status, 1194 struct htt_rx_desc *rxd, 1195 u32 vdev_id) 1196 { 1197 struct ieee80211_channel *ch; 1198 1199 spin_lock_bh(&ar->data_lock); 1200 ch = ar->scan_channel; 1201 if (!ch) 1202 ch = ar->rx_channel; 1203 if (!ch) 1204 ch = ath10k_htt_rx_h_peer_channel(ar, rxd); 1205 if (!ch) 1206 ch = ath10k_htt_rx_h_vdev_channel(ar, vdev_id); 1207 if (!ch) 1208 ch = ath10k_htt_rx_h_any_channel(ar); 1209 if (!ch) 1210 ch = ar->tgt_oper_chan; 1211 spin_unlock_bh(&ar->data_lock); 1212 1213 if (!ch) 1214 return false; 1215 1216 status->band = ch->band; 1217 status->freq = ch->center_freq; 1218 1219 return true; 1220 } 1221 1222 static void ath10k_htt_rx_h_signal(struct ath10k *ar, 1223 struct ieee80211_rx_status *status, 1224 struct htt_rx_desc *rxd) 1225 { 1226 struct ath10k_hw_params *hw = &ar->hw_params; 1227 struct rx_ppdu_start *rxd_ppdu_start = ath10k_htt_rx_desc_get_ppdu_start(hw, rxd); 1228 int i; 1229 1230 for (i = 0; i < IEEE80211_MAX_CHAINS ; i++) { 1231 status->chains &= ~BIT(i); 1232 1233 if (rxd_ppdu_start->rssi_chains[i].pri20_mhz != 0x80) { 1234 status->chain_signal[i] = ATH10K_DEFAULT_NOISE_FLOOR + 1235 rxd_ppdu_start->rssi_chains[i].pri20_mhz; 1236 1237 status->chains |= BIT(i); 1238 } 1239 } 1240 1241 /* FIXME: Get real NF */ 1242 status->signal = ATH10K_DEFAULT_NOISE_FLOOR + 1243 rxd_ppdu_start->rssi_comb; 1244 status->flag &= ~RX_FLAG_NO_SIGNAL_VAL; 1245 } 1246 1247 static void ath10k_htt_rx_h_mactime(struct ath10k *ar, 1248 struct ieee80211_rx_status *status, 1249 struct htt_rx_desc *rxd) 1250 { 1251 struct ath10k_hw_params *hw = &ar->hw_params; 1252 struct rx_ppdu_end_common *rxd_ppdu_end_common; 1253 1254 rxd_ppdu_end_common = ath10k_htt_rx_desc_get_ppdu_end(hw, rxd); 1255 1256 /* FIXME: TSF is known only at the end of PPDU, in the last MPDU. This 1257 * means all prior MSDUs in a PPDU are reported to mac80211 without the 1258 * TSF. Is it worth holding frames until end of PPDU is known? 1259 * 1260 * FIXME: Can we get/compute 64bit TSF? 1261 */ 1262 status->mactime = __le32_to_cpu(rxd_ppdu_end_common->tsf_timestamp); 1263 status->flag |= RX_FLAG_MACTIME_END; 1264 } 1265 1266 static void ath10k_htt_rx_h_ppdu(struct ath10k *ar, 1267 struct sk_buff_head *amsdu, 1268 struct ieee80211_rx_status *status, 1269 u32 vdev_id) 1270 { 1271 struct sk_buff *first; 1272 struct ath10k_hw_params *hw = &ar->hw_params; 1273 struct htt_rx_desc *rxd; 1274 struct rx_attention *rxd_attention; 1275 bool is_first_ppdu; 1276 bool is_last_ppdu; 1277 1278 if (skb_queue_empty(amsdu)) 1279 return; 1280 1281 first = skb_peek(amsdu); 1282 rxd = HTT_RX_BUF_TO_RX_DESC(hw, 1283 (void *)first->data - hw->rx_desc_ops->rx_desc_size); 1284 1285 rxd_attention = ath10k_htt_rx_desc_get_attention(hw, rxd); 1286 1287 is_first_ppdu = !!(rxd_attention->flags & 1288 __cpu_to_le32(RX_ATTENTION_FLAGS_FIRST_MPDU)); 1289 is_last_ppdu = !!(rxd_attention->flags & 1290 __cpu_to_le32(RX_ATTENTION_FLAGS_LAST_MPDU)); 1291 1292 if (is_first_ppdu) { 1293 /* New PPDU starts so clear out the old per-PPDU status. */ 1294 status->freq = 0; 1295 status->rate_idx = 0; 1296 status->nss = 0; 1297 status->encoding = RX_ENC_LEGACY; 1298 status->bw = RATE_INFO_BW_20; 1299 1300 status->flag &= ~RX_FLAG_MACTIME; 1301 status->flag |= RX_FLAG_NO_SIGNAL_VAL; 1302 1303 status->flag &= ~(RX_FLAG_AMPDU_IS_LAST); 1304 status->flag |= RX_FLAG_AMPDU_DETAILS | RX_FLAG_AMPDU_LAST_KNOWN; 1305 status->ampdu_reference = ar->ampdu_reference; 1306 1307 ath10k_htt_rx_h_signal(ar, status, rxd); 1308 ath10k_htt_rx_h_channel(ar, status, rxd, vdev_id); 1309 ath10k_htt_rx_h_rates(ar, status, rxd); 1310 } 1311 1312 if (is_last_ppdu) { 1313 ath10k_htt_rx_h_mactime(ar, status, rxd); 1314 1315 /* set ampdu last segment flag */ 1316 status->flag |= RX_FLAG_AMPDU_IS_LAST; 1317 ar->ampdu_reference++; 1318 } 1319 } 1320 1321 static const char * const tid_to_ac[] = { 1322 "BE", 1323 "BK", 1324 "BK", 1325 "BE", 1326 "VI", 1327 "VI", 1328 "VO", 1329 "VO", 1330 }; 1331 1332 static char *ath10k_get_tid(struct ieee80211_hdr *hdr, char *out, size_t size) 1333 { 1334 u8 *qc; 1335 int tid; 1336 1337 if (!ieee80211_is_data_qos(hdr->frame_control)) 1338 return ""; 1339 1340 qc = ieee80211_get_qos_ctl(hdr); 1341 tid = *qc & IEEE80211_QOS_CTL_TID_MASK; 1342 if (tid < 8) 1343 snprintf(out, size, "tid %d (%s)", tid, tid_to_ac[tid]); 1344 else 1345 snprintf(out, size, "tid %d", tid); 1346 1347 return out; 1348 } 1349 1350 static void ath10k_htt_rx_h_queue_msdu(struct ath10k *ar, 1351 struct ieee80211_rx_status *rx_status, 1352 struct sk_buff *skb) 1353 { 1354 struct ieee80211_rx_status *status; 1355 1356 status = IEEE80211_SKB_RXCB(skb); 1357 *status = *rx_status; 1358 1359 skb_queue_tail(&ar->htt.rx_msdus_q, skb); 1360 } 1361 1362 static void ath10k_process_rx(struct ath10k *ar, struct sk_buff *skb) 1363 { 1364 struct ieee80211_rx_status *status; 1365 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 1366 char tid[32]; 1367 1368 status = IEEE80211_SKB_RXCB(skb); 1369 1370 if (!(ar->filter_flags & FIF_FCSFAIL) && 1371 status->flag & RX_FLAG_FAILED_FCS_CRC) { 1372 ar->stats.rx_crc_err_drop++; 1373 dev_kfree_skb_any(skb); 1374 return; 1375 } 1376 1377 ath10k_dbg(ar, ATH10K_DBG_DATA, 1378 "rx skb %p len %u peer %pM %s %s sn %u %s%s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %i mic-err %i amsdu-more %i\n", 1379 skb, 1380 skb->len, 1381 ieee80211_get_SA(hdr), 1382 ath10k_get_tid(hdr, tid, sizeof(tid)), 1383 is_multicast_ether_addr(ieee80211_get_DA(hdr)) ? 1384 "mcast" : "ucast", 1385 IEEE80211_SEQ_TO_SN(__le16_to_cpu(hdr->seq_ctrl)), 1386 (status->encoding == RX_ENC_LEGACY) ? "legacy" : "", 1387 (status->encoding == RX_ENC_HT) ? "ht" : "", 1388 (status->encoding == RX_ENC_VHT) ? "vht" : "", 1389 (status->bw == RATE_INFO_BW_40) ? "40" : "", 1390 (status->bw == RATE_INFO_BW_80) ? "80" : "", 1391 (status->bw == RATE_INFO_BW_160) ? "160" : "", 1392 status->enc_flags & RX_ENC_FLAG_SHORT_GI ? "sgi " : "", 1393 status->rate_idx, 1394 status->nss, 1395 status->freq, 1396 status->band, status->flag, 1397 !!(status->flag & RX_FLAG_FAILED_FCS_CRC), 1398 !!(status->flag & RX_FLAG_MMIC_ERROR), 1399 !!(status->flag & RX_FLAG_AMSDU_MORE)); 1400 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ", 1401 skb->data, skb->len); 1402 trace_ath10k_rx_hdr(ar, skb->data, skb->len); 1403 trace_ath10k_rx_payload(ar, skb->data, skb->len); 1404 1405 ieee80211_rx_napi(ar->hw, NULL, skb, &ar->napi); 1406 } 1407 1408 static int ath10k_htt_rx_nwifi_hdrlen(struct ath10k *ar, 1409 struct ieee80211_hdr *hdr) 1410 { 1411 int len = ieee80211_hdrlen(hdr->frame_control); 1412 1413 if (!test_bit(ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING, 1414 ar->running_fw->fw_file.fw_features)) 1415 len = round_up(len, 4); 1416 1417 return len; 1418 } 1419 1420 static void ath10k_htt_rx_h_undecap_raw(struct ath10k *ar, 1421 struct sk_buff *msdu, 1422 struct ieee80211_rx_status *status, 1423 enum htt_rx_mpdu_encrypt_type enctype, 1424 bool is_decrypted, 1425 const u8 first_hdr[64]) 1426 { 1427 struct ieee80211_hdr *hdr; 1428 struct ath10k_hw_params *hw = &ar->hw_params; 1429 struct htt_rx_desc *rxd; 1430 struct rx_msdu_end_common *rxd_msdu_end_common; 1431 size_t hdr_len; 1432 size_t crypto_len; 1433 bool is_first; 1434 bool is_last; 1435 bool msdu_limit_err; 1436 int bytes_aligned = ar->hw_params.decap_align_bytes; 1437 u8 *qos; 1438 1439 rxd = HTT_RX_BUF_TO_RX_DESC(hw, 1440 (void *)msdu->data - hw->rx_desc_ops->rx_desc_size); 1441 1442 rxd_msdu_end_common = ath10k_htt_rx_desc_get_msdu_end(hw, rxd); 1443 is_first = !!(rxd_msdu_end_common->info0 & 1444 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU)); 1445 is_last = !!(rxd_msdu_end_common->info0 & 1446 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU)); 1447 1448 /* Delivered decapped frame: 1449 * [802.11 header] 1450 * [crypto param] <-- can be trimmed if !fcs_err && 1451 * !decrypt_err && !peer_idx_invalid 1452 * [amsdu header] <-- only if A-MSDU 1453 * [rfc1042/llc] 1454 * [payload] 1455 * [FCS] <-- at end, needs to be trimmed 1456 */ 1457 1458 /* Some hardwares(QCA99x0 variants) limit number of msdus in a-msdu when 1459 * deaggregate, so that unwanted MSDU-deaggregation is avoided for 1460 * error packets. If limit exceeds, hw sends all remaining MSDUs as 1461 * a single last MSDU with this msdu limit error set. 1462 */ 1463 msdu_limit_err = ath10k_htt_rx_desc_msdu_limit_error(hw, rxd); 1464 1465 /* If MSDU limit error happens, then don't warn on, the partial raw MSDU 1466 * without first MSDU is expected in that case, and handled later here. 1467 */ 1468 /* This probably shouldn't happen but warn just in case */ 1469 if (WARN_ON_ONCE(!is_first && !msdu_limit_err)) 1470 return; 1471 1472 /* This probably shouldn't happen but warn just in case */ 1473 if (WARN_ON_ONCE(!(is_first && is_last) && !msdu_limit_err)) 1474 return; 1475 1476 skb_trim(msdu, msdu->len - FCS_LEN); 1477 1478 /* Push original 80211 header */ 1479 if (unlikely(msdu_limit_err)) { 1480 hdr = (struct ieee80211_hdr *)first_hdr; 1481 hdr_len = ieee80211_hdrlen(hdr->frame_control); 1482 crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype); 1483 1484 if (ieee80211_is_data_qos(hdr->frame_control)) { 1485 qos = ieee80211_get_qos_ctl(hdr); 1486 qos[0] |= IEEE80211_QOS_CTL_A_MSDU_PRESENT; 1487 } 1488 1489 if (crypto_len) 1490 memcpy(skb_push(msdu, crypto_len), 1491 (void *)hdr + round_up(hdr_len, bytes_aligned), 1492 crypto_len); 1493 1494 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len); 1495 } 1496 1497 /* In most cases this will be true for sniffed frames. It makes sense 1498 * to deliver them as-is without stripping the crypto param. This is 1499 * necessary for software based decryption. 1500 * 1501 * If there's no error then the frame is decrypted. At least that is 1502 * the case for frames that come in via fragmented rx indication. 1503 */ 1504 if (!is_decrypted) 1505 return; 1506 1507 /* The payload is decrypted so strip crypto params. Start from tail 1508 * since hdr is used to compute some stuff. 1509 */ 1510 1511 hdr = (void *)msdu->data; 1512 1513 /* Tail */ 1514 if (status->flag & RX_FLAG_IV_STRIPPED) { 1515 skb_trim(msdu, msdu->len - 1516 ath10k_htt_rx_crypto_mic_len(ar, enctype)); 1517 1518 skb_trim(msdu, msdu->len - 1519 ath10k_htt_rx_crypto_icv_len(ar, enctype)); 1520 } else { 1521 /* MIC */ 1522 if (status->flag & RX_FLAG_MIC_STRIPPED) 1523 skb_trim(msdu, msdu->len - 1524 ath10k_htt_rx_crypto_mic_len(ar, enctype)); 1525 1526 /* ICV */ 1527 if (status->flag & RX_FLAG_ICV_STRIPPED) 1528 skb_trim(msdu, msdu->len - 1529 ath10k_htt_rx_crypto_icv_len(ar, enctype)); 1530 } 1531 1532 /* MMIC */ 1533 if ((status->flag & RX_FLAG_MMIC_STRIPPED) && 1534 !ieee80211_has_morefrags(hdr->frame_control) && 1535 enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA) 1536 skb_trim(msdu, msdu->len - MICHAEL_MIC_LEN); 1537 1538 /* Head */ 1539 if (status->flag & RX_FLAG_IV_STRIPPED) { 1540 hdr_len = ieee80211_hdrlen(hdr->frame_control); 1541 crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype); 1542 1543 memmove((void *)msdu->data + crypto_len, 1544 (void *)msdu->data, hdr_len); 1545 skb_pull(msdu, crypto_len); 1546 } 1547 } 1548 1549 static void ath10k_htt_rx_h_undecap_nwifi(struct ath10k *ar, 1550 struct sk_buff *msdu, 1551 struct ieee80211_rx_status *status, 1552 const u8 first_hdr[64], 1553 enum htt_rx_mpdu_encrypt_type enctype) 1554 { 1555 struct ath10k_hw_params *hw = &ar->hw_params; 1556 struct ieee80211_hdr *hdr; 1557 struct htt_rx_desc *rxd; 1558 size_t hdr_len; 1559 u8 da[ETH_ALEN]; 1560 u8 sa[ETH_ALEN]; 1561 int l3_pad_bytes; 1562 int bytes_aligned = ar->hw_params.decap_align_bytes; 1563 1564 /* Delivered decapped frame: 1565 * [nwifi 802.11 header] <-- replaced with 802.11 hdr 1566 * [rfc1042/llc] 1567 * 1568 * Note: The nwifi header doesn't have QoS Control and is 1569 * (always?) a 3addr frame. 1570 * 1571 * Note2: There's no A-MSDU subframe header. Even if it's part 1572 * of an A-MSDU. 1573 */ 1574 1575 /* pull decapped header and copy SA & DA */ 1576 rxd = HTT_RX_BUF_TO_RX_DESC(hw, (void *)msdu->data - 1577 hw->rx_desc_ops->rx_desc_size); 1578 1579 l3_pad_bytes = ath10k_htt_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd); 1580 skb_put(msdu, l3_pad_bytes); 1581 1582 hdr = (struct ieee80211_hdr *)(msdu->data + l3_pad_bytes); 1583 1584 hdr_len = ath10k_htt_rx_nwifi_hdrlen(ar, hdr); 1585 ether_addr_copy(da, ieee80211_get_DA(hdr)); 1586 ether_addr_copy(sa, ieee80211_get_SA(hdr)); 1587 skb_pull(msdu, hdr_len); 1588 1589 /* push original 802.11 header */ 1590 hdr = (struct ieee80211_hdr *)first_hdr; 1591 hdr_len = ieee80211_hdrlen(hdr->frame_control); 1592 1593 if (!(status->flag & RX_FLAG_IV_STRIPPED)) { 1594 memcpy(skb_push(msdu, 1595 ath10k_htt_rx_crypto_param_len(ar, enctype)), 1596 (void *)hdr + round_up(hdr_len, bytes_aligned), 1597 ath10k_htt_rx_crypto_param_len(ar, enctype)); 1598 } 1599 1600 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len); 1601 1602 /* original 802.11 header has a different DA and in 1603 * case of 4addr it may also have different SA 1604 */ 1605 hdr = (struct ieee80211_hdr *)msdu->data; 1606 ether_addr_copy(ieee80211_get_DA(hdr), da); 1607 ether_addr_copy(ieee80211_get_SA(hdr), sa); 1608 } 1609 1610 static void *ath10k_htt_rx_h_find_rfc1042(struct ath10k *ar, 1611 struct sk_buff *msdu, 1612 enum htt_rx_mpdu_encrypt_type enctype) 1613 { 1614 struct ieee80211_hdr *hdr; 1615 struct ath10k_hw_params *hw = &ar->hw_params; 1616 struct htt_rx_desc *rxd; 1617 struct rx_msdu_end_common *rxd_msdu_end_common; 1618 u8 *rxd_rx_hdr_status; 1619 size_t hdr_len, crypto_len; 1620 void *rfc1042; 1621 bool is_first, is_last, is_amsdu; 1622 int bytes_aligned = ar->hw_params.decap_align_bytes; 1623 1624 rxd = HTT_RX_BUF_TO_RX_DESC(hw, 1625 (void *)msdu->data - hw->rx_desc_ops->rx_desc_size); 1626 1627 rxd_msdu_end_common = ath10k_htt_rx_desc_get_msdu_end(hw, rxd); 1628 rxd_rx_hdr_status = ath10k_htt_rx_desc_get_rx_hdr_status(hw, rxd); 1629 hdr = (void *)rxd_rx_hdr_status; 1630 1631 is_first = !!(rxd_msdu_end_common->info0 & 1632 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU)); 1633 is_last = !!(rxd_msdu_end_common->info0 & 1634 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU)); 1635 is_amsdu = !(is_first && is_last); 1636 1637 rfc1042 = hdr; 1638 1639 if (is_first) { 1640 hdr_len = ieee80211_hdrlen(hdr->frame_control); 1641 crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype); 1642 1643 rfc1042 += round_up(hdr_len, bytes_aligned) + 1644 round_up(crypto_len, bytes_aligned); 1645 } 1646 1647 if (is_amsdu) 1648 rfc1042 += sizeof(struct amsdu_subframe_hdr); 1649 1650 return rfc1042; 1651 } 1652 1653 static void ath10k_htt_rx_h_undecap_eth(struct ath10k *ar, 1654 struct sk_buff *msdu, 1655 struct ieee80211_rx_status *status, 1656 const u8 first_hdr[64], 1657 enum htt_rx_mpdu_encrypt_type enctype) 1658 { 1659 struct ath10k_hw_params *hw = &ar->hw_params; 1660 struct ieee80211_hdr *hdr; 1661 struct ethhdr *eth; 1662 size_t hdr_len; 1663 void *rfc1042; 1664 u8 da[ETH_ALEN]; 1665 u8 sa[ETH_ALEN]; 1666 int l3_pad_bytes; 1667 struct htt_rx_desc *rxd; 1668 int bytes_aligned = ar->hw_params.decap_align_bytes; 1669 1670 /* Delivered decapped frame: 1671 * [eth header] <-- replaced with 802.11 hdr & rfc1042/llc 1672 * [payload] 1673 */ 1674 1675 rfc1042 = ath10k_htt_rx_h_find_rfc1042(ar, msdu, enctype); 1676 if (WARN_ON_ONCE(!rfc1042)) 1677 return; 1678 1679 rxd = HTT_RX_BUF_TO_RX_DESC(hw, 1680 (void *)msdu->data - hw->rx_desc_ops->rx_desc_size); 1681 1682 l3_pad_bytes = ath10k_htt_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd); 1683 skb_put(msdu, l3_pad_bytes); 1684 skb_pull(msdu, l3_pad_bytes); 1685 1686 /* pull decapped header and copy SA & DA */ 1687 eth = (struct ethhdr *)msdu->data; 1688 ether_addr_copy(da, eth->h_dest); 1689 ether_addr_copy(sa, eth->h_source); 1690 skb_pull(msdu, sizeof(struct ethhdr)); 1691 1692 /* push rfc1042/llc/snap */ 1693 memcpy(skb_push(msdu, sizeof(struct rfc1042_hdr)), rfc1042, 1694 sizeof(struct rfc1042_hdr)); 1695 1696 /* push original 802.11 header */ 1697 hdr = (struct ieee80211_hdr *)first_hdr; 1698 hdr_len = ieee80211_hdrlen(hdr->frame_control); 1699 1700 if (!(status->flag & RX_FLAG_IV_STRIPPED)) { 1701 memcpy(skb_push(msdu, 1702 ath10k_htt_rx_crypto_param_len(ar, enctype)), 1703 (void *)hdr + round_up(hdr_len, bytes_aligned), 1704 ath10k_htt_rx_crypto_param_len(ar, enctype)); 1705 } 1706 1707 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len); 1708 1709 /* original 802.11 header has a different DA and in 1710 * case of 4addr it may also have different SA 1711 */ 1712 hdr = (struct ieee80211_hdr *)msdu->data; 1713 ether_addr_copy(ieee80211_get_DA(hdr), da); 1714 ether_addr_copy(ieee80211_get_SA(hdr), sa); 1715 } 1716 1717 static void ath10k_htt_rx_h_undecap_snap(struct ath10k *ar, 1718 struct sk_buff *msdu, 1719 struct ieee80211_rx_status *status, 1720 const u8 first_hdr[64], 1721 enum htt_rx_mpdu_encrypt_type enctype) 1722 { 1723 struct ath10k_hw_params *hw = &ar->hw_params; 1724 struct ieee80211_hdr *hdr; 1725 size_t hdr_len; 1726 int l3_pad_bytes; 1727 struct htt_rx_desc *rxd; 1728 int bytes_aligned = ar->hw_params.decap_align_bytes; 1729 1730 /* Delivered decapped frame: 1731 * [amsdu header] <-- replaced with 802.11 hdr 1732 * [rfc1042/llc] 1733 * [payload] 1734 */ 1735 1736 rxd = HTT_RX_BUF_TO_RX_DESC(hw, 1737 (void *)msdu->data - hw->rx_desc_ops->rx_desc_size); 1738 1739 l3_pad_bytes = ath10k_htt_rx_desc_get_l3_pad_bytes(&ar->hw_params, rxd); 1740 1741 skb_put(msdu, l3_pad_bytes); 1742 skb_pull(msdu, sizeof(struct amsdu_subframe_hdr) + l3_pad_bytes); 1743 1744 hdr = (struct ieee80211_hdr *)first_hdr; 1745 hdr_len = ieee80211_hdrlen(hdr->frame_control); 1746 1747 if (!(status->flag & RX_FLAG_IV_STRIPPED)) { 1748 memcpy(skb_push(msdu, 1749 ath10k_htt_rx_crypto_param_len(ar, enctype)), 1750 (void *)hdr + round_up(hdr_len, bytes_aligned), 1751 ath10k_htt_rx_crypto_param_len(ar, enctype)); 1752 } 1753 1754 memcpy(skb_push(msdu, hdr_len), hdr, hdr_len); 1755 } 1756 1757 static void ath10k_htt_rx_h_undecap(struct ath10k *ar, 1758 struct sk_buff *msdu, 1759 struct ieee80211_rx_status *status, 1760 u8 first_hdr[64], 1761 enum htt_rx_mpdu_encrypt_type enctype, 1762 bool is_decrypted) 1763 { 1764 struct ath10k_hw_params *hw = &ar->hw_params; 1765 struct htt_rx_desc *rxd; 1766 struct rx_msdu_start_common *rxd_msdu_start_common; 1767 enum rx_msdu_decap_format decap; 1768 1769 /* First msdu's decapped header: 1770 * [802.11 header] <-- padded to 4 bytes long 1771 * [crypto param] <-- padded to 4 bytes long 1772 * [amsdu header] <-- only if A-MSDU 1773 * [rfc1042/llc] 1774 * 1775 * Other (2nd, 3rd, ..) msdu's decapped header: 1776 * [amsdu header] <-- only if A-MSDU 1777 * [rfc1042/llc] 1778 */ 1779 1780 rxd = HTT_RX_BUF_TO_RX_DESC(hw, 1781 (void *)msdu->data - hw->rx_desc_ops->rx_desc_size); 1782 1783 rxd_msdu_start_common = ath10k_htt_rx_desc_get_msdu_start(hw, rxd); 1784 decap = MS(__le32_to_cpu(rxd_msdu_start_common->info1), 1785 RX_MSDU_START_INFO1_DECAP_FORMAT); 1786 1787 switch (decap) { 1788 case RX_MSDU_DECAP_RAW: 1789 ath10k_htt_rx_h_undecap_raw(ar, msdu, status, enctype, 1790 is_decrypted, first_hdr); 1791 break; 1792 case RX_MSDU_DECAP_NATIVE_WIFI: 1793 ath10k_htt_rx_h_undecap_nwifi(ar, msdu, status, first_hdr, 1794 enctype); 1795 break; 1796 case RX_MSDU_DECAP_ETHERNET2_DIX: 1797 ath10k_htt_rx_h_undecap_eth(ar, msdu, status, first_hdr, enctype); 1798 break; 1799 case RX_MSDU_DECAP_8023_SNAP_LLC: 1800 ath10k_htt_rx_h_undecap_snap(ar, msdu, status, first_hdr, 1801 enctype); 1802 break; 1803 } 1804 } 1805 1806 static int ath10k_htt_rx_get_csum_state(struct ath10k_hw_params *hw, struct sk_buff *skb) 1807 { 1808 struct htt_rx_desc *rxd; 1809 struct rx_attention *rxd_attention; 1810 struct rx_msdu_start_common *rxd_msdu_start_common; 1811 u32 flags, info; 1812 bool is_ip4, is_ip6; 1813 bool is_tcp, is_udp; 1814 bool ip_csum_ok, tcpudp_csum_ok; 1815 1816 rxd = HTT_RX_BUF_TO_RX_DESC(hw, 1817 (void *)skb->data - hw->rx_desc_ops->rx_desc_size); 1818 1819 rxd_attention = ath10k_htt_rx_desc_get_attention(hw, rxd); 1820 rxd_msdu_start_common = ath10k_htt_rx_desc_get_msdu_start(hw, rxd); 1821 flags = __le32_to_cpu(rxd_attention->flags); 1822 info = __le32_to_cpu(rxd_msdu_start_common->info1); 1823 1824 is_ip4 = !!(info & RX_MSDU_START_INFO1_IPV4_PROTO); 1825 is_ip6 = !!(info & RX_MSDU_START_INFO1_IPV6_PROTO); 1826 is_tcp = !!(info & RX_MSDU_START_INFO1_TCP_PROTO); 1827 is_udp = !!(info & RX_MSDU_START_INFO1_UDP_PROTO); 1828 ip_csum_ok = !(flags & RX_ATTENTION_FLAGS_IP_CHKSUM_FAIL); 1829 tcpudp_csum_ok = !(flags & RX_ATTENTION_FLAGS_TCP_UDP_CHKSUM_FAIL); 1830 1831 if (!is_ip4 && !is_ip6) 1832 return CHECKSUM_NONE; 1833 if (!is_tcp && !is_udp) 1834 return CHECKSUM_NONE; 1835 if (!ip_csum_ok) 1836 return CHECKSUM_NONE; 1837 if (!tcpudp_csum_ok) 1838 return CHECKSUM_NONE; 1839 1840 return CHECKSUM_UNNECESSARY; 1841 } 1842 1843 static void ath10k_htt_rx_h_csum_offload(struct ath10k_hw_params *hw, 1844 struct sk_buff *msdu) 1845 { 1846 msdu->ip_summed = ath10k_htt_rx_get_csum_state(hw, msdu); 1847 } 1848 1849 static u64 ath10k_htt_rx_h_get_pn(struct ath10k *ar, struct sk_buff *skb, 1850 enum htt_rx_mpdu_encrypt_type enctype) 1851 { 1852 struct ieee80211_hdr *hdr; 1853 u64 pn = 0; 1854 u8 *ehdr; 1855 1856 hdr = (struct ieee80211_hdr *)skb->data; 1857 ehdr = skb->data + ieee80211_hdrlen(hdr->frame_control); 1858 1859 if (enctype == HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2) { 1860 pn = ehdr[0]; 1861 pn |= (u64)ehdr[1] << 8; 1862 pn |= (u64)ehdr[4] << 16; 1863 pn |= (u64)ehdr[5] << 24; 1864 pn |= (u64)ehdr[6] << 32; 1865 pn |= (u64)ehdr[7] << 40; 1866 } 1867 return pn; 1868 } 1869 1870 static bool ath10k_htt_rx_h_frag_multicast_check(struct ath10k *ar, 1871 struct sk_buff *skb) 1872 { 1873 struct ieee80211_hdr *hdr; 1874 1875 hdr = (struct ieee80211_hdr *)skb->data; 1876 return !is_multicast_ether_addr(hdr->addr1); 1877 } 1878 1879 static bool ath10k_htt_rx_h_frag_pn_check(struct ath10k *ar, 1880 struct sk_buff *skb, 1881 u16 peer_id, 1882 enum htt_rx_mpdu_encrypt_type enctype) 1883 { 1884 struct ath10k_peer *peer; 1885 union htt_rx_pn_t *last_pn, new_pn = {}; 1886 struct ieee80211_hdr *hdr; 1887 u8 tid, frag_number; 1888 u32 seq; 1889 1890 peer = ath10k_peer_find_by_id(ar, peer_id); 1891 if (!peer) { 1892 ath10k_dbg(ar, ATH10K_DBG_HTT, "invalid peer for frag pn check\n"); 1893 return false; 1894 } 1895 1896 hdr = (struct ieee80211_hdr *)skb->data; 1897 if (ieee80211_is_data_qos(hdr->frame_control)) 1898 tid = ieee80211_get_tid(hdr); 1899 else 1900 tid = ATH10K_TXRX_NON_QOS_TID; 1901 1902 last_pn = &peer->frag_tids_last_pn[tid]; 1903 new_pn.pn48 = ath10k_htt_rx_h_get_pn(ar, skb, enctype); 1904 frag_number = le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG; 1905 seq = IEEE80211_SEQ_TO_SN(__le16_to_cpu(hdr->seq_ctrl)); 1906 1907 if (frag_number == 0) { 1908 last_pn->pn48 = new_pn.pn48; 1909 peer->frag_tids_seq[tid] = seq; 1910 } else { 1911 if (seq != peer->frag_tids_seq[tid]) 1912 return false; 1913 1914 if (new_pn.pn48 != last_pn->pn48 + 1) 1915 return false; 1916 1917 last_pn->pn48 = new_pn.pn48; 1918 } 1919 1920 return true; 1921 } 1922 1923 static void ath10k_htt_rx_h_mpdu(struct ath10k *ar, 1924 struct sk_buff_head *amsdu, 1925 struct ieee80211_rx_status *status, 1926 bool fill_crypt_header, 1927 u8 *rx_hdr, 1928 enum ath10k_pkt_rx_err *err, 1929 u16 peer_id, 1930 bool frag) 1931 { 1932 struct sk_buff *first; 1933 struct sk_buff *last; 1934 struct sk_buff *msdu, *temp; 1935 struct ath10k_hw_params *hw = &ar->hw_params; 1936 struct htt_rx_desc *rxd; 1937 struct rx_attention *rxd_attention; 1938 struct rx_mpdu_start *rxd_mpdu_start; 1939 1940 struct ieee80211_hdr *hdr; 1941 enum htt_rx_mpdu_encrypt_type enctype; 1942 u8 first_hdr[64]; 1943 u8 *qos; 1944 bool has_fcs_err; 1945 bool has_crypto_err; 1946 bool has_tkip_err; 1947 bool has_peer_idx_invalid; 1948 bool is_decrypted; 1949 bool is_mgmt; 1950 u32 attention; 1951 bool frag_pn_check = true, multicast_check = true; 1952 1953 if (skb_queue_empty(amsdu)) 1954 return; 1955 1956 first = skb_peek(amsdu); 1957 rxd = HTT_RX_BUF_TO_RX_DESC(hw, 1958 (void *)first->data - hw->rx_desc_ops->rx_desc_size); 1959 1960 rxd_attention = ath10k_htt_rx_desc_get_attention(hw, rxd); 1961 rxd_mpdu_start = ath10k_htt_rx_desc_get_mpdu_start(hw, rxd); 1962 1963 is_mgmt = !!(rxd_attention->flags & 1964 __cpu_to_le32(RX_ATTENTION_FLAGS_MGMT_TYPE)); 1965 1966 enctype = MS(__le32_to_cpu(rxd_mpdu_start->info0), 1967 RX_MPDU_START_INFO0_ENCRYPT_TYPE); 1968 1969 /* First MSDU's Rx descriptor in an A-MSDU contains full 802.11 1970 * decapped header. It'll be used for undecapping of each MSDU. 1971 */ 1972 hdr = (void *)ath10k_htt_rx_desc_get_rx_hdr_status(hw, rxd); 1973 memcpy(first_hdr, hdr, RX_HTT_HDR_STATUS_LEN); 1974 1975 if (rx_hdr) 1976 memcpy(rx_hdr, hdr, RX_HTT_HDR_STATUS_LEN); 1977 1978 /* Each A-MSDU subframe will use the original header as the base and be 1979 * reported as a separate MSDU so strip the A-MSDU bit from QoS Ctl. 1980 */ 1981 hdr = (void *)first_hdr; 1982 1983 if (ieee80211_is_data_qos(hdr->frame_control)) { 1984 qos = ieee80211_get_qos_ctl(hdr); 1985 qos[0] &= ~IEEE80211_QOS_CTL_A_MSDU_PRESENT; 1986 } 1987 1988 /* Some attention flags are valid only in the last MSDU. */ 1989 last = skb_peek_tail(amsdu); 1990 rxd = HTT_RX_BUF_TO_RX_DESC(hw, 1991 (void *)last->data - hw->rx_desc_ops->rx_desc_size); 1992 1993 rxd_attention = ath10k_htt_rx_desc_get_attention(hw, rxd); 1994 attention = __le32_to_cpu(rxd_attention->flags); 1995 1996 has_fcs_err = !!(attention & RX_ATTENTION_FLAGS_FCS_ERR); 1997 has_crypto_err = !!(attention & RX_ATTENTION_FLAGS_DECRYPT_ERR); 1998 has_tkip_err = !!(attention & RX_ATTENTION_FLAGS_TKIP_MIC_ERR); 1999 has_peer_idx_invalid = !!(attention & RX_ATTENTION_FLAGS_PEER_IDX_INVALID); 2000 2001 /* Note: If hardware captures an encrypted frame that it can't decrypt, 2002 * e.g. due to fcs error, missing peer or invalid key data it will 2003 * report the frame as raw. 2004 */ 2005 is_decrypted = (enctype != HTT_RX_MPDU_ENCRYPT_NONE && 2006 !has_fcs_err && 2007 !has_crypto_err && 2008 !has_peer_idx_invalid); 2009 2010 /* Clear per-MPDU flags while leaving per-PPDU flags intact. */ 2011 status->flag &= ~(RX_FLAG_FAILED_FCS_CRC | 2012 RX_FLAG_MMIC_ERROR | 2013 RX_FLAG_DECRYPTED | 2014 RX_FLAG_IV_STRIPPED | 2015 RX_FLAG_ONLY_MONITOR | 2016 RX_FLAG_MMIC_STRIPPED); 2017 2018 if (has_fcs_err) 2019 status->flag |= RX_FLAG_FAILED_FCS_CRC; 2020 2021 if (has_tkip_err) 2022 status->flag |= RX_FLAG_MMIC_ERROR; 2023 2024 if (err) { 2025 if (has_fcs_err) 2026 *err = ATH10K_PKT_RX_ERR_FCS; 2027 else if (has_tkip_err) 2028 *err = ATH10K_PKT_RX_ERR_TKIP; 2029 else if (has_crypto_err) 2030 *err = ATH10K_PKT_RX_ERR_CRYPT; 2031 else if (has_peer_idx_invalid) 2032 *err = ATH10K_PKT_RX_ERR_PEER_IDX_INVAL; 2033 } 2034 2035 /* Firmware reports all necessary management frames via WMI already. 2036 * They are not reported to monitor interfaces at all so pass the ones 2037 * coming via HTT to monitor interfaces instead. This simplifies 2038 * matters a lot. 2039 */ 2040 if (is_mgmt) 2041 status->flag |= RX_FLAG_ONLY_MONITOR; 2042 2043 if (is_decrypted) { 2044 status->flag |= RX_FLAG_DECRYPTED; 2045 2046 if (likely(!is_mgmt)) 2047 status->flag |= RX_FLAG_MMIC_STRIPPED; 2048 2049 if (fill_crypt_header) 2050 status->flag |= RX_FLAG_MIC_STRIPPED | 2051 RX_FLAG_ICV_STRIPPED; 2052 else 2053 status->flag |= RX_FLAG_IV_STRIPPED; 2054 } 2055 2056 skb_queue_walk(amsdu, msdu) { 2057 if (frag && !fill_crypt_header && is_decrypted && 2058 enctype == HTT_RX_MPDU_ENCRYPT_AES_CCM_WPA2) 2059 frag_pn_check = ath10k_htt_rx_h_frag_pn_check(ar, 2060 msdu, 2061 peer_id, 2062 enctype); 2063 2064 if (frag) 2065 multicast_check = ath10k_htt_rx_h_frag_multicast_check(ar, 2066 msdu); 2067 2068 if (!frag_pn_check || !multicast_check) { 2069 /* Discard the fragment with invalid PN or multicast DA 2070 */ 2071 temp = msdu->prev; 2072 __skb_unlink(msdu, amsdu); 2073 dev_kfree_skb_any(msdu); 2074 msdu = temp; 2075 frag_pn_check = true; 2076 multicast_check = true; 2077 continue; 2078 } 2079 2080 ath10k_htt_rx_h_csum_offload(&ar->hw_params, msdu); 2081 2082 if (frag && !fill_crypt_header && 2083 enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA) 2084 status->flag &= ~RX_FLAG_MMIC_STRIPPED; 2085 2086 ath10k_htt_rx_h_undecap(ar, msdu, status, first_hdr, enctype, 2087 is_decrypted); 2088 2089 /* Undecapping involves copying the original 802.11 header back 2090 * to sk_buff. If frame is protected and hardware has decrypted 2091 * it then remove the protected bit. 2092 */ 2093 if (!is_decrypted) 2094 continue; 2095 if (is_mgmt) 2096 continue; 2097 2098 if (fill_crypt_header) 2099 continue; 2100 2101 hdr = (void *)msdu->data; 2102 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED); 2103 2104 if (frag && !fill_crypt_header && 2105 enctype == HTT_RX_MPDU_ENCRYPT_TKIP_WPA) 2106 status->flag &= ~RX_FLAG_IV_STRIPPED & 2107 ~RX_FLAG_MMIC_STRIPPED; 2108 } 2109 } 2110 2111 static void ath10k_htt_rx_h_enqueue(struct ath10k *ar, 2112 struct sk_buff_head *amsdu, 2113 struct ieee80211_rx_status *status) 2114 { 2115 struct sk_buff *msdu; 2116 struct sk_buff *first_subframe; 2117 2118 first_subframe = skb_peek(amsdu); 2119 2120 while ((msdu = __skb_dequeue(amsdu))) { 2121 /* Setup per-MSDU flags */ 2122 if (skb_queue_empty(amsdu)) 2123 status->flag &= ~RX_FLAG_AMSDU_MORE; 2124 else 2125 status->flag |= RX_FLAG_AMSDU_MORE; 2126 2127 if (msdu == first_subframe) { 2128 first_subframe = NULL; 2129 status->flag &= ~RX_FLAG_ALLOW_SAME_PN; 2130 } else { 2131 status->flag |= RX_FLAG_ALLOW_SAME_PN; 2132 } 2133 2134 ath10k_htt_rx_h_queue_msdu(ar, status, msdu); 2135 } 2136 } 2137 2138 static int ath10k_unchain_msdu(struct sk_buff_head *amsdu, 2139 unsigned long *unchain_cnt) 2140 { 2141 struct sk_buff *skb, *first; 2142 int space; 2143 int total_len = 0; 2144 int amsdu_len = skb_queue_len(amsdu); 2145 2146 /* TODO: Might could optimize this by using 2147 * skb_try_coalesce or similar method to 2148 * decrease copying, or maybe get mac80211 to 2149 * provide a way to just receive a list of 2150 * skb? 2151 */ 2152 2153 first = __skb_dequeue(amsdu); 2154 2155 /* Allocate total length all at once. */ 2156 skb_queue_walk(amsdu, skb) 2157 total_len += skb->len; 2158 2159 space = total_len - skb_tailroom(first); 2160 if ((space > 0) && 2161 (pskb_expand_head(first, 0, space, GFP_ATOMIC) < 0)) { 2162 /* TODO: bump some rx-oom error stat */ 2163 /* put it back together so we can free the 2164 * whole list at once. 2165 */ 2166 __skb_queue_head(amsdu, first); 2167 return -1; 2168 } 2169 2170 /* Walk list again, copying contents into 2171 * msdu_head 2172 */ 2173 while ((skb = __skb_dequeue(amsdu))) { 2174 skb_copy_from_linear_data(skb, skb_put(first, skb->len), 2175 skb->len); 2176 dev_kfree_skb_any(skb); 2177 } 2178 2179 __skb_queue_head(amsdu, first); 2180 2181 *unchain_cnt += amsdu_len - 1; 2182 2183 return 0; 2184 } 2185 2186 static void ath10k_htt_rx_h_unchain(struct ath10k *ar, 2187 struct sk_buff_head *amsdu, 2188 unsigned long *drop_cnt, 2189 unsigned long *unchain_cnt) 2190 { 2191 struct sk_buff *first; 2192 struct ath10k_hw_params *hw = &ar->hw_params; 2193 struct htt_rx_desc *rxd; 2194 struct rx_msdu_start_common *rxd_msdu_start_common; 2195 struct rx_frag_info_common *rxd_frag_info; 2196 enum rx_msdu_decap_format decap; 2197 2198 first = skb_peek(amsdu); 2199 rxd = HTT_RX_BUF_TO_RX_DESC(hw, 2200 (void *)first->data - hw->rx_desc_ops->rx_desc_size); 2201 2202 rxd_msdu_start_common = ath10k_htt_rx_desc_get_msdu_start(hw, rxd); 2203 rxd_frag_info = ath10k_htt_rx_desc_get_frag_info(hw, rxd); 2204 decap = MS(__le32_to_cpu(rxd_msdu_start_common->info1), 2205 RX_MSDU_START_INFO1_DECAP_FORMAT); 2206 2207 /* FIXME: Current unchaining logic can only handle simple case of raw 2208 * msdu chaining. If decapping is other than raw the chaining may be 2209 * more complex and this isn't handled by the current code. Don't even 2210 * try re-constructing such frames - it'll be pretty much garbage. 2211 */ 2212 if (decap != RX_MSDU_DECAP_RAW || 2213 skb_queue_len(amsdu) != 1 + rxd_frag_info->ring2_more_count) { 2214 *drop_cnt += skb_queue_len(amsdu); 2215 __skb_queue_purge(amsdu); 2216 return; 2217 } 2218 2219 ath10k_unchain_msdu(amsdu, unchain_cnt); 2220 } 2221 2222 static bool ath10k_htt_rx_validate_amsdu(struct ath10k *ar, 2223 struct sk_buff_head *amsdu) 2224 { 2225 u8 *subframe_hdr; 2226 struct sk_buff *first; 2227 bool is_first, is_last; 2228 struct ath10k_hw_params *hw = &ar->hw_params; 2229 struct htt_rx_desc *rxd; 2230 struct rx_msdu_end_common *rxd_msdu_end_common; 2231 struct rx_mpdu_start *rxd_mpdu_start; 2232 struct ieee80211_hdr *hdr; 2233 size_t hdr_len, crypto_len; 2234 enum htt_rx_mpdu_encrypt_type enctype; 2235 int bytes_aligned = ar->hw_params.decap_align_bytes; 2236 2237 first = skb_peek(amsdu); 2238 2239 rxd = HTT_RX_BUF_TO_RX_DESC(hw, 2240 (void *)first->data - hw->rx_desc_ops->rx_desc_size); 2241 2242 rxd_msdu_end_common = ath10k_htt_rx_desc_get_msdu_end(hw, rxd); 2243 rxd_mpdu_start = ath10k_htt_rx_desc_get_mpdu_start(hw, rxd); 2244 hdr = (void *)ath10k_htt_rx_desc_get_rx_hdr_status(hw, rxd); 2245 2246 is_first = !!(rxd_msdu_end_common->info0 & 2247 __cpu_to_le32(RX_MSDU_END_INFO0_FIRST_MSDU)); 2248 is_last = !!(rxd_msdu_end_common->info0 & 2249 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU)); 2250 2251 /* Return in case of non-aggregated msdu */ 2252 if (is_first && is_last) 2253 return true; 2254 2255 /* First msdu flag is not set for the first msdu of the list */ 2256 if (!is_first) 2257 return false; 2258 2259 enctype = MS(__le32_to_cpu(rxd_mpdu_start->info0), 2260 RX_MPDU_START_INFO0_ENCRYPT_TYPE); 2261 2262 hdr_len = ieee80211_hdrlen(hdr->frame_control); 2263 crypto_len = ath10k_htt_rx_crypto_param_len(ar, enctype); 2264 2265 subframe_hdr = (u8 *)hdr + round_up(hdr_len, bytes_aligned) + 2266 crypto_len; 2267 2268 /* Validate if the amsdu has a proper first subframe. 2269 * There are chances a single msdu can be received as amsdu when 2270 * the unauthenticated amsdu flag of a QoS header 2271 * gets flipped in non-SPP AMSDU's, in such cases the first 2272 * subframe has llc/snap header in place of a valid da. 2273 * return false if the da matches rfc1042 pattern 2274 */ 2275 if (ether_addr_equal(subframe_hdr, rfc1042_header)) 2276 return false; 2277 2278 return true; 2279 } 2280 2281 static bool ath10k_htt_rx_amsdu_allowed(struct ath10k *ar, 2282 struct sk_buff_head *amsdu, 2283 struct ieee80211_rx_status *rx_status) 2284 { 2285 if (!rx_status->freq) { 2286 ath10k_dbg(ar, ATH10K_DBG_HTT, "no channel configured; ignoring frame(s)!\n"); 2287 return false; 2288 } 2289 2290 if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) { 2291 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx cac running\n"); 2292 return false; 2293 } 2294 2295 if (!ath10k_htt_rx_validate_amsdu(ar, amsdu)) { 2296 ath10k_dbg(ar, ATH10K_DBG_HTT, "invalid amsdu received\n"); 2297 return false; 2298 } 2299 2300 return true; 2301 } 2302 2303 static void ath10k_htt_rx_h_filter(struct ath10k *ar, 2304 struct sk_buff_head *amsdu, 2305 struct ieee80211_rx_status *rx_status, 2306 unsigned long *drop_cnt) 2307 { 2308 if (skb_queue_empty(amsdu)) 2309 return; 2310 2311 if (ath10k_htt_rx_amsdu_allowed(ar, amsdu, rx_status)) 2312 return; 2313 2314 if (drop_cnt) 2315 *drop_cnt += skb_queue_len(amsdu); 2316 2317 __skb_queue_purge(amsdu); 2318 } 2319 2320 static int ath10k_htt_rx_handle_amsdu(struct ath10k_htt *htt) 2321 { 2322 struct ath10k *ar = htt->ar; 2323 struct ieee80211_rx_status *rx_status = &htt->rx_status; 2324 struct sk_buff_head amsdu; 2325 int ret; 2326 unsigned long drop_cnt = 0; 2327 unsigned long unchain_cnt = 0; 2328 unsigned long drop_cnt_filter = 0; 2329 unsigned long msdus_to_queue, num_msdus; 2330 enum ath10k_pkt_rx_err err = ATH10K_PKT_RX_ERR_MAX; 2331 u8 first_hdr[RX_HTT_HDR_STATUS_LEN]; 2332 2333 __skb_queue_head_init(&amsdu); 2334 2335 spin_lock_bh(&htt->rx_ring.lock); 2336 if (htt->rx_confused) { 2337 spin_unlock_bh(&htt->rx_ring.lock); 2338 return -EIO; 2339 } 2340 ret = ath10k_htt_rx_amsdu_pop(htt, &amsdu); 2341 spin_unlock_bh(&htt->rx_ring.lock); 2342 2343 if (ret < 0) { 2344 ath10k_warn(ar, "rx ring became corrupted: %d\n", ret); 2345 __skb_queue_purge(&amsdu); 2346 /* FIXME: It's probably a good idea to reboot the 2347 * device instead of leaving it inoperable. 2348 */ 2349 htt->rx_confused = true; 2350 return ret; 2351 } 2352 2353 num_msdus = skb_queue_len(&amsdu); 2354 2355 ath10k_htt_rx_h_ppdu(ar, &amsdu, rx_status, 0xffff); 2356 2357 /* only for ret = 1 indicates chained msdus */ 2358 if (ret > 0) 2359 ath10k_htt_rx_h_unchain(ar, &amsdu, &drop_cnt, &unchain_cnt); 2360 2361 ath10k_htt_rx_h_filter(ar, &amsdu, rx_status, &drop_cnt_filter); 2362 ath10k_htt_rx_h_mpdu(ar, &amsdu, rx_status, true, first_hdr, &err, 0, 2363 false); 2364 msdus_to_queue = skb_queue_len(&amsdu); 2365 ath10k_htt_rx_h_enqueue(ar, &amsdu, rx_status); 2366 2367 ath10k_sta_update_rx_tid_stats(ar, first_hdr, num_msdus, err, 2368 unchain_cnt, drop_cnt, drop_cnt_filter, 2369 msdus_to_queue); 2370 2371 return 0; 2372 } 2373 2374 static void ath10k_htt_rx_mpdu_desc_pn_hl(struct htt_hl_rx_desc *rx_desc, 2375 union htt_rx_pn_t *pn, 2376 int pn_len_bits) 2377 { 2378 switch (pn_len_bits) { 2379 case 48: 2380 pn->pn48 = __le32_to_cpu(rx_desc->pn_31_0) + 2381 ((u64)(__le32_to_cpu(rx_desc->u0.pn_63_32) & 0xFFFF) << 32); 2382 break; 2383 case 24: 2384 pn->pn24 = __le32_to_cpu(rx_desc->pn_31_0); 2385 break; 2386 } 2387 } 2388 2389 static bool ath10k_htt_rx_pn_cmp48(union htt_rx_pn_t *new_pn, 2390 union htt_rx_pn_t *old_pn) 2391 { 2392 return ((new_pn->pn48 & 0xffffffffffffULL) <= 2393 (old_pn->pn48 & 0xffffffffffffULL)); 2394 } 2395 2396 static bool ath10k_htt_rx_pn_check_replay_hl(struct ath10k *ar, 2397 struct ath10k_peer *peer, 2398 struct htt_rx_indication_hl *rx) 2399 { 2400 bool last_pn_valid, pn_invalid = false; 2401 enum htt_txrx_sec_cast_type sec_index; 2402 enum htt_security_types sec_type; 2403 union htt_rx_pn_t new_pn = {}; 2404 struct htt_hl_rx_desc *rx_desc; 2405 union htt_rx_pn_t *last_pn; 2406 u32 rx_desc_info, tid; 2407 int num_mpdu_ranges; 2408 2409 lockdep_assert_held(&ar->data_lock); 2410 2411 if (!peer) 2412 return false; 2413 2414 if (!(rx->fw_desc.flags & FW_RX_DESC_FLAGS_FIRST_MSDU)) 2415 return false; 2416 2417 num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1), 2418 HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES); 2419 2420 rx_desc = (struct htt_hl_rx_desc *)&rx->mpdu_ranges[num_mpdu_ranges]; 2421 rx_desc_info = __le32_to_cpu(rx_desc->info); 2422 2423 if (!MS(rx_desc_info, HTT_RX_DESC_HL_INFO_ENCRYPTED)) 2424 return false; 2425 2426 tid = MS(rx->hdr.info0, HTT_RX_INDICATION_INFO0_EXT_TID); 2427 last_pn_valid = peer->tids_last_pn_valid[tid]; 2428 last_pn = &peer->tids_last_pn[tid]; 2429 2430 if (MS(rx_desc_info, HTT_RX_DESC_HL_INFO_MCAST_BCAST)) 2431 sec_index = HTT_TXRX_SEC_MCAST; 2432 else 2433 sec_index = HTT_TXRX_SEC_UCAST; 2434 2435 sec_type = peer->rx_pn[sec_index].sec_type; 2436 ath10k_htt_rx_mpdu_desc_pn_hl(rx_desc, &new_pn, peer->rx_pn[sec_index].pn_len); 2437 2438 if (sec_type != HTT_SECURITY_AES_CCMP && 2439 sec_type != HTT_SECURITY_TKIP && 2440 sec_type != HTT_SECURITY_TKIP_NOMIC) 2441 return false; 2442 2443 if (last_pn_valid) 2444 pn_invalid = ath10k_htt_rx_pn_cmp48(&new_pn, last_pn); 2445 else 2446 peer->tids_last_pn_valid[tid] = true; 2447 2448 if (!pn_invalid) 2449 last_pn->pn48 = new_pn.pn48; 2450 2451 return pn_invalid; 2452 } 2453 2454 static bool ath10k_htt_rx_proc_rx_ind_hl(struct ath10k_htt *htt, 2455 struct htt_rx_indication_hl *rx, 2456 struct sk_buff *skb, 2457 enum htt_rx_pn_check_type check_pn_type, 2458 enum htt_rx_tkip_demic_type tkip_mic_type) 2459 { 2460 struct ath10k *ar = htt->ar; 2461 struct ath10k_peer *peer; 2462 struct htt_rx_indication_mpdu_range *mpdu_ranges; 2463 struct fw_rx_desc_hl *fw_desc; 2464 enum htt_txrx_sec_cast_type sec_index; 2465 enum htt_security_types sec_type; 2466 union htt_rx_pn_t new_pn = {}; 2467 struct htt_hl_rx_desc *rx_desc; 2468 struct ieee80211_hdr *hdr; 2469 struct ieee80211_rx_status *rx_status; 2470 u16 peer_id; 2471 u8 rx_desc_len; 2472 int num_mpdu_ranges; 2473 size_t tot_hdr_len; 2474 struct ieee80211_channel *ch; 2475 bool pn_invalid, qos, first_msdu; 2476 u32 tid, rx_desc_info; 2477 2478 peer_id = __le16_to_cpu(rx->hdr.peer_id); 2479 tid = MS(rx->hdr.info0, HTT_RX_INDICATION_INFO0_EXT_TID); 2480 2481 spin_lock_bh(&ar->data_lock); 2482 peer = ath10k_peer_find_by_id(ar, peer_id); 2483 spin_unlock_bh(&ar->data_lock); 2484 if (!peer && peer_id != HTT_INVALID_PEERID) 2485 ath10k_warn(ar, "Got RX ind from invalid peer: %u\n", peer_id); 2486 2487 if (!peer) 2488 return true; 2489 2490 num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1), 2491 HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES); 2492 mpdu_ranges = htt_rx_ind_get_mpdu_ranges_hl(rx); 2493 fw_desc = &rx->fw_desc; 2494 rx_desc_len = fw_desc->len; 2495 2496 if (fw_desc->u.bits.discard) { 2497 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt discard mpdu\n"); 2498 goto err; 2499 } 2500 2501 /* I have not yet seen any case where num_mpdu_ranges > 1. 2502 * qcacld does not seem handle that case either, so we introduce the 2503 * same limitation here as well. 2504 */ 2505 if (num_mpdu_ranges > 1) 2506 ath10k_warn(ar, 2507 "Unsupported number of MPDU ranges: %d, ignoring all but the first\n", 2508 num_mpdu_ranges); 2509 2510 if (mpdu_ranges->mpdu_range_status != 2511 HTT_RX_IND_MPDU_STATUS_OK && 2512 mpdu_ranges->mpdu_range_status != 2513 HTT_RX_IND_MPDU_STATUS_TKIP_MIC_ERR) { 2514 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt mpdu_range_status %d\n", 2515 mpdu_ranges->mpdu_range_status); 2516 goto err; 2517 } 2518 2519 rx_desc = (struct htt_hl_rx_desc *)&rx->mpdu_ranges[num_mpdu_ranges]; 2520 rx_desc_info = __le32_to_cpu(rx_desc->info); 2521 2522 if (MS(rx_desc_info, HTT_RX_DESC_HL_INFO_MCAST_BCAST)) 2523 sec_index = HTT_TXRX_SEC_MCAST; 2524 else 2525 sec_index = HTT_TXRX_SEC_UCAST; 2526 2527 sec_type = peer->rx_pn[sec_index].sec_type; 2528 first_msdu = rx->fw_desc.flags & FW_RX_DESC_FLAGS_FIRST_MSDU; 2529 2530 ath10k_htt_rx_mpdu_desc_pn_hl(rx_desc, &new_pn, peer->rx_pn[sec_index].pn_len); 2531 2532 if (check_pn_type == HTT_RX_PN_CHECK && tid >= IEEE80211_NUM_TIDS) { 2533 spin_lock_bh(&ar->data_lock); 2534 pn_invalid = ath10k_htt_rx_pn_check_replay_hl(ar, peer, rx); 2535 spin_unlock_bh(&ar->data_lock); 2536 2537 if (pn_invalid) 2538 goto err; 2539 } 2540 2541 /* Strip off all headers before the MAC header before delivery to 2542 * mac80211 2543 */ 2544 tot_hdr_len = sizeof(struct htt_resp_hdr) + sizeof(rx->hdr) + 2545 sizeof(rx->ppdu) + sizeof(rx->prefix) + 2546 sizeof(rx->fw_desc) + 2547 sizeof(*mpdu_ranges) * num_mpdu_ranges + rx_desc_len; 2548 2549 skb_pull(skb, tot_hdr_len); 2550 2551 hdr = (struct ieee80211_hdr *)skb->data; 2552 qos = ieee80211_is_data_qos(hdr->frame_control); 2553 2554 rx_status = IEEE80211_SKB_RXCB(skb); 2555 memset(rx_status, 0, sizeof(*rx_status)); 2556 2557 if (rx->ppdu.combined_rssi == 0) { 2558 /* SDIO firmware does not provide signal */ 2559 rx_status->signal = 0; 2560 rx_status->flag |= RX_FLAG_NO_SIGNAL_VAL; 2561 } else { 2562 rx_status->signal = ATH10K_DEFAULT_NOISE_FLOOR + 2563 rx->ppdu.combined_rssi; 2564 rx_status->flag &= ~RX_FLAG_NO_SIGNAL_VAL; 2565 } 2566 2567 spin_lock_bh(&ar->data_lock); 2568 ch = ar->scan_channel; 2569 if (!ch) 2570 ch = ar->rx_channel; 2571 if (!ch) 2572 ch = ath10k_htt_rx_h_any_channel(ar); 2573 if (!ch) 2574 ch = ar->tgt_oper_chan; 2575 spin_unlock_bh(&ar->data_lock); 2576 2577 if (ch) { 2578 rx_status->band = ch->band; 2579 rx_status->freq = ch->center_freq; 2580 } 2581 if (rx->fw_desc.flags & FW_RX_DESC_FLAGS_LAST_MSDU) 2582 rx_status->flag &= ~RX_FLAG_AMSDU_MORE; 2583 else 2584 rx_status->flag |= RX_FLAG_AMSDU_MORE; 2585 2586 /* Not entirely sure about this, but all frames from the chipset has 2587 * the protected flag set even though they have already been decrypted. 2588 * Unmasking this flag is necessary in order for mac80211 not to drop 2589 * the frame. 2590 * TODO: Verify this is always the case or find out a way to check 2591 * if there has been hw decryption. 2592 */ 2593 if (ieee80211_has_protected(hdr->frame_control)) { 2594 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED); 2595 rx_status->flag |= RX_FLAG_DECRYPTED | 2596 RX_FLAG_IV_STRIPPED | 2597 RX_FLAG_MMIC_STRIPPED; 2598 2599 if (tid < IEEE80211_NUM_TIDS && 2600 first_msdu && 2601 check_pn_type == HTT_RX_PN_CHECK && 2602 (sec_type == HTT_SECURITY_AES_CCMP || 2603 sec_type == HTT_SECURITY_TKIP || 2604 sec_type == HTT_SECURITY_TKIP_NOMIC)) { 2605 u8 offset, *ivp, i; 2606 s8 keyidx = 0; 2607 __le64 pn48 = cpu_to_le64(new_pn.pn48); 2608 2609 hdr = (struct ieee80211_hdr *)skb->data; 2610 offset = ieee80211_hdrlen(hdr->frame_control); 2611 hdr->frame_control |= __cpu_to_le16(IEEE80211_FCTL_PROTECTED); 2612 rx_status->flag &= ~RX_FLAG_IV_STRIPPED; 2613 2614 memmove(skb->data - IEEE80211_CCMP_HDR_LEN, 2615 skb->data, offset); 2616 skb_push(skb, IEEE80211_CCMP_HDR_LEN); 2617 ivp = skb->data + offset; 2618 memset(skb->data + offset, 0, IEEE80211_CCMP_HDR_LEN); 2619 /* Ext IV */ 2620 ivp[IEEE80211_WEP_IV_LEN - 1] |= ATH10K_IEEE80211_EXTIV; 2621 2622 for (i = 0; i < ARRAY_SIZE(peer->keys); i++) { 2623 if (peer->keys[i] && 2624 peer->keys[i]->flags & IEEE80211_KEY_FLAG_PAIRWISE) 2625 keyidx = peer->keys[i]->keyidx; 2626 } 2627 2628 /* Key ID */ 2629 ivp[IEEE80211_WEP_IV_LEN - 1] |= keyidx << 6; 2630 2631 if (sec_type == HTT_SECURITY_AES_CCMP) { 2632 rx_status->flag |= RX_FLAG_MIC_STRIPPED; 2633 /* pn 0, pn 1 */ 2634 memcpy(skb->data + offset, &pn48, 2); 2635 /* pn 1, pn 3 , pn 34 , pn 5 */ 2636 memcpy(skb->data + offset + 4, ((u8 *)&pn48) + 2, 4); 2637 } else { 2638 rx_status->flag |= RX_FLAG_ICV_STRIPPED; 2639 /* TSC 0 */ 2640 memcpy(skb->data + offset + 2, &pn48, 1); 2641 /* TSC 1 */ 2642 memcpy(skb->data + offset, ((u8 *)&pn48) + 1, 1); 2643 /* TSC 2 , TSC 3 , TSC 4 , TSC 5*/ 2644 memcpy(skb->data + offset + 4, ((u8 *)&pn48) + 2, 4); 2645 } 2646 } 2647 } 2648 2649 if (tkip_mic_type == HTT_RX_TKIP_MIC) 2650 rx_status->flag &= ~RX_FLAG_IV_STRIPPED & 2651 ~RX_FLAG_MMIC_STRIPPED; 2652 2653 if (mpdu_ranges->mpdu_range_status == HTT_RX_IND_MPDU_STATUS_TKIP_MIC_ERR) 2654 rx_status->flag |= RX_FLAG_MMIC_ERROR; 2655 2656 if (!qos && tid < IEEE80211_NUM_TIDS) { 2657 u8 offset; 2658 __le16 qos_ctrl = 0; 2659 2660 hdr = (struct ieee80211_hdr *)skb->data; 2661 offset = ieee80211_hdrlen(hdr->frame_control); 2662 2663 hdr->frame_control |= cpu_to_le16(IEEE80211_STYPE_QOS_DATA); 2664 memmove(skb->data - IEEE80211_QOS_CTL_LEN, skb->data, offset); 2665 skb_push(skb, IEEE80211_QOS_CTL_LEN); 2666 qos_ctrl = cpu_to_le16(tid); 2667 memcpy(skb->data + offset, &qos_ctrl, IEEE80211_QOS_CTL_LEN); 2668 } 2669 2670 if (ar->napi.dev) 2671 ieee80211_rx_napi(ar->hw, NULL, skb, &ar->napi); 2672 else 2673 ieee80211_rx_ni(ar->hw, skb); 2674 2675 /* We have delivered the skb to the upper layers (mac80211) so we 2676 * must not free it. 2677 */ 2678 return false; 2679 err: 2680 /* Tell the caller that it must free the skb since we have not 2681 * consumed it 2682 */ 2683 return true; 2684 } 2685 2686 static int ath10k_htt_rx_frag_tkip_decap_nomic(struct sk_buff *skb, 2687 u16 head_len, 2688 u16 hdr_len) 2689 { 2690 u8 *ivp, *orig_hdr; 2691 2692 orig_hdr = skb->data; 2693 ivp = orig_hdr + hdr_len + head_len; 2694 2695 /* the ExtIV bit is always set to 1 for TKIP */ 2696 if (!(ivp[IEEE80211_WEP_IV_LEN - 1] & ATH10K_IEEE80211_EXTIV)) 2697 return -EINVAL; 2698 2699 memmove(orig_hdr + IEEE80211_TKIP_IV_LEN, orig_hdr, head_len + hdr_len); 2700 skb_pull(skb, IEEE80211_TKIP_IV_LEN); 2701 skb_trim(skb, skb->len - ATH10K_IEEE80211_TKIP_MICLEN); 2702 return 0; 2703 } 2704 2705 static int ath10k_htt_rx_frag_tkip_decap_withmic(struct sk_buff *skb, 2706 u16 head_len, 2707 u16 hdr_len) 2708 { 2709 u8 *ivp, *orig_hdr; 2710 2711 orig_hdr = skb->data; 2712 ivp = orig_hdr + hdr_len + head_len; 2713 2714 /* the ExtIV bit is always set to 1 for TKIP */ 2715 if (!(ivp[IEEE80211_WEP_IV_LEN - 1] & ATH10K_IEEE80211_EXTIV)) 2716 return -EINVAL; 2717 2718 memmove(orig_hdr + IEEE80211_TKIP_IV_LEN, orig_hdr, head_len + hdr_len); 2719 skb_pull(skb, IEEE80211_TKIP_IV_LEN); 2720 skb_trim(skb, skb->len - IEEE80211_TKIP_ICV_LEN); 2721 return 0; 2722 } 2723 2724 static int ath10k_htt_rx_frag_ccmp_decap(struct sk_buff *skb, 2725 u16 head_len, 2726 u16 hdr_len) 2727 { 2728 u8 *ivp, *orig_hdr; 2729 2730 orig_hdr = skb->data; 2731 ivp = orig_hdr + hdr_len + head_len; 2732 2733 /* the ExtIV bit is always set to 1 for CCMP */ 2734 if (!(ivp[IEEE80211_WEP_IV_LEN - 1] & ATH10K_IEEE80211_EXTIV)) 2735 return -EINVAL; 2736 2737 skb_trim(skb, skb->len - IEEE80211_CCMP_MIC_LEN); 2738 memmove(orig_hdr + IEEE80211_CCMP_HDR_LEN, orig_hdr, head_len + hdr_len); 2739 skb_pull(skb, IEEE80211_CCMP_HDR_LEN); 2740 return 0; 2741 } 2742 2743 static int ath10k_htt_rx_frag_wep_decap(struct sk_buff *skb, 2744 u16 head_len, 2745 u16 hdr_len) 2746 { 2747 u8 *orig_hdr; 2748 2749 orig_hdr = skb->data; 2750 2751 memmove(orig_hdr + IEEE80211_WEP_IV_LEN, 2752 orig_hdr, head_len + hdr_len); 2753 skb_pull(skb, IEEE80211_WEP_IV_LEN); 2754 skb_trim(skb, skb->len - IEEE80211_WEP_ICV_LEN); 2755 return 0; 2756 } 2757 2758 static bool ath10k_htt_rx_proc_rx_frag_ind_hl(struct ath10k_htt *htt, 2759 struct htt_rx_fragment_indication *rx, 2760 struct sk_buff *skb) 2761 { 2762 struct ath10k *ar = htt->ar; 2763 enum htt_rx_tkip_demic_type tkip_mic = HTT_RX_NON_TKIP_MIC; 2764 enum htt_txrx_sec_cast_type sec_index; 2765 struct htt_rx_indication_hl *rx_hl; 2766 enum htt_security_types sec_type; 2767 u32 tid, frag, seq, rx_desc_info; 2768 union htt_rx_pn_t new_pn = {}; 2769 struct htt_hl_rx_desc *rx_desc; 2770 u16 peer_id, sc, hdr_space; 2771 union htt_rx_pn_t *last_pn; 2772 struct ieee80211_hdr *hdr; 2773 int ret, num_mpdu_ranges; 2774 struct ath10k_peer *peer; 2775 struct htt_resp *resp; 2776 size_t tot_hdr_len; 2777 2778 resp = (struct htt_resp *)(skb->data + HTT_RX_FRAG_IND_INFO0_HEADER_LEN); 2779 skb_pull(skb, HTT_RX_FRAG_IND_INFO0_HEADER_LEN); 2780 skb_trim(skb, skb->len - FCS_LEN); 2781 2782 peer_id = __le16_to_cpu(rx->peer_id); 2783 rx_hl = (struct htt_rx_indication_hl *)(&resp->rx_ind_hl); 2784 2785 spin_lock_bh(&ar->data_lock); 2786 peer = ath10k_peer_find_by_id(ar, peer_id); 2787 if (!peer) { 2788 ath10k_dbg(ar, ATH10K_DBG_HTT, "invalid peer: %u\n", peer_id); 2789 goto err; 2790 } 2791 2792 num_mpdu_ranges = MS(__le32_to_cpu(rx_hl->hdr.info1), 2793 HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES); 2794 2795 tot_hdr_len = sizeof(struct htt_resp_hdr) + 2796 sizeof(rx_hl->hdr) + 2797 sizeof(rx_hl->ppdu) + 2798 sizeof(rx_hl->prefix) + 2799 sizeof(rx_hl->fw_desc) + 2800 sizeof(struct htt_rx_indication_mpdu_range) * num_mpdu_ranges; 2801 2802 tid = MS(rx_hl->hdr.info0, HTT_RX_INDICATION_INFO0_EXT_TID); 2803 rx_desc = (struct htt_hl_rx_desc *)(skb->data + tot_hdr_len); 2804 rx_desc_info = __le32_to_cpu(rx_desc->info); 2805 2806 hdr = (struct ieee80211_hdr *)((u8 *)rx_desc + rx_hl->fw_desc.len); 2807 2808 if (is_multicast_ether_addr(hdr->addr1)) { 2809 /* Discard the fragment with multicast DA */ 2810 goto err; 2811 } 2812 2813 if (!MS(rx_desc_info, HTT_RX_DESC_HL_INFO_ENCRYPTED)) { 2814 spin_unlock_bh(&ar->data_lock); 2815 return ath10k_htt_rx_proc_rx_ind_hl(htt, &resp->rx_ind_hl, skb, 2816 HTT_RX_NON_PN_CHECK, 2817 HTT_RX_NON_TKIP_MIC); 2818 } 2819 2820 if (ieee80211_has_retry(hdr->frame_control)) 2821 goto err; 2822 2823 hdr_space = ieee80211_hdrlen(hdr->frame_control); 2824 sc = __le16_to_cpu(hdr->seq_ctrl); 2825 seq = IEEE80211_SEQ_TO_SN(sc); 2826 frag = sc & IEEE80211_SCTL_FRAG; 2827 2828 sec_index = MS(rx_desc_info, HTT_RX_DESC_HL_INFO_MCAST_BCAST) ? 2829 HTT_TXRX_SEC_MCAST : HTT_TXRX_SEC_UCAST; 2830 sec_type = peer->rx_pn[sec_index].sec_type; 2831 ath10k_htt_rx_mpdu_desc_pn_hl(rx_desc, &new_pn, peer->rx_pn[sec_index].pn_len); 2832 2833 switch (sec_type) { 2834 case HTT_SECURITY_TKIP: 2835 tkip_mic = HTT_RX_TKIP_MIC; 2836 ret = ath10k_htt_rx_frag_tkip_decap_withmic(skb, 2837 tot_hdr_len + 2838 rx_hl->fw_desc.len, 2839 hdr_space); 2840 if (ret) 2841 goto err; 2842 break; 2843 case HTT_SECURITY_TKIP_NOMIC: 2844 ret = ath10k_htt_rx_frag_tkip_decap_nomic(skb, 2845 tot_hdr_len + 2846 rx_hl->fw_desc.len, 2847 hdr_space); 2848 if (ret) 2849 goto err; 2850 break; 2851 case HTT_SECURITY_AES_CCMP: 2852 ret = ath10k_htt_rx_frag_ccmp_decap(skb, 2853 tot_hdr_len + rx_hl->fw_desc.len, 2854 hdr_space); 2855 if (ret) 2856 goto err; 2857 break; 2858 case HTT_SECURITY_WEP128: 2859 case HTT_SECURITY_WEP104: 2860 case HTT_SECURITY_WEP40: 2861 ret = ath10k_htt_rx_frag_wep_decap(skb, 2862 tot_hdr_len + rx_hl->fw_desc.len, 2863 hdr_space); 2864 if (ret) 2865 goto err; 2866 break; 2867 default: 2868 break; 2869 } 2870 2871 resp = (struct htt_resp *)(skb->data); 2872 2873 if (sec_type != HTT_SECURITY_AES_CCMP && 2874 sec_type != HTT_SECURITY_TKIP && 2875 sec_type != HTT_SECURITY_TKIP_NOMIC) { 2876 spin_unlock_bh(&ar->data_lock); 2877 return ath10k_htt_rx_proc_rx_ind_hl(htt, &resp->rx_ind_hl, skb, 2878 HTT_RX_NON_PN_CHECK, 2879 HTT_RX_NON_TKIP_MIC); 2880 } 2881 2882 last_pn = &peer->frag_tids_last_pn[tid]; 2883 2884 if (frag == 0) { 2885 if (ath10k_htt_rx_pn_check_replay_hl(ar, peer, &resp->rx_ind_hl)) 2886 goto err; 2887 2888 last_pn->pn48 = new_pn.pn48; 2889 peer->frag_tids_seq[tid] = seq; 2890 } else if (sec_type == HTT_SECURITY_AES_CCMP) { 2891 if (seq != peer->frag_tids_seq[tid]) 2892 goto err; 2893 2894 if (new_pn.pn48 != last_pn->pn48 + 1) 2895 goto err; 2896 2897 last_pn->pn48 = new_pn.pn48; 2898 last_pn = &peer->tids_last_pn[tid]; 2899 last_pn->pn48 = new_pn.pn48; 2900 } 2901 2902 spin_unlock_bh(&ar->data_lock); 2903 2904 return ath10k_htt_rx_proc_rx_ind_hl(htt, &resp->rx_ind_hl, skb, 2905 HTT_RX_NON_PN_CHECK, tkip_mic); 2906 2907 err: 2908 spin_unlock_bh(&ar->data_lock); 2909 2910 /* Tell the caller that it must free the skb since we have not 2911 * consumed it 2912 */ 2913 return true; 2914 } 2915 2916 static void ath10k_htt_rx_proc_rx_ind_ll(struct ath10k_htt *htt, 2917 struct htt_rx_indication *rx) 2918 { 2919 struct ath10k *ar = htt->ar; 2920 struct htt_rx_indication_mpdu_range *mpdu_ranges; 2921 int num_mpdu_ranges; 2922 int i, mpdu_count = 0; 2923 u16 peer_id; 2924 u8 tid; 2925 2926 num_mpdu_ranges = MS(__le32_to_cpu(rx->hdr.info1), 2927 HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES); 2928 peer_id = __le16_to_cpu(rx->hdr.peer_id); 2929 tid = MS(rx->hdr.info0, HTT_RX_INDICATION_INFO0_EXT_TID); 2930 2931 mpdu_ranges = htt_rx_ind_get_mpdu_ranges(rx); 2932 2933 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ", 2934 rx, struct_size(rx, mpdu_ranges, num_mpdu_ranges)); 2935 2936 for (i = 0; i < num_mpdu_ranges; i++) 2937 mpdu_count += mpdu_ranges[i].mpdu_count; 2938 2939 atomic_add(mpdu_count, &htt->num_mpdus_ready); 2940 2941 ath10k_sta_update_rx_tid_stats_ampdu(ar, peer_id, tid, mpdu_ranges, 2942 num_mpdu_ranges); 2943 } 2944 2945 static void ath10k_htt_rx_tx_compl_ind(struct ath10k *ar, 2946 struct sk_buff *skb) 2947 { 2948 struct ath10k_htt *htt = &ar->htt; 2949 struct htt_resp *resp = (struct htt_resp *)skb->data; 2950 struct htt_tx_done tx_done = {}; 2951 int status = MS(resp->data_tx_completion.flags, HTT_DATA_TX_STATUS); 2952 __le16 msdu_id, *msdus; 2953 bool rssi_enabled = false; 2954 u8 msdu_count = 0, num_airtime_records, tid; 2955 int i, htt_pad = 0; 2956 struct htt_data_tx_compl_ppdu_dur *ppdu_info; 2957 struct ath10k_peer *peer; 2958 u16 ppdu_info_offset = 0, peer_id; 2959 u32 tx_duration; 2960 2961 switch (status) { 2962 case HTT_DATA_TX_STATUS_NO_ACK: 2963 tx_done.status = HTT_TX_COMPL_STATE_NOACK; 2964 break; 2965 case HTT_DATA_TX_STATUS_OK: 2966 tx_done.status = HTT_TX_COMPL_STATE_ACK; 2967 break; 2968 case HTT_DATA_TX_STATUS_DISCARD: 2969 case HTT_DATA_TX_STATUS_POSTPONE: 2970 tx_done.status = HTT_TX_COMPL_STATE_DISCARD; 2971 break; 2972 default: 2973 ath10k_warn(ar, "unhandled tx completion status %d\n", status); 2974 tx_done.status = HTT_TX_COMPL_STATE_DISCARD; 2975 break; 2976 } 2977 2978 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n", 2979 resp->data_tx_completion.num_msdus); 2980 2981 msdu_count = resp->data_tx_completion.num_msdus; 2982 msdus = resp->data_tx_completion.msdus; 2983 rssi_enabled = ath10k_is_rssi_enable(&ar->hw_params, resp); 2984 2985 if (rssi_enabled) 2986 htt_pad = ath10k_tx_data_rssi_get_pad_bytes(&ar->hw_params, 2987 resp); 2988 2989 for (i = 0; i < msdu_count; i++) { 2990 msdu_id = msdus[i]; 2991 tx_done.msdu_id = __le16_to_cpu(msdu_id); 2992 2993 if (rssi_enabled) { 2994 /* Total no of MSDUs should be even, 2995 * if odd MSDUs are sent firmware fills 2996 * last msdu id with 0xffff 2997 */ 2998 if (msdu_count & 0x01) { 2999 msdu_id = msdus[msdu_count + i + 1 + htt_pad]; 3000 tx_done.ack_rssi = __le16_to_cpu(msdu_id); 3001 } else { 3002 msdu_id = msdus[msdu_count + i + htt_pad]; 3003 tx_done.ack_rssi = __le16_to_cpu(msdu_id); 3004 } 3005 } 3006 3007 /* kfifo_put: In practice firmware shouldn't fire off per-CE 3008 * interrupt and main interrupt (MSI/-X range case) for the same 3009 * HTC service so it should be safe to use kfifo_put w/o lock. 3010 * 3011 * From kfifo_put() documentation: 3012 * Note that with only one concurrent reader and one concurrent 3013 * writer, you don't need extra locking to use these macro. 3014 */ 3015 if (ar->bus_param.dev_type == ATH10K_DEV_TYPE_HL) { 3016 ath10k_txrx_tx_unref(htt, &tx_done); 3017 } else if (!kfifo_put(&htt->txdone_fifo, tx_done)) { 3018 ath10k_warn(ar, "txdone fifo overrun, msdu_id %d status %d\n", 3019 tx_done.msdu_id, tx_done.status); 3020 ath10k_txrx_tx_unref(htt, &tx_done); 3021 } 3022 } 3023 3024 if (!(resp->data_tx_completion.flags2 & HTT_TX_CMPL_FLAG_PPDU_DURATION_PRESENT)) 3025 return; 3026 3027 ppdu_info_offset = (msdu_count & 0x01) ? msdu_count + 1 : msdu_count; 3028 3029 if (rssi_enabled) 3030 ppdu_info_offset += ppdu_info_offset; 3031 3032 if (resp->data_tx_completion.flags2 & 3033 (HTT_TX_CMPL_FLAG_PPID_PRESENT | HTT_TX_CMPL_FLAG_PA_PRESENT)) 3034 ppdu_info_offset += 2; 3035 3036 ppdu_info = (struct htt_data_tx_compl_ppdu_dur *)&msdus[ppdu_info_offset]; 3037 num_airtime_records = FIELD_GET(HTT_TX_COMPL_PPDU_DUR_INFO0_NUM_ENTRIES_MASK, 3038 __le32_to_cpu(ppdu_info->info0)); 3039 3040 for (i = 0; i < num_airtime_records; i++) { 3041 struct htt_data_tx_ppdu_dur *ppdu_dur; 3042 u32 info0; 3043 3044 ppdu_dur = &ppdu_info->ppdu_dur[i]; 3045 info0 = __le32_to_cpu(ppdu_dur->info0); 3046 3047 peer_id = FIELD_GET(HTT_TX_PPDU_DUR_INFO0_PEER_ID_MASK, 3048 info0); 3049 rcu_read_lock(); 3050 spin_lock_bh(&ar->data_lock); 3051 3052 peer = ath10k_peer_find_by_id(ar, peer_id); 3053 if (!peer || !peer->sta) { 3054 spin_unlock_bh(&ar->data_lock); 3055 rcu_read_unlock(); 3056 continue; 3057 } 3058 3059 tid = FIELD_GET(HTT_TX_PPDU_DUR_INFO0_TID_MASK, info0) & 3060 IEEE80211_QOS_CTL_TID_MASK; 3061 tx_duration = __le32_to_cpu(ppdu_dur->tx_duration); 3062 3063 ieee80211_sta_register_airtime(peer->sta, tid, tx_duration, 0); 3064 3065 spin_unlock_bh(&ar->data_lock); 3066 rcu_read_unlock(); 3067 } 3068 } 3069 3070 static void ath10k_htt_rx_addba(struct ath10k *ar, struct htt_resp *resp) 3071 { 3072 struct htt_rx_addba *ev = &resp->rx_addba; 3073 struct ath10k_peer *peer; 3074 struct ath10k_vif *arvif; 3075 u16 info0, tid, peer_id; 3076 3077 info0 = __le16_to_cpu(ev->info0); 3078 tid = MS(info0, HTT_RX_BA_INFO0_TID); 3079 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID); 3080 3081 ath10k_dbg(ar, ATH10K_DBG_HTT, 3082 "htt rx addba tid %u peer_id %u size %u\n", 3083 tid, peer_id, ev->window_size); 3084 3085 spin_lock_bh(&ar->data_lock); 3086 peer = ath10k_peer_find_by_id(ar, peer_id); 3087 if (!peer) { 3088 ath10k_warn(ar, "received addba event for invalid peer_id: %u\n", 3089 peer_id); 3090 spin_unlock_bh(&ar->data_lock); 3091 return; 3092 } 3093 3094 arvif = ath10k_get_arvif(ar, peer->vdev_id); 3095 if (!arvif) { 3096 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n", 3097 peer->vdev_id); 3098 spin_unlock_bh(&ar->data_lock); 3099 return; 3100 } 3101 3102 ath10k_dbg(ar, ATH10K_DBG_HTT, 3103 "htt rx start rx ba session sta %pM tid %u size %u\n", 3104 peer->addr, tid, ev->window_size); 3105 3106 ieee80211_start_rx_ba_session_offl(arvif->vif, peer->addr, tid); 3107 spin_unlock_bh(&ar->data_lock); 3108 } 3109 3110 static void ath10k_htt_rx_delba(struct ath10k *ar, struct htt_resp *resp) 3111 { 3112 struct htt_rx_delba *ev = &resp->rx_delba; 3113 struct ath10k_peer *peer; 3114 struct ath10k_vif *arvif; 3115 u16 info0, tid, peer_id; 3116 3117 info0 = __le16_to_cpu(ev->info0); 3118 tid = MS(info0, HTT_RX_BA_INFO0_TID); 3119 peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID); 3120 3121 ath10k_dbg(ar, ATH10K_DBG_HTT, 3122 "htt rx delba tid %u peer_id %u\n", 3123 tid, peer_id); 3124 3125 spin_lock_bh(&ar->data_lock); 3126 peer = ath10k_peer_find_by_id(ar, peer_id); 3127 if (!peer) { 3128 ath10k_warn(ar, "received addba event for invalid peer_id: %u\n", 3129 peer_id); 3130 spin_unlock_bh(&ar->data_lock); 3131 return; 3132 } 3133 3134 arvif = ath10k_get_arvif(ar, peer->vdev_id); 3135 if (!arvif) { 3136 ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n", 3137 peer->vdev_id); 3138 spin_unlock_bh(&ar->data_lock); 3139 return; 3140 } 3141 3142 ath10k_dbg(ar, ATH10K_DBG_HTT, 3143 "htt rx stop rx ba session sta %pM tid %u\n", 3144 peer->addr, tid); 3145 3146 ieee80211_stop_rx_ba_session_offl(arvif->vif, peer->addr, tid); 3147 spin_unlock_bh(&ar->data_lock); 3148 } 3149 3150 static int ath10k_htt_rx_extract_amsdu(struct ath10k_hw_params *hw, 3151 struct sk_buff_head *list, 3152 struct sk_buff_head *amsdu) 3153 { 3154 struct sk_buff *msdu; 3155 struct htt_rx_desc *rxd; 3156 struct rx_msdu_end_common *rxd_msdu_end_common; 3157 3158 if (skb_queue_empty(list)) 3159 return -ENOBUFS; 3160 3161 if (WARN_ON(!skb_queue_empty(amsdu))) 3162 return -EINVAL; 3163 3164 while ((msdu = __skb_dequeue(list))) { 3165 __skb_queue_tail(amsdu, msdu); 3166 3167 rxd = HTT_RX_BUF_TO_RX_DESC(hw, 3168 (void *)msdu->data - 3169 hw->rx_desc_ops->rx_desc_size); 3170 3171 rxd_msdu_end_common = ath10k_htt_rx_desc_get_msdu_end(hw, rxd); 3172 if (rxd_msdu_end_common->info0 & 3173 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU)) 3174 break; 3175 } 3176 3177 msdu = skb_peek_tail(amsdu); 3178 rxd = HTT_RX_BUF_TO_RX_DESC(hw, 3179 (void *)msdu->data - hw->rx_desc_ops->rx_desc_size); 3180 3181 rxd_msdu_end_common = ath10k_htt_rx_desc_get_msdu_end(hw, rxd); 3182 if (!(rxd_msdu_end_common->info0 & 3183 __cpu_to_le32(RX_MSDU_END_INFO0_LAST_MSDU))) { 3184 skb_queue_splice_init(amsdu, list); 3185 return -EAGAIN; 3186 } 3187 3188 return 0; 3189 } 3190 3191 static void ath10k_htt_rx_h_rx_offload_prot(struct ieee80211_rx_status *status, 3192 struct sk_buff *skb) 3193 { 3194 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 3195 3196 if (!ieee80211_has_protected(hdr->frame_control)) 3197 return; 3198 3199 /* Offloaded frames are already decrypted but firmware insists they are 3200 * protected in the 802.11 header. Strip the flag. Otherwise mac80211 3201 * will drop the frame. 3202 */ 3203 3204 hdr->frame_control &= ~__cpu_to_le16(IEEE80211_FCTL_PROTECTED); 3205 status->flag |= RX_FLAG_DECRYPTED | 3206 RX_FLAG_IV_STRIPPED | 3207 RX_FLAG_MMIC_STRIPPED; 3208 } 3209 3210 static void ath10k_htt_rx_h_rx_offload(struct ath10k *ar, 3211 struct sk_buff_head *list) 3212 { 3213 struct ath10k_htt *htt = &ar->htt; 3214 struct ieee80211_rx_status *status = &htt->rx_status; 3215 struct htt_rx_offload_msdu *rx; 3216 struct sk_buff *msdu; 3217 size_t offset; 3218 3219 while ((msdu = __skb_dequeue(list))) { 3220 /* Offloaded frames don't have Rx descriptor. Instead they have 3221 * a short meta information header. 3222 */ 3223 3224 rx = (void *)msdu->data; 3225 3226 skb_put(msdu, sizeof(*rx)); 3227 skb_pull(msdu, sizeof(*rx)); 3228 3229 if (skb_tailroom(msdu) < __le16_to_cpu(rx->msdu_len)) { 3230 ath10k_warn(ar, "dropping frame: offloaded rx msdu is too long!\n"); 3231 dev_kfree_skb_any(msdu); 3232 continue; 3233 } 3234 3235 skb_put(msdu, __le16_to_cpu(rx->msdu_len)); 3236 3237 /* Offloaded rx header length isn't multiple of 2 nor 4 so the 3238 * actual payload is unaligned. Align the frame. Otherwise 3239 * mac80211 complains. This shouldn't reduce performance much 3240 * because these offloaded frames are rare. 3241 */ 3242 offset = 4 - ((unsigned long)msdu->data & 3); 3243 skb_put(msdu, offset); 3244 memmove(msdu->data + offset, msdu->data, msdu->len); 3245 skb_pull(msdu, offset); 3246 3247 /* FIXME: The frame is NWifi. Re-construct QoS Control 3248 * if possible later. 3249 */ 3250 3251 memset(status, 0, sizeof(*status)); 3252 status->flag |= RX_FLAG_NO_SIGNAL_VAL; 3253 3254 ath10k_htt_rx_h_rx_offload_prot(status, msdu); 3255 ath10k_htt_rx_h_channel(ar, status, NULL, rx->vdev_id); 3256 ath10k_htt_rx_h_queue_msdu(ar, status, msdu); 3257 } 3258 } 3259 3260 static int ath10k_htt_rx_in_ord_ind(struct ath10k *ar, struct sk_buff *skb) 3261 { 3262 struct ath10k_htt *htt = &ar->htt; 3263 struct htt_resp *resp = (void *)skb->data; 3264 struct ieee80211_rx_status *status = &htt->rx_status; 3265 struct sk_buff_head list; 3266 struct sk_buff_head amsdu; 3267 u16 peer_id; 3268 u16 msdu_count; 3269 u8 vdev_id; 3270 u8 tid; 3271 bool offload; 3272 bool frag; 3273 int ret; 3274 3275 lockdep_assert_held(&htt->rx_ring.lock); 3276 3277 if (htt->rx_confused) 3278 return -EIO; 3279 3280 skb_pull(skb, sizeof(resp->hdr)); 3281 skb_pull(skb, sizeof(resp->rx_in_ord_ind)); 3282 3283 peer_id = __le16_to_cpu(resp->rx_in_ord_ind.peer_id); 3284 msdu_count = __le16_to_cpu(resp->rx_in_ord_ind.msdu_count); 3285 vdev_id = resp->rx_in_ord_ind.vdev_id; 3286 tid = SM(resp->rx_in_ord_ind.info, HTT_RX_IN_ORD_IND_INFO_TID); 3287 offload = !!(resp->rx_in_ord_ind.info & 3288 HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK); 3289 frag = !!(resp->rx_in_ord_ind.info & HTT_RX_IN_ORD_IND_INFO_FRAG_MASK); 3290 3291 ath10k_dbg(ar, ATH10K_DBG_HTT, 3292 "htt rx in ord vdev %i peer %i tid %i offload %i frag %i msdu count %i\n", 3293 vdev_id, peer_id, tid, offload, frag, msdu_count); 3294 3295 if (skb->len < msdu_count * sizeof(*resp->rx_in_ord_ind.msdu_descs32)) { 3296 ath10k_warn(ar, "dropping invalid in order rx indication\n"); 3297 return -EINVAL; 3298 } 3299 3300 /* The event can deliver more than 1 A-MSDU. Each A-MSDU is later 3301 * extracted and processed. 3302 */ 3303 __skb_queue_head_init(&list); 3304 if (ar->hw_params.target_64bit) 3305 ret = ath10k_htt_rx_pop_paddr64_list(htt, &resp->rx_in_ord_ind, 3306 &list); 3307 else 3308 ret = ath10k_htt_rx_pop_paddr32_list(htt, &resp->rx_in_ord_ind, 3309 &list); 3310 3311 if (ret < 0) { 3312 ath10k_warn(ar, "failed to pop paddr list: %d\n", ret); 3313 htt->rx_confused = true; 3314 return -EIO; 3315 } 3316 3317 /* Offloaded frames are very different and need to be handled 3318 * separately. 3319 */ 3320 if (offload) 3321 ath10k_htt_rx_h_rx_offload(ar, &list); 3322 3323 while (!skb_queue_empty(&list)) { 3324 __skb_queue_head_init(&amsdu); 3325 ret = ath10k_htt_rx_extract_amsdu(&ar->hw_params, &list, &amsdu); 3326 switch (ret) { 3327 case 0: 3328 /* Note: The in-order indication may report interleaved 3329 * frames from different PPDUs meaning reported rx rate 3330 * to mac80211 isn't accurate/reliable. It's still 3331 * better to report something than nothing though. This 3332 * should still give an idea about rx rate to the user. 3333 */ 3334 ath10k_htt_rx_h_ppdu(ar, &amsdu, status, vdev_id); 3335 ath10k_htt_rx_h_filter(ar, &amsdu, status, NULL); 3336 ath10k_htt_rx_h_mpdu(ar, &amsdu, status, false, NULL, 3337 NULL, peer_id, frag); 3338 ath10k_htt_rx_h_enqueue(ar, &amsdu, status); 3339 break; 3340 case -EAGAIN: 3341 fallthrough; 3342 default: 3343 /* Should not happen. */ 3344 ath10k_warn(ar, "failed to extract amsdu: %d\n", ret); 3345 htt->rx_confused = true; 3346 __skb_queue_purge(&list); 3347 return -EIO; 3348 } 3349 } 3350 return ret; 3351 } 3352 3353 static void ath10k_htt_rx_tx_fetch_resp_id_confirm(struct ath10k *ar, 3354 const __le32 *resp_ids, 3355 int num_resp_ids) 3356 { 3357 int i; 3358 u32 resp_id; 3359 3360 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm num_resp_ids %d\n", 3361 num_resp_ids); 3362 3363 for (i = 0; i < num_resp_ids; i++) { 3364 resp_id = le32_to_cpu(resp_ids[i]); 3365 3366 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm resp_id %u\n", 3367 resp_id); 3368 3369 /* TODO: free resp_id */ 3370 } 3371 } 3372 3373 static void ath10k_htt_rx_tx_fetch_ind(struct ath10k *ar, struct sk_buff *skb) 3374 { 3375 struct ieee80211_hw *hw = ar->hw; 3376 struct ieee80211_txq *txq; 3377 struct htt_resp *resp = (struct htt_resp *)skb->data; 3378 struct htt_tx_fetch_record *record; 3379 size_t len; 3380 size_t max_num_bytes; 3381 size_t max_num_msdus; 3382 size_t num_bytes; 3383 size_t num_msdus; 3384 const __le32 *resp_ids; 3385 u16 num_records; 3386 u16 num_resp_ids; 3387 u16 peer_id; 3388 u8 tid; 3389 int ret; 3390 int i; 3391 bool may_tx; 3392 3393 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch ind\n"); 3394 3395 len = sizeof(resp->hdr) + sizeof(resp->tx_fetch_ind); 3396 if (unlikely(skb->len < len)) { 3397 ath10k_warn(ar, "received corrupted tx_fetch_ind event: buffer too short\n"); 3398 return; 3399 } 3400 3401 num_records = le16_to_cpu(resp->tx_fetch_ind.num_records); 3402 num_resp_ids = le16_to_cpu(resp->tx_fetch_ind.num_resp_ids); 3403 3404 len += sizeof(resp->tx_fetch_ind.records[0]) * num_records; 3405 len += sizeof(resp->tx_fetch_ind.resp_ids[0]) * num_resp_ids; 3406 3407 if (unlikely(skb->len < len)) { 3408 ath10k_warn(ar, "received corrupted tx_fetch_ind event: too many records/resp_ids\n"); 3409 return; 3410 } 3411 3412 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch ind num records %u num resps %u seq %u\n", 3413 num_records, num_resp_ids, 3414 le16_to_cpu(resp->tx_fetch_ind.fetch_seq_num)); 3415 3416 if (!ar->htt.tx_q_state.enabled) { 3417 ath10k_warn(ar, "received unexpected tx_fetch_ind event: not enabled\n"); 3418 return; 3419 } 3420 3421 if (ar->htt.tx_q_state.mode == HTT_TX_MODE_SWITCH_PUSH) { 3422 ath10k_warn(ar, "received unexpected tx_fetch_ind event: in push mode\n"); 3423 return; 3424 } 3425 3426 rcu_read_lock(); 3427 3428 for (i = 0; i < num_records; i++) { 3429 record = &resp->tx_fetch_ind.records[i]; 3430 peer_id = MS(le16_to_cpu(record->info), 3431 HTT_TX_FETCH_RECORD_INFO_PEER_ID); 3432 tid = MS(le16_to_cpu(record->info), 3433 HTT_TX_FETCH_RECORD_INFO_TID); 3434 max_num_msdus = le16_to_cpu(record->num_msdus); 3435 max_num_bytes = le32_to_cpu(record->num_bytes); 3436 3437 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch record %i peer_id %u tid %u msdus %zu bytes %zu\n", 3438 i, peer_id, tid, max_num_msdus, max_num_bytes); 3439 3440 if (unlikely(peer_id >= ar->htt.tx_q_state.num_peers) || 3441 unlikely(tid >= ar->htt.tx_q_state.num_tids)) { 3442 ath10k_warn(ar, "received out of range peer_id %u tid %u\n", 3443 peer_id, tid); 3444 continue; 3445 } 3446 3447 spin_lock_bh(&ar->data_lock); 3448 txq = ath10k_mac_txq_lookup(ar, peer_id, tid); 3449 spin_unlock_bh(&ar->data_lock); 3450 3451 /* It is okay to release the lock and use txq because RCU read 3452 * lock is held. 3453 */ 3454 3455 if (unlikely(!txq)) { 3456 ath10k_warn(ar, "failed to lookup txq for peer_id %u tid %u\n", 3457 peer_id, tid); 3458 continue; 3459 } 3460 3461 num_msdus = 0; 3462 num_bytes = 0; 3463 3464 ieee80211_txq_schedule_start(hw, txq->ac); 3465 may_tx = ieee80211_txq_may_transmit(hw, txq); 3466 while (num_msdus < max_num_msdus && 3467 num_bytes < max_num_bytes) { 3468 if (!may_tx) 3469 break; 3470 3471 ret = ath10k_mac_tx_push_txq(hw, txq); 3472 if (ret < 0) 3473 break; 3474 3475 num_msdus++; 3476 num_bytes += ret; 3477 } 3478 ieee80211_return_txq(hw, txq, false); 3479 ieee80211_txq_schedule_end(hw, txq->ac); 3480 3481 record->num_msdus = cpu_to_le16(num_msdus); 3482 record->num_bytes = cpu_to_le32(num_bytes); 3483 3484 ath10k_htt_tx_txq_recalc(hw, txq); 3485 } 3486 3487 rcu_read_unlock(); 3488 3489 resp_ids = ath10k_htt_get_tx_fetch_ind_resp_ids(&resp->tx_fetch_ind); 3490 ath10k_htt_rx_tx_fetch_resp_id_confirm(ar, resp_ids, num_resp_ids); 3491 3492 ret = ath10k_htt_tx_fetch_resp(ar, 3493 resp->tx_fetch_ind.token, 3494 resp->tx_fetch_ind.fetch_seq_num, 3495 resp->tx_fetch_ind.records, 3496 num_records); 3497 if (unlikely(ret)) { 3498 ath10k_warn(ar, "failed to submit tx fetch resp for token 0x%08x: %d\n", 3499 le32_to_cpu(resp->tx_fetch_ind.token), ret); 3500 /* FIXME: request fw restart */ 3501 } 3502 3503 ath10k_htt_tx_txq_sync(ar); 3504 } 3505 3506 static void ath10k_htt_rx_tx_fetch_confirm(struct ath10k *ar, 3507 struct sk_buff *skb) 3508 { 3509 const struct htt_resp *resp = (void *)skb->data; 3510 size_t len; 3511 int num_resp_ids; 3512 3513 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx fetch confirm\n"); 3514 3515 len = sizeof(resp->hdr) + sizeof(resp->tx_fetch_confirm); 3516 if (unlikely(skb->len < len)) { 3517 ath10k_warn(ar, "received corrupted tx_fetch_confirm event: buffer too short\n"); 3518 return; 3519 } 3520 3521 num_resp_ids = le16_to_cpu(resp->tx_fetch_confirm.num_resp_ids); 3522 len += sizeof(resp->tx_fetch_confirm.resp_ids[0]) * num_resp_ids; 3523 3524 if (unlikely(skb->len < len)) { 3525 ath10k_warn(ar, "received corrupted tx_fetch_confirm event: resp_ids buffer overflow\n"); 3526 return; 3527 } 3528 3529 ath10k_htt_rx_tx_fetch_resp_id_confirm(ar, 3530 resp->tx_fetch_confirm.resp_ids, 3531 num_resp_ids); 3532 } 3533 3534 static void ath10k_htt_rx_tx_mode_switch_ind(struct ath10k *ar, 3535 struct sk_buff *skb) 3536 { 3537 const struct htt_resp *resp = (void *)skb->data; 3538 const struct htt_tx_mode_switch_record *record; 3539 struct ieee80211_txq *txq; 3540 struct ath10k_txq *artxq; 3541 size_t len; 3542 size_t num_records; 3543 enum htt_tx_mode_switch_mode mode; 3544 bool enable; 3545 u16 info0; 3546 u16 info1; 3547 u16 threshold; 3548 u16 peer_id; 3549 u8 tid; 3550 int i; 3551 3552 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx tx mode switch ind\n"); 3553 3554 len = sizeof(resp->hdr) + sizeof(resp->tx_mode_switch_ind); 3555 if (unlikely(skb->len < len)) { 3556 ath10k_warn(ar, "received corrupted tx_mode_switch_ind event: buffer too short\n"); 3557 return; 3558 } 3559 3560 info0 = le16_to_cpu(resp->tx_mode_switch_ind.info0); 3561 info1 = le16_to_cpu(resp->tx_mode_switch_ind.info1); 3562 3563 enable = !!(info0 & HTT_TX_MODE_SWITCH_IND_INFO0_ENABLE); 3564 num_records = MS(info0, HTT_TX_MODE_SWITCH_IND_INFO1_THRESHOLD); 3565 mode = MS(info1, HTT_TX_MODE_SWITCH_IND_INFO1_MODE); 3566 threshold = MS(info1, HTT_TX_MODE_SWITCH_IND_INFO1_THRESHOLD); 3567 3568 ath10k_dbg(ar, ATH10K_DBG_HTT, 3569 "htt rx tx mode switch ind info0 0x%04x info1 0x%04x enable %d num records %zd mode %d threshold %u\n", 3570 info0, info1, enable, num_records, mode, threshold); 3571 3572 len += sizeof(resp->tx_mode_switch_ind.records[0]) * num_records; 3573 3574 if (unlikely(skb->len < len)) { 3575 ath10k_warn(ar, "received corrupted tx_mode_switch_mode_ind event: too many records\n"); 3576 return; 3577 } 3578 3579 switch (mode) { 3580 case HTT_TX_MODE_SWITCH_PUSH: 3581 case HTT_TX_MODE_SWITCH_PUSH_PULL: 3582 break; 3583 default: 3584 ath10k_warn(ar, "received invalid tx_mode_switch_mode_ind mode %d, ignoring\n", 3585 mode); 3586 return; 3587 } 3588 3589 if (!enable) 3590 return; 3591 3592 ar->htt.tx_q_state.enabled = enable; 3593 ar->htt.tx_q_state.mode = mode; 3594 ar->htt.tx_q_state.num_push_allowed = threshold; 3595 3596 rcu_read_lock(); 3597 3598 for (i = 0; i < num_records; i++) { 3599 record = &resp->tx_mode_switch_ind.records[i]; 3600 info0 = le16_to_cpu(record->info0); 3601 peer_id = MS(info0, HTT_TX_MODE_SWITCH_RECORD_INFO0_PEER_ID); 3602 tid = MS(info0, HTT_TX_MODE_SWITCH_RECORD_INFO0_TID); 3603 3604 if (unlikely(peer_id >= ar->htt.tx_q_state.num_peers) || 3605 unlikely(tid >= ar->htt.tx_q_state.num_tids)) { 3606 ath10k_warn(ar, "received out of range peer_id %u tid %u\n", 3607 peer_id, tid); 3608 continue; 3609 } 3610 3611 spin_lock_bh(&ar->data_lock); 3612 txq = ath10k_mac_txq_lookup(ar, peer_id, tid); 3613 spin_unlock_bh(&ar->data_lock); 3614 3615 /* It is okay to release the lock and use txq because RCU read 3616 * lock is held. 3617 */ 3618 3619 if (unlikely(!txq)) { 3620 ath10k_warn(ar, "failed to lookup txq for peer_id %u tid %u\n", 3621 peer_id, tid); 3622 continue; 3623 } 3624 3625 spin_lock_bh(&ar->htt.tx_lock); 3626 artxq = (void *)txq->drv_priv; 3627 artxq->num_push_allowed = le16_to_cpu(record->num_max_msdus); 3628 spin_unlock_bh(&ar->htt.tx_lock); 3629 } 3630 3631 rcu_read_unlock(); 3632 3633 ath10k_mac_tx_push_pending(ar); 3634 } 3635 3636 void ath10k_htt_htc_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb) 3637 { 3638 bool release; 3639 3640 release = ath10k_htt_t2h_msg_handler(ar, skb); 3641 3642 /* Free the indication buffer */ 3643 if (release) 3644 dev_kfree_skb_any(skb); 3645 } 3646 3647 static inline s8 ath10k_get_legacy_rate_idx(struct ath10k *ar, u8 rate) 3648 { 3649 static const u8 legacy_rates[] = {1, 2, 5, 11, 6, 9, 12, 3650 18, 24, 36, 48, 54}; 3651 int i; 3652 3653 for (i = 0; i < ARRAY_SIZE(legacy_rates); i++) { 3654 if (rate == legacy_rates[i]) 3655 return i; 3656 } 3657 3658 ath10k_warn(ar, "Invalid legacy rate %d peer stats", rate); 3659 return -EINVAL; 3660 } 3661 3662 static void 3663 ath10k_accumulate_per_peer_tx_stats(struct ath10k *ar, 3664 struct ath10k_sta *arsta, 3665 struct ath10k_per_peer_tx_stats *pstats, 3666 s8 legacy_rate_idx) 3667 { 3668 struct rate_info *txrate = &arsta->txrate; 3669 struct ath10k_htt_tx_stats *tx_stats; 3670 int idx, ht_idx, gi, mcs, bw, nss; 3671 unsigned long flags; 3672 3673 if (!arsta->tx_stats) 3674 return; 3675 3676 tx_stats = arsta->tx_stats; 3677 flags = txrate->flags; 3678 gi = test_bit(ATH10K_RATE_INFO_FLAGS_SGI_BIT, &flags); 3679 mcs = ATH10K_HW_MCS_RATE(pstats->ratecode); 3680 bw = txrate->bw; 3681 nss = txrate->nss; 3682 ht_idx = mcs + (nss - 1) * 8; 3683 idx = mcs * 8 + 8 * 10 * (nss - 1); 3684 idx += bw * 2 + gi; 3685 3686 #define STATS_OP_FMT(name) tx_stats->stats[ATH10K_STATS_TYPE_##name] 3687 3688 if (txrate->flags & RATE_INFO_FLAGS_VHT_MCS) { 3689 STATS_OP_FMT(SUCC).vht[0][mcs] += pstats->succ_bytes; 3690 STATS_OP_FMT(SUCC).vht[1][mcs] += pstats->succ_pkts; 3691 STATS_OP_FMT(FAIL).vht[0][mcs] += pstats->failed_bytes; 3692 STATS_OP_FMT(FAIL).vht[1][mcs] += pstats->failed_pkts; 3693 STATS_OP_FMT(RETRY).vht[0][mcs] += pstats->retry_bytes; 3694 STATS_OP_FMT(RETRY).vht[1][mcs] += pstats->retry_pkts; 3695 } else if (txrate->flags & RATE_INFO_FLAGS_MCS) { 3696 STATS_OP_FMT(SUCC).ht[0][ht_idx] += pstats->succ_bytes; 3697 STATS_OP_FMT(SUCC).ht[1][ht_idx] += pstats->succ_pkts; 3698 STATS_OP_FMT(FAIL).ht[0][ht_idx] += pstats->failed_bytes; 3699 STATS_OP_FMT(FAIL).ht[1][ht_idx] += pstats->failed_pkts; 3700 STATS_OP_FMT(RETRY).ht[0][ht_idx] += pstats->retry_bytes; 3701 STATS_OP_FMT(RETRY).ht[1][ht_idx] += pstats->retry_pkts; 3702 } else { 3703 mcs = legacy_rate_idx; 3704 3705 STATS_OP_FMT(SUCC).legacy[0][mcs] += pstats->succ_bytes; 3706 STATS_OP_FMT(SUCC).legacy[1][mcs] += pstats->succ_pkts; 3707 STATS_OP_FMT(FAIL).legacy[0][mcs] += pstats->failed_bytes; 3708 STATS_OP_FMT(FAIL).legacy[1][mcs] += pstats->failed_pkts; 3709 STATS_OP_FMT(RETRY).legacy[0][mcs] += pstats->retry_bytes; 3710 STATS_OP_FMT(RETRY).legacy[1][mcs] += pstats->retry_pkts; 3711 } 3712 3713 if (ATH10K_HW_AMPDU(pstats->flags)) { 3714 tx_stats->ba_fails += ATH10K_HW_BA_FAIL(pstats->flags); 3715 3716 if (txrate->flags & RATE_INFO_FLAGS_MCS) { 3717 STATS_OP_FMT(AMPDU).ht[0][ht_idx] += 3718 pstats->succ_bytes + pstats->retry_bytes; 3719 STATS_OP_FMT(AMPDU).ht[1][ht_idx] += 3720 pstats->succ_pkts + pstats->retry_pkts; 3721 } else { 3722 STATS_OP_FMT(AMPDU).vht[0][mcs] += 3723 pstats->succ_bytes + pstats->retry_bytes; 3724 STATS_OP_FMT(AMPDU).vht[1][mcs] += 3725 pstats->succ_pkts + pstats->retry_pkts; 3726 } 3727 STATS_OP_FMT(AMPDU).bw[0][bw] += 3728 pstats->succ_bytes + pstats->retry_bytes; 3729 STATS_OP_FMT(AMPDU).nss[0][nss - 1] += 3730 pstats->succ_bytes + pstats->retry_bytes; 3731 STATS_OP_FMT(AMPDU).gi[0][gi] += 3732 pstats->succ_bytes + pstats->retry_bytes; 3733 STATS_OP_FMT(AMPDU).rate_table[0][idx] += 3734 pstats->succ_bytes + pstats->retry_bytes; 3735 STATS_OP_FMT(AMPDU).bw[1][bw] += 3736 pstats->succ_pkts + pstats->retry_pkts; 3737 STATS_OP_FMT(AMPDU).nss[1][nss - 1] += 3738 pstats->succ_pkts + pstats->retry_pkts; 3739 STATS_OP_FMT(AMPDU).gi[1][gi] += 3740 pstats->succ_pkts + pstats->retry_pkts; 3741 STATS_OP_FMT(AMPDU).rate_table[1][idx] += 3742 pstats->succ_pkts + pstats->retry_pkts; 3743 } else { 3744 tx_stats->ack_fails += 3745 ATH10K_HW_BA_FAIL(pstats->flags); 3746 } 3747 3748 STATS_OP_FMT(SUCC).bw[0][bw] += pstats->succ_bytes; 3749 STATS_OP_FMT(SUCC).nss[0][nss - 1] += pstats->succ_bytes; 3750 STATS_OP_FMT(SUCC).gi[0][gi] += pstats->succ_bytes; 3751 3752 STATS_OP_FMT(SUCC).bw[1][bw] += pstats->succ_pkts; 3753 STATS_OP_FMT(SUCC).nss[1][nss - 1] += pstats->succ_pkts; 3754 STATS_OP_FMT(SUCC).gi[1][gi] += pstats->succ_pkts; 3755 3756 STATS_OP_FMT(FAIL).bw[0][bw] += pstats->failed_bytes; 3757 STATS_OP_FMT(FAIL).nss[0][nss - 1] += pstats->failed_bytes; 3758 STATS_OP_FMT(FAIL).gi[0][gi] += pstats->failed_bytes; 3759 3760 STATS_OP_FMT(FAIL).bw[1][bw] += pstats->failed_pkts; 3761 STATS_OP_FMT(FAIL).nss[1][nss - 1] += pstats->failed_pkts; 3762 STATS_OP_FMT(FAIL).gi[1][gi] += pstats->failed_pkts; 3763 3764 STATS_OP_FMT(RETRY).bw[0][bw] += pstats->retry_bytes; 3765 STATS_OP_FMT(RETRY).nss[0][nss - 1] += pstats->retry_bytes; 3766 STATS_OP_FMT(RETRY).gi[0][gi] += pstats->retry_bytes; 3767 3768 STATS_OP_FMT(RETRY).bw[1][bw] += pstats->retry_pkts; 3769 STATS_OP_FMT(RETRY).nss[1][nss - 1] += pstats->retry_pkts; 3770 STATS_OP_FMT(RETRY).gi[1][gi] += pstats->retry_pkts; 3771 3772 if (txrate->flags >= RATE_INFO_FLAGS_MCS) { 3773 STATS_OP_FMT(SUCC).rate_table[0][idx] += pstats->succ_bytes; 3774 STATS_OP_FMT(SUCC).rate_table[1][idx] += pstats->succ_pkts; 3775 STATS_OP_FMT(FAIL).rate_table[0][idx] += pstats->failed_bytes; 3776 STATS_OP_FMT(FAIL).rate_table[1][idx] += pstats->failed_pkts; 3777 STATS_OP_FMT(RETRY).rate_table[0][idx] += pstats->retry_bytes; 3778 STATS_OP_FMT(RETRY).rate_table[1][idx] += pstats->retry_pkts; 3779 } 3780 3781 tx_stats->tx_duration += pstats->duration; 3782 } 3783 3784 static void 3785 ath10k_update_per_peer_tx_stats(struct ath10k *ar, 3786 struct ieee80211_sta *sta, 3787 struct ath10k_per_peer_tx_stats *peer_stats) 3788 { 3789 struct ath10k_sta *arsta = (struct ath10k_sta *)sta->drv_priv; 3790 struct ieee80211_chanctx_conf *conf = NULL; 3791 u8 rate = 0, sgi; 3792 s8 rate_idx = 0; 3793 bool skip_auto_rate; 3794 struct rate_info txrate; 3795 3796 lockdep_assert_held(&ar->data_lock); 3797 3798 txrate.flags = ATH10K_HW_PREAMBLE(peer_stats->ratecode); 3799 txrate.bw = ATH10K_HW_BW(peer_stats->flags); 3800 txrate.nss = ATH10K_HW_NSS(peer_stats->ratecode); 3801 txrate.mcs = ATH10K_HW_MCS_RATE(peer_stats->ratecode); 3802 sgi = ATH10K_HW_GI(peer_stats->flags); 3803 skip_auto_rate = ATH10K_FW_SKIPPED_RATE_CTRL(peer_stats->flags); 3804 3805 /* Firmware's rate control skips broadcast/management frames, 3806 * if host has configure fixed rates and in some other special cases. 3807 */ 3808 if (skip_auto_rate) 3809 return; 3810 3811 if (txrate.flags == WMI_RATE_PREAMBLE_VHT && txrate.mcs > 9) { 3812 ath10k_warn(ar, "Invalid VHT mcs %d peer stats", txrate.mcs); 3813 return; 3814 } 3815 3816 if (txrate.flags == WMI_RATE_PREAMBLE_HT && 3817 (txrate.mcs > 7 || txrate.nss < 1)) { 3818 ath10k_warn(ar, "Invalid HT mcs %d nss %d peer stats", 3819 txrate.mcs, txrate.nss); 3820 return; 3821 } 3822 3823 memset(&arsta->txrate, 0, sizeof(arsta->txrate)); 3824 memset(&arsta->tx_info.status, 0, sizeof(arsta->tx_info.status)); 3825 if (txrate.flags == WMI_RATE_PREAMBLE_CCK || 3826 txrate.flags == WMI_RATE_PREAMBLE_OFDM) { 3827 rate = ATH10K_HW_LEGACY_RATE(peer_stats->ratecode); 3828 /* This is hacky, FW sends CCK rate 5.5Mbps as 6 */ 3829 if (rate == 6 && txrate.flags == WMI_RATE_PREAMBLE_CCK) 3830 rate = 5; 3831 rate_idx = ath10k_get_legacy_rate_idx(ar, rate); 3832 if (rate_idx < 0) 3833 return; 3834 arsta->txrate.legacy = rate; 3835 } else if (txrate.flags == WMI_RATE_PREAMBLE_HT) { 3836 arsta->txrate.flags = RATE_INFO_FLAGS_MCS; 3837 arsta->txrate.mcs = txrate.mcs + 8 * (txrate.nss - 1); 3838 } else { 3839 arsta->txrate.flags = RATE_INFO_FLAGS_VHT_MCS; 3840 arsta->txrate.mcs = txrate.mcs; 3841 } 3842 3843 switch (txrate.flags) { 3844 case WMI_RATE_PREAMBLE_OFDM: 3845 if (arsta->arvif && arsta->arvif->vif) 3846 conf = rcu_dereference(arsta->arvif->vif->bss_conf.chanctx_conf); 3847 if (conf && conf->def.chan->band == NL80211_BAND_5GHZ) 3848 arsta->tx_info.status.rates[0].idx = rate_idx - 4; 3849 break; 3850 case WMI_RATE_PREAMBLE_CCK: 3851 arsta->tx_info.status.rates[0].idx = rate_idx; 3852 if (sgi) 3853 arsta->tx_info.status.rates[0].flags |= 3854 (IEEE80211_TX_RC_USE_SHORT_PREAMBLE | 3855 IEEE80211_TX_RC_SHORT_GI); 3856 break; 3857 case WMI_RATE_PREAMBLE_HT: 3858 arsta->tx_info.status.rates[0].idx = 3859 txrate.mcs + ((txrate.nss - 1) * 8); 3860 if (sgi) 3861 arsta->tx_info.status.rates[0].flags |= 3862 IEEE80211_TX_RC_SHORT_GI; 3863 arsta->tx_info.status.rates[0].flags |= IEEE80211_TX_RC_MCS; 3864 break; 3865 case WMI_RATE_PREAMBLE_VHT: 3866 ieee80211_rate_set_vht(&arsta->tx_info.status.rates[0], 3867 txrate.mcs, txrate.nss); 3868 if (sgi) 3869 arsta->tx_info.status.rates[0].flags |= 3870 IEEE80211_TX_RC_SHORT_GI; 3871 arsta->tx_info.status.rates[0].flags |= IEEE80211_TX_RC_VHT_MCS; 3872 break; 3873 } 3874 3875 arsta->txrate.nss = txrate.nss; 3876 arsta->txrate.bw = ath10k_bw_to_mac80211_bw(txrate.bw); 3877 arsta->last_tx_bitrate = cfg80211_calculate_bitrate(&arsta->txrate); 3878 if (sgi) 3879 arsta->txrate.flags |= RATE_INFO_FLAGS_SHORT_GI; 3880 3881 switch (arsta->txrate.bw) { 3882 case RATE_INFO_BW_40: 3883 arsta->tx_info.status.rates[0].flags |= 3884 IEEE80211_TX_RC_40_MHZ_WIDTH; 3885 break; 3886 case RATE_INFO_BW_80: 3887 arsta->tx_info.status.rates[0].flags |= 3888 IEEE80211_TX_RC_80_MHZ_WIDTH; 3889 break; 3890 case RATE_INFO_BW_160: 3891 arsta->tx_info.status.rates[0].flags |= 3892 IEEE80211_TX_RC_160_MHZ_WIDTH; 3893 break; 3894 } 3895 3896 if (peer_stats->succ_pkts) { 3897 arsta->tx_info.flags = IEEE80211_TX_STAT_ACK; 3898 arsta->tx_info.status.rates[0].count = 1; 3899 ieee80211_tx_rate_update(ar->hw, sta, &arsta->tx_info); 3900 } 3901 3902 if (ar->htt.disable_tx_comp) { 3903 arsta->tx_failed += peer_stats->failed_pkts; 3904 ath10k_dbg(ar, ATH10K_DBG_HTT, "tx failed %d\n", 3905 arsta->tx_failed); 3906 } 3907 3908 arsta->tx_retries += peer_stats->retry_pkts; 3909 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx retries %d", arsta->tx_retries); 3910 3911 if (ath10k_debug_is_extd_tx_stats_enabled(ar)) 3912 ath10k_accumulate_per_peer_tx_stats(ar, arsta, peer_stats, 3913 rate_idx); 3914 } 3915 3916 static void ath10k_htt_fetch_peer_stats(struct ath10k *ar, 3917 struct sk_buff *skb) 3918 { 3919 struct htt_resp *resp = (struct htt_resp *)skb->data; 3920 struct ath10k_per_peer_tx_stats *p_tx_stats = &ar->peer_tx_stats; 3921 struct htt_per_peer_tx_stats_ind *tx_stats; 3922 struct ieee80211_sta *sta; 3923 struct ath10k_peer *peer; 3924 int peer_id, i; 3925 u8 ppdu_len, num_ppdu; 3926 3927 num_ppdu = resp->peer_tx_stats.num_ppdu; 3928 ppdu_len = resp->peer_tx_stats.ppdu_len * sizeof(__le32); 3929 3930 if (skb->len < sizeof(struct htt_resp_hdr) + num_ppdu * ppdu_len) { 3931 ath10k_warn(ar, "Invalid peer stats buf length %d\n", skb->len); 3932 return; 3933 } 3934 3935 tx_stats = (struct htt_per_peer_tx_stats_ind *) 3936 (resp->peer_tx_stats.payload); 3937 peer_id = __le16_to_cpu(tx_stats->peer_id); 3938 3939 rcu_read_lock(); 3940 spin_lock_bh(&ar->data_lock); 3941 peer = ath10k_peer_find_by_id(ar, peer_id); 3942 if (!peer || !peer->sta) { 3943 ath10k_warn(ar, "Invalid peer id %d peer stats buffer\n", 3944 peer_id); 3945 goto out; 3946 } 3947 3948 sta = peer->sta; 3949 for (i = 0; i < num_ppdu; i++) { 3950 tx_stats = (struct htt_per_peer_tx_stats_ind *) 3951 (resp->peer_tx_stats.payload + i * ppdu_len); 3952 3953 p_tx_stats->succ_bytes = __le32_to_cpu(tx_stats->succ_bytes); 3954 p_tx_stats->retry_bytes = __le32_to_cpu(tx_stats->retry_bytes); 3955 p_tx_stats->failed_bytes = 3956 __le32_to_cpu(tx_stats->failed_bytes); 3957 p_tx_stats->ratecode = tx_stats->ratecode; 3958 p_tx_stats->flags = tx_stats->flags; 3959 p_tx_stats->succ_pkts = __le16_to_cpu(tx_stats->succ_pkts); 3960 p_tx_stats->retry_pkts = __le16_to_cpu(tx_stats->retry_pkts); 3961 p_tx_stats->failed_pkts = __le16_to_cpu(tx_stats->failed_pkts); 3962 p_tx_stats->duration = __le16_to_cpu(tx_stats->tx_duration); 3963 3964 ath10k_update_per_peer_tx_stats(ar, sta, p_tx_stats); 3965 } 3966 3967 out: 3968 spin_unlock_bh(&ar->data_lock); 3969 rcu_read_unlock(); 3970 } 3971 3972 static void ath10k_fetch_10_2_tx_stats(struct ath10k *ar, u8 *data) 3973 { 3974 struct ath10k_pktlog_hdr *hdr = (struct ath10k_pktlog_hdr *)data; 3975 struct ath10k_per_peer_tx_stats *p_tx_stats = &ar->peer_tx_stats; 3976 struct ath10k_10_2_peer_tx_stats *tx_stats; 3977 struct ieee80211_sta *sta; 3978 struct ath10k_peer *peer; 3979 u16 log_type = __le16_to_cpu(hdr->log_type); 3980 u32 peer_id = 0, i; 3981 3982 if (log_type != ATH_PKTLOG_TYPE_TX_STAT) 3983 return; 3984 3985 tx_stats = (struct ath10k_10_2_peer_tx_stats *)((hdr->payload) + 3986 ATH10K_10_2_TX_STATS_OFFSET); 3987 3988 if (!tx_stats->tx_ppdu_cnt) 3989 return; 3990 3991 peer_id = tx_stats->peer_id; 3992 3993 rcu_read_lock(); 3994 spin_lock_bh(&ar->data_lock); 3995 peer = ath10k_peer_find_by_id(ar, peer_id); 3996 if (!peer || !peer->sta) { 3997 ath10k_warn(ar, "Invalid peer id %d in peer stats buffer\n", 3998 peer_id); 3999 goto out; 4000 } 4001 4002 sta = peer->sta; 4003 for (i = 0; i < tx_stats->tx_ppdu_cnt; i++) { 4004 p_tx_stats->succ_bytes = 4005 __le16_to_cpu(tx_stats->success_bytes[i]); 4006 p_tx_stats->retry_bytes = 4007 __le16_to_cpu(tx_stats->retry_bytes[i]); 4008 p_tx_stats->failed_bytes = 4009 __le16_to_cpu(tx_stats->failed_bytes[i]); 4010 p_tx_stats->ratecode = tx_stats->ratecode[i]; 4011 p_tx_stats->flags = tx_stats->flags[i]; 4012 p_tx_stats->succ_pkts = tx_stats->success_pkts[i]; 4013 p_tx_stats->retry_pkts = tx_stats->retry_pkts[i]; 4014 p_tx_stats->failed_pkts = tx_stats->failed_pkts[i]; 4015 4016 ath10k_update_per_peer_tx_stats(ar, sta, p_tx_stats); 4017 } 4018 spin_unlock_bh(&ar->data_lock); 4019 rcu_read_unlock(); 4020 4021 return; 4022 4023 out: 4024 spin_unlock_bh(&ar->data_lock); 4025 rcu_read_unlock(); 4026 } 4027 4028 static int ath10k_htt_rx_pn_len(enum htt_security_types sec_type) 4029 { 4030 switch (sec_type) { 4031 case HTT_SECURITY_TKIP: 4032 case HTT_SECURITY_TKIP_NOMIC: 4033 case HTT_SECURITY_AES_CCMP: 4034 return 48; 4035 default: 4036 return 0; 4037 } 4038 } 4039 4040 static void ath10k_htt_rx_sec_ind_handler(struct ath10k *ar, 4041 struct htt_security_indication *ev) 4042 { 4043 enum htt_txrx_sec_cast_type sec_index; 4044 enum htt_security_types sec_type; 4045 struct ath10k_peer *peer; 4046 4047 spin_lock_bh(&ar->data_lock); 4048 4049 peer = ath10k_peer_find_by_id(ar, __le16_to_cpu(ev->peer_id)); 4050 if (!peer) { 4051 ath10k_warn(ar, "failed to find peer id %d for security indication", 4052 __le16_to_cpu(ev->peer_id)); 4053 goto out; 4054 } 4055 4056 sec_type = MS(ev->flags, HTT_SECURITY_TYPE); 4057 4058 if (ev->flags & HTT_SECURITY_IS_UNICAST) 4059 sec_index = HTT_TXRX_SEC_UCAST; 4060 else 4061 sec_index = HTT_TXRX_SEC_MCAST; 4062 4063 peer->rx_pn[sec_index].sec_type = sec_type; 4064 peer->rx_pn[sec_index].pn_len = ath10k_htt_rx_pn_len(sec_type); 4065 4066 memset(peer->tids_last_pn_valid, 0, sizeof(peer->tids_last_pn_valid)); 4067 memset(peer->tids_last_pn, 0, sizeof(peer->tids_last_pn)); 4068 4069 out: 4070 spin_unlock_bh(&ar->data_lock); 4071 } 4072 4073 bool ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb) 4074 { 4075 struct ath10k_htt *htt = &ar->htt; 4076 struct htt_resp *resp = (struct htt_resp *)skb->data; 4077 enum htt_t2h_msg_type type; 4078 4079 /* confirm alignment */ 4080 if (!IS_ALIGNED((unsigned long)skb->data, 4)) 4081 ath10k_warn(ar, "unaligned htt message, expect trouble\n"); 4082 4083 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n", 4084 resp->hdr.msg_type); 4085 4086 if (resp->hdr.msg_type >= ar->htt.t2h_msg_types_max) { 4087 ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, unsupported msg_type: 0x%0X\n max: 0x%0X", 4088 resp->hdr.msg_type, ar->htt.t2h_msg_types_max); 4089 return true; 4090 } 4091 type = ar->htt.t2h_msg_types[resp->hdr.msg_type]; 4092 4093 switch (type) { 4094 case HTT_T2H_MSG_TYPE_VERSION_CONF: { 4095 htt->target_version_major = resp->ver_resp.major; 4096 htt->target_version_minor = resp->ver_resp.minor; 4097 complete(&htt->target_version_received); 4098 break; 4099 } 4100 case HTT_T2H_MSG_TYPE_RX_IND: 4101 if (ar->bus_param.dev_type != ATH10K_DEV_TYPE_HL) { 4102 ath10k_htt_rx_proc_rx_ind_ll(htt, &resp->rx_ind); 4103 } else { 4104 skb_queue_tail(&htt->rx_indication_head, skb); 4105 return false; 4106 } 4107 break; 4108 case HTT_T2H_MSG_TYPE_PEER_MAP: { 4109 struct htt_peer_map_event ev = { 4110 .vdev_id = resp->peer_map.vdev_id, 4111 .peer_id = __le16_to_cpu(resp->peer_map.peer_id), 4112 }; 4113 memcpy(ev.addr, resp->peer_map.addr, sizeof(ev.addr)); 4114 ath10k_peer_map_event(htt, &ev); 4115 break; 4116 } 4117 case HTT_T2H_MSG_TYPE_PEER_UNMAP: { 4118 struct htt_peer_unmap_event ev = { 4119 .peer_id = __le16_to_cpu(resp->peer_unmap.peer_id), 4120 }; 4121 ath10k_peer_unmap_event(htt, &ev); 4122 break; 4123 } 4124 case HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION: { 4125 struct htt_tx_done tx_done = {}; 4126 struct ath10k_htt *htt = &ar->htt; 4127 struct ath10k_htc *htc = &ar->htc; 4128 struct ath10k_htc_ep *ep = &ar->htc.endpoint[htt->eid]; 4129 int status = __le32_to_cpu(resp->mgmt_tx_completion.status); 4130 int info = __le32_to_cpu(resp->mgmt_tx_completion.info); 4131 4132 tx_done.msdu_id = __le32_to_cpu(resp->mgmt_tx_completion.desc_id); 4133 4134 switch (status) { 4135 case HTT_MGMT_TX_STATUS_OK: 4136 tx_done.status = HTT_TX_COMPL_STATE_ACK; 4137 if (test_bit(WMI_SERVICE_HTT_MGMT_TX_COMP_VALID_FLAGS, 4138 ar->wmi.svc_map) && 4139 (resp->mgmt_tx_completion.flags & 4140 HTT_MGMT_TX_CMPL_FLAG_ACK_RSSI)) { 4141 tx_done.ack_rssi = 4142 FIELD_GET(HTT_MGMT_TX_CMPL_INFO_ACK_RSSI_MASK, 4143 info); 4144 } 4145 break; 4146 case HTT_MGMT_TX_STATUS_RETRY: 4147 tx_done.status = HTT_TX_COMPL_STATE_NOACK; 4148 break; 4149 case HTT_MGMT_TX_STATUS_DROP: 4150 tx_done.status = HTT_TX_COMPL_STATE_DISCARD; 4151 break; 4152 } 4153 4154 if (htt->disable_tx_comp) { 4155 spin_lock_bh(&htc->tx_lock); 4156 ep->tx_credits++; 4157 spin_unlock_bh(&htc->tx_lock); 4158 } 4159 4160 status = ath10k_txrx_tx_unref(htt, &tx_done); 4161 if (!status) { 4162 spin_lock_bh(&htt->tx_lock); 4163 ath10k_htt_tx_mgmt_dec_pending(htt); 4164 spin_unlock_bh(&htt->tx_lock); 4165 } 4166 break; 4167 } 4168 case HTT_T2H_MSG_TYPE_TX_COMPL_IND: 4169 ath10k_htt_rx_tx_compl_ind(htt->ar, skb); 4170 break; 4171 case HTT_T2H_MSG_TYPE_SEC_IND: { 4172 struct ath10k *ar = htt->ar; 4173 struct htt_security_indication *ev = &resp->security_indication; 4174 4175 ath10k_htt_rx_sec_ind_handler(ar, ev); 4176 ath10k_dbg(ar, ATH10K_DBG_HTT, 4177 "sec ind peer_id %d unicast %d type %d\n", 4178 __le16_to_cpu(ev->peer_id), 4179 !!(ev->flags & HTT_SECURITY_IS_UNICAST), 4180 MS(ev->flags, HTT_SECURITY_TYPE)); 4181 complete(&ar->install_key_done); 4182 break; 4183 } 4184 case HTT_T2H_MSG_TYPE_RX_FRAG_IND: { 4185 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ", 4186 skb->data, skb->len); 4187 atomic_inc(&htt->num_mpdus_ready); 4188 4189 return ath10k_htt_rx_proc_rx_frag_ind(htt, 4190 &resp->rx_frag_ind, 4191 skb); 4192 } 4193 case HTT_T2H_MSG_TYPE_TEST: 4194 break; 4195 case HTT_T2H_MSG_TYPE_STATS_CONF: 4196 trace_ath10k_htt_stats(ar, skb->data, skb->len); 4197 break; 4198 case HTT_T2H_MSG_TYPE_TX_INSPECT_IND: 4199 /* Firmware can return tx frames if it's unable to fully 4200 * process them and suspects host may be able to fix it. ath10k 4201 * sends all tx frames as already inspected so this shouldn't 4202 * happen unless fw has a bug. 4203 */ 4204 ath10k_warn(ar, "received an unexpected htt tx inspect event\n"); 4205 break; 4206 case HTT_T2H_MSG_TYPE_RX_ADDBA: 4207 ath10k_htt_rx_addba(ar, resp); 4208 break; 4209 case HTT_T2H_MSG_TYPE_RX_DELBA: 4210 ath10k_htt_rx_delba(ar, resp); 4211 break; 4212 case HTT_T2H_MSG_TYPE_PKTLOG: { 4213 trace_ath10k_htt_pktlog(ar, resp->pktlog_msg.payload, 4214 skb->len - 4215 offsetof(struct htt_resp, 4216 pktlog_msg.payload)); 4217 4218 if (ath10k_peer_stats_enabled(ar)) 4219 ath10k_fetch_10_2_tx_stats(ar, 4220 resp->pktlog_msg.payload); 4221 break; 4222 } 4223 case HTT_T2H_MSG_TYPE_RX_FLUSH: { 4224 /* Ignore this event because mac80211 takes care of Rx 4225 * aggregation reordering. 4226 */ 4227 break; 4228 } 4229 case HTT_T2H_MSG_TYPE_RX_IN_ORD_PADDR_IND: { 4230 skb_queue_tail(&htt->rx_in_ord_compl_q, skb); 4231 return false; 4232 } 4233 case HTT_T2H_MSG_TYPE_TX_CREDIT_UPDATE_IND: { 4234 struct ath10k_htt *htt = &ar->htt; 4235 struct ath10k_htc *htc = &ar->htc; 4236 struct ath10k_htc_ep *ep = &ar->htc.endpoint[htt->eid]; 4237 u32 msg_word = __le32_to_cpu(*(__le32 *)resp); 4238 int htt_credit_delta; 4239 4240 htt_credit_delta = HTT_TX_CREDIT_DELTA_ABS_GET(msg_word); 4241 if (HTT_TX_CREDIT_SIGN_BIT_GET(msg_word)) 4242 htt_credit_delta = -htt_credit_delta; 4243 4244 ath10k_dbg(ar, ATH10K_DBG_HTT, 4245 "htt credit update delta %d\n", 4246 htt_credit_delta); 4247 4248 if (htt->disable_tx_comp) { 4249 spin_lock_bh(&htc->tx_lock); 4250 ep->tx_credits += htt_credit_delta; 4251 spin_unlock_bh(&htc->tx_lock); 4252 ath10k_dbg(ar, ATH10K_DBG_HTT, 4253 "htt credit total %d\n", 4254 ep->tx_credits); 4255 ep->ep_ops.ep_tx_credits(htc->ar); 4256 } 4257 break; 4258 } 4259 case HTT_T2H_MSG_TYPE_CHAN_CHANGE: { 4260 u32 phymode = __le32_to_cpu(resp->chan_change.phymode); 4261 u32 freq = __le32_to_cpu(resp->chan_change.freq); 4262 4263 ar->tgt_oper_chan = ieee80211_get_channel(ar->hw->wiphy, freq); 4264 ath10k_dbg(ar, ATH10K_DBG_HTT, 4265 "htt chan change freq %u phymode %s\n", 4266 freq, ath10k_wmi_phymode_str(phymode)); 4267 break; 4268 } 4269 case HTT_T2H_MSG_TYPE_AGGR_CONF: 4270 break; 4271 case HTT_T2H_MSG_TYPE_TX_FETCH_IND: { 4272 struct sk_buff *tx_fetch_ind = skb_copy(skb, GFP_ATOMIC); 4273 4274 if (!tx_fetch_ind) { 4275 ath10k_warn(ar, "failed to copy htt tx fetch ind\n"); 4276 break; 4277 } 4278 skb_queue_tail(&htt->tx_fetch_ind_q, tx_fetch_ind); 4279 break; 4280 } 4281 case HTT_T2H_MSG_TYPE_TX_FETCH_CONFIRM: 4282 ath10k_htt_rx_tx_fetch_confirm(ar, skb); 4283 break; 4284 case HTT_T2H_MSG_TYPE_TX_MODE_SWITCH_IND: 4285 ath10k_htt_rx_tx_mode_switch_ind(ar, skb); 4286 break; 4287 case HTT_T2H_MSG_TYPE_PEER_STATS: 4288 ath10k_htt_fetch_peer_stats(ar, skb); 4289 break; 4290 case HTT_T2H_MSG_TYPE_EN_STATS: 4291 default: 4292 ath10k_warn(ar, "htt event (%d) not handled\n", 4293 resp->hdr.msg_type); 4294 ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ", 4295 skb->data, skb->len); 4296 break; 4297 } 4298 return true; 4299 } 4300 EXPORT_SYMBOL(ath10k_htt_t2h_msg_handler); 4301 4302 void ath10k_htt_rx_pktlog_completion_handler(struct ath10k *ar, 4303 struct sk_buff *skb) 4304 { 4305 trace_ath10k_htt_pktlog(ar, skb->data, skb->len); 4306 dev_kfree_skb_any(skb); 4307 } 4308 EXPORT_SYMBOL(ath10k_htt_rx_pktlog_completion_handler); 4309 4310 static int ath10k_htt_rx_deliver_msdu(struct ath10k *ar, int quota, int budget) 4311 { 4312 struct sk_buff *skb; 4313 4314 while (quota < budget) { 4315 if (skb_queue_empty(&ar->htt.rx_msdus_q)) 4316 break; 4317 4318 skb = skb_dequeue(&ar->htt.rx_msdus_q); 4319 if (!skb) 4320 break; 4321 ath10k_process_rx(ar, skb); 4322 quota++; 4323 } 4324 4325 return quota; 4326 } 4327 4328 int ath10k_htt_rx_hl_indication(struct ath10k *ar, int budget) 4329 { 4330 struct htt_resp *resp; 4331 struct ath10k_htt *htt = &ar->htt; 4332 struct sk_buff *skb; 4333 bool release; 4334 int quota; 4335 4336 for (quota = 0; quota < budget; quota++) { 4337 skb = skb_dequeue(&htt->rx_indication_head); 4338 if (!skb) 4339 break; 4340 4341 resp = (struct htt_resp *)skb->data; 4342 4343 release = ath10k_htt_rx_proc_rx_ind_hl(htt, 4344 &resp->rx_ind_hl, 4345 skb, 4346 HTT_RX_PN_CHECK, 4347 HTT_RX_NON_TKIP_MIC); 4348 4349 if (release) 4350 dev_kfree_skb_any(skb); 4351 4352 ath10k_dbg(ar, ATH10K_DBG_HTT, "rx indication poll pending count:%d\n", 4353 skb_queue_len(&htt->rx_indication_head)); 4354 } 4355 return quota; 4356 } 4357 EXPORT_SYMBOL(ath10k_htt_rx_hl_indication); 4358 4359 int ath10k_htt_txrx_compl_task(struct ath10k *ar, int budget) 4360 { 4361 struct ath10k_htt *htt = &ar->htt; 4362 struct htt_tx_done tx_done = {}; 4363 struct sk_buff_head tx_ind_q; 4364 struct sk_buff *skb; 4365 unsigned long flags; 4366 int quota = 0, done, ret; 4367 bool resched_napi = false; 4368 4369 __skb_queue_head_init(&tx_ind_q); 4370 4371 /* Process pending frames before dequeuing more data 4372 * from hardware. 4373 */ 4374 quota = ath10k_htt_rx_deliver_msdu(ar, quota, budget); 4375 if (quota == budget) { 4376 resched_napi = true; 4377 goto exit; 4378 } 4379 4380 while ((skb = skb_dequeue(&htt->rx_in_ord_compl_q))) { 4381 spin_lock_bh(&htt->rx_ring.lock); 4382 ret = ath10k_htt_rx_in_ord_ind(ar, skb); 4383 spin_unlock_bh(&htt->rx_ring.lock); 4384 4385 dev_kfree_skb_any(skb); 4386 if (ret == -EIO) { 4387 resched_napi = true; 4388 goto exit; 4389 } 4390 } 4391 4392 while (atomic_read(&htt->num_mpdus_ready)) { 4393 ret = ath10k_htt_rx_handle_amsdu(htt); 4394 if (ret == -EIO) { 4395 resched_napi = true; 4396 goto exit; 4397 } 4398 atomic_dec(&htt->num_mpdus_ready); 4399 } 4400 4401 /* Deliver received data after processing data from hardware */ 4402 quota = ath10k_htt_rx_deliver_msdu(ar, quota, budget); 4403 4404 /* From NAPI documentation: 4405 * The napi poll() function may also process TX completions, in which 4406 * case if it processes the entire TX ring then it should count that 4407 * work as the rest of the budget. 4408 */ 4409 if ((quota < budget) && !kfifo_is_empty(&htt->txdone_fifo)) 4410 quota = budget; 4411 4412 /* kfifo_get: called only within txrx_tasklet so it's neatly serialized. 4413 * From kfifo_get() documentation: 4414 * Note that with only one concurrent reader and one concurrent writer, 4415 * you don't need extra locking to use these macro. 4416 */ 4417 while (kfifo_get(&htt->txdone_fifo, &tx_done)) 4418 ath10k_txrx_tx_unref(htt, &tx_done); 4419 4420 ath10k_mac_tx_push_pending(ar); 4421 4422 spin_lock_irqsave(&htt->tx_fetch_ind_q.lock, flags); 4423 skb_queue_splice_init(&htt->tx_fetch_ind_q, &tx_ind_q); 4424 spin_unlock_irqrestore(&htt->tx_fetch_ind_q.lock, flags); 4425 4426 while ((skb = __skb_dequeue(&tx_ind_q))) { 4427 ath10k_htt_rx_tx_fetch_ind(ar, skb); 4428 dev_kfree_skb_any(skb); 4429 } 4430 4431 exit: 4432 ath10k_htt_rx_msdu_buff_replenish(htt); 4433 /* In case of rx failure or more data to read, report budget 4434 * to reschedule NAPI poll 4435 */ 4436 done = resched_napi ? budget : quota; 4437 4438 return done; 4439 } 4440 EXPORT_SYMBOL(ath10k_htt_txrx_compl_task); 4441 4442 static const struct ath10k_htt_rx_ops htt_rx_ops_32 = { 4443 .htt_get_rx_ring_size = ath10k_htt_get_rx_ring_size_32, 4444 .htt_config_paddrs_ring = ath10k_htt_config_paddrs_ring_32, 4445 .htt_set_paddrs_ring = ath10k_htt_set_paddrs_ring_32, 4446 .htt_get_vaddr_ring = ath10k_htt_get_vaddr_ring_32, 4447 .htt_reset_paddrs_ring = ath10k_htt_reset_paddrs_ring_32, 4448 }; 4449 4450 static const struct ath10k_htt_rx_ops htt_rx_ops_64 = { 4451 .htt_get_rx_ring_size = ath10k_htt_get_rx_ring_size_64, 4452 .htt_config_paddrs_ring = ath10k_htt_config_paddrs_ring_64, 4453 .htt_set_paddrs_ring = ath10k_htt_set_paddrs_ring_64, 4454 .htt_get_vaddr_ring = ath10k_htt_get_vaddr_ring_64, 4455 .htt_reset_paddrs_ring = ath10k_htt_reset_paddrs_ring_64, 4456 }; 4457 4458 static const struct ath10k_htt_rx_ops htt_rx_ops_hl = { 4459 .htt_rx_proc_rx_frag_ind = ath10k_htt_rx_proc_rx_frag_ind_hl, 4460 }; 4461 4462 void ath10k_htt_set_rx_ops(struct ath10k_htt *htt) 4463 { 4464 struct ath10k *ar = htt->ar; 4465 4466 if (ar->bus_param.dev_type == ATH10K_DEV_TYPE_HL) 4467 htt->rx_ops = &htt_rx_ops_hl; 4468 else if (ar->hw_params.target_64bit) 4469 htt->rx_ops = &htt_rx_ops_64; 4470 else 4471 htt->rx_ops = &htt_rx_ops_32; 4472 } 4473