1 // SPDX-License-Identifier: GPL-2.0-only 2 /* Copyright (C) 2005 Marc Kleine-Budde, Pengutronix 3 * Copyright (C) 2006 Andrey Volkov, Varma Electronics 4 * Copyright (C) 2008-2009 Wolfgang Grandegger <wg@grandegger.com> 5 * Copyright (C) 2021-2025 Vincent Mailhol <mailhol@kernel.org> 6 */ 7 8 #include <linux/can/dev.h> 9 #include <net/rtnetlink.h> 10 11 static const struct nla_policy can_policy[IFLA_CAN_MAX + 1] = { 12 [IFLA_CAN_STATE] = { .type = NLA_U32 }, 13 [IFLA_CAN_CTRLMODE] = { .len = sizeof(struct can_ctrlmode) }, 14 [IFLA_CAN_RESTART_MS] = { .type = NLA_U32 }, 15 [IFLA_CAN_RESTART] = { .type = NLA_U32 }, 16 [IFLA_CAN_BITTIMING] = { .len = sizeof(struct can_bittiming) }, 17 [IFLA_CAN_BITTIMING_CONST] = { .len = sizeof(struct can_bittiming_const) }, 18 [IFLA_CAN_CLOCK] = { .len = sizeof(struct can_clock) }, 19 [IFLA_CAN_BERR_COUNTER] = { .len = sizeof(struct can_berr_counter) }, 20 [IFLA_CAN_DATA_BITTIMING] = { .len = sizeof(struct can_bittiming) }, 21 [IFLA_CAN_DATA_BITTIMING_CONST] = { .len = sizeof(struct can_bittiming_const) }, 22 [IFLA_CAN_TERMINATION] = { .type = NLA_U16 }, 23 [IFLA_CAN_TDC] = { .type = NLA_NESTED }, 24 [IFLA_CAN_CTRLMODE_EXT] = { .type = NLA_NESTED }, 25 [IFLA_CAN_XL_DATA_BITTIMING] = { .len = sizeof(struct can_bittiming) }, 26 [IFLA_CAN_XL_DATA_BITTIMING_CONST] = { .len = sizeof(struct can_bittiming_const) }, 27 [IFLA_CAN_XL_TDC] = { .type = NLA_NESTED }, 28 [IFLA_CAN_XL_PWM] = { .type = NLA_NESTED }, 29 }; 30 31 static const struct nla_policy can_tdc_policy[IFLA_CAN_TDC_MAX + 1] = { 32 [IFLA_CAN_TDC_TDCV_MIN] = { .type = NLA_U32 }, 33 [IFLA_CAN_TDC_TDCV_MAX] = { .type = NLA_U32 }, 34 [IFLA_CAN_TDC_TDCO_MIN] = { .type = NLA_U32 }, 35 [IFLA_CAN_TDC_TDCO_MAX] = { .type = NLA_U32 }, 36 [IFLA_CAN_TDC_TDCF_MIN] = { .type = NLA_U32 }, 37 [IFLA_CAN_TDC_TDCF_MAX] = { .type = NLA_U32 }, 38 [IFLA_CAN_TDC_TDCV] = { .type = NLA_U32 }, 39 [IFLA_CAN_TDC_TDCO] = { .type = NLA_U32 }, 40 [IFLA_CAN_TDC_TDCF] = { .type = NLA_U32 }, 41 }; 42 43 static const struct nla_policy can_pwm_policy[IFLA_CAN_PWM_MAX + 1] = { 44 [IFLA_CAN_PWM_PWMS_MIN] = { .type = NLA_U32 }, 45 [IFLA_CAN_PWM_PWMS_MAX] = { .type = NLA_U32 }, 46 [IFLA_CAN_PWM_PWML_MIN] = { .type = NLA_U32 }, 47 [IFLA_CAN_PWM_PWML_MAX] = { .type = NLA_U32 }, 48 [IFLA_CAN_PWM_PWMO_MIN] = { .type = NLA_U32 }, 49 [IFLA_CAN_PWM_PWMO_MAX] = { .type = NLA_U32 }, 50 [IFLA_CAN_PWM_PWMS] = { .type = NLA_U32 }, 51 [IFLA_CAN_PWM_PWML] = { .type = NLA_U32 }, 52 [IFLA_CAN_PWM_PWMO] = { .type = NLA_U32 }, 53 }; 54 55 static int can_validate_bittiming(struct nlattr *data[], 56 struct netlink_ext_ack *extack, 57 int ifla_can_bittiming) 58 { 59 struct can_bittiming *bt; 60 61 if (!data[ifla_can_bittiming]) 62 return 0; 63 64 static_assert(__alignof__(*bt) <= NLA_ALIGNTO); 65 bt = nla_data(data[ifla_can_bittiming]); 66 67 /* sample point is in one-tenth of a percent */ 68 if (bt->sample_point >= 1000) { 69 NL_SET_ERR_MSG(extack, "sample point must be between 0 and 100%"); 70 return -EINVAL; 71 } 72 73 return 0; 74 } 75 76 static int can_validate_tdc(struct nlattr *data_tdc, 77 struct netlink_ext_ack *extack, u32 tdc_flags) 78 { 79 bool tdc_manual = tdc_flags & CAN_CTRLMODE_TDC_MANUAL_MASK; 80 bool tdc_auto = tdc_flags & CAN_CTRLMODE_TDC_AUTO_MASK; 81 int err; 82 83 if (tdc_auto && tdc_manual) { 84 NL_SET_ERR_MSG(extack, 85 "TDC manual and auto modes are mutually exclusive"); 86 return -EOPNOTSUPP; 87 } 88 89 /* If one of the CAN_CTRLMODE_{,XL}_TDC_* flags is set then TDC 90 * must be set and vice-versa 91 */ 92 if ((tdc_auto || tdc_manual) && !data_tdc) { 93 NL_SET_ERR_MSG(extack, "TDC parameters are missing"); 94 return -EOPNOTSUPP; 95 } 96 if (!(tdc_auto || tdc_manual) && data_tdc) { 97 NL_SET_ERR_MSG(extack, "TDC mode (auto or manual) is missing"); 98 return -EOPNOTSUPP; 99 } 100 101 /* If providing TDC parameters, at least TDCO is needed. TDCV is 102 * needed if and only if CAN_CTRLMODE_{,XL}_TDC_MANUAL is set 103 */ 104 if (data_tdc) { 105 struct nlattr *tb_tdc[IFLA_CAN_TDC_MAX + 1]; 106 107 err = nla_parse_nested(tb_tdc, IFLA_CAN_TDC_MAX, 108 data_tdc, can_tdc_policy, extack); 109 if (err) 110 return err; 111 112 if (tb_tdc[IFLA_CAN_TDC_TDCV]) { 113 if (tdc_auto) { 114 NL_SET_ERR_MSG(extack, 115 "TDCV is incompatible with TDC auto mode"); 116 return -EOPNOTSUPP; 117 } 118 } else { 119 if (tdc_manual) { 120 NL_SET_ERR_MSG(extack, 121 "TDC manual mode requires TDCV"); 122 return -EOPNOTSUPP; 123 } 124 } 125 126 if (!tb_tdc[IFLA_CAN_TDC_TDCO]) { 127 NL_SET_ERR_MSG(extack, "TDCO is missing"); 128 return -EOPNOTSUPP; 129 } 130 } 131 132 return 0; 133 } 134 135 static int can_validate_pwm(struct nlattr *data[], 136 struct netlink_ext_ack *extack, u32 flags) 137 { 138 struct nlattr *tb_pwm[IFLA_CAN_PWM_MAX + 1]; 139 int err; 140 141 if (!data[IFLA_CAN_XL_PWM]) 142 return 0; 143 144 if (!(flags & CAN_CTRLMODE_XL_TMS)) { 145 NL_SET_ERR_MSG(extack, "PWM requires TMS"); 146 return -EOPNOTSUPP; 147 } 148 149 err = nla_parse_nested(tb_pwm, IFLA_CAN_PWM_MAX, data[IFLA_CAN_XL_PWM], 150 can_pwm_policy, extack); 151 if (err) 152 return err; 153 154 if (!tb_pwm[IFLA_CAN_PWM_PWMS] != !tb_pwm[IFLA_CAN_PWM_PWML]) { 155 NL_SET_ERR_MSG(extack, 156 "Provide either both PWMS and PWML, or none for automatic calculation"); 157 return -EOPNOTSUPP; 158 } 159 160 if (tb_pwm[IFLA_CAN_PWM_PWMO] && 161 (!tb_pwm[IFLA_CAN_PWM_PWMS] || !tb_pwm[IFLA_CAN_PWM_PWML])) { 162 NL_SET_ERR_MSG(extack, "PWMO requires both PWMS and PWML"); 163 return -EOPNOTSUPP; 164 } 165 166 return 0; 167 } 168 169 static int can_validate_databittiming(struct nlattr *data[], 170 struct netlink_ext_ack *extack, 171 int ifla_can_data_bittiming, u32 flags) 172 { 173 struct nlattr *data_tdc; 174 const char *type; 175 u32 tdc_flags; 176 bool is_on; 177 int err; 178 179 /* Make sure that valid CAN FD/XL configurations always consist of 180 * - nominal/arbitration bittiming 181 * - data bittiming 182 * - control mode with CAN_CTRLMODE_{FD,XL} set 183 * - TDC parameters are coherent (details in can_validate_tdc()) 184 */ 185 186 if (ifla_can_data_bittiming == IFLA_CAN_DATA_BITTIMING) { 187 data_tdc = data[IFLA_CAN_TDC]; 188 tdc_flags = flags & CAN_CTRLMODE_FD_TDC_MASK; 189 is_on = flags & CAN_CTRLMODE_FD; 190 type = "FD"; 191 } else { 192 data_tdc = data[IFLA_CAN_XL_TDC]; 193 tdc_flags = flags & CAN_CTRLMODE_XL_TDC_MASK; 194 is_on = flags & CAN_CTRLMODE_XL; 195 type = "XL"; 196 } 197 198 if (is_on) { 199 if (!data[IFLA_CAN_BITTIMING] || !data[ifla_can_data_bittiming]) { 200 NL_SET_ERR_MSG_FMT(extack, 201 "Provide both nominal and %s data bittiming", 202 type); 203 return -EOPNOTSUPP; 204 } 205 } else { 206 if (data[ifla_can_data_bittiming]) { 207 NL_SET_ERR_MSG_FMT(extack, 208 "%s data bittiming requires CAN %s", 209 type, type); 210 return -EOPNOTSUPP; 211 } 212 if (data_tdc) { 213 NL_SET_ERR_MSG_FMT(extack, 214 "%s TDC requires CAN %s", 215 type, type); 216 return -EOPNOTSUPP; 217 } 218 } 219 220 err = can_validate_bittiming(data, extack, ifla_can_data_bittiming); 221 if (err) 222 return err; 223 224 err = can_validate_tdc(data_tdc, extack, tdc_flags); 225 if (err) 226 return err; 227 228 return 0; 229 } 230 231 static int can_validate_xl_flags(struct netlink_ext_ack *extack, 232 u32 masked_flags, u32 mask) 233 { 234 if (masked_flags & CAN_CTRLMODE_XL) { 235 if (masked_flags & CAN_CTRLMODE_XL_TMS) { 236 const u32 tms_conflicts_mask = CAN_CTRLMODE_FD | 237 CAN_CTRLMODE_XL_TDC_MASK; 238 u32 tms_conflicts = masked_flags & tms_conflicts_mask; 239 240 if (tms_conflicts) { 241 NL_SET_ERR_MSG_FMT(extack, 242 "TMS and %s are mutually exclusive", 243 can_get_ctrlmode_str(tms_conflicts)); 244 return -EOPNOTSUPP; 245 } 246 } 247 } else { 248 if (mask & CAN_CTRLMODE_XL_TMS) { 249 NL_SET_ERR_MSG(extack, "TMS requires CAN XL"); 250 return -EOPNOTSUPP; 251 } 252 } 253 254 return 0; 255 } 256 257 static int can_validate(struct nlattr *tb[], struct nlattr *data[], 258 struct netlink_ext_ack *extack) 259 { 260 u32 flags = 0; 261 int err; 262 263 if (!data) 264 return 0; 265 266 if (data[IFLA_CAN_CTRLMODE]) { 267 struct can_ctrlmode *cm = nla_data(data[IFLA_CAN_CTRLMODE]); 268 269 flags = cm->flags & cm->mask; 270 271 if ((flags & CAN_CTRLMODE_LISTENONLY) && 272 (flags & CAN_CTRLMODE_RESTRICTED)) { 273 NL_SET_ERR_MSG(extack, 274 "LISTEN-ONLY and RESTRICTED modes are mutually exclusive"); 275 return -EOPNOTSUPP; 276 } 277 278 err = can_validate_xl_flags(extack, flags, cm->mask); 279 if (err) 280 return err; 281 } 282 283 err = can_validate_bittiming(data, extack, IFLA_CAN_BITTIMING); 284 if (err) 285 return err; 286 287 err = can_validate_databittiming(data, extack, 288 IFLA_CAN_DATA_BITTIMING, flags); 289 if (err) 290 return err; 291 292 err = can_validate_databittiming(data, extack, 293 IFLA_CAN_XL_DATA_BITTIMING, flags); 294 if (err) 295 return err; 296 297 err = can_validate_pwm(data, extack, flags); 298 if (err) 299 return err; 300 301 return 0; 302 } 303 304 static int can_ctrlmode_changelink(struct net_device *dev, 305 struct nlattr *data[], 306 struct netlink_ext_ack *extack) 307 { 308 struct can_priv *priv = netdev_priv(dev); 309 struct can_ctrlmode *cm; 310 u32 ctrlstatic, maskedflags, deactivated, notsupp, ctrlstatic_missing; 311 312 if (!data[IFLA_CAN_CTRLMODE]) 313 return 0; 314 315 /* Do not allow changing controller mode while running */ 316 if (dev->flags & IFF_UP) 317 return -EBUSY; 318 319 cm = nla_data(data[IFLA_CAN_CTRLMODE]); 320 ctrlstatic = can_get_static_ctrlmode(priv); 321 maskedflags = cm->flags & cm->mask; 322 deactivated = ~cm->flags & cm->mask; 323 notsupp = maskedflags & ~(priv->ctrlmode_supported | ctrlstatic); 324 ctrlstatic_missing = (maskedflags & ctrlstatic) ^ ctrlstatic; 325 326 if (notsupp) { 327 NL_SET_ERR_MSG_FMT(extack, 328 "requested control mode %s not supported", 329 can_get_ctrlmode_str(notsupp)); 330 return -EOPNOTSUPP; 331 } 332 333 /* do not check for static fd-non-iso if 'fd' is disabled */ 334 if (!(maskedflags & CAN_CTRLMODE_FD)) 335 ctrlstatic &= ~CAN_CTRLMODE_FD_NON_ISO; 336 337 if (ctrlstatic_missing) { 338 NL_SET_ERR_MSG_FMT(extack, 339 "missing required %s static control mode", 340 can_get_ctrlmode_str(ctrlstatic_missing)); 341 return -EOPNOTSUPP; 342 } 343 344 /* If FD was active and is not turned off, check for XL conflicts */ 345 if (priv->ctrlmode & CAN_CTRLMODE_FD & ~deactivated) { 346 if (maskedflags & CAN_CTRLMODE_XL_TMS) { 347 NL_SET_ERR_MSG(extack, 348 "TMS can not be activated while CAN FD is on"); 349 return -EOPNOTSUPP; 350 } 351 } 352 353 /* If a top dependency flag is provided, reset all its dependencies */ 354 if (cm->mask & CAN_CTRLMODE_FD) 355 priv->ctrlmode &= ~CAN_CTRLMODE_FD_TDC_MASK; 356 if (cm->mask & CAN_CTRLMODE_XL) 357 priv->ctrlmode &= ~(CAN_CTRLMODE_XL_TDC_MASK | 358 CAN_CTRLMODE_XL_TMS); 359 360 /* clear bits to be modified and copy the flag values */ 361 priv->ctrlmode &= ~cm->mask; 362 priv->ctrlmode |= maskedflags; 363 364 /* Wipe potential leftovers from previous CAN FD/XL config */ 365 if (!(priv->ctrlmode & CAN_CTRLMODE_FD)) { 366 memset(&priv->fd.data_bittiming, 0, 367 sizeof(priv->fd.data_bittiming)); 368 priv->ctrlmode &= ~CAN_CTRLMODE_FD_TDC_MASK; 369 memset(&priv->fd.tdc, 0, sizeof(priv->fd.tdc)); 370 } 371 if (!(priv->ctrlmode & CAN_CTRLMODE_XL)) { 372 memset(&priv->xl.data_bittiming, 0, 373 sizeof(priv->fd.data_bittiming)); 374 priv->ctrlmode &= ~CAN_CTRLMODE_XL_TDC_MASK; 375 memset(&priv->xl.tdc, 0, sizeof(priv->xl.tdc)); 376 memset(&priv->xl.pwm, 0, sizeof(priv->xl.pwm)); 377 } 378 379 can_set_default_mtu(dev); 380 can_set_cap_info(dev); 381 382 return 0; 383 } 384 385 static int can_tdc_changelink(struct data_bittiming_params *dbt_params, 386 const struct nlattr *nla, 387 struct netlink_ext_ack *extack) 388 { 389 struct nlattr *tb_tdc[IFLA_CAN_TDC_MAX + 1]; 390 struct can_tdc tdc = { 0 }; 391 const struct can_tdc_const *tdc_const = dbt_params->tdc_const; 392 int err; 393 394 if (!tdc_const) { 395 NL_SET_ERR_MSG(extack, "The device does not support TDC"); 396 return -EOPNOTSUPP; 397 } 398 399 err = nla_parse_nested(tb_tdc, IFLA_CAN_TDC_MAX, nla, 400 can_tdc_policy, extack); 401 if (err) 402 return err; 403 404 if (tb_tdc[IFLA_CAN_TDC_TDCV]) { 405 u32 tdcv = nla_get_u32(tb_tdc[IFLA_CAN_TDC_TDCV]); 406 407 if (tdcv < tdc_const->tdcv_min || tdcv > tdc_const->tdcv_max) 408 return -EINVAL; 409 410 tdc.tdcv = tdcv; 411 } 412 413 if (tb_tdc[IFLA_CAN_TDC_TDCO]) { 414 u32 tdco = nla_get_u32(tb_tdc[IFLA_CAN_TDC_TDCO]); 415 416 if (tdco < tdc_const->tdco_min || tdco > tdc_const->tdco_max) 417 return -EINVAL; 418 419 tdc.tdco = tdco; 420 } 421 422 if (tb_tdc[IFLA_CAN_TDC_TDCF]) { 423 u32 tdcf = nla_get_u32(tb_tdc[IFLA_CAN_TDC_TDCF]); 424 425 if (tdcf < tdc_const->tdcf_min || tdcf > tdc_const->tdcf_max) 426 return -EINVAL; 427 428 tdc.tdcf = tdcf; 429 } 430 431 dbt_params->tdc = tdc; 432 433 return 0; 434 } 435 436 static int can_dbt_changelink(struct net_device *dev, struct nlattr *data[], 437 bool fd, struct netlink_ext_ack *extack) 438 { 439 struct nlattr *data_bittiming, *data_tdc; 440 struct can_priv *priv = netdev_priv(dev); 441 struct data_bittiming_params *dbt_params; 442 struct can_bittiming dbt; 443 bool need_tdc_calc = false; 444 u32 tdc_mask; 445 int err; 446 447 if (fd) { 448 data_bittiming = data[IFLA_CAN_DATA_BITTIMING]; 449 data_tdc = data[IFLA_CAN_TDC]; 450 dbt_params = &priv->fd; 451 tdc_mask = CAN_CTRLMODE_FD_TDC_MASK; 452 } else { 453 data_bittiming = data[IFLA_CAN_XL_DATA_BITTIMING]; 454 data_tdc = data[IFLA_CAN_XL_TDC]; 455 dbt_params = &priv->xl; 456 tdc_mask = CAN_CTRLMODE_XL_TDC_MASK; 457 } 458 459 if (!data_bittiming) 460 return 0; 461 462 /* Do not allow changing bittiming while running */ 463 if (dev->flags & IFF_UP) 464 return -EBUSY; 465 466 /* Calculate bittiming parameters based on data_bittiming_const 467 * if set, otherwise pass bitrate directly via do_set_bitrate(). 468 * Bail out if neither is given. 469 */ 470 if (!dbt_params->data_bittiming_const && !dbt_params->do_set_data_bittiming && 471 !dbt_params->data_bitrate_const) 472 return -EOPNOTSUPP; 473 474 memcpy(&dbt, nla_data(data_bittiming), sizeof(dbt)); 475 err = can_get_bittiming(dev, &dbt, dbt_params->data_bittiming_const, 476 dbt_params->data_bitrate_const, 477 dbt_params->data_bitrate_const_cnt, extack); 478 if (err) 479 return err; 480 481 if (priv->bitrate_max && dbt.bitrate > priv->bitrate_max) { 482 NL_SET_ERR_MSG_FMT(extack, 483 "CAN data bitrate %u bps surpasses transceiver capabilities of %u bps", 484 dbt.bitrate, priv->bitrate_max); 485 return -EINVAL; 486 } 487 488 memset(&dbt_params->tdc, 0, sizeof(dbt_params->tdc)); 489 if (data[IFLA_CAN_CTRLMODE]) { 490 struct can_ctrlmode *cm = nla_data(data[IFLA_CAN_CTRLMODE]); 491 492 if (fd || !(priv->ctrlmode & CAN_CTRLMODE_XL_TMS)) 493 need_tdc_calc = !(cm->mask & tdc_mask); 494 } 495 if (data_tdc) { 496 /* TDC parameters are provided: use them */ 497 err = can_tdc_changelink(dbt_params, data_tdc, extack); 498 if (err) { 499 priv->ctrlmode &= ~tdc_mask; 500 return err; 501 } 502 } else if (need_tdc_calc) { 503 /* Neither of TDC parameters nor TDC flags are provided: 504 * do calculation 505 */ 506 can_calc_tdco(&dbt_params->tdc, dbt_params->tdc_const, &dbt, 507 tdc_mask, &priv->ctrlmode, priv->ctrlmode_supported); 508 } /* else: both CAN_CTRLMODE_{,XL}_TDC_{AUTO,MANUAL} are explicitly 509 * turned off. TDC is disabled: do nothing 510 */ 511 512 memcpy(&dbt_params->data_bittiming, &dbt, sizeof(dbt)); 513 514 if (dbt_params->do_set_data_bittiming) { 515 /* Finally, set the bit-timing registers */ 516 err = dbt_params->do_set_data_bittiming(dev); 517 if (err) 518 return err; 519 } 520 521 return 0; 522 } 523 524 static int can_pwm_changelink(struct net_device *dev, 525 const struct nlattr *pwm_nla, 526 struct netlink_ext_ack *extack) 527 { 528 struct can_priv *priv = netdev_priv(dev); 529 const struct can_pwm_const *pwm_const = priv->xl.pwm_const; 530 struct nlattr *tb_pwm[IFLA_CAN_PWM_MAX + 1]; 531 struct can_pwm pwm = { 0 }; 532 int err; 533 534 if (!(priv->ctrlmode & CAN_CTRLMODE_XL_TMS)) 535 return 0; 536 537 if (!pwm_const) { 538 NL_SET_ERR_MSG(extack, "The device does not support PWM"); 539 return -EOPNOTSUPP; 540 } 541 542 if (!pwm_nla) 543 return can_calc_pwm(dev, extack); 544 545 err = nla_parse_nested(tb_pwm, IFLA_CAN_PWM_MAX, pwm_nla, 546 can_pwm_policy, extack); 547 if (err) 548 return err; 549 550 if (tb_pwm[IFLA_CAN_PWM_PWMS]) { 551 pwm.pwms = nla_get_u32(tb_pwm[IFLA_CAN_PWM_PWMS]); 552 if (pwm.pwms < pwm_const->pwms_min || 553 pwm.pwms > pwm_const->pwms_max) { 554 NL_SET_ERR_MSG_FMT(extack, 555 "PWMS: %u tqmin is out of range: %u...%u", 556 pwm.pwms, pwm_const->pwms_min, 557 pwm_const->pwms_max); 558 return -EINVAL; 559 } 560 } 561 562 if (tb_pwm[IFLA_CAN_PWM_PWML]) { 563 pwm.pwml = nla_get_u32(tb_pwm[IFLA_CAN_PWM_PWML]); 564 if (pwm.pwml < pwm_const->pwml_min || 565 pwm.pwml > pwm_const->pwml_max) { 566 NL_SET_ERR_MSG_FMT(extack, 567 "PWML: %u tqmin is out of range: %u...%u", 568 pwm.pwml, pwm_const->pwml_min, 569 pwm_const->pwml_max); 570 return -EINVAL; 571 } 572 } 573 574 if (tb_pwm[IFLA_CAN_PWM_PWMO]) { 575 pwm.pwmo = nla_get_u32(tb_pwm[IFLA_CAN_PWM_PWMO]); 576 if (pwm.pwmo < pwm_const->pwmo_min || 577 pwm.pwmo > pwm_const->pwmo_max) { 578 NL_SET_ERR_MSG_FMT(extack, 579 "PWMO: %u tqmin is out of range: %u...%u", 580 pwm.pwmo, pwm_const->pwmo_min, 581 pwm_const->pwmo_max); 582 return -EINVAL; 583 } 584 } 585 586 err = can_validate_pwm_bittiming(dev, &pwm, extack); 587 if (err) 588 return err; 589 590 priv->xl.pwm = pwm; 591 return 0; 592 } 593 594 static int can_changelink(struct net_device *dev, struct nlattr *tb[], 595 struct nlattr *data[], 596 struct netlink_ext_ack *extack) 597 { 598 struct can_priv *priv = netdev_priv(dev); 599 int err; 600 601 /* We need synchronization with dev->stop() */ 602 ASSERT_RTNL(); 603 604 err = can_ctrlmode_changelink(dev, data, extack); 605 if (err) 606 return err; 607 608 if (data[IFLA_CAN_BITTIMING]) { 609 struct can_bittiming bt; 610 611 /* Do not allow changing bittiming while running */ 612 if (dev->flags & IFF_UP) 613 return -EBUSY; 614 615 /* Calculate bittiming parameters based on 616 * bittiming_const if set, otherwise pass bitrate 617 * directly via do_set_bitrate(). Bail out if neither 618 * is given. 619 */ 620 if (!priv->bittiming_const && !priv->do_set_bittiming && 621 !priv->bitrate_const) 622 return -EOPNOTSUPP; 623 624 memcpy(&bt, nla_data(data[IFLA_CAN_BITTIMING]), sizeof(bt)); 625 err = can_get_bittiming(dev, &bt, 626 priv->bittiming_const, 627 priv->bitrate_const, 628 priv->bitrate_const_cnt, 629 extack); 630 if (err) 631 return err; 632 633 if (priv->bitrate_max && bt.bitrate > priv->bitrate_max) { 634 NL_SET_ERR_MSG_FMT(extack, 635 "arbitration bitrate %u bps surpasses transceiver capabilities of %u bps", 636 bt.bitrate, priv->bitrate_max); 637 return -EINVAL; 638 } 639 640 memcpy(&priv->bittiming, &bt, sizeof(bt)); 641 642 if (priv->do_set_bittiming) { 643 /* Finally, set the bit-timing registers */ 644 err = priv->do_set_bittiming(dev); 645 if (err) 646 return err; 647 } 648 } 649 650 if (data[IFLA_CAN_RESTART_MS]) { 651 unsigned int restart_ms = nla_get_u32(data[IFLA_CAN_RESTART_MS]); 652 653 if (restart_ms != 0 && !priv->do_set_mode) { 654 NL_SET_ERR_MSG(extack, 655 "Device doesn't support restart from Bus Off"); 656 return -EOPNOTSUPP; 657 } 658 659 /* Do not allow changing restart delay while running */ 660 if (dev->flags & IFF_UP) 661 return -EBUSY; 662 priv->restart_ms = restart_ms; 663 } 664 665 if (data[IFLA_CAN_RESTART]) { 666 if (!priv->do_set_mode) { 667 NL_SET_ERR_MSG(extack, 668 "Device doesn't support restart from Bus Off"); 669 return -EOPNOTSUPP; 670 } 671 672 /* Do not allow a restart while not running */ 673 if (!(dev->flags & IFF_UP)) 674 return -EINVAL; 675 err = can_restart_now(dev); 676 if (err) 677 return err; 678 } 679 680 /* CAN FD */ 681 err = can_dbt_changelink(dev, data, true, extack); 682 if (err) 683 return err; 684 685 /* CAN XL */ 686 err = can_dbt_changelink(dev, data, false, extack); 687 if (err) 688 return err; 689 err = can_pwm_changelink(dev, data[IFLA_CAN_XL_PWM], extack); 690 if (err) 691 return err; 692 693 if (data[IFLA_CAN_TERMINATION]) { 694 const u16 termval = nla_get_u16(data[IFLA_CAN_TERMINATION]); 695 const unsigned int num_term = priv->termination_const_cnt; 696 unsigned int i; 697 698 if (!priv->do_set_termination) { 699 NL_SET_ERR_MSG(extack, 700 "Termination is not configurable on this device"); 701 return -EOPNOTSUPP; 702 } 703 704 /* check whether given value is supported by the interface */ 705 for (i = 0; i < num_term; i++) { 706 if (termval == priv->termination_const[i]) 707 break; 708 } 709 if (i >= num_term) 710 return -EINVAL; 711 712 /* Finally, set the termination value */ 713 err = priv->do_set_termination(dev, termval); 714 if (err) 715 return err; 716 717 priv->termination = termval; 718 } 719 720 return 0; 721 } 722 723 static size_t can_tdc_get_size(struct data_bittiming_params *dbt_params, 724 u32 tdc_flags) 725 { 726 bool tdc_manual = tdc_flags & CAN_CTRLMODE_TDC_MANUAL_MASK; 727 size_t size; 728 729 if (!dbt_params->tdc_const) 730 return 0; 731 732 size = nla_total_size(0); /* nest IFLA_CAN_TDC */ 733 if (tdc_manual) { 734 size += nla_total_size(sizeof(u32)); /* IFLA_CAN_TDCV_MIN */ 735 size += nla_total_size(sizeof(u32)); /* IFLA_CAN_TDCV_MAX */ 736 } 737 size += nla_total_size(sizeof(u32)); /* IFLA_CAN_TDCO_MIN */ 738 size += nla_total_size(sizeof(u32)); /* IFLA_CAN_TDCO_MAX */ 739 if (dbt_params->tdc_const->tdcf_max) { 740 size += nla_total_size(sizeof(u32)); /* IFLA_CAN_TDCF_MIN */ 741 size += nla_total_size(sizeof(u32)); /* IFLA_CAN_TDCF_MAX */ 742 } 743 744 if (tdc_flags) { 745 if (tdc_manual || dbt_params->do_get_auto_tdcv) 746 size += nla_total_size(sizeof(u32)); /* IFLA_CAN_TDCV */ 747 size += nla_total_size(sizeof(u32)); /* IFLA_CAN_TDCO */ 748 if (dbt_params->tdc_const->tdcf_max) 749 size += nla_total_size(sizeof(u32)); /* IFLA_CAN_TDCF */ 750 } 751 752 return size; 753 } 754 755 static size_t can_data_bittiming_get_size(struct data_bittiming_params *dbt_params, 756 u32 tdc_flags) 757 { 758 size_t size = 0; 759 760 if (dbt_params->data_bittiming.bitrate) /* IFLA_CAN_{,XL}_DATA_BITTIMING */ 761 size += nla_total_size(sizeof(dbt_params->data_bittiming)); 762 if (dbt_params->data_bittiming_const) /* IFLA_CAN_{,XL}_DATA_BITTIMING_CONST */ 763 size += nla_total_size(sizeof(*dbt_params->data_bittiming_const)); 764 if (dbt_params->data_bitrate_const) /* IFLA_CAN_{,XL}_DATA_BITRATE_CONST */ 765 size += nla_total_size(sizeof(*dbt_params->data_bitrate_const) * 766 dbt_params->data_bitrate_const_cnt); 767 size += can_tdc_get_size(dbt_params, tdc_flags);/* IFLA_CAN_{,XL}_TDC */ 768 769 return size; 770 } 771 772 static size_t can_ctrlmode_ext_get_size(void) 773 { 774 return nla_total_size(0) + /* nest IFLA_CAN_CTRLMODE_EXT */ 775 nla_total_size(sizeof(u32)); /* IFLA_CAN_CTRLMODE_SUPPORTED */ 776 } 777 778 static size_t can_pwm_get_size(const struct can_pwm_const *pwm_const, 779 bool pwm_on) 780 { 781 size_t size; 782 783 if (!pwm_const || !pwm_on) 784 return 0; 785 786 size = nla_total_size(0); /* nest IFLA_CAN_PWM */ 787 788 size += nla_total_size(sizeof(u32)); /* IFLA_CAN_PWM_PWMS_MIN */ 789 size += nla_total_size(sizeof(u32)); /* IFLA_CAN_PWM_PWMS_MAX */ 790 size += nla_total_size(sizeof(u32)); /* IFLA_CAN_PWM_PWML_MIN */ 791 size += nla_total_size(sizeof(u32)); /* IFLA_CAN_PWM_PWML_MAX */ 792 size += nla_total_size(sizeof(u32)); /* IFLA_CAN_PWM_PWMO_MIN */ 793 size += nla_total_size(sizeof(u32)); /* IFLA_CAN_PWM_PWMO_MAX */ 794 795 size += nla_total_size(sizeof(u32)); /* IFLA_CAN_PWM_PWMS */ 796 size += nla_total_size(sizeof(u32)); /* IFLA_CAN_PWM_PWML */ 797 size += nla_total_size(sizeof(u32)); /* IFLA_CAN_PWM_PWMO */ 798 799 return size; 800 } 801 802 static size_t can_get_size(const struct net_device *dev) 803 { 804 struct can_priv *priv = netdev_priv(dev); 805 size_t size = 0; 806 807 if (priv->bittiming.bitrate) /* IFLA_CAN_BITTIMING */ 808 size += nla_total_size(sizeof(struct can_bittiming)); 809 if (priv->bittiming_const) /* IFLA_CAN_BITTIMING_CONST */ 810 size += nla_total_size(sizeof(struct can_bittiming_const)); 811 size += nla_total_size(sizeof(struct can_clock)); /* IFLA_CAN_CLOCK */ 812 size += nla_total_size(sizeof(u32)); /* IFLA_CAN_STATE */ 813 size += nla_total_size(sizeof(struct can_ctrlmode)); /* IFLA_CAN_CTRLMODE */ 814 size += nla_total_size(sizeof(u32)); /* IFLA_CAN_RESTART_MS */ 815 if (priv->do_get_berr_counter) /* IFLA_CAN_BERR_COUNTER */ 816 size += nla_total_size(sizeof(struct can_berr_counter)); 817 if (priv->termination_const) { 818 size += nla_total_size(sizeof(priv->termination)); /* IFLA_CAN_TERMINATION */ 819 size += nla_total_size(sizeof(*priv->termination_const) * /* IFLA_CAN_TERMINATION_CONST */ 820 priv->termination_const_cnt); 821 } 822 if (priv->bitrate_const) /* IFLA_CAN_BITRATE_CONST */ 823 size += nla_total_size(sizeof(*priv->bitrate_const) * 824 priv->bitrate_const_cnt); 825 size += sizeof(priv->bitrate_max); /* IFLA_CAN_BITRATE_MAX */ 826 size += can_ctrlmode_ext_get_size(); /* IFLA_CAN_CTRLMODE_EXT */ 827 828 size += can_data_bittiming_get_size(&priv->fd, 829 priv->ctrlmode & CAN_CTRLMODE_FD_TDC_MASK); 830 831 size += can_data_bittiming_get_size(&priv->xl, 832 priv->ctrlmode & CAN_CTRLMODE_XL_TDC_MASK); 833 size += can_pwm_get_size(priv->xl.pwm_const, /* IFLA_CAN_XL_PWM */ 834 priv->ctrlmode & CAN_CTRLMODE_XL_TMS); 835 836 return size; 837 } 838 839 static int can_bittiming_fill_info(struct sk_buff *skb, int ifla_can_bittiming, 840 struct can_bittiming *bittiming) 841 { 842 return bittiming->bitrate != CAN_BITRATE_UNSET && 843 bittiming->bitrate != CAN_BITRATE_UNKNOWN && 844 nla_put(skb, ifla_can_bittiming, sizeof(*bittiming), bittiming); 845 } 846 847 static int can_bittiming_const_fill_info(struct sk_buff *skb, 848 int ifla_can_bittiming_const, 849 const struct can_bittiming_const *bittiming_const) 850 { 851 return bittiming_const && 852 nla_put(skb, ifla_can_bittiming_const, 853 sizeof(*bittiming_const), bittiming_const); 854 } 855 856 static int can_bitrate_const_fill_info(struct sk_buff *skb, 857 int ifla_can_bitrate_const, 858 const u32 *bitrate_const, unsigned int cnt) 859 { 860 return bitrate_const && 861 nla_put(skb, ifla_can_bitrate_const, 862 sizeof(*bitrate_const) * cnt, bitrate_const); 863 } 864 865 static int can_tdc_fill_info(struct sk_buff *skb, const struct net_device *dev, 866 int ifla_can_tdc) 867 { 868 struct can_priv *priv = netdev_priv(dev); 869 struct data_bittiming_params *dbt_params; 870 const struct can_tdc_const *tdc_const; 871 struct can_tdc *tdc; 872 struct nlattr *nest; 873 bool tdc_is_enabled, tdc_manual; 874 875 if (ifla_can_tdc == IFLA_CAN_TDC) { 876 dbt_params = &priv->fd; 877 tdc_is_enabled = can_fd_tdc_is_enabled(priv); 878 tdc_manual = priv->ctrlmode & CAN_CTRLMODE_TDC_MANUAL; 879 } else { 880 dbt_params = &priv->xl; 881 tdc_is_enabled = can_xl_tdc_is_enabled(priv); 882 tdc_manual = priv->ctrlmode & CAN_CTRLMODE_XL_TDC_MANUAL; 883 } 884 tdc_const = dbt_params->tdc_const; 885 tdc = &dbt_params->tdc; 886 887 if (!tdc_const) 888 return 0; 889 890 nest = nla_nest_start(skb, ifla_can_tdc); 891 if (!nest) 892 return -EMSGSIZE; 893 894 if (tdc_manual && 895 (nla_put_u32(skb, IFLA_CAN_TDC_TDCV_MIN, tdc_const->tdcv_min) || 896 nla_put_u32(skb, IFLA_CAN_TDC_TDCV_MAX, tdc_const->tdcv_max))) 897 goto err_cancel; 898 if (nla_put_u32(skb, IFLA_CAN_TDC_TDCO_MIN, tdc_const->tdco_min) || 899 nla_put_u32(skb, IFLA_CAN_TDC_TDCO_MAX, tdc_const->tdco_max)) 900 goto err_cancel; 901 if (tdc_const->tdcf_max && 902 (nla_put_u32(skb, IFLA_CAN_TDC_TDCF_MIN, tdc_const->tdcf_min) || 903 nla_put_u32(skb, IFLA_CAN_TDC_TDCF_MAX, tdc_const->tdcf_max))) 904 goto err_cancel; 905 906 if (tdc_is_enabled) { 907 u32 tdcv; 908 int err = -EINVAL; 909 910 if (tdc_manual) { 911 tdcv = tdc->tdcv; 912 err = 0; 913 } else if (dbt_params->do_get_auto_tdcv) { 914 err = dbt_params->do_get_auto_tdcv(dev, &tdcv); 915 } 916 if (!err && nla_put_u32(skb, IFLA_CAN_TDC_TDCV, tdcv)) 917 goto err_cancel; 918 if (nla_put_u32(skb, IFLA_CAN_TDC_TDCO, tdc->tdco)) 919 goto err_cancel; 920 if (tdc_const->tdcf_max && 921 nla_put_u32(skb, IFLA_CAN_TDC_TDCF, tdc->tdcf)) 922 goto err_cancel; 923 } 924 925 nla_nest_end(skb, nest); 926 return 0; 927 928 err_cancel: 929 nla_nest_cancel(skb, nest); 930 return -EMSGSIZE; 931 } 932 933 static int can_pwm_fill_info(struct sk_buff *skb, const struct can_priv *priv) 934 { 935 const struct can_pwm_const *pwm_const = priv->xl.pwm_const; 936 const struct can_pwm *pwm = &priv->xl.pwm; 937 struct nlattr *nest; 938 939 if (!pwm_const) 940 return 0; 941 942 nest = nla_nest_start(skb, IFLA_CAN_XL_PWM); 943 if (!nest) 944 return -EMSGSIZE; 945 946 if (nla_put_u32(skb, IFLA_CAN_PWM_PWMS_MIN, pwm_const->pwms_min) || 947 nla_put_u32(skb, IFLA_CAN_PWM_PWMS_MAX, pwm_const->pwms_max) || 948 nla_put_u32(skb, IFLA_CAN_PWM_PWML_MIN, pwm_const->pwml_min) || 949 nla_put_u32(skb, IFLA_CAN_PWM_PWML_MAX, pwm_const->pwml_max) || 950 nla_put_u32(skb, IFLA_CAN_PWM_PWMO_MIN, pwm_const->pwmo_min) || 951 nla_put_u32(skb, IFLA_CAN_PWM_PWMO_MAX, pwm_const->pwmo_max)) 952 goto err_cancel; 953 954 if (priv->ctrlmode & CAN_CTRLMODE_XL_TMS) { 955 if (nla_put_u32(skb, IFLA_CAN_PWM_PWMS, pwm->pwms) || 956 nla_put_u32(skb, IFLA_CAN_PWM_PWML, pwm->pwml) || 957 nla_put_u32(skb, IFLA_CAN_PWM_PWMO, pwm->pwmo)) 958 goto err_cancel; 959 } 960 961 nla_nest_end(skb, nest); 962 return 0; 963 964 err_cancel: 965 nla_nest_cancel(skb, nest); 966 return -EMSGSIZE; 967 } 968 969 static int can_ctrlmode_ext_fill_info(struct sk_buff *skb, 970 const struct can_priv *priv) 971 { 972 struct nlattr *nest; 973 974 nest = nla_nest_start(skb, IFLA_CAN_CTRLMODE_EXT); 975 if (!nest) 976 return -EMSGSIZE; 977 978 if (nla_put_u32(skb, IFLA_CAN_CTRLMODE_SUPPORTED, 979 priv->ctrlmode_supported)) { 980 nla_nest_cancel(skb, nest); 981 return -EMSGSIZE; 982 } 983 984 nla_nest_end(skb, nest); 985 return 0; 986 } 987 988 static int can_fill_info(struct sk_buff *skb, const struct net_device *dev) 989 { 990 struct can_priv *priv = netdev_priv(dev); 991 struct can_ctrlmode cm = {.flags = priv->ctrlmode}; 992 struct can_berr_counter bec = { }; 993 enum can_state state = priv->state; 994 995 if (priv->do_get_state) 996 priv->do_get_state(dev, &state); 997 998 if (can_bittiming_fill_info(skb, IFLA_CAN_BITTIMING, 999 &priv->bittiming) || 1000 1001 can_bittiming_const_fill_info(skb, IFLA_CAN_BITTIMING_CONST, 1002 priv->bittiming_const) || 1003 1004 nla_put(skb, IFLA_CAN_CLOCK, sizeof(priv->clock), &priv->clock) || 1005 nla_put_u32(skb, IFLA_CAN_STATE, state) || 1006 nla_put(skb, IFLA_CAN_CTRLMODE, sizeof(cm), &cm) || 1007 nla_put_u32(skb, IFLA_CAN_RESTART_MS, priv->restart_ms) || 1008 1009 (priv->do_get_berr_counter && 1010 !priv->do_get_berr_counter(dev, &bec) && 1011 nla_put(skb, IFLA_CAN_BERR_COUNTER, sizeof(bec), &bec)) || 1012 1013 can_bittiming_fill_info(skb, IFLA_CAN_DATA_BITTIMING, 1014 &priv->fd.data_bittiming) || 1015 1016 can_bittiming_const_fill_info(skb, IFLA_CAN_DATA_BITTIMING_CONST, 1017 priv->fd.data_bittiming_const) || 1018 1019 (priv->termination_const && 1020 (nla_put_u16(skb, IFLA_CAN_TERMINATION, priv->termination) || 1021 nla_put(skb, IFLA_CAN_TERMINATION_CONST, 1022 sizeof(*priv->termination_const) * 1023 priv->termination_const_cnt, 1024 priv->termination_const))) || 1025 1026 can_bitrate_const_fill_info(skb, IFLA_CAN_BITRATE_CONST, 1027 priv->bitrate_const, 1028 priv->bitrate_const_cnt) || 1029 1030 can_bitrate_const_fill_info(skb, IFLA_CAN_DATA_BITRATE_CONST, 1031 priv->fd.data_bitrate_const, 1032 priv->fd.data_bitrate_const_cnt) || 1033 1034 (nla_put(skb, IFLA_CAN_BITRATE_MAX, 1035 sizeof(priv->bitrate_max), 1036 &priv->bitrate_max)) || 1037 1038 can_tdc_fill_info(skb, dev, IFLA_CAN_TDC) || 1039 1040 can_ctrlmode_ext_fill_info(skb, priv) || 1041 1042 can_bittiming_fill_info(skb, IFLA_CAN_XL_DATA_BITTIMING, 1043 &priv->xl.data_bittiming) || 1044 1045 can_bittiming_const_fill_info(skb, IFLA_CAN_XL_DATA_BITTIMING_CONST, 1046 priv->xl.data_bittiming_const) || 1047 1048 can_bitrate_const_fill_info(skb, IFLA_CAN_XL_DATA_BITRATE_CONST, 1049 priv->xl.data_bitrate_const, 1050 priv->xl.data_bitrate_const_cnt) || 1051 1052 can_tdc_fill_info(skb, dev, IFLA_CAN_XL_TDC) || 1053 1054 can_pwm_fill_info(skb, priv) 1055 ) 1056 return -EMSGSIZE; 1057 1058 return 0; 1059 } 1060 1061 static size_t can_get_xstats_size(const struct net_device *dev) 1062 { 1063 return sizeof(struct can_device_stats); 1064 } 1065 1066 static int can_fill_xstats(struct sk_buff *skb, const struct net_device *dev) 1067 { 1068 struct can_priv *priv = netdev_priv(dev); 1069 1070 if (nla_put(skb, IFLA_INFO_XSTATS, 1071 sizeof(priv->can_stats), &priv->can_stats)) 1072 goto nla_put_failure; 1073 return 0; 1074 1075 nla_put_failure: 1076 return -EMSGSIZE; 1077 } 1078 1079 static int can_newlink(struct net_device *dev, 1080 struct rtnl_newlink_params *params, 1081 struct netlink_ext_ack *extack) 1082 { 1083 return -EOPNOTSUPP; 1084 } 1085 1086 static void can_dellink(struct net_device *dev, struct list_head *head) 1087 { 1088 } 1089 1090 struct rtnl_link_ops can_link_ops __read_mostly = { 1091 .kind = "can", 1092 .netns_refund = true, 1093 .maxtype = IFLA_CAN_MAX, 1094 .policy = can_policy, 1095 .setup = can_setup, 1096 .validate = can_validate, 1097 .newlink = can_newlink, 1098 .changelink = can_changelink, 1099 .dellink = can_dellink, 1100 .get_size = can_get_size, 1101 .fill_info = can_fill_info, 1102 .get_xstats_size = can_get_xstats_size, 1103 .fill_xstats = can_fill_xstats, 1104 }; 1105 1106 int can_netlink_register(void) 1107 { 1108 return rtnl_link_register(&can_link_ops); 1109 } 1110 1111 void can_netlink_unregister(void) 1112 { 1113 rtnl_link_unregister(&can_link_ops); 1114 } 1115