1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef __PERF_MEM_EVENTS_H 3 #define __PERF_MEM_EVENTS_H 4 5 #include <stdbool.h> 6 #include <linux/types.h> 7 8 struct perf_mem_event { 9 bool supported; 10 bool ldlat; 11 u32 aux_event; 12 const char *tag; 13 const char *name; 14 const char *event_name; 15 }; 16 17 enum { 18 PERF_MEM_EVENTS__LOAD, 19 PERF_MEM_EVENTS__STORE, 20 PERF_MEM_EVENTS__LOAD_STORE, 21 PERF_MEM_EVENTS__MAX, 22 }; 23 24 struct evsel; 25 struct mem_info; 26 struct perf_pmu; 27 28 extern unsigned int perf_mem_events__loads_ldlat; 29 extern struct perf_mem_event perf_mem_events[PERF_MEM_EVENTS__MAX]; 30 extern bool perf_mem_record[PERF_MEM_EVENTS__MAX]; 31 32 int perf_pmu__mem_events_parse(struct perf_pmu *pmu, const char *str); 33 int perf_pmu__mem_events_init(void); 34 35 struct perf_mem_event *perf_pmu__mem_events_ptr(struct perf_pmu *pmu, int i); 36 struct perf_pmu *perf_mem_events_find_pmu(void); 37 int perf_pmu__mem_events_num_mem_pmus(struct perf_pmu *pmu); 38 bool is_mem_loads_aux_event(struct evsel *leader); 39 40 void perf_pmu__mem_events_list(struct perf_pmu *pmu); 41 int perf_mem_events__record_args(const char **rec_argv, int *argv_nr, 42 char **event_name_storage_out); 43 44 int perf_mem__tlb_scnprintf(char *out, size_t sz, const struct mem_info *mem_info); 45 int perf_mem__lvl_scnprintf(char *out, size_t sz, const struct mem_info *mem_info); 46 int perf_mem__snp_scnprintf(char *out, size_t sz, const struct mem_info *mem_info); 47 int perf_mem__lck_scnprintf(char *out, size_t sz, const struct mem_info *mem_info); 48 int perf_mem__blk_scnprintf(char *out, size_t sz, const struct mem_info *mem_info); 49 50 int perf_script__meminfo_scnprintf(char *bf, size_t size, const struct mem_info *mem_info); 51 52 struct c2c_stats { 53 u32 nr_entries; 54 55 u32 locks; /* count of 'lock' transactions */ 56 u32 store; /* count of all stores in trace */ 57 u32 st_uncache; /* stores to uncacheable address */ 58 u32 st_noadrs; /* cacheable store with no address */ 59 u32 st_l1hit; /* count of stores that hit L1D */ 60 u32 st_l1miss; /* count of stores that miss L1D */ 61 u32 st_na; /* count of stores with memory level is not available */ 62 u32 load; /* count of all loads in trace */ 63 u32 ld_excl; /* exclusive loads, rmt/lcl DRAM - snp none/miss */ 64 u32 ld_shared; /* shared loads, rmt/lcl DRAM - snp hit */ 65 u32 ld_uncache; /* loads to uncacheable address */ 66 u32 ld_io; /* loads to io address */ 67 u32 ld_miss; /* loads miss */ 68 u32 ld_noadrs; /* cacheable load with no address */ 69 u32 ld_fbhit; /* count of loads hitting Fill Buffer */ 70 u32 ld_l1hit; /* count of loads that hit L1D */ 71 u32 ld_l2hit; /* count of loads that hit L2D */ 72 u32 ld_llchit; /* count of loads that hit LLC */ 73 u32 lcl_hitm; /* count of loads with local HITM */ 74 u32 rmt_hitm; /* count of loads with remote HITM */ 75 u32 tot_hitm; /* count of loads with local and remote HITM */ 76 u32 lcl_peer; /* count of loads with local peer cache */ 77 u32 rmt_peer; /* count of loads with remote peer cache */ 78 u32 tot_peer; /* count of loads with local and remote peer cache */ 79 u32 rmt_hit; /* count of loads with remote hit clean; */ 80 u32 lcl_dram; /* count of loads miss to local DRAM */ 81 u32 rmt_dram; /* count of loads miss to remote DRAM */ 82 u32 blk_data; /* count of loads blocked by data */ 83 u32 blk_addr; /* count of loads blocked by address conflict */ 84 u32 nomap; /* count of load/stores with no phys addrs */ 85 u32 noparse; /* count of unparsable data sources */ 86 }; 87 88 struct hist_entry; 89 int c2c_decode_stats(struct c2c_stats *stats, struct mem_info *mi); 90 void c2c_add_stats(struct c2c_stats *stats, struct c2c_stats *add); 91 92 enum mem_stat_type { 93 PERF_MEM_STAT_OP, 94 PERF_MEM_STAT_CACHE, 95 PERF_MEM_STAT_MEMORY, 96 PERF_MEM_STAT_SNOOP, 97 PERF_MEM_STAT_DTLB, 98 }; 99 100 #define MEM_STAT_PRINT_LEN 7 /* 1 space + 5 digits + 1 percent sign */ 101 102 enum mem_stat_op { 103 MEM_STAT_OP_LOAD, 104 MEM_STAT_OP_STORE, 105 MEM_STAT_OP_LDST, 106 MEM_STAT_OP_PFETCH, 107 MEM_STAT_OP_EXEC, 108 MEM_STAT_OP_OTHER, 109 }; 110 111 enum mem_stat_cache { 112 MEM_STAT_CACHE_L1, 113 MEM_STAT_CACHE_L2, 114 MEM_STAT_CACHE_L3, 115 MEM_STAT_CACHE_L4, 116 MEM_STAT_CACHE_L1_BUF, 117 MEM_STAT_CACHE_L2_BUF, 118 MEM_STAT_CACHE_OTHER, 119 }; 120 121 enum mem_stat_memory { 122 MEM_STAT_MEMORY_RAM, 123 MEM_STAT_MEMORY_MSC, 124 MEM_STAT_MEMORY_UNC, 125 MEM_STAT_MEMORY_CXL, 126 MEM_STAT_MEMORY_IO, 127 MEM_STAT_MEMORY_PMEM, 128 MEM_STAT_MEMORY_OTHER, 129 }; 130 131 enum mem_stat_snoop { 132 MEM_STAT_SNOOP_HIT, 133 MEM_STAT_SNOOP_HITM, 134 MEM_STAT_SNOOP_MISS, 135 MEM_STAT_SNOOP_OTHER, 136 }; 137 138 enum mem_stat_dtlb { 139 MEM_STAT_DTLB_L1_HIT, 140 MEM_STAT_DTLB_L2_HIT, 141 MEM_STAT_DTLB_ANY_HIT, 142 MEM_STAT_DTLB_MISS, 143 MEM_STAT_DTLB_OTHER, 144 }; 145 146 int mem_stat_index(const enum mem_stat_type mst, const u64 data_src); 147 const char *mem_stat_name(const enum mem_stat_type mst, const int idx); 148 149 #endif /* __PERF_MEM_EVENTS_H */ 150