1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * mcp3422.c - driver for the Microchip mcp3421/2/3/4/5/6/7/8 chip family
4 *
5 * Copyright (C) 2013, Angelo Compagnucci
6 * Author: Angelo Compagnucci <angelo.compagnucci@gmail.com>
7 *
8 * Datasheet: http://ww1.microchip.com/downloads/en/devicedoc/22088b.pdf
9 * https://ww1.microchip.com/downloads/en/DeviceDoc/22226a.pdf
10 * https://ww1.microchip.com/downloads/en/DeviceDoc/22072b.pdf
11 *
12 * This driver exports the value of analog input voltage to sysfs, the
13 * voltage unit is nV.
14 */
15
16 #include <linux/bitfield.h>
17 #include <linux/bits.h>
18 #include <linux/err.h>
19 #include <linux/i2c.h>
20 #include <linux/module.h>
21 #include <linux/delay.h>
22 #include <linux/sysfs.h>
23 #include <linux/unaligned.h>
24
25 #include <linux/iio/iio.h>
26 #include <linux/iio/sysfs.h>
27
28 #define MCP3422_CHANNEL_MASK GENMASK(6, 5)
29 #define MCP3422_SRATE_MASK GENMASK(3, 2)
30 #define MCP3422_PGA_MASK GENMASK(1, 0)
31
32 #define MCP3422_SRATE_240 0x0
33 #define MCP3422_SRATE_60 0x1
34 #define MCP3422_SRATE_15 0x2
35 #define MCP3422_SRATE_3 0x3
36 #define MCP3422_PGA_1 0
37 #define MCP3422_PGA_2 1
38 #define MCP3422_PGA_4 2
39 #define MCP3422_PGA_8 3
40 #define MCP3422_CONT_SAMPLING BIT(4)
41
42 #define MCP3422_CHAN(_index) \
43 { \
44 .type = IIO_VOLTAGE, \
45 .indexed = 1, \
46 .channel = _index, \
47 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \
48 | BIT(IIO_CHAN_INFO_SCALE), \
49 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
50 }
51
52 static const int mcp3422_scales[4][4] = {
53 { 1000000, 500000, 250000, 125000 },
54 { 250000, 125000, 62500, 31250 },
55 { 62500, 31250, 15625, 7812 },
56 { 15625, 7812, 3906, 1953 } };
57
58 /* Constant msleep times for data acquisitions */
59 static const int mcp3422_read_times[4] = {
60 [MCP3422_SRATE_240] = 1000 / 240,
61 [MCP3422_SRATE_60] = 1000 / 60,
62 [MCP3422_SRATE_15] = 1000 / 15,
63 [MCP3422_SRATE_3] = 1000 / 3 };
64
65 /* sample rates to integer conversion table */
66 static const int mcp3422_sample_rates[4] = {
67 [MCP3422_SRATE_240] = 240,
68 [MCP3422_SRATE_60] = 60,
69 [MCP3422_SRATE_15] = 15,
70 [MCP3422_SRATE_3] = 3 };
71
72 /* sample rates to sign extension table */
73 static const int mcp3422_sign_extend[4] = {
74 [MCP3422_SRATE_240] = 11,
75 [MCP3422_SRATE_60] = 13,
76 [MCP3422_SRATE_15] = 15,
77 [MCP3422_SRATE_3] = 17 };
78
79 /* Client data (each client gets its own) */
80 struct mcp3422 {
81 struct i2c_client *i2c;
82 u8 id;
83 u8 config;
84 u8 pga[4];
85 struct mutex lock;
86 };
87
mcp3422_update_config(struct mcp3422 * adc,u8 newconfig)88 static int mcp3422_update_config(struct mcp3422 *adc, u8 newconfig)
89 {
90 int ret;
91
92 ret = i2c_master_send(adc->i2c, &newconfig, 1);
93 if (ret > 0) {
94 adc->config = newconfig;
95 ret = 0;
96 }
97
98 return ret;
99 }
100
mcp3422_read(struct mcp3422 * adc,int * value,u8 * config)101 static int mcp3422_read(struct mcp3422 *adc, int *value, u8 *config)
102 {
103 int ret = 0;
104 u8 sample_rate = FIELD_GET(MCP3422_SRATE_MASK, adc->config);
105 u8 buf[4] = {0, 0, 0, 0};
106 u32 temp;
107
108 if (sample_rate == MCP3422_SRATE_3) {
109 ret = i2c_master_recv(adc->i2c, buf, 4);
110 temp = get_unaligned_be24(&buf[0]);
111 *config = buf[3];
112 } else {
113 ret = i2c_master_recv(adc->i2c, buf, 3);
114 temp = get_unaligned_be16(&buf[0]);
115 *config = buf[2];
116 }
117
118 *value = sign_extend32(temp, mcp3422_sign_extend[sample_rate]);
119
120 return ret;
121 }
122
mcp3422_read_channel(struct mcp3422 * adc,struct iio_chan_spec const * channel,int * value)123 static int mcp3422_read_channel(struct mcp3422 *adc,
124 struct iio_chan_spec const *channel, int *value)
125 {
126 int ret;
127 u8 config;
128 u8 req_channel = channel->channel;
129
130 mutex_lock(&adc->lock);
131
132 if (req_channel != FIELD_GET(MCP3422_CHANNEL_MASK, adc->config)) {
133 config = adc->config;
134
135 FIELD_MODIFY(MCP3422_CHANNEL_MASK, &config, req_channel);
136 FIELD_MODIFY(MCP3422_PGA_MASK, &config, adc->pga[req_channel]);
137
138 ret = mcp3422_update_config(adc, config);
139 if (ret < 0) {
140 mutex_unlock(&adc->lock);
141 return ret;
142 }
143 msleep(mcp3422_read_times[FIELD_GET(MCP3422_SRATE_MASK, adc->config)]);
144 }
145
146 ret = mcp3422_read(adc, value, &config);
147
148 mutex_unlock(&adc->lock);
149
150 return ret;
151 }
152
mcp3422_read_raw(struct iio_dev * iio,struct iio_chan_spec const * channel,int * val1,int * val2,long mask)153 static int mcp3422_read_raw(struct iio_dev *iio,
154 struct iio_chan_spec const *channel, int *val1,
155 int *val2, long mask)
156 {
157 struct mcp3422 *adc = iio_priv(iio);
158 int err;
159 u8 sample_rate = FIELD_GET(MCP3422_SRATE_MASK, adc->config);
160 u8 pga = FIELD_GET(MCP3422_PGA_MASK, adc->config);
161
162 switch (mask) {
163 case IIO_CHAN_INFO_RAW:
164 err = mcp3422_read_channel(adc, channel, val1);
165 if (err < 0)
166 return -EINVAL;
167 return IIO_VAL_INT;
168
169 case IIO_CHAN_INFO_SCALE:
170
171 *val1 = 0;
172 *val2 = mcp3422_scales[sample_rate][pga];
173 return IIO_VAL_INT_PLUS_NANO;
174
175 case IIO_CHAN_INFO_SAMP_FREQ:
176 *val1 = mcp3422_sample_rates[FIELD_GET(MCP3422_SRATE_MASK, adc->config)];
177 return IIO_VAL_INT;
178
179 default:
180 break;
181 }
182
183 return -EINVAL;
184 }
185
mcp3422_write_raw(struct iio_dev * iio,struct iio_chan_spec const * channel,int val1,int val2,long mask)186 static int mcp3422_write_raw(struct iio_dev *iio,
187 struct iio_chan_spec const *channel, int val1,
188 int val2, long mask)
189 {
190 struct mcp3422 *adc = iio_priv(iio);
191 u8 temp;
192 u8 config = adc->config;
193 u8 req_channel = channel->channel;
194 u8 sample_rate = FIELD_GET(MCP3422_SRATE_MASK, config);
195 u8 i;
196
197 switch (mask) {
198 case IIO_CHAN_INFO_SCALE:
199 if (val1 != 0)
200 return -EINVAL;
201
202 for (i = 0; i < ARRAY_SIZE(mcp3422_scales[0]); i++) {
203 if (val2 == mcp3422_scales[sample_rate][i]) {
204 adc->pga[req_channel] = i;
205
206 FIELD_MODIFY(MCP3422_CHANNEL_MASK, &config, req_channel);
207 FIELD_MODIFY(MCP3422_PGA_MASK, &config, adc->pga[req_channel]);
208
209 return mcp3422_update_config(adc, config);
210 }
211 }
212 return -EINVAL;
213
214 case IIO_CHAN_INFO_SAMP_FREQ:
215 switch (val1) {
216 case 240:
217 temp = MCP3422_SRATE_240;
218 break;
219 case 60:
220 temp = MCP3422_SRATE_60;
221 break;
222 case 15:
223 temp = MCP3422_SRATE_15;
224 break;
225 case 3:
226 if (adc->id > 4)
227 return -EINVAL;
228 temp = MCP3422_SRATE_3;
229 break;
230 default:
231 return -EINVAL;
232 }
233
234 FIELD_MODIFY(MCP3422_CHANNEL_MASK, &config, req_channel);
235 FIELD_MODIFY(MCP3422_SRATE_MASK, &config, temp);
236
237 return mcp3422_update_config(adc, config);
238
239 default:
240 break;
241 }
242
243 return -EINVAL;
244 }
245
mcp3422_write_raw_get_fmt(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,long mask)246 static int mcp3422_write_raw_get_fmt(struct iio_dev *indio_dev,
247 struct iio_chan_spec const *chan, long mask)
248 {
249 switch (mask) {
250 case IIO_CHAN_INFO_SCALE:
251 return IIO_VAL_INT_PLUS_NANO;
252 case IIO_CHAN_INFO_SAMP_FREQ:
253 return IIO_VAL_INT_PLUS_MICRO;
254 default:
255 return -EINVAL;
256 }
257 }
258
mcp3422_show_samp_freqs(struct device * dev,struct device_attribute * attr,char * buf)259 static ssize_t mcp3422_show_samp_freqs(struct device *dev,
260 struct device_attribute *attr, char *buf)
261 {
262 struct mcp3422 *adc = iio_priv(dev_to_iio_dev(dev));
263
264 if (adc->id > 4)
265 return sprintf(buf, "240 60 15\n");
266
267 return sprintf(buf, "240 60 15 3\n");
268 }
269
mcp3422_show_scales(struct device * dev,struct device_attribute * attr,char * buf)270 static ssize_t mcp3422_show_scales(struct device *dev,
271 struct device_attribute *attr, char *buf)
272 {
273 struct mcp3422 *adc = iio_priv(dev_to_iio_dev(dev));
274 u8 sample_rate = FIELD_GET(MCP3422_SRATE_MASK, adc->config);
275
276 return sprintf(buf, "0.%09u 0.%09u 0.%09u 0.%09u\n",
277 mcp3422_scales[sample_rate][0],
278 mcp3422_scales[sample_rate][1],
279 mcp3422_scales[sample_rate][2],
280 mcp3422_scales[sample_rate][3]);
281 }
282
283 static IIO_DEVICE_ATTR(sampling_frequency_available, S_IRUGO,
284 mcp3422_show_samp_freqs, NULL, 0);
285 static IIO_DEVICE_ATTR(in_voltage_scale_available, S_IRUGO,
286 mcp3422_show_scales, NULL, 0);
287
288 static struct attribute *mcp3422_attributes[] = {
289 &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
290 &iio_dev_attr_in_voltage_scale_available.dev_attr.attr,
291 NULL,
292 };
293
294 static const struct attribute_group mcp3422_attribute_group = {
295 .attrs = mcp3422_attributes,
296 };
297
298 static const struct iio_chan_spec mcp3421_channels[] = {
299 MCP3422_CHAN(0),
300 };
301
302 static const struct iio_chan_spec mcp3422_channels[] = {
303 MCP3422_CHAN(0),
304 MCP3422_CHAN(1),
305 };
306
307 static const struct iio_chan_spec mcp3424_channels[] = {
308 MCP3422_CHAN(0),
309 MCP3422_CHAN(1),
310 MCP3422_CHAN(2),
311 MCP3422_CHAN(3),
312 };
313
314 static const struct iio_info mcp3422_info = {
315 .read_raw = mcp3422_read_raw,
316 .write_raw = mcp3422_write_raw,
317 .write_raw_get_fmt = mcp3422_write_raw_get_fmt,
318 .attrs = &mcp3422_attribute_group,
319 };
320
mcp3422_probe(struct i2c_client * client)321 static int mcp3422_probe(struct i2c_client *client)
322 {
323 const struct i2c_device_id *id = i2c_client_get_device_id(client);
324 struct iio_dev *indio_dev;
325 struct mcp3422 *adc;
326 int err;
327 u8 config;
328
329 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
330 return -EOPNOTSUPP;
331
332 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*adc));
333 if (!indio_dev)
334 return -ENOMEM;
335
336 adc = iio_priv(indio_dev);
337 adc->i2c = client;
338 adc->id = (u8)(id->driver_data);
339
340 mutex_init(&adc->lock);
341
342 indio_dev->name = dev_name(&client->dev);
343 indio_dev->modes = INDIO_DIRECT_MODE;
344 indio_dev->info = &mcp3422_info;
345
346 switch (adc->id) {
347 case 1:
348 case 5:
349 indio_dev->channels = mcp3421_channels;
350 indio_dev->num_channels = ARRAY_SIZE(mcp3421_channels);
351 break;
352 case 2:
353 case 3:
354 case 6:
355 case 7:
356 indio_dev->channels = mcp3422_channels;
357 indio_dev->num_channels = ARRAY_SIZE(mcp3422_channels);
358 break;
359 case 4:
360 case 8:
361 indio_dev->channels = mcp3424_channels;
362 indio_dev->num_channels = ARRAY_SIZE(mcp3424_channels);
363 break;
364 }
365
366 /* meaningful default configuration */
367 config = MCP3422_CONT_SAMPLING |
368 FIELD_PREP(MCP3422_CHANNEL_MASK, 0) |
369 FIELD_PREP(MCP3422_PGA_MASK, MCP3422_PGA_1) |
370 FIELD_PREP(MCP3422_SRATE_MASK, MCP3422_SRATE_240);
371 err = mcp3422_update_config(adc, config);
372 if (err < 0)
373 return err;
374
375 err = devm_iio_device_register(&client->dev, indio_dev);
376 if (err < 0)
377 return err;
378
379 i2c_set_clientdata(client, indio_dev);
380
381 return 0;
382 }
383
384 static const struct i2c_device_id mcp3422_id[] = {
385 { .name = "mcp3421", .driver_data = 1 },
386 { .name = "mcp3422", .driver_data = 2 },
387 { .name = "mcp3423", .driver_data = 3 },
388 { .name = "mcp3424", .driver_data = 4 },
389 { .name = "mcp3425", .driver_data = 5 },
390 { .name = "mcp3426", .driver_data = 6 },
391 { .name = "mcp3427", .driver_data = 7 },
392 { .name = "mcp3428", .driver_data = 8 },
393 { }
394 };
395 MODULE_DEVICE_TABLE(i2c, mcp3422_id);
396
397 static const struct of_device_id mcp3422_of_match[] = {
398 { .compatible = "mcp3422" },
399 { }
400 };
401 MODULE_DEVICE_TABLE(of, mcp3422_of_match);
402
403 static struct i2c_driver mcp3422_driver = {
404 .driver = {
405 .name = "mcp3422",
406 .of_match_table = mcp3422_of_match,
407 },
408 .probe = mcp3422_probe,
409 .id_table = mcp3422_id,
410 };
411 module_i2c_driver(mcp3422_driver);
412
413 MODULE_AUTHOR("Angelo Compagnucci <angelo.compagnucci@gmail.com>");
414 MODULE_DESCRIPTION("Microchip mcp3421/2/3/4/5/6/7/8 driver");
415 MODULE_LICENSE("GPL v2");
416