1 // SPDX-License-Identifier: GPL-2.0-only 2 /****************************************************************************** 3 * 4 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved. 5 * 6 * Portions of this file are derived from the ipw3945 project, as well 7 * as portions of the ieee80211 subsystem header files. 8 * 9 * Contact Information: 10 * Intel Linux Wireless <ilw@linux.intel.com> 11 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 12 * 13 *****************************************************************************/ 14 15 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 16 17 #include <linux/kernel.h> 18 #include <linux/module.h> 19 #include <linux/init.h> 20 #include <linux/pci.h> 21 #include <linux/slab.h> 22 #include <linux/dma-mapping.h> 23 #include <linux/delay.h> 24 #include <linux/sched.h> 25 #include <linux/skbuff.h> 26 #include <linux/netdevice.h> 27 #include <linux/firmware.h> 28 #include <linux/etherdevice.h> 29 #include <linux/if_arp.h> 30 31 #include <net/ieee80211_radiotap.h> 32 #include <net/mac80211.h> 33 34 #include <asm/div64.h> 35 36 #define DRV_NAME "iwl3945" 37 38 #include "commands.h" 39 #include "common.h" 40 #include "3945.h" 41 #include "iwl-spectrum.h" 42 43 /* 44 * module name, copyright, version, etc. 45 */ 46 47 #define DRV_DESCRIPTION \ 48 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux" 49 50 #ifdef CONFIG_IWLEGACY_DEBUG 51 #define VD "d" 52 #else 53 #define VD 54 #endif 55 56 /* 57 * add "s" to indicate spectrum measurement included. 58 * we add it here to be consistent with previous releases in which 59 * this was configurable. 60 */ 61 #define DRV_VERSION IWLWIFI_VERSION VD "s" 62 #define DRV_COPYRIGHT "Copyright(c) 2003-2011 Intel Corporation" 63 #define DRV_AUTHOR "<ilw@linux.intel.com>" 64 65 MODULE_DESCRIPTION(DRV_DESCRIPTION); 66 MODULE_VERSION(DRV_VERSION); 67 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR); 68 MODULE_LICENSE("GPL"); 69 70 /* module parameters */ 71 struct il_mod_params il3945_mod_params = { 72 .sw_crypto = 1, 73 .restart_fw = 1, 74 .disable_hw_scan = 1, 75 /* the rest are 0 by default */ 76 }; 77 78 /** 79 * il3945_get_antenna_flags - Get antenna flags for RXON command 80 * @il: eeprom and antenna fields are used to determine antenna flags 81 * 82 * il->eeprom39 is used to determine if antenna AUX/MAIN are reversed 83 * il3945_mod_params.antenna specifies the antenna diversity mode: 84 * 85 * IL_ANTENNA_DIVERSITY - NIC selects best antenna by itself 86 * IL_ANTENNA_MAIN - Force MAIN antenna 87 * IL_ANTENNA_AUX - Force AUX antenna 88 */ 89 __le32 90 il3945_get_antenna_flags(const struct il_priv *il) 91 { 92 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom; 93 94 switch (il3945_mod_params.antenna) { 95 case IL_ANTENNA_DIVERSITY: 96 return 0; 97 98 case IL_ANTENNA_MAIN: 99 if (eeprom->antenna_switch_type) 100 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK; 101 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK; 102 103 case IL_ANTENNA_AUX: 104 if (eeprom->antenna_switch_type) 105 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK; 106 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK; 107 } 108 109 /* bad antenna selector value */ 110 IL_ERR("Bad antenna selector value (0x%x)\n", 111 il3945_mod_params.antenna); 112 113 return 0; /* "diversity" is default if error */ 114 } 115 116 static int 117 il3945_set_ccmp_dynamic_key_info(struct il_priv *il, 118 struct ieee80211_key_conf *keyconf, u8 sta_id) 119 { 120 unsigned long flags; 121 __le16 key_flags = 0; 122 int ret; 123 124 key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK); 125 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS); 126 127 if (sta_id == il->hw_params.bcast_id) 128 key_flags |= STA_KEY_MULTICAST_MSK; 129 130 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV; 131 keyconf->hw_key_idx = keyconf->keyidx; 132 key_flags &= ~STA_KEY_FLG_INVALID; 133 134 spin_lock_irqsave(&il->sta_lock, flags); 135 il->stations[sta_id].keyinfo.cipher = keyconf->cipher; 136 il->stations[sta_id].keyinfo.keylen = keyconf->keylen; 137 memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, keyconf->keylen); 138 139 memcpy(il->stations[sta_id].sta.key.key, keyconf->key, keyconf->keylen); 140 141 if ((il->stations[sta_id].sta.key. 142 key_flags & STA_KEY_FLG_ENCRYPT_MSK) == STA_KEY_FLG_NO_ENC) 143 il->stations[sta_id].sta.key.key_offset = 144 il_get_free_ucode_key_idx(il); 145 /* else, we are overriding an existing key => no need to allocated room 146 * in uCode. */ 147 148 WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET, 149 "no space for a new key"); 150 151 il->stations[sta_id].sta.key.key_flags = key_flags; 152 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; 153 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; 154 155 D_INFO("hwcrypto: modify ucode station key info\n"); 156 157 ret = il_send_add_sta(il, &il->stations[sta_id].sta, CMD_ASYNC); 158 159 spin_unlock_irqrestore(&il->sta_lock, flags); 160 161 return ret; 162 } 163 164 static int 165 il3945_set_tkip_dynamic_key_info(struct il_priv *il, 166 struct ieee80211_key_conf *keyconf, u8 sta_id) 167 { 168 return -EOPNOTSUPP; 169 } 170 171 static int 172 il3945_set_wep_dynamic_key_info(struct il_priv *il, 173 struct ieee80211_key_conf *keyconf, u8 sta_id) 174 { 175 return -EOPNOTSUPP; 176 } 177 178 static int 179 il3945_clear_sta_key_info(struct il_priv *il, u8 sta_id) 180 { 181 unsigned long flags; 182 struct il_addsta_cmd sta_cmd; 183 184 spin_lock_irqsave(&il->sta_lock, flags); 185 memset(&il->stations[sta_id].keyinfo, 0, sizeof(struct il_hw_key)); 186 memset(&il->stations[sta_id].sta.key, 0, sizeof(struct il4965_keyinfo)); 187 il->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC; 188 il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; 189 il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; 190 memcpy(&sta_cmd, &il->stations[sta_id].sta, 191 sizeof(struct il_addsta_cmd)); 192 spin_unlock_irqrestore(&il->sta_lock, flags); 193 194 D_INFO("hwcrypto: clear ucode station key info\n"); 195 return il_send_add_sta(il, &sta_cmd, CMD_SYNC); 196 } 197 198 static int 199 il3945_set_dynamic_key(struct il_priv *il, struct ieee80211_key_conf *keyconf, 200 u8 sta_id) 201 { 202 int ret = 0; 203 204 keyconf->hw_key_idx = HW_KEY_DYNAMIC; 205 206 switch (keyconf->cipher) { 207 case WLAN_CIPHER_SUITE_CCMP: 208 ret = il3945_set_ccmp_dynamic_key_info(il, keyconf, sta_id); 209 break; 210 case WLAN_CIPHER_SUITE_TKIP: 211 ret = il3945_set_tkip_dynamic_key_info(il, keyconf, sta_id); 212 break; 213 case WLAN_CIPHER_SUITE_WEP40: 214 case WLAN_CIPHER_SUITE_WEP104: 215 ret = il3945_set_wep_dynamic_key_info(il, keyconf, sta_id); 216 break; 217 default: 218 IL_ERR("Unknown alg: %s alg=%x\n", __func__, keyconf->cipher); 219 ret = -EINVAL; 220 } 221 222 D_WEP("Set dynamic key: alg=%x len=%d idx=%d sta=%d ret=%d\n", 223 keyconf->cipher, keyconf->keylen, keyconf->keyidx, sta_id, ret); 224 225 return ret; 226 } 227 228 static int 229 il3945_remove_static_key(struct il_priv *il) 230 { 231 return -EOPNOTSUPP; 232 } 233 234 static int 235 il3945_set_static_key(struct il_priv *il, struct ieee80211_key_conf *key) 236 { 237 if (key->cipher == WLAN_CIPHER_SUITE_WEP40 || 238 key->cipher == WLAN_CIPHER_SUITE_WEP104) 239 return -EOPNOTSUPP; 240 241 IL_ERR("Static key invalid: cipher %x\n", key->cipher); 242 return -EINVAL; 243 } 244 245 static void 246 il3945_clear_free_frames(struct il_priv *il) 247 { 248 struct list_head *element; 249 250 D_INFO("%d frames on pre-allocated heap on clear.\n", il->frames_count); 251 252 while (!list_empty(&il->free_frames)) { 253 element = il->free_frames.next; 254 list_del(element); 255 kfree(list_entry(element, struct il3945_frame, list)); 256 il->frames_count--; 257 } 258 259 if (il->frames_count) { 260 IL_WARN("%d frames still in use. Did we lose one?\n", 261 il->frames_count); 262 il->frames_count = 0; 263 } 264 } 265 266 static struct il3945_frame * 267 il3945_get_free_frame(struct il_priv *il) 268 { 269 struct il3945_frame *frame; 270 struct list_head *element; 271 if (list_empty(&il->free_frames)) { 272 frame = kzalloc_obj(*frame); 273 if (!frame) { 274 IL_ERR("Could not allocate frame!\n"); 275 return NULL; 276 } 277 278 il->frames_count++; 279 return frame; 280 } 281 282 element = il->free_frames.next; 283 list_del(element); 284 return list_entry(element, struct il3945_frame, list); 285 } 286 287 static void 288 il3945_free_frame(struct il_priv *il, struct il3945_frame *frame) 289 { 290 memset(frame, 0, sizeof(*frame)); 291 list_add(&frame->list, &il->free_frames); 292 } 293 294 unsigned int 295 il3945_fill_beacon_frame(struct il_priv *il, struct ieee80211_hdr *hdr, 296 int left) 297 { 298 299 if (!il_is_associated(il) || !il->beacon_skb) 300 return 0; 301 302 if (il->beacon_skb->len > left) 303 return 0; 304 305 memcpy(hdr, il->beacon_skb->data, il->beacon_skb->len); 306 307 return il->beacon_skb->len; 308 } 309 310 static int 311 il3945_send_beacon_cmd(struct il_priv *il) 312 { 313 struct il3945_frame *frame; 314 unsigned int frame_size; 315 int rc; 316 u8 rate; 317 318 frame = il3945_get_free_frame(il); 319 320 if (!frame) { 321 IL_ERR("Could not obtain free frame buffer for beacon " 322 "command.\n"); 323 return -ENOMEM; 324 } 325 326 rate = il_get_lowest_plcp(il); 327 328 frame_size = il3945_hw_get_beacon_cmd(il, frame, rate); 329 330 rc = il_send_cmd_pdu(il, C_TX_BEACON, frame_size, &frame->u.cmd[0]); 331 332 il3945_free_frame(il, frame); 333 334 return rc; 335 } 336 337 static void 338 il3945_unset_hw_params(struct il_priv *il) 339 { 340 if (il->_3945.shared_virt) 341 dma_free_coherent(&il->pci_dev->dev, 342 sizeof(struct il3945_shared), 343 il->_3945.shared_virt, il->_3945.shared_phys); 344 } 345 346 static void 347 il3945_build_tx_cmd_hwcrypto(struct il_priv *il, struct ieee80211_tx_info *info, 348 struct il_device_cmd *cmd, 349 struct sk_buff *skb_frag, int sta_id) 350 { 351 struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload; 352 struct il_hw_key *keyinfo = &il->stations[sta_id].keyinfo; 353 354 tx_cmd->sec_ctl = 0; 355 356 switch (keyinfo->cipher) { 357 case WLAN_CIPHER_SUITE_CCMP: 358 tx_cmd->sec_ctl = TX_CMD_SEC_CCM; 359 memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen); 360 D_TX("tx_cmd with AES hwcrypto\n"); 361 break; 362 363 case WLAN_CIPHER_SUITE_TKIP: 364 break; 365 366 case WLAN_CIPHER_SUITE_WEP104: 367 tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128; 368 fallthrough; 369 case WLAN_CIPHER_SUITE_WEP40: 370 tx_cmd->sec_ctl |= 371 TX_CMD_SEC_WEP | (info->control.hw_key-> 372 hw_key_idx & TX_CMD_SEC_MSK) << 373 TX_CMD_SEC_SHIFT; 374 375 memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen); 376 377 D_TX("Configuring packet for WEP encryption " "with key %d\n", 378 info->control.hw_key->hw_key_idx); 379 break; 380 381 default: 382 IL_ERR("Unknown encode cipher %x\n", keyinfo->cipher); 383 break; 384 } 385 } 386 387 /* 388 * handle build C_TX command notification. 389 */ 390 static void 391 il3945_build_tx_cmd_basic(struct il_priv *il, struct il_device_cmd *cmd, 392 struct ieee80211_tx_info *info, 393 struct ieee80211_hdr *hdr, u8 std_id) 394 { 395 struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload; 396 __le32 tx_flags = tx_cmd->tx_flags; 397 __le16 fc = hdr->frame_control; 398 399 tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; 400 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) { 401 tx_flags |= TX_CMD_FLG_ACK_MSK; 402 if (ieee80211_is_mgmt(fc)) 403 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; 404 if (ieee80211_is_probe_resp(fc) && 405 !(le16_to_cpu(hdr->seq_ctrl) & 0xf)) 406 tx_flags |= TX_CMD_FLG_TSF_MSK; 407 } else { 408 tx_flags &= (~TX_CMD_FLG_ACK_MSK); 409 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; 410 } 411 412 tx_cmd->sta_id = std_id; 413 if (ieee80211_has_morefrags(fc)) 414 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK; 415 416 if (ieee80211_is_data_qos(fc)) { 417 u8 *qc = ieee80211_get_qos_ctl(hdr); 418 tx_cmd->tid_tspec = qc[0] & 0xf; 419 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK; 420 } else { 421 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; 422 } 423 424 il_tx_cmd_protection(il, info, fc, &tx_flags); 425 426 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK); 427 if (ieee80211_is_mgmt(fc)) { 428 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc)) 429 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3); 430 else 431 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2); 432 } else { 433 tx_cmd->timeout.pm_frame_timeout = 0; 434 } 435 436 tx_cmd->driver_txop = 0; 437 tx_cmd->tx_flags = tx_flags; 438 tx_cmd->next_frame_len = 0; 439 } 440 441 /* 442 * start C_TX command process 443 */ 444 static int 445 il3945_tx_skb(struct il_priv *il, 446 struct ieee80211_sta *sta, 447 struct sk_buff *skb) 448 { 449 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 450 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 451 struct il3945_tx_cmd *tx_cmd; 452 struct il_tx_queue *txq = NULL; 453 struct il_queue *q = NULL; 454 struct il_device_cmd *out_cmd; 455 struct il_cmd_meta *out_meta; 456 dma_addr_t phys_addr; 457 dma_addr_t txcmd_phys; 458 int txq_id = skb_get_queue_mapping(skb); 459 u16 len, idx, hdr_len; 460 u16 firstlen, secondlen; 461 u8 sta_id; 462 u8 tid = 0; 463 __le16 fc; 464 u8 wait_write_ptr = 0; 465 unsigned long flags; 466 467 spin_lock_irqsave(&il->lock, flags); 468 if (il_is_rfkill(il)) { 469 D_DROP("Dropping - RF KILL\n"); 470 goto drop_unlock; 471 } 472 473 if ((ieee80211_get_tx_rate(il->hw, info)->hw_value & 0xFF) == 474 IL_INVALID_RATE) { 475 IL_ERR("ERROR: No TX rate available.\n"); 476 goto drop_unlock; 477 } 478 479 fc = hdr->frame_control; 480 481 #ifdef CONFIG_IWLEGACY_DEBUG 482 if (ieee80211_is_auth(fc)) 483 D_TX("Sending AUTH frame\n"); 484 else if (ieee80211_is_assoc_req(fc)) 485 D_TX("Sending ASSOC frame\n"); 486 else if (ieee80211_is_reassoc_req(fc)) 487 D_TX("Sending REASSOC frame\n"); 488 #endif 489 490 spin_unlock_irqrestore(&il->lock, flags); 491 492 hdr_len = ieee80211_hdrlen(fc); 493 494 /* Find idx into station table for destination station */ 495 sta_id = il_sta_id_or_broadcast(il, sta); 496 if (sta_id == IL_INVALID_STATION) { 497 D_DROP("Dropping - INVALID STATION: %pM\n", hdr->addr1); 498 goto drop; 499 } 500 501 D_RATE("station Id %d\n", sta_id); 502 503 if (ieee80211_is_data_qos(fc)) { 504 u8 *qc = ieee80211_get_qos_ctl(hdr); 505 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK; 506 if (unlikely(tid >= MAX_TID_COUNT)) 507 goto drop; 508 } 509 510 /* Descriptor for chosen Tx queue */ 511 txq = &il->txq[txq_id]; 512 q = &txq->q; 513 514 if ((il_queue_space(q) < q->high_mark)) 515 goto drop; 516 517 spin_lock_irqsave(&il->lock, flags); 518 519 idx = il_get_cmd_idx(q, q->write_ptr, 0); 520 521 txq->skbs[q->write_ptr] = skb; 522 523 /* Init first empty entry in queue's array of Tx/cmd buffers */ 524 out_cmd = txq->cmd[idx]; 525 out_meta = &txq->meta[idx]; 526 tx_cmd = (struct il3945_tx_cmd *)out_cmd->cmd.payload; 527 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr)); 528 memset(tx_cmd, 0, sizeof(*tx_cmd)); 529 530 /* 531 * Set up the Tx-command (not MAC!) header. 532 * Store the chosen Tx queue and TFD idx within the sequence field; 533 * after Tx, uCode's Tx response will return this value so driver can 534 * locate the frame within the tx queue and do post-tx processing. 535 */ 536 out_cmd->hdr.cmd = C_TX; 537 out_cmd->hdr.sequence = 538 cpu_to_le16((u16) 539 (QUEUE_TO_SEQ(txq_id) | IDX_TO_SEQ(q->write_ptr))); 540 541 /* Copy MAC header from skb into command buffer */ 542 memcpy(tx_cmd->hdr, hdr, hdr_len); 543 544 if (info->control.hw_key) 545 il3945_build_tx_cmd_hwcrypto(il, info, out_cmd, skb, sta_id); 546 547 /* TODO need this for burst mode later on */ 548 il3945_build_tx_cmd_basic(il, out_cmd, info, hdr, sta_id); 549 550 il3945_hw_build_tx_cmd_rate(il, out_cmd, info, hdr, sta_id); 551 552 /* Total # bytes to be transmitted */ 553 tx_cmd->len = cpu_to_le16((u16) skb->len); 554 555 tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK; 556 tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK; 557 558 /* 559 * Use the first empty entry in this queue's command buffer array 560 * to contain the Tx command and MAC header concatenated together 561 * (payload data will be in another buffer). 562 * Size of this varies, due to varying MAC header length. 563 * If end is not dword aligned, we'll have 2 extra bytes at the end 564 * of the MAC header (device reads on dword boundaries). 565 * We'll tell device about this padding later. 566 */ 567 len = 568 sizeof(struct il3945_tx_cmd) + sizeof(struct il_cmd_header) + 569 hdr_len; 570 firstlen = (len + 3) & ~3; 571 572 /* Physical address of this Tx command's header (not MAC header!), 573 * within command buffer array. */ 574 txcmd_phys = dma_map_single(&il->pci_dev->dev, &out_cmd->hdr, firstlen, 575 DMA_TO_DEVICE); 576 if (unlikely(dma_mapping_error(&il->pci_dev->dev, txcmd_phys))) 577 goto drop_unlock; 578 579 /* Set up TFD's 2nd entry to point directly to remainder of skb, 580 * if any (802.11 null frames have no payload). */ 581 secondlen = skb->len - hdr_len; 582 if (secondlen > 0) { 583 phys_addr = dma_map_single(&il->pci_dev->dev, skb->data + hdr_len, 584 secondlen, DMA_TO_DEVICE); 585 if (unlikely(dma_mapping_error(&il->pci_dev->dev, phys_addr))) 586 goto drop_unlock; 587 } 588 589 /* Add buffer containing Tx command and MAC(!) header to TFD's 590 * first entry */ 591 il->ops->txq_attach_buf_to_tfd(il, txq, txcmd_phys, firstlen, 1, 0); 592 dma_unmap_addr_set(out_meta, mapping, txcmd_phys); 593 dma_unmap_len_set(out_meta, len, firstlen); 594 if (secondlen > 0) 595 il->ops->txq_attach_buf_to_tfd(il, txq, phys_addr, secondlen, 0, 596 U32_PAD(secondlen)); 597 598 if (!ieee80211_has_morefrags(hdr->frame_control)) { 599 txq->need_update = 1; 600 } else { 601 wait_write_ptr = 1; 602 txq->need_update = 0; 603 } 604 605 il_update_stats(il, true, fc, skb->len); 606 607 D_TX("sequence nr = 0X%x\n", le16_to_cpu(out_cmd->hdr.sequence)); 608 D_TX("tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags)); 609 il_print_hex_dump(il, IL_DL_TX, tx_cmd, sizeof(*tx_cmd)); 610 il_print_hex_dump(il, IL_DL_TX, (u8 *) tx_cmd->hdr, 611 ieee80211_hdrlen(fc)); 612 613 /* Tell device the write idx *just past* this latest filled TFD */ 614 q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd); 615 il_txq_update_write_ptr(il, txq); 616 spin_unlock_irqrestore(&il->lock, flags); 617 618 if (il_queue_space(q) < q->high_mark && il->mac80211_registered) { 619 if (wait_write_ptr) { 620 spin_lock_irqsave(&il->lock, flags); 621 txq->need_update = 1; 622 il_txq_update_write_ptr(il, txq); 623 spin_unlock_irqrestore(&il->lock, flags); 624 } 625 626 il_stop_queue(il, txq); 627 } 628 629 return 0; 630 631 drop_unlock: 632 spin_unlock_irqrestore(&il->lock, flags); 633 drop: 634 return -1; 635 } 636 637 static void 638 il3945_hdl_alive(struct il_priv *il, struct il_rx_buf *rxb) 639 { 640 struct il_rx_pkt *pkt = rxb_addr(rxb); 641 struct il_alive_resp *palive; 642 struct delayed_work *pwork; 643 644 palive = &pkt->u.alive_frame; 645 646 D_INFO("Alive ucode status 0x%08X revision " "0x%01X 0x%01X\n", 647 palive->is_valid, palive->ver_type, palive->ver_subtype); 648 649 if (palive->ver_subtype == INITIALIZE_SUBTYPE) { 650 D_INFO("Initialization Alive received.\n"); 651 memcpy(&il->card_alive_init, &pkt->u.alive_frame, 652 sizeof(struct il_alive_resp)); 653 pwork = &il->init_alive_start; 654 } else { 655 D_INFO("Runtime Alive received.\n"); 656 memcpy(&il->card_alive, &pkt->u.alive_frame, 657 sizeof(struct il_alive_resp)); 658 pwork = &il->alive_start; 659 il3945_disable_events(il); 660 } 661 662 /* We delay the ALIVE response by 5ms to 663 * give the HW RF Kill time to activate... */ 664 if (palive->is_valid == UCODE_VALID_OK) 665 queue_delayed_work(il->workqueue, pwork, msecs_to_jiffies(5)); 666 else 667 IL_WARN("uCode did not respond OK.\n"); 668 } 669 670 static void 671 il3945_hdl_add_sta(struct il_priv *il, struct il_rx_buf *rxb) 672 { 673 struct il_rx_pkt *pkt = rxb_addr(rxb); 674 675 D_RX("Received C_ADD_STA: 0x%02X\n", pkt->u.status); 676 } 677 678 static void 679 il3945_hdl_beacon(struct il_priv *il, struct il_rx_buf *rxb) 680 { 681 struct il_rx_pkt *pkt = rxb_addr(rxb); 682 struct il3945_beacon_notif *beacon = &(pkt->u.beacon_status); 683 #ifdef CONFIG_IWLEGACY_DEBUG 684 u8 rate = beacon->beacon_notify_hdr.rate; 685 686 D_RX("beacon status %x retries %d iss %d " "tsf %d %d rate %d\n", 687 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK, 688 beacon->beacon_notify_hdr.failure_frame, 689 le32_to_cpu(beacon->ibss_mgr_status), 690 le32_to_cpu(beacon->high_tsf), le32_to_cpu(beacon->low_tsf), rate); 691 #endif 692 693 il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status); 694 695 } 696 697 /* Handle notification from uCode that card's power state is changing 698 * due to software, hardware, or critical temperature RFKILL */ 699 static void 700 il3945_hdl_card_state(struct il_priv *il, struct il_rx_buf *rxb) 701 { 702 struct il_rx_pkt *pkt = rxb_addr(rxb); 703 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags); 704 unsigned long status = il->status; 705 706 IL_WARN("Card state received: HW:%s SW:%s\n", 707 (flags & HW_CARD_DISABLED) ? "Kill" : "On", 708 (flags & SW_CARD_DISABLED) ? "Kill" : "On"); 709 710 _il_wr(il, CSR_UCODE_DRV_GP1_SET, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); 711 712 if (flags & HW_CARD_DISABLED) 713 set_bit(S_RFKILL, &il->status); 714 else 715 clear_bit(S_RFKILL, &il->status); 716 717 il_scan_cancel(il); 718 719 if ((test_bit(S_RFKILL, &status) != 720 test_bit(S_RFKILL, &il->status))) 721 wiphy_rfkill_set_hw_state(il->hw->wiphy, 722 test_bit(S_RFKILL, &il->status)); 723 else 724 wake_up(&il->wait_command_queue); 725 } 726 727 /* 728 * il3945_setup_handlers - Initialize Rx handler callbacks 729 * 730 * Setup the RX handlers for each of the reply types sent from the uCode 731 * to the host. 732 * 733 * This function chains into the hardware specific files for them to setup 734 * any hardware specific handlers as well. 735 */ 736 static void 737 il3945_setup_handlers(struct il_priv *il) 738 { 739 il->handlers[N_ALIVE] = il3945_hdl_alive; 740 il->handlers[C_ADD_STA] = il3945_hdl_add_sta; 741 il->handlers[N_ERROR] = il_hdl_error; 742 il->handlers[N_CHANNEL_SWITCH] = il_hdl_csa; 743 il->handlers[N_SPECTRUM_MEASUREMENT] = il_hdl_spectrum_measurement; 744 il->handlers[N_PM_SLEEP] = il_hdl_pm_sleep; 745 il->handlers[N_PM_DEBUG_STATS] = il_hdl_pm_debug_stats; 746 il->handlers[N_BEACON] = il3945_hdl_beacon; 747 748 /* 749 * The same handler is used for both the REPLY to a discrete 750 * stats request from the host as well as for the periodic 751 * stats notifications (after received beacons) from the uCode. 752 */ 753 il->handlers[C_STATS] = il3945_hdl_c_stats; 754 il->handlers[N_STATS] = il3945_hdl_stats; 755 756 il_setup_rx_scan_handlers(il); 757 il->handlers[N_CARD_STATE] = il3945_hdl_card_state; 758 759 /* Set up hardware specific Rx handlers */ 760 il3945_hw_handler_setup(il); 761 } 762 763 /************************** RX-FUNCTIONS ****************************/ 764 /* 765 * Rx theory of operation 766 * 767 * The host allocates 32 DMA target addresses and passes the host address 768 * to the firmware at register IL_RFDS_TBL_LOWER + N * RFD_SIZE where N is 769 * 0 to 31 770 * 771 * Rx Queue Indexes 772 * The host/firmware share two idx registers for managing the Rx buffers. 773 * 774 * The READ idx maps to the first position that the firmware may be writing 775 * to -- the driver can read up to (but not including) this position and get 776 * good data. 777 * The READ idx is managed by the firmware once the card is enabled. 778 * 779 * The WRITE idx maps to the last position the driver has read from -- the 780 * position preceding WRITE is the last slot the firmware can place a packet. 781 * 782 * The queue is empty (no good data) if WRITE = READ - 1, and is full if 783 * WRITE = READ. 784 * 785 * During initialization, the host sets up the READ queue position to the first 786 * IDX position, and WRITE to the last (READ - 1 wrapped) 787 * 788 * When the firmware places a packet in a buffer, it will advance the READ idx 789 * and fire the RX interrupt. The driver can then query the READ idx and 790 * process as many packets as possible, moving the WRITE idx forward as it 791 * resets the Rx queue buffers with new memory. 792 * 793 * The management in the driver is as follows: 794 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When 795 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled 796 * to replenish the iwl->rxq->rx_free. 797 * + In il3945_rx_replenish (scheduled) if 'processed' != 'read' then the 798 * iwl->rxq is replenished and the READ IDX is updated (updating the 799 * 'processed' and 'read' driver idxes as well) 800 * + A received packet is processed and handed to the kernel network stack, 801 * detached from the iwl->rxq. The driver 'processed' idx is updated. 802 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free 803 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ 804 * IDX is not incremented and iwl->status(RX_STALLED) is set. If there 805 * were enough free buffers and RX_STALLED is set it is cleared. 806 * 807 * 808 * Driver sequence: 809 * 810 * il3945_rx_replenish() Replenishes rx_free list from rx_used, and calls 811 * il3945_rx_queue_restock 812 * il3945_rx_queue_restock() Moves available buffers from rx_free into Rx 813 * queue, updates firmware pointers, and updates 814 * the WRITE idx. If insufficient rx_free buffers 815 * are available, schedules il3945_rx_replenish 816 * 817 * -- enable interrupts -- 818 * ISR - il3945_rx() Detach il_rx_bufs from pool up to the 819 * READ IDX, detaching the SKB from the pool. 820 * Moves the packet buffer from queue to rx_used. 821 * Calls il3945_rx_queue_restock to refill any empty 822 * slots. 823 * ... 824 * 825 */ 826 827 /* 828 * il3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr 829 */ 830 static inline __le32 831 il3945_dma_addr2rbd_ptr(struct il_priv *il, dma_addr_t dma_addr) 832 { 833 return cpu_to_le32((u32) dma_addr); 834 } 835 836 /* 837 * il3945_rx_queue_restock - refill RX queue from pre-allocated pool 838 * 839 * If there are slots in the RX queue that need to be restocked, 840 * and we have free pre-allocated buffers, fill the ranks as much 841 * as we can, pulling from rx_free. 842 * 843 * This moves the 'write' idx forward to catch up with 'processed', and 844 * also updates the memory address in the firmware to reference the new 845 * target buffer. 846 */ 847 static void 848 il3945_rx_queue_restock(struct il_priv *il) 849 { 850 struct il_rx_queue *rxq = &il->rxq; 851 struct list_head *element; 852 struct il_rx_buf *rxb; 853 unsigned long flags; 854 855 spin_lock_irqsave(&rxq->lock, flags); 856 while (il_rx_queue_space(rxq) > 0 && rxq->free_count) { 857 /* Get next free Rx buffer, remove from free list */ 858 element = rxq->rx_free.next; 859 rxb = list_entry(element, struct il_rx_buf, list); 860 list_del(element); 861 862 /* Point to Rx buffer via next RBD in circular buffer */ 863 rxq->bd[rxq->write] = 864 il3945_dma_addr2rbd_ptr(il, rxb->page_dma); 865 rxq->queue[rxq->write] = rxb; 866 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK; 867 rxq->free_count--; 868 } 869 spin_unlock_irqrestore(&rxq->lock, flags); 870 /* If the pre-allocated buffer pool is dropping low, schedule to 871 * refill it */ 872 if (rxq->free_count <= RX_LOW_WATERMARK) 873 queue_work(il->workqueue, &il->rx_replenish); 874 875 /* If we've added more space for the firmware to place data, tell it. 876 * Increment device's write pointer in multiples of 8. */ 877 if (rxq->write_actual != (rxq->write & ~0x7) || 878 abs(rxq->write - rxq->read) > 7) { 879 spin_lock_irqsave(&rxq->lock, flags); 880 rxq->need_update = 1; 881 spin_unlock_irqrestore(&rxq->lock, flags); 882 il_rx_queue_update_write_ptr(il, rxq); 883 } 884 } 885 886 /* 887 * il3945_rx_replenish - Move all used packet from rx_used to rx_free 888 * 889 * When moving to rx_free an SKB is allocated for the slot. 890 * 891 * Also restock the Rx queue via il3945_rx_queue_restock. 892 * This is called as a scheduled work item (except for during initialization) 893 */ 894 static void 895 il3945_rx_allocate(struct il_priv *il, gfp_t priority) 896 { 897 struct il_rx_queue *rxq = &il->rxq; 898 struct list_head *element; 899 struct il_rx_buf *rxb; 900 struct page *page; 901 dma_addr_t page_dma; 902 unsigned long flags; 903 904 while (1) { 905 gfp_t gfp_mask = priority; 906 907 spin_lock_irqsave(&rxq->lock, flags); 908 if (list_empty(&rxq->rx_used)) { 909 spin_unlock_irqrestore(&rxq->lock, flags); 910 return; 911 } 912 spin_unlock_irqrestore(&rxq->lock, flags); 913 914 if (rxq->free_count > RX_LOW_WATERMARK) 915 gfp_mask |= __GFP_NOWARN; 916 917 if (il->hw_params.rx_page_order > 0) 918 gfp_mask |= __GFP_COMP; 919 920 /* Alloc a new receive buffer */ 921 page = alloc_pages(gfp_mask, il->hw_params.rx_page_order); 922 if (!page) { 923 if (net_ratelimit()) 924 D_INFO("Failed to allocate SKB buffer.\n"); 925 if (rxq->free_count <= RX_LOW_WATERMARK && 926 net_ratelimit()) 927 IL_ERR("Failed to allocate SKB buffer with %pGg. " 928 "Only %u free buffers remaining.\n", 929 &gfp_mask, rxq->free_count); 930 /* We don't reschedule replenish work here -- we will 931 * call the restock method and if it still needs 932 * more buffers it will schedule replenish */ 933 break; 934 } 935 936 /* Get physical address of RB/SKB */ 937 page_dma = 938 dma_map_page(&il->pci_dev->dev, page, 0, 939 PAGE_SIZE << il->hw_params.rx_page_order, 940 DMA_FROM_DEVICE); 941 942 if (unlikely(dma_mapping_error(&il->pci_dev->dev, page_dma))) { 943 __free_pages(page, il->hw_params.rx_page_order); 944 break; 945 } 946 947 spin_lock_irqsave(&rxq->lock, flags); 948 949 if (list_empty(&rxq->rx_used)) { 950 spin_unlock_irqrestore(&rxq->lock, flags); 951 dma_unmap_page(&il->pci_dev->dev, page_dma, 952 PAGE_SIZE << il->hw_params.rx_page_order, 953 DMA_FROM_DEVICE); 954 __free_pages(page, il->hw_params.rx_page_order); 955 return; 956 } 957 958 element = rxq->rx_used.next; 959 rxb = list_entry(element, struct il_rx_buf, list); 960 list_del(element); 961 962 rxb->page = page; 963 rxb->page_dma = page_dma; 964 list_add_tail(&rxb->list, &rxq->rx_free); 965 rxq->free_count++; 966 il->alloc_rxb_page++; 967 968 spin_unlock_irqrestore(&rxq->lock, flags); 969 } 970 } 971 972 void 973 il3945_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq) 974 { 975 unsigned long flags; 976 int i; 977 spin_lock_irqsave(&rxq->lock, flags); 978 INIT_LIST_HEAD(&rxq->rx_free); 979 INIT_LIST_HEAD(&rxq->rx_used); 980 /* Fill the rx_used queue with _all_ of the Rx buffers */ 981 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) { 982 /* In the reset function, these buffers may have been allocated 983 * to an SKB, so we need to unmap and free potential storage */ 984 if (rxq->pool[i].page != NULL) { 985 dma_unmap_page(&il->pci_dev->dev, 986 rxq->pool[i].page_dma, 987 PAGE_SIZE << il->hw_params.rx_page_order, 988 DMA_FROM_DEVICE); 989 __il_free_pages(il, rxq->pool[i].page); 990 rxq->pool[i].page = NULL; 991 } 992 list_add_tail(&rxq->pool[i].list, &rxq->rx_used); 993 } 994 995 /* Set us so that we have processed and used all buffers, but have 996 * not restocked the Rx queue with fresh buffers */ 997 rxq->read = rxq->write = 0; 998 rxq->write_actual = 0; 999 rxq->free_count = 0; 1000 spin_unlock_irqrestore(&rxq->lock, flags); 1001 } 1002 1003 void 1004 il3945_rx_replenish(void *data) 1005 { 1006 struct il_priv *il = data; 1007 unsigned long flags; 1008 1009 il3945_rx_allocate(il, GFP_KERNEL); 1010 1011 spin_lock_irqsave(&il->lock, flags); 1012 il3945_rx_queue_restock(il); 1013 spin_unlock_irqrestore(&il->lock, flags); 1014 } 1015 1016 static void 1017 il3945_rx_replenish_now(struct il_priv *il) 1018 { 1019 il3945_rx_allocate(il, GFP_ATOMIC); 1020 1021 il3945_rx_queue_restock(il); 1022 } 1023 1024 /* Assumes that the skb field of the buffers in 'pool' is kept accurate. 1025 * If an SKB has been detached, the POOL needs to have its SKB set to NULL 1026 * This free routine walks the list of POOL entries and if SKB is set to 1027 * non NULL it is unmapped and freed 1028 */ 1029 static void 1030 il3945_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq) 1031 { 1032 int i; 1033 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) { 1034 if (rxq->pool[i].page != NULL) { 1035 dma_unmap_page(&il->pci_dev->dev, 1036 rxq->pool[i].page_dma, 1037 PAGE_SIZE << il->hw_params.rx_page_order, 1038 DMA_FROM_DEVICE); 1039 __il_free_pages(il, rxq->pool[i].page); 1040 rxq->pool[i].page = NULL; 1041 } 1042 } 1043 1044 dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd, 1045 rxq->bd_dma); 1046 dma_free_coherent(&il->pci_dev->dev, sizeof(struct il_rb_status), 1047 rxq->rb_stts, rxq->rb_stts_dma); 1048 rxq->bd = NULL; 1049 rxq->rb_stts = NULL; 1050 } 1051 1052 /* 1053 * il3945_rx_handle - Main entry function for receiving responses from uCode 1054 * 1055 * Uses the il->handlers callback function array to invoke 1056 * the appropriate handlers, including command responses, 1057 * frame-received notifications, and other notifications. 1058 */ 1059 static void 1060 il3945_rx_handle(struct il_priv *il) 1061 { 1062 struct il_rx_buf *rxb; 1063 struct il_rx_pkt *pkt; 1064 struct il_rx_queue *rxq = &il->rxq; 1065 u32 r, i; 1066 int reclaim; 1067 unsigned long flags; 1068 u8 fill_rx = 0; 1069 u32 count = 8; 1070 int total_empty = 0; 1071 1072 /* uCode's read idx (stored in shared DRAM) indicates the last Rx 1073 * buffer that the driver may process (last buffer filled by ucode). */ 1074 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF; 1075 i = rxq->read; 1076 1077 /* calculate total frames need to be restock after handling RX */ 1078 total_empty = r - rxq->write_actual; 1079 if (total_empty < 0) 1080 total_empty += RX_QUEUE_SIZE; 1081 1082 if (total_empty > (RX_QUEUE_SIZE / 2)) 1083 fill_rx = 1; 1084 /* Rx interrupt, but nothing sent from uCode */ 1085 if (i == r) 1086 D_RX("r = %d, i = %d\n", r, i); 1087 1088 while (i != r) { 1089 rxb = rxq->queue[i]; 1090 1091 /* If an RXB doesn't have a Rx queue slot associated with it, 1092 * then a bug has been introduced in the queue refilling 1093 * routines -- catch it here */ 1094 BUG_ON(rxb == NULL); 1095 1096 rxq->queue[i] = NULL; 1097 1098 dma_unmap_page(&il->pci_dev->dev, rxb->page_dma, 1099 PAGE_SIZE << il->hw_params.rx_page_order, 1100 DMA_FROM_DEVICE); 1101 pkt = rxb_addr(rxb); 1102 reclaim = il_need_reclaim(il, pkt); 1103 1104 /* Based on type of command response or notification, 1105 * handle those that need handling via function in 1106 * handlers table. See il3945_setup_handlers() */ 1107 if (il->handlers[pkt->hdr.cmd]) { 1108 D_RX("r = %d, i = %d, %s, 0x%02x\n", r, i, 1109 il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd); 1110 il->isr_stats.handlers[pkt->hdr.cmd]++; 1111 il->handlers[pkt->hdr.cmd] (il, rxb); 1112 } else { 1113 /* No handling needed */ 1114 D_RX("r %d i %d No handler needed for %s, 0x%02x\n", r, 1115 i, il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd); 1116 } 1117 1118 /* 1119 * XXX: After here, we should always check rxb->page 1120 * against NULL before touching it or its virtual 1121 * memory (pkt). Because some handler might have 1122 * already taken or freed the pages. 1123 */ 1124 1125 if (reclaim) { 1126 /* Invoke any callbacks, transfer the buffer to caller, 1127 * and fire off the (possibly) blocking il_send_cmd() 1128 * as we reclaim the driver command queue */ 1129 if (rxb->page) 1130 il_tx_cmd_complete(il, rxb); 1131 else 1132 IL_WARN("Claim null rxb?\n"); 1133 } 1134 1135 /* Reuse the page if possible. For notification packets and 1136 * SKBs that fail to Rx correctly, add them back into the 1137 * rx_free list for reuse later. */ 1138 spin_lock_irqsave(&rxq->lock, flags); 1139 if (rxb->page != NULL) { 1140 rxb->page_dma = 1141 dma_map_page(&il->pci_dev->dev, rxb->page, 0, 1142 PAGE_SIZE << il->hw_params.rx_page_order, 1143 DMA_FROM_DEVICE); 1144 if (unlikely(dma_mapping_error(&il->pci_dev->dev, 1145 rxb->page_dma))) { 1146 __il_free_pages(il, rxb->page); 1147 rxb->page = NULL; 1148 list_add_tail(&rxb->list, &rxq->rx_used); 1149 } else { 1150 list_add_tail(&rxb->list, &rxq->rx_free); 1151 rxq->free_count++; 1152 } 1153 } else 1154 list_add_tail(&rxb->list, &rxq->rx_used); 1155 1156 spin_unlock_irqrestore(&rxq->lock, flags); 1157 1158 i = (i + 1) & RX_QUEUE_MASK; 1159 /* If there are a lot of unused frames, 1160 * restock the Rx queue so ucode won't assert. */ 1161 if (fill_rx) { 1162 count++; 1163 if (count >= 8) { 1164 rxq->read = i; 1165 il3945_rx_replenish_now(il); 1166 count = 0; 1167 } 1168 } 1169 } 1170 1171 /* Backtrack one entry */ 1172 rxq->read = i; 1173 if (fill_rx) 1174 il3945_rx_replenish_now(il); 1175 else 1176 il3945_rx_queue_restock(il); 1177 } 1178 1179 /* call this function to flush any scheduled tasklet */ 1180 static inline void 1181 il3945_synchronize_irq(struct il_priv *il) 1182 { 1183 /* wait to make sure we flush pending tasklet */ 1184 synchronize_irq(il->pci_dev->irq); 1185 tasklet_kill(&il->irq_tasklet); 1186 } 1187 1188 static const char * 1189 il3945_desc_lookup(int i) 1190 { 1191 switch (i) { 1192 case 1: 1193 return "FAIL"; 1194 case 2: 1195 return "BAD_PARAM"; 1196 case 3: 1197 return "BAD_CHECKSUM"; 1198 case 4: 1199 return "NMI_INTERRUPT"; 1200 case 5: 1201 return "SYSASSERT"; 1202 case 6: 1203 return "FATAL_ERROR"; 1204 } 1205 1206 return "UNKNOWN"; 1207 } 1208 1209 #define ERROR_START_OFFSET (1 * sizeof(u32)) 1210 #define ERROR_ELEM_SIZE (7 * sizeof(u32)) 1211 1212 void 1213 il3945_dump_nic_error_log(struct il_priv *il) 1214 { 1215 u32 i; 1216 u32 desc, time, count, base, data1; 1217 u32 blink1, blink2, ilink1, ilink2; 1218 1219 base = le32_to_cpu(il->card_alive.error_event_table_ptr); 1220 1221 if (!il3945_hw_valid_rtc_data_addr(base)) { 1222 IL_ERR("Not valid error log pointer 0x%08X\n", base); 1223 return; 1224 } 1225 1226 count = il_read_targ_mem(il, base); 1227 1228 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) { 1229 IL_ERR("Start IWL Error Log Dump:\n"); 1230 IL_ERR("Status: 0x%08lX, count: %d\n", il->status, count); 1231 } 1232 1233 IL_ERR("Desc Time asrtPC blink2 " 1234 "ilink1 nmiPC Line\n"); 1235 for (i = ERROR_START_OFFSET; 1236 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET; 1237 i += ERROR_ELEM_SIZE) { 1238 desc = il_read_targ_mem(il, base + i); 1239 time = il_read_targ_mem(il, base + i + 1 * sizeof(u32)); 1240 blink1 = il_read_targ_mem(il, base + i + 2 * sizeof(u32)); 1241 blink2 = il_read_targ_mem(il, base + i + 3 * sizeof(u32)); 1242 ilink1 = il_read_targ_mem(il, base + i + 4 * sizeof(u32)); 1243 ilink2 = il_read_targ_mem(il, base + i + 5 * sizeof(u32)); 1244 data1 = il_read_targ_mem(il, base + i + 6 * sizeof(u32)); 1245 1246 IL_ERR("%-13s (0x%X) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n", 1247 il3945_desc_lookup(desc), desc, time, blink1, blink2, 1248 ilink1, ilink2, data1); 1249 } 1250 } 1251 1252 static void 1253 il3945_irq_tasklet(struct tasklet_struct *t) 1254 { 1255 struct il_priv *il = from_tasklet(il, t, irq_tasklet); 1256 u32 inta, handled = 0; 1257 u32 inta_fh; 1258 unsigned long flags; 1259 #ifdef CONFIG_IWLEGACY_DEBUG 1260 u32 inta_mask; 1261 #endif 1262 1263 spin_lock_irqsave(&il->lock, flags); 1264 1265 /* Ack/clear/reset pending uCode interrupts. 1266 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS, 1267 * and will clear only when CSR_FH_INT_STATUS gets cleared. */ 1268 inta = _il_rd(il, CSR_INT); 1269 _il_wr(il, CSR_INT, inta); 1270 1271 /* Ack/clear/reset pending flow-handler (DMA) interrupts. 1272 * Any new interrupts that happen after this, either while we're 1273 * in this tasklet, or later, will show up in next ISR/tasklet. */ 1274 inta_fh = _il_rd(il, CSR_FH_INT_STATUS); 1275 _il_wr(il, CSR_FH_INT_STATUS, inta_fh); 1276 1277 #ifdef CONFIG_IWLEGACY_DEBUG 1278 if (il_get_debug_level(il) & IL_DL_ISR) { 1279 /* just for debug */ 1280 inta_mask = _il_rd(il, CSR_INT_MASK); 1281 D_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", inta, 1282 inta_mask, inta_fh); 1283 } 1284 #endif 1285 1286 spin_unlock_irqrestore(&il->lock, flags); 1287 1288 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not 1289 * atomic, make sure that inta covers all the interrupts that 1290 * we've discovered, even if FH interrupt came in just after 1291 * reading CSR_INT. */ 1292 if (inta_fh & CSR39_FH_INT_RX_MASK) 1293 inta |= CSR_INT_BIT_FH_RX; 1294 if (inta_fh & CSR39_FH_INT_TX_MASK) 1295 inta |= CSR_INT_BIT_FH_TX; 1296 1297 /* Now service all interrupt bits discovered above. */ 1298 if (inta & CSR_INT_BIT_HW_ERR) { 1299 IL_ERR("Hardware error detected. Restarting.\n"); 1300 1301 /* Tell the device to stop sending interrupts */ 1302 il_disable_interrupts(il); 1303 1304 il->isr_stats.hw++; 1305 il_irq_handle_error(il); 1306 1307 handled |= CSR_INT_BIT_HW_ERR; 1308 1309 return; 1310 } 1311 #ifdef CONFIG_IWLEGACY_DEBUG 1312 if (il_get_debug_level(il) & (IL_DL_ISR)) { 1313 /* NIC fires this, but we don't use it, redundant with WAKEUP */ 1314 if (inta & CSR_INT_BIT_SCD) { 1315 D_ISR("Scheduler finished to transmit " 1316 "the frame/frames.\n"); 1317 il->isr_stats.sch++; 1318 } 1319 1320 /* Alive notification via Rx interrupt will do the real work */ 1321 if (inta & CSR_INT_BIT_ALIVE) { 1322 D_ISR("Alive interrupt\n"); 1323 il->isr_stats.alive++; 1324 } 1325 } 1326 #endif 1327 /* Safely ignore these bits for debug checks below */ 1328 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE); 1329 1330 /* Error detected by uCode */ 1331 if (inta & CSR_INT_BIT_SW_ERR) { 1332 IL_ERR("Microcode SW error detected. " "Restarting 0x%X.\n", 1333 inta); 1334 il->isr_stats.sw++; 1335 il_irq_handle_error(il); 1336 handled |= CSR_INT_BIT_SW_ERR; 1337 } 1338 1339 /* uCode wakes up after power-down sleep */ 1340 if (inta & CSR_INT_BIT_WAKEUP) { 1341 D_ISR("Wakeup interrupt\n"); 1342 il_rx_queue_update_write_ptr(il, &il->rxq); 1343 1344 spin_lock_irqsave(&il->lock, flags); 1345 il_txq_update_write_ptr(il, &il->txq[0]); 1346 il_txq_update_write_ptr(il, &il->txq[1]); 1347 il_txq_update_write_ptr(il, &il->txq[2]); 1348 il_txq_update_write_ptr(il, &il->txq[3]); 1349 il_txq_update_write_ptr(il, &il->txq[4]); 1350 spin_unlock_irqrestore(&il->lock, flags); 1351 1352 il->isr_stats.wakeup++; 1353 handled |= CSR_INT_BIT_WAKEUP; 1354 } 1355 1356 /* All uCode command responses, including Tx command responses, 1357 * Rx "responses" (frame-received notification), and other 1358 * notifications from uCode come through here*/ 1359 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) { 1360 il3945_rx_handle(il); 1361 il->isr_stats.rx++; 1362 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX); 1363 } 1364 1365 if (inta & CSR_INT_BIT_FH_TX) { 1366 D_ISR("Tx interrupt\n"); 1367 il->isr_stats.tx++; 1368 1369 _il_wr(il, CSR_FH_INT_STATUS, (1 << 6)); 1370 il_wr(il, FH39_TCSR_CREDIT(FH39_SRVC_CHNL), 0x0); 1371 handled |= CSR_INT_BIT_FH_TX; 1372 } 1373 1374 if (inta & ~handled) { 1375 IL_ERR("Unhandled INTA bits 0x%08x\n", inta & ~handled); 1376 il->isr_stats.unhandled++; 1377 } 1378 1379 if (inta & ~il->inta_mask) { 1380 IL_WARN("Disabled INTA bits 0x%08x were pending\n", 1381 inta & ~il->inta_mask); 1382 IL_WARN(" with inta_fh = 0x%08x\n", inta_fh); 1383 } 1384 1385 /* Re-enable all interrupts */ 1386 /* only Re-enable if disabled by irq */ 1387 if (test_bit(S_INT_ENABLED, &il->status)) 1388 il_enable_interrupts(il); 1389 1390 #ifdef CONFIG_IWLEGACY_DEBUG 1391 if (il_get_debug_level(il) & (IL_DL_ISR)) { 1392 inta = _il_rd(il, CSR_INT); 1393 inta_mask = _il_rd(il, CSR_INT_MASK); 1394 inta_fh = _il_rd(il, CSR_FH_INT_STATUS); 1395 D_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, " 1396 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags); 1397 } 1398 #endif 1399 } 1400 1401 static int 1402 il3945_get_channels_for_scan(struct il_priv *il, enum nl80211_band band, 1403 u8 is_active, u8 n_probes, 1404 struct il3945_scan_channel *scan_ch, 1405 struct ieee80211_vif *vif) 1406 { 1407 struct ieee80211_channel *chan; 1408 const struct ieee80211_supported_band *sband; 1409 const struct il_channel_info *ch_info; 1410 u16 passive_dwell = 0; 1411 u16 active_dwell = 0; 1412 int added, i; 1413 1414 sband = il_get_hw_mode(il, band); 1415 if (!sband) 1416 return 0; 1417 1418 active_dwell = il_get_active_dwell_time(il, band, n_probes); 1419 passive_dwell = il_get_passive_dwell_time(il, band, vif); 1420 1421 if (passive_dwell <= active_dwell) 1422 passive_dwell = active_dwell + 1; 1423 1424 for (i = 0, added = 0; i < il->scan_request->n_channels; i++) { 1425 chan = il->scan_request->channels[i]; 1426 1427 if (chan->band != band) 1428 continue; 1429 1430 scan_ch->channel = chan->hw_value; 1431 1432 ch_info = il_get_channel_info(il, band, scan_ch->channel); 1433 if (!il_is_channel_valid(ch_info)) { 1434 D_SCAN("Channel %d is INVALID for this band.\n", 1435 scan_ch->channel); 1436 continue; 1437 } 1438 1439 scan_ch->active_dwell = cpu_to_le16(active_dwell); 1440 scan_ch->passive_dwell = cpu_to_le16(passive_dwell); 1441 /* If passive , set up for auto-switch 1442 * and use long active_dwell time. 1443 */ 1444 if (!is_active || il_is_channel_passive(ch_info) || 1445 (chan->flags & IEEE80211_CHAN_NO_IR)) { 1446 scan_ch->type = 0; /* passive */ 1447 if (IL_UCODE_API(il->ucode_ver) == 1) 1448 scan_ch->active_dwell = 1449 cpu_to_le16(passive_dwell - 1); 1450 } else { 1451 scan_ch->type = 1; /* active */ 1452 } 1453 1454 /* Set direct probe bits. These may be used both for active 1455 * scan channels (probes gets sent right away), 1456 * or for passive channels (probes get se sent only after 1457 * hearing clear Rx packet).*/ 1458 if (IL_UCODE_API(il->ucode_ver) >= 2) { 1459 if (n_probes) 1460 scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes); 1461 } else { 1462 /* uCode v1 does not allow setting direct probe bits on 1463 * passive channel. */ 1464 if ((scan_ch->type & 1) && n_probes) 1465 scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes); 1466 } 1467 1468 /* Set txpower levels to defaults */ 1469 scan_ch->tpc.dsp_atten = 110; 1470 /* scan_pwr_info->tpc.dsp_atten; */ 1471 1472 /*scan_pwr_info->tpc.tx_gain; */ 1473 if (band == NL80211_BAND_5GHZ) 1474 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3; 1475 else { 1476 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3)); 1477 /* NOTE: if we were doing 6Mb OFDM for scans we'd use 1478 * power level: 1479 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3; 1480 */ 1481 } 1482 1483 D_SCAN("Scanning %d [%s %d]\n", scan_ch->channel, 1484 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE", 1485 (scan_ch->type & 1) ? active_dwell : passive_dwell); 1486 1487 scan_ch++; 1488 added++; 1489 } 1490 1491 D_SCAN("total channels to scan %d\n", added); 1492 return added; 1493 } 1494 1495 static void 1496 il3945_init_hw_rates(struct il_priv *il, struct ieee80211_rate *rates) 1497 { 1498 int i; 1499 1500 for (i = 0; i < RATE_COUNT_LEGACY; i++) { 1501 rates[i].bitrate = il3945_rates[i].ieee * 5; 1502 rates[i].hw_value = i; /* Rate scaling will work on idxes */ 1503 rates[i].hw_value_short = i; 1504 rates[i].flags = 0; 1505 if (i > IL39_LAST_OFDM_RATE || i < IL_FIRST_OFDM_RATE) { 1506 /* 1507 * If CCK != 1M then set short preamble rate flag. 1508 */ 1509 rates[i].flags |= 1510 (il3945_rates[i].plcp == 1511 10) ? 0 : IEEE80211_RATE_SHORT_PREAMBLE; 1512 } 1513 } 1514 } 1515 1516 /****************************************************************************** 1517 * 1518 * uCode download functions 1519 * 1520 ******************************************************************************/ 1521 1522 static void 1523 il3945_dealloc_ucode_pci(struct il_priv *il) 1524 { 1525 il_free_fw_desc(il->pci_dev, &il->ucode_code); 1526 il_free_fw_desc(il->pci_dev, &il->ucode_data); 1527 il_free_fw_desc(il->pci_dev, &il->ucode_data_backup); 1528 il_free_fw_desc(il->pci_dev, &il->ucode_init); 1529 il_free_fw_desc(il->pci_dev, &il->ucode_init_data); 1530 il_free_fw_desc(il->pci_dev, &il->ucode_boot); 1531 } 1532 1533 /* 1534 * il3945_verify_inst_full - verify runtime uCode image in card vs. host, 1535 * looking at all data. 1536 */ 1537 static int 1538 il3945_verify_inst_full(struct il_priv *il, __le32 * image, u32 len) 1539 { 1540 u32 val; 1541 u32 save_len = len; 1542 int rc = 0; 1543 u32 errcnt; 1544 1545 D_INFO("ucode inst image size is %u\n", len); 1546 1547 il_wr(il, HBUS_TARG_MEM_RADDR, IL39_RTC_INST_LOWER_BOUND); 1548 1549 errcnt = 0; 1550 for (; len > 0; len -= sizeof(u32), image++) { 1551 /* read data comes through single port, auto-incr addr */ 1552 /* NOTE: Use the debugless read so we don't flood kernel log 1553 * if IL_DL_IO is set */ 1554 val = _il_rd(il, HBUS_TARG_MEM_RDAT); 1555 if (val != le32_to_cpu(*image)) { 1556 IL_ERR("uCode INST section is invalid at " 1557 "offset 0x%x, is 0x%x, s/b 0x%x\n", 1558 save_len - len, val, le32_to_cpu(*image)); 1559 rc = -EIO; 1560 errcnt++; 1561 if (errcnt >= 20) 1562 break; 1563 } 1564 } 1565 1566 if (!errcnt) 1567 D_INFO("ucode image in INSTRUCTION memory is good\n"); 1568 1569 return rc; 1570 } 1571 1572 /* 1573 * il3945_verify_inst_sparse - verify runtime uCode image in card vs. host, 1574 * using sample data 100 bytes apart. If these sample points are good, 1575 * it's a pretty good bet that everything between them is good, too. 1576 */ 1577 static int 1578 il3945_verify_inst_sparse(struct il_priv *il, __le32 * image, u32 len) 1579 { 1580 u32 val; 1581 int rc = 0; 1582 u32 errcnt = 0; 1583 u32 i; 1584 1585 D_INFO("ucode inst image size is %u\n", len); 1586 1587 for (i = 0; i < len; i += 100, image += 100 / sizeof(u32)) { 1588 /* read data comes through single port, auto-incr addr */ 1589 /* NOTE: Use the debugless read so we don't flood kernel log 1590 * if IL_DL_IO is set */ 1591 il_wr(il, HBUS_TARG_MEM_RADDR, i + IL39_RTC_INST_LOWER_BOUND); 1592 val = _il_rd(il, HBUS_TARG_MEM_RDAT); 1593 if (val != le32_to_cpu(*image)) { 1594 #if 0 /* Enable this if you want to see details */ 1595 IL_ERR("uCode INST section is invalid at " 1596 "offset 0x%x, is 0x%x, s/b 0x%x\n", i, val, 1597 *image); 1598 #endif 1599 rc = -EIO; 1600 errcnt++; 1601 if (errcnt >= 3) 1602 break; 1603 } 1604 } 1605 1606 return rc; 1607 } 1608 1609 /* 1610 * il3945_verify_ucode - determine which instruction image is in SRAM, 1611 * and verify its contents 1612 */ 1613 static int 1614 il3945_verify_ucode(struct il_priv *il) 1615 { 1616 __le32 *image; 1617 u32 len; 1618 int rc = 0; 1619 1620 /* Try bootstrap */ 1621 image = (__le32 *) il->ucode_boot.v_addr; 1622 len = il->ucode_boot.len; 1623 rc = il3945_verify_inst_sparse(il, image, len); 1624 if (rc == 0) { 1625 D_INFO("Bootstrap uCode is good in inst SRAM\n"); 1626 return 0; 1627 } 1628 1629 /* Try initialize */ 1630 image = (__le32 *) il->ucode_init.v_addr; 1631 len = il->ucode_init.len; 1632 rc = il3945_verify_inst_sparse(il, image, len); 1633 if (rc == 0) { 1634 D_INFO("Initialize uCode is good in inst SRAM\n"); 1635 return 0; 1636 } 1637 1638 /* Try runtime/protocol */ 1639 image = (__le32 *) il->ucode_code.v_addr; 1640 len = il->ucode_code.len; 1641 rc = il3945_verify_inst_sparse(il, image, len); 1642 if (rc == 0) { 1643 D_INFO("Runtime uCode is good in inst SRAM\n"); 1644 return 0; 1645 } 1646 1647 IL_ERR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n"); 1648 1649 /* Since nothing seems to match, show first several data entries in 1650 * instruction SRAM, so maybe visual inspection will give a clue. 1651 * Selection of bootstrap image (vs. other images) is arbitrary. */ 1652 image = (__le32 *) il->ucode_boot.v_addr; 1653 len = il->ucode_boot.len; 1654 rc = il3945_verify_inst_full(il, image, len); 1655 1656 return rc; 1657 } 1658 1659 static void 1660 il3945_nic_start(struct il_priv *il) 1661 { 1662 /* Remove all resets to allow NIC to operate */ 1663 _il_wr(il, CSR_RESET, 0); 1664 } 1665 1666 #define IL3945_UCODE_GET(item) \ 1667 static u32 il3945_ucode_get_##item(const struct il_ucode_header *ucode)\ 1668 { \ 1669 return le32_to_cpu(ucode->v1.item); \ 1670 } 1671 1672 static u32 1673 il3945_ucode_get_header_size(u32 api_ver) 1674 { 1675 return 24; 1676 } 1677 1678 static u8 * 1679 il3945_ucode_get_data(const struct il_ucode_header *ucode) 1680 { 1681 return (u8 *) ucode->v1.data; 1682 } 1683 1684 IL3945_UCODE_GET(inst_size); 1685 IL3945_UCODE_GET(data_size); 1686 IL3945_UCODE_GET(init_size); 1687 IL3945_UCODE_GET(init_data_size); 1688 IL3945_UCODE_GET(boot_size); 1689 1690 /* 1691 * il3945_read_ucode - Read uCode images from disk file. 1692 * 1693 * Copy into buffers for card to fetch via bus-mastering 1694 */ 1695 static int 1696 il3945_read_ucode(struct il_priv *il) 1697 { 1698 const struct il_ucode_header *ucode; 1699 int ret = -EINVAL, idx; 1700 const struct firmware *ucode_raw; 1701 /* firmware file name contains uCode/driver compatibility version */ 1702 const char *name_pre = il->cfg->fw_name_pre; 1703 const unsigned int api_max = il->cfg->ucode_api_max; 1704 const unsigned int api_min = il->cfg->ucode_api_min; 1705 char buf[25]; 1706 u8 *src; 1707 size_t len; 1708 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size; 1709 1710 /* Ask kernel firmware_class module to get the boot firmware off disk. 1711 * request_firmware() is synchronous, file is in memory on return. */ 1712 for (idx = api_max; idx >= api_min; idx--) { 1713 sprintf(buf, "%s%u%s", name_pre, idx, ".ucode"); 1714 ret = request_firmware(&ucode_raw, buf, &il->pci_dev->dev); 1715 if (ret < 0) { 1716 IL_ERR("%s firmware file req failed: %d\n", buf, ret); 1717 if (ret == -ENOENT) 1718 continue; 1719 else 1720 goto error; 1721 } else { 1722 if (idx < api_max) 1723 IL_ERR("Loaded firmware %s, " 1724 "which is deprecated. " 1725 " Please use API v%u instead.\n", buf, 1726 api_max); 1727 D_INFO("Got firmware '%s' file " 1728 "(%zd bytes) from disk\n", buf, ucode_raw->size); 1729 break; 1730 } 1731 } 1732 1733 if (ret < 0) 1734 goto error; 1735 1736 /* Make sure that we got at least our header! */ 1737 if (ucode_raw->size < il3945_ucode_get_header_size(1)) { 1738 IL_ERR("File size way too small!\n"); 1739 ret = -EINVAL; 1740 goto err_release; 1741 } 1742 1743 /* Data from ucode file: header followed by uCode images */ 1744 ucode = (struct il_ucode_header *)ucode_raw->data; 1745 1746 il->ucode_ver = le32_to_cpu(ucode->ver); 1747 api_ver = IL_UCODE_API(il->ucode_ver); 1748 inst_size = il3945_ucode_get_inst_size(ucode); 1749 data_size = il3945_ucode_get_data_size(ucode); 1750 init_size = il3945_ucode_get_init_size(ucode); 1751 init_data_size = il3945_ucode_get_init_data_size(ucode); 1752 boot_size = il3945_ucode_get_boot_size(ucode); 1753 src = il3945_ucode_get_data(ucode); 1754 1755 /* api_ver should match the api version forming part of the 1756 * firmware filename ... but we don't check for that and only rely 1757 * on the API version read from firmware header from here on forward */ 1758 1759 if (api_ver < api_min || api_ver > api_max) { 1760 IL_ERR("Driver unable to support your firmware API. " 1761 "Driver supports v%u, firmware is v%u.\n", api_max, 1762 api_ver); 1763 il->ucode_ver = 0; 1764 ret = -EINVAL; 1765 goto err_release; 1766 } 1767 if (api_ver != api_max) 1768 IL_ERR("Firmware has old API version. Expected %u, " 1769 "got %u. New firmware can be obtained " 1770 "from http://www.intellinuxwireless.org.\n", api_max, 1771 api_ver); 1772 1773 IL_INFO("loaded firmware version %u.%u.%u.%u\n", 1774 IL_UCODE_MAJOR(il->ucode_ver), IL_UCODE_MINOR(il->ucode_ver), 1775 IL_UCODE_API(il->ucode_ver), IL_UCODE_SERIAL(il->ucode_ver)); 1776 1777 snprintf(il->hw->wiphy->fw_version, sizeof(il->hw->wiphy->fw_version), 1778 "%u.%u.%u.%u", IL_UCODE_MAJOR(il->ucode_ver), 1779 IL_UCODE_MINOR(il->ucode_ver), IL_UCODE_API(il->ucode_ver), 1780 IL_UCODE_SERIAL(il->ucode_ver)); 1781 1782 D_INFO("f/w package hdr ucode version raw = 0x%x\n", il->ucode_ver); 1783 D_INFO("f/w package hdr runtime inst size = %u\n", inst_size); 1784 D_INFO("f/w package hdr runtime data size = %u\n", data_size); 1785 D_INFO("f/w package hdr init inst size = %u\n", init_size); 1786 D_INFO("f/w package hdr init data size = %u\n", init_data_size); 1787 D_INFO("f/w package hdr boot inst size = %u\n", boot_size); 1788 1789 /* Verify size of file vs. image size info in file's header */ 1790 if (ucode_raw->size != 1791 il3945_ucode_get_header_size(api_ver) + inst_size + data_size + 1792 init_size + init_data_size + boot_size) { 1793 1794 D_INFO("uCode file size %zd does not match expected size\n", 1795 ucode_raw->size); 1796 ret = -EINVAL; 1797 goto err_release; 1798 } 1799 1800 /* Verify that uCode images will fit in card's SRAM */ 1801 if (inst_size > IL39_MAX_INST_SIZE) { 1802 D_INFO("uCode instr len %d too large to fit in\n", inst_size); 1803 ret = -EINVAL; 1804 goto err_release; 1805 } 1806 1807 if (data_size > IL39_MAX_DATA_SIZE) { 1808 D_INFO("uCode data len %d too large to fit in\n", data_size); 1809 ret = -EINVAL; 1810 goto err_release; 1811 } 1812 if (init_size > IL39_MAX_INST_SIZE) { 1813 D_INFO("uCode init instr len %d too large to fit in\n", 1814 init_size); 1815 ret = -EINVAL; 1816 goto err_release; 1817 } 1818 if (init_data_size > IL39_MAX_DATA_SIZE) { 1819 D_INFO("uCode init data len %d too large to fit in\n", 1820 init_data_size); 1821 ret = -EINVAL; 1822 goto err_release; 1823 } 1824 if (boot_size > IL39_MAX_BSM_SIZE) { 1825 D_INFO("uCode boot instr len %d too large to fit in\n", 1826 boot_size); 1827 ret = -EINVAL; 1828 goto err_release; 1829 } 1830 1831 /* Allocate ucode buffers for card's bus-master loading ... */ 1832 1833 /* Runtime instructions and 2 copies of data: 1834 * 1) unmodified from disk 1835 * 2) backup cache for save/restore during power-downs */ 1836 il->ucode_code.len = inst_size; 1837 il_alloc_fw_desc(il->pci_dev, &il->ucode_code); 1838 1839 il->ucode_data.len = data_size; 1840 il_alloc_fw_desc(il->pci_dev, &il->ucode_data); 1841 1842 il->ucode_data_backup.len = data_size; 1843 il_alloc_fw_desc(il->pci_dev, &il->ucode_data_backup); 1844 1845 if (!il->ucode_code.v_addr || !il->ucode_data.v_addr || 1846 !il->ucode_data_backup.v_addr) 1847 goto err_pci_alloc; 1848 1849 /* Initialization instructions and data */ 1850 if (init_size && init_data_size) { 1851 il->ucode_init.len = init_size; 1852 il_alloc_fw_desc(il->pci_dev, &il->ucode_init); 1853 1854 il->ucode_init_data.len = init_data_size; 1855 il_alloc_fw_desc(il->pci_dev, &il->ucode_init_data); 1856 1857 if (!il->ucode_init.v_addr || !il->ucode_init_data.v_addr) 1858 goto err_pci_alloc; 1859 } 1860 1861 /* Bootstrap (instructions only, no data) */ 1862 if (boot_size) { 1863 il->ucode_boot.len = boot_size; 1864 il_alloc_fw_desc(il->pci_dev, &il->ucode_boot); 1865 1866 if (!il->ucode_boot.v_addr) 1867 goto err_pci_alloc; 1868 } 1869 1870 /* Copy images into buffers for card's bus-master reads ... */ 1871 1872 /* Runtime instructions (first block of data in file) */ 1873 len = inst_size; 1874 D_INFO("Copying (but not loading) uCode instr len %zd\n", len); 1875 memcpy(il->ucode_code.v_addr, src, len); 1876 src += len; 1877 1878 D_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n", 1879 il->ucode_code.v_addr, (u32) il->ucode_code.p_addr); 1880 1881 /* Runtime data (2nd block) 1882 * NOTE: Copy into backup buffer will be done in il3945_up() */ 1883 len = data_size; 1884 D_INFO("Copying (but not loading) uCode data len %zd\n", len); 1885 memcpy(il->ucode_data.v_addr, src, len); 1886 memcpy(il->ucode_data_backup.v_addr, src, len); 1887 src += len; 1888 1889 /* Initialization instructions (3rd block) */ 1890 if (init_size) { 1891 len = init_size; 1892 D_INFO("Copying (but not loading) init instr len %zd\n", len); 1893 memcpy(il->ucode_init.v_addr, src, len); 1894 src += len; 1895 } 1896 1897 /* Initialization data (4th block) */ 1898 if (init_data_size) { 1899 len = init_data_size; 1900 D_INFO("Copying (but not loading) init data len %zd\n", len); 1901 memcpy(il->ucode_init_data.v_addr, src, len); 1902 src += len; 1903 } 1904 1905 /* Bootstrap instructions (5th block) */ 1906 len = boot_size; 1907 D_INFO("Copying (but not loading) boot instr len %zd\n", len); 1908 memcpy(il->ucode_boot.v_addr, src, len); 1909 1910 /* We have our copies now, allow OS release its copies */ 1911 release_firmware(ucode_raw); 1912 return 0; 1913 1914 err_pci_alloc: 1915 IL_ERR("failed to allocate pci memory\n"); 1916 ret = -ENOMEM; 1917 il3945_dealloc_ucode_pci(il); 1918 1919 err_release: 1920 release_firmware(ucode_raw); 1921 1922 error: 1923 return ret; 1924 } 1925 1926 /* 1927 * il3945_set_ucode_ptrs - Set uCode address location 1928 * 1929 * Tell initialization uCode where to find runtime uCode. 1930 * 1931 * BSM registers initially contain pointers to initialization uCode. 1932 * We need to replace them to load runtime uCode inst and data, 1933 * and to save runtime data when powering down. 1934 */ 1935 static int 1936 il3945_set_ucode_ptrs(struct il_priv *il) 1937 { 1938 dma_addr_t pinst; 1939 dma_addr_t pdata; 1940 1941 /* bits 31:0 for 3945 */ 1942 pinst = il->ucode_code.p_addr; 1943 pdata = il->ucode_data_backup.p_addr; 1944 1945 /* Tell bootstrap uCode where to find image to load */ 1946 il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst); 1947 il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata); 1948 il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, il->ucode_data.len); 1949 1950 /* Inst byte count must be last to set up, bit 31 signals uCode 1951 * that all new ptr/size info is in place */ 1952 il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG, 1953 il->ucode_code.len | BSM_DRAM_INST_LOAD); 1954 1955 D_INFO("Runtime uCode pointers are set.\n"); 1956 1957 return 0; 1958 } 1959 1960 /* 1961 * il3945_init_alive_start - Called after N_ALIVE notification received 1962 * 1963 * Called after N_ALIVE notification received from "initialize" uCode. 1964 * 1965 * Tell "initialize" uCode to go ahead and load the runtime uCode. 1966 */ 1967 static void 1968 il3945_init_alive_start(struct il_priv *il) 1969 { 1970 /* Check alive response for "valid" sign from uCode */ 1971 if (il->card_alive_init.is_valid != UCODE_VALID_OK) { 1972 /* We had an error bringing up the hardware, so take it 1973 * all the way back down so we can try again */ 1974 D_INFO("Initialize Alive failed.\n"); 1975 goto restart; 1976 } 1977 1978 /* Bootstrap uCode has loaded initialize uCode ... verify inst image. 1979 * This is a paranoid check, because we would not have gotten the 1980 * "initialize" alive if code weren't properly loaded. */ 1981 if (il3945_verify_ucode(il)) { 1982 /* Runtime instruction load was bad; 1983 * take it all the way back down so we can try again */ 1984 D_INFO("Bad \"initialize\" uCode load.\n"); 1985 goto restart; 1986 } 1987 1988 /* Send pointers to protocol/runtime uCode image ... init code will 1989 * load and launch runtime uCode, which will send us another "Alive" 1990 * notification. */ 1991 D_INFO("Initialization Alive received.\n"); 1992 if (il3945_set_ucode_ptrs(il)) { 1993 /* Runtime instruction load won't happen; 1994 * take it all the way back down so we can try again */ 1995 D_INFO("Couldn't set up uCode pointers.\n"); 1996 goto restart; 1997 } 1998 return; 1999 2000 restart: 2001 queue_work(il->workqueue, &il->restart); 2002 } 2003 2004 /* 2005 * il3945_alive_start - called after N_ALIVE notification received 2006 * from protocol/runtime uCode (initialization uCode's 2007 * Alive gets handled by il3945_init_alive_start()). 2008 */ 2009 static void 2010 il3945_alive_start(struct il_priv *il) 2011 { 2012 int thermal_spin = 0; 2013 u32 rfkill; 2014 2015 D_INFO("Runtime Alive received.\n"); 2016 2017 if (il->card_alive.is_valid != UCODE_VALID_OK) { 2018 /* We had an error bringing up the hardware, so take it 2019 * all the way back down so we can try again */ 2020 D_INFO("Alive failed.\n"); 2021 goto restart; 2022 } 2023 2024 /* Initialize uCode has loaded Runtime uCode ... verify inst image. 2025 * This is a paranoid check, because we would not have gotten the 2026 * "runtime" alive if code weren't properly loaded. */ 2027 if (il3945_verify_ucode(il)) { 2028 /* Runtime instruction load was bad; 2029 * take it all the way back down so we can try again */ 2030 D_INFO("Bad runtime uCode load.\n"); 2031 goto restart; 2032 } 2033 2034 rfkill = il_rd_prph(il, APMG_RFKILL_REG); 2035 D_INFO("RFKILL status: 0x%x\n", rfkill); 2036 2037 if (rfkill & 0x1) { 2038 clear_bit(S_RFKILL, &il->status); 2039 /* if RFKILL is not on, then wait for thermal 2040 * sensor in adapter to kick in */ 2041 while (il3945_hw_get_temperature(il) == 0) { 2042 thermal_spin++; 2043 udelay(10); 2044 } 2045 2046 if (thermal_spin) 2047 D_INFO("Thermal calibration took %dus\n", 2048 thermal_spin * 10); 2049 } else 2050 set_bit(S_RFKILL, &il->status); 2051 2052 /* After the ALIVE response, we can send commands to 3945 uCode */ 2053 set_bit(S_ALIVE, &il->status); 2054 2055 /* Enable watchdog to monitor the driver tx queues */ 2056 il_setup_watchdog(il); 2057 2058 if (il_is_rfkill(il)) 2059 return; 2060 2061 ieee80211_wake_queues(il->hw); 2062 2063 il->active_rate = RATES_MASK_3945; 2064 2065 il_power_update_mode(il, true); 2066 2067 if (il_is_associated(il)) { 2068 struct il3945_rxon_cmd *active_rxon = 2069 (struct il3945_rxon_cmd *)(&il->active); 2070 2071 il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK; 2072 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; 2073 } else { 2074 /* Initialize our rx_config data */ 2075 il_connection_init_rx_config(il); 2076 } 2077 2078 /* Configure Bluetooth device coexistence support */ 2079 il_send_bt_config(il); 2080 2081 set_bit(S_READY, &il->status); 2082 2083 /* Configure the adapter for unassociated operation */ 2084 il3945_commit_rxon(il); 2085 2086 il3945_reg_txpower_periodic(il); 2087 2088 D_INFO("ALIVE processing complete.\n"); 2089 wake_up(&il->wait_command_queue); 2090 2091 return; 2092 2093 restart: 2094 queue_work(il->workqueue, &il->restart); 2095 } 2096 2097 static void il3945_cancel_deferred_work(struct il_priv *il); 2098 2099 static void 2100 __il3945_down(struct il_priv *il) 2101 { 2102 unsigned long flags; 2103 int exit_pending; 2104 2105 D_INFO(DRV_NAME " is going down\n"); 2106 2107 il_scan_cancel_timeout(il, 200); 2108 2109 exit_pending = test_and_set_bit(S_EXIT_PENDING, &il->status); 2110 2111 /* Stop TX queues watchdog. We need to have S_EXIT_PENDING bit set 2112 * to prevent rearm timer */ 2113 timer_delete_sync(&il->watchdog); 2114 2115 /* Station information will now be cleared in device */ 2116 il_clear_ucode_stations(il); 2117 il_dealloc_bcast_stations(il); 2118 il_clear_driver_stations(il); 2119 2120 /* Unblock any waiting calls */ 2121 wake_up_all(&il->wait_command_queue); 2122 2123 /* Wipe out the EXIT_PENDING status bit if we are not actually 2124 * exiting the module */ 2125 if (!exit_pending) 2126 clear_bit(S_EXIT_PENDING, &il->status); 2127 2128 /* stop and reset the on-board processor */ 2129 _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); 2130 2131 /* tell the device to stop sending interrupts */ 2132 spin_lock_irqsave(&il->lock, flags); 2133 il_disable_interrupts(il); 2134 spin_unlock_irqrestore(&il->lock, flags); 2135 il3945_synchronize_irq(il); 2136 2137 if (il->mac80211_registered) 2138 ieee80211_stop_queues(il->hw); 2139 2140 /* If we have not previously called il3945_init() then 2141 * clear all bits but the RF Kill bits and return */ 2142 if (!il_is_init(il)) { 2143 il->status = 2144 test_bit(S_RFKILL, &il->status) << S_RFKILL | 2145 test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED | 2146 test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING; 2147 goto exit; 2148 } 2149 2150 /* ...otherwise clear out all the status bits but the RF Kill 2151 * bit and continue taking the NIC down. */ 2152 il->status &= 2153 test_bit(S_RFKILL, &il->status) << S_RFKILL | 2154 test_bit(S_GEO_CONFIGURED, &il->status) << S_GEO_CONFIGURED | 2155 test_bit(S_FW_ERROR, &il->status) << S_FW_ERROR | 2156 test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING; 2157 2158 /* 2159 * We disabled and synchronized interrupt, and priv->mutex is taken, so 2160 * here is the only thread which will program device registers, but 2161 * still have lockdep assertions, so we are taking reg_lock. 2162 */ 2163 spin_lock_irq(&il->reg_lock); 2164 /* FIXME: il_grab_nic_access if rfkill is off ? */ 2165 2166 il3945_hw_txq_ctx_stop(il); 2167 il3945_hw_rxq_stop(il); 2168 /* Power-down device's busmaster DMA clocks */ 2169 _il_wr_prph(il, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT); 2170 udelay(5); 2171 /* Stop the device, and put it in low power state */ 2172 _il_apm_stop(il); 2173 2174 spin_unlock_irq(&il->reg_lock); 2175 2176 il3945_hw_txq_ctx_free(il); 2177 exit: 2178 memset(&il->card_alive, 0, sizeof(struct il_alive_resp)); 2179 dev_kfree_skb(il->beacon_skb); 2180 il->beacon_skb = NULL; 2181 2182 /* clear out any free frames */ 2183 il3945_clear_free_frames(il); 2184 } 2185 2186 static void 2187 il3945_down(struct il_priv *il) 2188 { 2189 mutex_lock(&il->mutex); 2190 __il3945_down(il); 2191 mutex_unlock(&il->mutex); 2192 2193 il3945_cancel_deferred_work(il); 2194 } 2195 2196 #define MAX_HW_RESTARTS 5 2197 2198 static int 2199 il3945_alloc_bcast_station(struct il_priv *il) 2200 { 2201 unsigned long flags; 2202 u8 sta_id; 2203 2204 spin_lock_irqsave(&il->sta_lock, flags); 2205 sta_id = il_prep_station(il, il_bcast_addr, false, NULL); 2206 if (sta_id == IL_INVALID_STATION) { 2207 IL_ERR("Unable to prepare broadcast station\n"); 2208 spin_unlock_irqrestore(&il->sta_lock, flags); 2209 2210 return -EINVAL; 2211 } 2212 2213 il->stations[sta_id].used |= IL_STA_DRIVER_ACTIVE; 2214 il->stations[sta_id].used |= IL_STA_BCAST; 2215 spin_unlock_irqrestore(&il->sta_lock, flags); 2216 2217 return 0; 2218 } 2219 2220 static int 2221 __il3945_up(struct il_priv *il) 2222 { 2223 int rc, i; 2224 2225 rc = il3945_alloc_bcast_station(il); 2226 if (rc) 2227 return rc; 2228 2229 if (test_bit(S_EXIT_PENDING, &il->status)) { 2230 IL_WARN("Exit pending; will not bring the NIC up\n"); 2231 return -EIO; 2232 } 2233 2234 if (!il->ucode_data_backup.v_addr || !il->ucode_data.v_addr) { 2235 IL_ERR("ucode not available for device bring up\n"); 2236 return -EIO; 2237 } 2238 2239 /* If platform's RF_KILL switch is NOT set to KILL */ 2240 if (_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) 2241 clear_bit(S_RFKILL, &il->status); 2242 else { 2243 set_bit(S_RFKILL, &il->status); 2244 return -ERFKILL; 2245 } 2246 2247 _il_wr(il, CSR_INT, 0xFFFFFFFF); 2248 2249 rc = il3945_hw_nic_init(il); 2250 if (rc) { 2251 IL_ERR("Unable to int nic\n"); 2252 return rc; 2253 } 2254 2255 /* make sure rfkill handshake bits are cleared */ 2256 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); 2257 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); 2258 2259 /* clear (again), then enable host interrupts */ 2260 _il_wr(il, CSR_INT, 0xFFFFFFFF); 2261 il_enable_interrupts(il); 2262 2263 /* really make sure rfkill handshake bits are cleared */ 2264 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); 2265 _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); 2266 2267 /* Copy original ucode data image from disk into backup cache. 2268 * This will be used to initialize the on-board processor's 2269 * data SRAM for a clean start when the runtime program first loads. */ 2270 memcpy(il->ucode_data_backup.v_addr, il->ucode_data.v_addr, 2271 il->ucode_data.len); 2272 2273 /* We return success when we resume from suspend and rf_kill is on. */ 2274 if (test_bit(S_RFKILL, &il->status)) 2275 return 0; 2276 2277 for (i = 0; i < MAX_HW_RESTARTS; i++) { 2278 2279 /* load bootstrap state machine, 2280 * load bootstrap program into processor's memory, 2281 * prepare to load the "initialize" uCode */ 2282 rc = il->ops->load_ucode(il); 2283 2284 if (rc) { 2285 IL_ERR("Unable to set up bootstrap uCode: %d\n", rc); 2286 continue; 2287 } 2288 2289 /* start card; "initialize" will load runtime ucode */ 2290 il3945_nic_start(il); 2291 2292 D_INFO(DRV_NAME " is coming up\n"); 2293 2294 return 0; 2295 } 2296 2297 set_bit(S_EXIT_PENDING, &il->status); 2298 __il3945_down(il); 2299 clear_bit(S_EXIT_PENDING, &il->status); 2300 2301 /* tried to restart and config the device for as long as our 2302 * patience could withstand */ 2303 IL_ERR("Unable to initialize device after %d attempts.\n", i); 2304 return -EIO; 2305 } 2306 2307 /***************************************************************************** 2308 * 2309 * Workqueue callbacks 2310 * 2311 *****************************************************************************/ 2312 2313 static void 2314 il3945_bg_init_alive_start(struct work_struct *data) 2315 { 2316 struct il_priv *il = 2317 container_of(data, struct il_priv, init_alive_start.work); 2318 2319 mutex_lock(&il->mutex); 2320 if (test_bit(S_EXIT_PENDING, &il->status)) 2321 goto out; 2322 2323 il3945_init_alive_start(il); 2324 out: 2325 mutex_unlock(&il->mutex); 2326 } 2327 2328 static void 2329 il3945_bg_alive_start(struct work_struct *data) 2330 { 2331 struct il_priv *il = 2332 container_of(data, struct il_priv, alive_start.work); 2333 2334 mutex_lock(&il->mutex); 2335 if (test_bit(S_EXIT_PENDING, &il->status) || il->txq == NULL) 2336 goto out; 2337 2338 il3945_alive_start(il); 2339 out: 2340 mutex_unlock(&il->mutex); 2341 } 2342 2343 /* 2344 * 3945 cannot interrupt driver when hardware rf kill switch toggles; 2345 * driver must poll CSR_GP_CNTRL_REG register for change. This register 2346 * *is* readable even when device has been SW_RESET into low power mode 2347 * (e.g. during RF KILL). 2348 */ 2349 static void 2350 il3945_rfkill_poll(struct work_struct *data) 2351 { 2352 struct il_priv *il = 2353 container_of(data, struct il_priv, _3945.rfkill_poll.work); 2354 bool old_rfkill = test_bit(S_RFKILL, &il->status); 2355 bool new_rfkill = 2356 !(_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW); 2357 2358 if (new_rfkill != old_rfkill) { 2359 if (new_rfkill) 2360 set_bit(S_RFKILL, &il->status); 2361 else 2362 clear_bit(S_RFKILL, &il->status); 2363 2364 wiphy_rfkill_set_hw_state(il->hw->wiphy, new_rfkill); 2365 2366 D_RF_KILL("RF_KILL bit toggled to %s.\n", 2367 new_rfkill ? "disable radio" : "enable radio"); 2368 } 2369 2370 /* Keep this running, even if radio now enabled. This will be 2371 * cancelled in mac_start() if system decides to start again */ 2372 queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll, 2373 round_jiffies_relative(2 * HZ)); 2374 2375 } 2376 2377 int 2378 il3945_request_scan(struct il_priv *il, struct ieee80211_vif *vif) 2379 { 2380 struct il_host_cmd cmd = { 2381 .id = C_SCAN, 2382 .len = sizeof(struct il3945_scan_cmd), 2383 .flags = CMD_SIZE_HUGE, 2384 }; 2385 struct il3945_scan_cmd *scan; 2386 u8 n_probes = 0; 2387 enum nl80211_band band; 2388 bool is_active = false; 2389 int ret; 2390 u16 len; 2391 2392 lockdep_assert_held(&il->mutex); 2393 2394 if (!il->scan_cmd) { 2395 il->scan_cmd = 2396 kmalloc(sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE, 2397 GFP_KERNEL); 2398 if (!il->scan_cmd) { 2399 D_SCAN("Fail to allocate scan memory\n"); 2400 return -ENOMEM; 2401 } 2402 } 2403 scan = il->scan_cmd; 2404 memset(scan, 0, sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE); 2405 2406 scan->quiet_plcp_th = IL_PLCP_QUIET_THRESH; 2407 scan->quiet_time = IL_ACTIVE_QUIET_TIME; 2408 2409 if (il_is_associated(il)) { 2410 u16 interval; 2411 u32 extra; 2412 u32 suspend_time = 100; 2413 u32 scan_suspend_time = 100; 2414 2415 D_INFO("Scanning while associated...\n"); 2416 2417 interval = vif->bss_conf.beacon_int; 2418 2419 scan->suspend_time = 0; 2420 scan->max_out_time = cpu_to_le32(200 * 1024); 2421 if (!interval) 2422 interval = suspend_time; 2423 /* 2424 * suspend time format: 2425 * 0-19: beacon interval in usec (time before exec.) 2426 * 20-23: 0 2427 * 24-31: number of beacons (suspend between channels) 2428 */ 2429 2430 extra = (suspend_time / interval) << 24; 2431 scan_suspend_time = 2432 0xFF0FFFFF & (extra | ((suspend_time % interval) * 1024)); 2433 2434 scan->suspend_time = cpu_to_le32(scan_suspend_time); 2435 D_SCAN("suspend_time 0x%X beacon interval %d\n", 2436 scan_suspend_time, interval); 2437 } 2438 2439 if (il->scan_request->n_ssids) { 2440 int i, p = 0; 2441 D_SCAN("Kicking off active scan\n"); 2442 for (i = 0; i < il->scan_request->n_ssids; i++) { 2443 /* always does wildcard anyway */ 2444 if (!il->scan_request->ssids[i].ssid_len) 2445 continue; 2446 scan->direct_scan[p].id = WLAN_EID_SSID; 2447 scan->direct_scan[p].len = 2448 il->scan_request->ssids[i].ssid_len; 2449 memcpy(scan->direct_scan[p].ssid, 2450 il->scan_request->ssids[i].ssid, 2451 il->scan_request->ssids[i].ssid_len); 2452 n_probes++; 2453 p++; 2454 } 2455 is_active = true; 2456 } else 2457 D_SCAN("Kicking off passive scan.\n"); 2458 2459 /* We don't build a direct scan probe request; the uCode will do 2460 * that based on the direct_mask added to each channel entry */ 2461 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK; 2462 scan->tx_cmd.sta_id = il->hw_params.bcast_id; 2463 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; 2464 2465 /* flags + rate selection */ 2466 2467 switch (il->scan_band) { 2468 case NL80211_BAND_2GHZ: 2469 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK; 2470 scan->tx_cmd.rate = RATE_1M_PLCP; 2471 band = NL80211_BAND_2GHZ; 2472 break; 2473 case NL80211_BAND_5GHZ: 2474 scan->tx_cmd.rate = RATE_6M_PLCP; 2475 band = NL80211_BAND_5GHZ; 2476 break; 2477 default: 2478 IL_WARN("Invalid scan band\n"); 2479 return -EIO; 2480 } 2481 2482 /* 2483 * If active scaning is requested but a certain channel is marked 2484 * passive, we can do active scanning if we detect transmissions. For 2485 * passive only scanning disable switching to active on any channel. 2486 */ 2487 scan->good_CRC_th = 2488 is_active ? IL_GOOD_CRC_TH_DEFAULT : IL_GOOD_CRC_TH_NEVER; 2489 2490 len = 2491 il_fill_probe_req(il, (struct ieee80211_mgmt *)scan->data, 2492 vif->addr, il->scan_request->ie, 2493 il->scan_request->ie_len, 2494 IL_MAX_SCAN_SIZE - sizeof(*scan)); 2495 scan->tx_cmd.len = cpu_to_le16(len); 2496 2497 /* select Rx antennas */ 2498 scan->flags |= il3945_get_antenna_flags(il); 2499 2500 scan->channel_count = 2501 il3945_get_channels_for_scan(il, band, is_active, n_probes, 2502 (void *)&scan->data[len], vif); 2503 if (scan->channel_count == 0) { 2504 D_SCAN("channel count %d\n", scan->channel_count); 2505 return -EIO; 2506 } 2507 2508 cmd.len += 2509 le16_to_cpu(scan->tx_cmd.len) + 2510 scan->channel_count * sizeof(struct il3945_scan_channel); 2511 cmd.data = scan; 2512 scan->len = cpu_to_le16(cmd.len); 2513 2514 set_bit(S_SCAN_HW, &il->status); 2515 ret = il_send_cmd_sync(il, &cmd); 2516 if (ret) 2517 clear_bit(S_SCAN_HW, &il->status); 2518 return ret; 2519 } 2520 2521 void 2522 il3945_post_scan(struct il_priv *il) 2523 { 2524 /* 2525 * Since setting the RXON may have been deferred while 2526 * performing the scan, fire one off if needed 2527 */ 2528 if (memcmp(&il->staging, &il->active, sizeof(il->staging))) 2529 il3945_commit_rxon(il); 2530 } 2531 2532 static void 2533 il3945_bg_restart(struct work_struct *data) 2534 { 2535 struct il_priv *il = container_of(data, struct il_priv, restart); 2536 2537 if (test_bit(S_EXIT_PENDING, &il->status)) 2538 return; 2539 2540 if (test_and_clear_bit(S_FW_ERROR, &il->status)) { 2541 mutex_lock(&il->mutex); 2542 il->is_open = 0; 2543 mutex_unlock(&il->mutex); 2544 il3945_down(il); 2545 ieee80211_restart_hw(il->hw); 2546 } else { 2547 il3945_down(il); 2548 2549 mutex_lock(&il->mutex); 2550 if (test_bit(S_EXIT_PENDING, &il->status)) { 2551 mutex_unlock(&il->mutex); 2552 return; 2553 } 2554 2555 __il3945_up(il); 2556 mutex_unlock(&il->mutex); 2557 } 2558 } 2559 2560 static void 2561 il3945_bg_rx_replenish(struct work_struct *data) 2562 { 2563 struct il_priv *il = container_of(data, struct il_priv, rx_replenish); 2564 2565 mutex_lock(&il->mutex); 2566 if (test_bit(S_EXIT_PENDING, &il->status)) 2567 goto out; 2568 2569 il3945_rx_replenish(il); 2570 out: 2571 mutex_unlock(&il->mutex); 2572 } 2573 2574 void 2575 il3945_post_associate(struct il_priv *il) 2576 { 2577 int rc = 0; 2578 2579 if (!il->vif || !il->is_open) 2580 return; 2581 2582 D_ASSOC("Associated as %d to: %pM\n", il->vif->cfg.aid, 2583 il->active.bssid_addr); 2584 2585 if (test_bit(S_EXIT_PENDING, &il->status)) 2586 return; 2587 2588 il_scan_cancel_timeout(il, 200); 2589 2590 il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK; 2591 il3945_commit_rxon(il); 2592 2593 rc = il_send_rxon_timing(il); 2594 if (rc) 2595 IL_WARN("C_RXON_TIMING failed - " "Attempting to continue.\n"); 2596 2597 il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK; 2598 2599 il->staging.assoc_id = cpu_to_le16(il->vif->cfg.aid); 2600 2601 D_ASSOC("assoc id %d beacon interval %d\n", il->vif->cfg.aid, 2602 il->vif->bss_conf.beacon_int); 2603 2604 if (il->vif->bss_conf.use_short_preamble) 2605 il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; 2606 else 2607 il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; 2608 2609 if (il->staging.flags & RXON_FLG_BAND_24G_MSK) { 2610 if (il->vif->bss_conf.use_short_slot) 2611 il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK; 2612 else 2613 il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK; 2614 } 2615 2616 il3945_commit_rxon(il); 2617 2618 switch (il->vif->type) { 2619 case NL80211_IFTYPE_STATION: 2620 il3945_rate_scale_init(il->hw, IL_AP_ID); 2621 break; 2622 case NL80211_IFTYPE_ADHOC: 2623 il3945_send_beacon_cmd(il); 2624 break; 2625 default: 2626 IL_ERR("%s Should not be called in %d mode\n", __func__, 2627 il->vif->type); 2628 break; 2629 } 2630 } 2631 2632 /***************************************************************************** 2633 * 2634 * mac80211 entry point functions 2635 * 2636 *****************************************************************************/ 2637 2638 #define UCODE_READY_TIMEOUT (2 * HZ) 2639 2640 static int 2641 il3945_mac_start(struct ieee80211_hw *hw) 2642 { 2643 struct il_priv *il = hw->priv; 2644 int ret; 2645 2646 /* we should be verifying the device is ready to be opened */ 2647 mutex_lock(&il->mutex); 2648 D_MAC80211("enter\n"); 2649 2650 /* fetch ucode file from disk, alloc and copy to bus-master buffers ... 2651 * ucode filename and max sizes are card-specific. */ 2652 2653 if (!il->ucode_code.len) { 2654 ret = il3945_read_ucode(il); 2655 if (ret) { 2656 IL_ERR("Could not read microcode: %d\n", ret); 2657 mutex_unlock(&il->mutex); 2658 goto out_release_irq; 2659 } 2660 } 2661 2662 ret = __il3945_up(il); 2663 2664 mutex_unlock(&il->mutex); 2665 2666 if (ret) 2667 goto out_release_irq; 2668 2669 D_INFO("Start UP work.\n"); 2670 2671 /* Wait for START_ALIVE from ucode. Otherwise callbacks from 2672 * mac80211 will not be run successfully. */ 2673 ret = wait_event_timeout(il->wait_command_queue, 2674 test_bit(S_READY, &il->status), 2675 UCODE_READY_TIMEOUT); 2676 if (!ret) { 2677 if (!test_bit(S_READY, &il->status)) { 2678 IL_ERR("Wait for START_ALIVE timeout after %dms.\n", 2679 jiffies_to_msecs(UCODE_READY_TIMEOUT)); 2680 ret = -ETIMEDOUT; 2681 goto out_release_irq; 2682 } 2683 } 2684 2685 /* ucode is running and will send rfkill notifications, 2686 * no need to poll the killswitch state anymore */ 2687 cancel_delayed_work(&il->_3945.rfkill_poll); 2688 2689 il->is_open = 1; 2690 D_MAC80211("leave\n"); 2691 return 0; 2692 2693 out_release_irq: 2694 il->is_open = 0; 2695 D_MAC80211("leave - failed\n"); 2696 return ret; 2697 } 2698 2699 static void 2700 il3945_mac_stop(struct ieee80211_hw *hw, bool suspend) 2701 { 2702 struct il_priv *il = hw->priv; 2703 2704 D_MAC80211("enter\n"); 2705 2706 if (!il->is_open) { 2707 D_MAC80211("leave - skip\n"); 2708 return; 2709 } 2710 2711 il->is_open = 0; 2712 2713 il3945_down(il); 2714 2715 flush_workqueue(il->workqueue); 2716 2717 /* start polling the killswitch state again */ 2718 queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll, 2719 round_jiffies_relative(2 * HZ)); 2720 2721 D_MAC80211("leave\n"); 2722 } 2723 2724 static void 2725 il3945_mac_tx(struct ieee80211_hw *hw, 2726 struct ieee80211_tx_control *control, 2727 struct sk_buff *skb) 2728 { 2729 struct il_priv *il = hw->priv; 2730 2731 D_MAC80211("enter\n"); 2732 2733 D_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len, 2734 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate); 2735 2736 if (il3945_tx_skb(il, control->sta, skb)) 2737 dev_kfree_skb_any(skb); 2738 2739 D_MAC80211("leave\n"); 2740 } 2741 2742 void 2743 il3945_config_ap(struct il_priv *il) 2744 { 2745 struct ieee80211_vif *vif = il->vif; 2746 int rc = 0; 2747 2748 if (test_bit(S_EXIT_PENDING, &il->status)) 2749 return; 2750 2751 /* The following should be done only at AP bring up */ 2752 if (!(il_is_associated(il))) { 2753 2754 /* RXON - unassoc (to set timing command) */ 2755 il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK; 2756 il3945_commit_rxon(il); 2757 2758 /* RXON Timing */ 2759 rc = il_send_rxon_timing(il); 2760 if (rc) 2761 IL_WARN("C_RXON_TIMING failed - " 2762 "Attempting to continue.\n"); 2763 2764 il->staging.assoc_id = 0; 2765 2766 if (vif->bss_conf.use_short_preamble) 2767 il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; 2768 else 2769 il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; 2770 2771 if (il->staging.flags & RXON_FLG_BAND_24G_MSK) { 2772 if (vif->bss_conf.use_short_slot) 2773 il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK; 2774 else 2775 il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK; 2776 } 2777 /* restore RXON assoc */ 2778 il->staging.filter_flags |= RXON_FILTER_ASSOC_MSK; 2779 il3945_commit_rxon(il); 2780 } 2781 il3945_send_beacon_cmd(il); 2782 } 2783 2784 static int 2785 il3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, 2786 struct ieee80211_vif *vif, struct ieee80211_sta *sta, 2787 struct ieee80211_key_conf *key) 2788 { 2789 struct il_priv *il = hw->priv; 2790 int ret = 0; 2791 u8 sta_id = IL_INVALID_STATION; 2792 u8 static_key; 2793 2794 D_MAC80211("enter\n"); 2795 2796 if (il3945_mod_params.sw_crypto) { 2797 D_MAC80211("leave - hwcrypto disabled\n"); 2798 return -EOPNOTSUPP; 2799 } 2800 2801 /* 2802 * To support IBSS RSN, don't program group keys in IBSS, the 2803 * hardware will then not attempt to decrypt the frames. 2804 */ 2805 if (vif->type == NL80211_IFTYPE_ADHOC && 2806 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) { 2807 D_MAC80211("leave - IBSS RSN\n"); 2808 return -EOPNOTSUPP; 2809 } 2810 2811 static_key = !il_is_associated(il); 2812 2813 if (!static_key) { 2814 sta_id = il_sta_id_or_broadcast(il, sta); 2815 if (sta_id == IL_INVALID_STATION) { 2816 D_MAC80211("leave - station not found\n"); 2817 return -EINVAL; 2818 } 2819 } 2820 2821 mutex_lock(&il->mutex); 2822 il_scan_cancel_timeout(il, 100); 2823 2824 switch (cmd) { 2825 case SET_KEY: 2826 if (static_key) 2827 ret = il3945_set_static_key(il, key); 2828 else 2829 ret = il3945_set_dynamic_key(il, key, sta_id); 2830 D_MAC80211("enable hwcrypto key\n"); 2831 break; 2832 case DISABLE_KEY: 2833 if (static_key) 2834 ret = il3945_remove_static_key(il); 2835 else 2836 ret = il3945_clear_sta_key_info(il, sta_id); 2837 D_MAC80211("disable hwcrypto key\n"); 2838 break; 2839 default: 2840 ret = -EINVAL; 2841 } 2842 2843 D_MAC80211("leave ret %d\n", ret); 2844 mutex_unlock(&il->mutex); 2845 2846 return ret; 2847 } 2848 2849 static int 2850 il3945_mac_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 2851 struct ieee80211_sta *sta) 2852 { 2853 struct il_priv *il = hw->priv; 2854 struct il3945_sta_priv *sta_priv = (void *)sta->drv_priv; 2855 int ret; 2856 bool is_ap = vif->type == NL80211_IFTYPE_STATION; 2857 u8 sta_id; 2858 2859 mutex_lock(&il->mutex); 2860 D_INFO("station %pM\n", sta->addr); 2861 sta_priv->common.sta_id = IL_INVALID_STATION; 2862 2863 ret = il_add_station_common(il, sta->addr, is_ap, sta, &sta_id); 2864 if (ret) { 2865 IL_ERR("Unable to add station %pM (%d)\n", sta->addr, ret); 2866 /* Should we return success if return code is EEXIST ? */ 2867 mutex_unlock(&il->mutex); 2868 return ret; 2869 } 2870 2871 sta_priv->common.sta_id = sta_id; 2872 2873 /* Initialize rate scaling */ 2874 D_INFO("Initializing rate scaling for station %pM\n", sta->addr); 2875 il3945_rs_rate_init(il, sta, sta_id); 2876 mutex_unlock(&il->mutex); 2877 2878 return 0; 2879 } 2880 2881 static void 2882 il3945_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags, 2883 unsigned int *total_flags, u64 multicast) 2884 { 2885 struct il_priv *il = hw->priv; 2886 __le32 filter_or = 0, filter_nand = 0; 2887 2888 #define CHK(test, flag) do { \ 2889 if (*total_flags & (test)) \ 2890 filter_or |= (flag); \ 2891 else \ 2892 filter_nand |= (flag); \ 2893 } while (0) 2894 2895 D_MAC80211("Enter: changed: 0x%x, total: 0x%x\n", changed_flags, 2896 *total_flags); 2897 2898 CHK(FIF_OTHER_BSS, RXON_FILTER_PROMISC_MSK); 2899 CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK); 2900 CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK); 2901 2902 #undef CHK 2903 2904 mutex_lock(&il->mutex); 2905 2906 il->staging.filter_flags &= ~filter_nand; 2907 il->staging.filter_flags |= filter_or; 2908 2909 /* 2910 * Not committing directly because hardware can perform a scan, 2911 * but even if hw is ready, committing here breaks for some reason, 2912 * we'll eventually commit the filter flags change anyway. 2913 */ 2914 2915 mutex_unlock(&il->mutex); 2916 2917 /* 2918 * Receiving all multicast frames is always enabled by the 2919 * default flags setup in il_connection_init_rx_config() 2920 * since we currently do not support programming multicast 2921 * filters into the device. 2922 */ 2923 *total_flags &= 2924 FIF_OTHER_BSS | FIF_ALLMULTI | 2925 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL; 2926 } 2927 2928 /***************************************************************************** 2929 * 2930 * driver setup and tear down 2931 * 2932 *****************************************************************************/ 2933 2934 static int 2935 il3945_setup_deferred_work(struct il_priv *il) 2936 { 2937 il->workqueue = create_singlethread_workqueue(DRV_NAME); 2938 if (!il->workqueue) 2939 return -ENOMEM; 2940 2941 init_waitqueue_head(&il->wait_command_queue); 2942 2943 INIT_WORK(&il->restart, il3945_bg_restart); 2944 INIT_WORK(&il->rx_replenish, il3945_bg_rx_replenish); 2945 INIT_DELAYED_WORK(&il->init_alive_start, il3945_bg_init_alive_start); 2946 INIT_DELAYED_WORK(&il->alive_start, il3945_bg_alive_start); 2947 INIT_DELAYED_WORK(&il->_3945.rfkill_poll, il3945_rfkill_poll); 2948 2949 il_setup_scan_deferred_work(il); 2950 2951 il3945_hw_setup_deferred_work(il); 2952 2953 timer_setup(&il->watchdog, il_bg_watchdog, 0); 2954 2955 tasklet_setup(&il->irq_tasklet, il3945_irq_tasklet); 2956 2957 return 0; 2958 } 2959 2960 static void 2961 il3945_cancel_deferred_work(struct il_priv *il) 2962 { 2963 il3945_hw_cancel_deferred_work(il); 2964 2965 cancel_delayed_work_sync(&il->init_alive_start); 2966 cancel_delayed_work(&il->alive_start); 2967 2968 il_cancel_scan_deferred_work(il); 2969 } 2970 2971 static struct ieee80211_ops il3945_mac_ops __ro_after_init = { 2972 .add_chanctx = ieee80211_emulate_add_chanctx, 2973 .remove_chanctx = ieee80211_emulate_remove_chanctx, 2974 .change_chanctx = ieee80211_emulate_change_chanctx, 2975 .switch_vif_chanctx = ieee80211_emulate_switch_vif_chanctx, 2976 .tx = il3945_mac_tx, 2977 .wake_tx_queue = ieee80211_handle_wake_tx_queue, 2978 .start = il3945_mac_start, 2979 .stop = il3945_mac_stop, 2980 .add_interface = il_mac_add_interface, 2981 .remove_interface = il_mac_remove_interface, 2982 .change_interface = il_mac_change_interface, 2983 .config = il_mac_config, 2984 .configure_filter = il3945_configure_filter, 2985 .set_key = il3945_mac_set_key, 2986 .conf_tx = il_mac_conf_tx, 2987 .reset_tsf = il_mac_reset_tsf, 2988 .bss_info_changed = il_mac_bss_info_changed, 2989 .hw_scan = il_mac_hw_scan, 2990 .sta_add = il3945_mac_sta_add, 2991 .sta_remove = il_mac_sta_remove, 2992 .tx_last_beacon = il_mac_tx_last_beacon, 2993 .flush = il_mac_flush, 2994 }; 2995 2996 static int 2997 il3945_init_drv(struct il_priv *il) 2998 { 2999 int ret; 3000 struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom; 3001 3002 il->retry_rate = 1; 3003 il->beacon_skb = NULL; 3004 3005 spin_lock_init(&il->sta_lock); 3006 spin_lock_init(&il->hcmd_lock); 3007 3008 INIT_LIST_HEAD(&il->free_frames); 3009 3010 mutex_init(&il->mutex); 3011 3012 il->ieee_channels = NULL; 3013 il->ieee_rates = NULL; 3014 il->band = NL80211_BAND_2GHZ; 3015 3016 il->iw_mode = NL80211_IFTYPE_STATION; 3017 il->missed_beacon_threshold = IL_MISSED_BEACON_THRESHOLD_DEF; 3018 3019 /* initialize force reset */ 3020 il->force_reset.reset_duration = IL_DELAY_NEXT_FORCE_FW_RELOAD; 3021 3022 if (eeprom->version < EEPROM_3945_EEPROM_VERSION) { 3023 IL_WARN("Unsupported EEPROM version: 0x%04X\n", 3024 eeprom->version); 3025 ret = -EINVAL; 3026 goto err; 3027 } 3028 ret = il_init_channel_map(il); 3029 if (ret) { 3030 IL_ERR("initializing regulatory failed: %d\n", ret); 3031 goto err; 3032 } 3033 3034 /* Set up txpower settings in driver for all channels */ 3035 if (il3945_txpower_set_from_eeprom(il)) { 3036 ret = -EIO; 3037 goto err_free_channel_map; 3038 } 3039 3040 ret = il_init_geos(il); 3041 if (ret) { 3042 IL_ERR("initializing geos failed: %d\n", ret); 3043 goto err_free_channel_map; 3044 } 3045 il3945_init_hw_rates(il, il->ieee_rates); 3046 3047 return 0; 3048 3049 err_free_channel_map: 3050 il_free_channel_map(il); 3051 err: 3052 return ret; 3053 } 3054 3055 #define IL3945_MAX_PROBE_REQUEST 200 3056 3057 static int 3058 il3945_setup_mac(struct il_priv *il) 3059 { 3060 int ret; 3061 struct ieee80211_hw *hw = il->hw; 3062 3063 hw->rate_control_algorithm = "iwl-3945-rs"; 3064 hw->sta_data_size = sizeof(struct il3945_sta_priv); 3065 hw->vif_data_size = sizeof(struct il_vif_priv); 3066 3067 /* Tell mac80211 our characteristics */ 3068 ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS); 3069 ieee80211_hw_set(hw, SUPPORTS_PS); 3070 ieee80211_hw_set(hw, SIGNAL_DBM); 3071 ieee80211_hw_set(hw, SPECTRUM_MGMT); 3072 3073 hw->wiphy->interface_modes = 3074 BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_ADHOC); 3075 3076 hw->wiphy->flags |= WIPHY_FLAG_IBSS_RSN; 3077 hw->wiphy->regulatory_flags |= REGULATORY_CUSTOM_REG | 3078 REGULATORY_DISABLE_BEACON_HINTS; 3079 3080 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT; 3081 3082 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945; 3083 /* we create the 802.11 header and a zero-length SSID element */ 3084 hw->wiphy->max_scan_ie_len = IL3945_MAX_PROBE_REQUEST - 24 - 2; 3085 3086 /* Default value; 4 EDCA QOS priorities */ 3087 hw->queues = 4; 3088 3089 if (il->bands[NL80211_BAND_2GHZ].n_channels) 3090 il->hw->wiphy->bands[NL80211_BAND_2GHZ] = 3091 &il->bands[NL80211_BAND_2GHZ]; 3092 3093 if (il->bands[NL80211_BAND_5GHZ].n_channels) 3094 il->hw->wiphy->bands[NL80211_BAND_5GHZ] = 3095 &il->bands[NL80211_BAND_5GHZ]; 3096 3097 il_leds_init(il); 3098 3099 wiphy_ext_feature_set(il->hw->wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST); 3100 3101 ret = ieee80211_register_hw(il->hw); 3102 if (ret) { 3103 IL_ERR("Failed to register hw (error %d)\n", ret); 3104 return ret; 3105 } 3106 il->mac80211_registered = 1; 3107 3108 return 0; 3109 } 3110 3111 static int 3112 il3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 3113 { 3114 int err = 0; 3115 struct il_priv *il; 3116 struct ieee80211_hw *hw; 3117 struct il_cfg *cfg = (struct il_cfg *)(ent->driver_data); 3118 struct il3945_eeprom *eeprom; 3119 unsigned long flags; 3120 3121 /*********************** 3122 * 1. Allocating HW data 3123 * ********************/ 3124 3125 hw = ieee80211_alloc_hw(sizeof(struct il_priv), &il3945_mac_ops); 3126 if (!hw) { 3127 err = -ENOMEM; 3128 goto out; 3129 } 3130 il = hw->priv; 3131 il->hw = hw; 3132 SET_IEEE80211_DEV(hw, &pdev->dev); 3133 3134 il->cmd_queue = IL39_CMD_QUEUE_NUM; 3135 3136 D_INFO("*** LOAD DRIVER ***\n"); 3137 il->cfg = cfg; 3138 il->ops = &il3945_ops; 3139 #ifdef CONFIG_IWLEGACY_DEBUGFS 3140 il->debugfs_ops = &il3945_debugfs_ops; 3141 #endif 3142 il->pci_dev = pdev; 3143 il->inta_mask = CSR_INI_SET_MASK; 3144 3145 /*************************** 3146 * 2. Initializing PCI bus 3147 * *************************/ 3148 pci_disable_link_state(pdev, 3149 PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 | 3150 PCIE_LINK_STATE_CLKPM); 3151 3152 if (pci_enable_device(pdev)) { 3153 err = -ENODEV; 3154 goto out_ieee80211_free_hw; 3155 } 3156 3157 pci_set_master(pdev); 3158 3159 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 3160 if (err) { 3161 IL_WARN("No suitable DMA available.\n"); 3162 goto out_pci_disable_device; 3163 } 3164 3165 pci_set_drvdata(pdev, il); 3166 err = pci_request_regions(pdev, DRV_NAME); 3167 if (err) 3168 goto out_pci_disable_device; 3169 3170 /*********************** 3171 * 3. Read REV Register 3172 * ********************/ 3173 il->hw_base = pci_ioremap_bar(pdev, 0); 3174 if (!il->hw_base) { 3175 err = -ENODEV; 3176 goto out_pci_release_regions; 3177 } 3178 3179 D_INFO("pci_resource_len = 0x%08llx\n", 3180 (unsigned long long)pci_resource_len(pdev, 0)); 3181 D_INFO("pci_resource_base = %p\n", il->hw_base); 3182 3183 /* We disable the RETRY_TIMEOUT register (0x41) to keep 3184 * PCI Tx retries from interfering with C3 CPU state */ 3185 pci_write_config_byte(pdev, 0x41, 0x00); 3186 3187 /* these spin locks will be used in apm_init and EEPROM access 3188 * we should init now 3189 */ 3190 spin_lock_init(&il->reg_lock); 3191 spin_lock_init(&il->lock); 3192 3193 /* 3194 * stop and reset the on-board processor just in case it is in a 3195 * strange state ... like being left stranded by a primary kernel 3196 * and this is now the kdump kernel trying to start up 3197 */ 3198 _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); 3199 3200 /*********************** 3201 * 4. Read EEPROM 3202 * ********************/ 3203 3204 /* Read the EEPROM */ 3205 err = il_eeprom_init(il); 3206 if (err) { 3207 IL_ERR("Unable to init EEPROM\n"); 3208 goto out_iounmap; 3209 } 3210 /* MAC Address location in EEPROM same for 3945/4965 */ 3211 eeprom = (struct il3945_eeprom *)il->eeprom; 3212 D_INFO("MAC address: %pM\n", eeprom->mac_address); 3213 SET_IEEE80211_PERM_ADDR(il->hw, eeprom->mac_address); 3214 3215 /*********************** 3216 * 5. Setup HW Constants 3217 * ********************/ 3218 /* Device-specific setup */ 3219 err = il3945_hw_set_hw_params(il); 3220 if (err) { 3221 IL_ERR("failed to set hw settings\n"); 3222 goto out_eeprom_free; 3223 } 3224 3225 /*********************** 3226 * 6. Setup il 3227 * ********************/ 3228 3229 err = il3945_init_drv(il); 3230 if (err) { 3231 IL_ERR("initializing driver failed\n"); 3232 goto out_unset_hw_params; 3233 } 3234 3235 IL_INFO("Detected Intel Wireless WiFi Link %s\n", il->cfg->name); 3236 3237 /*********************** 3238 * 7. Setup Services 3239 * ********************/ 3240 3241 spin_lock_irqsave(&il->lock, flags); 3242 il_disable_interrupts(il); 3243 spin_unlock_irqrestore(&il->lock, flags); 3244 3245 pci_enable_msi(il->pci_dev); 3246 3247 err = request_irq(il->pci_dev->irq, il_isr, IRQF_SHARED, DRV_NAME, il); 3248 if (err) { 3249 IL_ERR("Error allocating IRQ %d\n", il->pci_dev->irq); 3250 goto out_disable_msi; 3251 } 3252 3253 il_set_rxon_channel(il, &il->bands[NL80211_BAND_2GHZ].channels[5]); 3254 3255 err = il3945_setup_deferred_work(il); 3256 if (err) 3257 goto out_release_irq; 3258 3259 il3945_setup_handlers(il); 3260 il_power_initialize(il); 3261 3262 /********************************* 3263 * 8. Setup and Register mac80211 3264 * *******************************/ 3265 3266 il_enable_interrupts(il); 3267 3268 err = il3945_setup_mac(il); 3269 if (err) 3270 goto out_destroy_workqueue; 3271 3272 il_dbgfs_register(il, DRV_NAME); 3273 3274 /* Start monitoring the killswitch */ 3275 queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll, 2 * HZ); 3276 3277 return 0; 3278 3279 out_destroy_workqueue: 3280 destroy_workqueue(il->workqueue); 3281 il->workqueue = NULL; 3282 out_release_irq: 3283 free_irq(il->pci_dev->irq, il); 3284 out_disable_msi: 3285 pci_disable_msi(il->pci_dev); 3286 il_free_geos(il); 3287 il_free_channel_map(il); 3288 out_unset_hw_params: 3289 il3945_unset_hw_params(il); 3290 out_eeprom_free: 3291 il_eeprom_free(il); 3292 out_iounmap: 3293 iounmap(il->hw_base); 3294 out_pci_release_regions: 3295 pci_release_regions(pdev); 3296 out_pci_disable_device: 3297 pci_disable_device(pdev); 3298 out_ieee80211_free_hw: 3299 ieee80211_free_hw(il->hw); 3300 out: 3301 return err; 3302 } 3303 3304 static void 3305 il3945_pci_remove(struct pci_dev *pdev) 3306 { 3307 struct il_priv *il = pci_get_drvdata(pdev); 3308 unsigned long flags; 3309 3310 if (!il) 3311 return; 3312 3313 D_INFO("*** UNLOAD DRIVER ***\n"); 3314 3315 il_dbgfs_unregister(il); 3316 3317 set_bit(S_EXIT_PENDING, &il->status); 3318 3319 il_leds_exit(il); 3320 3321 if (il->mac80211_registered) { 3322 ieee80211_unregister_hw(il->hw); 3323 il->mac80211_registered = 0; 3324 } else { 3325 il3945_down(il); 3326 } 3327 3328 /* 3329 * Make sure device is reset to low power before unloading driver. 3330 * This may be redundant with il_down(), but there are paths to 3331 * run il_down() without calling apm_ops.stop(), and there are 3332 * paths to avoid running il_down() at all before leaving driver. 3333 * This (inexpensive) call *makes sure* device is reset. 3334 */ 3335 il_apm_stop(il); 3336 3337 /* make sure we flush any pending irq or 3338 * tasklet for the driver 3339 */ 3340 spin_lock_irqsave(&il->lock, flags); 3341 il_disable_interrupts(il); 3342 spin_unlock_irqrestore(&il->lock, flags); 3343 3344 il3945_synchronize_irq(il); 3345 3346 cancel_delayed_work_sync(&il->_3945.rfkill_poll); 3347 3348 il3945_dealloc_ucode_pci(il); 3349 3350 if (il->rxq.bd) 3351 il3945_rx_queue_free(il, &il->rxq); 3352 il3945_hw_txq_ctx_free(il); 3353 3354 il3945_unset_hw_params(il); 3355 3356 /*netif_stop_queue(dev); */ 3357 3358 /* ieee80211_unregister_hw calls il3945_mac_stop, which flushes 3359 * il->workqueue... so we can't take down the workqueue 3360 * until now... */ 3361 destroy_workqueue(il->workqueue); 3362 il->workqueue = NULL; 3363 3364 free_irq(pdev->irq, il); 3365 pci_disable_msi(pdev); 3366 3367 iounmap(il->hw_base); 3368 pci_release_regions(pdev); 3369 pci_disable_device(pdev); 3370 3371 il_free_channel_map(il); 3372 il_free_geos(il); 3373 il_eeprom_free(il); 3374 kfree(il->scan_cmd); 3375 dev_kfree_skb(il->beacon_skb); 3376 ieee80211_free_hw(il->hw); 3377 } 3378 3379 /***************************************************************************** 3380 * 3381 * driver and module entry point 3382 * 3383 *****************************************************************************/ 3384 3385 static struct pci_driver il3945_driver = { 3386 .name = DRV_NAME, 3387 .id_table = il3945_hw_card_ids, 3388 .probe = il3945_pci_probe, 3389 .remove = il3945_pci_remove, 3390 .driver.pm = IL_LEGACY_PM_OPS, 3391 }; 3392 3393 static int __init 3394 il3945_init(void) 3395 { 3396 3397 int ret; 3398 pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n"); 3399 pr_info(DRV_COPYRIGHT "\n"); 3400 3401 /* 3402 * Disabling hardware scan means that mac80211 will perform scans 3403 * "the hard way", rather than using device's scan. 3404 */ 3405 if (il3945_mod_params.disable_hw_scan) { 3406 pr_info("hw_scan is disabled\n"); 3407 il3945_mac_ops.hw_scan = NULL; 3408 } 3409 3410 ret = il3945_rate_control_register(); 3411 if (ret) { 3412 pr_err("Unable to register rate control algorithm: %d\n", ret); 3413 return ret; 3414 } 3415 3416 ret = pci_register_driver(&il3945_driver); 3417 if (ret) { 3418 pr_err("Unable to initialize PCI module\n"); 3419 goto error_register; 3420 } 3421 3422 return ret; 3423 3424 error_register: 3425 il3945_rate_control_unregister(); 3426 return ret; 3427 } 3428 3429 static void __exit 3430 il3945_exit(void) 3431 { 3432 pci_unregister_driver(&il3945_driver); 3433 il3945_rate_control_unregister(); 3434 } 3435 3436 MODULE_FIRMWARE(IL3945_MODULE_FIRMWARE(IL3945_UCODE_API_MAX)); 3437 3438 module_param_named(antenna, il3945_mod_params.antenna, int, 0444); 3439 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])"); 3440 module_param_named(swcrypto, il3945_mod_params.sw_crypto, int, 0444); 3441 MODULE_PARM_DESC(swcrypto, "using software crypto (default 1 [software])"); 3442 module_param_named(disable_hw_scan, il3945_mod_params.disable_hw_scan, int, 3443 0444); 3444 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 1)"); 3445 #ifdef CONFIG_IWLEGACY_DEBUG 3446 module_param_named(debug, il_debug_level, uint, 0644); 3447 MODULE_PARM_DESC(debug, "debug output mask"); 3448 #endif 3449 module_param_named(fw_restart, il3945_mod_params.restart_fw, int, 0444); 3450 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error"); 3451 3452 module_exit(il3945_exit); 3453 module_init(il3945_init); 3454