xref: /linux/drivers/net/ethernet/freescale/enetc/enetc.c (revision 85502b2214d50ba0ddf2a5fb454e4d28a160d175)
1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2 /* Copyright 2017-2019 NXP */
3 
4 #include "enetc.h"
5 #include <linux/bpf_trace.h>
6 #include <linux/clk.h>
7 #include <linux/tcp.h>
8 #include <linux/udp.h>
9 #include <linux/vmalloc.h>
10 #include <linux/ptp_classify.h>
11 #include <net/ip6_checksum.h>
12 #include <net/pkt_sched.h>
13 #include <net/tso.h>
14 
enetc_port_mac_rd(struct enetc_si * si,u32 reg)15 u32 enetc_port_mac_rd(struct enetc_si *si, u32 reg)
16 {
17 	return enetc_port_rd(&si->hw, reg);
18 }
19 EXPORT_SYMBOL_GPL(enetc_port_mac_rd);
20 
enetc_port_mac_wr(struct enetc_si * si,u32 reg,u32 val)21 void enetc_port_mac_wr(struct enetc_si *si, u32 reg, u32 val)
22 {
23 	enetc_port_wr(&si->hw, reg, val);
24 	if (si->hw_features & ENETC_SI_F_QBU)
25 		enetc_port_wr(&si->hw, reg + si->drvdata->pmac_offset, val);
26 }
27 EXPORT_SYMBOL_GPL(enetc_port_mac_wr);
28 
enetc_change_preemptible_tcs(struct enetc_ndev_priv * priv,u8 preemptible_tcs)29 static void enetc_change_preemptible_tcs(struct enetc_ndev_priv *priv,
30 					 u8 preemptible_tcs)
31 {
32 	if (!(priv->si->hw_features & ENETC_SI_F_QBU))
33 		return;
34 
35 	priv->preemptible_tcs = preemptible_tcs;
36 	enetc_mm_commit_preemptible_tcs(priv);
37 }
38 
enetc_mac_addr_hash_idx(const u8 * addr)39 static int enetc_mac_addr_hash_idx(const u8 *addr)
40 {
41 	u64 fold = __swab64(ether_addr_to_u64(addr)) >> 16;
42 	u64 mask = 0;
43 	int res = 0;
44 	int i;
45 
46 	for (i = 0; i < 8; i++)
47 		mask |= BIT_ULL(i * 6);
48 
49 	for (i = 0; i < 6; i++)
50 		res |= (hweight64(fold & (mask << i)) & 0x1) << i;
51 
52 	return res;
53 }
54 
enetc_add_mac_addr_ht_filter(struct enetc_mac_filter * filter,const unsigned char * addr)55 void enetc_add_mac_addr_ht_filter(struct enetc_mac_filter *filter,
56 				  const unsigned char *addr)
57 {
58 	int idx = enetc_mac_addr_hash_idx(addr);
59 
60 	/* add hash table entry */
61 	__set_bit(idx, filter->mac_hash_table);
62 	filter->mac_addr_cnt++;
63 }
64 EXPORT_SYMBOL_GPL(enetc_add_mac_addr_ht_filter);
65 
enetc_reset_mac_addr_filter(struct enetc_mac_filter * filter)66 void enetc_reset_mac_addr_filter(struct enetc_mac_filter *filter)
67 {
68 	filter->mac_addr_cnt = 0;
69 
70 	bitmap_zero(filter->mac_hash_table,
71 		    ENETC_MADDR_HASH_TBL_SZ);
72 }
73 EXPORT_SYMBOL_GPL(enetc_reset_mac_addr_filter);
74 
enetc_num_stack_tx_queues(struct enetc_ndev_priv * priv)75 static int enetc_num_stack_tx_queues(struct enetc_ndev_priv *priv)
76 {
77 	int num_tx_rings = priv->num_tx_rings;
78 
79 	if (priv->xdp_prog)
80 		return num_tx_rings - num_possible_cpus();
81 
82 	return num_tx_rings;
83 }
84 
enetc_rx_ring_from_xdp_tx_ring(struct enetc_ndev_priv * priv,struct enetc_bdr * tx_ring)85 static struct enetc_bdr *enetc_rx_ring_from_xdp_tx_ring(struct enetc_ndev_priv *priv,
86 							struct enetc_bdr *tx_ring)
87 {
88 	int index = &priv->tx_ring[tx_ring->index] - priv->xdp_tx_ring;
89 
90 	return priv->rx_ring[index];
91 }
92 
enetc_tx_swbd_get_skb(struct enetc_tx_swbd * tx_swbd)93 static struct sk_buff *enetc_tx_swbd_get_skb(struct enetc_tx_swbd *tx_swbd)
94 {
95 	if (tx_swbd->is_xdp_tx || tx_swbd->is_xdp_redirect)
96 		return NULL;
97 
98 	return tx_swbd->skb;
99 }
100 
101 static struct xdp_frame *
enetc_tx_swbd_get_xdp_frame(struct enetc_tx_swbd * tx_swbd)102 enetc_tx_swbd_get_xdp_frame(struct enetc_tx_swbd *tx_swbd)
103 {
104 	if (tx_swbd->is_xdp_redirect)
105 		return tx_swbd->xdp_frame;
106 
107 	return NULL;
108 }
109 
enetc_unmap_tx_buff(struct enetc_bdr * tx_ring,struct enetc_tx_swbd * tx_swbd)110 static void enetc_unmap_tx_buff(struct enetc_bdr *tx_ring,
111 				struct enetc_tx_swbd *tx_swbd)
112 {
113 	/* For XDP_TX, pages come from RX, whereas for the other contexts where
114 	 * we have is_dma_page_set, those come from skb_frag_dma_map. We need
115 	 * to match the DMA mapping length, so we need to differentiate those.
116 	 */
117 	if (tx_swbd->is_dma_page)
118 		dma_unmap_page(tx_ring->dev, tx_swbd->dma,
119 			       tx_swbd->is_xdp_tx ? PAGE_SIZE : tx_swbd->len,
120 			       tx_swbd->dir);
121 	else
122 		dma_unmap_single(tx_ring->dev, tx_swbd->dma,
123 				 tx_swbd->len, tx_swbd->dir);
124 	tx_swbd->dma = 0;
125 }
126 
enetc_free_tx_frame(struct enetc_bdr * tx_ring,struct enetc_tx_swbd * tx_swbd)127 static void enetc_free_tx_frame(struct enetc_bdr *tx_ring,
128 				struct enetc_tx_swbd *tx_swbd)
129 {
130 	struct xdp_frame *xdp_frame = enetc_tx_swbd_get_xdp_frame(tx_swbd);
131 	struct sk_buff *skb = enetc_tx_swbd_get_skb(tx_swbd);
132 
133 	if (tx_swbd->dma)
134 		enetc_unmap_tx_buff(tx_ring, tx_swbd);
135 
136 	if (xdp_frame) {
137 		xdp_return_frame(tx_swbd->xdp_frame);
138 		tx_swbd->xdp_frame = NULL;
139 	} else if (skb) {
140 		dev_kfree_skb_any(skb);
141 		tx_swbd->skb = NULL;
142 	}
143 }
144 
145 /* Let H/W know BD ring has been updated */
enetc_update_tx_ring_tail(struct enetc_bdr * tx_ring)146 static void enetc_update_tx_ring_tail(struct enetc_bdr *tx_ring)
147 {
148 	/* includes wmb() */
149 	enetc_wr_reg_hot(tx_ring->tpir, tx_ring->next_to_use);
150 }
151 
enetc_ptp_parse(struct sk_buff * skb,u8 * udp,u8 * msgtype,u8 * twostep,u16 * correction_offset,u16 * body_offset)152 static int enetc_ptp_parse(struct sk_buff *skb, u8 *udp,
153 			   u8 *msgtype, u8 *twostep,
154 			   u16 *correction_offset, u16 *body_offset)
155 {
156 	unsigned int ptp_class;
157 	struct ptp_header *hdr;
158 	unsigned int type;
159 	u8 *base;
160 
161 	ptp_class = ptp_classify_raw(skb);
162 	if (ptp_class == PTP_CLASS_NONE)
163 		return -EINVAL;
164 
165 	hdr = ptp_parse_header(skb, ptp_class);
166 	if (!hdr)
167 		return -EINVAL;
168 
169 	type = ptp_class & PTP_CLASS_PMASK;
170 	if (type == PTP_CLASS_IPV4 || type == PTP_CLASS_IPV6)
171 		*udp = 1;
172 	else
173 		*udp = 0;
174 
175 	*msgtype = ptp_get_msgtype(hdr, ptp_class);
176 	*twostep = hdr->flag_field[0] & 0x2;
177 
178 	base = skb_mac_header(skb);
179 	*correction_offset = (u8 *)&hdr->correction - base;
180 	*body_offset = (u8 *)hdr + sizeof(struct ptp_header) - base;
181 
182 	return 0;
183 }
184 
enetc_tx_csum_offload_check(struct sk_buff * skb)185 static bool enetc_tx_csum_offload_check(struct sk_buff *skb)
186 {
187 	switch (skb->csum_offset) {
188 	case offsetof(struct tcphdr, check):
189 	case offsetof(struct udphdr, check):
190 		return true;
191 	default:
192 		return false;
193 	}
194 }
195 
enetc_skb_is_ipv6(struct sk_buff * skb)196 static bool enetc_skb_is_ipv6(struct sk_buff *skb)
197 {
198 	return vlan_get_protocol(skb) == htons(ETH_P_IPV6);
199 }
200 
enetc_skb_is_tcp(struct sk_buff * skb)201 static bool enetc_skb_is_tcp(struct sk_buff *skb)
202 {
203 	return skb->csum_offset == offsetof(struct tcphdr, check);
204 }
205 
206 /**
207  * enetc_unwind_tx_frame() - Unwind the DMA mappings of a multi-buffer Tx frame
208  * @tx_ring: Pointer to the Tx ring on which the buffer descriptors are located
209  * @count: Number of Tx buffer descriptors which need to be unmapped
210  * @i: Index of the last successfully mapped Tx buffer descriptor
211  */
enetc_unwind_tx_frame(struct enetc_bdr * tx_ring,int count,int i)212 static void enetc_unwind_tx_frame(struct enetc_bdr *tx_ring, int count, int i)
213 {
214 	while (count--) {
215 		struct enetc_tx_swbd *tx_swbd = &tx_ring->tx_swbd[i];
216 
217 		enetc_free_tx_frame(tx_ring, tx_swbd);
218 		if (i == 0)
219 			i = tx_ring->bd_count;
220 		i--;
221 	}
222 }
223 
enetc_map_tx_buffs(struct enetc_bdr * tx_ring,struct sk_buff * skb)224 static int enetc_map_tx_buffs(struct enetc_bdr *tx_ring, struct sk_buff *skb)
225 {
226 	bool do_vlan, do_onestep_tstamp = false, do_twostep_tstamp = false;
227 	struct enetc_ndev_priv *priv = netdev_priv(tx_ring->ndev);
228 	struct enetc_hw *hw = &priv->si->hw;
229 	struct enetc_tx_swbd *tx_swbd;
230 	int len = skb_headlen(skb);
231 	union enetc_tx_bd temp_bd;
232 	u8 msgtype, twostep, udp;
233 	union enetc_tx_bd *txbd;
234 	u16 offset1, offset2;
235 	int i, count = 0;
236 	skb_frag_t *frag;
237 	unsigned int f;
238 	dma_addr_t dma;
239 	u8 flags = 0;
240 
241 	enetc_clear_tx_bd(&temp_bd);
242 	if (skb->ip_summed == CHECKSUM_PARTIAL) {
243 		/* Can not support TSD and checksum offload at the same time */
244 		if (priv->active_offloads & ENETC_F_TXCSUM &&
245 		    enetc_tx_csum_offload_check(skb) && !tx_ring->tsd_enable) {
246 			temp_bd.l3_aux0 = FIELD_PREP(ENETC_TX_BD_L3_START,
247 						     skb_network_offset(skb));
248 			temp_bd.l3_aux1 = FIELD_PREP(ENETC_TX_BD_L3_HDR_LEN,
249 						     skb_network_header_len(skb) / 4);
250 			temp_bd.l3_aux1 |= FIELD_PREP(ENETC_TX_BD_L3T,
251 						      enetc_skb_is_ipv6(skb));
252 			if (enetc_skb_is_tcp(skb))
253 				temp_bd.l4_aux = FIELD_PREP(ENETC_TX_BD_L4T,
254 							    ENETC_TXBD_L4T_TCP);
255 			else
256 				temp_bd.l4_aux = FIELD_PREP(ENETC_TX_BD_L4T,
257 							    ENETC_TXBD_L4T_UDP);
258 			flags |= ENETC_TXBD_FLAGS_CSUM_LSO | ENETC_TXBD_FLAGS_L4CS;
259 		} else if (skb_checksum_help(skb)) {
260 			return 0;
261 		}
262 	}
263 
264 	i = tx_ring->next_to_use;
265 	txbd = ENETC_TXBD(*tx_ring, i);
266 	prefetchw(txbd);
267 
268 	dma = dma_map_single(tx_ring->dev, skb->data, len, DMA_TO_DEVICE);
269 	if (unlikely(dma_mapping_error(tx_ring->dev, dma)))
270 		goto dma_err;
271 
272 	temp_bd.addr = cpu_to_le64(dma);
273 	temp_bd.buf_len = cpu_to_le16(len);
274 
275 	tx_swbd = &tx_ring->tx_swbd[i];
276 	tx_swbd->dma = dma;
277 	tx_swbd->len = len;
278 	tx_swbd->is_dma_page = 0;
279 	tx_swbd->dir = DMA_TO_DEVICE;
280 	count++;
281 
282 	do_vlan = skb_vlan_tag_present(skb);
283 	if (skb->cb[0] & ENETC_F_TX_ONESTEP_SYNC_TSTAMP) {
284 		if (enetc_ptp_parse(skb, &udp, &msgtype, &twostep, &offset1,
285 				    &offset2) ||
286 		    msgtype != PTP_MSGTYPE_SYNC || twostep)
287 			WARN_ONCE(1, "Bad packet for one-step timestamping\n");
288 		else
289 			do_onestep_tstamp = true;
290 	} else if (skb->cb[0] & ENETC_F_TX_TSTAMP) {
291 		do_twostep_tstamp = true;
292 	}
293 
294 	tx_swbd->do_twostep_tstamp = do_twostep_tstamp;
295 	tx_swbd->qbv_en = !!(priv->active_offloads & ENETC_F_QBV);
296 	tx_swbd->check_wb = tx_swbd->do_twostep_tstamp || tx_swbd->qbv_en;
297 
298 	if (do_vlan || do_onestep_tstamp || do_twostep_tstamp)
299 		flags |= ENETC_TXBD_FLAGS_EX;
300 
301 	if (tx_ring->tsd_enable)
302 		flags |= ENETC_TXBD_FLAGS_TSE | ENETC_TXBD_FLAGS_TXSTART;
303 
304 	/* first BD needs frm_len and offload flags set */
305 	temp_bd.frm_len = cpu_to_le16(skb->len);
306 	temp_bd.flags = flags;
307 
308 	if (flags & ENETC_TXBD_FLAGS_TSE)
309 		temp_bd.txstart = enetc_txbd_set_tx_start(skb->skb_mstamp_ns,
310 							  flags);
311 
312 	if (flags & ENETC_TXBD_FLAGS_EX) {
313 		u8 e_flags = 0;
314 		*txbd = temp_bd;
315 		enetc_clear_tx_bd(&temp_bd);
316 
317 		/* add extension BD for VLAN and/or timestamping */
318 		flags = 0;
319 		tx_swbd++;
320 		txbd++;
321 		i++;
322 		if (unlikely(i == tx_ring->bd_count)) {
323 			i = 0;
324 			tx_swbd = tx_ring->tx_swbd;
325 			txbd = ENETC_TXBD(*tx_ring, 0);
326 		}
327 		prefetchw(txbd);
328 
329 		if (do_vlan) {
330 			temp_bd.ext.vid = cpu_to_le16(skb_vlan_tag_get(skb));
331 			temp_bd.ext.tpid = 0; /* < C-TAG */
332 			e_flags |= ENETC_TXBD_E_FLAGS_VLAN_INS;
333 		}
334 
335 		if (do_onestep_tstamp) {
336 			__be32 new_sec_l, new_nsec;
337 			u32 lo, hi, nsec, val;
338 			__be16 new_sec_h;
339 			u8 *data;
340 			u64 sec;
341 
342 			lo = enetc_rd_hot(hw, ENETC_SICTR0);
343 			hi = enetc_rd_hot(hw, ENETC_SICTR1);
344 			sec = (u64)hi << 32 | lo;
345 			nsec = do_div(sec, 1000000000);
346 
347 			/* Configure extension BD */
348 			temp_bd.ext.tstamp = cpu_to_le32(lo & 0x3fffffff);
349 			e_flags |= ENETC_TXBD_E_FLAGS_ONE_STEP_PTP;
350 
351 			/* Update originTimestamp field of Sync packet
352 			 * - 48 bits seconds field
353 			 * - 32 bits nanseconds field
354 			 *
355 			 * In addition, the UDP checksum needs to be updated
356 			 * by software after updating originTimestamp field,
357 			 * otherwise the hardware will calculate the wrong
358 			 * checksum when updating the correction field and
359 			 * update it to the packet.
360 			 */
361 			data = skb_mac_header(skb);
362 			new_sec_h = htons((sec >> 32) & 0xffff);
363 			new_sec_l = htonl(sec & 0xffffffff);
364 			new_nsec = htonl(nsec);
365 			if (udp) {
366 				struct udphdr *uh = udp_hdr(skb);
367 				__be32 old_sec_l, old_nsec;
368 				__be16 old_sec_h;
369 
370 				old_sec_h = *(__be16 *)(data + offset2);
371 				inet_proto_csum_replace2(&uh->check, skb, old_sec_h,
372 							 new_sec_h, false);
373 
374 				old_sec_l = *(__be32 *)(data + offset2 + 2);
375 				inet_proto_csum_replace4(&uh->check, skb, old_sec_l,
376 							 new_sec_l, false);
377 
378 				old_nsec = *(__be32 *)(data + offset2 + 6);
379 				inet_proto_csum_replace4(&uh->check, skb, old_nsec,
380 							 new_nsec, false);
381 			}
382 
383 			*(__be16 *)(data + offset2) = new_sec_h;
384 			*(__be32 *)(data + offset2 + 2) = new_sec_l;
385 			*(__be32 *)(data + offset2 + 6) = new_nsec;
386 
387 			/* Configure single-step register */
388 			val = ENETC_PM0_SINGLE_STEP_EN;
389 			val |= ENETC_SET_SINGLE_STEP_OFFSET(offset1);
390 			if (udp)
391 				val |= ENETC_PM0_SINGLE_STEP_CH;
392 
393 			enetc_port_mac_wr(priv->si, ENETC_PM0_SINGLE_STEP,
394 					  val);
395 		} else if (do_twostep_tstamp) {
396 			skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
397 			e_flags |= ENETC_TXBD_E_FLAGS_TWO_STEP_PTP;
398 		}
399 
400 		temp_bd.ext.e_flags = e_flags;
401 		count++;
402 	}
403 
404 	frag = &skb_shinfo(skb)->frags[0];
405 	for (f = 0; f < skb_shinfo(skb)->nr_frags; f++, frag++) {
406 		len = skb_frag_size(frag);
407 		dma = skb_frag_dma_map(tx_ring->dev, frag, 0, len,
408 				       DMA_TO_DEVICE);
409 		if (dma_mapping_error(tx_ring->dev, dma))
410 			goto dma_err;
411 
412 		*txbd = temp_bd;
413 		enetc_clear_tx_bd(&temp_bd);
414 
415 		flags = 0;
416 		tx_swbd++;
417 		txbd++;
418 		i++;
419 		if (unlikely(i == tx_ring->bd_count)) {
420 			i = 0;
421 			tx_swbd = tx_ring->tx_swbd;
422 			txbd = ENETC_TXBD(*tx_ring, 0);
423 		}
424 		prefetchw(txbd);
425 
426 		temp_bd.addr = cpu_to_le64(dma);
427 		temp_bd.buf_len = cpu_to_le16(len);
428 
429 		tx_swbd->dma = dma;
430 		tx_swbd->len = len;
431 		tx_swbd->is_dma_page = 1;
432 		tx_swbd->dir = DMA_TO_DEVICE;
433 		count++;
434 	}
435 
436 	/* last BD needs 'F' bit set */
437 	flags |= ENETC_TXBD_FLAGS_F;
438 	temp_bd.flags = flags;
439 	*txbd = temp_bd;
440 
441 	tx_ring->tx_swbd[i].is_eof = true;
442 	tx_ring->tx_swbd[i].skb = skb;
443 
444 	enetc_bdr_idx_inc(tx_ring, &i);
445 	tx_ring->next_to_use = i;
446 
447 	skb_tx_timestamp(skb);
448 
449 	enetc_update_tx_ring_tail(tx_ring);
450 
451 	return count;
452 
453 dma_err:
454 	dev_err(tx_ring->dev, "DMA map error");
455 
456 	enetc_unwind_tx_frame(tx_ring, count, i);
457 
458 	return 0;
459 }
460 
enetc_map_tx_tso_hdr(struct enetc_bdr * tx_ring,struct sk_buff * skb,struct enetc_tx_swbd * tx_swbd,union enetc_tx_bd * txbd,int * i,int hdr_len,int data_len)461 static int enetc_map_tx_tso_hdr(struct enetc_bdr *tx_ring, struct sk_buff *skb,
462 				struct enetc_tx_swbd *tx_swbd,
463 				union enetc_tx_bd *txbd, int *i, int hdr_len,
464 				int data_len)
465 {
466 	union enetc_tx_bd txbd_tmp;
467 	u8 flags = 0, e_flags = 0;
468 	dma_addr_t addr;
469 	int count = 1;
470 
471 	enetc_clear_tx_bd(&txbd_tmp);
472 	addr = tx_ring->tso_headers_dma + *i * TSO_HEADER_SIZE;
473 
474 	if (skb_vlan_tag_present(skb))
475 		flags |= ENETC_TXBD_FLAGS_EX;
476 
477 	txbd_tmp.addr = cpu_to_le64(addr);
478 	txbd_tmp.buf_len = cpu_to_le16(hdr_len);
479 
480 	/* first BD needs frm_len and offload flags set */
481 	txbd_tmp.frm_len = cpu_to_le16(hdr_len + data_len);
482 	txbd_tmp.flags = flags;
483 
484 	/* For the TSO header we do not set the dma address since we do not
485 	 * want it unmapped when we do cleanup. We still set len so that we
486 	 * count the bytes sent.
487 	 */
488 	tx_swbd->len = hdr_len;
489 	tx_swbd->do_twostep_tstamp = false;
490 	tx_swbd->check_wb = false;
491 
492 	/* Actually write the header in the BD */
493 	*txbd = txbd_tmp;
494 
495 	/* Add extension BD for VLAN */
496 	if (flags & ENETC_TXBD_FLAGS_EX) {
497 		/* Get the next BD */
498 		enetc_bdr_idx_inc(tx_ring, i);
499 		txbd = ENETC_TXBD(*tx_ring, *i);
500 		tx_swbd = &tx_ring->tx_swbd[*i];
501 		prefetchw(txbd);
502 
503 		/* Setup the VLAN fields */
504 		enetc_clear_tx_bd(&txbd_tmp);
505 		txbd_tmp.ext.vid = cpu_to_le16(skb_vlan_tag_get(skb));
506 		txbd_tmp.ext.tpid = 0; /* < C-TAG */
507 		e_flags |= ENETC_TXBD_E_FLAGS_VLAN_INS;
508 
509 		/* Write the BD */
510 		txbd_tmp.ext.e_flags = e_flags;
511 		*txbd = txbd_tmp;
512 		count++;
513 	}
514 
515 	return count;
516 }
517 
enetc_map_tx_tso_data(struct enetc_bdr * tx_ring,struct sk_buff * skb,struct enetc_tx_swbd * tx_swbd,union enetc_tx_bd * txbd,char * data,int size,bool last_bd)518 static int enetc_map_tx_tso_data(struct enetc_bdr *tx_ring, struct sk_buff *skb,
519 				 struct enetc_tx_swbd *tx_swbd,
520 				 union enetc_tx_bd *txbd, char *data,
521 				 int size, bool last_bd)
522 {
523 	union enetc_tx_bd txbd_tmp;
524 	dma_addr_t addr;
525 	u8 flags = 0;
526 
527 	enetc_clear_tx_bd(&txbd_tmp);
528 
529 	addr = dma_map_single(tx_ring->dev, data, size, DMA_TO_DEVICE);
530 	if (unlikely(dma_mapping_error(tx_ring->dev, addr))) {
531 		netdev_err(tx_ring->ndev, "DMA map error\n");
532 		return -ENOMEM;
533 	}
534 
535 	if (last_bd) {
536 		flags |= ENETC_TXBD_FLAGS_F;
537 		tx_swbd->is_eof = 1;
538 	}
539 
540 	txbd_tmp.addr = cpu_to_le64(addr);
541 	txbd_tmp.buf_len = cpu_to_le16(size);
542 	txbd_tmp.flags = flags;
543 
544 	tx_swbd->dma = addr;
545 	tx_swbd->len = size;
546 	tx_swbd->dir = DMA_TO_DEVICE;
547 
548 	*txbd = txbd_tmp;
549 
550 	return 0;
551 }
552 
enetc_tso_hdr_csum(struct tso_t * tso,struct sk_buff * skb,char * hdr,int hdr_len,int * l4_hdr_len)553 static __wsum enetc_tso_hdr_csum(struct tso_t *tso, struct sk_buff *skb,
554 				 char *hdr, int hdr_len, int *l4_hdr_len)
555 {
556 	char *l4_hdr = hdr + skb_transport_offset(skb);
557 	int mac_hdr_len = skb_network_offset(skb);
558 
559 	if (tso->tlen != sizeof(struct udphdr)) {
560 		struct tcphdr *tcph = (struct tcphdr *)(l4_hdr);
561 
562 		tcph->check = 0;
563 	} else {
564 		struct udphdr *udph = (struct udphdr *)(l4_hdr);
565 
566 		udph->check = 0;
567 	}
568 
569 	/* Compute the IP checksum. This is necessary since tso_build_hdr()
570 	 * already incremented the IP ID field.
571 	 */
572 	if (!tso->ipv6) {
573 		struct iphdr *iph = (void *)(hdr + mac_hdr_len);
574 
575 		iph->check = 0;
576 		iph->check = ip_fast_csum((unsigned char *)iph, iph->ihl);
577 	}
578 
579 	/* Compute the checksum over the L4 header. */
580 	*l4_hdr_len = hdr_len - skb_transport_offset(skb);
581 	return csum_partial(l4_hdr, *l4_hdr_len, 0);
582 }
583 
enetc_tso_complete_csum(struct enetc_bdr * tx_ring,struct tso_t * tso,struct sk_buff * skb,char * hdr,int len,__wsum sum)584 static void enetc_tso_complete_csum(struct enetc_bdr *tx_ring, struct tso_t *tso,
585 				    struct sk_buff *skb, char *hdr, int len,
586 				    __wsum sum)
587 {
588 	char *l4_hdr = hdr + skb_transport_offset(skb);
589 	__sum16 csum_final;
590 
591 	/* Complete the L4 checksum by appending the pseudo-header to the
592 	 * already computed checksum.
593 	 */
594 	if (!tso->ipv6)
595 		csum_final = csum_tcpudp_magic(ip_hdr(skb)->saddr,
596 					       ip_hdr(skb)->daddr,
597 					       len, ip_hdr(skb)->protocol, sum);
598 	else
599 		csum_final = csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
600 					     &ipv6_hdr(skb)->daddr,
601 					     len, ipv6_hdr(skb)->nexthdr, sum);
602 
603 	if (tso->tlen != sizeof(struct udphdr)) {
604 		struct tcphdr *tcph = (struct tcphdr *)(l4_hdr);
605 
606 		tcph->check = csum_final;
607 	} else {
608 		struct udphdr *udph = (struct udphdr *)(l4_hdr);
609 
610 		udph->check = csum_final;
611 	}
612 }
613 
enetc_lso_count_descs(const struct sk_buff * skb)614 static int enetc_lso_count_descs(const struct sk_buff *skb)
615 {
616 	/* 4 BDs: 1 BD for LSO header + 1 BD for extended BD + 1 BD
617 	 * for linear area data but not include LSO header, namely
618 	 * skb_headlen(skb) - lso_hdr_len (it may be 0, but that's
619 	 * okay, we only need to consider the worst case). And 1 BD
620 	 * for gap.
621 	 */
622 	return skb_shinfo(skb)->nr_frags + 4;
623 }
624 
enetc_lso_get_hdr_len(const struct sk_buff * skb)625 static int enetc_lso_get_hdr_len(const struct sk_buff *skb)
626 {
627 	int hdr_len, tlen;
628 
629 	tlen = skb_is_gso_tcp(skb) ? tcp_hdrlen(skb) : sizeof(struct udphdr);
630 	hdr_len = skb_transport_offset(skb) + tlen;
631 
632 	return hdr_len;
633 }
634 
enetc_lso_start(struct sk_buff * skb,struct enetc_lso_t * lso)635 static void enetc_lso_start(struct sk_buff *skb, struct enetc_lso_t *lso)
636 {
637 	lso->lso_seg_size = skb_shinfo(skb)->gso_size;
638 	lso->ipv6 = enetc_skb_is_ipv6(skb);
639 	lso->tcp = skb_is_gso_tcp(skb);
640 	lso->l3_hdr_len = skb_network_header_len(skb);
641 	lso->l3_start = skb_network_offset(skb);
642 	lso->hdr_len = enetc_lso_get_hdr_len(skb);
643 	lso->total_len = skb->len - lso->hdr_len;
644 }
645 
enetc_lso_map_hdr(struct enetc_bdr * tx_ring,struct sk_buff * skb,int * i,struct enetc_lso_t * lso)646 static void enetc_lso_map_hdr(struct enetc_bdr *tx_ring, struct sk_buff *skb,
647 			      int *i, struct enetc_lso_t *lso)
648 {
649 	union enetc_tx_bd txbd_tmp, *txbd;
650 	struct enetc_tx_swbd *tx_swbd;
651 	u16 frm_len, frm_len_ext;
652 	u8 flags, e_flags = 0;
653 	dma_addr_t addr;
654 	char *hdr;
655 
656 	/* Get the first BD of the LSO BDs chain */
657 	txbd = ENETC_TXBD(*tx_ring, *i);
658 	tx_swbd = &tx_ring->tx_swbd[*i];
659 	prefetchw(txbd);
660 
661 	/* Prepare LSO header: MAC + IP + TCP/UDP */
662 	hdr = tx_ring->tso_headers + *i * TSO_HEADER_SIZE;
663 	memcpy(hdr, skb->data, lso->hdr_len);
664 	addr = tx_ring->tso_headers_dma + *i * TSO_HEADER_SIZE;
665 
666 	/* {frm_len_ext, frm_len} indicates the total length of
667 	 * large transmit data unit. frm_len contains the 16 least
668 	 * significant bits and frm_len_ext contains the 4 most
669 	 * significant bits.
670 	 */
671 	frm_len = lso->total_len & 0xffff;
672 	frm_len_ext = (lso->total_len >> 16) & 0xf;
673 
674 	/* Set the flags of the first BD */
675 	flags = ENETC_TXBD_FLAGS_EX | ENETC_TXBD_FLAGS_CSUM_LSO |
676 		ENETC_TXBD_FLAGS_LSO | ENETC_TXBD_FLAGS_L4CS;
677 
678 	enetc_clear_tx_bd(&txbd_tmp);
679 	txbd_tmp.addr = cpu_to_le64(addr);
680 	txbd_tmp.hdr_len = cpu_to_le16(lso->hdr_len);
681 
682 	/* first BD needs frm_len and offload flags set */
683 	txbd_tmp.frm_len = cpu_to_le16(frm_len);
684 	txbd_tmp.flags = flags;
685 
686 	txbd_tmp.l3_aux0 = FIELD_PREP(ENETC_TX_BD_L3_START, lso->l3_start);
687 	/* l3_hdr_size in 32-bits (4 bytes) */
688 	txbd_tmp.l3_aux1 = FIELD_PREP(ENETC_TX_BD_L3_HDR_LEN,
689 				      lso->l3_hdr_len / 4);
690 	if (lso->ipv6)
691 		txbd_tmp.l3_aux1 |= ENETC_TX_BD_L3T;
692 	else
693 		txbd_tmp.l3_aux0 |= ENETC_TX_BD_IPCS;
694 
695 	txbd_tmp.l4_aux = FIELD_PREP(ENETC_TX_BD_L4T, lso->tcp ?
696 				     ENETC_TXBD_L4T_TCP : ENETC_TXBD_L4T_UDP);
697 
698 	/* For the LSO header we do not set the dma address since
699 	 * we do not want it unmapped when we do cleanup. We still
700 	 * set len so that we count the bytes sent.
701 	 */
702 	tx_swbd->len = lso->hdr_len;
703 	tx_swbd->do_twostep_tstamp = false;
704 	tx_swbd->check_wb = false;
705 
706 	/* Actually write the header in the BD */
707 	*txbd = txbd_tmp;
708 
709 	/* Get the next BD, and the next BD is extended BD */
710 	enetc_bdr_idx_inc(tx_ring, i);
711 	txbd = ENETC_TXBD(*tx_ring, *i);
712 	tx_swbd = &tx_ring->tx_swbd[*i];
713 	prefetchw(txbd);
714 
715 	enetc_clear_tx_bd(&txbd_tmp);
716 	if (skb_vlan_tag_present(skb)) {
717 		/* Setup the VLAN fields */
718 		txbd_tmp.ext.vid = cpu_to_le16(skb_vlan_tag_get(skb));
719 		txbd_tmp.ext.tpid = ENETC_TPID_8021Q;
720 		e_flags = ENETC_TXBD_E_FLAGS_VLAN_INS;
721 	}
722 
723 	/* Write the BD */
724 	txbd_tmp.ext.e_flags = e_flags;
725 	txbd_tmp.ext.lso_sg_size = cpu_to_le16(lso->lso_seg_size);
726 	txbd_tmp.ext.frm_len_ext = cpu_to_le16(frm_len_ext);
727 	*txbd = txbd_tmp;
728 }
729 
enetc_lso_map_data(struct enetc_bdr * tx_ring,struct sk_buff * skb,int * i,struct enetc_lso_t * lso,int * count)730 static int enetc_lso_map_data(struct enetc_bdr *tx_ring, struct sk_buff *skb,
731 			      int *i, struct enetc_lso_t *lso, int *count)
732 {
733 	union enetc_tx_bd txbd_tmp, *txbd = NULL;
734 	struct enetc_tx_swbd *tx_swbd;
735 	skb_frag_t *frag;
736 	dma_addr_t dma;
737 	u8 flags = 0;
738 	int len, f;
739 
740 	len = skb_headlen(skb) - lso->hdr_len;
741 	if (len > 0) {
742 		dma = dma_map_single(tx_ring->dev, skb->data + lso->hdr_len,
743 				     len, DMA_TO_DEVICE);
744 		if (dma_mapping_error(tx_ring->dev, dma))
745 			return -ENOMEM;
746 
747 		enetc_bdr_idx_inc(tx_ring, i);
748 		txbd = ENETC_TXBD(*tx_ring, *i);
749 		tx_swbd = &tx_ring->tx_swbd[*i];
750 		prefetchw(txbd);
751 		*count += 1;
752 
753 		enetc_clear_tx_bd(&txbd_tmp);
754 		txbd_tmp.addr = cpu_to_le64(dma);
755 		txbd_tmp.buf_len = cpu_to_le16(len);
756 
757 		tx_swbd->dma = dma;
758 		tx_swbd->len = len;
759 		tx_swbd->is_dma_page = 0;
760 		tx_swbd->dir = DMA_TO_DEVICE;
761 	}
762 
763 	frag = &skb_shinfo(skb)->frags[0];
764 	for (f = 0; f < skb_shinfo(skb)->nr_frags; f++, frag++) {
765 		if (txbd)
766 			*txbd = txbd_tmp;
767 
768 		len = skb_frag_size(frag);
769 		dma = skb_frag_dma_map(tx_ring->dev, frag);
770 		if (dma_mapping_error(tx_ring->dev, dma))
771 			return -ENOMEM;
772 
773 		/* Get the next BD */
774 		enetc_bdr_idx_inc(tx_ring, i);
775 		txbd = ENETC_TXBD(*tx_ring, *i);
776 		tx_swbd = &tx_ring->tx_swbd[*i];
777 		prefetchw(txbd);
778 		*count += 1;
779 
780 		enetc_clear_tx_bd(&txbd_tmp);
781 		txbd_tmp.addr = cpu_to_le64(dma);
782 		txbd_tmp.buf_len = cpu_to_le16(len);
783 
784 		tx_swbd->dma = dma;
785 		tx_swbd->len = len;
786 		tx_swbd->is_dma_page = 1;
787 		tx_swbd->dir = DMA_TO_DEVICE;
788 	}
789 
790 	/* Last BD needs 'F' bit set */
791 	flags |= ENETC_TXBD_FLAGS_F;
792 	txbd_tmp.flags = flags;
793 	*txbd = txbd_tmp;
794 
795 	tx_swbd->is_eof = 1;
796 	tx_swbd->skb = skb;
797 
798 	return 0;
799 }
800 
enetc_lso_hw_offload(struct enetc_bdr * tx_ring,struct sk_buff * skb)801 static int enetc_lso_hw_offload(struct enetc_bdr *tx_ring, struct sk_buff *skb)
802 {
803 	struct enetc_tx_swbd *tx_swbd;
804 	struct enetc_lso_t lso = {0};
805 	int err, i, count = 0;
806 
807 	/* Initialize the LSO handler */
808 	enetc_lso_start(skb, &lso);
809 	i = tx_ring->next_to_use;
810 
811 	enetc_lso_map_hdr(tx_ring, skb, &i, &lso);
812 	/* First BD and an extend BD */
813 	count += 2;
814 
815 	err = enetc_lso_map_data(tx_ring, skb, &i, &lso, &count);
816 	if (err)
817 		goto dma_err;
818 
819 	/* Go to the next BD */
820 	enetc_bdr_idx_inc(tx_ring, &i);
821 	tx_ring->next_to_use = i;
822 	enetc_update_tx_ring_tail(tx_ring);
823 
824 	return count;
825 
826 dma_err:
827 	do {
828 		tx_swbd = &tx_ring->tx_swbd[i];
829 		enetc_free_tx_frame(tx_ring, tx_swbd);
830 		if (i == 0)
831 			i = tx_ring->bd_count;
832 		i--;
833 	} while (--count);
834 
835 	return 0;
836 }
837 
enetc_map_tx_tso_buffs(struct enetc_bdr * tx_ring,struct sk_buff * skb)838 static int enetc_map_tx_tso_buffs(struct enetc_bdr *tx_ring, struct sk_buff *skb)
839 {
840 	struct enetc_ndev_priv *priv = netdev_priv(tx_ring->ndev);
841 	int hdr_len, total_len, data_len;
842 	struct enetc_tx_swbd *tx_swbd;
843 	union enetc_tx_bd *txbd;
844 	struct tso_t tso;
845 	__wsum csum, csum2;
846 	int count = 0, pos;
847 	int err, i, bd_data_num;
848 
849 	/* Initialize the TSO handler, and prepare the first payload */
850 	hdr_len = tso_start(skb, &tso);
851 	total_len = skb->len - hdr_len;
852 	i = tx_ring->next_to_use;
853 
854 	while (total_len > 0) {
855 		char *hdr;
856 
857 		/* Get the BD */
858 		txbd = ENETC_TXBD(*tx_ring, i);
859 		tx_swbd = &tx_ring->tx_swbd[i];
860 		prefetchw(txbd);
861 
862 		/* Determine the length of this packet */
863 		data_len = min_t(int, skb_shinfo(skb)->gso_size, total_len);
864 		total_len -= data_len;
865 
866 		/* prepare packet headers: MAC + IP + TCP */
867 		hdr = tx_ring->tso_headers + i * TSO_HEADER_SIZE;
868 		tso_build_hdr(skb, hdr, &tso, data_len, total_len == 0);
869 
870 		/* compute the csum over the L4 header */
871 		csum = enetc_tso_hdr_csum(&tso, skb, hdr, hdr_len, &pos);
872 		count += enetc_map_tx_tso_hdr(tx_ring, skb, tx_swbd, txbd,
873 					      &i, hdr_len, data_len);
874 		bd_data_num = 0;
875 
876 		while (data_len > 0) {
877 			int size;
878 
879 			size = min_t(int, tso.size, data_len);
880 
881 			/* Advance the index in the BDR */
882 			enetc_bdr_idx_inc(tx_ring, &i);
883 			txbd = ENETC_TXBD(*tx_ring, i);
884 			tx_swbd = &tx_ring->tx_swbd[i];
885 			prefetchw(txbd);
886 
887 			/* Compute the checksum over this segment of data and
888 			 * add it to the csum already computed (over the L4
889 			 * header and possible other data segments).
890 			 */
891 			csum2 = csum_partial(tso.data, size, 0);
892 			csum = csum_block_add(csum, csum2, pos);
893 			pos += size;
894 
895 			err = enetc_map_tx_tso_data(tx_ring, skb, tx_swbd, txbd,
896 						    tso.data, size,
897 						    size == data_len);
898 			if (err) {
899 				if (i == 0)
900 					i = tx_ring->bd_count;
901 				i--;
902 
903 				goto err_map_data;
904 			}
905 
906 			data_len -= size;
907 			count++;
908 			bd_data_num++;
909 			tso_build_data(skb, &tso, size);
910 
911 			if (unlikely(bd_data_num >= priv->max_frags && data_len))
912 				goto err_chained_bd;
913 		}
914 
915 		enetc_tso_complete_csum(tx_ring, &tso, skb, hdr, pos, csum);
916 
917 		if (total_len == 0)
918 			tx_swbd->skb = skb;
919 
920 		/* Go to the next BD */
921 		enetc_bdr_idx_inc(tx_ring, &i);
922 	}
923 
924 	tx_ring->next_to_use = i;
925 	enetc_update_tx_ring_tail(tx_ring);
926 
927 	return count;
928 
929 err_map_data:
930 	dev_err(tx_ring->dev, "DMA map error");
931 
932 err_chained_bd:
933 	enetc_unwind_tx_frame(tx_ring, count, i);
934 
935 	return 0;
936 }
937 
enetc_start_xmit(struct sk_buff * skb,struct net_device * ndev)938 static netdev_tx_t enetc_start_xmit(struct sk_buff *skb,
939 				    struct net_device *ndev)
940 {
941 	struct enetc_ndev_priv *priv = netdev_priv(ndev);
942 	struct enetc_bdr *tx_ring;
943 	int count;
944 
945 	/* Queue one-step Sync packet if already locked */
946 	if (skb->cb[0] & ENETC_F_TX_ONESTEP_SYNC_TSTAMP) {
947 		if (test_and_set_bit_lock(ENETC_TX_ONESTEP_TSTAMP_IN_PROGRESS,
948 					  &priv->flags)) {
949 			skb_queue_tail(&priv->tx_skbs, skb);
950 			return NETDEV_TX_OK;
951 		}
952 	}
953 
954 	tx_ring = priv->tx_ring[skb->queue_mapping];
955 
956 	if (skb_is_gso(skb)) {
957 		/* LSO data unit lengths of up to 256KB are supported */
958 		if (priv->active_offloads & ENETC_F_LSO &&
959 		    (skb->len - enetc_lso_get_hdr_len(skb)) <=
960 		    ENETC_LSO_MAX_DATA_LEN) {
961 			if (enetc_bd_unused(tx_ring) < enetc_lso_count_descs(skb)) {
962 				netif_stop_subqueue(ndev, tx_ring->index);
963 				return NETDEV_TX_BUSY;
964 			}
965 
966 			count = enetc_lso_hw_offload(tx_ring, skb);
967 		} else {
968 			if (enetc_bd_unused(tx_ring) < tso_count_descs(skb)) {
969 				netif_stop_subqueue(ndev, tx_ring->index);
970 				return NETDEV_TX_BUSY;
971 			}
972 
973 			enetc_lock_mdio();
974 			count = enetc_map_tx_tso_buffs(tx_ring, skb);
975 			enetc_unlock_mdio();
976 		}
977 	} else {
978 		if (unlikely(skb_shinfo(skb)->nr_frags > priv->max_frags))
979 			if (unlikely(skb_linearize(skb)))
980 				goto drop_packet_err;
981 
982 		count = skb_shinfo(skb)->nr_frags + 1; /* fragments + head */
983 		if (enetc_bd_unused(tx_ring) < ENETC_TXBDS_NEEDED(count)) {
984 			netif_stop_subqueue(ndev, tx_ring->index);
985 			return NETDEV_TX_BUSY;
986 		}
987 
988 		enetc_lock_mdio();
989 		count = enetc_map_tx_buffs(tx_ring, skb);
990 		enetc_unlock_mdio();
991 	}
992 
993 	if (unlikely(!count))
994 		goto drop_packet_err;
995 
996 	if (enetc_bd_unused(tx_ring) < ENETC_TXBDS_MAX_NEEDED(priv->max_frags))
997 		netif_stop_subqueue(ndev, tx_ring->index);
998 
999 	return NETDEV_TX_OK;
1000 
1001 drop_packet_err:
1002 	dev_kfree_skb_any(skb);
1003 	return NETDEV_TX_OK;
1004 }
1005 
enetc_xmit(struct sk_buff * skb,struct net_device * ndev)1006 netdev_tx_t enetc_xmit(struct sk_buff *skb, struct net_device *ndev)
1007 {
1008 	struct enetc_ndev_priv *priv = netdev_priv(ndev);
1009 	u8 udp, msgtype, twostep;
1010 	u16 offset1, offset2;
1011 
1012 	/* Mark tx timestamp type on skb->cb[0] if requires */
1013 	if ((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
1014 	    (priv->active_offloads & ENETC_F_TX_TSTAMP_MASK)) {
1015 		skb->cb[0] = priv->active_offloads & ENETC_F_TX_TSTAMP_MASK;
1016 	} else {
1017 		skb->cb[0] = 0;
1018 	}
1019 
1020 	/* Fall back to two-step timestamp if not one-step Sync packet */
1021 	if (skb->cb[0] & ENETC_F_TX_ONESTEP_SYNC_TSTAMP) {
1022 		if (enetc_ptp_parse(skb, &udp, &msgtype, &twostep,
1023 				    &offset1, &offset2) ||
1024 		    msgtype != PTP_MSGTYPE_SYNC || twostep != 0)
1025 			skb->cb[0] = ENETC_F_TX_TSTAMP;
1026 	}
1027 
1028 	return enetc_start_xmit(skb, ndev);
1029 }
1030 EXPORT_SYMBOL_GPL(enetc_xmit);
1031 
enetc_msix(int irq,void * data)1032 static irqreturn_t enetc_msix(int irq, void *data)
1033 {
1034 	struct enetc_int_vector	*v = data;
1035 	int i;
1036 
1037 	enetc_lock_mdio();
1038 
1039 	/* disable interrupts */
1040 	enetc_wr_reg_hot(v->rbier, 0);
1041 	enetc_wr_reg_hot(v->ricr1, v->rx_ictt);
1042 
1043 	for_each_set_bit(i, &v->tx_rings_map, ENETC_MAX_NUM_TXQS)
1044 		enetc_wr_reg_hot(v->tbier_base + ENETC_BDR_OFF(i), 0);
1045 
1046 	enetc_unlock_mdio();
1047 
1048 	napi_schedule(&v->napi);
1049 
1050 	return IRQ_HANDLED;
1051 }
1052 
enetc_rx_dim_work(struct work_struct * w)1053 static void enetc_rx_dim_work(struct work_struct *w)
1054 {
1055 	struct dim *dim = container_of(w, struct dim, work);
1056 	struct dim_cq_moder moder =
1057 		net_dim_get_rx_moderation(dim->mode, dim->profile_ix);
1058 	struct enetc_int_vector	*v =
1059 		container_of(dim, struct enetc_int_vector, rx_dim);
1060 	struct enetc_ndev_priv *priv = netdev_priv(v->rx_ring.ndev);
1061 
1062 	v->rx_ictt = enetc_usecs_to_cycles(moder.usec, priv->sysclk_freq);
1063 	dim->state = DIM_START_MEASURE;
1064 }
1065 
enetc_rx_net_dim(struct enetc_int_vector * v)1066 static void enetc_rx_net_dim(struct enetc_int_vector *v)
1067 {
1068 	struct dim_sample dim_sample = {};
1069 
1070 	v->comp_cnt++;
1071 
1072 	if (!v->rx_napi_work)
1073 		return;
1074 
1075 	dim_update_sample(v->comp_cnt,
1076 			  v->rx_ring.stats.packets,
1077 			  v->rx_ring.stats.bytes,
1078 			  &dim_sample);
1079 	net_dim(&v->rx_dim, &dim_sample);
1080 }
1081 
enetc_bd_ready_count(struct enetc_bdr * tx_ring,int ci)1082 static int enetc_bd_ready_count(struct enetc_bdr *tx_ring, int ci)
1083 {
1084 	int pi = enetc_rd_reg_hot(tx_ring->tcir) & ENETC_TBCIR_IDX_MASK;
1085 
1086 	return pi >= ci ? pi - ci : tx_ring->bd_count - ci + pi;
1087 }
1088 
enetc_page_reusable(struct page * page)1089 static bool enetc_page_reusable(struct page *page)
1090 {
1091 	return (!page_is_pfmemalloc(page) && page_ref_count(page) == 1);
1092 }
1093 
enetc_reuse_page(struct enetc_bdr * rx_ring,struct enetc_rx_swbd * old)1094 static void enetc_reuse_page(struct enetc_bdr *rx_ring,
1095 			     struct enetc_rx_swbd *old)
1096 {
1097 	struct enetc_rx_swbd *new;
1098 
1099 	new = &rx_ring->rx_swbd[rx_ring->next_to_alloc];
1100 
1101 	/* next buf that may reuse a page */
1102 	enetc_bdr_idx_inc(rx_ring, &rx_ring->next_to_alloc);
1103 
1104 	/* copy page reference */
1105 	*new = *old;
1106 }
1107 
enetc_get_tx_tstamp(struct enetc_hw * hw,union enetc_tx_bd * txbd,u64 * tstamp)1108 static void enetc_get_tx_tstamp(struct enetc_hw *hw, union enetc_tx_bd *txbd,
1109 				u64 *tstamp)
1110 {
1111 	u32 lo, hi, tstamp_lo;
1112 
1113 	lo = enetc_rd_hot(hw, ENETC_SICTR0);
1114 	hi = enetc_rd_hot(hw, ENETC_SICTR1);
1115 	tstamp_lo = le32_to_cpu(txbd->wb.tstamp);
1116 	if (lo <= tstamp_lo)
1117 		hi -= 1;
1118 	*tstamp = (u64)hi << 32 | tstamp_lo;
1119 }
1120 
enetc_tstamp_tx(struct sk_buff * skb,u64 tstamp)1121 static void enetc_tstamp_tx(struct sk_buff *skb, u64 tstamp)
1122 {
1123 	struct skb_shared_hwtstamps shhwtstamps;
1124 
1125 	if (skb_shinfo(skb)->tx_flags & SKBTX_IN_PROGRESS) {
1126 		memset(&shhwtstamps, 0, sizeof(shhwtstamps));
1127 		shhwtstamps.hwtstamp = ns_to_ktime(tstamp);
1128 		skb_txtime_consumed(skb);
1129 		skb_tstamp_tx(skb, &shhwtstamps);
1130 	}
1131 }
1132 
enetc_recycle_xdp_tx_buff(struct enetc_bdr * tx_ring,struct enetc_tx_swbd * tx_swbd)1133 static void enetc_recycle_xdp_tx_buff(struct enetc_bdr *tx_ring,
1134 				      struct enetc_tx_swbd *tx_swbd)
1135 {
1136 	struct enetc_ndev_priv *priv = netdev_priv(tx_ring->ndev);
1137 	struct enetc_rx_swbd rx_swbd = {
1138 		.dma = tx_swbd->dma,
1139 		.page = tx_swbd->page,
1140 		.page_offset = tx_swbd->page_offset,
1141 		.dir = tx_swbd->dir,
1142 		.len = tx_swbd->len,
1143 	};
1144 	struct enetc_bdr *rx_ring;
1145 
1146 	rx_ring = enetc_rx_ring_from_xdp_tx_ring(priv, tx_ring);
1147 
1148 	if (likely(enetc_swbd_unused(rx_ring))) {
1149 		enetc_reuse_page(rx_ring, &rx_swbd);
1150 
1151 		/* sync for use by the device */
1152 		dma_sync_single_range_for_device(rx_ring->dev, rx_swbd.dma,
1153 						 rx_swbd.page_offset,
1154 						 ENETC_RXB_DMA_SIZE_XDP,
1155 						 rx_swbd.dir);
1156 
1157 		rx_ring->stats.recycles++;
1158 	} else {
1159 		/* RX ring is already full, we need to unmap and free the
1160 		 * page, since there's nothing useful we can do with it.
1161 		 */
1162 		rx_ring->stats.recycle_failures++;
1163 
1164 		dma_unmap_page(rx_ring->dev, rx_swbd.dma, PAGE_SIZE,
1165 			       rx_swbd.dir);
1166 		__free_page(rx_swbd.page);
1167 	}
1168 
1169 	rx_ring->xdp.xdp_tx_in_flight--;
1170 }
1171 
enetc_clean_tx_ring(struct enetc_bdr * tx_ring,int napi_budget)1172 static bool enetc_clean_tx_ring(struct enetc_bdr *tx_ring, int napi_budget)
1173 {
1174 	int tx_frm_cnt = 0, tx_byte_cnt = 0, tx_win_drop = 0;
1175 	struct net_device *ndev = tx_ring->ndev;
1176 	struct enetc_ndev_priv *priv = netdev_priv(ndev);
1177 	struct enetc_tx_swbd *tx_swbd;
1178 	int i, bds_to_clean;
1179 	bool do_twostep_tstamp;
1180 	u64 tstamp = 0;
1181 
1182 	i = tx_ring->next_to_clean;
1183 	tx_swbd = &tx_ring->tx_swbd[i];
1184 
1185 	bds_to_clean = enetc_bd_ready_count(tx_ring, i);
1186 
1187 	do_twostep_tstamp = false;
1188 
1189 	while (bds_to_clean && tx_frm_cnt < ENETC_DEFAULT_TX_WORK) {
1190 		struct xdp_frame *xdp_frame = enetc_tx_swbd_get_xdp_frame(tx_swbd);
1191 		struct sk_buff *skb = enetc_tx_swbd_get_skb(tx_swbd);
1192 		bool is_eof = tx_swbd->is_eof;
1193 
1194 		if (unlikely(tx_swbd->check_wb)) {
1195 			union enetc_tx_bd *txbd = ENETC_TXBD(*tx_ring, i);
1196 
1197 			if (txbd->flags & ENETC_TXBD_FLAGS_W &&
1198 			    tx_swbd->do_twostep_tstamp) {
1199 				enetc_get_tx_tstamp(&priv->si->hw, txbd,
1200 						    &tstamp);
1201 				do_twostep_tstamp = true;
1202 			}
1203 
1204 			if (tx_swbd->qbv_en &&
1205 			    txbd->wb.status & ENETC_TXBD_STATS_WIN)
1206 				tx_win_drop++;
1207 		}
1208 
1209 		if (tx_swbd->is_xdp_tx)
1210 			enetc_recycle_xdp_tx_buff(tx_ring, tx_swbd);
1211 		else if (likely(tx_swbd->dma))
1212 			enetc_unmap_tx_buff(tx_ring, tx_swbd);
1213 
1214 		if (xdp_frame) {
1215 			xdp_return_frame(xdp_frame);
1216 		} else if (skb) {
1217 			if (unlikely(skb->cb[0] & ENETC_F_TX_ONESTEP_SYNC_TSTAMP)) {
1218 				/* Start work to release lock for next one-step
1219 				 * timestamping packet. And send one skb in
1220 				 * tx_skbs queue if has.
1221 				 */
1222 				schedule_work(&priv->tx_onestep_tstamp);
1223 			} else if (unlikely(do_twostep_tstamp)) {
1224 				enetc_tstamp_tx(skb, tstamp);
1225 				do_twostep_tstamp = false;
1226 			}
1227 			napi_consume_skb(skb, napi_budget);
1228 		}
1229 
1230 		tx_byte_cnt += tx_swbd->len;
1231 		/* Scrub the swbd here so we don't have to do that
1232 		 * when we reuse it during xmit
1233 		 */
1234 		memset(tx_swbd, 0, sizeof(*tx_swbd));
1235 
1236 		bds_to_clean--;
1237 		tx_swbd++;
1238 		i++;
1239 		if (unlikely(i == tx_ring->bd_count)) {
1240 			i = 0;
1241 			tx_swbd = tx_ring->tx_swbd;
1242 		}
1243 
1244 		/* BD iteration loop end */
1245 		if (is_eof) {
1246 			tx_frm_cnt++;
1247 			/* re-arm interrupt source */
1248 			enetc_wr_reg_hot(tx_ring->idr, BIT(tx_ring->index) |
1249 					 BIT(16 + tx_ring->index));
1250 		}
1251 
1252 		if (unlikely(!bds_to_clean))
1253 			bds_to_clean = enetc_bd_ready_count(tx_ring, i);
1254 	}
1255 
1256 	tx_ring->next_to_clean = i;
1257 	tx_ring->stats.packets += tx_frm_cnt;
1258 	tx_ring->stats.bytes += tx_byte_cnt;
1259 	tx_ring->stats.win_drop += tx_win_drop;
1260 
1261 	if (unlikely(tx_frm_cnt && netif_carrier_ok(ndev) &&
1262 		     __netif_subqueue_stopped(ndev, tx_ring->index) &&
1263 		     !test_bit(ENETC_TX_DOWN, &priv->flags) &&
1264 		     (enetc_bd_unused(tx_ring) >=
1265 		      ENETC_TXBDS_MAX_NEEDED(priv->max_frags)))) {
1266 		netif_wake_subqueue(ndev, tx_ring->index);
1267 	}
1268 
1269 	return tx_frm_cnt != ENETC_DEFAULT_TX_WORK;
1270 }
1271 
enetc_new_page(struct enetc_bdr * rx_ring,struct enetc_rx_swbd * rx_swbd)1272 static bool enetc_new_page(struct enetc_bdr *rx_ring,
1273 			   struct enetc_rx_swbd *rx_swbd)
1274 {
1275 	bool xdp = !!(rx_ring->xdp.prog);
1276 	struct page *page;
1277 	dma_addr_t addr;
1278 
1279 	page = dev_alloc_page();
1280 	if (unlikely(!page))
1281 		return false;
1282 
1283 	/* For XDP_TX, we forgo dma_unmap -> dma_map */
1284 	rx_swbd->dir = xdp ? DMA_BIDIRECTIONAL : DMA_FROM_DEVICE;
1285 
1286 	addr = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE, rx_swbd->dir);
1287 	if (unlikely(dma_mapping_error(rx_ring->dev, addr))) {
1288 		__free_page(page);
1289 
1290 		return false;
1291 	}
1292 
1293 	rx_swbd->dma = addr;
1294 	rx_swbd->page = page;
1295 	rx_swbd->page_offset = rx_ring->buffer_offset;
1296 
1297 	return true;
1298 }
1299 
enetc_refill_rx_ring(struct enetc_bdr * rx_ring,const int buff_cnt)1300 static int enetc_refill_rx_ring(struct enetc_bdr *rx_ring, const int buff_cnt)
1301 {
1302 	struct enetc_rx_swbd *rx_swbd;
1303 	union enetc_rx_bd *rxbd;
1304 	int i, j;
1305 
1306 	i = rx_ring->next_to_use;
1307 	rx_swbd = &rx_ring->rx_swbd[i];
1308 	rxbd = enetc_rxbd(rx_ring, i);
1309 
1310 	for (j = 0; j < buff_cnt; j++) {
1311 		/* try reuse page */
1312 		if (unlikely(!rx_swbd->page)) {
1313 			if (unlikely(!enetc_new_page(rx_ring, rx_swbd))) {
1314 				rx_ring->stats.rx_alloc_errs++;
1315 				break;
1316 			}
1317 		}
1318 
1319 		/* update RxBD */
1320 		rxbd->w.addr = cpu_to_le64(rx_swbd->dma +
1321 					   rx_swbd->page_offset);
1322 		/* clear 'R" as well */
1323 		rxbd->r.lstatus = 0;
1324 
1325 		enetc_rxbd_next(rx_ring, &rxbd, &i);
1326 		rx_swbd = &rx_ring->rx_swbd[i];
1327 	}
1328 
1329 	if (likely(j)) {
1330 		rx_ring->next_to_alloc = i; /* keep track from page reuse */
1331 		rx_ring->next_to_use = i;
1332 
1333 		/* update ENETC's consumer index */
1334 		enetc_wr_reg_hot(rx_ring->rcir, rx_ring->next_to_use);
1335 	}
1336 
1337 	return j;
1338 }
1339 
enetc_get_rx_tstamp(struct net_device * ndev,union enetc_rx_bd * rxbd,struct sk_buff * skb)1340 static void enetc_get_rx_tstamp(struct net_device *ndev,
1341 				union enetc_rx_bd *rxbd,
1342 				struct sk_buff *skb)
1343 {
1344 	struct skb_shared_hwtstamps *shhwtstamps = skb_hwtstamps(skb);
1345 	struct enetc_ndev_priv *priv = netdev_priv(ndev);
1346 	struct enetc_hw *hw = &priv->si->hw;
1347 	u32 lo, hi, tstamp_lo;
1348 	u64 tstamp;
1349 
1350 	if (le16_to_cpu(rxbd->r.flags) & ENETC_RXBD_FLAG_TSTMP) {
1351 		lo = enetc_rd_reg_hot(hw->reg + ENETC_SICTR0);
1352 		hi = enetc_rd_reg_hot(hw->reg + ENETC_SICTR1);
1353 		rxbd = enetc_rxbd_ext(rxbd);
1354 		tstamp_lo = le32_to_cpu(rxbd->ext.tstamp);
1355 		if (lo <= tstamp_lo)
1356 			hi -= 1;
1357 
1358 		tstamp = (u64)hi << 32 | tstamp_lo;
1359 		memset(shhwtstamps, 0, sizeof(*shhwtstamps));
1360 		shhwtstamps->hwtstamp = ns_to_ktime(tstamp);
1361 	}
1362 }
1363 
enetc_get_offloads(struct enetc_bdr * rx_ring,union enetc_rx_bd * rxbd,struct sk_buff * skb)1364 static void enetc_get_offloads(struct enetc_bdr *rx_ring,
1365 			       union enetc_rx_bd *rxbd, struct sk_buff *skb)
1366 {
1367 	struct enetc_ndev_priv *priv = netdev_priv(rx_ring->ndev);
1368 
1369 	/* TODO: hashing */
1370 	if (rx_ring->ndev->features & NETIF_F_RXCSUM) {
1371 		u16 inet_csum = le16_to_cpu(rxbd->r.inet_csum);
1372 
1373 		skb->csum = csum_unfold((__force __sum16)~htons(inet_csum));
1374 		skb->ip_summed = CHECKSUM_COMPLETE;
1375 	}
1376 
1377 	if (le16_to_cpu(rxbd->r.flags) & ENETC_RXBD_FLAG_VLAN) {
1378 		__be16 tpid = 0;
1379 
1380 		switch (le16_to_cpu(rxbd->r.flags) & ENETC_RXBD_FLAG_TPID) {
1381 		case 0:
1382 			tpid = htons(ETH_P_8021Q);
1383 			break;
1384 		case 1:
1385 			tpid = htons(ETH_P_8021AD);
1386 			break;
1387 		case 2:
1388 			tpid = htons(enetc_port_rd(&priv->si->hw,
1389 						   ENETC_PCVLANR1));
1390 			break;
1391 		case 3:
1392 			tpid = htons(enetc_port_rd(&priv->si->hw,
1393 						   ENETC_PCVLANR2));
1394 			break;
1395 		default:
1396 			break;
1397 		}
1398 
1399 		__vlan_hwaccel_put_tag(skb, tpid, le16_to_cpu(rxbd->r.vlan_opt));
1400 	}
1401 
1402 	if (IS_ENABLED(CONFIG_FSL_ENETC_PTP_CLOCK) &&
1403 	    (priv->active_offloads & ENETC_F_RX_TSTAMP))
1404 		enetc_get_rx_tstamp(rx_ring->ndev, rxbd, skb);
1405 }
1406 
1407 /* This gets called during the non-XDP NAPI poll cycle as well as on XDP_PASS,
1408  * so it needs to work with both DMA_FROM_DEVICE as well as DMA_BIDIRECTIONAL
1409  * mapped buffers.
1410  */
enetc_get_rx_buff(struct enetc_bdr * rx_ring,int i,u16 size)1411 static struct enetc_rx_swbd *enetc_get_rx_buff(struct enetc_bdr *rx_ring,
1412 					       int i, u16 size)
1413 {
1414 	struct enetc_rx_swbd *rx_swbd = &rx_ring->rx_swbd[i];
1415 
1416 	dma_sync_single_range_for_cpu(rx_ring->dev, rx_swbd->dma,
1417 				      rx_swbd->page_offset,
1418 				      size, rx_swbd->dir);
1419 	return rx_swbd;
1420 }
1421 
1422 /* Reuse the current page without performing half-page buffer flipping */
enetc_put_rx_buff(struct enetc_bdr * rx_ring,struct enetc_rx_swbd * rx_swbd)1423 static void enetc_put_rx_buff(struct enetc_bdr *rx_ring,
1424 			      struct enetc_rx_swbd *rx_swbd)
1425 {
1426 	size_t buffer_size = ENETC_RXB_TRUESIZE - rx_ring->buffer_offset;
1427 
1428 	enetc_reuse_page(rx_ring, rx_swbd);
1429 
1430 	dma_sync_single_range_for_device(rx_ring->dev, rx_swbd->dma,
1431 					 rx_swbd->page_offset,
1432 					 buffer_size, rx_swbd->dir);
1433 
1434 	rx_swbd->page = NULL;
1435 }
1436 
1437 /* Reuse the current page by performing half-page buffer flipping */
enetc_flip_rx_buff(struct enetc_bdr * rx_ring,struct enetc_rx_swbd * rx_swbd)1438 static void enetc_flip_rx_buff(struct enetc_bdr *rx_ring,
1439 			       struct enetc_rx_swbd *rx_swbd)
1440 {
1441 	if (likely(enetc_page_reusable(rx_swbd->page))) {
1442 		rx_swbd->page_offset ^= ENETC_RXB_TRUESIZE;
1443 		page_ref_inc(rx_swbd->page);
1444 
1445 		enetc_put_rx_buff(rx_ring, rx_swbd);
1446 	} else {
1447 		dma_unmap_page(rx_ring->dev, rx_swbd->dma, PAGE_SIZE,
1448 			       rx_swbd->dir);
1449 		rx_swbd->page = NULL;
1450 	}
1451 }
1452 
enetc_map_rx_buff_to_skb(struct enetc_bdr * rx_ring,int i,u16 size)1453 static struct sk_buff *enetc_map_rx_buff_to_skb(struct enetc_bdr *rx_ring,
1454 						int i, u16 size)
1455 {
1456 	struct enetc_rx_swbd *rx_swbd = enetc_get_rx_buff(rx_ring, i, size);
1457 	struct sk_buff *skb;
1458 	void *ba;
1459 
1460 	ba = page_address(rx_swbd->page) + rx_swbd->page_offset;
1461 	skb = build_skb(ba - rx_ring->buffer_offset, ENETC_RXB_TRUESIZE);
1462 	if (unlikely(!skb)) {
1463 		rx_ring->stats.rx_alloc_errs++;
1464 		return NULL;
1465 	}
1466 
1467 	skb_reserve(skb, rx_ring->buffer_offset);
1468 	__skb_put(skb, size);
1469 
1470 	enetc_flip_rx_buff(rx_ring, rx_swbd);
1471 
1472 	return skb;
1473 }
1474 
enetc_add_rx_buff_to_skb(struct enetc_bdr * rx_ring,int i,u16 size,struct sk_buff * skb)1475 static void enetc_add_rx_buff_to_skb(struct enetc_bdr *rx_ring, int i,
1476 				     u16 size, struct sk_buff *skb)
1477 {
1478 	struct enetc_rx_swbd *rx_swbd = enetc_get_rx_buff(rx_ring, i, size);
1479 
1480 	skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_swbd->page,
1481 			rx_swbd->page_offset, size, ENETC_RXB_TRUESIZE);
1482 
1483 	enetc_flip_rx_buff(rx_ring, rx_swbd);
1484 }
1485 
enetc_check_bd_errors_and_consume(struct enetc_bdr * rx_ring,u32 bd_status,union enetc_rx_bd ** rxbd,int * i)1486 static bool enetc_check_bd_errors_and_consume(struct enetc_bdr *rx_ring,
1487 					      u32 bd_status,
1488 					      union enetc_rx_bd **rxbd, int *i)
1489 {
1490 	if (likely(!(bd_status & ENETC_RXBD_LSTATUS(ENETC_RXBD_ERR_MASK))))
1491 		return false;
1492 
1493 	enetc_put_rx_buff(rx_ring, &rx_ring->rx_swbd[*i]);
1494 	enetc_rxbd_next(rx_ring, rxbd, i);
1495 
1496 	while (!(bd_status & ENETC_RXBD_LSTATUS_F)) {
1497 		dma_rmb();
1498 		bd_status = le32_to_cpu((*rxbd)->r.lstatus);
1499 
1500 		enetc_put_rx_buff(rx_ring, &rx_ring->rx_swbd[*i]);
1501 		enetc_rxbd_next(rx_ring, rxbd, i);
1502 	}
1503 
1504 	rx_ring->ndev->stats.rx_dropped++;
1505 	rx_ring->ndev->stats.rx_errors++;
1506 
1507 	return true;
1508 }
1509 
enetc_build_skb(struct enetc_bdr * rx_ring,u32 bd_status,union enetc_rx_bd ** rxbd,int * i,int * cleaned_cnt,int buffer_size)1510 static struct sk_buff *enetc_build_skb(struct enetc_bdr *rx_ring,
1511 				       u32 bd_status, union enetc_rx_bd **rxbd,
1512 				       int *i, int *cleaned_cnt, int buffer_size)
1513 {
1514 	struct sk_buff *skb;
1515 	u16 size;
1516 
1517 	size = le16_to_cpu((*rxbd)->r.buf_len);
1518 	skb = enetc_map_rx_buff_to_skb(rx_ring, *i, size);
1519 	if (!skb)
1520 		return NULL;
1521 
1522 	enetc_get_offloads(rx_ring, *rxbd, skb);
1523 
1524 	(*cleaned_cnt)++;
1525 
1526 	enetc_rxbd_next(rx_ring, rxbd, i);
1527 
1528 	/* not last BD in frame? */
1529 	while (!(bd_status & ENETC_RXBD_LSTATUS_F)) {
1530 		bd_status = le32_to_cpu((*rxbd)->r.lstatus);
1531 		size = buffer_size;
1532 
1533 		if (bd_status & ENETC_RXBD_LSTATUS_F) {
1534 			dma_rmb();
1535 			size = le16_to_cpu((*rxbd)->r.buf_len);
1536 		}
1537 
1538 		enetc_add_rx_buff_to_skb(rx_ring, *i, size, skb);
1539 
1540 		(*cleaned_cnt)++;
1541 
1542 		enetc_rxbd_next(rx_ring, rxbd, i);
1543 	}
1544 
1545 	skb_record_rx_queue(skb, rx_ring->index);
1546 	skb->protocol = eth_type_trans(skb, rx_ring->ndev);
1547 
1548 	return skb;
1549 }
1550 
1551 #define ENETC_RXBD_BUNDLE 16 /* # of BDs to update at once */
1552 
enetc_clean_rx_ring(struct enetc_bdr * rx_ring,struct napi_struct * napi,int work_limit)1553 static int enetc_clean_rx_ring(struct enetc_bdr *rx_ring,
1554 			       struct napi_struct *napi, int work_limit)
1555 {
1556 	int rx_frm_cnt = 0, rx_byte_cnt = 0;
1557 	int cleaned_cnt, i;
1558 
1559 	cleaned_cnt = enetc_bd_unused(rx_ring);
1560 	/* next descriptor to process */
1561 	i = rx_ring->next_to_clean;
1562 
1563 	while (likely(rx_frm_cnt < work_limit)) {
1564 		union enetc_rx_bd *rxbd;
1565 		struct sk_buff *skb;
1566 		u32 bd_status;
1567 
1568 		if (cleaned_cnt >= ENETC_RXBD_BUNDLE)
1569 			cleaned_cnt -= enetc_refill_rx_ring(rx_ring,
1570 							    cleaned_cnt);
1571 
1572 		rxbd = enetc_rxbd(rx_ring, i);
1573 		bd_status = le32_to_cpu(rxbd->r.lstatus);
1574 		if (!bd_status)
1575 			break;
1576 
1577 		enetc_wr_reg_hot(rx_ring->idr, BIT(rx_ring->index));
1578 		dma_rmb(); /* for reading other rxbd fields */
1579 
1580 		if (enetc_check_bd_errors_and_consume(rx_ring, bd_status,
1581 						      &rxbd, &i))
1582 			break;
1583 
1584 		skb = enetc_build_skb(rx_ring, bd_status, &rxbd, &i,
1585 				      &cleaned_cnt, ENETC_RXB_DMA_SIZE);
1586 		if (!skb)
1587 			break;
1588 
1589 		/* When set, the outer VLAN header is extracted and reported
1590 		 * in the receive buffer descriptor. So rx_byte_cnt should
1591 		 * add the length of the extracted VLAN header.
1592 		 */
1593 		if (bd_status & ENETC_RXBD_FLAG_VLAN)
1594 			rx_byte_cnt += VLAN_HLEN;
1595 		rx_byte_cnt += skb->len + ETH_HLEN;
1596 		rx_frm_cnt++;
1597 
1598 		napi_gro_receive(napi, skb);
1599 	}
1600 
1601 	rx_ring->next_to_clean = i;
1602 
1603 	rx_ring->stats.packets += rx_frm_cnt;
1604 	rx_ring->stats.bytes += rx_byte_cnt;
1605 
1606 	return rx_frm_cnt;
1607 }
1608 
enetc_xdp_map_tx_buff(struct enetc_bdr * tx_ring,int i,struct enetc_tx_swbd * tx_swbd,int frm_len)1609 static void enetc_xdp_map_tx_buff(struct enetc_bdr *tx_ring, int i,
1610 				  struct enetc_tx_swbd *tx_swbd,
1611 				  int frm_len)
1612 {
1613 	union enetc_tx_bd *txbd = ENETC_TXBD(*tx_ring, i);
1614 
1615 	prefetchw(txbd);
1616 
1617 	enetc_clear_tx_bd(txbd);
1618 	txbd->addr = cpu_to_le64(tx_swbd->dma + tx_swbd->page_offset);
1619 	txbd->buf_len = cpu_to_le16(tx_swbd->len);
1620 	txbd->frm_len = cpu_to_le16(frm_len);
1621 
1622 	memcpy(&tx_ring->tx_swbd[i], tx_swbd, sizeof(*tx_swbd));
1623 }
1624 
1625 /* Puts in the TX ring one XDP frame, mapped as an array of TX software buffer
1626  * descriptors.
1627  */
enetc_xdp_tx(struct enetc_bdr * tx_ring,struct enetc_tx_swbd * xdp_tx_arr,int num_tx_swbd)1628 static bool enetc_xdp_tx(struct enetc_bdr *tx_ring,
1629 			 struct enetc_tx_swbd *xdp_tx_arr, int num_tx_swbd)
1630 {
1631 	struct enetc_tx_swbd *tmp_tx_swbd = xdp_tx_arr;
1632 	int i, k, frm_len = tmp_tx_swbd->len;
1633 
1634 	if (unlikely(enetc_bd_unused(tx_ring) < ENETC_TXBDS_NEEDED(num_tx_swbd)))
1635 		return false;
1636 
1637 	while (unlikely(!tmp_tx_swbd->is_eof)) {
1638 		tmp_tx_swbd++;
1639 		frm_len += tmp_tx_swbd->len;
1640 	}
1641 
1642 	i = tx_ring->next_to_use;
1643 
1644 	for (k = 0; k < num_tx_swbd; k++) {
1645 		struct enetc_tx_swbd *xdp_tx_swbd = &xdp_tx_arr[k];
1646 
1647 		enetc_xdp_map_tx_buff(tx_ring, i, xdp_tx_swbd, frm_len);
1648 
1649 		/* last BD needs 'F' bit set */
1650 		if (xdp_tx_swbd->is_eof) {
1651 			union enetc_tx_bd *txbd = ENETC_TXBD(*tx_ring, i);
1652 
1653 			txbd->flags = ENETC_TXBD_FLAGS_F;
1654 		}
1655 
1656 		enetc_bdr_idx_inc(tx_ring, &i);
1657 	}
1658 
1659 	tx_ring->next_to_use = i;
1660 
1661 	return true;
1662 }
1663 
enetc_xdp_frame_to_xdp_tx_swbd(struct enetc_bdr * tx_ring,struct enetc_tx_swbd * xdp_tx_arr,struct xdp_frame * xdp_frame)1664 static int enetc_xdp_frame_to_xdp_tx_swbd(struct enetc_bdr *tx_ring,
1665 					  struct enetc_tx_swbd *xdp_tx_arr,
1666 					  struct xdp_frame *xdp_frame)
1667 {
1668 	struct enetc_tx_swbd *xdp_tx_swbd = &xdp_tx_arr[0];
1669 	struct skb_shared_info *shinfo;
1670 	void *data = xdp_frame->data;
1671 	int len = xdp_frame->len;
1672 	skb_frag_t *frag;
1673 	dma_addr_t dma;
1674 	unsigned int f;
1675 	int n = 0;
1676 
1677 	dma = dma_map_single(tx_ring->dev, data, len, DMA_TO_DEVICE);
1678 	if (unlikely(dma_mapping_error(tx_ring->dev, dma))) {
1679 		netdev_err(tx_ring->ndev, "DMA map error\n");
1680 		return -1;
1681 	}
1682 
1683 	xdp_tx_swbd->dma = dma;
1684 	xdp_tx_swbd->dir = DMA_TO_DEVICE;
1685 	xdp_tx_swbd->len = len;
1686 	xdp_tx_swbd->is_xdp_redirect = true;
1687 	xdp_tx_swbd->is_eof = false;
1688 	xdp_tx_swbd->xdp_frame = NULL;
1689 
1690 	n++;
1691 
1692 	if (!xdp_frame_has_frags(xdp_frame))
1693 		goto out;
1694 
1695 	xdp_tx_swbd = &xdp_tx_arr[n];
1696 
1697 	shinfo = xdp_get_shared_info_from_frame(xdp_frame);
1698 
1699 	for (f = 0, frag = &shinfo->frags[0]; f < shinfo->nr_frags;
1700 	     f++, frag++) {
1701 		data = skb_frag_address(frag);
1702 		len = skb_frag_size(frag);
1703 
1704 		dma = dma_map_single(tx_ring->dev, data, len, DMA_TO_DEVICE);
1705 		if (unlikely(dma_mapping_error(tx_ring->dev, dma))) {
1706 			/* Undo the DMA mapping for all fragments */
1707 			while (--n >= 0)
1708 				enetc_unmap_tx_buff(tx_ring, &xdp_tx_arr[n]);
1709 
1710 			netdev_err(tx_ring->ndev, "DMA map error\n");
1711 			return -1;
1712 		}
1713 
1714 		xdp_tx_swbd->dma = dma;
1715 		xdp_tx_swbd->dir = DMA_TO_DEVICE;
1716 		xdp_tx_swbd->len = len;
1717 		xdp_tx_swbd->is_xdp_redirect = true;
1718 		xdp_tx_swbd->is_eof = false;
1719 		xdp_tx_swbd->xdp_frame = NULL;
1720 
1721 		n++;
1722 		xdp_tx_swbd = &xdp_tx_arr[n];
1723 	}
1724 out:
1725 	xdp_tx_arr[n - 1].is_eof = true;
1726 	xdp_tx_arr[n - 1].xdp_frame = xdp_frame;
1727 
1728 	return n;
1729 }
1730 
enetc_xdp_xmit(struct net_device * ndev,int num_frames,struct xdp_frame ** frames,u32 flags)1731 int enetc_xdp_xmit(struct net_device *ndev, int num_frames,
1732 		   struct xdp_frame **frames, u32 flags)
1733 {
1734 	struct enetc_tx_swbd xdp_redirect_arr[ENETC_MAX_SKB_FRAGS] = {0};
1735 	struct enetc_ndev_priv *priv = netdev_priv(ndev);
1736 	struct enetc_bdr *tx_ring;
1737 	int xdp_tx_bd_cnt, i, k;
1738 	int xdp_tx_frm_cnt = 0;
1739 
1740 	if (unlikely(test_bit(ENETC_TX_DOWN, &priv->flags)))
1741 		return -ENETDOWN;
1742 
1743 	enetc_lock_mdio();
1744 
1745 	tx_ring = priv->xdp_tx_ring[smp_processor_id()];
1746 
1747 	prefetchw(ENETC_TXBD(*tx_ring, tx_ring->next_to_use));
1748 
1749 	for (k = 0; k < num_frames; k++) {
1750 		xdp_tx_bd_cnt = enetc_xdp_frame_to_xdp_tx_swbd(tx_ring,
1751 							       xdp_redirect_arr,
1752 							       frames[k]);
1753 		if (unlikely(xdp_tx_bd_cnt < 0))
1754 			break;
1755 
1756 		if (unlikely(!enetc_xdp_tx(tx_ring, xdp_redirect_arr,
1757 					   xdp_tx_bd_cnt))) {
1758 			for (i = 0; i < xdp_tx_bd_cnt; i++)
1759 				enetc_unmap_tx_buff(tx_ring,
1760 						    &xdp_redirect_arr[i]);
1761 			tx_ring->stats.xdp_tx_drops++;
1762 			break;
1763 		}
1764 
1765 		xdp_tx_frm_cnt++;
1766 	}
1767 
1768 	if (unlikely((flags & XDP_XMIT_FLUSH) || k != xdp_tx_frm_cnt))
1769 		enetc_update_tx_ring_tail(tx_ring);
1770 
1771 	tx_ring->stats.xdp_tx += xdp_tx_frm_cnt;
1772 
1773 	enetc_unlock_mdio();
1774 
1775 	return xdp_tx_frm_cnt;
1776 }
1777 EXPORT_SYMBOL_GPL(enetc_xdp_xmit);
1778 
enetc_map_rx_buff_to_xdp(struct enetc_bdr * rx_ring,int i,struct xdp_buff * xdp_buff,u16 size)1779 static void enetc_map_rx_buff_to_xdp(struct enetc_bdr *rx_ring, int i,
1780 				     struct xdp_buff *xdp_buff, u16 size)
1781 {
1782 	struct enetc_rx_swbd *rx_swbd = enetc_get_rx_buff(rx_ring, i, size);
1783 	void *hard_start = page_address(rx_swbd->page) + rx_swbd->page_offset;
1784 
1785 	/* To be used for XDP_TX */
1786 	rx_swbd->len = size;
1787 
1788 	xdp_prepare_buff(xdp_buff, hard_start - rx_ring->buffer_offset,
1789 			 rx_ring->buffer_offset, size, false);
1790 }
1791 
enetc_add_rx_buff_to_xdp(struct enetc_bdr * rx_ring,int i,u16 size,struct xdp_buff * xdp_buff)1792 static void enetc_add_rx_buff_to_xdp(struct enetc_bdr *rx_ring, int i,
1793 				     u16 size, struct xdp_buff *xdp_buff)
1794 {
1795 	struct skb_shared_info *shinfo = xdp_get_shared_info_from_buff(xdp_buff);
1796 	struct enetc_rx_swbd *rx_swbd = enetc_get_rx_buff(rx_ring, i, size);
1797 	skb_frag_t *frag;
1798 
1799 	/* To be used for XDP_TX */
1800 	rx_swbd->len = size;
1801 
1802 	if (!xdp_buff_has_frags(xdp_buff)) {
1803 		xdp_buff_set_frags_flag(xdp_buff);
1804 		shinfo->xdp_frags_size = size;
1805 		shinfo->nr_frags = 0;
1806 	} else {
1807 		shinfo->xdp_frags_size += size;
1808 	}
1809 
1810 	if (page_is_pfmemalloc(rx_swbd->page))
1811 		xdp_buff_set_frag_pfmemalloc(xdp_buff);
1812 
1813 	frag = &shinfo->frags[shinfo->nr_frags];
1814 	skb_frag_fill_page_desc(frag, rx_swbd->page, rx_swbd->page_offset,
1815 				size);
1816 
1817 	shinfo->nr_frags++;
1818 }
1819 
enetc_build_xdp_buff(struct enetc_bdr * rx_ring,u32 bd_status,union enetc_rx_bd ** rxbd,int * i,int * cleaned_cnt,struct xdp_buff * xdp_buff)1820 static void enetc_build_xdp_buff(struct enetc_bdr *rx_ring, u32 bd_status,
1821 				 union enetc_rx_bd **rxbd, int *i,
1822 				 int *cleaned_cnt, struct xdp_buff *xdp_buff)
1823 {
1824 	u16 size = le16_to_cpu((*rxbd)->r.buf_len);
1825 
1826 	xdp_init_buff(xdp_buff, ENETC_RXB_TRUESIZE, &rx_ring->xdp.rxq);
1827 
1828 	enetc_map_rx_buff_to_xdp(rx_ring, *i, xdp_buff, size);
1829 	(*cleaned_cnt)++;
1830 	enetc_rxbd_next(rx_ring, rxbd, i);
1831 
1832 	/* not last BD in frame? */
1833 	while (!(bd_status & ENETC_RXBD_LSTATUS_F)) {
1834 		bd_status = le32_to_cpu((*rxbd)->r.lstatus);
1835 		size = ENETC_RXB_DMA_SIZE_XDP;
1836 
1837 		if (bd_status & ENETC_RXBD_LSTATUS_F) {
1838 			dma_rmb();
1839 			size = le16_to_cpu((*rxbd)->r.buf_len);
1840 		}
1841 
1842 		enetc_add_rx_buff_to_xdp(rx_ring, *i, size, xdp_buff);
1843 		(*cleaned_cnt)++;
1844 		enetc_rxbd_next(rx_ring, rxbd, i);
1845 	}
1846 }
1847 
1848 /* Convert RX buffer descriptors to TX buffer descriptors. These will be
1849  * recycled back into the RX ring in enetc_clean_tx_ring.
1850  */
enetc_rx_swbd_to_xdp_tx_swbd(struct enetc_tx_swbd * xdp_tx_arr,struct enetc_bdr * rx_ring,int rx_ring_first,int rx_ring_last)1851 static int enetc_rx_swbd_to_xdp_tx_swbd(struct enetc_tx_swbd *xdp_tx_arr,
1852 					struct enetc_bdr *rx_ring,
1853 					int rx_ring_first, int rx_ring_last)
1854 {
1855 	int n = 0;
1856 
1857 	for (; rx_ring_first != rx_ring_last;
1858 	     n++, enetc_bdr_idx_inc(rx_ring, &rx_ring_first)) {
1859 		struct enetc_rx_swbd *rx_swbd = &rx_ring->rx_swbd[rx_ring_first];
1860 		struct enetc_tx_swbd *tx_swbd = &xdp_tx_arr[n];
1861 
1862 		/* No need to dma_map, we already have DMA_BIDIRECTIONAL */
1863 		tx_swbd->dma = rx_swbd->dma;
1864 		tx_swbd->dir = rx_swbd->dir;
1865 		tx_swbd->page = rx_swbd->page;
1866 		tx_swbd->page_offset = rx_swbd->page_offset;
1867 		tx_swbd->len = rx_swbd->len;
1868 		tx_swbd->is_dma_page = true;
1869 		tx_swbd->is_xdp_tx = true;
1870 		tx_swbd->is_eof = false;
1871 	}
1872 
1873 	/* We rely on caller providing an rx_ring_last > rx_ring_first */
1874 	xdp_tx_arr[n - 1].is_eof = true;
1875 
1876 	return n;
1877 }
1878 
enetc_xdp_drop(struct enetc_bdr * rx_ring,int rx_ring_first,int rx_ring_last)1879 static void enetc_xdp_drop(struct enetc_bdr *rx_ring, int rx_ring_first,
1880 			   int rx_ring_last)
1881 {
1882 	while (rx_ring_first != rx_ring_last) {
1883 		enetc_put_rx_buff(rx_ring,
1884 				  &rx_ring->rx_swbd[rx_ring_first]);
1885 		enetc_bdr_idx_inc(rx_ring, &rx_ring_first);
1886 	}
1887 }
1888 
enetc_bulk_flip_buff(struct enetc_bdr * rx_ring,int rx_ring_first,int rx_ring_last)1889 static void enetc_bulk_flip_buff(struct enetc_bdr *rx_ring, int rx_ring_first,
1890 				 int rx_ring_last)
1891 {
1892 	while (rx_ring_first != rx_ring_last) {
1893 		enetc_flip_rx_buff(rx_ring,
1894 				   &rx_ring->rx_swbd[rx_ring_first]);
1895 		enetc_bdr_idx_inc(rx_ring, &rx_ring_first);
1896 	}
1897 }
1898 
enetc_clean_rx_ring_xdp(struct enetc_bdr * rx_ring,struct napi_struct * napi,int work_limit,struct bpf_prog * prog)1899 static int enetc_clean_rx_ring_xdp(struct enetc_bdr *rx_ring,
1900 				   struct napi_struct *napi, int work_limit,
1901 				   struct bpf_prog *prog)
1902 {
1903 	int xdp_tx_bd_cnt, xdp_tx_frm_cnt = 0, xdp_redirect_frm_cnt = 0;
1904 	struct enetc_tx_swbd xdp_tx_arr[ENETC_MAX_SKB_FRAGS] = {0};
1905 	struct enetc_ndev_priv *priv = netdev_priv(rx_ring->ndev);
1906 	int rx_frm_cnt = 0, rx_byte_cnt = 0;
1907 	struct enetc_bdr *tx_ring;
1908 	int cleaned_cnt, i;
1909 	u32 xdp_act;
1910 
1911 	cleaned_cnt = enetc_bd_unused(rx_ring);
1912 	/* next descriptor to process */
1913 	i = rx_ring->next_to_clean;
1914 
1915 	while (likely(rx_frm_cnt < work_limit)) {
1916 		union enetc_rx_bd *rxbd, *orig_rxbd;
1917 		struct xdp_buff xdp_buff;
1918 		struct sk_buff *skb;
1919 		int orig_i, err;
1920 		u32 bd_status;
1921 
1922 		rxbd = enetc_rxbd(rx_ring, i);
1923 		bd_status = le32_to_cpu(rxbd->r.lstatus);
1924 		if (!bd_status)
1925 			break;
1926 
1927 		enetc_wr_reg_hot(rx_ring->idr, BIT(rx_ring->index));
1928 		dma_rmb(); /* for reading other rxbd fields */
1929 
1930 		if (enetc_check_bd_errors_and_consume(rx_ring, bd_status,
1931 						      &rxbd, &i))
1932 			break;
1933 
1934 		orig_rxbd = rxbd;
1935 		orig_i = i;
1936 
1937 		enetc_build_xdp_buff(rx_ring, bd_status, &rxbd, &i,
1938 				     &cleaned_cnt, &xdp_buff);
1939 
1940 		/* When set, the outer VLAN header is extracted and reported
1941 		 * in the receive buffer descriptor. So rx_byte_cnt should
1942 		 * add the length of the extracted VLAN header.
1943 		 */
1944 		if (bd_status & ENETC_RXBD_FLAG_VLAN)
1945 			rx_byte_cnt += VLAN_HLEN;
1946 		rx_byte_cnt += xdp_get_buff_len(&xdp_buff);
1947 
1948 		xdp_act = bpf_prog_run_xdp(prog, &xdp_buff);
1949 
1950 		switch (xdp_act) {
1951 		default:
1952 			bpf_warn_invalid_xdp_action(rx_ring->ndev, prog, xdp_act);
1953 			fallthrough;
1954 		case XDP_ABORTED:
1955 			trace_xdp_exception(rx_ring->ndev, prog, xdp_act);
1956 			fallthrough;
1957 		case XDP_DROP:
1958 			enetc_xdp_drop(rx_ring, orig_i, i);
1959 			rx_ring->stats.xdp_drops++;
1960 			break;
1961 		case XDP_PASS:
1962 			skb = xdp_build_skb_from_buff(&xdp_buff);
1963 			/* Probably under memory pressure, stop NAPI */
1964 			if (unlikely(!skb)) {
1965 				enetc_xdp_drop(rx_ring, orig_i, i);
1966 				rx_ring->stats.xdp_drops++;
1967 				goto out;
1968 			}
1969 
1970 			enetc_get_offloads(rx_ring, orig_rxbd, skb);
1971 
1972 			/* These buffers are about to be owned by the stack.
1973 			 * Update our buffer cache (the rx_swbd array elements)
1974 			 * with their other page halves.
1975 			 */
1976 			enetc_bulk_flip_buff(rx_ring, orig_i, i);
1977 
1978 			napi_gro_receive(napi, skb);
1979 			break;
1980 		case XDP_TX:
1981 			tx_ring = priv->xdp_tx_ring[rx_ring->index];
1982 			if (unlikely(test_bit(ENETC_TX_DOWN, &priv->flags))) {
1983 				enetc_xdp_drop(rx_ring, orig_i, i);
1984 				tx_ring->stats.xdp_tx_drops++;
1985 				break;
1986 			}
1987 
1988 			xdp_tx_bd_cnt = enetc_rx_swbd_to_xdp_tx_swbd(xdp_tx_arr,
1989 								     rx_ring,
1990 								     orig_i, i);
1991 
1992 			if (!enetc_xdp_tx(tx_ring, xdp_tx_arr, xdp_tx_bd_cnt)) {
1993 				enetc_xdp_drop(rx_ring, orig_i, i);
1994 				tx_ring->stats.xdp_tx_drops++;
1995 			} else {
1996 				tx_ring->stats.xdp_tx++;
1997 				rx_ring->xdp.xdp_tx_in_flight += xdp_tx_bd_cnt;
1998 				xdp_tx_frm_cnt++;
1999 				/* The XDP_TX enqueue was successful, so we
2000 				 * need to scrub the RX software BDs because
2001 				 * the ownership of the buffers no longer
2002 				 * belongs to the RX ring, and we must prevent
2003 				 * enetc_refill_rx_ring() from reusing
2004 				 * rx_swbd->page.
2005 				 */
2006 				while (orig_i != i) {
2007 					rx_ring->rx_swbd[orig_i].page = NULL;
2008 					enetc_bdr_idx_inc(rx_ring, &orig_i);
2009 				}
2010 			}
2011 			break;
2012 		case XDP_REDIRECT:
2013 			err = xdp_do_redirect(rx_ring->ndev, &xdp_buff, prog);
2014 			if (unlikely(err)) {
2015 				enetc_xdp_drop(rx_ring, orig_i, i);
2016 				rx_ring->stats.xdp_redirect_failures++;
2017 			} else {
2018 				enetc_bulk_flip_buff(rx_ring, orig_i, i);
2019 				xdp_redirect_frm_cnt++;
2020 				rx_ring->stats.xdp_redirect++;
2021 			}
2022 		}
2023 
2024 		rx_frm_cnt++;
2025 	}
2026 
2027 out:
2028 	rx_ring->next_to_clean = i;
2029 
2030 	rx_ring->stats.packets += rx_frm_cnt;
2031 	rx_ring->stats.bytes += rx_byte_cnt;
2032 
2033 	if (xdp_redirect_frm_cnt)
2034 		xdp_do_flush();
2035 
2036 	if (xdp_tx_frm_cnt)
2037 		enetc_update_tx_ring_tail(tx_ring);
2038 
2039 	if (cleaned_cnt > rx_ring->xdp.xdp_tx_in_flight)
2040 		enetc_refill_rx_ring(rx_ring, enetc_bd_unused(rx_ring) -
2041 				     rx_ring->xdp.xdp_tx_in_flight);
2042 
2043 	return rx_frm_cnt;
2044 }
2045 
enetc_poll(struct napi_struct * napi,int budget)2046 static int enetc_poll(struct napi_struct *napi, int budget)
2047 {
2048 	struct enetc_int_vector
2049 		*v = container_of(napi, struct enetc_int_vector, napi);
2050 	struct enetc_bdr *rx_ring = &v->rx_ring;
2051 	struct bpf_prog *prog;
2052 	bool complete = true;
2053 	int work_done;
2054 	int i;
2055 
2056 	enetc_lock_mdio();
2057 
2058 	for (i = 0; i < v->count_tx_rings; i++)
2059 		if (!enetc_clean_tx_ring(&v->tx_ring[i], budget))
2060 			complete = false;
2061 
2062 	prog = rx_ring->xdp.prog;
2063 	if (prog)
2064 		work_done = enetc_clean_rx_ring_xdp(rx_ring, napi, budget, prog);
2065 	else
2066 		work_done = enetc_clean_rx_ring(rx_ring, napi, budget);
2067 	if (work_done == budget)
2068 		complete = false;
2069 	if (work_done)
2070 		v->rx_napi_work = true;
2071 
2072 	if (!complete) {
2073 		enetc_unlock_mdio();
2074 		return budget;
2075 	}
2076 
2077 	napi_complete_done(napi, work_done);
2078 
2079 	if (likely(v->rx_dim_en))
2080 		enetc_rx_net_dim(v);
2081 
2082 	v->rx_napi_work = false;
2083 
2084 	/* enable interrupts */
2085 	enetc_wr_reg_hot(v->rbier, ENETC_RBIER_RXTIE);
2086 
2087 	for_each_set_bit(i, &v->tx_rings_map, ENETC_MAX_NUM_TXQS)
2088 		enetc_wr_reg_hot(v->tbier_base + ENETC_BDR_OFF(i),
2089 				 ENETC_TBIER_TXTIE);
2090 
2091 	enetc_unlock_mdio();
2092 
2093 	return work_done;
2094 }
2095 
2096 /* Probing and Init */
2097 #define ENETC_MAX_RFS_SIZE 64
enetc_get_si_caps(struct enetc_si * si)2098 void enetc_get_si_caps(struct enetc_si *si)
2099 {
2100 	struct enetc_hw *hw = &si->hw;
2101 	u32 val;
2102 
2103 	/* find out how many of various resources we have to work with */
2104 	val = enetc_rd(hw, ENETC_SICAPR0);
2105 	si->num_rx_rings = (val >> 16) & 0xff;
2106 	si->num_tx_rings = val & 0xff;
2107 
2108 	val = enetc_rd(hw, ENETC_SIPCAPR0);
2109 	if (val & ENETC_SIPCAPR0_RFS) {
2110 		val = enetc_rd(hw, ENETC_SIRFSCAPR);
2111 		si->num_fs_entries = ENETC_SIRFSCAPR_GET_NUM_RFS(val);
2112 		si->num_fs_entries = min(si->num_fs_entries, ENETC_MAX_RFS_SIZE);
2113 	} else {
2114 		/* ENETC which not supports RFS */
2115 		si->num_fs_entries = 0;
2116 	}
2117 
2118 	si->num_rss = 0;
2119 	val = enetc_rd(hw, ENETC_SIPCAPR0);
2120 	if (val & ENETC_SIPCAPR0_RSS) {
2121 		u32 rss;
2122 
2123 		rss = enetc_rd(hw, ENETC_SIRSSCAPR);
2124 		si->num_rss = ENETC_SIRSSCAPR_GET_NUM_RSS(rss);
2125 	}
2126 
2127 	if (val & ENETC_SIPCAPR0_LSO)
2128 		si->hw_features |= ENETC_SI_F_LSO;
2129 }
2130 EXPORT_SYMBOL_GPL(enetc_get_si_caps);
2131 
enetc_dma_alloc_bdr(struct enetc_bdr_resource * res)2132 static int enetc_dma_alloc_bdr(struct enetc_bdr_resource *res)
2133 {
2134 	size_t bd_base_size = res->bd_count * res->bd_size;
2135 
2136 	res->bd_base = dma_alloc_coherent(res->dev, bd_base_size,
2137 					  &res->bd_dma_base, GFP_KERNEL);
2138 	if (!res->bd_base)
2139 		return -ENOMEM;
2140 
2141 	/* h/w requires 128B alignment */
2142 	if (!IS_ALIGNED(res->bd_dma_base, 128)) {
2143 		dma_free_coherent(res->dev, bd_base_size, res->bd_base,
2144 				  res->bd_dma_base);
2145 		return -EINVAL;
2146 	}
2147 
2148 	return 0;
2149 }
2150 
enetc_dma_free_bdr(const struct enetc_bdr_resource * res)2151 static void enetc_dma_free_bdr(const struct enetc_bdr_resource *res)
2152 {
2153 	size_t bd_base_size = res->bd_count * res->bd_size;
2154 
2155 	dma_free_coherent(res->dev, bd_base_size, res->bd_base,
2156 			  res->bd_dma_base);
2157 }
2158 
enetc_alloc_tx_resource(struct enetc_bdr_resource * res,struct device * dev,size_t bd_count)2159 static int enetc_alloc_tx_resource(struct enetc_bdr_resource *res,
2160 				   struct device *dev, size_t bd_count)
2161 {
2162 	int err;
2163 
2164 	res->dev = dev;
2165 	res->bd_count = bd_count;
2166 	res->bd_size = sizeof(union enetc_tx_bd);
2167 
2168 	res->tx_swbd = vcalloc(bd_count, sizeof(*res->tx_swbd));
2169 	if (!res->tx_swbd)
2170 		return -ENOMEM;
2171 
2172 	err = enetc_dma_alloc_bdr(res);
2173 	if (err)
2174 		goto err_alloc_bdr;
2175 
2176 	res->tso_headers = dma_alloc_coherent(dev, bd_count * TSO_HEADER_SIZE,
2177 					      &res->tso_headers_dma,
2178 					      GFP_KERNEL);
2179 	if (!res->tso_headers) {
2180 		err = -ENOMEM;
2181 		goto err_alloc_tso;
2182 	}
2183 
2184 	return 0;
2185 
2186 err_alloc_tso:
2187 	enetc_dma_free_bdr(res);
2188 err_alloc_bdr:
2189 	vfree(res->tx_swbd);
2190 	res->tx_swbd = NULL;
2191 
2192 	return err;
2193 }
2194 
enetc_free_tx_resource(const struct enetc_bdr_resource * res)2195 static void enetc_free_tx_resource(const struct enetc_bdr_resource *res)
2196 {
2197 	dma_free_coherent(res->dev, res->bd_count * TSO_HEADER_SIZE,
2198 			  res->tso_headers, res->tso_headers_dma);
2199 	enetc_dma_free_bdr(res);
2200 	vfree(res->tx_swbd);
2201 }
2202 
2203 static struct enetc_bdr_resource *
enetc_alloc_tx_resources(struct enetc_ndev_priv * priv)2204 enetc_alloc_tx_resources(struct enetc_ndev_priv *priv)
2205 {
2206 	struct enetc_bdr_resource *tx_res;
2207 	int i, err;
2208 
2209 	tx_res = kcalloc(priv->num_tx_rings, sizeof(*tx_res), GFP_KERNEL);
2210 	if (!tx_res)
2211 		return ERR_PTR(-ENOMEM);
2212 
2213 	for (i = 0; i < priv->num_tx_rings; i++) {
2214 		struct enetc_bdr *tx_ring = priv->tx_ring[i];
2215 
2216 		err = enetc_alloc_tx_resource(&tx_res[i], tx_ring->dev,
2217 					      tx_ring->bd_count);
2218 		if (err)
2219 			goto fail;
2220 	}
2221 
2222 	return tx_res;
2223 
2224 fail:
2225 	while (i-- > 0)
2226 		enetc_free_tx_resource(&tx_res[i]);
2227 
2228 	kfree(tx_res);
2229 
2230 	return ERR_PTR(err);
2231 }
2232 
enetc_free_tx_resources(const struct enetc_bdr_resource * tx_res,size_t num_resources)2233 static void enetc_free_tx_resources(const struct enetc_bdr_resource *tx_res,
2234 				    size_t num_resources)
2235 {
2236 	size_t i;
2237 
2238 	for (i = 0; i < num_resources; i++)
2239 		enetc_free_tx_resource(&tx_res[i]);
2240 
2241 	kfree(tx_res);
2242 }
2243 
enetc_alloc_rx_resource(struct enetc_bdr_resource * res,struct device * dev,size_t bd_count,bool extended)2244 static int enetc_alloc_rx_resource(struct enetc_bdr_resource *res,
2245 				   struct device *dev, size_t bd_count,
2246 				   bool extended)
2247 {
2248 	int err;
2249 
2250 	res->dev = dev;
2251 	res->bd_count = bd_count;
2252 	res->bd_size = sizeof(union enetc_rx_bd);
2253 	if (extended)
2254 		res->bd_size *= 2;
2255 
2256 	res->rx_swbd = vcalloc(bd_count, sizeof(struct enetc_rx_swbd));
2257 	if (!res->rx_swbd)
2258 		return -ENOMEM;
2259 
2260 	err = enetc_dma_alloc_bdr(res);
2261 	if (err) {
2262 		vfree(res->rx_swbd);
2263 		return err;
2264 	}
2265 
2266 	return 0;
2267 }
2268 
enetc_free_rx_resource(const struct enetc_bdr_resource * res)2269 static void enetc_free_rx_resource(const struct enetc_bdr_resource *res)
2270 {
2271 	enetc_dma_free_bdr(res);
2272 	vfree(res->rx_swbd);
2273 }
2274 
2275 static struct enetc_bdr_resource *
enetc_alloc_rx_resources(struct enetc_ndev_priv * priv,bool extended)2276 enetc_alloc_rx_resources(struct enetc_ndev_priv *priv, bool extended)
2277 {
2278 	struct enetc_bdr_resource *rx_res;
2279 	int i, err;
2280 
2281 	rx_res = kcalloc(priv->num_rx_rings, sizeof(*rx_res), GFP_KERNEL);
2282 	if (!rx_res)
2283 		return ERR_PTR(-ENOMEM);
2284 
2285 	for (i = 0; i < priv->num_rx_rings; i++) {
2286 		struct enetc_bdr *rx_ring = priv->rx_ring[i];
2287 
2288 		err = enetc_alloc_rx_resource(&rx_res[i], rx_ring->dev,
2289 					      rx_ring->bd_count, extended);
2290 		if (err)
2291 			goto fail;
2292 	}
2293 
2294 	return rx_res;
2295 
2296 fail:
2297 	while (i-- > 0)
2298 		enetc_free_rx_resource(&rx_res[i]);
2299 
2300 	kfree(rx_res);
2301 
2302 	return ERR_PTR(err);
2303 }
2304 
enetc_free_rx_resources(const struct enetc_bdr_resource * rx_res,size_t num_resources)2305 static void enetc_free_rx_resources(const struct enetc_bdr_resource *rx_res,
2306 				    size_t num_resources)
2307 {
2308 	size_t i;
2309 
2310 	for (i = 0; i < num_resources; i++)
2311 		enetc_free_rx_resource(&rx_res[i]);
2312 
2313 	kfree(rx_res);
2314 }
2315 
enetc_assign_tx_resource(struct enetc_bdr * tx_ring,const struct enetc_bdr_resource * res)2316 static void enetc_assign_tx_resource(struct enetc_bdr *tx_ring,
2317 				     const struct enetc_bdr_resource *res)
2318 {
2319 	tx_ring->bd_base = res ? res->bd_base : NULL;
2320 	tx_ring->bd_dma_base = res ? res->bd_dma_base : 0;
2321 	tx_ring->tx_swbd = res ? res->tx_swbd : NULL;
2322 	tx_ring->tso_headers = res ? res->tso_headers : NULL;
2323 	tx_ring->tso_headers_dma = res ? res->tso_headers_dma : 0;
2324 }
2325 
enetc_assign_rx_resource(struct enetc_bdr * rx_ring,const struct enetc_bdr_resource * res)2326 static void enetc_assign_rx_resource(struct enetc_bdr *rx_ring,
2327 				     const struct enetc_bdr_resource *res)
2328 {
2329 	rx_ring->bd_base = res ? res->bd_base : NULL;
2330 	rx_ring->bd_dma_base = res ? res->bd_dma_base : 0;
2331 	rx_ring->rx_swbd = res ? res->rx_swbd : NULL;
2332 }
2333 
enetc_assign_tx_resources(struct enetc_ndev_priv * priv,const struct enetc_bdr_resource * res)2334 static void enetc_assign_tx_resources(struct enetc_ndev_priv *priv,
2335 				      const struct enetc_bdr_resource *res)
2336 {
2337 	int i;
2338 
2339 	if (priv->tx_res)
2340 		enetc_free_tx_resources(priv->tx_res, priv->num_tx_rings);
2341 
2342 	for (i = 0; i < priv->num_tx_rings; i++) {
2343 		enetc_assign_tx_resource(priv->tx_ring[i],
2344 					 res ? &res[i] : NULL);
2345 	}
2346 
2347 	priv->tx_res = res;
2348 }
2349 
enetc_assign_rx_resources(struct enetc_ndev_priv * priv,const struct enetc_bdr_resource * res)2350 static void enetc_assign_rx_resources(struct enetc_ndev_priv *priv,
2351 				      const struct enetc_bdr_resource *res)
2352 {
2353 	int i;
2354 
2355 	if (priv->rx_res)
2356 		enetc_free_rx_resources(priv->rx_res, priv->num_rx_rings);
2357 
2358 	for (i = 0; i < priv->num_rx_rings; i++) {
2359 		enetc_assign_rx_resource(priv->rx_ring[i],
2360 					 res ? &res[i] : NULL);
2361 	}
2362 
2363 	priv->rx_res = res;
2364 }
2365 
enetc_free_tx_ring(struct enetc_bdr * tx_ring)2366 static void enetc_free_tx_ring(struct enetc_bdr *tx_ring)
2367 {
2368 	int i;
2369 
2370 	for (i = 0; i < tx_ring->bd_count; i++) {
2371 		struct enetc_tx_swbd *tx_swbd = &tx_ring->tx_swbd[i];
2372 
2373 		enetc_free_tx_frame(tx_ring, tx_swbd);
2374 	}
2375 }
2376 
enetc_free_rx_ring(struct enetc_bdr * rx_ring)2377 static void enetc_free_rx_ring(struct enetc_bdr *rx_ring)
2378 {
2379 	int i;
2380 
2381 	for (i = 0; i < rx_ring->bd_count; i++) {
2382 		struct enetc_rx_swbd *rx_swbd = &rx_ring->rx_swbd[i];
2383 
2384 		if (!rx_swbd->page)
2385 			continue;
2386 
2387 		dma_unmap_page(rx_ring->dev, rx_swbd->dma, PAGE_SIZE,
2388 			       rx_swbd->dir);
2389 		__free_page(rx_swbd->page);
2390 		rx_swbd->page = NULL;
2391 	}
2392 }
2393 
enetc_free_rxtx_rings(struct enetc_ndev_priv * priv)2394 static void enetc_free_rxtx_rings(struct enetc_ndev_priv *priv)
2395 {
2396 	int i;
2397 
2398 	for (i = 0; i < priv->num_rx_rings; i++)
2399 		enetc_free_rx_ring(priv->rx_ring[i]);
2400 
2401 	for (i = 0; i < priv->num_tx_rings; i++)
2402 		enetc_free_tx_ring(priv->tx_ring[i]);
2403 }
2404 
enetc_setup_default_rss_table(struct enetc_si * si,int num_groups)2405 static int enetc_setup_default_rss_table(struct enetc_si *si, int num_groups)
2406 {
2407 	int *rss_table;
2408 	int i;
2409 
2410 	rss_table = kmalloc_array(si->num_rss, sizeof(*rss_table), GFP_KERNEL);
2411 	if (!rss_table)
2412 		return -ENOMEM;
2413 
2414 	/* Set up RSS table defaults */
2415 	for (i = 0; i < si->num_rss; i++)
2416 		rss_table[i] = i % num_groups;
2417 
2418 	si->ops->set_rss_table(si, rss_table, si->num_rss);
2419 
2420 	kfree(rss_table);
2421 
2422 	return 0;
2423 }
2424 
enetc_set_lso_flags_mask(struct enetc_hw * hw)2425 static void enetc_set_lso_flags_mask(struct enetc_hw *hw)
2426 {
2427 	enetc_wr(hw, ENETC4_SILSOSFMR0,
2428 		 SILSOSFMR0_VAL_SET(ENETC4_TCP_NL_SEG_FLAGS_DMASK,
2429 				    ENETC4_TCP_NL_SEG_FLAGS_DMASK));
2430 	enetc_wr(hw, ENETC4_SILSOSFMR1, 0);
2431 }
2432 
enetc_set_rss(struct net_device * ndev,int en)2433 static void enetc_set_rss(struct net_device *ndev, int en)
2434 {
2435 	struct enetc_ndev_priv *priv = netdev_priv(ndev);
2436 	struct enetc_hw *hw = &priv->si->hw;
2437 	u32 reg;
2438 
2439 	enetc_wr(hw, ENETC_SIRBGCR, priv->num_rx_rings);
2440 
2441 	reg = enetc_rd(hw, ENETC_SIMR);
2442 	reg &= ~ENETC_SIMR_RSSE;
2443 	reg |= (en) ? ENETC_SIMR_RSSE : 0;
2444 	enetc_wr(hw, ENETC_SIMR, reg);
2445 }
2446 
enetc_configure_si(struct enetc_ndev_priv * priv)2447 int enetc_configure_si(struct enetc_ndev_priv *priv)
2448 {
2449 	struct enetc_si *si = priv->si;
2450 	struct enetc_hw *hw = &si->hw;
2451 	int err;
2452 
2453 	/* set SI cache attributes */
2454 	enetc_wr(hw, ENETC_SICAR0,
2455 		 ENETC_SICAR_RD_COHERENT | ENETC_SICAR_WR_COHERENT);
2456 	enetc_wr(hw, ENETC_SICAR1, ENETC_SICAR_MSI);
2457 	/* enable SI */
2458 	enetc_wr(hw, ENETC_SIMR, ENETC_SIMR_EN);
2459 
2460 	if (si->hw_features & ENETC_SI_F_LSO)
2461 		enetc_set_lso_flags_mask(hw);
2462 
2463 	if (si->num_rss) {
2464 		err = enetc_setup_default_rss_table(si, priv->num_rx_rings);
2465 		if (err)
2466 			return err;
2467 
2468 		if (priv->ndev->features & NETIF_F_RXHASH)
2469 			enetc_set_rss(priv->ndev, true);
2470 	}
2471 
2472 	return 0;
2473 }
2474 EXPORT_SYMBOL_GPL(enetc_configure_si);
2475 
enetc_init_si_rings_params(struct enetc_ndev_priv * priv)2476 void enetc_init_si_rings_params(struct enetc_ndev_priv *priv)
2477 {
2478 	struct enetc_si *si = priv->si;
2479 	int cpus = num_online_cpus();
2480 
2481 	priv->tx_bd_count = ENETC_TX_RING_DEFAULT_SIZE;
2482 	priv->rx_bd_count = ENETC_RX_RING_DEFAULT_SIZE;
2483 
2484 	/* Enable all available TX rings in order to configure as many
2485 	 * priorities as possible, when needed.
2486 	 * TODO: Make # of TX rings run-time configurable
2487 	 */
2488 	priv->num_rx_rings = min_t(int, cpus, si->num_rx_rings);
2489 	priv->num_tx_rings = si->num_tx_rings;
2490 	priv->bdr_int_num = priv->num_rx_rings;
2491 	priv->ic_mode = ENETC_IC_RX_ADAPTIVE | ENETC_IC_TX_MANUAL;
2492 	priv->tx_ictt = enetc_usecs_to_cycles(600, priv->sysclk_freq);
2493 }
2494 EXPORT_SYMBOL_GPL(enetc_init_si_rings_params);
2495 
enetc_alloc_si_resources(struct enetc_ndev_priv * priv)2496 int enetc_alloc_si_resources(struct enetc_ndev_priv *priv)
2497 {
2498 	struct enetc_si *si = priv->si;
2499 
2500 	priv->cls_rules = kcalloc(si->num_fs_entries, sizeof(*priv->cls_rules),
2501 				  GFP_KERNEL);
2502 	if (!priv->cls_rules)
2503 		return -ENOMEM;
2504 
2505 	return 0;
2506 }
2507 EXPORT_SYMBOL_GPL(enetc_alloc_si_resources);
2508 
enetc_free_si_resources(struct enetc_ndev_priv * priv)2509 void enetc_free_si_resources(struct enetc_ndev_priv *priv)
2510 {
2511 	kfree(priv->cls_rules);
2512 }
2513 EXPORT_SYMBOL_GPL(enetc_free_si_resources);
2514 
enetc_setup_txbdr(struct enetc_hw * hw,struct enetc_bdr * tx_ring)2515 static void enetc_setup_txbdr(struct enetc_hw *hw, struct enetc_bdr *tx_ring)
2516 {
2517 	int idx = tx_ring->index;
2518 	u32 tbmr;
2519 
2520 	enetc_txbdr_wr(hw, idx, ENETC_TBBAR0,
2521 		       lower_32_bits(tx_ring->bd_dma_base));
2522 
2523 	enetc_txbdr_wr(hw, idx, ENETC_TBBAR1,
2524 		       upper_32_bits(tx_ring->bd_dma_base));
2525 
2526 	WARN_ON(!IS_ALIGNED(tx_ring->bd_count, 64)); /* multiple of 64 */
2527 	enetc_txbdr_wr(hw, idx, ENETC_TBLENR,
2528 		       ENETC_RTBLENR_LEN(tx_ring->bd_count));
2529 
2530 	/* clearing PI/CI registers for Tx not supported, adjust sw indexes */
2531 	tx_ring->next_to_use = enetc_txbdr_rd(hw, idx, ENETC_TBPIR);
2532 	tx_ring->next_to_clean = enetc_txbdr_rd(hw, idx, ENETC_TBCIR);
2533 
2534 	/* enable Tx ints by setting pkt thr to 1 */
2535 	enetc_txbdr_wr(hw, idx, ENETC_TBICR0, ENETC_TBICR0_ICEN | 0x1);
2536 
2537 	tbmr = ENETC_TBMR_SET_PRIO(tx_ring->prio);
2538 	if (tx_ring->ndev->features & NETIF_F_HW_VLAN_CTAG_TX)
2539 		tbmr |= ENETC_TBMR_VIH;
2540 
2541 	/* enable ring */
2542 	enetc_txbdr_wr(hw, idx, ENETC_TBMR, tbmr);
2543 
2544 	tx_ring->tpir = hw->reg + ENETC_BDR(TX, idx, ENETC_TBPIR);
2545 	tx_ring->tcir = hw->reg + ENETC_BDR(TX, idx, ENETC_TBCIR);
2546 	tx_ring->idr = hw->reg + ENETC_SITXIDR;
2547 }
2548 
enetc_setup_rxbdr(struct enetc_hw * hw,struct enetc_bdr * rx_ring,bool extended)2549 static void enetc_setup_rxbdr(struct enetc_hw *hw, struct enetc_bdr *rx_ring,
2550 			      bool extended)
2551 {
2552 	int idx = rx_ring->index;
2553 	u32 rbmr = 0;
2554 
2555 	enetc_rxbdr_wr(hw, idx, ENETC_RBBAR0,
2556 		       lower_32_bits(rx_ring->bd_dma_base));
2557 
2558 	enetc_rxbdr_wr(hw, idx, ENETC_RBBAR1,
2559 		       upper_32_bits(rx_ring->bd_dma_base));
2560 
2561 	WARN_ON(!IS_ALIGNED(rx_ring->bd_count, 64)); /* multiple of 64 */
2562 	enetc_rxbdr_wr(hw, idx, ENETC_RBLENR,
2563 		       ENETC_RTBLENR_LEN(rx_ring->bd_count));
2564 
2565 	if (rx_ring->xdp.prog)
2566 		enetc_rxbdr_wr(hw, idx, ENETC_RBBSR, ENETC_RXB_DMA_SIZE_XDP);
2567 	else
2568 		enetc_rxbdr_wr(hw, idx, ENETC_RBBSR, ENETC_RXB_DMA_SIZE);
2569 
2570 	/* Also prepare the consumer index in case page allocation never
2571 	 * succeeds. In that case, hardware will never advance producer index
2572 	 * to match consumer index, and will drop all frames.
2573 	 */
2574 	enetc_rxbdr_wr(hw, idx, ENETC_RBPIR, 0);
2575 	enetc_rxbdr_wr(hw, idx, ENETC_RBCIR, 1);
2576 
2577 	/* enable Rx ints by setting pkt thr to 1 */
2578 	enetc_rxbdr_wr(hw, idx, ENETC_RBICR0, ENETC_RBICR0_ICEN | 0x1);
2579 
2580 	rx_ring->ext_en = extended;
2581 	if (rx_ring->ext_en)
2582 		rbmr |= ENETC_RBMR_BDS;
2583 
2584 	if (rx_ring->ndev->features & NETIF_F_HW_VLAN_CTAG_RX)
2585 		rbmr |= ENETC_RBMR_VTE;
2586 
2587 	rx_ring->rcir = hw->reg + ENETC_BDR(RX, idx, ENETC_RBCIR);
2588 	rx_ring->idr = hw->reg + ENETC_SIRXIDR;
2589 
2590 	rx_ring->next_to_clean = 0;
2591 	rx_ring->next_to_use = 0;
2592 	rx_ring->next_to_alloc = 0;
2593 
2594 	enetc_lock_mdio();
2595 	enetc_refill_rx_ring(rx_ring, enetc_bd_unused(rx_ring));
2596 	enetc_unlock_mdio();
2597 
2598 	enetc_rxbdr_wr(hw, idx, ENETC_RBMR, rbmr);
2599 }
2600 
enetc_setup_bdrs(struct enetc_ndev_priv * priv,bool extended)2601 static void enetc_setup_bdrs(struct enetc_ndev_priv *priv, bool extended)
2602 {
2603 	struct enetc_hw *hw = &priv->si->hw;
2604 	int i;
2605 
2606 	for (i = 0; i < priv->num_tx_rings; i++)
2607 		enetc_setup_txbdr(hw, priv->tx_ring[i]);
2608 
2609 	for (i = 0; i < priv->num_rx_rings; i++)
2610 		enetc_setup_rxbdr(hw, priv->rx_ring[i], extended);
2611 }
2612 
enetc_enable_txbdr(struct enetc_hw * hw,struct enetc_bdr * tx_ring)2613 static void enetc_enable_txbdr(struct enetc_hw *hw, struct enetc_bdr *tx_ring)
2614 {
2615 	int idx = tx_ring->index;
2616 	u32 tbmr;
2617 
2618 	tbmr = enetc_txbdr_rd(hw, idx, ENETC_TBMR);
2619 	tbmr |= ENETC_TBMR_EN;
2620 	enetc_txbdr_wr(hw, idx, ENETC_TBMR, tbmr);
2621 }
2622 
enetc_enable_rxbdr(struct enetc_hw * hw,struct enetc_bdr * rx_ring)2623 static void enetc_enable_rxbdr(struct enetc_hw *hw, struct enetc_bdr *rx_ring)
2624 {
2625 	int idx = rx_ring->index;
2626 	u32 rbmr;
2627 
2628 	rbmr = enetc_rxbdr_rd(hw, idx, ENETC_RBMR);
2629 	rbmr |= ENETC_RBMR_EN;
2630 	enetc_rxbdr_wr(hw, idx, ENETC_RBMR, rbmr);
2631 }
2632 
enetc_enable_rx_bdrs(struct enetc_ndev_priv * priv)2633 static void enetc_enable_rx_bdrs(struct enetc_ndev_priv *priv)
2634 {
2635 	struct enetc_hw *hw = &priv->si->hw;
2636 	int i;
2637 
2638 	for (i = 0; i < priv->num_rx_rings; i++)
2639 		enetc_enable_rxbdr(hw, priv->rx_ring[i]);
2640 }
2641 
enetc_enable_tx_bdrs(struct enetc_ndev_priv * priv)2642 static void enetc_enable_tx_bdrs(struct enetc_ndev_priv *priv)
2643 {
2644 	struct enetc_hw *hw = &priv->si->hw;
2645 	int i;
2646 
2647 	for (i = 0; i < priv->num_tx_rings; i++)
2648 		enetc_enable_txbdr(hw, priv->tx_ring[i]);
2649 }
2650 
enetc_disable_rxbdr(struct enetc_hw * hw,struct enetc_bdr * rx_ring)2651 static void enetc_disable_rxbdr(struct enetc_hw *hw, struct enetc_bdr *rx_ring)
2652 {
2653 	int idx = rx_ring->index;
2654 
2655 	/* disable EN bit on ring */
2656 	enetc_rxbdr_wr(hw, idx, ENETC_RBMR, 0);
2657 }
2658 
enetc_disable_txbdr(struct enetc_hw * hw,struct enetc_bdr * rx_ring)2659 static void enetc_disable_txbdr(struct enetc_hw *hw, struct enetc_bdr *rx_ring)
2660 {
2661 	int idx = rx_ring->index;
2662 
2663 	/* disable EN bit on ring */
2664 	enetc_txbdr_wr(hw, idx, ENETC_TBMR, 0);
2665 }
2666 
enetc_disable_rx_bdrs(struct enetc_ndev_priv * priv)2667 static void enetc_disable_rx_bdrs(struct enetc_ndev_priv *priv)
2668 {
2669 	struct enetc_hw *hw = &priv->si->hw;
2670 	int i;
2671 
2672 	for (i = 0; i < priv->num_rx_rings; i++)
2673 		enetc_disable_rxbdr(hw, priv->rx_ring[i]);
2674 }
2675 
enetc_disable_tx_bdrs(struct enetc_ndev_priv * priv)2676 static void enetc_disable_tx_bdrs(struct enetc_ndev_priv *priv)
2677 {
2678 	struct enetc_hw *hw = &priv->si->hw;
2679 	int i;
2680 
2681 	for (i = 0; i < priv->num_tx_rings; i++)
2682 		enetc_disable_txbdr(hw, priv->tx_ring[i]);
2683 }
2684 
enetc_wait_txbdr(struct enetc_hw * hw,struct enetc_bdr * tx_ring)2685 static void enetc_wait_txbdr(struct enetc_hw *hw, struct enetc_bdr *tx_ring)
2686 {
2687 	int delay = 8, timeout = 100;
2688 	int idx = tx_ring->index;
2689 
2690 	/* wait for busy to clear */
2691 	while (delay < timeout &&
2692 	       enetc_txbdr_rd(hw, idx, ENETC_TBSR) & ENETC_TBSR_BUSY) {
2693 		msleep(delay);
2694 		delay *= 2;
2695 	}
2696 
2697 	if (delay >= timeout)
2698 		netdev_warn(tx_ring->ndev, "timeout for tx ring #%d clear\n",
2699 			    idx);
2700 }
2701 
enetc_wait_bdrs(struct enetc_ndev_priv * priv)2702 static void enetc_wait_bdrs(struct enetc_ndev_priv *priv)
2703 {
2704 	struct enetc_hw *hw = &priv->si->hw;
2705 	int i;
2706 
2707 	for (i = 0; i < priv->num_tx_rings; i++)
2708 		enetc_wait_txbdr(hw, priv->tx_ring[i]);
2709 }
2710 
enetc_setup_irqs(struct enetc_ndev_priv * priv)2711 static int enetc_setup_irqs(struct enetc_ndev_priv *priv)
2712 {
2713 	struct pci_dev *pdev = priv->si->pdev;
2714 	struct enetc_hw *hw = &priv->si->hw;
2715 	int i, j, err;
2716 
2717 	for (i = 0; i < priv->bdr_int_num; i++) {
2718 		int irq = pci_irq_vector(pdev, ENETC_BDR_INT_BASE_IDX + i);
2719 		struct enetc_int_vector *v = priv->int_vector[i];
2720 		int entry = ENETC_BDR_INT_BASE_IDX + i;
2721 
2722 		snprintf(v->name, sizeof(v->name), "%s-rxtx%d",
2723 			 priv->ndev->name, i);
2724 		err = request_irq(irq, enetc_msix, IRQF_NO_AUTOEN, v->name, v);
2725 		if (err) {
2726 			dev_err(priv->dev, "request_irq() failed!\n");
2727 			goto irq_err;
2728 		}
2729 
2730 		v->tbier_base = hw->reg + ENETC_BDR(TX, 0, ENETC_TBIER);
2731 		v->rbier = hw->reg + ENETC_BDR(RX, i, ENETC_RBIER);
2732 		v->ricr1 = hw->reg + ENETC_BDR(RX, i, ENETC_RBICR1);
2733 
2734 		enetc_wr(hw, ENETC_SIMSIRRV(i), entry);
2735 
2736 		for (j = 0; j < v->count_tx_rings; j++) {
2737 			int idx = v->tx_ring[j].index;
2738 
2739 			enetc_wr(hw, ENETC_SIMSITRV(idx), entry);
2740 		}
2741 		irq_set_affinity_hint(irq, get_cpu_mask(i % num_online_cpus()));
2742 	}
2743 
2744 	return 0;
2745 
2746 irq_err:
2747 	while (i--) {
2748 		int irq = pci_irq_vector(pdev, ENETC_BDR_INT_BASE_IDX + i);
2749 
2750 		irq_set_affinity_hint(irq, NULL);
2751 		free_irq(irq, priv->int_vector[i]);
2752 	}
2753 
2754 	return err;
2755 }
2756 
enetc_free_irqs(struct enetc_ndev_priv * priv)2757 static void enetc_free_irqs(struct enetc_ndev_priv *priv)
2758 {
2759 	struct pci_dev *pdev = priv->si->pdev;
2760 	int i;
2761 
2762 	for (i = 0; i < priv->bdr_int_num; i++) {
2763 		int irq = pci_irq_vector(pdev, ENETC_BDR_INT_BASE_IDX + i);
2764 
2765 		irq_set_affinity_hint(irq, NULL);
2766 		free_irq(irq, priv->int_vector[i]);
2767 	}
2768 }
2769 
enetc_setup_interrupts(struct enetc_ndev_priv * priv)2770 static void enetc_setup_interrupts(struct enetc_ndev_priv *priv)
2771 {
2772 	struct enetc_hw *hw = &priv->si->hw;
2773 	u32 icpt, ictt;
2774 	int i;
2775 
2776 	/* enable Tx & Rx event indication */
2777 	if (priv->ic_mode &
2778 	    (ENETC_IC_RX_MANUAL | ENETC_IC_RX_ADAPTIVE)) {
2779 		icpt = ENETC_RBICR0_SET_ICPT(ENETC_RXIC_PKTTHR);
2780 		/* init to non-0 minimum, will be adjusted later */
2781 		ictt = 0x1;
2782 	} else {
2783 		icpt = 0x1; /* enable Rx ints by setting pkt thr to 1 */
2784 		ictt = 0;
2785 	}
2786 
2787 	for (i = 0; i < priv->num_rx_rings; i++) {
2788 		enetc_rxbdr_wr(hw, i, ENETC_RBICR1, ictt);
2789 		enetc_rxbdr_wr(hw, i, ENETC_RBICR0, ENETC_RBICR0_ICEN | icpt);
2790 		enetc_rxbdr_wr(hw, i, ENETC_RBIER, ENETC_RBIER_RXTIE);
2791 	}
2792 
2793 	if (priv->ic_mode & ENETC_IC_TX_MANUAL)
2794 		icpt = ENETC_TBICR0_SET_ICPT(ENETC_TXIC_PKTTHR);
2795 	else
2796 		icpt = 0x1; /* enable Tx ints by setting pkt thr to 1 */
2797 
2798 	for (i = 0; i < priv->num_tx_rings; i++) {
2799 		enetc_txbdr_wr(hw, i, ENETC_TBICR1, priv->tx_ictt);
2800 		enetc_txbdr_wr(hw, i, ENETC_TBICR0, ENETC_TBICR0_ICEN | icpt);
2801 		enetc_txbdr_wr(hw, i, ENETC_TBIER, ENETC_TBIER_TXTIE);
2802 	}
2803 }
2804 
enetc_clear_interrupts(struct enetc_ndev_priv * priv)2805 static void enetc_clear_interrupts(struct enetc_ndev_priv *priv)
2806 {
2807 	struct enetc_hw *hw = &priv->si->hw;
2808 	int i;
2809 
2810 	for (i = 0; i < priv->num_tx_rings; i++)
2811 		enetc_txbdr_wr(hw, i, ENETC_TBIER, 0);
2812 
2813 	for (i = 0; i < priv->num_rx_rings; i++)
2814 		enetc_rxbdr_wr(hw, i, ENETC_RBIER, 0);
2815 }
2816 
enetc_phylink_connect(struct net_device * ndev)2817 static int enetc_phylink_connect(struct net_device *ndev)
2818 {
2819 	struct enetc_ndev_priv *priv = netdev_priv(ndev);
2820 	struct ethtool_keee edata;
2821 	int err;
2822 
2823 	if (!priv->phylink) {
2824 		/* phy-less mode */
2825 		netif_carrier_on(ndev);
2826 		return 0;
2827 	}
2828 
2829 	err = phylink_of_phy_connect(priv->phylink, priv->dev->of_node, 0);
2830 	if (err) {
2831 		dev_err(&ndev->dev, "could not attach to PHY\n");
2832 		return err;
2833 	}
2834 
2835 	/* disable EEE autoneg, until ENETC driver supports it */
2836 	memset(&edata, 0, sizeof(struct ethtool_keee));
2837 	phylink_ethtool_set_eee(priv->phylink, &edata);
2838 
2839 	phylink_start(priv->phylink);
2840 
2841 	return 0;
2842 }
2843 
enetc_tx_onestep_tstamp(struct work_struct * work)2844 static void enetc_tx_onestep_tstamp(struct work_struct *work)
2845 {
2846 	struct enetc_ndev_priv *priv;
2847 	struct sk_buff *skb;
2848 
2849 	priv = container_of(work, struct enetc_ndev_priv, tx_onestep_tstamp);
2850 
2851 	netif_tx_lock_bh(priv->ndev);
2852 
2853 	clear_bit_unlock(ENETC_TX_ONESTEP_TSTAMP_IN_PROGRESS, &priv->flags);
2854 	skb = skb_dequeue(&priv->tx_skbs);
2855 	if (skb)
2856 		enetc_start_xmit(skb, priv->ndev);
2857 
2858 	netif_tx_unlock_bh(priv->ndev);
2859 }
2860 
enetc_tx_onestep_tstamp_init(struct enetc_ndev_priv * priv)2861 static void enetc_tx_onestep_tstamp_init(struct enetc_ndev_priv *priv)
2862 {
2863 	INIT_WORK(&priv->tx_onestep_tstamp, enetc_tx_onestep_tstamp);
2864 	skb_queue_head_init(&priv->tx_skbs);
2865 }
2866 
enetc_start(struct net_device * ndev)2867 void enetc_start(struct net_device *ndev)
2868 {
2869 	struct enetc_ndev_priv *priv = netdev_priv(ndev);
2870 	int i;
2871 
2872 	enetc_setup_interrupts(priv);
2873 
2874 	for (i = 0; i < priv->bdr_int_num; i++) {
2875 		int irq = pci_irq_vector(priv->si->pdev,
2876 					 ENETC_BDR_INT_BASE_IDX + i);
2877 
2878 		napi_enable(&priv->int_vector[i]->napi);
2879 		enable_irq(irq);
2880 	}
2881 
2882 	enetc_enable_tx_bdrs(priv);
2883 
2884 	enetc_enable_rx_bdrs(priv);
2885 
2886 	netif_tx_start_all_queues(ndev);
2887 
2888 	clear_bit(ENETC_TX_DOWN, &priv->flags);
2889 }
2890 EXPORT_SYMBOL_GPL(enetc_start);
2891 
enetc_open(struct net_device * ndev)2892 int enetc_open(struct net_device *ndev)
2893 {
2894 	struct enetc_ndev_priv *priv = netdev_priv(ndev);
2895 	struct enetc_bdr_resource *tx_res, *rx_res;
2896 	bool extended;
2897 	int err;
2898 
2899 	extended = !!(priv->active_offloads & ENETC_F_RX_TSTAMP);
2900 
2901 	err = clk_prepare_enable(priv->ref_clk);
2902 	if (err)
2903 		return err;
2904 
2905 	err = enetc_setup_irqs(priv);
2906 	if (err)
2907 		goto err_setup_irqs;
2908 
2909 	err = enetc_phylink_connect(ndev);
2910 	if (err)
2911 		goto err_phy_connect;
2912 
2913 	tx_res = enetc_alloc_tx_resources(priv);
2914 	if (IS_ERR(tx_res)) {
2915 		err = PTR_ERR(tx_res);
2916 		goto err_alloc_tx;
2917 	}
2918 
2919 	rx_res = enetc_alloc_rx_resources(priv, extended);
2920 	if (IS_ERR(rx_res)) {
2921 		err = PTR_ERR(rx_res);
2922 		goto err_alloc_rx;
2923 	}
2924 
2925 	enetc_tx_onestep_tstamp_init(priv);
2926 	enetc_assign_tx_resources(priv, tx_res);
2927 	enetc_assign_rx_resources(priv, rx_res);
2928 	enetc_setup_bdrs(priv, extended);
2929 	enetc_start(ndev);
2930 
2931 	return 0;
2932 
2933 err_alloc_rx:
2934 	enetc_free_tx_resources(tx_res, priv->num_tx_rings);
2935 err_alloc_tx:
2936 	if (priv->phylink)
2937 		phylink_disconnect_phy(priv->phylink);
2938 err_phy_connect:
2939 	enetc_free_irqs(priv);
2940 err_setup_irqs:
2941 	clk_disable_unprepare(priv->ref_clk);
2942 
2943 	return err;
2944 }
2945 EXPORT_SYMBOL_GPL(enetc_open);
2946 
enetc_stop(struct net_device * ndev)2947 void enetc_stop(struct net_device *ndev)
2948 {
2949 	struct enetc_ndev_priv *priv = netdev_priv(ndev);
2950 	int i;
2951 
2952 	set_bit(ENETC_TX_DOWN, &priv->flags);
2953 
2954 	netif_tx_stop_all_queues(ndev);
2955 
2956 	enetc_disable_rx_bdrs(priv);
2957 
2958 	enetc_wait_bdrs(priv);
2959 
2960 	enetc_disable_tx_bdrs(priv);
2961 
2962 	for (i = 0; i < priv->bdr_int_num; i++) {
2963 		int irq = pci_irq_vector(priv->si->pdev,
2964 					 ENETC_BDR_INT_BASE_IDX + i);
2965 
2966 		disable_irq(irq);
2967 		napi_synchronize(&priv->int_vector[i]->napi);
2968 		napi_disable(&priv->int_vector[i]->napi);
2969 	}
2970 
2971 	enetc_clear_interrupts(priv);
2972 }
2973 EXPORT_SYMBOL_GPL(enetc_stop);
2974 
enetc_close(struct net_device * ndev)2975 int enetc_close(struct net_device *ndev)
2976 {
2977 	struct enetc_ndev_priv *priv = netdev_priv(ndev);
2978 
2979 	enetc_stop(ndev);
2980 
2981 	if (priv->phylink) {
2982 		phylink_stop(priv->phylink);
2983 		phylink_disconnect_phy(priv->phylink);
2984 	} else {
2985 		netif_carrier_off(ndev);
2986 	}
2987 
2988 	enetc_free_rxtx_rings(priv);
2989 
2990 	/* Avoids dangling pointers and also frees old resources */
2991 	enetc_assign_rx_resources(priv, NULL);
2992 	enetc_assign_tx_resources(priv, NULL);
2993 
2994 	enetc_free_irqs(priv);
2995 	clk_disable_unprepare(priv->ref_clk);
2996 
2997 	return 0;
2998 }
2999 EXPORT_SYMBOL_GPL(enetc_close);
3000 
enetc_reconfigure(struct enetc_ndev_priv * priv,bool extended,int (* cb)(struct enetc_ndev_priv * priv,void * ctx),void * ctx)3001 static int enetc_reconfigure(struct enetc_ndev_priv *priv, bool extended,
3002 			     int (*cb)(struct enetc_ndev_priv *priv, void *ctx),
3003 			     void *ctx)
3004 {
3005 	struct enetc_bdr_resource *tx_res, *rx_res;
3006 	int err;
3007 
3008 	ASSERT_RTNL();
3009 
3010 	/* If the interface is down, run the callback right away,
3011 	 * without reconfiguration.
3012 	 */
3013 	if (!netif_running(priv->ndev)) {
3014 		if (cb) {
3015 			err = cb(priv, ctx);
3016 			if (err)
3017 				return err;
3018 		}
3019 
3020 		return 0;
3021 	}
3022 
3023 	tx_res = enetc_alloc_tx_resources(priv);
3024 	if (IS_ERR(tx_res)) {
3025 		err = PTR_ERR(tx_res);
3026 		goto out;
3027 	}
3028 
3029 	rx_res = enetc_alloc_rx_resources(priv, extended);
3030 	if (IS_ERR(rx_res)) {
3031 		err = PTR_ERR(rx_res);
3032 		goto out_free_tx_res;
3033 	}
3034 
3035 	enetc_stop(priv->ndev);
3036 	enetc_free_rxtx_rings(priv);
3037 
3038 	/* Interface is down, run optional callback now */
3039 	if (cb) {
3040 		err = cb(priv, ctx);
3041 		if (err)
3042 			goto out_restart;
3043 	}
3044 
3045 	enetc_assign_tx_resources(priv, tx_res);
3046 	enetc_assign_rx_resources(priv, rx_res);
3047 	enetc_setup_bdrs(priv, extended);
3048 	enetc_start(priv->ndev);
3049 
3050 	return 0;
3051 
3052 out_restart:
3053 	enetc_setup_bdrs(priv, extended);
3054 	enetc_start(priv->ndev);
3055 	enetc_free_rx_resources(rx_res, priv->num_rx_rings);
3056 out_free_tx_res:
3057 	enetc_free_tx_resources(tx_res, priv->num_tx_rings);
3058 out:
3059 	return err;
3060 }
3061 
enetc_debug_tx_ring_prios(struct enetc_ndev_priv * priv)3062 static void enetc_debug_tx_ring_prios(struct enetc_ndev_priv *priv)
3063 {
3064 	int i;
3065 
3066 	for (i = 0; i < priv->num_tx_rings; i++)
3067 		netdev_dbg(priv->ndev, "TX ring %d prio %d\n", i,
3068 			   priv->tx_ring[i]->prio);
3069 }
3070 
enetc_reset_tc_mqprio(struct net_device * ndev)3071 void enetc_reset_tc_mqprio(struct net_device *ndev)
3072 {
3073 	struct enetc_ndev_priv *priv = netdev_priv(ndev);
3074 	struct enetc_hw *hw = &priv->si->hw;
3075 	struct enetc_bdr *tx_ring;
3076 	int num_stack_tx_queues;
3077 	int i;
3078 
3079 	num_stack_tx_queues = enetc_num_stack_tx_queues(priv);
3080 
3081 	netdev_reset_tc(ndev);
3082 	netif_set_real_num_tx_queues(ndev, num_stack_tx_queues);
3083 	priv->min_num_stack_tx_queues = num_possible_cpus();
3084 
3085 	/* Reset all ring priorities to 0 */
3086 	for (i = 0; i < priv->num_tx_rings; i++) {
3087 		tx_ring = priv->tx_ring[i];
3088 		tx_ring->prio = 0;
3089 		enetc_set_bdr_prio(hw, tx_ring->index, tx_ring->prio);
3090 	}
3091 
3092 	enetc_debug_tx_ring_prios(priv);
3093 
3094 	enetc_change_preemptible_tcs(priv, 0);
3095 }
3096 EXPORT_SYMBOL_GPL(enetc_reset_tc_mqprio);
3097 
enetc_setup_tc_mqprio(struct net_device * ndev,void * type_data)3098 int enetc_setup_tc_mqprio(struct net_device *ndev, void *type_data)
3099 {
3100 	struct tc_mqprio_qopt_offload *mqprio = type_data;
3101 	struct enetc_ndev_priv *priv = netdev_priv(ndev);
3102 	struct tc_mqprio_qopt *qopt = &mqprio->qopt;
3103 	struct enetc_hw *hw = &priv->si->hw;
3104 	int num_stack_tx_queues = 0;
3105 	struct enetc_bdr *tx_ring;
3106 	u8 num_tc = qopt->num_tc;
3107 	int offset, count;
3108 	int err, tc, q;
3109 
3110 	if (!num_tc) {
3111 		enetc_reset_tc_mqprio(ndev);
3112 		return 0;
3113 	}
3114 
3115 	err = netdev_set_num_tc(ndev, num_tc);
3116 	if (err)
3117 		return err;
3118 
3119 	for (tc = 0; tc < num_tc; tc++) {
3120 		offset = qopt->offset[tc];
3121 		count = qopt->count[tc];
3122 		num_stack_tx_queues += count;
3123 
3124 		err = netdev_set_tc_queue(ndev, tc, count, offset);
3125 		if (err)
3126 			goto err_reset_tc;
3127 
3128 		for (q = offset; q < offset + count; q++) {
3129 			tx_ring = priv->tx_ring[q];
3130 			/* The prio_tc_map is skb_tx_hash()'s way of selecting
3131 			 * between TX queues based on skb->priority. As such,
3132 			 * there's nothing to offload based on it.
3133 			 * Make the mqprio "traffic class" be the priority of
3134 			 * this ring group, and leave the Tx IPV to traffic
3135 			 * class mapping as its default mapping value of 1:1.
3136 			 */
3137 			tx_ring->prio = tc;
3138 			enetc_set_bdr_prio(hw, tx_ring->index, tx_ring->prio);
3139 		}
3140 	}
3141 
3142 	err = netif_set_real_num_tx_queues(ndev, num_stack_tx_queues);
3143 	if (err)
3144 		goto err_reset_tc;
3145 
3146 	priv->min_num_stack_tx_queues = num_stack_tx_queues;
3147 
3148 	enetc_debug_tx_ring_prios(priv);
3149 
3150 	enetc_change_preemptible_tcs(priv, mqprio->preemptible_tcs);
3151 
3152 	return 0;
3153 
3154 err_reset_tc:
3155 	enetc_reset_tc_mqprio(ndev);
3156 	return err;
3157 }
3158 EXPORT_SYMBOL_GPL(enetc_setup_tc_mqprio);
3159 
enetc_reconfigure_xdp_cb(struct enetc_ndev_priv * priv,void * ctx)3160 static int enetc_reconfigure_xdp_cb(struct enetc_ndev_priv *priv, void *ctx)
3161 {
3162 	struct bpf_prog *old_prog, *prog = ctx;
3163 	int num_stack_tx_queues;
3164 	int err, i;
3165 
3166 	old_prog = xchg(&priv->xdp_prog, prog);
3167 
3168 	num_stack_tx_queues = enetc_num_stack_tx_queues(priv);
3169 	err = netif_set_real_num_tx_queues(priv->ndev, num_stack_tx_queues);
3170 	if (err) {
3171 		xchg(&priv->xdp_prog, old_prog);
3172 		return err;
3173 	}
3174 
3175 	if (old_prog)
3176 		bpf_prog_put(old_prog);
3177 
3178 	for (i = 0; i < priv->num_rx_rings; i++) {
3179 		struct enetc_bdr *rx_ring = priv->rx_ring[i];
3180 
3181 		rx_ring->xdp.prog = prog;
3182 
3183 		if (prog)
3184 			rx_ring->buffer_offset = XDP_PACKET_HEADROOM;
3185 		else
3186 			rx_ring->buffer_offset = ENETC_RXB_PAD;
3187 	}
3188 
3189 	return 0;
3190 }
3191 
enetc_setup_xdp_prog(struct net_device * ndev,struct bpf_prog * prog,struct netlink_ext_ack * extack)3192 static int enetc_setup_xdp_prog(struct net_device *ndev, struct bpf_prog *prog,
3193 				struct netlink_ext_ack *extack)
3194 {
3195 	int num_xdp_tx_queues = prog ? num_possible_cpus() : 0;
3196 	struct enetc_ndev_priv *priv = netdev_priv(ndev);
3197 	bool extended;
3198 
3199 	if (priv->min_num_stack_tx_queues + num_xdp_tx_queues >
3200 	    priv->num_tx_rings) {
3201 		NL_SET_ERR_MSG_FMT_MOD(extack,
3202 				       "Reserving %d XDP TXQs leaves under %d for stack (total %d)",
3203 				       num_xdp_tx_queues,
3204 				       priv->min_num_stack_tx_queues,
3205 				       priv->num_tx_rings);
3206 		return -EBUSY;
3207 	}
3208 
3209 	extended = !!(priv->active_offloads & ENETC_F_RX_TSTAMP);
3210 
3211 	/* The buffer layout is changing, so we need to drain the old
3212 	 * RX buffers and seed new ones.
3213 	 */
3214 	return enetc_reconfigure(priv, extended, enetc_reconfigure_xdp_cb, prog);
3215 }
3216 
enetc_setup_bpf(struct net_device * ndev,struct netdev_bpf * bpf)3217 int enetc_setup_bpf(struct net_device *ndev, struct netdev_bpf *bpf)
3218 {
3219 	switch (bpf->command) {
3220 	case XDP_SETUP_PROG:
3221 		return enetc_setup_xdp_prog(ndev, bpf->prog, bpf->extack);
3222 	default:
3223 		return -EINVAL;
3224 	}
3225 
3226 	return 0;
3227 }
3228 EXPORT_SYMBOL_GPL(enetc_setup_bpf);
3229 
enetc_get_stats(struct net_device * ndev)3230 struct net_device_stats *enetc_get_stats(struct net_device *ndev)
3231 {
3232 	struct enetc_ndev_priv *priv = netdev_priv(ndev);
3233 	struct net_device_stats *stats = &ndev->stats;
3234 	unsigned long packets = 0, bytes = 0;
3235 	unsigned long tx_dropped = 0;
3236 	int i;
3237 
3238 	for (i = 0; i < priv->num_rx_rings; i++) {
3239 		packets += priv->rx_ring[i]->stats.packets;
3240 		bytes	+= priv->rx_ring[i]->stats.bytes;
3241 	}
3242 
3243 	stats->rx_packets = packets;
3244 	stats->rx_bytes = bytes;
3245 	bytes = 0;
3246 	packets = 0;
3247 
3248 	for (i = 0; i < priv->num_tx_rings; i++) {
3249 		packets += priv->tx_ring[i]->stats.packets;
3250 		bytes	+= priv->tx_ring[i]->stats.bytes;
3251 		tx_dropped += priv->tx_ring[i]->stats.win_drop;
3252 	}
3253 
3254 	stats->tx_packets = packets;
3255 	stats->tx_bytes = bytes;
3256 	stats->tx_dropped = tx_dropped;
3257 
3258 	return stats;
3259 }
3260 EXPORT_SYMBOL_GPL(enetc_get_stats);
3261 
enetc_enable_rxvlan(struct net_device * ndev,bool en)3262 static void enetc_enable_rxvlan(struct net_device *ndev, bool en)
3263 {
3264 	struct enetc_ndev_priv *priv = netdev_priv(ndev);
3265 	struct enetc_hw *hw = &priv->si->hw;
3266 	int i;
3267 
3268 	for (i = 0; i < priv->num_rx_rings; i++)
3269 		enetc_bdr_enable_rxvlan(hw, i, en);
3270 }
3271 
enetc_enable_txvlan(struct net_device * ndev,bool en)3272 static void enetc_enable_txvlan(struct net_device *ndev, bool en)
3273 {
3274 	struct enetc_ndev_priv *priv = netdev_priv(ndev);
3275 	struct enetc_hw *hw = &priv->si->hw;
3276 	int i;
3277 
3278 	for (i = 0; i < priv->num_tx_rings; i++)
3279 		enetc_bdr_enable_txvlan(hw, i, en);
3280 }
3281 
enetc_set_features(struct net_device * ndev,netdev_features_t features)3282 void enetc_set_features(struct net_device *ndev, netdev_features_t features)
3283 {
3284 	netdev_features_t changed = ndev->features ^ features;
3285 
3286 	if (changed & NETIF_F_RXHASH)
3287 		enetc_set_rss(ndev, !!(features & NETIF_F_RXHASH));
3288 
3289 	if (changed & NETIF_F_HW_VLAN_CTAG_RX)
3290 		enetc_enable_rxvlan(ndev,
3291 				    !!(features & NETIF_F_HW_VLAN_CTAG_RX));
3292 
3293 	if (changed & NETIF_F_HW_VLAN_CTAG_TX)
3294 		enetc_enable_txvlan(ndev,
3295 				    !!(features & NETIF_F_HW_VLAN_CTAG_TX));
3296 }
3297 EXPORT_SYMBOL_GPL(enetc_set_features);
3298 
enetc_hwtstamp_set(struct net_device * ndev,struct kernel_hwtstamp_config * config,struct netlink_ext_ack * extack)3299 int enetc_hwtstamp_set(struct net_device *ndev,
3300 		       struct kernel_hwtstamp_config *config,
3301 		       struct netlink_ext_ack *extack)
3302 {
3303 	struct enetc_ndev_priv *priv = netdev_priv(ndev);
3304 	int err, new_offloads = priv->active_offloads;
3305 
3306 	if (!IS_ENABLED(CONFIG_FSL_ENETC_PTP_CLOCK))
3307 		return -EOPNOTSUPP;
3308 
3309 	switch (config->tx_type) {
3310 	case HWTSTAMP_TX_OFF:
3311 		new_offloads &= ~ENETC_F_TX_TSTAMP_MASK;
3312 		break;
3313 	case HWTSTAMP_TX_ON:
3314 		new_offloads &= ~ENETC_F_TX_TSTAMP_MASK;
3315 		new_offloads |= ENETC_F_TX_TSTAMP;
3316 		break;
3317 	case HWTSTAMP_TX_ONESTEP_SYNC:
3318 		if (!enetc_si_is_pf(priv->si))
3319 			return -EOPNOTSUPP;
3320 
3321 		new_offloads &= ~ENETC_F_TX_TSTAMP_MASK;
3322 		new_offloads |= ENETC_F_TX_ONESTEP_SYNC_TSTAMP;
3323 		break;
3324 	default:
3325 		return -ERANGE;
3326 	}
3327 
3328 	switch (config->rx_filter) {
3329 	case HWTSTAMP_FILTER_NONE:
3330 		new_offloads &= ~ENETC_F_RX_TSTAMP;
3331 		break;
3332 	default:
3333 		new_offloads |= ENETC_F_RX_TSTAMP;
3334 		config->rx_filter = HWTSTAMP_FILTER_ALL;
3335 	}
3336 
3337 	if ((new_offloads ^ priv->active_offloads) & ENETC_F_RX_TSTAMP) {
3338 		bool extended = !!(new_offloads & ENETC_F_RX_TSTAMP);
3339 
3340 		err = enetc_reconfigure(priv, extended, NULL, NULL);
3341 		if (err)
3342 			return err;
3343 	}
3344 
3345 	priv->active_offloads = new_offloads;
3346 
3347 	return 0;
3348 }
3349 EXPORT_SYMBOL_GPL(enetc_hwtstamp_set);
3350 
enetc_hwtstamp_get(struct net_device * ndev,struct kernel_hwtstamp_config * config)3351 int enetc_hwtstamp_get(struct net_device *ndev,
3352 		       struct kernel_hwtstamp_config *config)
3353 {
3354 	struct enetc_ndev_priv *priv = netdev_priv(ndev);
3355 
3356 	if (!IS_ENABLED(CONFIG_FSL_ENETC_PTP_CLOCK))
3357 		return -EOPNOTSUPP;
3358 
3359 	if (priv->active_offloads & ENETC_F_TX_ONESTEP_SYNC_TSTAMP)
3360 		config->tx_type = HWTSTAMP_TX_ONESTEP_SYNC;
3361 	else if (priv->active_offloads & ENETC_F_TX_TSTAMP)
3362 		config->tx_type = HWTSTAMP_TX_ON;
3363 	else
3364 		config->tx_type = HWTSTAMP_TX_OFF;
3365 
3366 	config->rx_filter = (priv->active_offloads & ENETC_F_RX_TSTAMP) ?
3367 			     HWTSTAMP_FILTER_ALL : HWTSTAMP_FILTER_NONE;
3368 
3369 	return 0;
3370 }
3371 EXPORT_SYMBOL_GPL(enetc_hwtstamp_get);
3372 
enetc_ioctl(struct net_device * ndev,struct ifreq * rq,int cmd)3373 int enetc_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd)
3374 {
3375 	struct enetc_ndev_priv *priv = netdev_priv(ndev);
3376 
3377 	if (!priv->phylink)
3378 		return -EOPNOTSUPP;
3379 
3380 	return phylink_mii_ioctl(priv->phylink, rq, cmd);
3381 }
3382 EXPORT_SYMBOL_GPL(enetc_ioctl);
3383 
enetc_int_vector_init(struct enetc_ndev_priv * priv,int i,int v_tx_rings)3384 static int enetc_int_vector_init(struct enetc_ndev_priv *priv, int i,
3385 				 int v_tx_rings)
3386 {
3387 	struct enetc_int_vector *v;
3388 	struct enetc_bdr *bdr;
3389 	int j, err;
3390 
3391 	v = kzalloc(struct_size(v, tx_ring, v_tx_rings), GFP_KERNEL);
3392 	if (!v)
3393 		return -ENOMEM;
3394 
3395 	priv->int_vector[i] = v;
3396 	bdr = &v->rx_ring;
3397 	bdr->index = i;
3398 	bdr->ndev = priv->ndev;
3399 	bdr->dev = priv->dev;
3400 	bdr->bd_count = priv->rx_bd_count;
3401 	bdr->buffer_offset = ENETC_RXB_PAD;
3402 	priv->rx_ring[i] = bdr;
3403 
3404 	err = __xdp_rxq_info_reg(&bdr->xdp.rxq, priv->ndev, i, 0,
3405 				 ENETC_RXB_DMA_SIZE_XDP);
3406 	if (err)
3407 		goto free_vector;
3408 
3409 	err = xdp_rxq_info_reg_mem_model(&bdr->xdp.rxq, MEM_TYPE_PAGE_SHARED,
3410 					 NULL);
3411 	if (err) {
3412 		xdp_rxq_info_unreg(&bdr->xdp.rxq);
3413 		goto free_vector;
3414 	}
3415 
3416 	/* init defaults for adaptive IC */
3417 	if (priv->ic_mode & ENETC_IC_RX_ADAPTIVE) {
3418 		v->rx_ictt = 0x1;
3419 		v->rx_dim_en = true;
3420 	}
3421 
3422 	INIT_WORK(&v->rx_dim.work, enetc_rx_dim_work);
3423 	netif_napi_add(priv->ndev, &v->napi, enetc_poll);
3424 	v->count_tx_rings = v_tx_rings;
3425 
3426 	for (j = 0; j < v_tx_rings; j++) {
3427 		int idx;
3428 
3429 		/* default tx ring mapping policy */
3430 		idx = priv->bdr_int_num * j + i;
3431 		__set_bit(idx, &v->tx_rings_map);
3432 		bdr = &v->tx_ring[j];
3433 		bdr->index = idx;
3434 		bdr->ndev = priv->ndev;
3435 		bdr->dev = priv->dev;
3436 		bdr->bd_count = priv->tx_bd_count;
3437 		priv->tx_ring[idx] = bdr;
3438 	}
3439 
3440 	return 0;
3441 
3442 free_vector:
3443 	priv->rx_ring[i] = NULL;
3444 	priv->int_vector[i] = NULL;
3445 	kfree(v);
3446 
3447 	return err;
3448 }
3449 
enetc_int_vector_destroy(struct enetc_ndev_priv * priv,int i)3450 static void enetc_int_vector_destroy(struct enetc_ndev_priv *priv, int i)
3451 {
3452 	struct enetc_int_vector *v = priv->int_vector[i];
3453 	struct enetc_bdr *rx_ring = &v->rx_ring;
3454 	int j, tx_ring_index;
3455 
3456 	xdp_rxq_info_unreg_mem_model(&rx_ring->xdp.rxq);
3457 	xdp_rxq_info_unreg(&rx_ring->xdp.rxq);
3458 	netif_napi_del(&v->napi);
3459 	cancel_work_sync(&v->rx_dim.work);
3460 
3461 	for (j = 0; j < v->count_tx_rings; j++) {
3462 		tx_ring_index = priv->bdr_int_num * j + i;
3463 		priv->tx_ring[tx_ring_index] = NULL;
3464 	}
3465 
3466 	priv->rx_ring[i] = NULL;
3467 	priv->int_vector[i] = NULL;
3468 	kfree(v);
3469 }
3470 
enetc_alloc_msix(struct enetc_ndev_priv * priv)3471 int enetc_alloc_msix(struct enetc_ndev_priv *priv)
3472 {
3473 	struct pci_dev *pdev = priv->si->pdev;
3474 	int v_tx_rings, v_remainder;
3475 	int num_stack_tx_queues;
3476 	int first_xdp_tx_ring;
3477 	int i, n, err, nvec;
3478 
3479 	nvec = ENETC_BDR_INT_BASE_IDX + priv->bdr_int_num;
3480 	/* allocate MSIX for both messaging and Rx/Tx interrupts */
3481 	n = pci_alloc_irq_vectors(pdev, nvec, nvec, PCI_IRQ_MSIX);
3482 
3483 	if (n < 0)
3484 		return n;
3485 
3486 	if (n != nvec)
3487 		return -EPERM;
3488 
3489 	/* # of tx rings per int vector */
3490 	v_tx_rings = priv->num_tx_rings / priv->bdr_int_num;
3491 	v_remainder = priv->num_tx_rings % priv->bdr_int_num;
3492 
3493 	for (i = 0; i < priv->bdr_int_num; i++) {
3494 		/* Distribute the remaining TX rings to the first v_remainder
3495 		 * interrupt vectors
3496 		 */
3497 		int num_tx_rings = i < v_remainder ? v_tx_rings + 1 : v_tx_rings;
3498 
3499 		err = enetc_int_vector_init(priv, i, num_tx_rings);
3500 		if (err)
3501 			goto fail;
3502 	}
3503 
3504 	num_stack_tx_queues = enetc_num_stack_tx_queues(priv);
3505 
3506 	err = netif_set_real_num_tx_queues(priv->ndev, num_stack_tx_queues);
3507 	if (err)
3508 		goto fail;
3509 
3510 	err = netif_set_real_num_rx_queues(priv->ndev, priv->num_rx_rings);
3511 	if (err)
3512 		goto fail;
3513 
3514 	priv->min_num_stack_tx_queues = num_possible_cpus();
3515 	first_xdp_tx_ring = priv->num_tx_rings - num_possible_cpus();
3516 	priv->xdp_tx_ring = &priv->tx_ring[first_xdp_tx_ring];
3517 
3518 	return 0;
3519 
3520 fail:
3521 	while (i--)
3522 		enetc_int_vector_destroy(priv, i);
3523 
3524 	pci_free_irq_vectors(pdev);
3525 
3526 	return err;
3527 }
3528 EXPORT_SYMBOL_GPL(enetc_alloc_msix);
3529 
enetc_free_msix(struct enetc_ndev_priv * priv)3530 void enetc_free_msix(struct enetc_ndev_priv *priv)
3531 {
3532 	int i;
3533 
3534 	for (i = 0; i < priv->bdr_int_num; i++)
3535 		enetc_int_vector_destroy(priv, i);
3536 
3537 	/* disable all MSIX for this device */
3538 	pci_free_irq_vectors(priv->si->pdev);
3539 }
3540 EXPORT_SYMBOL_GPL(enetc_free_msix);
3541 
enetc_kfree_si(struct enetc_si * si)3542 static void enetc_kfree_si(struct enetc_si *si)
3543 {
3544 	char *p = (char *)si - si->pad;
3545 
3546 	kfree(p);
3547 }
3548 
enetc_detect_errata(struct enetc_si * si)3549 static void enetc_detect_errata(struct enetc_si *si)
3550 {
3551 	if (si->pdev->revision == ENETC_REV1)
3552 		si->errata = ENETC_ERR_VLAN_ISOL | ENETC_ERR_UCMCSWP;
3553 }
3554 
enetc_pci_probe(struct pci_dev * pdev,const char * name,int sizeof_priv)3555 int enetc_pci_probe(struct pci_dev *pdev, const char *name, int sizeof_priv)
3556 {
3557 	struct enetc_si *si, *p;
3558 	struct enetc_hw *hw;
3559 	size_t alloc_size;
3560 	int err, len;
3561 
3562 	pcie_flr(pdev);
3563 	err = pci_enable_device_mem(pdev);
3564 	if (err)
3565 		return dev_err_probe(&pdev->dev, err, "device enable failed\n");
3566 
3567 	/* set up for high or low dma */
3568 	err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
3569 	if (err) {
3570 		dev_err(&pdev->dev, "DMA configuration failed: 0x%x\n", err);
3571 		goto err_dma;
3572 	}
3573 
3574 	err = pci_request_mem_regions(pdev, name);
3575 	if (err) {
3576 		dev_err(&pdev->dev, "pci_request_regions failed err=%d\n", err);
3577 		goto err_pci_mem_reg;
3578 	}
3579 
3580 	pci_set_master(pdev);
3581 
3582 	alloc_size = sizeof(struct enetc_si);
3583 	if (sizeof_priv) {
3584 		/* align priv to 32B */
3585 		alloc_size = ALIGN(alloc_size, ENETC_SI_ALIGN);
3586 		alloc_size += sizeof_priv;
3587 	}
3588 	/* force 32B alignment for enetc_si */
3589 	alloc_size += ENETC_SI_ALIGN - 1;
3590 
3591 	p = kzalloc(alloc_size, GFP_KERNEL);
3592 	if (!p) {
3593 		err = -ENOMEM;
3594 		goto err_alloc_si;
3595 	}
3596 
3597 	si = PTR_ALIGN(p, ENETC_SI_ALIGN);
3598 	si->pad = (char *)si - (char *)p;
3599 
3600 	pci_set_drvdata(pdev, si);
3601 	si->pdev = pdev;
3602 	hw = &si->hw;
3603 
3604 	len = pci_resource_len(pdev, ENETC_BAR_REGS);
3605 	hw->reg = ioremap(pci_resource_start(pdev, ENETC_BAR_REGS), len);
3606 	if (!hw->reg) {
3607 		err = -ENXIO;
3608 		dev_err(&pdev->dev, "ioremap() failed\n");
3609 		goto err_ioremap;
3610 	}
3611 	if (len > ENETC_PORT_BASE)
3612 		hw->port = hw->reg + ENETC_PORT_BASE;
3613 	if (len > ENETC_GLOBAL_BASE)
3614 		hw->global = hw->reg + ENETC_GLOBAL_BASE;
3615 
3616 	enetc_detect_errata(si);
3617 
3618 	return 0;
3619 
3620 err_ioremap:
3621 	enetc_kfree_si(si);
3622 err_alloc_si:
3623 	pci_release_mem_regions(pdev);
3624 err_pci_mem_reg:
3625 err_dma:
3626 	pci_disable_device(pdev);
3627 
3628 	return err;
3629 }
3630 EXPORT_SYMBOL_GPL(enetc_pci_probe);
3631 
enetc_pci_remove(struct pci_dev * pdev)3632 void enetc_pci_remove(struct pci_dev *pdev)
3633 {
3634 	struct enetc_si *si = pci_get_drvdata(pdev);
3635 	struct enetc_hw *hw = &si->hw;
3636 
3637 	iounmap(hw->reg);
3638 	enetc_kfree_si(si);
3639 	pci_release_mem_regions(pdev);
3640 	pci_disable_device(pdev);
3641 }
3642 EXPORT_SYMBOL_GPL(enetc_pci_remove);
3643 
3644 static const struct enetc_drvdata enetc_pf_data = {
3645 	.sysclk_freq = ENETC_CLK_400M,
3646 	.pmac_offset = ENETC_PMAC_OFFSET,
3647 	.max_frags = ENETC_MAX_SKB_FRAGS,
3648 	.eth_ops = &enetc_pf_ethtool_ops,
3649 };
3650 
3651 static const struct enetc_drvdata enetc4_pf_data = {
3652 	.sysclk_freq = ENETC_CLK_333M,
3653 	.tx_csum = true,
3654 	.max_frags = ENETC4_MAX_SKB_FRAGS,
3655 	.pmac_offset = ENETC4_PMAC_OFFSET,
3656 	.eth_ops = &enetc4_pf_ethtool_ops,
3657 };
3658 
3659 static const struct enetc_drvdata enetc_vf_data = {
3660 	.sysclk_freq = ENETC_CLK_400M,
3661 	.max_frags = ENETC_MAX_SKB_FRAGS,
3662 	.eth_ops = &enetc_vf_ethtool_ops,
3663 };
3664 
3665 static const struct enetc_platform_info enetc_info[] = {
3666 	{ .revision = ENETC_REV_1_0,
3667 	  .dev_id = ENETC_DEV_ID_PF,
3668 	  .data = &enetc_pf_data,
3669 	},
3670 	{ .revision = ENETC_REV_4_1,
3671 	  .dev_id = NXP_ENETC_PF_DEV_ID,
3672 	  .data = &enetc4_pf_data,
3673 	},
3674 	{ .revision = ENETC_REV_1_0,
3675 	  .dev_id = ENETC_DEV_ID_VF,
3676 	  .data = &enetc_vf_data,
3677 	},
3678 };
3679 
enetc_get_driver_data(struct enetc_si * si)3680 int enetc_get_driver_data(struct enetc_si *si)
3681 {
3682 	u16 dev_id = si->pdev->device;
3683 	int i;
3684 
3685 	for (i = 0; i < ARRAY_SIZE(enetc_info); i++) {
3686 		if (si->revision == enetc_info[i].revision &&
3687 		    dev_id == enetc_info[i].dev_id) {
3688 			si->drvdata = enetc_info[i].data;
3689 
3690 			return 0;
3691 		}
3692 	}
3693 
3694 	return -ERANGE;
3695 }
3696 EXPORT_SYMBOL_GPL(enetc_get_driver_data);
3697 
3698 MODULE_DESCRIPTION("NXP ENETC Ethernet driver");
3699 MODULE_LICENSE("Dual BSD/GPL");
3700