1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * Copyright (C) 2003 - 2009 NetXen, Inc.
4 * Copyright (C) 2009 - QLogic Corporation.
5 * All rights reserved.
6 */
7
8 #include <linux/netdevice.h>
9 #include <linux/delay.h>
10 #include <linux/slab.h>
11 #include <linux/if_vlan.h>
12 #include <net/checksum.h>
13 #include "netxen_nic.h"
14 #include "netxen_nic_hw.h"
15
16 struct crb_addr_pair {
17 u32 addr;
18 u32 data;
19 };
20
21 #define NETXEN_MAX_CRB_XFORM 60
22 static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM];
23 #define NETXEN_ADDR_ERROR (0xffffffff)
24
25 #define crb_addr_transform(name) \
26 crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \
27 NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20
28
29 #define NETXEN_NIC_XDMA_RESET 0x8000ff
30
31 static void
32 netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
33 struct nx_host_rds_ring *rds_ring);
34 static int netxen_p3_has_mn(struct netxen_adapter *adapter);
35
crb_addr_transform_setup(void)36 static void crb_addr_transform_setup(void)
37 {
38 crb_addr_transform(XDMA);
39 crb_addr_transform(TIMR);
40 crb_addr_transform(SRE);
41 crb_addr_transform(SQN3);
42 crb_addr_transform(SQN2);
43 crb_addr_transform(SQN1);
44 crb_addr_transform(SQN0);
45 crb_addr_transform(SQS3);
46 crb_addr_transform(SQS2);
47 crb_addr_transform(SQS1);
48 crb_addr_transform(SQS0);
49 crb_addr_transform(RPMX7);
50 crb_addr_transform(RPMX6);
51 crb_addr_transform(RPMX5);
52 crb_addr_transform(RPMX4);
53 crb_addr_transform(RPMX3);
54 crb_addr_transform(RPMX2);
55 crb_addr_transform(RPMX1);
56 crb_addr_transform(RPMX0);
57 crb_addr_transform(ROMUSB);
58 crb_addr_transform(SN);
59 crb_addr_transform(QMN);
60 crb_addr_transform(QMS);
61 crb_addr_transform(PGNI);
62 crb_addr_transform(PGND);
63 crb_addr_transform(PGN3);
64 crb_addr_transform(PGN2);
65 crb_addr_transform(PGN1);
66 crb_addr_transform(PGN0);
67 crb_addr_transform(PGSI);
68 crb_addr_transform(PGSD);
69 crb_addr_transform(PGS3);
70 crb_addr_transform(PGS2);
71 crb_addr_transform(PGS1);
72 crb_addr_transform(PGS0);
73 crb_addr_transform(PS);
74 crb_addr_transform(PH);
75 crb_addr_transform(NIU);
76 crb_addr_transform(I2Q);
77 crb_addr_transform(EG);
78 crb_addr_transform(MN);
79 crb_addr_transform(MS);
80 crb_addr_transform(CAS2);
81 crb_addr_transform(CAS1);
82 crb_addr_transform(CAS0);
83 crb_addr_transform(CAM);
84 crb_addr_transform(C2C1);
85 crb_addr_transform(C2C0);
86 crb_addr_transform(SMB);
87 crb_addr_transform(OCM0);
88 crb_addr_transform(I2C0);
89 }
90
netxen_release_rx_buffers(struct netxen_adapter * adapter)91 void netxen_release_rx_buffers(struct netxen_adapter *adapter)
92 {
93 struct netxen_recv_context *recv_ctx;
94 struct nx_host_rds_ring *rds_ring;
95 struct netxen_rx_buffer *rx_buf;
96 int i, ring;
97
98 recv_ctx = &adapter->recv_ctx;
99 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
100 rds_ring = &recv_ctx->rds_rings[ring];
101 for (i = 0; i < rds_ring->num_desc; ++i) {
102 rx_buf = &(rds_ring->rx_buf_arr[i]);
103 if (rx_buf->state == NETXEN_BUFFER_FREE)
104 continue;
105 dma_unmap_single(&adapter->pdev->dev, rx_buf->dma,
106 rds_ring->dma_size, DMA_FROM_DEVICE);
107 if (rx_buf->skb != NULL)
108 dev_kfree_skb_any(rx_buf->skb);
109 }
110 }
111 }
112
netxen_release_tx_buffers(struct netxen_adapter * adapter)113 void netxen_release_tx_buffers(struct netxen_adapter *adapter)
114 {
115 struct netxen_cmd_buffer *cmd_buf;
116 struct netxen_skb_frag *buffrag;
117 int i, j;
118 struct nx_host_tx_ring *tx_ring = adapter->tx_ring;
119
120 spin_lock_bh(&adapter->tx_clean_lock);
121 cmd_buf = tx_ring->cmd_buf_arr;
122 for (i = 0; i < tx_ring->num_desc; i++) {
123 buffrag = cmd_buf->frag_array;
124 if (buffrag->dma) {
125 dma_unmap_single(&adapter->pdev->dev, buffrag->dma,
126 buffrag->length, DMA_TO_DEVICE);
127 buffrag->dma = 0ULL;
128 }
129 for (j = 1; j < cmd_buf->frag_count; j++) {
130 buffrag++;
131 if (buffrag->dma) {
132 dma_unmap_page(&adapter->pdev->dev,
133 buffrag->dma, buffrag->length,
134 DMA_TO_DEVICE);
135 buffrag->dma = 0ULL;
136 }
137 }
138 if (cmd_buf->skb) {
139 dev_kfree_skb_any(cmd_buf->skb);
140 cmd_buf->skb = NULL;
141 }
142 cmd_buf++;
143 }
144 spin_unlock_bh(&adapter->tx_clean_lock);
145 }
146
netxen_free_sw_resources(struct netxen_adapter * adapter)147 void netxen_free_sw_resources(struct netxen_adapter *adapter)
148 {
149 struct netxen_recv_context *recv_ctx;
150 struct nx_host_rds_ring *rds_ring;
151 struct nx_host_tx_ring *tx_ring;
152 int ring;
153
154 recv_ctx = &adapter->recv_ctx;
155
156 if (recv_ctx->rds_rings == NULL)
157 goto skip_rds;
158
159 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
160 rds_ring = &recv_ctx->rds_rings[ring];
161 vfree(rds_ring->rx_buf_arr);
162 rds_ring->rx_buf_arr = NULL;
163 }
164 kfree(recv_ctx->rds_rings);
165
166 skip_rds:
167 if (adapter->tx_ring == NULL)
168 return;
169
170 tx_ring = adapter->tx_ring;
171 vfree(tx_ring->cmd_buf_arr);
172 kfree(tx_ring);
173 adapter->tx_ring = NULL;
174 }
175
netxen_alloc_sw_resources(struct netxen_adapter * adapter)176 int netxen_alloc_sw_resources(struct netxen_adapter *adapter)
177 {
178 struct netxen_recv_context *recv_ctx;
179 struct nx_host_rds_ring *rds_ring;
180 struct nx_host_sds_ring *sds_ring;
181 struct nx_host_tx_ring *tx_ring;
182 struct netxen_rx_buffer *rx_buf;
183 int ring, i;
184
185 struct netxen_cmd_buffer *cmd_buf_arr;
186 struct net_device *netdev = adapter->netdev;
187
188 tx_ring = kzalloc_obj(struct nx_host_tx_ring);
189 if (tx_ring == NULL)
190 return -ENOMEM;
191
192 adapter->tx_ring = tx_ring;
193
194 tx_ring->num_desc = adapter->num_txd;
195 tx_ring->txq = netdev_get_tx_queue(netdev, 0);
196
197 cmd_buf_arr = vzalloc(TX_BUFF_RINGSIZE(tx_ring));
198 if (cmd_buf_arr == NULL)
199 goto err_out;
200
201 tx_ring->cmd_buf_arr = cmd_buf_arr;
202
203 recv_ctx = &adapter->recv_ctx;
204
205 rds_ring = kzalloc_objs(struct nx_host_rds_ring, adapter->max_rds_rings);
206 if (rds_ring == NULL)
207 goto err_out;
208
209 recv_ctx->rds_rings = rds_ring;
210
211 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
212 rds_ring = &recv_ctx->rds_rings[ring];
213 switch (ring) {
214 case RCV_RING_NORMAL:
215 rds_ring->num_desc = adapter->num_rxd;
216 if (adapter->ahw.cut_through) {
217 rds_ring->dma_size =
218 NX_CT_DEFAULT_RX_BUF_LEN;
219 rds_ring->skb_size =
220 NX_CT_DEFAULT_RX_BUF_LEN;
221 } else {
222 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
223 rds_ring->dma_size =
224 NX_P3_RX_BUF_MAX_LEN;
225 else
226 rds_ring->dma_size =
227 NX_P2_RX_BUF_MAX_LEN;
228 rds_ring->skb_size =
229 rds_ring->dma_size + NET_IP_ALIGN;
230 }
231 break;
232
233 case RCV_RING_JUMBO:
234 rds_ring->num_desc = adapter->num_jumbo_rxd;
235 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
236 rds_ring->dma_size =
237 NX_P3_RX_JUMBO_BUF_MAX_LEN;
238 else
239 rds_ring->dma_size =
240 NX_P2_RX_JUMBO_BUF_MAX_LEN;
241
242 if (adapter->capabilities & NX_CAP0_HW_LRO)
243 rds_ring->dma_size += NX_LRO_BUFFER_EXTRA;
244
245 rds_ring->skb_size =
246 rds_ring->dma_size + NET_IP_ALIGN;
247 break;
248
249 case RCV_RING_LRO:
250 rds_ring->num_desc = adapter->num_lro_rxd;
251 rds_ring->dma_size = NX_RX_LRO_BUFFER_LENGTH;
252 rds_ring->skb_size = rds_ring->dma_size + NET_IP_ALIGN;
253 break;
254
255 }
256 rds_ring->rx_buf_arr = vzalloc(RCV_BUFF_RINGSIZE(rds_ring));
257 if (rds_ring->rx_buf_arr == NULL)
258 /* free whatever was already allocated */
259 goto err_out;
260
261 INIT_LIST_HEAD(&rds_ring->free_list);
262 /*
263 * Now go through all of them, set reference handles
264 * and put them in the queues.
265 */
266 rx_buf = rds_ring->rx_buf_arr;
267 for (i = 0; i < rds_ring->num_desc; i++) {
268 list_add_tail(&rx_buf->list,
269 &rds_ring->free_list);
270 rx_buf->ref_handle = i;
271 rx_buf->state = NETXEN_BUFFER_FREE;
272 rx_buf++;
273 }
274 spin_lock_init(&rds_ring->lock);
275 }
276
277 for (ring = 0; ring < adapter->max_sds_rings; ring++) {
278 sds_ring = &recv_ctx->sds_rings[ring];
279 sds_ring->irq = adapter->msix_entries[ring].vector;
280 sds_ring->adapter = adapter;
281 sds_ring->num_desc = adapter->num_rxd;
282
283 for (i = 0; i < NUM_RCV_DESC_RINGS; i++)
284 INIT_LIST_HEAD(&sds_ring->free_list[i]);
285 }
286
287 return 0;
288
289 err_out:
290 netxen_free_sw_resources(adapter);
291 return -ENOMEM;
292 }
293
294 /*
295 * netxen_decode_crb_addr(0 - utility to translate from internal Phantom CRB
296 * address to external PCI CRB address.
297 */
netxen_decode_crb_addr(u32 addr)298 static u32 netxen_decode_crb_addr(u32 addr)
299 {
300 int i;
301 u32 base_addr, offset, pci_base;
302
303 crb_addr_transform_setup();
304
305 pci_base = NETXEN_ADDR_ERROR;
306 base_addr = addr & 0xfff00000;
307 offset = addr & 0x000fffff;
308
309 for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) {
310 if (crb_addr_xform[i] == base_addr) {
311 pci_base = i << 20;
312 break;
313 }
314 }
315 if (pci_base == NETXEN_ADDR_ERROR)
316 return pci_base;
317 else
318 return pci_base + offset;
319 }
320
321 #define NETXEN_MAX_ROM_WAIT_USEC 100
322
netxen_wait_rom_done(struct netxen_adapter * adapter)323 static int netxen_wait_rom_done(struct netxen_adapter *adapter)
324 {
325 long timeout = 0;
326 long done = 0;
327
328 cond_resched();
329
330 while (done == 0) {
331 done = NXRD32(adapter, NETXEN_ROMUSB_GLB_STATUS);
332 done &= 2;
333 if (++timeout >= NETXEN_MAX_ROM_WAIT_USEC) {
334 dev_err(&adapter->pdev->dev,
335 "Timeout reached waiting for rom done");
336 return -EIO;
337 }
338 udelay(1);
339 }
340 return 0;
341 }
342
do_rom_fast_read(struct netxen_adapter * adapter,int addr,int * valp)343 static int do_rom_fast_read(struct netxen_adapter *adapter,
344 int addr, int *valp)
345 {
346 NXWR32(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
347 NXWR32(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
348 NXWR32(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
349 NXWR32(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb);
350 if (netxen_wait_rom_done(adapter)) {
351 printk("Error waiting for rom done\n");
352 return -EIO;
353 }
354 /* reset abyte_cnt and dummy_byte_cnt */
355 NXWR32(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
356 udelay(10);
357 NXWR32(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
358
359 *valp = NXRD32(adapter, NETXEN_ROMUSB_ROM_RDATA);
360 return 0;
361 }
362
do_rom_fast_read_words(struct netxen_adapter * adapter,int addr,u8 * bytes,size_t size)363 static int do_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
364 u8 *bytes, size_t size)
365 {
366 int addridx;
367 int ret = 0;
368
369 for (addridx = addr; addridx < (addr + size); addridx += 4) {
370 int v;
371 ret = do_rom_fast_read(adapter, addridx, &v);
372 if (ret != 0)
373 break;
374 *(__le32 *)bytes = cpu_to_le32(v);
375 bytes += 4;
376 }
377
378 return ret;
379 }
380
381 int
netxen_rom_fast_read_words(struct netxen_adapter * adapter,int addr,u8 * bytes,size_t size)382 netxen_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
383 u8 *bytes, size_t size)
384 {
385 int ret;
386
387 ret = netxen_rom_lock(adapter);
388 if (ret < 0)
389 return ret;
390
391 ret = do_rom_fast_read_words(adapter, addr, bytes, size);
392
393 netxen_rom_unlock(adapter);
394 return ret;
395 }
396
netxen_rom_fast_read(struct netxen_adapter * adapter,int addr,int * valp)397 int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
398 {
399 int ret;
400
401 if (netxen_rom_lock(adapter) != 0)
402 return -EIO;
403
404 ret = do_rom_fast_read(adapter, addr, valp);
405 netxen_rom_unlock(adapter);
406 return ret;
407 }
408
409 #define NETXEN_BOARDTYPE 0x4008
410 #define NETXEN_BOARDNUM 0x400c
411 #define NETXEN_CHIPNUM 0x4010
412
netxen_pinit_from_rom(struct netxen_adapter * adapter)413 int netxen_pinit_from_rom(struct netxen_adapter *adapter)
414 {
415 int addr, val;
416 int i, n, init_delay = 0;
417 struct crb_addr_pair *buf;
418 unsigned offset;
419 u32 off;
420
421 /* resetall */
422 netxen_rom_lock(adapter);
423 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0xfeffffff);
424 netxen_rom_unlock(adapter);
425
426 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
427 if (netxen_rom_fast_read(adapter, 0, &n) != 0 ||
428 (n != 0xcafecafe) ||
429 netxen_rom_fast_read(adapter, 4, &n) != 0) {
430 printk(KERN_ERR "%s: ERROR Reading crb_init area: "
431 "n: %08x\n", netxen_nic_driver_name, n);
432 return -EIO;
433 }
434 offset = n & 0xffffU;
435 n = (n >> 16) & 0xffffU;
436 } else {
437 if (netxen_rom_fast_read(adapter, 0, &n) != 0 ||
438 !(n & 0x80000000)) {
439 printk(KERN_ERR "%s: ERROR Reading crb_init area: "
440 "n: %08x\n", netxen_nic_driver_name, n);
441 return -EIO;
442 }
443 offset = 1;
444 n &= ~0x80000000;
445 }
446
447 if (n >= 1024) {
448 printk(KERN_ERR "%s:n=0x%x Error! NetXen card flash not"
449 " initialized.\n", __func__, n);
450 return -EIO;
451 }
452
453 buf = kzalloc_objs(struct crb_addr_pair, n);
454 if (buf == NULL)
455 return -ENOMEM;
456
457 for (i = 0; i < n; i++) {
458 if (netxen_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 ||
459 netxen_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0) {
460 kfree(buf);
461 return -EIO;
462 }
463
464 buf[i].addr = addr;
465 buf[i].data = val;
466
467 }
468
469 for (i = 0; i < n; i++) {
470
471 off = netxen_decode_crb_addr(buf[i].addr);
472 if (off == NETXEN_ADDR_ERROR) {
473 printk(KERN_ERR"CRB init value out of range %x\n",
474 buf[i].addr);
475 continue;
476 }
477 off += NETXEN_PCI_CRBSPACE;
478
479 if (off & 1)
480 continue;
481
482 /* skipping cold reboot MAGIC */
483 if (off == NETXEN_CAM_RAM(0x1fc))
484 continue;
485
486 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
487 if (off == (NETXEN_CRB_I2C0 + 0x1c))
488 continue;
489 /* do not reset PCI */
490 if (off == (ROMUSB_GLB + 0xbc))
491 continue;
492 if (off == (ROMUSB_GLB + 0xa8))
493 continue;
494 if (off == (ROMUSB_GLB + 0xc8)) /* core clock */
495 continue;
496 if (off == (ROMUSB_GLB + 0x24)) /* MN clock */
497 continue;
498 if (off == (ROMUSB_GLB + 0x1c)) /* MS clock */
499 continue;
500 if ((off & 0x0ff00000) == NETXEN_CRB_DDR_NET)
501 continue;
502 if (off == (NETXEN_CRB_PEG_NET_1 + 0x18) &&
503 !NX_IS_REVISION_P3P(adapter->ahw.revision_id))
504 buf[i].data = 0x1020;
505 /* skip the function enable register */
506 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION))
507 continue;
508 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION2))
509 continue;
510 if ((off & 0x0ff00000) == NETXEN_CRB_SMB)
511 continue;
512 }
513
514 init_delay = 1;
515 /* After writing this register, HW needs time for CRB */
516 /* to quiet down (else crb_window returns 0xffffffff) */
517 if (off == NETXEN_ROMUSB_GLB_SW_RESET) {
518 init_delay = 1000;
519 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
520 /* hold xdma in reset also */
521 buf[i].data = NETXEN_NIC_XDMA_RESET;
522 buf[i].data = 0x8000ff;
523 }
524 }
525
526 NXWR32(adapter, off, buf[i].data);
527
528 msleep(init_delay);
529 }
530 kfree(buf);
531
532 /* disable_peg_cache_all */
533
534 /* unreset_net_cache */
535 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
536 val = NXRD32(adapter, NETXEN_ROMUSB_GLB_SW_RESET);
537 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, (val & 0xffffff0f));
538 }
539
540 /* p2dn replyCount */
541 NXWR32(adapter, NETXEN_CRB_PEG_NET_D + 0xec, 0x1e);
542 /* disable_peg_cache 0 */
543 NXWR32(adapter, NETXEN_CRB_PEG_NET_D + 0x4c, 8);
544 /* disable_peg_cache 1 */
545 NXWR32(adapter, NETXEN_CRB_PEG_NET_I + 0x4c, 8);
546
547 /* peg_clr_all */
548
549 /* peg_clr 0 */
550 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0x8, 0);
551 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0xc, 0);
552 /* peg_clr 1 */
553 NXWR32(adapter, NETXEN_CRB_PEG_NET_1 + 0x8, 0);
554 NXWR32(adapter, NETXEN_CRB_PEG_NET_1 + 0xc, 0);
555 /* peg_clr 2 */
556 NXWR32(adapter, NETXEN_CRB_PEG_NET_2 + 0x8, 0);
557 NXWR32(adapter, NETXEN_CRB_PEG_NET_2 + 0xc, 0);
558 /* peg_clr 3 */
559 NXWR32(adapter, NETXEN_CRB_PEG_NET_3 + 0x8, 0);
560 NXWR32(adapter, NETXEN_CRB_PEG_NET_3 + 0xc, 0);
561 return 0;
562 }
563
nx_get_table_desc(const u8 * unirom,int section)564 static struct uni_table_desc *nx_get_table_desc(const u8 *unirom, int section)
565 {
566 uint32_t i;
567 struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
568 __le32 entries = cpu_to_le32(directory->num_entries);
569
570 for (i = 0; i < entries; i++) {
571
572 __le32 offs = cpu_to_le32(directory->findex) +
573 (i * cpu_to_le32(directory->entry_size));
574 __le32 tab_type = cpu_to_le32(*((u32 *)&unirom[offs] + 8));
575
576 if (tab_type == section)
577 return (struct uni_table_desc *) &unirom[offs];
578 }
579
580 return NULL;
581 }
582
583 #define QLCNIC_FILEHEADER_SIZE (14 * 4)
584
585 static int
netxen_nic_validate_header(struct netxen_adapter * adapter)586 netxen_nic_validate_header(struct netxen_adapter *adapter)
587 {
588 const u8 *unirom = adapter->fw->data;
589 struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
590 u32 fw_file_size = adapter->fw->size;
591 u32 tab_size;
592 __le32 entries;
593 __le32 entry_size;
594
595 if (fw_file_size < QLCNIC_FILEHEADER_SIZE)
596 return -EINVAL;
597
598 entries = cpu_to_le32(directory->num_entries);
599 entry_size = cpu_to_le32(directory->entry_size);
600 tab_size = cpu_to_le32(directory->findex) + (entries * entry_size);
601
602 if (fw_file_size < tab_size)
603 return -EINVAL;
604
605 return 0;
606 }
607
608 static int
netxen_nic_validate_bootld(struct netxen_adapter * adapter)609 netxen_nic_validate_bootld(struct netxen_adapter *adapter)
610 {
611 struct uni_table_desc *tab_desc;
612 struct uni_data_desc *descr;
613 const u8 *unirom = adapter->fw->data;
614 __le32 idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] +
615 NX_UNI_BOOTLD_IDX_OFF));
616 u32 offs;
617 u32 tab_size;
618 u32 data_size;
619
620 tab_desc = nx_get_table_desc(unirom, NX_UNI_DIR_SECT_BOOTLD);
621
622 if (!tab_desc)
623 return -EINVAL;
624
625 tab_size = cpu_to_le32(tab_desc->findex) +
626 (cpu_to_le32(tab_desc->entry_size) * (idx + 1));
627
628 if (adapter->fw->size < tab_size)
629 return -EINVAL;
630
631 offs = cpu_to_le32(tab_desc->findex) +
632 (cpu_to_le32(tab_desc->entry_size) * (idx));
633 descr = (struct uni_data_desc *)&unirom[offs];
634
635 data_size = cpu_to_le32(descr->findex) + cpu_to_le32(descr->size);
636
637 if (adapter->fw->size < data_size)
638 return -EINVAL;
639
640 return 0;
641 }
642
643 static int
netxen_nic_validate_fw(struct netxen_adapter * adapter)644 netxen_nic_validate_fw(struct netxen_adapter *adapter)
645 {
646 struct uni_table_desc *tab_desc;
647 struct uni_data_desc *descr;
648 const u8 *unirom = adapter->fw->data;
649 __le32 idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] +
650 NX_UNI_FIRMWARE_IDX_OFF));
651 u32 offs;
652 u32 tab_size;
653 u32 data_size;
654
655 tab_desc = nx_get_table_desc(unirom, NX_UNI_DIR_SECT_FW);
656
657 if (!tab_desc)
658 return -EINVAL;
659
660 tab_size = cpu_to_le32(tab_desc->findex) +
661 (cpu_to_le32(tab_desc->entry_size) * (idx + 1));
662
663 if (adapter->fw->size < tab_size)
664 return -EINVAL;
665
666 offs = cpu_to_le32(tab_desc->findex) +
667 (cpu_to_le32(tab_desc->entry_size) * (idx));
668 descr = (struct uni_data_desc *)&unirom[offs];
669 data_size = cpu_to_le32(descr->findex) + cpu_to_le32(descr->size);
670
671 if (adapter->fw->size < data_size)
672 return -EINVAL;
673
674 return 0;
675 }
676
677
678 static int
netxen_nic_validate_product_offs(struct netxen_adapter * adapter)679 netxen_nic_validate_product_offs(struct netxen_adapter *adapter)
680 {
681 struct uni_table_desc *ptab_descr;
682 const u8 *unirom = adapter->fw->data;
683 int mn_present = (NX_IS_REVISION_P2(adapter->ahw.revision_id)) ?
684 1 : netxen_p3_has_mn(adapter);
685 __le32 entries;
686 __le32 entry_size;
687 u32 tab_size;
688 u32 i;
689
690 ptab_descr = nx_get_table_desc(unirom, NX_UNI_DIR_SECT_PRODUCT_TBL);
691 if (ptab_descr == NULL)
692 return -EINVAL;
693
694 entries = cpu_to_le32(ptab_descr->num_entries);
695 entry_size = cpu_to_le32(ptab_descr->entry_size);
696 tab_size = cpu_to_le32(ptab_descr->findex) + (entries * entry_size);
697
698 if (adapter->fw->size < tab_size)
699 return -EINVAL;
700
701 nomn:
702 for (i = 0; i < entries; i++) {
703
704 __le32 flags, file_chiprev, offs;
705 u8 chiprev = adapter->ahw.revision_id;
706 uint32_t flagbit;
707
708 offs = cpu_to_le32(ptab_descr->findex) +
709 (i * cpu_to_le32(ptab_descr->entry_size));
710 flags = cpu_to_le32(*((int *)&unirom[offs] + NX_UNI_FLAGS_OFF));
711 file_chiprev = cpu_to_le32(*((int *)&unirom[offs] +
712 NX_UNI_CHIP_REV_OFF));
713
714 flagbit = mn_present ? 1 : 2;
715
716 if ((chiprev == file_chiprev) &&
717 ((1ULL << flagbit) & flags)) {
718 adapter->file_prd_off = offs;
719 return 0;
720 }
721 }
722
723 if (mn_present && NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
724 mn_present = 0;
725 goto nomn;
726 }
727
728 return -EINVAL;
729 }
730
731 static int
netxen_nic_validate_unified_romimage(struct netxen_adapter * adapter)732 netxen_nic_validate_unified_romimage(struct netxen_adapter *adapter)
733 {
734 if (netxen_nic_validate_header(adapter)) {
735 dev_err(&adapter->pdev->dev,
736 "unified image: header validation failed\n");
737 return -EINVAL;
738 }
739
740 if (netxen_nic_validate_product_offs(adapter)) {
741 dev_err(&adapter->pdev->dev,
742 "unified image: product validation failed\n");
743 return -EINVAL;
744 }
745
746 if (netxen_nic_validate_bootld(adapter)) {
747 dev_err(&adapter->pdev->dev,
748 "unified image: bootld validation failed\n");
749 return -EINVAL;
750 }
751
752 if (netxen_nic_validate_fw(adapter)) {
753 dev_err(&adapter->pdev->dev,
754 "unified image: firmware validation failed\n");
755 return -EINVAL;
756 }
757
758 return 0;
759 }
760
nx_get_data_desc(struct netxen_adapter * adapter,u32 section,u32 idx_offset)761 static struct uni_data_desc *nx_get_data_desc(struct netxen_adapter *adapter,
762 u32 section, u32 idx_offset)
763 {
764 const u8 *unirom = adapter->fw->data;
765 int idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] +
766 idx_offset));
767 struct uni_table_desc *tab_desc;
768 __le32 offs;
769
770 tab_desc = nx_get_table_desc(unirom, section);
771
772 if (tab_desc == NULL)
773 return NULL;
774
775 offs = cpu_to_le32(tab_desc->findex) +
776 (cpu_to_le32(tab_desc->entry_size) * idx);
777
778 return (struct uni_data_desc *)&unirom[offs];
779 }
780
781 static u8 *
nx_get_bootld_offs(struct netxen_adapter * adapter)782 nx_get_bootld_offs(struct netxen_adapter *adapter)
783 {
784 u32 offs = NETXEN_BOOTLD_START;
785
786 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE)
787 offs = cpu_to_le32((nx_get_data_desc(adapter,
788 NX_UNI_DIR_SECT_BOOTLD,
789 NX_UNI_BOOTLD_IDX_OFF))->findex);
790
791 return (u8 *)&adapter->fw->data[offs];
792 }
793
794 static u8 *
nx_get_fw_offs(struct netxen_adapter * adapter)795 nx_get_fw_offs(struct netxen_adapter *adapter)
796 {
797 u32 offs = NETXEN_IMAGE_START;
798
799 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE)
800 offs = cpu_to_le32((nx_get_data_desc(adapter,
801 NX_UNI_DIR_SECT_FW,
802 NX_UNI_FIRMWARE_IDX_OFF))->findex);
803
804 return (u8 *)&adapter->fw->data[offs];
805 }
806
807 static __le32
nx_get_fw_size(struct netxen_adapter * adapter)808 nx_get_fw_size(struct netxen_adapter *adapter)
809 {
810 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE)
811 return cpu_to_le32((nx_get_data_desc(adapter,
812 NX_UNI_DIR_SECT_FW,
813 NX_UNI_FIRMWARE_IDX_OFF))->size);
814 else
815 return cpu_to_le32(
816 *(u32 *)&adapter->fw->data[NX_FW_SIZE_OFFSET]);
817 }
818
819 static __le32
nx_get_fw_version(struct netxen_adapter * adapter)820 nx_get_fw_version(struct netxen_adapter *adapter)
821 {
822 struct uni_data_desc *fw_data_desc;
823 const struct firmware *fw = adapter->fw;
824 __le32 major, minor, sub;
825 const u8 *ver_str;
826 int i, ret = 0;
827
828 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE) {
829
830 fw_data_desc = nx_get_data_desc(adapter,
831 NX_UNI_DIR_SECT_FW, NX_UNI_FIRMWARE_IDX_OFF);
832 ver_str = fw->data + cpu_to_le32(fw_data_desc->findex) +
833 cpu_to_le32(fw_data_desc->size) - 17;
834
835 for (i = 0; i < 12; i++) {
836 if (!strncmp(&ver_str[i], "REV=", 4)) {
837 ret = sscanf(&ver_str[i+4], "%u.%u.%u ",
838 &major, &minor, &sub);
839 break;
840 }
841 }
842
843 if (ret != 3)
844 return 0;
845
846 return major + (minor << 8) + (sub << 16);
847
848 } else
849 return cpu_to_le32(*(u32 *)&fw->data[NX_FW_VERSION_OFFSET]);
850 }
851
852 static __le32
nx_get_bios_version(struct netxen_adapter * adapter)853 nx_get_bios_version(struct netxen_adapter *adapter)
854 {
855 const struct firmware *fw = adapter->fw;
856 __le32 bios_ver, prd_off = adapter->file_prd_off;
857
858 if (adapter->fw_type == NX_UNIFIED_ROMIMAGE) {
859 bios_ver = cpu_to_le32(*((u32 *) (&fw->data[prd_off])
860 + NX_UNI_BIOS_VERSION_OFF));
861 return (bios_ver << 16) + ((bios_ver >> 8) & 0xff00) +
862 (bios_ver >> 24);
863 } else
864 return cpu_to_le32(*(u32 *)&fw->data[NX_BIOS_VERSION_OFFSET]);
865
866 }
867
868 int
netxen_need_fw_reset(struct netxen_adapter * adapter)869 netxen_need_fw_reset(struct netxen_adapter *adapter)
870 {
871 u32 count, old_count;
872 u32 val, version, major, minor, build;
873 int i, timeout;
874 u8 fw_type;
875
876 /* NX2031 firmware doesn't support heartbit */
877 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
878 return 1;
879
880 if (adapter->need_fw_reset)
881 return 1;
882
883 /* last attempt had failed */
884 if (NXRD32(adapter, CRB_CMDPEG_STATE) == PHAN_INITIALIZE_FAILED)
885 return 1;
886
887 old_count = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER);
888
889 for (i = 0; i < 10; i++) {
890
891 timeout = msleep_interruptible(200);
892 if (timeout) {
893 NXWR32(adapter, CRB_CMDPEG_STATE,
894 PHAN_INITIALIZE_FAILED);
895 return -EINTR;
896 }
897
898 count = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER);
899 if (count != old_count)
900 break;
901 }
902
903 /* firmware is dead */
904 if (count == old_count)
905 return 1;
906
907 /* check if we have got newer or different file firmware */
908 if (adapter->fw) {
909
910 val = nx_get_fw_version(adapter);
911
912 version = NETXEN_DECODE_VERSION(val);
913
914 major = NXRD32(adapter, NETXEN_FW_VERSION_MAJOR);
915 minor = NXRD32(adapter, NETXEN_FW_VERSION_MINOR);
916 build = NXRD32(adapter, NETXEN_FW_VERSION_SUB);
917
918 if (version > NETXEN_VERSION_CODE(major, minor, build))
919 return 1;
920
921 if (version == NETXEN_VERSION_CODE(major, minor, build) &&
922 adapter->fw_type != NX_UNIFIED_ROMIMAGE) {
923
924 val = NXRD32(adapter, NETXEN_MIU_MN_CONTROL);
925 fw_type = (val & 0x4) ?
926 NX_P3_CT_ROMIMAGE : NX_P3_MN_ROMIMAGE;
927
928 if (adapter->fw_type != fw_type)
929 return 1;
930 }
931 }
932
933 return 0;
934 }
935
936 #define NETXEN_MIN_P3_FW_SUPP NETXEN_VERSION_CODE(4, 0, 505)
937
938 int
netxen_check_flash_fw_compatibility(struct netxen_adapter * adapter)939 netxen_check_flash_fw_compatibility(struct netxen_adapter *adapter)
940 {
941 u32 flash_fw_ver, min_fw_ver;
942
943 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
944 return 0;
945
946 if (netxen_rom_fast_read(adapter,
947 NX_FW_VERSION_OFFSET, (int *)&flash_fw_ver)) {
948 dev_err(&adapter->pdev->dev, "Unable to read flash fw"
949 "version\n");
950 return -EIO;
951 }
952
953 flash_fw_ver = NETXEN_DECODE_VERSION(flash_fw_ver);
954 min_fw_ver = NETXEN_MIN_P3_FW_SUPP;
955 if (flash_fw_ver >= min_fw_ver)
956 return 0;
957
958 dev_info(&adapter->pdev->dev, "Flash fw[%d.%d.%d] is < min fw supported"
959 "[4.0.505]. Please update firmware on flash\n",
960 _major(flash_fw_ver), _minor(flash_fw_ver),
961 _build(flash_fw_ver));
962 return -EINVAL;
963 }
964
965 static char *fw_name[] = {
966 NX_P2_MN_ROMIMAGE_NAME,
967 NX_P3_CT_ROMIMAGE_NAME,
968 NX_P3_MN_ROMIMAGE_NAME,
969 NX_UNIFIED_ROMIMAGE_NAME,
970 NX_FLASH_ROMIMAGE_NAME,
971 };
972
973 int
netxen_load_firmware(struct netxen_adapter * adapter)974 netxen_load_firmware(struct netxen_adapter *adapter)
975 {
976 u64 *ptr64;
977 u32 i, flashaddr, size;
978 const struct firmware *fw = adapter->fw;
979 struct pci_dev *pdev = adapter->pdev;
980
981 dev_info(&pdev->dev, "loading firmware from %s\n",
982 fw_name[adapter->fw_type]);
983
984 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
985 NXWR32(adapter, NETXEN_ROMUSB_GLB_CAS_RST, 1);
986
987 if (fw) {
988 __le64 data;
989
990 size = (NETXEN_IMAGE_START - NETXEN_BOOTLD_START) / 8;
991
992 ptr64 = (u64 *)nx_get_bootld_offs(adapter);
993 flashaddr = NETXEN_BOOTLD_START;
994
995 for (i = 0; i < size; i++) {
996 data = cpu_to_le64(ptr64[i]);
997
998 if (adapter->pci_mem_write(adapter, flashaddr, data))
999 return -EIO;
1000
1001 flashaddr += 8;
1002 }
1003
1004 size = (__force u32)nx_get_fw_size(adapter) / 8;
1005
1006 ptr64 = (u64 *)nx_get_fw_offs(adapter);
1007 flashaddr = NETXEN_IMAGE_START;
1008
1009 for (i = 0; i < size; i++) {
1010 data = cpu_to_le64(ptr64[i]);
1011
1012 if (adapter->pci_mem_write(adapter,
1013 flashaddr, data))
1014 return -EIO;
1015
1016 flashaddr += 8;
1017 }
1018
1019 size = (__force u32)nx_get_fw_size(adapter) % 8;
1020 if (size) {
1021 data = cpu_to_le64(ptr64[i]);
1022
1023 if (adapter->pci_mem_write(adapter,
1024 flashaddr, data))
1025 return -EIO;
1026 }
1027
1028 } else {
1029 u64 data;
1030 u32 hi, lo;
1031
1032 size = (NETXEN_IMAGE_START - NETXEN_BOOTLD_START) / 8;
1033 flashaddr = NETXEN_BOOTLD_START;
1034
1035 for (i = 0; i < size; i++) {
1036 if (netxen_rom_fast_read(adapter,
1037 flashaddr, (int *)&lo) != 0)
1038 return -EIO;
1039 if (netxen_rom_fast_read(adapter,
1040 flashaddr + 4, (int *)&hi) != 0)
1041 return -EIO;
1042
1043 /* hi, lo are already in host endian byteorder */
1044 data = (((u64)hi << 32) | lo);
1045
1046 if (adapter->pci_mem_write(adapter,
1047 flashaddr, data))
1048 return -EIO;
1049
1050 flashaddr += 8;
1051 }
1052 }
1053 msleep(1);
1054
1055 if (NX_IS_REVISION_P3P(adapter->ahw.revision_id)) {
1056 NXWR32(adapter, NETXEN_CRB_PEG_NET_0 + 0x18, 0x1020);
1057 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0x80001e);
1058 } else if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
1059 NXWR32(adapter, NETXEN_ROMUSB_GLB_SW_RESET, 0x80001d);
1060 else {
1061 NXWR32(adapter, NETXEN_ROMUSB_GLB_CHIP_CLK_CTRL, 0x3fff);
1062 NXWR32(adapter, NETXEN_ROMUSB_GLB_CAS_RST, 0);
1063 }
1064
1065 return 0;
1066 }
1067
1068 static int
netxen_validate_firmware(struct netxen_adapter * adapter)1069 netxen_validate_firmware(struct netxen_adapter *adapter)
1070 {
1071 __le32 val;
1072 __le32 flash_fw_ver;
1073 u32 file_fw_ver, min_ver, bios;
1074 struct pci_dev *pdev = adapter->pdev;
1075 const struct firmware *fw = adapter->fw;
1076 u8 fw_type = adapter->fw_type;
1077 u32 crbinit_fix_fw;
1078
1079 if (fw_type == NX_UNIFIED_ROMIMAGE) {
1080 if (netxen_nic_validate_unified_romimage(adapter))
1081 return -EINVAL;
1082 } else {
1083 val = cpu_to_le32(*(u32 *)&fw->data[NX_FW_MAGIC_OFFSET]);
1084 if ((__force u32)val != NETXEN_BDINFO_MAGIC)
1085 return -EINVAL;
1086
1087 if (fw->size < NX_FW_MIN_SIZE)
1088 return -EINVAL;
1089 }
1090
1091 val = nx_get_fw_version(adapter);
1092
1093 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
1094 min_ver = NETXEN_MIN_P3_FW_SUPP;
1095 else
1096 min_ver = NETXEN_VERSION_CODE(3, 4, 216);
1097
1098 file_fw_ver = NETXEN_DECODE_VERSION(val);
1099
1100 if ((_major(file_fw_ver) > _NETXEN_NIC_LINUX_MAJOR) ||
1101 (file_fw_ver < min_ver)) {
1102 dev_err(&pdev->dev,
1103 "%s: firmware version %d.%d.%d unsupported\n",
1104 fw_name[fw_type], _major(file_fw_ver), _minor(file_fw_ver),
1105 _build(file_fw_ver));
1106 return -EINVAL;
1107 }
1108 val = nx_get_bios_version(adapter);
1109 if (netxen_rom_fast_read(adapter, NX_BIOS_VERSION_OFFSET, (int *)&bios))
1110 return -EIO;
1111 if ((__force u32)val != bios) {
1112 dev_err(&pdev->dev, "%s: firmware bios is incompatible\n",
1113 fw_name[fw_type]);
1114 return -EINVAL;
1115 }
1116
1117 if (netxen_rom_fast_read(adapter,
1118 NX_FW_VERSION_OFFSET, (int *)&flash_fw_ver)) {
1119 dev_err(&pdev->dev, "Unable to read flash fw version\n");
1120 return -EIO;
1121 }
1122 flash_fw_ver = NETXEN_DECODE_VERSION(flash_fw_ver);
1123
1124 /* New fw from file is not allowed, if fw on flash is < 4.0.554 */
1125 crbinit_fix_fw = NETXEN_VERSION_CODE(4, 0, 554);
1126 if (file_fw_ver >= crbinit_fix_fw && flash_fw_ver < crbinit_fix_fw &&
1127 NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
1128 dev_err(&pdev->dev, "Incompatibility detected between driver "
1129 "and firmware version on flash. This configuration "
1130 "is not recommended. Please update the firmware on "
1131 "flash immediately\n");
1132 return -EINVAL;
1133 }
1134
1135 /* check if flashed firmware is newer only for no-mn and P2 case*/
1136 if (!netxen_p3_has_mn(adapter) ||
1137 NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
1138 if (flash_fw_ver > file_fw_ver) {
1139 dev_info(&pdev->dev, "%s: firmware is older than flash\n",
1140 fw_name[fw_type]);
1141 return -EINVAL;
1142 }
1143 }
1144
1145 NXWR32(adapter, NETXEN_CAM_RAM(0x1fc), NETXEN_BDINFO_MAGIC);
1146 return 0;
1147 }
1148
1149 static void
nx_get_next_fwtype(struct netxen_adapter * adapter)1150 nx_get_next_fwtype(struct netxen_adapter *adapter)
1151 {
1152 u8 fw_type;
1153
1154 switch (adapter->fw_type) {
1155 case NX_UNKNOWN_ROMIMAGE:
1156 fw_type = NX_UNIFIED_ROMIMAGE;
1157 break;
1158
1159 case NX_UNIFIED_ROMIMAGE:
1160 if (NX_IS_REVISION_P3P(adapter->ahw.revision_id))
1161 fw_type = NX_FLASH_ROMIMAGE;
1162 else if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
1163 fw_type = NX_P2_MN_ROMIMAGE;
1164 else if (netxen_p3_has_mn(adapter))
1165 fw_type = NX_P3_MN_ROMIMAGE;
1166 else
1167 fw_type = NX_P3_CT_ROMIMAGE;
1168 break;
1169
1170 case NX_P3_MN_ROMIMAGE:
1171 fw_type = NX_P3_CT_ROMIMAGE;
1172 break;
1173
1174 case NX_P2_MN_ROMIMAGE:
1175 case NX_P3_CT_ROMIMAGE:
1176 default:
1177 fw_type = NX_FLASH_ROMIMAGE;
1178 break;
1179 }
1180
1181 adapter->fw_type = fw_type;
1182 }
1183
1184 static int
netxen_p3_has_mn(struct netxen_adapter * adapter)1185 netxen_p3_has_mn(struct netxen_adapter *adapter)
1186 {
1187 u32 capability, flashed_ver;
1188
1189 /* NX2031 always had MN */
1190 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
1191 return 1;
1192
1193 netxen_rom_fast_read(adapter,
1194 NX_FW_VERSION_OFFSET, (int *)&flashed_ver);
1195 flashed_ver = NETXEN_DECODE_VERSION(flashed_ver);
1196
1197 if (flashed_ver >= NETXEN_VERSION_CODE(4, 0, 220)) {
1198 capability = NXRD32(adapter, NX_PEG_TUNE_CAPABILITY);
1199 if (capability & NX_PEG_TUNE_MN_PRESENT)
1200 return 1;
1201 }
1202 return 0;
1203 }
1204
netxen_request_firmware(struct netxen_adapter * adapter)1205 void netxen_request_firmware(struct netxen_adapter *adapter)
1206 {
1207 struct pci_dev *pdev = adapter->pdev;
1208 int rc = 0;
1209
1210 adapter->fw_type = NX_UNKNOWN_ROMIMAGE;
1211
1212 next:
1213 nx_get_next_fwtype(adapter);
1214
1215 if (adapter->fw_type == NX_FLASH_ROMIMAGE) {
1216 adapter->fw = NULL;
1217 } else {
1218 rc = request_firmware(&adapter->fw,
1219 fw_name[adapter->fw_type], &pdev->dev);
1220 if (rc != 0)
1221 goto next;
1222
1223 rc = netxen_validate_firmware(adapter);
1224 if (rc != 0) {
1225 release_firmware(adapter->fw);
1226 msleep(1);
1227 goto next;
1228 }
1229 }
1230 }
1231
1232
1233 void
netxen_release_firmware(struct netxen_adapter * adapter)1234 netxen_release_firmware(struct netxen_adapter *adapter)
1235 {
1236 release_firmware(adapter->fw);
1237 adapter->fw = NULL;
1238 }
1239
netxen_init_dummy_dma(struct netxen_adapter * adapter)1240 int netxen_init_dummy_dma(struct netxen_adapter *adapter)
1241 {
1242 u64 addr;
1243 u32 hi, lo;
1244
1245 if (!NX_IS_REVISION_P2(adapter->ahw.revision_id))
1246 return 0;
1247
1248 adapter->dummy_dma.addr = dma_alloc_coherent(&adapter->pdev->dev,
1249 NETXEN_HOST_DUMMY_DMA_SIZE,
1250 &adapter->dummy_dma.phys_addr,
1251 GFP_KERNEL);
1252 if (adapter->dummy_dma.addr == NULL) {
1253 dev_err(&adapter->pdev->dev,
1254 "ERROR: Could not allocate dummy DMA memory\n");
1255 return -ENOMEM;
1256 }
1257
1258 addr = (uint64_t) adapter->dummy_dma.phys_addr;
1259 hi = (addr >> 32) & 0xffffffff;
1260 lo = addr & 0xffffffff;
1261
1262 NXWR32(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI, hi);
1263 NXWR32(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO, lo);
1264
1265 return 0;
1266 }
1267
1268 /*
1269 * NetXen DMA watchdog control:
1270 *
1271 * Bit 0 : enabled => R/O: 1 watchdog active, 0 inactive
1272 * Bit 1 : disable_request => 1 req disable dma watchdog
1273 * Bit 2 : enable_request => 1 req enable dma watchdog
1274 * Bit 3-31 : unused
1275 */
netxen_free_dummy_dma(struct netxen_adapter * adapter)1276 void netxen_free_dummy_dma(struct netxen_adapter *adapter)
1277 {
1278 int i = 100;
1279 u32 ctrl;
1280
1281 if (!NX_IS_REVISION_P2(adapter->ahw.revision_id))
1282 return;
1283
1284 if (!adapter->dummy_dma.addr)
1285 return;
1286
1287 ctrl = NXRD32(adapter, NETXEN_DMA_WATCHDOG_CTRL);
1288 if ((ctrl & 0x1) != 0) {
1289 NXWR32(adapter, NETXEN_DMA_WATCHDOG_CTRL, (ctrl | 0x2));
1290
1291 while ((ctrl & 0x1) != 0) {
1292
1293 msleep(50);
1294
1295 ctrl = NXRD32(adapter, NETXEN_DMA_WATCHDOG_CTRL);
1296
1297 if (--i == 0)
1298 break;
1299 }
1300 }
1301
1302 if (i) {
1303 dma_free_coherent(&adapter->pdev->dev,
1304 NETXEN_HOST_DUMMY_DMA_SIZE,
1305 adapter->dummy_dma.addr,
1306 adapter->dummy_dma.phys_addr);
1307 adapter->dummy_dma.addr = NULL;
1308 } else
1309 dev_err(&adapter->pdev->dev, "dma_watchdog_shutdown failed\n");
1310 }
1311
netxen_phantom_init(struct netxen_adapter * adapter,int pegtune_val)1312 int netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val)
1313 {
1314 u32 val = 0;
1315 int retries = 60;
1316
1317 if (pegtune_val)
1318 return 0;
1319
1320 do {
1321 val = NXRD32(adapter, CRB_CMDPEG_STATE);
1322 switch (val) {
1323 case PHAN_INITIALIZE_COMPLETE:
1324 case PHAN_INITIALIZE_ACK:
1325 return 0;
1326 case PHAN_INITIALIZE_FAILED:
1327 goto out_err;
1328 default:
1329 break;
1330 }
1331
1332 msleep(500);
1333
1334 } while (--retries);
1335
1336 NXWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_FAILED);
1337
1338 out_err:
1339 dev_warn(&adapter->pdev->dev, "firmware init failed\n");
1340 return -EIO;
1341 }
1342
1343 static int
netxen_receive_peg_ready(struct netxen_adapter * adapter)1344 netxen_receive_peg_ready(struct netxen_adapter *adapter)
1345 {
1346 u32 val = 0;
1347 int retries = 2000;
1348
1349 do {
1350 val = NXRD32(adapter, CRB_RCVPEG_STATE);
1351
1352 if (val == PHAN_PEG_RCV_INITIALIZED)
1353 return 0;
1354
1355 msleep(10);
1356
1357 } while (--retries);
1358
1359 pr_err("Receive Peg initialization not complete, state: 0x%x.\n", val);
1360 return -EIO;
1361 }
1362
netxen_init_firmware(struct netxen_adapter * adapter)1363 int netxen_init_firmware(struct netxen_adapter *adapter)
1364 {
1365 int err;
1366
1367 err = netxen_receive_peg_ready(adapter);
1368 if (err)
1369 return err;
1370
1371 NXWR32(adapter, CRB_NIC_CAPABILITIES_HOST, INTR_SCHEME_PERPORT);
1372 NXWR32(adapter, CRB_MPORT_MODE, MPORT_MULTI_FUNCTION_MODE);
1373 NXWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_ACK);
1374
1375 if (NX_IS_REVISION_P2(adapter->ahw.revision_id))
1376 NXWR32(adapter, CRB_NIC_MSI_MODE_HOST, MSI_MODE_MULTIFUNC);
1377
1378 return err;
1379 }
1380
1381 static void
netxen_handle_linkevent(struct netxen_adapter * adapter,nx_fw_msg_t * msg)1382 netxen_handle_linkevent(struct netxen_adapter *adapter, nx_fw_msg_t *msg)
1383 {
1384 u32 cable_OUI;
1385 u16 cable_len;
1386 u16 link_speed;
1387 u8 link_status, module, duplex, autoneg;
1388 struct net_device *netdev = adapter->netdev;
1389
1390 adapter->has_link_events = 1;
1391
1392 cable_OUI = msg->body[1] & 0xffffffff;
1393 cable_len = (msg->body[1] >> 32) & 0xffff;
1394 link_speed = (msg->body[1] >> 48) & 0xffff;
1395
1396 link_status = msg->body[2] & 0xff;
1397 duplex = (msg->body[2] >> 16) & 0xff;
1398 autoneg = (msg->body[2] >> 24) & 0xff;
1399
1400 module = (msg->body[2] >> 8) & 0xff;
1401 if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE) {
1402 printk(KERN_INFO "%s: unsupported cable: OUI 0x%x, length %d\n",
1403 netdev->name, cable_OUI, cable_len);
1404 } else if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN) {
1405 printk(KERN_INFO "%s: unsupported cable length %d\n",
1406 netdev->name, cable_len);
1407 }
1408
1409 /* update link parameters */
1410 if (duplex == LINKEVENT_FULL_DUPLEX)
1411 adapter->link_duplex = DUPLEX_FULL;
1412 else
1413 adapter->link_duplex = DUPLEX_HALF;
1414 adapter->module_type = module;
1415 adapter->link_autoneg = autoneg;
1416 adapter->link_speed = link_speed;
1417
1418 netxen_advert_link_change(adapter, link_status);
1419 }
1420
1421 static void
netxen_handle_fw_message(int desc_cnt,int index,struct nx_host_sds_ring * sds_ring)1422 netxen_handle_fw_message(int desc_cnt, int index,
1423 struct nx_host_sds_ring *sds_ring)
1424 {
1425 nx_fw_msg_t msg;
1426 struct status_desc *desc;
1427 int i = 0, opcode;
1428
1429 while (desc_cnt > 0 && i < 8) {
1430 desc = &sds_ring->desc_head[index];
1431 msg.words[i++] = le64_to_cpu(desc->status_desc_data[0]);
1432 msg.words[i++] = le64_to_cpu(desc->status_desc_data[1]);
1433
1434 index = get_next_index(index, sds_ring->num_desc);
1435 desc_cnt--;
1436 }
1437
1438 opcode = netxen_get_nic_msg_opcode(msg.body[0]);
1439 switch (opcode) {
1440 case NX_NIC_C2H_OPCODE_GET_LINKEVENT_RESPONSE:
1441 netxen_handle_linkevent(sds_ring->adapter, &msg);
1442 break;
1443 default:
1444 break;
1445 }
1446 }
1447
1448 static int
netxen_alloc_rx_skb(struct netxen_adapter * adapter,struct nx_host_rds_ring * rds_ring,struct netxen_rx_buffer * buffer)1449 netxen_alloc_rx_skb(struct netxen_adapter *adapter,
1450 struct nx_host_rds_ring *rds_ring,
1451 struct netxen_rx_buffer *buffer)
1452 {
1453 struct sk_buff *skb;
1454 dma_addr_t dma;
1455 struct pci_dev *pdev = adapter->pdev;
1456
1457 buffer->skb = netdev_alloc_skb(adapter->netdev, rds_ring->skb_size);
1458 if (!buffer->skb)
1459 return 1;
1460
1461 skb = buffer->skb;
1462
1463 if (!adapter->ahw.cut_through)
1464 skb_reserve(skb, 2);
1465
1466 dma = dma_map_single(&pdev->dev, skb->data, rds_ring->dma_size,
1467 DMA_FROM_DEVICE);
1468
1469 if (dma_mapping_error(&pdev->dev, dma)) {
1470 dev_kfree_skb_any(skb);
1471 buffer->skb = NULL;
1472 return 1;
1473 }
1474
1475 buffer->skb = skb;
1476 buffer->dma = dma;
1477 buffer->state = NETXEN_BUFFER_BUSY;
1478
1479 return 0;
1480 }
1481
netxen_process_rxbuf(struct netxen_adapter * adapter,struct nx_host_rds_ring * rds_ring,u16 index,u16 cksum)1482 static struct sk_buff *netxen_process_rxbuf(struct netxen_adapter *adapter,
1483 struct nx_host_rds_ring *rds_ring, u16 index, u16 cksum)
1484 {
1485 struct netxen_rx_buffer *buffer;
1486 struct sk_buff *skb;
1487
1488 buffer = &rds_ring->rx_buf_arr[index];
1489
1490 dma_unmap_single(&adapter->pdev->dev, buffer->dma, rds_ring->dma_size,
1491 DMA_FROM_DEVICE);
1492
1493 skb = buffer->skb;
1494 if (!skb)
1495 goto no_skb;
1496
1497 if (likely((adapter->netdev->features & NETIF_F_RXCSUM)
1498 && cksum == STATUS_CKSUM_OK)) {
1499 adapter->stats.csummed++;
1500 skb->ip_summed = CHECKSUM_UNNECESSARY;
1501 } else
1502 skb->ip_summed = CHECKSUM_NONE;
1503
1504 buffer->skb = NULL;
1505 no_skb:
1506 buffer->state = NETXEN_BUFFER_FREE;
1507 return skb;
1508 }
1509
1510 static struct netxen_rx_buffer *
netxen_process_rcv(struct netxen_adapter * adapter,struct nx_host_sds_ring * sds_ring,int ring,u64 sts_data0)1511 netxen_process_rcv(struct netxen_adapter *adapter,
1512 struct nx_host_sds_ring *sds_ring,
1513 int ring, u64 sts_data0)
1514 {
1515 struct net_device *netdev = adapter->netdev;
1516 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
1517 struct netxen_rx_buffer *buffer;
1518 struct sk_buff *skb;
1519 struct nx_host_rds_ring *rds_ring;
1520 int index, length, cksum, pkt_offset;
1521
1522 if (unlikely(ring >= adapter->max_rds_rings))
1523 return NULL;
1524
1525 rds_ring = &recv_ctx->rds_rings[ring];
1526
1527 index = netxen_get_sts_refhandle(sts_data0);
1528 if (unlikely(index >= rds_ring->num_desc))
1529 return NULL;
1530
1531 buffer = &rds_ring->rx_buf_arr[index];
1532
1533 length = netxen_get_sts_totallength(sts_data0);
1534 cksum = netxen_get_sts_status(sts_data0);
1535 pkt_offset = netxen_get_sts_pkt_offset(sts_data0);
1536
1537 skb = netxen_process_rxbuf(adapter, rds_ring, index, cksum);
1538 if (!skb)
1539 return buffer;
1540
1541 if (length > rds_ring->skb_size)
1542 skb_put(skb, rds_ring->skb_size);
1543 else
1544 skb_put(skb, length);
1545
1546
1547 if (pkt_offset)
1548 skb_pull(skb, pkt_offset);
1549
1550 skb->protocol = eth_type_trans(skb, netdev);
1551
1552 napi_gro_receive(&sds_ring->napi, skb);
1553
1554 adapter->stats.rx_pkts++;
1555 adapter->stats.rxbytes += length;
1556
1557 return buffer;
1558 }
1559
1560 #define TCP_HDR_SIZE 20
1561 #define TCP_TS_OPTION_SIZE 12
1562 #define TCP_TS_HDR_SIZE (TCP_HDR_SIZE + TCP_TS_OPTION_SIZE)
1563
1564 static struct netxen_rx_buffer *
netxen_process_lro(struct netxen_adapter * adapter,struct nx_host_sds_ring * sds_ring,int ring,u64 sts_data0,u64 sts_data1)1565 netxen_process_lro(struct netxen_adapter *adapter,
1566 struct nx_host_sds_ring *sds_ring,
1567 int ring, u64 sts_data0, u64 sts_data1)
1568 {
1569 struct net_device *netdev = adapter->netdev;
1570 struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
1571 struct netxen_rx_buffer *buffer;
1572 struct sk_buff *skb;
1573 struct nx_host_rds_ring *rds_ring;
1574 struct iphdr *iph;
1575 struct tcphdr *th;
1576 bool push, timestamp;
1577 int l2_hdr_offset, l4_hdr_offset;
1578 int index;
1579 u16 lro_length, length, data_offset;
1580 u32 seq_number;
1581 u8 vhdr_len = 0;
1582
1583 if (unlikely(ring >= adapter->max_rds_rings))
1584 return NULL;
1585
1586 rds_ring = &recv_ctx->rds_rings[ring];
1587
1588 index = netxen_get_lro_sts_refhandle(sts_data0);
1589 if (unlikely(index >= rds_ring->num_desc))
1590 return NULL;
1591
1592 buffer = &rds_ring->rx_buf_arr[index];
1593
1594 timestamp = netxen_get_lro_sts_timestamp(sts_data0);
1595 lro_length = netxen_get_lro_sts_length(sts_data0);
1596 l2_hdr_offset = netxen_get_lro_sts_l2_hdr_offset(sts_data0);
1597 l4_hdr_offset = netxen_get_lro_sts_l4_hdr_offset(sts_data0);
1598 push = netxen_get_lro_sts_push_flag(sts_data0);
1599 seq_number = netxen_get_lro_sts_seq_number(sts_data1);
1600
1601 skb = netxen_process_rxbuf(adapter, rds_ring, index, STATUS_CKSUM_OK);
1602 if (!skb)
1603 return buffer;
1604
1605 if (timestamp)
1606 data_offset = l4_hdr_offset + TCP_TS_HDR_SIZE;
1607 else
1608 data_offset = l4_hdr_offset + TCP_HDR_SIZE;
1609
1610 skb_put(skb, lro_length + data_offset);
1611
1612 skb_pull(skb, l2_hdr_offset);
1613 skb->protocol = eth_type_trans(skb, netdev);
1614
1615 if (skb->protocol == htons(ETH_P_8021Q))
1616 vhdr_len = VLAN_HLEN;
1617 iph = (struct iphdr *)(skb->data + vhdr_len);
1618 th = (struct tcphdr *)((skb->data + vhdr_len) + (iph->ihl << 2));
1619
1620 length = (iph->ihl << 2) + (th->doff << 2) + lro_length;
1621 csum_replace2(&iph->check, iph->tot_len, htons(length));
1622 iph->tot_len = htons(length);
1623 th->psh = push;
1624 th->seq = htonl(seq_number);
1625
1626 length = skb->len;
1627
1628 if (adapter->flags & NETXEN_FW_MSS_CAP)
1629 skb_shinfo(skb)->gso_size = netxen_get_lro_sts_mss(sts_data1);
1630
1631 netif_receive_skb(skb);
1632
1633 adapter->stats.lro_pkts++;
1634 adapter->stats.rxbytes += length;
1635
1636 return buffer;
1637 }
1638
1639 #define netxen_merge_rx_buffers(list, head) \
1640 do { list_splice_tail_init(list, head); } while (0);
1641
1642 int
netxen_process_rcv_ring(struct nx_host_sds_ring * sds_ring,int max)1643 netxen_process_rcv_ring(struct nx_host_sds_ring *sds_ring, int max)
1644 {
1645 struct netxen_adapter *adapter = sds_ring->adapter;
1646
1647 struct list_head *cur;
1648
1649 struct status_desc *desc;
1650 struct netxen_rx_buffer *rxbuf;
1651
1652 u32 consumer = sds_ring->consumer;
1653
1654 int count = 0;
1655 u64 sts_data0, sts_data1;
1656 int opcode, ring = 0, desc_cnt;
1657
1658 while (count < max) {
1659 desc = &sds_ring->desc_head[consumer];
1660 sts_data0 = le64_to_cpu(desc->status_desc_data[0]);
1661
1662 if (!(sts_data0 & STATUS_OWNER_HOST))
1663 break;
1664
1665 desc_cnt = netxen_get_sts_desc_cnt(sts_data0);
1666
1667 opcode = netxen_get_sts_opcode(sts_data0);
1668
1669 switch (opcode) {
1670 case NETXEN_NIC_RXPKT_DESC:
1671 case NETXEN_OLD_RXPKT_DESC:
1672 case NETXEN_NIC_SYN_OFFLOAD:
1673 ring = netxen_get_sts_type(sts_data0);
1674 rxbuf = netxen_process_rcv(adapter, sds_ring,
1675 ring, sts_data0);
1676 break;
1677 case NETXEN_NIC_LRO_DESC:
1678 ring = netxen_get_lro_sts_type(sts_data0);
1679 sts_data1 = le64_to_cpu(desc->status_desc_data[1]);
1680 rxbuf = netxen_process_lro(adapter, sds_ring,
1681 ring, sts_data0, sts_data1);
1682 break;
1683 case NETXEN_NIC_RESPONSE_DESC:
1684 netxen_handle_fw_message(desc_cnt, consumer, sds_ring);
1685 goto skip;
1686 default:
1687 goto skip;
1688 }
1689
1690 WARN_ON(desc_cnt > 1);
1691
1692 if (rxbuf)
1693 list_add_tail(&rxbuf->list, &sds_ring->free_list[ring]);
1694
1695 skip:
1696 for (; desc_cnt > 0; desc_cnt--) {
1697 desc = &sds_ring->desc_head[consumer];
1698 desc->status_desc_data[0] =
1699 cpu_to_le64(STATUS_OWNER_PHANTOM);
1700 consumer = get_next_index(consumer, sds_ring->num_desc);
1701 }
1702 count++;
1703 }
1704
1705 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
1706 struct nx_host_rds_ring *rds_ring =
1707 &adapter->recv_ctx.rds_rings[ring];
1708
1709 if (!list_empty(&sds_ring->free_list[ring])) {
1710 list_for_each(cur, &sds_ring->free_list[ring]) {
1711 rxbuf = list_entry(cur,
1712 struct netxen_rx_buffer, list);
1713 netxen_alloc_rx_skb(adapter, rds_ring, rxbuf);
1714 }
1715 spin_lock(&rds_ring->lock);
1716 netxen_merge_rx_buffers(&sds_ring->free_list[ring],
1717 &rds_ring->free_list);
1718 spin_unlock(&rds_ring->lock);
1719 }
1720
1721 netxen_post_rx_buffers_nodb(adapter, rds_ring);
1722 }
1723
1724 if (count) {
1725 sds_ring->consumer = consumer;
1726 NXWRIO(adapter, sds_ring->crb_sts_consumer, consumer);
1727 }
1728
1729 return count;
1730 }
1731
1732 /* Process Command status ring */
netxen_process_cmd_ring(struct netxen_adapter * adapter)1733 int netxen_process_cmd_ring(struct netxen_adapter *adapter)
1734 {
1735 u32 sw_consumer, hw_consumer;
1736 int count = 0, i;
1737 struct netxen_cmd_buffer *buffer;
1738 struct pci_dev *pdev = adapter->pdev;
1739 struct net_device *netdev = adapter->netdev;
1740 struct netxen_skb_frag *frag;
1741 int done = 0;
1742 struct nx_host_tx_ring *tx_ring = adapter->tx_ring;
1743
1744 if (!spin_trylock_bh(&adapter->tx_clean_lock))
1745 return 1;
1746
1747 sw_consumer = tx_ring->sw_consumer;
1748 hw_consumer = le32_to_cpu(*(tx_ring->hw_consumer));
1749
1750 while (sw_consumer != hw_consumer) {
1751 buffer = &tx_ring->cmd_buf_arr[sw_consumer];
1752 if (buffer->skb) {
1753 frag = &buffer->frag_array[0];
1754 dma_unmap_single(&pdev->dev, frag->dma, frag->length,
1755 DMA_TO_DEVICE);
1756 frag->dma = 0ULL;
1757 for (i = 1; i < buffer->frag_count; i++) {
1758 frag++; /* Get the next frag */
1759 dma_unmap_page(&pdev->dev, frag->dma,
1760 frag->length, DMA_TO_DEVICE);
1761 frag->dma = 0ULL;
1762 }
1763
1764 adapter->stats.xmitfinished++;
1765 dev_kfree_skb_any(buffer->skb);
1766 buffer->skb = NULL;
1767 }
1768
1769 sw_consumer = get_next_index(sw_consumer, tx_ring->num_desc);
1770 if (++count >= MAX_STATUS_HANDLE)
1771 break;
1772 }
1773
1774 tx_ring->sw_consumer = sw_consumer;
1775
1776 if (count && netif_running(netdev)) {
1777 smp_mb();
1778
1779 if (netif_queue_stopped(netdev) && netif_carrier_ok(netdev))
1780 if (netxen_tx_avail(tx_ring) > TX_STOP_THRESH)
1781 netif_wake_queue(netdev);
1782 adapter->tx_timeo_cnt = 0;
1783 }
1784 /*
1785 * If everything is freed up to consumer then check if the ring is full
1786 * If the ring is full then check if more needs to be freed and
1787 * schedule the call back again.
1788 *
1789 * This happens when there are 2 CPUs. One could be freeing and the
1790 * other filling it. If the ring is full when we get out of here and
1791 * the card has already interrupted the host then the host can miss the
1792 * interrupt.
1793 *
1794 * There is still a possible race condition and the host could miss an
1795 * interrupt. The card has to take care of this.
1796 */
1797 hw_consumer = le32_to_cpu(*(tx_ring->hw_consumer));
1798 done = (sw_consumer == hw_consumer);
1799 spin_unlock_bh(&adapter->tx_clean_lock);
1800
1801 return done;
1802 }
1803
1804 void
netxen_post_rx_buffers(struct netxen_adapter * adapter,u32 ringid,struct nx_host_rds_ring * rds_ring)1805 netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ringid,
1806 struct nx_host_rds_ring *rds_ring)
1807 {
1808 struct rcv_desc *pdesc;
1809 struct netxen_rx_buffer *buffer;
1810 int producer, count = 0;
1811 netxen_ctx_msg msg = 0;
1812 struct list_head *head;
1813
1814 producer = rds_ring->producer;
1815
1816 head = &rds_ring->free_list;
1817 while (!list_empty(head)) {
1818
1819 buffer = list_entry(head->next, struct netxen_rx_buffer, list);
1820
1821 if (!buffer->skb) {
1822 if (netxen_alloc_rx_skb(adapter, rds_ring, buffer))
1823 break;
1824 }
1825
1826 count++;
1827 list_del(&buffer->list);
1828
1829 /* make a rcv descriptor */
1830 pdesc = &rds_ring->desc_head[producer];
1831 pdesc->addr_buffer = cpu_to_le64(buffer->dma);
1832 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
1833 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
1834
1835 producer = get_next_index(producer, rds_ring->num_desc);
1836 }
1837
1838 if (count) {
1839 rds_ring->producer = producer;
1840 NXWRIO(adapter, rds_ring->crb_rcv_producer,
1841 (producer-1) & (rds_ring->num_desc-1));
1842
1843 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
1844 /*
1845 * Write a doorbell msg to tell phanmon of change in
1846 * receive ring producer
1847 * Only for firmware version < 4.0.0
1848 */
1849 netxen_set_msg_peg_id(msg, NETXEN_RCV_PEG_DB_ID);
1850 netxen_set_msg_privid(msg);
1851 netxen_set_msg_count(msg,
1852 ((producer - 1) &
1853 (rds_ring->num_desc - 1)));
1854 netxen_set_msg_ctxid(msg, adapter->portnum);
1855 netxen_set_msg_opcode(msg, NETXEN_RCV_PRODUCER(ringid));
1856 NXWRIO(adapter, DB_NORMALIZE(adapter,
1857 NETXEN_RCV_PRODUCER_OFFSET), msg);
1858 }
1859 }
1860 }
1861
1862 static void
netxen_post_rx_buffers_nodb(struct netxen_adapter * adapter,struct nx_host_rds_ring * rds_ring)1863 netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
1864 struct nx_host_rds_ring *rds_ring)
1865 {
1866 struct rcv_desc *pdesc;
1867 struct netxen_rx_buffer *buffer;
1868 int producer, count = 0;
1869 struct list_head *head;
1870
1871 if (!spin_trylock(&rds_ring->lock))
1872 return;
1873
1874 producer = rds_ring->producer;
1875
1876 head = &rds_ring->free_list;
1877 while (!list_empty(head)) {
1878
1879 buffer = list_entry(head->next, struct netxen_rx_buffer, list);
1880
1881 if (!buffer->skb) {
1882 if (netxen_alloc_rx_skb(adapter, rds_ring, buffer))
1883 break;
1884 }
1885
1886 count++;
1887 list_del(&buffer->list);
1888
1889 /* make a rcv descriptor */
1890 pdesc = &rds_ring->desc_head[producer];
1891 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
1892 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
1893 pdesc->addr_buffer = cpu_to_le64(buffer->dma);
1894
1895 producer = get_next_index(producer, rds_ring->num_desc);
1896 }
1897
1898 if (count) {
1899 rds_ring->producer = producer;
1900 NXWRIO(adapter, rds_ring->crb_rcv_producer,
1901 (producer - 1) & (rds_ring->num_desc - 1));
1902 }
1903 spin_unlock(&rds_ring->lock);
1904 }
1905
netxen_nic_clear_stats(struct netxen_adapter * adapter)1906 void netxen_nic_clear_stats(struct netxen_adapter *adapter)
1907 {
1908 memset(&adapter->stats, 0, sizeof(adapter->stats));
1909 }
1910
1911