1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Marvell 88SE64xx/88SE94xx main function
4 *
5 * Copyright 2007 Red Hat, Inc.
6 * Copyright 2008 Marvell. <kewei@marvell.com>
7 * Copyright 2009-2011 Marvell. <yuxiangl@marvell.com>
8 */
9
10 #include "mv_sas.h"
11
mvs_find_tag(struct mvs_info * mvi,struct sas_task * task,u32 * tag)12 static int mvs_find_tag(struct mvs_info *mvi, struct sas_task *task, u32 *tag)
13 {
14 if (task->lldd_task) {
15 struct mvs_slot_info *slot;
16 slot = task->lldd_task;
17 *tag = slot->slot_tag;
18 return 1;
19 }
20 return 0;
21 }
22
mvs_tag_clear(struct mvs_info * mvi,u32 tag)23 static void mvs_tag_clear(struct mvs_info *mvi, u32 tag)
24 {
25 void *bitmap = mvi->rsvd_tags;
26 clear_bit(tag, bitmap);
27 }
28
mvs_tag_free(struct mvs_info * mvi,u32 tag)29 static void mvs_tag_free(struct mvs_info *mvi, u32 tag)
30 {
31 if (tag >= MVS_RSVD_SLOTS)
32 return;
33
34 mvs_tag_clear(mvi, tag);
35 }
36
mvs_tag_set(struct mvs_info * mvi,unsigned int tag)37 static void mvs_tag_set(struct mvs_info *mvi, unsigned int tag)
38 {
39 void *bitmap = mvi->rsvd_tags;
40 set_bit(tag, bitmap);
41 }
42
mvs_tag_alloc(struct mvs_info * mvi,u32 * tag_out)43 static int mvs_tag_alloc(struct mvs_info *mvi, u32 *tag_out)
44 {
45 unsigned int index, tag;
46 void *bitmap = mvi->rsvd_tags;
47
48 index = find_first_zero_bit(bitmap, MVS_RSVD_SLOTS);
49 tag = index;
50 if (tag >= MVS_RSVD_SLOTS)
51 return -SAS_QUEUE_FULL;
52 mvs_tag_set(mvi, tag);
53 *tag_out = tag;
54 return 0;
55 }
56
mvs_find_dev_mvi(struct domain_device * dev)57 static struct mvs_info *mvs_find_dev_mvi(struct domain_device *dev)
58 {
59 unsigned long i = 0, j = 0, hi = 0;
60 struct sas_ha_struct *sha = dev->port->ha;
61 struct mvs_info *mvi = NULL;
62 struct asd_sas_phy *phy;
63
64 while (sha->sas_port[i]) {
65 if (sha->sas_port[i] == dev->port) {
66 spin_lock(&sha->sas_port[i]->phy_list_lock);
67 phy = container_of(sha->sas_port[i]->phy_list.next,
68 struct asd_sas_phy, port_phy_el);
69 spin_unlock(&sha->sas_port[i]->phy_list_lock);
70 j = 0;
71 while (sha->sas_phy[j]) {
72 if (sha->sas_phy[j] == phy)
73 break;
74 j++;
75 }
76 break;
77 }
78 i++;
79 }
80 hi = j/((struct mvs_prv_info *)sha->lldd_ha)->n_phy;
81 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[hi];
82
83 return mvi;
84
85 }
86
mvs_find_dev_phyno(struct domain_device * dev,int * phyno)87 static int mvs_find_dev_phyno(struct domain_device *dev, int *phyno)
88 {
89 unsigned long i = 0, j = 0, n = 0, num = 0;
90 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;
91 struct mvs_info *mvi = mvi_dev->mvi_info;
92 struct sas_ha_struct *sha = dev->port->ha;
93
94 while (sha->sas_port[i]) {
95 if (sha->sas_port[i] == dev->port) {
96 struct asd_sas_phy *phy;
97
98 spin_lock(&sha->sas_port[i]->phy_list_lock);
99 list_for_each_entry(phy,
100 &sha->sas_port[i]->phy_list, port_phy_el) {
101 j = 0;
102 while (sha->sas_phy[j]) {
103 if (sha->sas_phy[j] == phy)
104 break;
105 j++;
106 }
107 phyno[n] = (j >= mvi->chip->n_phy) ?
108 (j - mvi->chip->n_phy) : j;
109 num++;
110 n++;
111 }
112 spin_unlock(&sha->sas_port[i]->phy_list_lock);
113 break;
114 }
115 i++;
116 }
117 return num;
118 }
119
mvs_find_dev_by_reg_set(struct mvs_info * mvi,u8 reg_set)120 struct mvs_device *mvs_find_dev_by_reg_set(struct mvs_info *mvi,
121 u8 reg_set)
122 {
123 u32 dev_no;
124 for (dev_no = 0; dev_no < MVS_MAX_DEVICES; dev_no++) {
125 if (mvi->devices[dev_no].taskfileset == MVS_ID_NOT_MAPPED)
126 continue;
127
128 if (mvi->devices[dev_no].taskfileset == reg_set)
129 return &mvi->devices[dev_no];
130 }
131 return NULL;
132 }
133
mvs_free_reg_set(struct mvs_info * mvi,struct mvs_device * dev)134 static inline void mvs_free_reg_set(struct mvs_info *mvi,
135 struct mvs_device *dev)
136 {
137 if (!dev) {
138 mv_printk("device has been free.\n");
139 return;
140 }
141 if (dev->taskfileset == MVS_ID_NOT_MAPPED)
142 return;
143 MVS_CHIP_DISP->free_reg_set(mvi, &dev->taskfileset);
144 }
145
mvs_assign_reg_set(struct mvs_info * mvi,struct mvs_device * dev)146 static inline u8 mvs_assign_reg_set(struct mvs_info *mvi,
147 struct mvs_device *dev)
148 {
149 if (dev->taskfileset != MVS_ID_NOT_MAPPED)
150 return 0;
151 return MVS_CHIP_DISP->assign_reg_set(mvi, &dev->taskfileset);
152 }
153
mvs_phy_control(struct asd_sas_phy * sas_phy,enum phy_func func,void * funcdata)154 int mvs_phy_control(struct asd_sas_phy *sas_phy, enum phy_func func,
155 void *funcdata)
156 {
157 int rc = 0, phy_id = sas_phy->id;
158 u32 tmp, i = 0, hi;
159 struct sas_ha_struct *sha = sas_phy->ha;
160 struct mvs_info *mvi = NULL;
161
162 while (sha->sas_phy[i]) {
163 if (sha->sas_phy[i] == sas_phy)
164 break;
165 i++;
166 }
167 hi = i/((struct mvs_prv_info *)sha->lldd_ha)->n_phy;
168 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[hi];
169
170 switch (func) {
171 case PHY_FUNC_SET_LINK_RATE:
172 MVS_CHIP_DISP->phy_set_link_rate(mvi, phy_id, funcdata);
173 break;
174
175 case PHY_FUNC_HARD_RESET:
176 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, phy_id);
177 if (tmp & PHY_RST_HARD)
178 break;
179 MVS_CHIP_DISP->phy_reset(mvi, phy_id, MVS_HARD_RESET);
180 break;
181
182 case PHY_FUNC_LINK_RESET:
183 MVS_CHIP_DISP->phy_enable(mvi, phy_id);
184 MVS_CHIP_DISP->phy_reset(mvi, phy_id, MVS_SOFT_RESET);
185 break;
186
187 case PHY_FUNC_DISABLE:
188 MVS_CHIP_DISP->phy_disable(mvi, phy_id);
189 break;
190 case PHY_FUNC_RELEASE_SPINUP_HOLD:
191 default:
192 rc = -ENOSYS;
193 }
194 msleep(200);
195 return rc;
196 }
197
mvs_set_sas_addr(struct mvs_info * mvi,int port_id,u32 off_lo,u32 off_hi,u64 sas_addr)198 void mvs_set_sas_addr(struct mvs_info *mvi, int port_id, u32 off_lo,
199 u32 off_hi, u64 sas_addr)
200 {
201 u32 lo = (u32)sas_addr;
202 u32 hi = (u32)(sas_addr>>32);
203
204 MVS_CHIP_DISP->write_port_cfg_addr(mvi, port_id, off_lo);
205 MVS_CHIP_DISP->write_port_cfg_data(mvi, port_id, lo);
206 MVS_CHIP_DISP->write_port_cfg_addr(mvi, port_id, off_hi);
207 MVS_CHIP_DISP->write_port_cfg_data(mvi, port_id, hi);
208 }
209
mvs_bytes_dmaed(struct mvs_info * mvi,int i,gfp_t gfp_flags)210 static void mvs_bytes_dmaed(struct mvs_info *mvi, int i, gfp_t gfp_flags)
211 {
212 struct mvs_phy *phy = &mvi->phy[i];
213 struct asd_sas_phy *sas_phy = &phy->sas_phy;
214
215 if (!phy->phy_attached)
216 return;
217
218 if (!(phy->att_dev_info & PORT_DEV_TRGT_MASK)
219 && phy->phy_type & PORT_TYPE_SAS) {
220 return;
221 }
222
223 sas_notify_phy_event(sas_phy, PHYE_OOB_DONE, gfp_flags);
224
225 if (sas_phy->phy) {
226 struct sas_phy *sphy = sas_phy->phy;
227
228 sphy->negotiated_linkrate = sas_phy->linkrate;
229 sphy->minimum_linkrate = phy->minimum_linkrate;
230 sphy->minimum_linkrate_hw = SAS_LINK_RATE_1_5_GBPS;
231 sphy->maximum_linkrate = phy->maximum_linkrate;
232 sphy->maximum_linkrate_hw = MVS_CHIP_DISP->phy_max_link_rate();
233 }
234
235 if (phy->phy_type & PORT_TYPE_SAS) {
236 struct sas_identify_frame *id;
237
238 id = (struct sas_identify_frame *)phy->frame_rcvd;
239 id->dev_type = phy->identify.device_type;
240 id->initiator_bits = SAS_PROTOCOL_ALL;
241 id->target_bits = phy->identify.target_port_protocols;
242
243 /* direct attached SAS device */
244 if (phy->att_dev_info & PORT_SSP_TRGT_MASK) {
245 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_PHY_STAT);
246 MVS_CHIP_DISP->write_port_cfg_data(mvi, i, 0x00);
247 }
248 } else if (phy->phy_type & PORT_TYPE_SATA) {
249 /*Nothing*/
250 }
251 mv_dprintk("phy %d byte dmaded.\n", i + mvi->id * mvi->chip->n_phy);
252
253 sas_phy->frame_rcvd_size = phy->frame_rcvd_size;
254
255 sas_notify_port_event(sas_phy, PORTE_BYTES_DMAED, gfp_flags);
256 }
257
mvs_scan_start(struct Scsi_Host * shost)258 void mvs_scan_start(struct Scsi_Host *shost)
259 {
260 int i, j;
261 unsigned short core_nr;
262 struct mvs_info *mvi;
263 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
264 struct mvs_prv_info *mvs_prv = sha->lldd_ha;
265
266 core_nr = ((struct mvs_prv_info *)sha->lldd_ha)->n_host;
267
268 for (j = 0; j < core_nr; j++) {
269 mvi = ((struct mvs_prv_info *)sha->lldd_ha)->mvi[j];
270 for (i = 0; i < mvi->chip->n_phy; ++i)
271 mvs_bytes_dmaed(mvi, i, GFP_KERNEL);
272 }
273 mvs_prv->scan_finished = 1;
274 }
275
mvs_scan_finished(struct Scsi_Host * shost,unsigned long time)276 int mvs_scan_finished(struct Scsi_Host *shost, unsigned long time)
277 {
278 struct sas_ha_struct *sha = SHOST_TO_SAS_HA(shost);
279 struct mvs_prv_info *mvs_prv = sha->lldd_ha;
280
281 if (mvs_prv->scan_finished == 0)
282 return 0;
283
284 sas_drain_work(sha);
285 return 1;
286 }
287
mvs_task_prep_smp(struct mvs_info * mvi,struct mvs_task_exec_info * tei)288 static int mvs_task_prep_smp(struct mvs_info *mvi,
289 struct mvs_task_exec_info *tei)
290 {
291 int elem, rc, i;
292 struct sas_ha_struct *sha = mvi->sas;
293 struct sas_task *task = tei->task;
294 struct mvs_cmd_hdr *hdr = tei->hdr;
295 struct domain_device *dev = task->dev;
296 struct asd_sas_port *sas_port = dev->port;
297 struct sas_phy *sphy = dev->phy;
298 struct asd_sas_phy *sas_phy = sha->sas_phy[sphy->number];
299 struct scatterlist *sg_req, *sg_resp;
300 u32 req_len, resp_len, tag = tei->tag;
301 void *buf_tmp;
302 u8 *buf_oaf;
303 dma_addr_t buf_tmp_dma;
304 void *buf_prd;
305 struct mvs_slot_info *slot = &mvi->slot_info[tag];
306 u32 flags = (tei->n_elem << MCH_PRD_LEN_SHIFT);
307
308 /*
309 * DMA-map SMP request, response buffers
310 */
311 sg_req = &task->smp_task.smp_req;
312 elem = dma_map_sg(mvi->dev, sg_req, 1, DMA_TO_DEVICE);
313 if (!elem)
314 return -ENOMEM;
315 req_len = sg_dma_len(sg_req);
316
317 sg_resp = &task->smp_task.smp_resp;
318 elem = dma_map_sg(mvi->dev, sg_resp, 1, DMA_FROM_DEVICE);
319 if (!elem) {
320 rc = -ENOMEM;
321 goto err_out;
322 }
323 resp_len = SB_RFB_MAX;
324
325 /* must be in dwords */
326 if ((req_len & 0x3) || (resp_len & 0x3)) {
327 rc = -EINVAL;
328 goto err_out_2;
329 }
330
331 /*
332 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs
333 */
334
335 /* region 1: command table area (MVS_SSP_CMD_SZ bytes) ***** */
336 buf_tmp = slot->buf;
337 buf_tmp_dma = slot->buf_dma;
338
339 hdr->cmd_tbl = cpu_to_le64(sg_dma_address(sg_req));
340
341 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */
342 buf_oaf = buf_tmp;
343 hdr->open_frame = cpu_to_le64(buf_tmp_dma);
344
345 buf_tmp += MVS_OAF_SZ;
346 buf_tmp_dma += MVS_OAF_SZ;
347
348 /* region 3: PRD table *********************************** */
349 buf_prd = buf_tmp;
350 if (tei->n_elem)
351 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma);
352 else
353 hdr->prd_tbl = 0;
354
355 i = MVS_CHIP_DISP->prd_size() * tei->n_elem;
356 buf_tmp += i;
357 buf_tmp_dma += i;
358
359 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */
360 slot->response = buf_tmp;
361 hdr->status_buf = cpu_to_le64(buf_tmp_dma);
362 if (mvi->flags & MVF_FLAG_SOC)
363 hdr->reserved[0] = 0;
364
365 /*
366 * Fill in TX ring and command slot header
367 */
368 slot->tx = mvi->tx_prod;
369 mvi->tx[mvi->tx_prod] = cpu_to_le32((TXQ_CMD_SMP << TXQ_CMD_SHIFT) |
370 TXQ_MODE_I | tag |
371 (MVS_PHY_ID << TXQ_PHY_SHIFT));
372
373 hdr->flags |= flags;
374 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | ((req_len - 4) / 4));
375 hdr->tags = cpu_to_le32(tag);
376 hdr->data_len = 0;
377
378 /* generate open address frame hdr (first 12 bytes) */
379 /* initiator, SMP, ftype 1h */
380 buf_oaf[0] = (1 << 7) | (PROTOCOL_SMP << 4) | 0x01;
381 buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf;
382 *(u16 *)(buf_oaf + 2) = 0xFFFF; /* SAS SPEC */
383 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE);
384
385 /* fill in PRD (scatter/gather) table, if any */
386 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd);
387
388 return 0;
389
390 err_out_2:
391 dma_unmap_sg(mvi->dev, &tei->task->smp_task.smp_resp, 1,
392 DMA_FROM_DEVICE);
393 err_out:
394 dma_unmap_sg(mvi->dev, &tei->task->smp_task.smp_req, 1,
395 DMA_TO_DEVICE);
396 return rc;
397 }
398
mvs_get_ncq_tag(struct sas_task * task,u32 * tag)399 static u32 mvs_get_ncq_tag(struct sas_task *task, u32 *tag)
400 {
401 struct ata_queued_cmd *qc = task->uldd_task;
402
403 if (qc) {
404 if (qc->tf.command == ATA_CMD_FPDMA_WRITE ||
405 qc->tf.command == ATA_CMD_FPDMA_READ ||
406 qc->tf.command == ATA_CMD_FPDMA_RECV ||
407 qc->tf.command == ATA_CMD_FPDMA_SEND ||
408 qc->tf.command == ATA_CMD_NCQ_NON_DATA) {
409 *tag = qc->tag;
410 return 1;
411 }
412 }
413
414 return 0;
415 }
416
mvs_task_prep_ata(struct mvs_info * mvi,struct mvs_task_exec_info * tei)417 static int mvs_task_prep_ata(struct mvs_info *mvi,
418 struct mvs_task_exec_info *tei)
419 {
420 struct sas_task *task = tei->task;
421 struct domain_device *dev = task->dev;
422 struct mvs_device *mvi_dev = dev->lldd_dev;
423 struct mvs_cmd_hdr *hdr = tei->hdr;
424 struct asd_sas_port *sas_port = dev->port;
425 struct mvs_slot_info *slot;
426 void *buf_prd;
427 u32 tag = tei->tag, hdr_tag;
428 u32 flags, del_q;
429 void *buf_tmp;
430 u8 *buf_cmd, *buf_oaf;
431 dma_addr_t buf_tmp_dma;
432 u32 i, req_len, resp_len;
433 const u32 max_resp_len = SB_RFB_MAX;
434
435 if (mvs_assign_reg_set(mvi, mvi_dev) == MVS_ID_NOT_MAPPED) {
436 mv_dprintk("Have not enough regiset for dev %d.\n",
437 mvi_dev->device_id);
438 return -EBUSY;
439 }
440 slot = &mvi->slot_info[tag];
441 slot->tx = mvi->tx_prod;
442 del_q = TXQ_MODE_I | tag |
443 (TXQ_CMD_STP << TXQ_CMD_SHIFT) |
444 ((sas_port->phy_mask & TXQ_PHY_MASK) << TXQ_PHY_SHIFT) |
445 (mvi_dev->taskfileset << TXQ_SRS_SHIFT);
446 mvi->tx[mvi->tx_prod] = cpu_to_le32(del_q);
447
448 if (task->data_dir == DMA_FROM_DEVICE)
449 flags = (MVS_CHIP_DISP->prd_count() << MCH_PRD_LEN_SHIFT);
450 else
451 flags = (tei->n_elem << MCH_PRD_LEN_SHIFT);
452
453 if (task->ata_task.use_ncq)
454 flags |= MCH_FPDMA;
455 if (dev->sata_dev.class == ATA_DEV_ATAPI) {
456 if (task->ata_task.fis.command != ATA_CMD_ID_ATAPI)
457 flags |= MCH_ATAPI;
458 }
459
460 hdr->flags = cpu_to_le32(flags);
461
462 if (task->ata_task.use_ncq && mvs_get_ncq_tag(task, &hdr_tag))
463 task->ata_task.fis.sector_count |= (u8) (hdr_tag << 3);
464 else
465 hdr_tag = tag;
466
467 hdr->tags = cpu_to_le32(hdr_tag);
468
469 hdr->data_len = cpu_to_le32(task->total_xfer_len);
470
471 /*
472 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs
473 */
474
475 /* region 1: command table area (MVS_ATA_CMD_SZ bytes) ************** */
476 buf_cmd = buf_tmp = slot->buf;
477 buf_tmp_dma = slot->buf_dma;
478
479 hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma);
480
481 buf_tmp += MVS_ATA_CMD_SZ;
482 buf_tmp_dma += MVS_ATA_CMD_SZ;
483
484 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */
485 /* used for STP. unused for SATA? */
486 buf_oaf = buf_tmp;
487 hdr->open_frame = cpu_to_le64(buf_tmp_dma);
488
489 buf_tmp += MVS_OAF_SZ;
490 buf_tmp_dma += MVS_OAF_SZ;
491
492 /* region 3: PRD table ********************************************* */
493 buf_prd = buf_tmp;
494
495 if (tei->n_elem)
496 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma);
497 else
498 hdr->prd_tbl = 0;
499 i = MVS_CHIP_DISP->prd_size() * MVS_CHIP_DISP->prd_count();
500
501 buf_tmp += i;
502 buf_tmp_dma += i;
503
504 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */
505 slot->response = buf_tmp;
506 hdr->status_buf = cpu_to_le64(buf_tmp_dma);
507 if (mvi->flags & MVF_FLAG_SOC)
508 hdr->reserved[0] = 0;
509
510 req_len = sizeof(struct host_to_dev_fis);
511 resp_len = MVS_SLOT_BUF_SZ - MVS_ATA_CMD_SZ -
512 sizeof(struct mvs_err_info) - i;
513
514 /* request, response lengths */
515 resp_len = min(resp_len, max_resp_len);
516 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | (req_len / 4));
517
518 if (likely(!task->ata_task.device_control_reg_update))
519 task->ata_task.fis.flags |= 0x80; /* C=1: update ATA cmd reg */
520 /* fill in command FIS and ATAPI CDB */
521 memcpy(buf_cmd, &task->ata_task.fis, sizeof(struct host_to_dev_fis));
522 if (dev->sata_dev.class == ATA_DEV_ATAPI)
523 memcpy(buf_cmd + STP_ATAPI_CMD,
524 task->ata_task.atapi_packet, 16);
525
526 /* generate open address frame hdr (first 12 bytes) */
527 /* initiator, STP, ftype 1h */
528 buf_oaf[0] = (1 << 7) | (PROTOCOL_STP << 4) | 0x1;
529 buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf;
530 *(u16 *)(buf_oaf + 2) = cpu_to_be16(mvi_dev->device_id + 1);
531 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE);
532
533 /* fill in PRD (scatter/gather) table, if any */
534 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd);
535
536 if (task->data_dir == DMA_FROM_DEVICE)
537 MVS_CHIP_DISP->dma_fix(mvi, sas_port->phy_mask,
538 TRASH_BUCKET_SIZE, tei->n_elem, buf_prd);
539
540 return 0;
541 }
542
mvs_task_prep_ssp(struct mvs_info * mvi,struct mvs_task_exec_info * tei,int is_tmf,struct sas_tmf_task * tmf)543 static int mvs_task_prep_ssp(struct mvs_info *mvi,
544 struct mvs_task_exec_info *tei, int is_tmf,
545 struct sas_tmf_task *tmf)
546 {
547 struct sas_task *task = tei->task;
548 struct mvs_cmd_hdr *hdr = tei->hdr;
549 struct mvs_port *port = tei->port;
550 struct domain_device *dev = task->dev;
551 struct mvs_device *mvi_dev = dev->lldd_dev;
552 struct asd_sas_port *sas_port = dev->port;
553 struct mvs_slot_info *slot;
554 void *buf_prd;
555 struct ssp_frame_hdr *ssp_hdr;
556 void *buf_tmp;
557 u8 *buf_cmd, *buf_oaf;
558 dma_addr_t buf_tmp_dma;
559 u32 flags;
560 u32 resp_len, req_len, i, tag = tei->tag;
561 const u32 max_resp_len = SB_RFB_MAX;
562 u32 phy_mask;
563
564 slot = &mvi->slot_info[tag];
565
566 phy_mask = ((port->wide_port_phymap) ? port->wide_port_phymap :
567 sas_port->phy_mask) & TXQ_PHY_MASK;
568
569 slot->tx = mvi->tx_prod;
570 mvi->tx[mvi->tx_prod] = cpu_to_le32(TXQ_MODE_I | tag |
571 (TXQ_CMD_SSP << TXQ_CMD_SHIFT) |
572 (phy_mask << TXQ_PHY_SHIFT));
573
574 flags = MCH_RETRY;
575 if (is_tmf)
576 flags |= (MCH_SSP_FR_TASK << MCH_SSP_FR_TYPE_SHIFT);
577 else
578 flags |= (MCH_SSP_FR_CMD << MCH_SSP_FR_TYPE_SHIFT);
579
580 hdr->flags = cpu_to_le32(flags | (tei->n_elem << MCH_PRD_LEN_SHIFT));
581 hdr->tags = cpu_to_le32(tag);
582 hdr->data_len = cpu_to_le32(task->total_xfer_len);
583
584 /*
585 * arrange MVS_SLOT_BUF_SZ-sized DMA buffer according to our needs
586 */
587
588 /* region 1: command table area (MVS_SSP_CMD_SZ bytes) ************** */
589 buf_cmd = buf_tmp = slot->buf;
590 buf_tmp_dma = slot->buf_dma;
591
592 hdr->cmd_tbl = cpu_to_le64(buf_tmp_dma);
593
594 buf_tmp += MVS_SSP_CMD_SZ;
595 buf_tmp_dma += MVS_SSP_CMD_SZ;
596
597 /* region 2: open address frame area (MVS_OAF_SZ bytes) ********* */
598 buf_oaf = buf_tmp;
599 hdr->open_frame = cpu_to_le64(buf_tmp_dma);
600
601 buf_tmp += MVS_OAF_SZ;
602 buf_tmp_dma += MVS_OAF_SZ;
603
604 /* region 3: PRD table ********************************************* */
605 buf_prd = buf_tmp;
606 if (tei->n_elem)
607 hdr->prd_tbl = cpu_to_le64(buf_tmp_dma);
608 else
609 hdr->prd_tbl = 0;
610
611 i = MVS_CHIP_DISP->prd_size() * tei->n_elem;
612 buf_tmp += i;
613 buf_tmp_dma += i;
614
615 /* region 4: status buffer (larger the PRD, smaller this buf) ****** */
616 slot->response = buf_tmp;
617 hdr->status_buf = cpu_to_le64(buf_tmp_dma);
618 if (mvi->flags & MVF_FLAG_SOC)
619 hdr->reserved[0] = 0;
620
621 resp_len = MVS_SLOT_BUF_SZ - MVS_SSP_CMD_SZ - MVS_OAF_SZ -
622 sizeof(struct mvs_err_info) - i;
623 resp_len = min(resp_len, max_resp_len);
624
625 req_len = sizeof(struct ssp_frame_hdr) + 28;
626
627 /* request, response lengths */
628 hdr->lens = cpu_to_le32(((resp_len / 4) << 16) | (req_len / 4));
629
630 /* generate open address frame hdr (first 12 bytes) */
631 /* initiator, SSP, ftype 1h */
632 buf_oaf[0] = (1 << 7) | (PROTOCOL_SSP << 4) | 0x1;
633 buf_oaf[1] = min(sas_port->linkrate, dev->linkrate) & 0xf;
634 *(u16 *)(buf_oaf + 2) = cpu_to_be16(mvi_dev->device_id + 1);
635 memcpy(buf_oaf + 4, dev->sas_addr, SAS_ADDR_SIZE);
636
637 /* fill in SSP frame header (Command Table.SSP frame header) */
638 ssp_hdr = (struct ssp_frame_hdr *)buf_cmd;
639
640 if (is_tmf)
641 ssp_hdr->frame_type = SSP_TASK;
642 else
643 ssp_hdr->frame_type = SSP_COMMAND;
644
645 memcpy(ssp_hdr->hashed_dest_addr, dev->hashed_sas_addr,
646 HASHED_SAS_ADDR_SIZE);
647 memcpy(ssp_hdr->hashed_src_addr,
648 dev->hashed_sas_addr, HASHED_SAS_ADDR_SIZE);
649 ssp_hdr->tag = cpu_to_be16(tag);
650
651 /* fill in IU for TASK and Command Frame */
652 buf_cmd += sizeof(*ssp_hdr);
653 memcpy(buf_cmd, &task->ssp_task.LUN, 8);
654
655 if (ssp_hdr->frame_type != SSP_TASK) {
656 buf_cmd[9] = task->ssp_task.task_attr;
657 memcpy(buf_cmd + 12, task->ssp_task.cmd->cmnd,
658 task->ssp_task.cmd->cmd_len);
659 } else{
660 buf_cmd[10] = tmf->tmf;
661 switch (tmf->tmf) {
662 case TMF_ABORT_TASK:
663 case TMF_QUERY_TASK:
664 buf_cmd[12] =
665 (tmf->tag_of_task_to_be_managed >> 8) & 0xff;
666 buf_cmd[13] =
667 tmf->tag_of_task_to_be_managed & 0xff;
668 break;
669 default:
670 break;
671 }
672 }
673 /* fill in PRD (scatter/gather) table, if any */
674 MVS_CHIP_DISP->make_prd(task->scatter, tei->n_elem, buf_prd);
675 return 0;
676 }
677
678 #define DEV_IS_GONE(mvi_dev) ((!mvi_dev || (mvi_dev->dev_type == SAS_PHY_UNUSED)))
mvs_task_prep(struct sas_task * task,struct mvs_info * mvi,int is_tmf,struct sas_tmf_task * tmf,int * pass)679 static int mvs_task_prep(struct sas_task *task, struct mvs_info *mvi, int is_tmf,
680 struct sas_tmf_task *tmf, int *pass)
681 {
682 struct domain_device *dev = task->dev;
683 struct mvs_device *mvi_dev = dev->lldd_dev;
684 struct mvs_task_exec_info tei;
685 struct mvs_slot_info *slot;
686 u32 tag = 0xdeadbeef, n_elem = 0;
687 struct request *rq;
688 int rc = 0;
689
690 if (!dev->port) {
691 struct task_status_struct *tsm = &task->task_status;
692
693 tsm->resp = SAS_TASK_UNDELIVERED;
694 tsm->stat = SAS_PHY_DOWN;
695 /*
696 * libsas will use dev->port, should
697 * not call task_done for sata
698 */
699 if (dev->dev_type != SAS_SATA_DEV)
700 task->task_done(task);
701 return rc;
702 }
703
704 if (DEV_IS_GONE(mvi_dev)) {
705 if (mvi_dev)
706 mv_dprintk("device %d not ready.\n",
707 mvi_dev->device_id);
708 else
709 mv_dprintk("device %016llx not ready.\n",
710 SAS_ADDR(dev->sas_addr));
711
712 rc = SAS_PHY_DOWN;
713 return rc;
714 }
715 tei.port = dev->port->lldd_port;
716 if (tei.port && !tei.port->port_attached && !tmf) {
717 if (sas_protocol_ata(task->task_proto)) {
718 struct task_status_struct *ts = &task->task_status;
719 mv_dprintk("SATA/STP port %d does not attach"
720 "device.\n", dev->port->id);
721 ts->resp = SAS_TASK_COMPLETE;
722 ts->stat = SAS_PHY_DOWN;
723
724 task->task_done(task);
725
726 } else {
727 struct task_status_struct *ts = &task->task_status;
728 mv_dprintk("SAS port %d does not attach"
729 "device.\n", dev->port->id);
730 ts->resp = SAS_TASK_UNDELIVERED;
731 ts->stat = SAS_PHY_DOWN;
732 task->task_done(task);
733 }
734 return rc;
735 }
736
737 if (!sas_protocol_ata(task->task_proto)) {
738 if (task->num_scatter) {
739 n_elem = dma_map_sg(mvi->dev,
740 task->scatter,
741 task->num_scatter,
742 task->data_dir);
743 if (!n_elem) {
744 rc = -ENOMEM;
745 goto prep_out;
746 }
747 }
748 } else {
749 n_elem = task->num_scatter;
750 }
751
752 rq = sas_task_find_rq(task);
753 if (rq) {
754 tag = rq->tag + MVS_RSVD_SLOTS;
755 } else {
756 rc = mvs_tag_alloc(mvi, &tag);
757 if (rc)
758 goto err_out;
759 }
760
761 slot = &mvi->slot_info[tag];
762
763 task->lldd_task = NULL;
764 slot->n_elem = n_elem;
765 slot->slot_tag = tag;
766
767 slot->buf = dma_pool_zalloc(mvi->dma_pool, GFP_ATOMIC, &slot->buf_dma);
768 if (!slot->buf) {
769 rc = -ENOMEM;
770 goto err_out_tag;
771 }
772
773 tei.task = task;
774 tei.hdr = &mvi->slot[tag];
775 tei.tag = tag;
776 tei.n_elem = n_elem;
777 switch (task->task_proto) {
778 case SAS_PROTOCOL_SMP:
779 rc = mvs_task_prep_smp(mvi, &tei);
780 break;
781 case SAS_PROTOCOL_SSP:
782 rc = mvs_task_prep_ssp(mvi, &tei, is_tmf, tmf);
783 break;
784 case SAS_PROTOCOL_SATA:
785 case SAS_PROTOCOL_STP:
786 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP:
787 rc = mvs_task_prep_ata(mvi, &tei);
788 break;
789 default:
790 dev_printk(KERN_ERR, mvi->dev,
791 "unknown sas_task proto: 0x%x\n",
792 task->task_proto);
793 rc = -EINVAL;
794 break;
795 }
796
797 if (rc) {
798 mv_dprintk("rc is %x\n", rc);
799 goto err_out_slot_buf;
800 }
801 slot->task = task;
802 slot->port = tei.port;
803 task->lldd_task = slot;
804 list_add_tail(&slot->entry, &tei.port->list);
805
806 mvi_dev->running_req++;
807 ++(*pass);
808 mvi->tx_prod = (mvi->tx_prod + 1) & (MVS_CHIP_SLOT_SZ - 1);
809
810 return rc;
811
812 err_out_slot_buf:
813 dma_pool_free(mvi->dma_pool, slot->buf, slot->buf_dma);
814 err_out_tag:
815 mvs_tag_free(mvi, tag);
816 err_out:
817
818 dev_printk(KERN_ERR, mvi->dev, "mvsas prep failed[%d]!\n", rc);
819 if (!sas_protocol_ata(task->task_proto))
820 if (n_elem)
821 dma_unmap_sg(mvi->dev, task->scatter, n_elem,
822 task->data_dir);
823 prep_out:
824 return rc;
825 }
826
mvs_queue_command(struct sas_task * task,gfp_t gfp_flags)827 int mvs_queue_command(struct sas_task *task, gfp_t gfp_flags)
828 {
829 struct mvs_info *mvi = NULL;
830 u32 rc = 0;
831 u32 pass = 0;
832 unsigned long flags = 0;
833 struct sas_tmf_task *tmf = task->tmf;
834 int is_tmf = !!task->tmf;
835
836 mvi = ((struct mvs_device *)task->dev->lldd_dev)->mvi_info;
837
838 spin_lock_irqsave(&mvi->lock, flags);
839 rc = mvs_task_prep(task, mvi, is_tmf, tmf, &pass);
840 if (rc)
841 dev_printk(KERN_ERR, mvi->dev, "mvsas exec failed[%d]!\n", rc);
842
843 if (likely(pass))
844 MVS_CHIP_DISP->start_delivery(mvi, (mvi->tx_prod - 1) &
845 (MVS_CHIP_SLOT_SZ - 1));
846 spin_unlock_irqrestore(&mvi->lock, flags);
847
848 return rc;
849 }
850
mvs_slot_free(struct mvs_info * mvi,u32 rx_desc)851 static void mvs_slot_free(struct mvs_info *mvi, u32 rx_desc)
852 {
853 u32 slot_idx = rx_desc & RXQ_SLOT_MASK;
854 mvs_tag_free(mvi, slot_idx);
855 }
856
mvs_slot_task_free(struct mvs_info * mvi,struct sas_task * task,struct mvs_slot_info * slot,u32 slot_idx)857 static void mvs_slot_task_free(struct mvs_info *mvi, struct sas_task *task,
858 struct mvs_slot_info *slot, u32 slot_idx)
859 {
860 if (!slot)
861 return;
862 if (!slot->task)
863 return;
864 if (!sas_protocol_ata(task->task_proto))
865 if (slot->n_elem)
866 dma_unmap_sg(mvi->dev, task->scatter,
867 slot->n_elem, task->data_dir);
868
869 switch (task->task_proto) {
870 case SAS_PROTOCOL_SMP:
871 dma_unmap_sg(mvi->dev, &task->smp_task.smp_resp, 1,
872 DMA_FROM_DEVICE);
873 dma_unmap_sg(mvi->dev, &task->smp_task.smp_req, 1,
874 DMA_TO_DEVICE);
875 break;
876
877 case SAS_PROTOCOL_SATA:
878 case SAS_PROTOCOL_STP:
879 case SAS_PROTOCOL_SSP:
880 default:
881 /* do nothing */
882 break;
883 }
884
885 if (slot->buf) {
886 dma_pool_free(mvi->dma_pool, slot->buf, slot->buf_dma);
887 slot->buf = NULL;
888 }
889 list_del_init(&slot->entry);
890 task->lldd_task = NULL;
891 slot->task = NULL;
892 slot->port = NULL;
893 slot->slot_tag = 0xFFFFFFFF;
894 mvs_slot_free(mvi, slot_idx);
895 }
896
mvs_update_wideport(struct mvs_info * mvi,int phy_no)897 static void mvs_update_wideport(struct mvs_info *mvi, int phy_no)
898 {
899 struct mvs_phy *phy = &mvi->phy[phy_no];
900 struct mvs_port *port = phy->port;
901 int j, no;
902
903 for_each_phy(port->wide_port_phymap, j, no) {
904 if (j & 1) {
905 MVS_CHIP_DISP->write_port_cfg_addr(mvi, no,
906 PHYR_WIDE_PORT);
907 MVS_CHIP_DISP->write_port_cfg_data(mvi, no,
908 port->wide_port_phymap);
909 } else {
910 MVS_CHIP_DISP->write_port_cfg_addr(mvi, no,
911 PHYR_WIDE_PORT);
912 MVS_CHIP_DISP->write_port_cfg_data(mvi, no,
913 0);
914 }
915 }
916 }
917
mvs_is_phy_ready(struct mvs_info * mvi,int i)918 static u32 mvs_is_phy_ready(struct mvs_info *mvi, int i)
919 {
920 u32 tmp;
921 struct mvs_phy *phy = &mvi->phy[i];
922 struct mvs_port *port = phy->port;
923
924 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, i);
925 if ((tmp & PHY_READY_MASK) && !(phy->irq_status & PHYEV_POOF)) {
926 if (!port)
927 phy->phy_attached = 1;
928 return tmp;
929 }
930
931 if (port) {
932 if (phy->phy_type & PORT_TYPE_SAS) {
933 port->wide_port_phymap &= ~(1U << i);
934 if (!port->wide_port_phymap)
935 port->port_attached = 0;
936 mvs_update_wideport(mvi, i);
937 } else if (phy->phy_type & PORT_TYPE_SATA)
938 port->port_attached = 0;
939 phy->port = NULL;
940 phy->phy_attached = 0;
941 phy->phy_type &= ~(PORT_TYPE_SAS | PORT_TYPE_SATA);
942 }
943 return 0;
944 }
945
mvs_get_d2h_reg(struct mvs_info * mvi,int i,void * buf)946 static void *mvs_get_d2h_reg(struct mvs_info *mvi, int i, void *buf)
947 {
948 u32 *s = (u32 *) buf;
949
950 if (!s)
951 return NULL;
952
953 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG3);
954 s[3] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i));
955
956 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG2);
957 s[2] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i));
958
959 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG1);
960 s[1] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i));
961
962 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_SATA_SIG0);
963 s[0] = cpu_to_le32(MVS_CHIP_DISP->read_port_cfg_data(mvi, i));
964
965 if (((s[1] & 0x00FFFFFF) == 0x00EB1401) && (*(u8 *)&s[3] == 0x01))
966 s[1] = 0x00EB1401 | (*((u8 *)&s[1] + 3) & 0x10);
967
968 return s;
969 }
970
mvs_is_sig_fis_received(u32 irq_status)971 static u32 mvs_is_sig_fis_received(u32 irq_status)
972 {
973 return irq_status & PHYEV_SIG_FIS;
974 }
975
mvs_sig_remove_timer(struct mvs_phy * phy)976 static void mvs_sig_remove_timer(struct mvs_phy *phy)
977 {
978 if (phy->timer.function)
979 del_timer(&phy->timer);
980 phy->timer.function = NULL;
981 }
982
mvs_update_phyinfo(struct mvs_info * mvi,int i,int get_st)983 void mvs_update_phyinfo(struct mvs_info *mvi, int i, int get_st)
984 {
985 struct mvs_phy *phy = &mvi->phy[i];
986 struct sas_identify_frame *id;
987
988 id = (struct sas_identify_frame *)phy->frame_rcvd;
989
990 if (get_st) {
991 phy->irq_status = MVS_CHIP_DISP->read_port_irq_stat(mvi, i);
992 phy->phy_status = mvs_is_phy_ready(mvi, i);
993 }
994
995 if (phy->phy_status) {
996 int oob_done = 0;
997 struct asd_sas_phy *sas_phy = &mvi->phy[i].sas_phy;
998
999 oob_done = MVS_CHIP_DISP->oob_done(mvi, i);
1000
1001 MVS_CHIP_DISP->fix_phy_info(mvi, i, id);
1002 if (phy->phy_type & PORT_TYPE_SATA) {
1003 phy->identify.target_port_protocols = SAS_PROTOCOL_STP;
1004 if (mvs_is_sig_fis_received(phy->irq_status)) {
1005 mvs_sig_remove_timer(phy);
1006 phy->phy_attached = 1;
1007 phy->att_dev_sas_addr =
1008 i + mvi->id * mvi->chip->n_phy;
1009 if (oob_done)
1010 sas_phy->oob_mode = SATA_OOB_MODE;
1011 phy->frame_rcvd_size =
1012 sizeof(struct dev_to_host_fis);
1013 mvs_get_d2h_reg(mvi, i, id);
1014 } else {
1015 u32 tmp;
1016 dev_printk(KERN_DEBUG, mvi->dev,
1017 "Phy%d : No sig fis\n", i);
1018 tmp = MVS_CHIP_DISP->read_port_irq_mask(mvi, i);
1019 MVS_CHIP_DISP->write_port_irq_mask(mvi, i,
1020 tmp | PHYEV_SIG_FIS);
1021 phy->phy_attached = 0;
1022 phy->phy_type &= ~PORT_TYPE_SATA;
1023 goto out_done;
1024 }
1025 } else if (phy->phy_type & PORT_TYPE_SAS
1026 || phy->att_dev_info & PORT_SSP_INIT_MASK) {
1027 phy->phy_attached = 1;
1028 phy->identify.device_type =
1029 phy->att_dev_info & PORT_DEV_TYPE_MASK;
1030
1031 if (phy->identify.device_type == SAS_END_DEVICE)
1032 phy->identify.target_port_protocols =
1033 SAS_PROTOCOL_SSP;
1034 else if (phy->identify.device_type != SAS_PHY_UNUSED)
1035 phy->identify.target_port_protocols =
1036 SAS_PROTOCOL_SMP;
1037 if (oob_done)
1038 sas_phy->oob_mode = SAS_OOB_MODE;
1039 phy->frame_rcvd_size =
1040 sizeof(struct sas_identify_frame);
1041 }
1042 memcpy(sas_phy->attached_sas_addr,
1043 &phy->att_dev_sas_addr, SAS_ADDR_SIZE);
1044
1045 if (MVS_CHIP_DISP->phy_work_around)
1046 MVS_CHIP_DISP->phy_work_around(mvi, i);
1047 }
1048 mv_dprintk("phy %d attach dev info is %x\n",
1049 i + mvi->id * mvi->chip->n_phy, phy->att_dev_info);
1050 mv_dprintk("phy %d attach sas addr is %llx\n",
1051 i + mvi->id * mvi->chip->n_phy, phy->att_dev_sas_addr);
1052 out_done:
1053 if (get_st)
1054 MVS_CHIP_DISP->write_port_irq_stat(mvi, i, phy->irq_status);
1055 }
1056
mvs_port_notify_formed(struct asd_sas_phy * sas_phy,int lock)1057 static void mvs_port_notify_formed(struct asd_sas_phy *sas_phy, int lock)
1058 {
1059 struct sas_ha_struct *sas_ha = sas_phy->ha;
1060 struct mvs_info *mvi = NULL; int i = 0, hi;
1061 struct mvs_phy *phy = sas_phy->lldd_phy;
1062 struct asd_sas_port *sas_port = sas_phy->port;
1063 struct mvs_port *port;
1064 unsigned long flags = 0;
1065 if (!sas_port)
1066 return;
1067
1068 while (sas_ha->sas_phy[i]) {
1069 if (sas_ha->sas_phy[i] == sas_phy)
1070 break;
1071 i++;
1072 }
1073 hi = i/((struct mvs_prv_info *)sas_ha->lldd_ha)->n_phy;
1074 mvi = ((struct mvs_prv_info *)sas_ha->lldd_ha)->mvi[hi];
1075 if (i >= mvi->chip->n_phy)
1076 port = &mvi->port[i - mvi->chip->n_phy];
1077 else
1078 port = &mvi->port[i];
1079 if (lock)
1080 spin_lock_irqsave(&mvi->lock, flags);
1081 port->port_attached = 1;
1082 phy->port = port;
1083 sas_port->lldd_port = port;
1084 if (phy->phy_type & PORT_TYPE_SAS) {
1085 port->wide_port_phymap = sas_port->phy_mask;
1086 mv_printk("set wide port phy map %x\n", sas_port->phy_mask);
1087 mvs_update_wideport(mvi, sas_phy->id);
1088
1089 /* direct attached SAS device */
1090 if (phy->att_dev_info & PORT_SSP_TRGT_MASK) {
1091 MVS_CHIP_DISP->write_port_cfg_addr(mvi, i, PHYR_PHY_STAT);
1092 MVS_CHIP_DISP->write_port_cfg_data(mvi, i, 0x04);
1093 }
1094 }
1095 if (lock)
1096 spin_unlock_irqrestore(&mvi->lock, flags);
1097 }
1098
mvs_port_notify_deformed(struct asd_sas_phy * sas_phy,int lock)1099 static void mvs_port_notify_deformed(struct asd_sas_phy *sas_phy, int lock)
1100 {
1101 struct domain_device *dev;
1102 struct mvs_phy *phy = sas_phy->lldd_phy;
1103 struct mvs_info *mvi = phy->mvi;
1104 struct asd_sas_port *port = sas_phy->port;
1105 int phy_no = 0;
1106
1107 while (phy != &mvi->phy[phy_no]) {
1108 phy_no++;
1109 if (phy_no >= MVS_MAX_PHYS)
1110 return;
1111 }
1112 list_for_each_entry(dev, &port->dev_list, dev_list_node)
1113 mvs_do_release_task(phy->mvi, phy_no, dev);
1114
1115 }
1116
1117
mvs_port_formed(struct asd_sas_phy * sas_phy)1118 void mvs_port_formed(struct asd_sas_phy *sas_phy)
1119 {
1120 mvs_port_notify_formed(sas_phy, 1);
1121 }
1122
mvs_port_deformed(struct asd_sas_phy * sas_phy)1123 void mvs_port_deformed(struct asd_sas_phy *sas_phy)
1124 {
1125 mvs_port_notify_deformed(sas_phy, 1);
1126 }
1127
mvs_alloc_dev(struct mvs_info * mvi)1128 static struct mvs_device *mvs_alloc_dev(struct mvs_info *mvi)
1129 {
1130 u32 dev;
1131 for (dev = 0; dev < MVS_MAX_DEVICES; dev++) {
1132 if (mvi->devices[dev].dev_type == SAS_PHY_UNUSED) {
1133 mvi->devices[dev].device_id = dev;
1134 return &mvi->devices[dev];
1135 }
1136 }
1137
1138 if (dev == MVS_MAX_DEVICES)
1139 mv_printk("max support %d devices, ignore ..\n",
1140 MVS_MAX_DEVICES);
1141
1142 return NULL;
1143 }
1144
mvs_free_dev(struct mvs_device * mvi_dev)1145 static void mvs_free_dev(struct mvs_device *mvi_dev)
1146 {
1147 u32 id = mvi_dev->device_id;
1148 memset(mvi_dev, 0, sizeof(*mvi_dev));
1149 mvi_dev->device_id = id;
1150 mvi_dev->dev_type = SAS_PHY_UNUSED;
1151 mvi_dev->dev_status = MVS_DEV_NORMAL;
1152 mvi_dev->taskfileset = MVS_ID_NOT_MAPPED;
1153 }
1154
mvs_dev_found_notify(struct domain_device * dev,int lock)1155 static int mvs_dev_found_notify(struct domain_device *dev, int lock)
1156 {
1157 unsigned long flags = 0;
1158 int res = 0;
1159 struct mvs_info *mvi = NULL;
1160 struct domain_device *parent_dev = dev->parent;
1161 struct mvs_device *mvi_device;
1162
1163 mvi = mvs_find_dev_mvi(dev);
1164
1165 if (lock)
1166 spin_lock_irqsave(&mvi->lock, flags);
1167
1168 mvi_device = mvs_alloc_dev(mvi);
1169 if (!mvi_device) {
1170 res = -1;
1171 goto found_out;
1172 }
1173 dev->lldd_dev = mvi_device;
1174 mvi_device->dev_status = MVS_DEV_NORMAL;
1175 mvi_device->dev_type = dev->dev_type;
1176 mvi_device->mvi_info = mvi;
1177 mvi_device->sas_device = dev;
1178 if (parent_dev && dev_is_expander(parent_dev->dev_type)) {
1179 int phy_id;
1180
1181 phy_id = sas_find_attached_phy_id(&parent_dev->ex_dev, dev);
1182 if (phy_id < 0) {
1183 mv_printk("Error: no attached dev:%016llx"
1184 "at ex:%016llx.\n",
1185 SAS_ADDR(dev->sas_addr),
1186 SAS_ADDR(parent_dev->sas_addr));
1187 res = phy_id;
1188 } else {
1189 mvi_device->attached_phy = phy_id;
1190 }
1191 }
1192
1193 found_out:
1194 if (lock)
1195 spin_unlock_irqrestore(&mvi->lock, flags);
1196 return res;
1197 }
1198
mvs_dev_found(struct domain_device * dev)1199 int mvs_dev_found(struct domain_device *dev)
1200 {
1201 return mvs_dev_found_notify(dev, 1);
1202 }
1203
mvs_dev_gone_notify(struct domain_device * dev)1204 static void mvs_dev_gone_notify(struct domain_device *dev)
1205 {
1206 unsigned long flags = 0;
1207 struct mvs_device *mvi_dev = dev->lldd_dev;
1208 struct mvs_info *mvi;
1209
1210 if (!mvi_dev) {
1211 mv_dprintk("found dev has gone.\n");
1212 return;
1213 }
1214
1215 mvi = mvi_dev->mvi_info;
1216
1217 spin_lock_irqsave(&mvi->lock, flags);
1218
1219 mv_dprintk("found dev[%d:%x] is gone.\n",
1220 mvi_dev->device_id, mvi_dev->dev_type);
1221 mvs_release_task(mvi, dev);
1222 mvs_free_reg_set(mvi, mvi_dev);
1223 mvs_free_dev(mvi_dev);
1224
1225 dev->lldd_dev = NULL;
1226 mvi_dev->sas_device = NULL;
1227
1228 spin_unlock_irqrestore(&mvi->lock, flags);
1229 }
1230
1231
mvs_dev_gone(struct domain_device * dev)1232 void mvs_dev_gone(struct domain_device *dev)
1233 {
1234 mvs_dev_gone_notify(dev);
1235 }
1236
1237 /* Standard mandates link reset for ATA (type 0)
1238 and hard reset for SSP (type 1) , only for RECOVERY */
mvs_debug_I_T_nexus_reset(struct domain_device * dev)1239 static int mvs_debug_I_T_nexus_reset(struct domain_device *dev)
1240 {
1241 int rc;
1242 struct sas_phy *phy = sas_get_local_phy(dev);
1243 int reset_type = (dev->dev_type == SAS_SATA_DEV ||
1244 (dev->tproto & SAS_PROTOCOL_STP)) ? 0 : 1;
1245 rc = sas_phy_reset(phy, reset_type);
1246 sas_put_local_phy(phy);
1247 msleep(2000);
1248 return rc;
1249 }
1250
1251 /* mandatory SAM-3 */
mvs_lu_reset(struct domain_device * dev,u8 * lun)1252 int mvs_lu_reset(struct domain_device *dev, u8 *lun)
1253 {
1254 unsigned long flags;
1255 int rc = TMF_RESP_FUNC_FAILED;
1256 struct mvs_device * mvi_dev = dev->lldd_dev;
1257 struct mvs_info *mvi = mvi_dev->mvi_info;
1258
1259 mvi_dev->dev_status = MVS_DEV_EH;
1260 rc = sas_lu_reset(dev, lun);
1261 if (rc == TMF_RESP_FUNC_COMPLETE) {
1262 spin_lock_irqsave(&mvi->lock, flags);
1263 mvs_release_task(mvi, dev);
1264 spin_unlock_irqrestore(&mvi->lock, flags);
1265 }
1266 /* If failed, fall-through I_T_Nexus reset */
1267 mv_printk("%s for device[%x]:rc= %d\n", __func__,
1268 mvi_dev->device_id, rc);
1269 return rc;
1270 }
1271
mvs_I_T_nexus_reset(struct domain_device * dev)1272 int mvs_I_T_nexus_reset(struct domain_device *dev)
1273 {
1274 unsigned long flags;
1275 int rc = TMF_RESP_FUNC_FAILED;
1276 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;
1277 struct mvs_info *mvi = mvi_dev->mvi_info;
1278
1279 if (mvi_dev->dev_status != MVS_DEV_EH)
1280 return TMF_RESP_FUNC_COMPLETE;
1281 else
1282 mvi_dev->dev_status = MVS_DEV_NORMAL;
1283 rc = mvs_debug_I_T_nexus_reset(dev);
1284 mv_printk("%s for device[%x]:rc= %d\n",
1285 __func__, mvi_dev->device_id, rc);
1286
1287 spin_lock_irqsave(&mvi->lock, flags);
1288 mvs_release_task(mvi, dev);
1289 spin_unlock_irqrestore(&mvi->lock, flags);
1290
1291 return rc;
1292 }
1293 /* optional SAM-3 */
mvs_query_task(struct sas_task * task)1294 int mvs_query_task(struct sas_task *task)
1295 {
1296 u32 tag;
1297 int rc = TMF_RESP_FUNC_FAILED;
1298
1299 if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) {
1300 struct domain_device *dev = task->dev;
1301 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;
1302 struct mvs_info *mvi = mvi_dev->mvi_info;
1303
1304 rc = mvs_find_tag(mvi, task, &tag);
1305 if (rc == 0) {
1306 rc = TMF_RESP_FUNC_FAILED;
1307 return rc;
1308 }
1309
1310 rc = sas_query_task(task, tag);
1311 switch (rc) {
1312 /* The task is still in Lun, release it then */
1313 case TMF_RESP_FUNC_SUCC:
1314 /* The task is not in Lun or failed, reset the phy */
1315 case TMF_RESP_FUNC_FAILED:
1316 case TMF_RESP_FUNC_COMPLETE:
1317 break;
1318 }
1319 }
1320 mv_printk("%s:rc= %d\n", __func__, rc);
1321 return rc;
1322 }
1323
1324 /* mandatory SAM-3, still need free task/slot info */
mvs_abort_task(struct sas_task * task)1325 int mvs_abort_task(struct sas_task *task)
1326 {
1327 struct domain_device *dev = task->dev;
1328 struct mvs_device *mvi_dev = (struct mvs_device *)dev->lldd_dev;
1329 struct mvs_info *mvi;
1330 int rc = TMF_RESP_FUNC_FAILED;
1331 unsigned long flags;
1332 u32 tag;
1333
1334 if (!mvi_dev) {
1335 mv_printk("Device has removed\n");
1336 return TMF_RESP_FUNC_FAILED;
1337 }
1338
1339 mvi = mvi_dev->mvi_info;
1340
1341 spin_lock_irqsave(&task->task_state_lock, flags);
1342 if (task->task_state_flags & SAS_TASK_STATE_DONE) {
1343 spin_unlock_irqrestore(&task->task_state_lock, flags);
1344 rc = TMF_RESP_FUNC_COMPLETE;
1345 goto out;
1346 }
1347 spin_unlock_irqrestore(&task->task_state_lock, flags);
1348 mvi_dev->dev_status = MVS_DEV_EH;
1349 if (task->lldd_task && task->task_proto & SAS_PROTOCOL_SSP) {
1350 rc = mvs_find_tag(mvi, task, &tag);
1351 if (rc == 0) {
1352 mv_printk("No such tag in %s\n", __func__);
1353 rc = TMF_RESP_FUNC_FAILED;
1354 return rc;
1355 }
1356
1357 rc = sas_abort_task(task, tag);
1358
1359 /* if successful, clear the task and callback forwards.*/
1360 if (rc == TMF_RESP_FUNC_COMPLETE) {
1361 u32 slot_no;
1362 struct mvs_slot_info *slot;
1363
1364 if (task->lldd_task) {
1365 slot = task->lldd_task;
1366 slot_no = (u32) (slot - mvi->slot_info);
1367 spin_lock_irqsave(&mvi->lock, flags);
1368 mvs_slot_complete(mvi, slot_no, 1);
1369 spin_unlock_irqrestore(&mvi->lock, flags);
1370 }
1371 }
1372
1373 } else if (task->task_proto & SAS_PROTOCOL_SATA ||
1374 task->task_proto & SAS_PROTOCOL_STP) {
1375 if (SAS_SATA_DEV == dev->dev_type) {
1376 struct mvs_slot_info *slot = task->lldd_task;
1377 u32 slot_idx = (u32)(slot - mvi->slot_info);
1378 mv_dprintk("mvs_abort_task() mvi=%p task=%p "
1379 "slot=%p slot_idx=x%x\n",
1380 mvi, task, slot, slot_idx);
1381 task->task_state_flags |= SAS_TASK_STATE_ABORTED;
1382 mvs_slot_task_free(mvi, task, slot, slot_idx);
1383 rc = TMF_RESP_FUNC_COMPLETE;
1384 goto out;
1385 }
1386
1387 }
1388 out:
1389 if (rc != TMF_RESP_FUNC_COMPLETE)
1390 mv_printk("%s:rc= %d\n", __func__, rc);
1391 return rc;
1392 }
1393
mvs_sata_done(struct mvs_info * mvi,struct sas_task * task,u32 slot_idx,int err)1394 static int mvs_sata_done(struct mvs_info *mvi, struct sas_task *task,
1395 u32 slot_idx, int err)
1396 {
1397 struct mvs_device *mvi_dev = task->dev->lldd_dev;
1398 struct task_status_struct *tstat = &task->task_status;
1399 struct ata_task_resp *resp = (struct ata_task_resp *)tstat->buf;
1400 int stat = SAM_STAT_GOOD;
1401
1402
1403 resp->frame_len = sizeof(struct dev_to_host_fis);
1404 memcpy(&resp->ending_fis[0],
1405 SATA_RECEIVED_D2H_FIS(mvi_dev->taskfileset),
1406 sizeof(struct dev_to_host_fis));
1407 tstat->buf_valid_size = sizeof(*resp);
1408 if (unlikely(err)) {
1409 if (unlikely(err & CMD_ISS_STPD))
1410 stat = SAS_OPEN_REJECT;
1411 else
1412 stat = SAS_PROTO_RESPONSE;
1413 }
1414
1415 return stat;
1416 }
1417
mvs_set_sense(u8 * buffer,int len,int d_sense,int key,int asc,int ascq)1418 static void mvs_set_sense(u8 *buffer, int len, int d_sense,
1419 int key, int asc, int ascq)
1420 {
1421 memset(buffer, 0, len);
1422
1423 if (d_sense) {
1424 /* Descriptor format */
1425 if (len < 4) {
1426 mv_printk("Length %d of sense buffer too small to "
1427 "fit sense %x:%x:%x", len, key, asc, ascq);
1428 }
1429
1430 buffer[0] = 0x72; /* Response Code */
1431 if (len > 1)
1432 buffer[1] = key; /* Sense Key */
1433 if (len > 2)
1434 buffer[2] = asc; /* ASC */
1435 if (len > 3)
1436 buffer[3] = ascq; /* ASCQ */
1437 } else {
1438 if (len < 14) {
1439 mv_printk("Length %d of sense buffer too small to "
1440 "fit sense %x:%x:%x", len, key, asc, ascq);
1441 }
1442
1443 buffer[0] = 0x70; /* Response Code */
1444 if (len > 2)
1445 buffer[2] = key; /* Sense Key */
1446 if (len > 7)
1447 buffer[7] = 0x0a; /* Additional Sense Length */
1448 if (len > 12)
1449 buffer[12] = asc; /* ASC */
1450 if (len > 13)
1451 buffer[13] = ascq; /* ASCQ */
1452 }
1453
1454 return;
1455 }
1456
mvs_fill_ssp_resp_iu(struct ssp_response_iu * iu,u8 key,u8 asc,u8 asc_q)1457 static void mvs_fill_ssp_resp_iu(struct ssp_response_iu *iu,
1458 u8 key, u8 asc, u8 asc_q)
1459 {
1460 iu->datapres = SAS_DATAPRES_SENSE_DATA;
1461 iu->response_data_len = 0;
1462 iu->sense_data_len = 17;
1463 iu->status = 02;
1464 mvs_set_sense(iu->sense_data, 17, 0,
1465 key, asc, asc_q);
1466 }
1467
mvs_slot_err(struct mvs_info * mvi,struct sas_task * task,u32 slot_idx)1468 static int mvs_slot_err(struct mvs_info *mvi, struct sas_task *task,
1469 u32 slot_idx)
1470 {
1471 struct mvs_slot_info *slot = &mvi->slot_info[slot_idx];
1472 int stat;
1473 u32 err_dw0 = le32_to_cpu(*(u32 *)slot->response);
1474 u32 err_dw1 = le32_to_cpu(*((u32 *)slot->response + 1));
1475 u32 tfs = 0;
1476 enum mvs_port_type type = PORT_TYPE_SAS;
1477
1478 if (err_dw0 & CMD_ISS_STPD)
1479 MVS_CHIP_DISP->issue_stop(mvi, type, tfs);
1480
1481 MVS_CHIP_DISP->command_active(mvi, slot_idx);
1482
1483 stat = SAM_STAT_CHECK_CONDITION;
1484 switch (task->task_proto) {
1485 case SAS_PROTOCOL_SSP:
1486 {
1487 stat = SAS_ABORTED_TASK;
1488 if ((err_dw0 & NO_DEST) || err_dw1 & bit(31)) {
1489 struct ssp_response_iu *iu = slot->response +
1490 sizeof(struct mvs_err_info);
1491 mvs_fill_ssp_resp_iu(iu, NOT_READY, 0x04, 01);
1492 sas_ssp_task_response(mvi->dev, task, iu);
1493 stat = SAM_STAT_CHECK_CONDITION;
1494 }
1495 if (err_dw1 & bit(31))
1496 mv_printk("reuse same slot, retry command.\n");
1497 break;
1498 }
1499 case SAS_PROTOCOL_SMP:
1500 stat = SAM_STAT_CHECK_CONDITION;
1501 break;
1502
1503 case SAS_PROTOCOL_SATA:
1504 case SAS_PROTOCOL_STP:
1505 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP:
1506 {
1507 task->ata_task.use_ncq = 0;
1508 stat = SAS_PROTO_RESPONSE;
1509 mvs_sata_done(mvi, task, slot_idx, err_dw0);
1510 }
1511 break;
1512 default:
1513 break;
1514 }
1515
1516 return stat;
1517 }
1518
mvs_slot_complete(struct mvs_info * mvi,u32 rx_desc,u32 flags)1519 int mvs_slot_complete(struct mvs_info *mvi, u32 rx_desc, u32 flags)
1520 {
1521 u32 slot_idx = rx_desc & RXQ_SLOT_MASK;
1522 struct mvs_slot_info *slot = &mvi->slot_info[slot_idx];
1523 struct sas_task *task = slot->task;
1524 struct mvs_device *mvi_dev = NULL;
1525 struct task_status_struct *tstat;
1526 struct domain_device *dev;
1527 u32 aborted;
1528
1529 void *to;
1530 enum exec_status sts;
1531
1532 if (unlikely(!task || !task->lldd_task || !task->dev))
1533 return -1;
1534
1535 tstat = &task->task_status;
1536 dev = task->dev;
1537 mvi_dev = dev->lldd_dev;
1538
1539 spin_lock(&task->task_state_lock);
1540 task->task_state_flags &= ~SAS_TASK_STATE_PENDING;
1541 task->task_state_flags |= SAS_TASK_STATE_DONE;
1542 /* race condition*/
1543 aborted = task->task_state_flags & SAS_TASK_STATE_ABORTED;
1544 spin_unlock(&task->task_state_lock);
1545
1546 memset(tstat, 0, sizeof(*tstat));
1547 tstat->resp = SAS_TASK_COMPLETE;
1548
1549 if (unlikely(aborted)) {
1550 tstat->stat = SAS_ABORTED_TASK;
1551 if (mvi_dev && mvi_dev->running_req)
1552 mvi_dev->running_req--;
1553 if (sas_protocol_ata(task->task_proto))
1554 mvs_free_reg_set(mvi, mvi_dev);
1555
1556 mvs_slot_task_free(mvi, task, slot, slot_idx);
1557 return -1;
1558 }
1559
1560 /* when no device attaching, go ahead and complete by error handling*/
1561 if (unlikely(!mvi_dev || flags)) {
1562 if (!mvi_dev)
1563 mv_dprintk("port has not device.\n");
1564 tstat->stat = SAS_PHY_DOWN;
1565 goto out;
1566 }
1567
1568 /*
1569 * error info record present; slot->response is 32 bit aligned but may
1570 * not be 64 bit aligned, so check for zero in two 32 bit reads
1571 */
1572 if (unlikely((rx_desc & RXQ_ERR)
1573 && (*((u32 *)slot->response)
1574 || *(((u32 *)slot->response) + 1)))) {
1575 mv_dprintk("port %d slot %d rx_desc %X has error info"
1576 "%016llX.\n", slot->port->sas_port.id, slot_idx,
1577 rx_desc, get_unaligned_le64(slot->response));
1578 tstat->stat = mvs_slot_err(mvi, task, slot_idx);
1579 tstat->resp = SAS_TASK_COMPLETE;
1580 goto out;
1581 }
1582
1583 switch (task->task_proto) {
1584 case SAS_PROTOCOL_SSP:
1585 /* hw says status == 0, datapres == 0 */
1586 if (rx_desc & RXQ_GOOD) {
1587 tstat->stat = SAS_SAM_STAT_GOOD;
1588 tstat->resp = SAS_TASK_COMPLETE;
1589 }
1590 /* response frame present */
1591 else if (rx_desc & RXQ_RSP) {
1592 struct ssp_response_iu *iu = slot->response +
1593 sizeof(struct mvs_err_info);
1594 sas_ssp_task_response(mvi->dev, task, iu);
1595 } else
1596 tstat->stat = SAS_SAM_STAT_CHECK_CONDITION;
1597 break;
1598
1599 case SAS_PROTOCOL_SMP: {
1600 struct scatterlist *sg_resp = &task->smp_task.smp_resp;
1601 tstat->stat = SAS_SAM_STAT_GOOD;
1602 to = kmap_atomic(sg_page(sg_resp));
1603 memcpy(to + sg_resp->offset,
1604 slot->response + sizeof(struct mvs_err_info),
1605 sg_dma_len(sg_resp));
1606 kunmap_atomic(to);
1607 break;
1608 }
1609
1610 case SAS_PROTOCOL_SATA:
1611 case SAS_PROTOCOL_STP:
1612 case SAS_PROTOCOL_SATA | SAS_PROTOCOL_STP: {
1613 tstat->stat = mvs_sata_done(mvi, task, slot_idx, 0);
1614 break;
1615 }
1616
1617 default:
1618 tstat->stat = SAS_SAM_STAT_CHECK_CONDITION;
1619 break;
1620 }
1621 if (!slot->port->port_attached) {
1622 mv_dprintk("port %d has removed.\n", slot->port->sas_port.id);
1623 tstat->stat = SAS_PHY_DOWN;
1624 }
1625
1626
1627 out:
1628 if (mvi_dev && mvi_dev->running_req) {
1629 mvi_dev->running_req--;
1630 if (sas_protocol_ata(task->task_proto) && !mvi_dev->running_req)
1631 mvs_free_reg_set(mvi, mvi_dev);
1632 }
1633 mvs_slot_task_free(mvi, task, slot, slot_idx);
1634 sts = tstat->stat;
1635
1636 spin_unlock(&mvi->lock);
1637 if (task->task_done)
1638 task->task_done(task);
1639
1640 spin_lock(&mvi->lock);
1641
1642 return sts;
1643 }
1644
mvs_do_release_task(struct mvs_info * mvi,int phy_no,struct domain_device * dev)1645 void mvs_do_release_task(struct mvs_info *mvi,
1646 int phy_no, struct domain_device *dev)
1647 {
1648 u32 slot_idx;
1649 struct mvs_phy *phy;
1650 struct mvs_port *port;
1651 struct mvs_slot_info *slot, *slot2;
1652
1653 phy = &mvi->phy[phy_no];
1654 port = phy->port;
1655 if (!port)
1656 return;
1657 /* clean cmpl queue in case request is already finished */
1658 mvs_int_rx(mvi, false);
1659
1660
1661
1662 list_for_each_entry_safe(slot, slot2, &port->list, entry) {
1663 struct sas_task *task;
1664 slot_idx = (u32) (slot - mvi->slot_info);
1665 task = slot->task;
1666
1667 if (dev && task->dev != dev)
1668 continue;
1669
1670 mv_printk("Release slot [%x] tag[%x], task [%p]:\n",
1671 slot_idx, slot->slot_tag, task);
1672 MVS_CHIP_DISP->command_active(mvi, slot_idx);
1673
1674 mvs_slot_complete(mvi, slot_idx, 1);
1675 }
1676 }
1677
mvs_release_task(struct mvs_info * mvi,struct domain_device * dev)1678 void mvs_release_task(struct mvs_info *mvi,
1679 struct domain_device *dev)
1680 {
1681 int i, phyno[WIDE_PORT_MAX_PHY], num;
1682 num = mvs_find_dev_phyno(dev, phyno);
1683 for (i = 0; i < num; i++)
1684 mvs_do_release_task(mvi, phyno[i], dev);
1685 }
1686
mvs_phy_disconnected(struct mvs_phy * phy)1687 static void mvs_phy_disconnected(struct mvs_phy *phy)
1688 {
1689 phy->phy_attached = 0;
1690 phy->att_dev_info = 0;
1691 phy->att_dev_sas_addr = 0;
1692 }
1693
mvs_work_queue(struct work_struct * work)1694 static void mvs_work_queue(struct work_struct *work)
1695 {
1696 struct delayed_work *dw = container_of(work, struct delayed_work, work);
1697 struct mvs_wq *mwq = container_of(dw, struct mvs_wq, work_q);
1698 struct mvs_info *mvi = mwq->mvi;
1699 unsigned long flags;
1700 u32 phy_no = (unsigned long) mwq->data;
1701 struct mvs_phy *phy = &mvi->phy[phy_no];
1702 struct asd_sas_phy *sas_phy = &phy->sas_phy;
1703
1704 spin_lock_irqsave(&mvi->lock, flags);
1705 if (mwq->handler & PHY_PLUG_EVENT) {
1706
1707 if (phy->phy_event & PHY_PLUG_OUT) {
1708 u32 tmp;
1709
1710 tmp = MVS_CHIP_DISP->read_phy_ctl(mvi, phy_no);
1711 phy->phy_event &= ~PHY_PLUG_OUT;
1712 if (!(tmp & PHY_READY_MASK)) {
1713 sas_phy_disconnected(sas_phy);
1714 mvs_phy_disconnected(phy);
1715 sas_notify_phy_event(sas_phy,
1716 PHYE_LOSS_OF_SIGNAL, GFP_ATOMIC);
1717 mv_dprintk("phy%d Removed Device\n", phy_no);
1718 } else {
1719 MVS_CHIP_DISP->detect_porttype(mvi, phy_no);
1720 mvs_update_phyinfo(mvi, phy_no, 1);
1721 mvs_bytes_dmaed(mvi, phy_no, GFP_ATOMIC);
1722 mvs_port_notify_formed(sas_phy, 0);
1723 mv_dprintk("phy%d Attached Device\n", phy_no);
1724 }
1725 }
1726 } else if (mwq->handler & EXP_BRCT_CHG) {
1727 phy->phy_event &= ~EXP_BRCT_CHG;
1728 sas_notify_port_event(sas_phy,
1729 PORTE_BROADCAST_RCVD, GFP_ATOMIC);
1730 mv_dprintk("phy%d Got Broadcast Change\n", phy_no);
1731 }
1732 list_del(&mwq->entry);
1733 spin_unlock_irqrestore(&mvi->lock, flags);
1734 kfree(mwq);
1735 }
1736
mvs_handle_event(struct mvs_info * mvi,void * data,int handler)1737 static int mvs_handle_event(struct mvs_info *mvi, void *data, int handler)
1738 {
1739 struct mvs_wq *mwq;
1740 int ret = 0;
1741
1742 mwq = kmalloc(sizeof(struct mvs_wq), GFP_ATOMIC);
1743 if (mwq) {
1744 mwq->mvi = mvi;
1745 mwq->data = data;
1746 mwq->handler = handler;
1747 MV_INIT_DELAYED_WORK(&mwq->work_q, mvs_work_queue, mwq);
1748 list_add_tail(&mwq->entry, &mvi->wq_list);
1749 schedule_delayed_work(&mwq->work_q, HZ * 2);
1750 } else
1751 ret = -ENOMEM;
1752
1753 return ret;
1754 }
1755
mvs_sig_time_out(struct timer_list * t)1756 static void mvs_sig_time_out(struct timer_list *t)
1757 {
1758 struct mvs_phy *phy = from_timer(phy, t, timer);
1759 struct mvs_info *mvi = phy->mvi;
1760 u8 phy_no;
1761
1762 for (phy_no = 0; phy_no < mvi->chip->n_phy; phy_no++) {
1763 if (&mvi->phy[phy_no] == phy) {
1764 mv_dprintk("Get signature time out, reset phy %d\n",
1765 phy_no+mvi->id*mvi->chip->n_phy);
1766 MVS_CHIP_DISP->phy_reset(mvi, phy_no, MVS_HARD_RESET);
1767 }
1768 }
1769 }
1770
mvs_int_port(struct mvs_info * mvi,int phy_no,u32 events)1771 void mvs_int_port(struct mvs_info *mvi, int phy_no, u32 events)
1772 {
1773 u32 tmp;
1774 struct mvs_phy *phy = &mvi->phy[phy_no];
1775
1776 phy->irq_status = MVS_CHIP_DISP->read_port_irq_stat(mvi, phy_no);
1777 MVS_CHIP_DISP->write_port_irq_stat(mvi, phy_no, phy->irq_status);
1778 mv_dprintk("phy %d ctrl sts=0x%08X.\n", phy_no+mvi->id*mvi->chip->n_phy,
1779 MVS_CHIP_DISP->read_phy_ctl(mvi, phy_no));
1780 mv_dprintk("phy %d irq sts = 0x%08X\n", phy_no+mvi->id*mvi->chip->n_phy,
1781 phy->irq_status);
1782
1783 /*
1784 * events is port event now ,
1785 * we need check the interrupt status which belongs to per port.
1786 */
1787
1788 if (phy->irq_status & PHYEV_DCDR_ERR) {
1789 mv_dprintk("phy %d STP decoding error.\n",
1790 phy_no + mvi->id*mvi->chip->n_phy);
1791 }
1792
1793 if (phy->irq_status & PHYEV_POOF) {
1794 mdelay(500);
1795 if (!(phy->phy_event & PHY_PLUG_OUT)) {
1796 int dev_sata = phy->phy_type & PORT_TYPE_SATA;
1797 int ready;
1798 mvs_do_release_task(mvi, phy_no, NULL);
1799 phy->phy_event |= PHY_PLUG_OUT;
1800 MVS_CHIP_DISP->clear_srs_irq(mvi, 0, 1);
1801 mvs_handle_event(mvi,
1802 (void *)(unsigned long)phy_no,
1803 PHY_PLUG_EVENT);
1804 ready = mvs_is_phy_ready(mvi, phy_no);
1805 if (ready || dev_sata) {
1806 if (MVS_CHIP_DISP->stp_reset)
1807 MVS_CHIP_DISP->stp_reset(mvi,
1808 phy_no);
1809 else
1810 MVS_CHIP_DISP->phy_reset(mvi,
1811 phy_no, MVS_SOFT_RESET);
1812 return;
1813 }
1814 }
1815 }
1816
1817 if (phy->irq_status & PHYEV_COMWAKE) {
1818 tmp = MVS_CHIP_DISP->read_port_irq_mask(mvi, phy_no);
1819 MVS_CHIP_DISP->write_port_irq_mask(mvi, phy_no,
1820 tmp | PHYEV_SIG_FIS);
1821 if (phy->timer.function == NULL) {
1822 phy->timer.function = mvs_sig_time_out;
1823 phy->timer.expires = jiffies + 5*HZ;
1824 add_timer(&phy->timer);
1825 }
1826 }
1827 if (phy->irq_status & (PHYEV_SIG_FIS | PHYEV_ID_DONE)) {
1828 phy->phy_status = mvs_is_phy_ready(mvi, phy_no);
1829 mv_dprintk("notify plug in on phy[%d]\n", phy_no);
1830 if (phy->phy_status) {
1831 mdelay(10);
1832 MVS_CHIP_DISP->detect_porttype(mvi, phy_no);
1833 if (phy->phy_type & PORT_TYPE_SATA) {
1834 tmp = MVS_CHIP_DISP->read_port_irq_mask(
1835 mvi, phy_no);
1836 tmp &= ~PHYEV_SIG_FIS;
1837 MVS_CHIP_DISP->write_port_irq_mask(mvi,
1838 phy_no, tmp);
1839 }
1840 mvs_update_phyinfo(mvi, phy_no, 0);
1841 if (phy->phy_type & PORT_TYPE_SAS) {
1842 MVS_CHIP_DISP->phy_reset(mvi, phy_no, MVS_PHY_TUNE);
1843 mdelay(10);
1844 }
1845
1846 mvs_bytes_dmaed(mvi, phy_no, GFP_ATOMIC);
1847 /* whether driver is going to handle hot plug */
1848 if (phy->phy_event & PHY_PLUG_OUT) {
1849 mvs_port_notify_formed(&phy->sas_phy, 0);
1850 phy->phy_event &= ~PHY_PLUG_OUT;
1851 }
1852 } else {
1853 mv_dprintk("plugin interrupt but phy%d is gone\n",
1854 phy_no + mvi->id*mvi->chip->n_phy);
1855 }
1856 } else if (phy->irq_status & PHYEV_BROAD_CH) {
1857 mv_dprintk("phy %d broadcast change.\n",
1858 phy_no + mvi->id*mvi->chip->n_phy);
1859 mvs_handle_event(mvi, (void *)(unsigned long)phy_no,
1860 EXP_BRCT_CHG);
1861 }
1862 }
1863
mvs_int_rx(struct mvs_info * mvi,bool self_clear)1864 int mvs_int_rx(struct mvs_info *mvi, bool self_clear)
1865 {
1866 u32 rx_prod_idx, rx_desc;
1867 bool attn = false;
1868
1869 /* the first dword in the RX ring is special: it contains
1870 * a mirror of the hardware's RX producer index, so that
1871 * we don't have to stall the CPU reading that register.
1872 * The actual RX ring is offset by one dword, due to this.
1873 */
1874 rx_prod_idx = mvi->rx_cons;
1875 mvi->rx_cons = le32_to_cpu(mvi->rx[0]);
1876 if (mvi->rx_cons == 0xfff) /* h/w hasn't touched RX ring yet */
1877 return 0;
1878
1879 /* The CMPL_Q may come late, read from register and try again
1880 * note: if coalescing is enabled,
1881 * it will need to read from register every time for sure
1882 */
1883 if (unlikely(mvi->rx_cons == rx_prod_idx))
1884 mvi->rx_cons = MVS_CHIP_DISP->rx_update(mvi) & RX_RING_SZ_MASK;
1885
1886 if (mvi->rx_cons == rx_prod_idx)
1887 return 0;
1888
1889 while (mvi->rx_cons != rx_prod_idx) {
1890 /* increment our internal RX consumer pointer */
1891 rx_prod_idx = (rx_prod_idx + 1) & (MVS_RX_RING_SZ - 1);
1892 rx_desc = le32_to_cpu(mvi->rx[rx_prod_idx + 1]);
1893
1894 if (likely(rx_desc & RXQ_DONE))
1895 mvs_slot_complete(mvi, rx_desc, 0);
1896 if (rx_desc & RXQ_ATTN) {
1897 attn = true;
1898 } else if (rx_desc & RXQ_ERR) {
1899 if (!(rx_desc & RXQ_DONE))
1900 mvs_slot_complete(mvi, rx_desc, 0);
1901 } else if (rx_desc & RXQ_SLOT_RESET) {
1902 mvs_slot_free(mvi, rx_desc);
1903 }
1904 }
1905
1906 if (attn && self_clear)
1907 MVS_CHIP_DISP->int_full(mvi);
1908 return 0;
1909 }
1910
mvs_gpio_write(struct sas_ha_struct * sha,u8 reg_type,u8 reg_index,u8 reg_count,u8 * write_data)1911 int mvs_gpio_write(struct sas_ha_struct *sha, u8 reg_type, u8 reg_index,
1912 u8 reg_count, u8 *write_data)
1913 {
1914 struct mvs_prv_info *mvs_prv = sha->lldd_ha;
1915 struct mvs_info *mvi = mvs_prv->mvi[0];
1916
1917 if (MVS_CHIP_DISP->gpio_write) {
1918 return MVS_CHIP_DISP->gpio_write(mvs_prv, reg_type,
1919 reg_index, reg_count, write_data);
1920 }
1921
1922 return -ENOSYS;
1923 }
1924