1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * MediaTek Pinctrl Moore Driver, which implement the generic dt-binding
4 * pinctrl-bindings.txt for MediaTek SoC.
5 *
6 * Copyright (C) 2017-2018 MediaTek Inc.
7 * Author: Sean Wang <sean.wang@mediatek.com>
8 *
9 */
10
11 #include <dt-bindings/pinctrl/mt65xx.h>
12 #include <linux/gpio/driver.h>
13 #include <linux/module.h>
14
15 #include <linux/pinctrl/consumer.h>
16
17 #include "pinctrl-moore.h"
18
19 #define PINCTRL_PINCTRL_DEV KBUILD_MODNAME
20
21 /* Custom pinconf parameters */
22 #define MTK_PIN_CONFIG_TDSEL (PIN_CONFIG_END + 1)
23 #define MTK_PIN_CONFIG_RDSEL (PIN_CONFIG_END + 2)
24 #define MTK_PIN_CONFIG_PU_ADV (PIN_CONFIG_END + 3)
25 #define MTK_PIN_CONFIG_PD_ADV (PIN_CONFIG_END + 4)
26
27 static const struct pinconf_generic_params mtk_custom_bindings[] = {
28 {"mediatek,tdsel", MTK_PIN_CONFIG_TDSEL, 0},
29 {"mediatek,rdsel", MTK_PIN_CONFIG_RDSEL, 0},
30 {"mediatek,pull-up-adv", MTK_PIN_CONFIG_PU_ADV, 1},
31 {"mediatek,pull-down-adv", MTK_PIN_CONFIG_PD_ADV, 1},
32 };
33
34 #ifdef CONFIG_DEBUG_FS
35 static const struct pin_config_item mtk_conf_items[] = {
36 PCONFDUMP(MTK_PIN_CONFIG_TDSEL, "tdsel", NULL, true),
37 PCONFDUMP(MTK_PIN_CONFIG_RDSEL, "rdsel", NULL, true),
38 PCONFDUMP(MTK_PIN_CONFIG_PU_ADV, "pu-adv", NULL, true),
39 PCONFDUMP(MTK_PIN_CONFIG_PD_ADV, "pd-adv", NULL, true),
40 };
41 #endif
42
mtk_pinmux_set_mux(struct pinctrl_dev * pctldev,unsigned int selector,unsigned int group)43 static int mtk_pinmux_set_mux(struct pinctrl_dev *pctldev,
44 unsigned int selector, unsigned int group)
45 {
46 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
47 const struct function_desc *func;
48 struct group_desc *grp;
49 int i, err;
50
51 func = pinmux_generic_get_function(pctldev, selector);
52 if (!func)
53 return -EINVAL;
54
55 grp = pinctrl_generic_get_group(pctldev, group);
56 if (!grp)
57 return -EINVAL;
58
59 dev_dbg(pctldev->dev, "enable function %s group %s\n",
60 func->func->name, grp->grp.name);
61
62 for (i = 0; i < grp->grp.npins; i++) {
63 const struct mtk_pin_desc *desc;
64 int *pin_modes = grp->data;
65 int pin = grp->grp.pins[i];
66
67 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
68 if (!desc->name)
69 return -ENOTSUPP;
70
71 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE,
72 pin_modes[i]);
73
74 if (err)
75 return err;
76 }
77
78 return 0;
79 }
80
mtk_pinmux_gpio_request_enable(struct pinctrl_dev * pctldev,struct pinctrl_gpio_range * range,unsigned int pin)81 static int mtk_pinmux_gpio_request_enable(struct pinctrl_dev *pctldev,
82 struct pinctrl_gpio_range *range,
83 unsigned int pin)
84 {
85 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
86 const struct mtk_pin_desc *desc;
87
88 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
89 if (!desc->name)
90 return -ENOTSUPP;
91
92 return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_MODE,
93 hw->soc->gpio_m);
94 }
95
mtk_pinmux_gpio_set_direction(struct pinctrl_dev * pctldev,struct pinctrl_gpio_range * range,unsigned int pin,bool input)96 static int mtk_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev,
97 struct pinctrl_gpio_range *range,
98 unsigned int pin, bool input)
99 {
100 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
101 const struct mtk_pin_desc *desc;
102
103 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
104 if (!desc->name)
105 return -ENOTSUPP;
106
107 /* hardware would take 0 as input direction */
108 return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR, !input);
109 }
110
mtk_pinconf_get(struct pinctrl_dev * pctldev,unsigned int pin,unsigned long * config)111 static int mtk_pinconf_get(struct pinctrl_dev *pctldev,
112 unsigned int pin, unsigned long *config)
113 {
114 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
115 u32 param = pinconf_to_config_param(*config);
116 int val, val2, err, pullup, reg, ret = 1;
117 const struct mtk_pin_desc *desc;
118
119 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
120 if (!desc->name)
121 return -ENOTSUPP;
122
123 switch (param) {
124 case PIN_CONFIG_BIAS_DISABLE:
125 if (hw->soc->bias_get_combo) {
126 err = hw->soc->bias_get_combo(hw, desc, &pullup, &ret);
127 if (err)
128 return err;
129 if (ret != MTK_PUPD_SET_R1R0_00 && ret != MTK_DISABLE)
130 return -EINVAL;
131 } else if (hw->soc->bias_disable_get) {
132 err = hw->soc->bias_disable_get(hw, desc, &ret);
133 if (err)
134 return err;
135 } else {
136 return -ENOTSUPP;
137 }
138 break;
139 case PIN_CONFIG_BIAS_PULL_UP:
140 if (hw->soc->bias_get_combo) {
141 err = hw->soc->bias_get_combo(hw, desc, &pullup, &ret);
142 if (err)
143 return err;
144 if (ret == MTK_PUPD_SET_R1R0_00 || ret == MTK_DISABLE)
145 return -EINVAL;
146 if (!pullup)
147 return -EINVAL;
148 } else if (hw->soc->bias_get) {
149 err = hw->soc->bias_get(hw, desc, 1, &ret);
150 if (err)
151 return err;
152 } else {
153 return -ENOTSUPP;
154 }
155 break;
156 case PIN_CONFIG_BIAS_PULL_DOWN:
157 if (hw->soc->bias_get_combo) {
158 err = hw->soc->bias_get_combo(hw, desc, &pullup, &ret);
159 if (err)
160 return err;
161 if (ret == MTK_PUPD_SET_R1R0_00 || ret == MTK_DISABLE)
162 return -EINVAL;
163 if (pullup)
164 return -EINVAL;
165 } else if (hw->soc->bias_get) {
166 err = hw->soc->bias_get(hw, desc, 0, &ret);
167 if (err)
168 return err;
169 } else {
170 return -ENOTSUPP;
171 }
172 break;
173 case PIN_CONFIG_SLEW_RATE:
174 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_SR, &val);
175 if (err)
176 return err;
177
178 if (!val)
179 return -EINVAL;
180
181 break;
182 case PIN_CONFIG_INPUT_ENABLE:
183 case PIN_CONFIG_OUTPUT_ENABLE:
184 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &val);
185 if (err)
186 return err;
187
188 /* HW takes input mode as zero; output mode as non-zero */
189 if ((val && param == PIN_CONFIG_INPUT_ENABLE) ||
190 (!val && param == PIN_CONFIG_OUTPUT_ENABLE))
191 return -EINVAL;
192
193 break;
194 case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
195 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &val);
196 if (err)
197 return err;
198
199 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_SMT, &val2);
200 if (err)
201 return err;
202
203 if (val || !val2)
204 return -EINVAL;
205
206 break;
207 case PIN_CONFIG_DRIVE_STRENGTH:
208 if (hw->soc->drive_get) {
209 err = hw->soc->drive_get(hw, desc, &ret);
210 if (err)
211 return err;
212 } else {
213 err = -ENOTSUPP;
214 }
215 break;
216 case MTK_PIN_CONFIG_TDSEL:
217 case MTK_PIN_CONFIG_RDSEL:
218 reg = (param == MTK_PIN_CONFIG_TDSEL) ?
219 PINCTRL_PIN_REG_TDSEL : PINCTRL_PIN_REG_RDSEL;
220
221 err = mtk_hw_get_value(hw, desc, reg, &val);
222 if (err)
223 return err;
224
225 ret = val;
226
227 break;
228 case MTK_PIN_CONFIG_PU_ADV:
229 case MTK_PIN_CONFIG_PD_ADV:
230 if (hw->soc->adv_pull_get) {
231 bool pullup;
232
233 pullup = param == MTK_PIN_CONFIG_PU_ADV;
234 err = hw->soc->adv_pull_get(hw, desc, pullup, &ret);
235 if (err)
236 return err;
237 } else {
238 return -ENOTSUPP;
239 }
240 break;
241 default:
242 return -ENOTSUPP;
243 }
244
245 *config = pinconf_to_config_packed(param, ret);
246
247 return 0;
248 }
249
mtk_pinconf_set(struct pinctrl_dev * pctldev,unsigned int pin,unsigned long * configs,unsigned int num_configs)250 static int mtk_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
251 unsigned long *configs, unsigned int num_configs)
252 {
253 struct mtk_pinctrl *hw = pinctrl_dev_get_drvdata(pctldev);
254 const struct mtk_pin_desc *desc;
255 u32 reg, param, arg;
256 int cfg, err = 0;
257
258 desc = (const struct mtk_pin_desc *)&hw->soc->pins[pin];
259 if (!desc->name)
260 return -ENOTSUPP;
261
262 for (cfg = 0; cfg < num_configs; cfg++) {
263 param = pinconf_to_config_param(configs[cfg]);
264 arg = pinconf_to_config_argument(configs[cfg]);
265
266 switch (param) {
267 case PIN_CONFIG_BIAS_DISABLE:
268 if (hw->soc->bias_set_combo) {
269 err = hw->soc->bias_set_combo(hw, desc, 0, MTK_DISABLE);
270 if (err)
271 return err;
272 } else if (hw->soc->bias_disable_set) {
273 err = hw->soc->bias_disable_set(hw, desc);
274 if (err)
275 return err;
276 } else {
277 return -ENOTSUPP;
278 }
279 break;
280 case PIN_CONFIG_BIAS_PULL_UP:
281 if (hw->soc->bias_set_combo) {
282 err = hw->soc->bias_set_combo(hw, desc, 1, arg);
283 if (err)
284 return err;
285 } else if (hw->soc->bias_set) {
286 err = hw->soc->bias_set(hw, desc, 1);
287 if (err)
288 return err;
289 } else {
290 return -ENOTSUPP;
291 }
292 break;
293 case PIN_CONFIG_BIAS_PULL_DOWN:
294 if (hw->soc->bias_set_combo) {
295 err = hw->soc->bias_set_combo(hw, desc, 0, arg);
296 if (err)
297 return err;
298 } else if (hw->soc->bias_set) {
299 err = hw->soc->bias_set(hw, desc, 0);
300 if (err)
301 return err;
302 } else {
303 return -ENOTSUPP;
304 }
305 break;
306 case PIN_CONFIG_OUTPUT_ENABLE:
307 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT,
308 MTK_DISABLE);
309 if (err)
310 goto err;
311
312 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR,
313 MTK_OUTPUT);
314 if (err)
315 goto err;
316 break;
317 case PIN_CONFIG_INPUT_ENABLE:
318
319 if (hw->soc->ies_present) {
320 mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_IES,
321 MTK_ENABLE);
322 }
323
324 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR,
325 MTK_INPUT);
326 if (err)
327 goto err;
328 break;
329 case PIN_CONFIG_SLEW_RATE:
330 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SR,
331 arg);
332 if (err)
333 goto err;
334
335 break;
336 case PIN_CONFIG_LEVEL:
337 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR,
338 MTK_OUTPUT);
339 if (err)
340 goto err;
341
342 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO,
343 arg);
344 if (err)
345 goto err;
346 break;
347 case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
348 /* arg = 1: Input mode & SMT enable ;
349 * arg = 0: Output mode & SMT disable
350 */
351 arg = arg ? 2 : 1;
352 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DIR,
353 arg & 1);
354 if (err)
355 goto err;
356
357 err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_SMT,
358 !!(arg & 2));
359 if (err)
360 goto err;
361 break;
362 case PIN_CONFIG_DRIVE_STRENGTH:
363 if (hw->soc->drive_set) {
364 err = hw->soc->drive_set(hw, desc, arg);
365 if (err)
366 return err;
367 } else {
368 err = -ENOTSUPP;
369 }
370 break;
371 case MTK_PIN_CONFIG_TDSEL:
372 case MTK_PIN_CONFIG_RDSEL:
373 reg = (param == MTK_PIN_CONFIG_TDSEL) ?
374 PINCTRL_PIN_REG_TDSEL : PINCTRL_PIN_REG_RDSEL;
375
376 err = mtk_hw_set_value(hw, desc, reg, arg);
377 if (err)
378 goto err;
379 break;
380 case MTK_PIN_CONFIG_PU_ADV:
381 case MTK_PIN_CONFIG_PD_ADV:
382 if (hw->soc->adv_pull_set) {
383 bool pullup;
384
385 pullup = param == MTK_PIN_CONFIG_PU_ADV;
386 err = hw->soc->adv_pull_set(hw, desc, pullup,
387 arg);
388 if (err)
389 return err;
390 } else {
391 return -ENOTSUPP;
392 }
393 break;
394 default:
395 err = -ENOTSUPP;
396 }
397 }
398 err:
399 return err;
400 }
401
mtk_pinconf_group_get(struct pinctrl_dev * pctldev,unsigned int group,unsigned long * config)402 static int mtk_pinconf_group_get(struct pinctrl_dev *pctldev,
403 unsigned int group, unsigned long *config)
404 {
405 const unsigned int *pins;
406 unsigned int i, npins;
407 unsigned long old = 0;
408 int ret;
409
410 ret = pinctrl_generic_get_group_pins(pctldev, group, &pins, &npins);
411 if (ret)
412 return ret;
413
414 for (i = 0; i < npins; i++) {
415 if (mtk_pinconf_get(pctldev, pins[i], config))
416 return -ENOTSUPP;
417
418 /* configs do not match between two pins */
419 if (i && old != *config)
420 return -ENOTSUPP;
421
422 old = *config;
423 }
424
425 return 0;
426 }
427
mtk_pinconf_group_set(struct pinctrl_dev * pctldev,unsigned int group,unsigned long * configs,unsigned int num_configs)428 static int mtk_pinconf_group_set(struct pinctrl_dev *pctldev,
429 unsigned int group, unsigned long *configs,
430 unsigned int num_configs)
431 {
432 const unsigned int *pins;
433 unsigned int i, npins;
434 int ret;
435
436 ret = pinctrl_generic_get_group_pins(pctldev, group, &pins, &npins);
437 if (ret)
438 return ret;
439
440 for (i = 0; i < npins; i++) {
441 ret = mtk_pinconf_set(pctldev, pins[i], configs, num_configs);
442 if (ret)
443 return ret;
444 }
445
446 return 0;
447 }
448
449 static const struct pinctrl_ops mtk_pctlops = {
450 .get_groups_count = pinctrl_generic_get_group_count,
451 .get_group_name = pinctrl_generic_get_group_name,
452 .get_group_pins = pinctrl_generic_get_group_pins,
453 .dt_node_to_map = pinconf_generic_dt_node_to_map_all,
454 .dt_free_map = pinconf_generic_dt_free_map,
455 };
456
457 static const struct pinmux_ops mtk_pmxops = {
458 .get_functions_count = pinmux_generic_get_function_count,
459 .get_function_name = pinmux_generic_get_function_name,
460 .get_function_groups = pinmux_generic_get_function_groups,
461 .set_mux = mtk_pinmux_set_mux,
462 .gpio_request_enable = mtk_pinmux_gpio_request_enable,
463 .gpio_set_direction = mtk_pinmux_gpio_set_direction,
464 .strict = true,
465 };
466
467 static const struct pinconf_ops mtk_confops = {
468 .is_generic = true,
469 .pin_config_get = mtk_pinconf_get,
470 .pin_config_set = mtk_pinconf_set,
471 .pin_config_group_get = mtk_pinconf_group_get,
472 .pin_config_group_set = mtk_pinconf_group_set,
473 .pin_config_config_dbg_show = pinconf_generic_dump_config,
474 };
475
476 static struct pinctrl_desc mtk_desc = {
477 .name = PINCTRL_PINCTRL_DEV,
478 .pctlops = &mtk_pctlops,
479 .pmxops = &mtk_pmxops,
480 .confops = &mtk_confops,
481 .owner = THIS_MODULE,
482 };
483
mtk_gpio_get(struct gpio_chip * chip,unsigned int gpio)484 static int mtk_gpio_get(struct gpio_chip *chip, unsigned int gpio)
485 {
486 struct mtk_pinctrl *hw = gpiochip_get_data(chip);
487 const struct mtk_pin_desc *desc;
488 int value, err;
489
490 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio];
491 if (!desc->name)
492 return -ENOTSUPP;
493
494 err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DI, &value);
495 if (err)
496 return err;
497
498 return !!value;
499 }
500
mtk_gpio_set(struct gpio_chip * chip,unsigned int gpio,int value)501 static int mtk_gpio_set(struct gpio_chip *chip, unsigned int gpio, int value)
502 {
503 struct mtk_pinctrl *hw = gpiochip_get_data(chip);
504 const struct mtk_pin_desc *desc;
505
506 desc = (const struct mtk_pin_desc *)&hw->soc->pins[gpio];
507 if (!desc->name)
508 return -ENOTSUPP;
509
510 return mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_DO, !!value);
511 }
512
mtk_gpio_direction_output(struct gpio_chip * chip,unsigned int gpio,int value)513 static int mtk_gpio_direction_output(struct gpio_chip *chip, unsigned int gpio,
514 int value)
515 {
516 int ret;
517
518 ret = mtk_gpio_set(chip, gpio, value);
519 if (ret)
520 return ret;
521
522 return pinctrl_gpio_direction_output(chip, gpio);
523 }
524
mtk_gpio_get_direction(struct gpio_chip * chip,unsigned int offset)525 static int mtk_gpio_get_direction(struct gpio_chip *chip, unsigned int offset)
526 {
527 struct mtk_pinctrl *hw = gpiochip_get_data(chip);
528 const struct mtk_pin_desc *desc;
529 int ret, dir;
530
531 desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset];
532 if (!desc->name)
533 return -ENOTSUPP;
534
535 ret = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_DIR, &dir);
536 if (ret)
537 return ret;
538
539 return dir ? GPIO_LINE_DIRECTION_OUT : GPIO_LINE_DIRECTION_IN;
540 }
541
mtk_gpio_to_irq(struct gpio_chip * chip,unsigned int offset)542 static int mtk_gpio_to_irq(struct gpio_chip *chip, unsigned int offset)
543 {
544 struct mtk_pinctrl *hw = gpiochip_get_data(chip);
545 const struct mtk_pin_desc *desc;
546
547 if (!hw->eint)
548 return -ENOTSUPP;
549
550 desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset];
551
552 if (desc->eint.eint_n == (u16)EINT_NA)
553 return -ENOTSUPP;
554
555 return mtk_eint_find_irq(hw->eint, desc->eint.eint_n);
556 }
557
mtk_gpio_set_config(struct gpio_chip * chip,unsigned int offset,unsigned long config)558 static int mtk_gpio_set_config(struct gpio_chip *chip, unsigned int offset,
559 unsigned long config)
560 {
561 struct mtk_pinctrl *hw = gpiochip_get_data(chip);
562 const struct mtk_pin_desc *desc;
563 u32 debounce;
564
565 desc = (const struct mtk_pin_desc *)&hw->soc->pins[offset];
566 if (!desc->name)
567 return -ENOTSUPP;
568
569 if (!hw->eint ||
570 pinconf_to_config_param(config) != PIN_CONFIG_INPUT_DEBOUNCE ||
571 desc->eint.eint_n == (u16)EINT_NA)
572 return -ENOTSUPP;
573
574 debounce = pinconf_to_config_argument(config);
575
576 return mtk_eint_set_debounce(hw->eint, desc->eint.eint_n, debounce);
577 }
578
mtk_build_gpiochip(struct mtk_pinctrl * hw)579 static int mtk_build_gpiochip(struct mtk_pinctrl *hw)
580 {
581 struct gpio_chip *chip = &hw->chip;
582 int ret;
583
584 chip->label = PINCTRL_PINCTRL_DEV;
585 chip->parent = hw->dev;
586 chip->request = gpiochip_generic_request;
587 chip->free = gpiochip_generic_free;
588 chip->get_direction = mtk_gpio_get_direction;
589 chip->direction_input = pinctrl_gpio_direction_input;
590 chip->direction_output = mtk_gpio_direction_output;
591 chip->get = mtk_gpio_get;
592 chip->set = mtk_gpio_set;
593 chip->to_irq = mtk_gpio_to_irq;
594 chip->set_config = mtk_gpio_set_config;
595 chip->base = -1;
596 chip->ngpio = hw->soc->npins;
597
598 ret = devm_gpiochip_add_data(hw->dev, chip, hw);
599 if (ret < 0)
600 return ret;
601
602 /* Just for backward compatible for these old pinctrl nodes without
603 * "gpio-ranges" property. Otherwise, called directly from a
604 * DeviceTree-supported pinctrl driver is DEPRECATED.
605 * Please see Section 2.1 of
606 * Documentation/devicetree/bindings/gpio/gpio.txt on how to
607 * bind pinctrl and gpio drivers via the "gpio-ranges" property.
608 */
609 if (!of_property_present(hw->dev->of_node, "gpio-ranges")) {
610 ret = gpiochip_add_pin_range(chip, dev_name(hw->dev), 0, 0,
611 chip->ngpio);
612 if (ret < 0)
613 return ret;
614 }
615
616 return 0;
617 }
618
mtk_build_groups(struct mtk_pinctrl * hw)619 static int mtk_build_groups(struct mtk_pinctrl *hw)
620 {
621 int err, i;
622
623 for (i = 0; i < hw->soc->ngrps; i++) {
624 const struct group_desc *group = hw->soc->grps + i;
625 const struct pingroup *grp = &group->grp;
626
627 err = pinctrl_generic_add_group(hw->pctrl, grp->name, grp->pins, grp->npins,
628 group->data);
629 if (err < 0) {
630 dev_err(hw->dev, "Failed to register group %s\n", grp->name);
631 return err;
632 }
633 }
634
635 return 0;
636 }
637
mtk_build_functions(struct mtk_pinctrl * hw)638 static int mtk_build_functions(struct mtk_pinctrl *hw)
639 {
640 int i, err;
641
642 for (i = 0; i < hw->soc->nfuncs ; i++) {
643 const struct pinfunction *func = hw->soc->funcs + i;
644
645 err = pinmux_generic_add_pinfunction(hw->pctrl, func, NULL);
646 if (err < 0) {
647 dev_err(hw->dev, "Failed to register function %s\n",
648 func->name);
649 return err;
650 }
651 }
652
653 return 0;
654 }
655
mtk_moore_pinctrl_probe(struct platform_device * pdev,const struct mtk_pin_soc * soc)656 int mtk_moore_pinctrl_probe(struct platform_device *pdev,
657 const struct mtk_pin_soc *soc)
658 {
659 struct device *dev = &pdev->dev;
660 struct pinctrl_pin_desc *pins;
661 struct mtk_pinctrl *hw;
662 int err, i;
663
664 hw = devm_kzalloc(&pdev->dev, sizeof(*hw), GFP_KERNEL);
665 if (!hw)
666 return -ENOMEM;
667
668 hw->soc = soc;
669 hw->dev = &pdev->dev;
670
671 if (!hw->soc->nbase_names)
672 return dev_err_probe(dev, -EINVAL,
673 "SoC should be assigned at least one register base\n");
674
675 hw->base = devm_kmalloc_array(&pdev->dev, hw->soc->nbase_names,
676 sizeof(*hw->base), GFP_KERNEL);
677 if (!hw->base)
678 return -ENOMEM;
679
680 for (i = 0; i < hw->soc->nbase_names; i++) {
681 hw->base[i] = devm_platform_ioremap_resource_byname(pdev,
682 hw->soc->base_names[i]);
683 if (IS_ERR(hw->base[i]))
684 return PTR_ERR(hw->base[i]);
685 }
686
687 hw->nbase = hw->soc->nbase_names;
688
689 spin_lock_init(&hw->lock);
690
691 /* Copy from internal struct mtk_pin_desc to register to the core */
692 pins = devm_kmalloc_array(&pdev->dev, hw->soc->npins, sizeof(*pins),
693 GFP_KERNEL);
694 if (!pins)
695 return -ENOMEM;
696
697 for (i = 0; i < hw->soc->npins; i++) {
698 pins[i].number = hw->soc->pins[i].number;
699 pins[i].name = hw->soc->pins[i].name;
700 }
701
702 /* Setup pins descriptions per SoC types */
703 mtk_desc.pins = (const struct pinctrl_pin_desc *)pins;
704 mtk_desc.npins = hw->soc->npins;
705 mtk_desc.num_custom_params = ARRAY_SIZE(mtk_custom_bindings);
706 mtk_desc.custom_params = mtk_custom_bindings;
707 #ifdef CONFIG_DEBUG_FS
708 mtk_desc.custom_conf_items = mtk_conf_items;
709 #endif
710
711 err = devm_pinctrl_register_and_init(&pdev->dev, &mtk_desc, hw,
712 &hw->pctrl);
713 if (err)
714 return err;
715
716 /* Setup groups descriptions per SoC types */
717 err = mtk_build_groups(hw);
718 if (err)
719 return dev_err_probe(dev, err, "Failed to build groups\n");
720
721 /* Setup functions descriptions per SoC types */
722 err = mtk_build_functions(hw);
723 if (err)
724 return dev_err_probe(dev, err, "Failed to build functions\n");
725
726 /* For able to make pinctrl_claim_hogs, we must not enable pinctrl
727 * until all groups and functions are being added one.
728 */
729 err = pinctrl_enable(hw->pctrl);
730 if (err)
731 return err;
732
733 err = mtk_build_eint(hw, pdev);
734 if (err)
735 dev_warn(&pdev->dev,
736 "Failed to add EINT, but pinctrl still can work\n");
737
738 /* Build gpiochip should be after pinctrl_enable is done */
739 err = mtk_build_gpiochip(hw);
740 if (err)
741 return dev_err_probe(dev, err, "Failed to add gpio_chip\n");
742
743 platform_set_drvdata(pdev, hw);
744
745 return 0;
746 }
747 EXPORT_SYMBOL_NS_GPL(mtk_moore_pinctrl_probe, "MTK_PINCTRL");
748
749 MODULE_DESCRIPTION("MediaTek Pinctrl Common Driver V2 Moore");
750 MODULE_LICENSE("GPL v2");
751