1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * linux/drivers/mtd/maps/pci.c 4 * 5 * Copyright (C) 2001 Russell King, All rights reserved. 6 * 7 * Generic PCI memory map driver. We support the following boards: 8 * - Intel IQ80310 ATU. 9 * - Intel EBSA285 (blank rom programming mode). Tested working 27/09/2001 10 */ 11 #include <linux/module.h> 12 #include <linux/kernel.h> 13 #include <linux/pci.h> 14 #include <linux/slab.h> 15 16 #include <linux/mtd/mtd.h> 17 #include <linux/mtd/map.h> 18 #include <linux/mtd/partitions.h> 19 20 struct map_pci_info; 21 22 struct mtd_pci_info { 23 int (*init)(struct pci_dev *dev, struct map_pci_info *map); 24 void (*exit)(struct pci_dev *dev, struct map_pci_info *map); 25 unsigned long (*translate)(struct map_pci_info *map, unsigned long ofs); 26 const char *map_name; 27 }; 28 29 struct map_pci_info { 30 struct map_info map; 31 void __iomem *base; 32 void (*exit)(struct pci_dev *dev, struct map_pci_info *map); 33 unsigned long (*translate)(struct map_pci_info *map, unsigned long ofs); 34 struct pci_dev *dev; 35 }; 36 37 static map_word mtd_pci_read8(struct map_info *_map, unsigned long ofs) 38 { 39 struct map_pci_info *map = (struct map_pci_info *)_map; 40 map_word val; 41 val.x[0]= readb(map->base + map->translate(map, ofs)); 42 return val; 43 } 44 45 static map_word mtd_pci_read32(struct map_info *_map, unsigned long ofs) 46 { 47 struct map_pci_info *map = (struct map_pci_info *)_map; 48 map_word val; 49 val.x[0] = readl(map->base + map->translate(map, ofs)); 50 return val; 51 } 52 53 static void mtd_pci_copyfrom(struct map_info *_map, void *to, unsigned long from, ssize_t len) 54 { 55 struct map_pci_info *map = (struct map_pci_info *)_map; 56 memcpy_fromio(to, map->base + map->translate(map, from), len); 57 } 58 59 static void mtd_pci_write8(struct map_info *_map, map_word val, unsigned long ofs) 60 { 61 struct map_pci_info *map = (struct map_pci_info *)_map; 62 writeb(val.x[0], map->base + map->translate(map, ofs)); 63 } 64 65 static void mtd_pci_write32(struct map_info *_map, map_word val, unsigned long ofs) 66 { 67 struct map_pci_info *map = (struct map_pci_info *)_map; 68 writel(val.x[0], map->base + map->translate(map, ofs)); 69 } 70 71 static void mtd_pci_copyto(struct map_info *_map, unsigned long to, const void *from, ssize_t len) 72 { 73 struct map_pci_info *map = (struct map_pci_info *)_map; 74 memcpy_toio(map->base + map->translate(map, to), from, len); 75 } 76 77 static const struct map_info mtd_pci_map = { 78 .phys = NO_XIP, 79 .copy_from = mtd_pci_copyfrom, 80 .copy_to = mtd_pci_copyto, 81 }; 82 83 /* 84 * Intel IOP80310 Flash driver 85 */ 86 87 static int 88 intel_iq80310_init(struct pci_dev *dev, struct map_pci_info *map) 89 { 90 u32 win_base; 91 92 map->map.bankwidth = 1; 93 map->map.read = mtd_pci_read8; 94 map->map.write = mtd_pci_write8; 95 96 map->map.size = 0x00800000; 97 map->base = ioremap(pci_resource_start(dev, 0), 98 pci_resource_len(dev, 0)); 99 100 if (!map->base) 101 return -ENOMEM; 102 103 /* 104 * We want to base the memory window at Xscale 105 * bus address 0, not 0x1000. 106 */ 107 pci_read_config_dword(dev, 0x44, &win_base); 108 pci_write_config_dword(dev, 0x44, 0); 109 110 map->map.map_priv_2 = win_base; 111 112 return 0; 113 } 114 115 static void 116 intel_iq80310_exit(struct pci_dev *dev, struct map_pci_info *map) 117 { 118 if (map->base) 119 iounmap(map->base); 120 pci_write_config_dword(dev, 0x44, map->map.map_priv_2); 121 } 122 123 static unsigned long 124 intel_iq80310_translate(struct map_pci_info *map, unsigned long ofs) 125 { 126 unsigned long page_addr = ofs & 0x00400000; 127 128 /* 129 * This mundges the flash location so we avoid 130 * the first 80 bytes (they appear to read nonsense). 131 */ 132 if (page_addr) { 133 writel(0x00000008, map->base + 0x1558); 134 writel(0x00000000, map->base + 0x1550); 135 } else { 136 writel(0x00000007, map->base + 0x1558); 137 writel(0x00800000, map->base + 0x1550); 138 ofs += 0x00800000; 139 } 140 141 return ofs; 142 } 143 144 static struct mtd_pci_info intel_iq80310_info = { 145 .init = intel_iq80310_init, 146 .exit = intel_iq80310_exit, 147 .translate = intel_iq80310_translate, 148 .map_name = "cfi_probe", 149 }; 150 151 /* 152 * Intel DC21285 driver 153 */ 154 155 static int 156 intel_dc21285_init(struct pci_dev *dev, struct map_pci_info *map) 157 { 158 unsigned long base, len; 159 160 base = pci_resource_start(dev, PCI_ROM_RESOURCE); 161 len = pci_resource_len(dev, PCI_ROM_RESOURCE); 162 163 if (!len || !base) { 164 /* 165 * No ROM resource 166 */ 167 base = pci_resource_start(dev, 2); 168 len = pci_resource_len(dev, 2); 169 170 /* 171 * We need to re-allocate PCI BAR2 address range to the 172 * PCI ROM BAR, and disable PCI BAR2. 173 */ 174 } else { 175 /* 176 * Hmm, if an address was allocated to the ROM resource, but 177 * not enabled, should we be allocating a new resource for it 178 * or simply enabling it? 179 */ 180 pci_enable_rom(dev); 181 printk("%s: enabling expansion ROM\n", pci_name(dev)); 182 } 183 184 if (!len || !base) 185 return -ENXIO; 186 187 map->map.bankwidth = 4; 188 map->map.read = mtd_pci_read32; 189 map->map.write = mtd_pci_write32; 190 map->map.size = len; 191 map->base = ioremap(base, len); 192 193 if (!map->base) 194 return -ENOMEM; 195 196 return 0; 197 } 198 199 static void 200 intel_dc21285_exit(struct pci_dev *dev, struct map_pci_info *map) 201 { 202 if (map->base) 203 iounmap(map->base); 204 205 /* 206 * We need to undo the PCI BAR2/PCI ROM BAR address alteration. 207 */ 208 pci_disable_rom(dev); 209 } 210 211 static unsigned long 212 intel_dc21285_translate(struct map_pci_info *map, unsigned long ofs) 213 { 214 return ofs & 0x00ffffc0 ? ofs : (ofs ^ (1 << 5)); 215 } 216 217 static struct mtd_pci_info intel_dc21285_info = { 218 .init = intel_dc21285_init, 219 .exit = intel_dc21285_exit, 220 .translate = intel_dc21285_translate, 221 .map_name = "jedec_probe", 222 }; 223 224 /* 225 * PCI device ID table 226 */ 227 228 static const struct pci_device_id mtd_pci_ids[] = { 229 { 230 PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x530d), 231 .class = PCI_CLASS_MEMORY_OTHER << 8, 232 .class_mask = 0xffff00, 233 .driver_data = (unsigned long)&intel_iq80310_info, 234 }, { 235 /* DC21285 defaults to 0 for .subvendor and .subdevice on reset */ 236 PCI_DEVICE_SUB(PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_21285, 0, 0), 237 .driver_data = (unsigned long)&intel_dc21285_info, 238 }, 239 { } 240 }; 241 242 /* 243 * Generic code follows. 244 */ 245 246 static int mtd_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) 247 { 248 struct mtd_pci_info *info = (struct mtd_pci_info *)id->driver_data; 249 struct map_pci_info *map = NULL; 250 struct mtd_info *mtd = NULL; 251 int err; 252 253 err = pci_enable_device(dev); 254 if (err) 255 goto out; 256 257 err = pci_request_regions(dev, "pci mtd"); 258 if (err) 259 goto out; 260 261 map = kmalloc_obj(*map); 262 err = -ENOMEM; 263 if (!map) 264 goto release; 265 266 map->map = mtd_pci_map; 267 map->map.name = pci_name(dev); 268 map->dev = dev; 269 map->exit = info->exit; 270 map->translate = info->translate; 271 272 err = info->init(dev, map); 273 if (err) 274 goto release; 275 276 mtd = do_map_probe(info->map_name, &map->map); 277 err = -ENODEV; 278 if (!mtd) 279 goto release; 280 281 mtd->owner = THIS_MODULE; 282 mtd_device_register(mtd, NULL, 0); 283 284 pci_set_drvdata(dev, mtd); 285 286 return 0; 287 288 release: 289 if (map) { 290 map->exit(dev, map); 291 kfree(map); 292 } 293 294 pci_release_regions(dev); 295 out: 296 return err; 297 } 298 299 static void mtd_pci_remove(struct pci_dev *dev) 300 { 301 struct mtd_info *mtd = pci_get_drvdata(dev); 302 struct map_pci_info *map = mtd->priv; 303 304 mtd_device_unregister(mtd); 305 map_destroy(mtd); 306 map->exit(dev, map); 307 kfree(map); 308 309 pci_release_regions(dev); 310 } 311 312 static struct pci_driver mtd_pci_driver = { 313 .name = "MTD PCI", 314 .probe = mtd_pci_probe, 315 .remove = mtd_pci_remove, 316 .id_table = mtd_pci_ids, 317 }; 318 319 module_pci_driver(mtd_pci_driver); 320 321 MODULE_LICENSE("GPL"); 322 MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>"); 323 MODULE_DESCRIPTION("Generic PCI map driver"); 324 MODULE_DEVICE_TABLE(pci, mtd_pci_ids); 325