1 // SPDX-License-Identifier: BSD-3-Clause-Clear 2 /* Copyright (C) 2023 MediaTek Inc. */ 3 4 #include <linux/devcoredump.h> 5 #include <linux/etherdevice.h> 6 #include <linux/timekeeping.h> 7 #include "mt7925.h" 8 #include "../dma.h" 9 #include "regd.h" 10 #include "mac.h" 11 #include "mcu.h" 12 13 bool mt7925_mac_wtbl_update(struct mt792x_dev *dev, int idx, u32 mask) 14 { 15 mt76_rmw(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_WLAN_IDX, 16 FIELD_PREP(MT_WTBL_UPDATE_WLAN_IDX, idx) | mask); 17 18 return mt76_poll(dev, MT_WTBL_UPDATE, MT_WTBL_UPDATE_BUSY, 19 0, 5000); 20 } 21 22 static void mt7925_mac_sta_poll(struct mt792x_dev *dev) 23 { 24 static const u8 ac_to_tid[] = { 25 [IEEE80211_AC_BE] = 0, 26 [IEEE80211_AC_BK] = 1, 27 [IEEE80211_AC_VI] = 4, 28 [IEEE80211_AC_VO] = 6 29 }; 30 struct ieee80211_sta *sta; 31 struct mt792x_sta *msta; 32 struct mt792x_link_sta *mlink; 33 u32 tx_time[IEEE80211_NUM_ACS], rx_time[IEEE80211_NUM_ACS]; 34 LIST_HEAD(sta_poll_list); 35 struct rate_info *rate; 36 s8 rssi[4]; 37 int i; 38 39 spin_lock_bh(&dev->mt76.sta_poll_lock); 40 list_splice_init(&dev->mt76.sta_poll_list, &sta_poll_list); 41 spin_unlock_bh(&dev->mt76.sta_poll_lock); 42 43 while (true) { 44 bool clear = false; 45 u32 addr, val; 46 u16 idx; 47 u8 bw; 48 49 if (list_empty(&sta_poll_list)) 50 break; 51 mlink = list_first_entry(&sta_poll_list, 52 struct mt792x_link_sta, wcid.poll_list); 53 msta = mlink->sta; 54 spin_lock_bh(&dev->mt76.sta_poll_lock); 55 list_del_init(&mlink->wcid.poll_list); 56 spin_unlock_bh(&dev->mt76.sta_poll_lock); 57 58 idx = mlink->wcid.idx; 59 addr = mt7925_mac_wtbl_lmac_addr(dev, idx, MT_WTBL_AC0_CTT_OFFSET); 60 61 for (i = 0; i < IEEE80211_NUM_ACS; i++) { 62 u32 tx_last = mlink->airtime_ac[i]; 63 u32 rx_last = mlink->airtime_ac[i + 4]; 64 65 mlink->airtime_ac[i] = mt76_rr(dev, addr); 66 mlink->airtime_ac[i + 4] = mt76_rr(dev, addr + 4); 67 68 tx_time[i] = mlink->airtime_ac[i] - tx_last; 69 rx_time[i] = mlink->airtime_ac[i + 4] - rx_last; 70 71 if ((tx_last | rx_last) & BIT(30)) 72 clear = true; 73 74 addr += 8; 75 } 76 77 if (clear) { 78 mt7925_mac_wtbl_update(dev, idx, 79 MT_WTBL_UPDATE_ADM_COUNT_CLEAR); 80 memset(mlink->airtime_ac, 0, sizeof(mlink->airtime_ac)); 81 } 82 83 if (!mlink->wcid.sta) 84 continue; 85 86 sta = container_of((void *)msta, struct ieee80211_sta, 87 drv_priv); 88 for (i = 0; i < IEEE80211_NUM_ACS; i++) { 89 u8 q = mt76_connac_lmac_mapping(i); 90 u32 tx_cur = tx_time[q]; 91 u32 rx_cur = rx_time[q]; 92 u8 tid = ac_to_tid[i]; 93 94 if (!tx_cur && !rx_cur) 95 continue; 96 97 ieee80211_sta_register_airtime(sta, tid, tx_cur, 98 rx_cur); 99 } 100 101 /* We don't support reading GI info from txs packets. 102 * For accurate tx status reporting and AQL improvement, 103 * we need to make sure that flags match so polling GI 104 * from per-sta counters directly. 105 */ 106 rate = &mlink->wcid.rate; 107 108 switch (rate->bw) { 109 case RATE_INFO_BW_160: 110 bw = IEEE80211_STA_RX_BW_160; 111 break; 112 case RATE_INFO_BW_80: 113 bw = IEEE80211_STA_RX_BW_80; 114 break; 115 case RATE_INFO_BW_40: 116 bw = IEEE80211_STA_RX_BW_40; 117 break; 118 default: 119 bw = IEEE80211_STA_RX_BW_20; 120 break; 121 } 122 123 addr = mt7925_mac_wtbl_lmac_addr(dev, idx, 6); 124 val = mt76_rr(dev, addr); 125 if (rate->flags & RATE_INFO_FLAGS_EHT_MCS) { 126 addr = mt7925_mac_wtbl_lmac_addr(dev, idx, 5); 127 val = mt76_rr(dev, addr); 128 rate->eht_gi = FIELD_GET(GENMASK(25, 24), val); 129 } else if (rate->flags & RATE_INFO_FLAGS_HE_MCS) { 130 u8 offs = MT_WTBL_TXRX_RATE_G2_HE + 2 * bw; 131 132 rate->he_gi = (val & (0x3 << offs)) >> offs; 133 } else if (rate->flags & 134 (RATE_INFO_FLAGS_VHT_MCS | RATE_INFO_FLAGS_MCS)) { 135 if (val & BIT(MT_WTBL_TXRX_RATE_G2 + bw)) 136 rate->flags |= RATE_INFO_FLAGS_SHORT_GI; 137 else 138 rate->flags &= ~RATE_INFO_FLAGS_SHORT_GI; 139 } 140 141 /* get signal strength of resp frames (CTS/BA/ACK) */ 142 addr = mt7925_mac_wtbl_lmac_addr(dev, idx, 34); 143 val = mt76_rr(dev, addr); 144 145 rssi[0] = to_rssi(GENMASK(7, 0), val); 146 rssi[1] = to_rssi(GENMASK(15, 8), val); 147 rssi[2] = to_rssi(GENMASK(23, 16), val); 148 rssi[3] = to_rssi(GENMASK(31, 14), val); 149 150 mlink->ack_signal = 151 mt76_rx_signal(msta->vif->phy->mt76->antenna_mask, rssi); 152 153 ewma_avg_signal_add(&mlink->avg_ack_signal, -mlink->ack_signal); 154 } 155 } 156 157 void mt7925_mac_set_fixed_rate_table(struct mt792x_dev *dev, 158 u8 tbl_idx, u16 rate_idx) 159 { 160 u32 ctrl = MT_WTBL_ITCR_WR | MT_WTBL_ITCR_EXEC | tbl_idx; 161 162 mt76_wr(dev, MT_WTBL_ITDR0, rate_idx); 163 /* use wtbl spe idx */ 164 mt76_wr(dev, MT_WTBL_ITDR1, MT_WTBL_SPE_IDX_SEL); 165 mt76_wr(dev, MT_WTBL_ITCR, ctrl); 166 } 167 168 /* The HW does not translate the mac header to 802.3 for mesh point */ 169 static int mt7925_reverse_frag0_hdr_trans(struct sk_buff *skb, u16 hdr_gap) 170 { 171 struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb; 172 struct ethhdr *eth_hdr = (struct ethhdr *)(skb->data + hdr_gap); 173 struct mt792x_sta *msta = (struct mt792x_sta *)status->wcid; 174 __le32 *rxd = (__le32 *)skb->data; 175 struct ieee80211_sta *sta; 176 struct ieee80211_vif *vif; 177 struct ieee80211_hdr hdr; 178 u16 frame_control; 179 180 if (le32_get_bits(rxd[3], MT_RXD3_NORMAL_ADDR_TYPE) != 181 MT_RXD3_NORMAL_U2M) 182 return -EINVAL; 183 184 if (!(le32_to_cpu(rxd[1]) & MT_RXD1_NORMAL_GROUP_4)) 185 return -EINVAL; 186 187 if (!msta || !msta->vif) 188 return -EINVAL; 189 190 sta = container_of((void *)msta, struct ieee80211_sta, drv_priv); 191 vif = container_of((void *)msta->vif, struct ieee80211_vif, drv_priv); 192 193 /* store the info from RXD and ethhdr to avoid being overridden */ 194 frame_control = le32_get_bits(rxd[8], MT_RXD8_FRAME_CONTROL); 195 hdr.frame_control = cpu_to_le16(frame_control); 196 hdr.seq_ctrl = cpu_to_le16(le32_get_bits(rxd[10], MT_RXD10_SEQ_CTRL)); 197 hdr.duration_id = 0; 198 199 ether_addr_copy(hdr.addr1, vif->addr); 200 ether_addr_copy(hdr.addr2, sta->addr); 201 switch (frame_control & (IEEE80211_FCTL_TODS | 202 IEEE80211_FCTL_FROMDS)) { 203 case 0: 204 ether_addr_copy(hdr.addr3, vif->bss_conf.bssid); 205 break; 206 case IEEE80211_FCTL_FROMDS: 207 ether_addr_copy(hdr.addr3, eth_hdr->h_source); 208 break; 209 case IEEE80211_FCTL_TODS: 210 ether_addr_copy(hdr.addr3, eth_hdr->h_dest); 211 break; 212 case IEEE80211_FCTL_TODS | IEEE80211_FCTL_FROMDS: 213 ether_addr_copy(hdr.addr3, eth_hdr->h_dest); 214 ether_addr_copy(hdr.addr4, eth_hdr->h_source); 215 break; 216 default: 217 break; 218 } 219 220 skb_pull(skb, hdr_gap + sizeof(struct ethhdr) - 2); 221 if (eth_hdr->h_proto == cpu_to_be16(ETH_P_AARP) || 222 eth_hdr->h_proto == cpu_to_be16(ETH_P_IPX)) 223 ether_addr_copy(skb_push(skb, ETH_ALEN), bridge_tunnel_header); 224 else if (be16_to_cpu(eth_hdr->h_proto) >= ETH_P_802_3_MIN) 225 ether_addr_copy(skb_push(skb, ETH_ALEN), rfc1042_header); 226 else 227 skb_pull(skb, 2); 228 229 if (ieee80211_has_order(hdr.frame_control)) 230 memcpy(skb_push(skb, IEEE80211_HT_CTL_LEN), &rxd[11], 231 IEEE80211_HT_CTL_LEN); 232 if (ieee80211_is_data_qos(hdr.frame_control)) { 233 __le16 qos_ctrl; 234 235 qos_ctrl = cpu_to_le16(le32_get_bits(rxd[10], MT_RXD10_QOS_CTL)); 236 memcpy(skb_push(skb, IEEE80211_QOS_CTL_LEN), &qos_ctrl, 237 IEEE80211_QOS_CTL_LEN); 238 } 239 240 if (ieee80211_has_a4(hdr.frame_control)) 241 memcpy(skb_push(skb, sizeof(hdr)), &hdr, sizeof(hdr)); 242 else 243 memcpy(skb_push(skb, sizeof(hdr) - 6), &hdr, sizeof(hdr) - 6); 244 245 return 0; 246 } 247 248 static int 249 mt7925_mac_fill_rx_rate(struct mt792x_dev *dev, 250 struct mt76_rx_status *status, 251 struct ieee80211_supported_band *sband, 252 __le32 *rxv, u8 *mode) 253 { 254 u32 v0, v2; 255 u8 stbc, gi, bw, dcm, nss; 256 int i, idx; 257 bool cck = false; 258 259 v0 = le32_to_cpu(rxv[0]); 260 v2 = le32_to_cpu(rxv[2]); 261 262 idx = FIELD_GET(MT_PRXV_TX_RATE, v0); 263 i = idx; 264 nss = FIELD_GET(MT_PRXV_NSTS, v0) + 1; 265 266 stbc = FIELD_GET(MT_PRXV_HT_STBC, v2); 267 gi = FIELD_GET(MT_PRXV_HT_SHORT_GI, v2); 268 *mode = FIELD_GET(MT_PRXV_TX_MODE, v2); 269 dcm = FIELD_GET(MT_PRXV_DCM, v2); 270 bw = FIELD_GET(MT_PRXV_FRAME_MODE, v2); 271 272 switch (*mode) { 273 case MT_PHY_TYPE_CCK: 274 cck = true; 275 fallthrough; 276 case MT_PHY_TYPE_OFDM: 277 i = mt76_get_rate(&dev->mt76, sband, i, cck); 278 break; 279 case MT_PHY_TYPE_HT_GF: 280 case MT_PHY_TYPE_HT: 281 status->encoding = RX_ENC_HT; 282 if (gi) 283 status->enc_flags |= RX_ENC_FLAG_SHORT_GI; 284 if (i > 31) 285 return -EINVAL; 286 break; 287 case MT_PHY_TYPE_VHT: 288 status->nss = nss; 289 status->encoding = RX_ENC_VHT; 290 if (gi) 291 status->enc_flags |= RX_ENC_FLAG_SHORT_GI; 292 if (i > 11) 293 return -EINVAL; 294 break; 295 case MT_PHY_TYPE_HE_MU: 296 case MT_PHY_TYPE_HE_SU: 297 case MT_PHY_TYPE_HE_EXT_SU: 298 case MT_PHY_TYPE_HE_TB: 299 status->nss = nss; 300 status->encoding = RX_ENC_HE; 301 i &= GENMASK(3, 0); 302 303 if (gi <= NL80211_RATE_INFO_HE_GI_3_2) 304 status->he_gi = gi; 305 306 status->he_dcm = dcm; 307 break; 308 case MT_PHY_TYPE_EHT_SU: 309 case MT_PHY_TYPE_EHT_TRIG: 310 case MT_PHY_TYPE_EHT_MU: 311 status->nss = nss; 312 status->encoding = RX_ENC_EHT; 313 i &= GENMASK(3, 0); 314 315 if (gi <= NL80211_RATE_INFO_EHT_GI_3_2) 316 status->eht.gi = gi; 317 break; 318 default: 319 return -EINVAL; 320 } 321 status->rate_idx = i; 322 323 switch (bw) { 324 case IEEE80211_STA_RX_BW_20: 325 break; 326 case IEEE80211_STA_RX_BW_40: 327 if (*mode & MT_PHY_TYPE_HE_EXT_SU && 328 (idx & MT_PRXV_TX_ER_SU_106T)) { 329 status->bw = RATE_INFO_BW_HE_RU; 330 status->he_ru = 331 NL80211_RATE_INFO_HE_RU_ALLOC_106; 332 } else { 333 status->bw = RATE_INFO_BW_40; 334 } 335 break; 336 case IEEE80211_STA_RX_BW_80: 337 status->bw = RATE_INFO_BW_80; 338 break; 339 case IEEE80211_STA_RX_BW_160: 340 status->bw = RATE_INFO_BW_160; 341 break; 342 /* RXV can report 320 in two positions */ 343 case IEEE80211_STA_RX_BW_320: 344 case IEEE80211_STA_RX_BW_320 + 1: 345 status->bw = RATE_INFO_BW_320; 346 break; 347 default: 348 return -EINVAL; 349 } 350 351 status->enc_flags |= RX_ENC_FLAG_STBC_MASK * stbc; 352 if (*mode < MT_PHY_TYPE_HE_SU && gi) 353 status->enc_flags |= RX_ENC_FLAG_SHORT_GI; 354 355 return 0; 356 } 357 358 static int 359 mt7925_mac_fill_rx(struct mt792x_dev *dev, struct sk_buff *skb) 360 { 361 u32 csum_mask = MT_RXD3_NORMAL_IP_SUM | MT_RXD3_NORMAL_UDP_TCP_SUM; 362 struct mt76_rx_status *status = (struct mt76_rx_status *)skb->cb; 363 bool hdr_trans, unicast, insert_ccmp_hdr = false; 364 u8 chfreq, qos_ctl = 0, remove_pad, amsdu_info; 365 u16 hdr_gap; 366 __le32 *rxv = NULL, *rxd = (__le32 *)skb->data; 367 struct mt76_phy *mphy = &dev->mt76.phy; 368 struct mt792x_phy *phy = &dev->phy; 369 struct ieee80211_supported_band *sband; 370 u32 csum_status = *(u32 *)skb->cb; 371 u32 rxd1 = le32_to_cpu(rxd[1]); 372 u32 rxd2 = le32_to_cpu(rxd[2]); 373 u32 rxd3 = le32_to_cpu(rxd[3]); 374 u32 rxd4 = le32_to_cpu(rxd[4]); 375 struct mt792x_link_sta *mlink; 376 u8 mode = 0; /* , band_idx; */ 377 u16 seq_ctrl = 0; 378 __le16 fc = 0; 379 int idx; 380 381 memset(status, 0, sizeof(*status)); 382 383 if (!test_bit(MT76_STATE_RUNNING, &mphy->state)) 384 return -EINVAL; 385 386 if (rxd2 & MT_RXD2_NORMAL_AMSDU_ERR) 387 return -EINVAL; 388 389 hdr_trans = rxd2 & MT_RXD2_NORMAL_HDR_TRANS; 390 if (hdr_trans && (rxd1 & MT_RXD1_NORMAL_CM)) 391 return -EINVAL; 392 393 /* ICV error or CCMP/BIP/WPI MIC error */ 394 if (rxd1 & MT_RXD1_NORMAL_ICV_ERR) 395 status->flag |= RX_FLAG_ONLY_MONITOR; 396 397 chfreq = FIELD_GET(MT_RXD3_NORMAL_CH_FREQ, rxd3); 398 unicast = FIELD_GET(MT_RXD3_NORMAL_ADDR_TYPE, rxd3) == MT_RXD3_NORMAL_U2M; 399 idx = FIELD_GET(MT_RXD1_NORMAL_WLAN_IDX, rxd1); 400 status->wcid = mt792x_rx_get_wcid(dev, idx, unicast); 401 402 if (status->wcid) { 403 mlink = container_of(status->wcid, struct mt792x_link_sta, wcid); 404 mt76_wcid_add_poll(&dev->mt76, &mlink->wcid); 405 } 406 407 mt792x_get_status_freq_info(status, chfreq); 408 409 switch (status->band) { 410 case NL80211_BAND_5GHZ: 411 sband = &mphy->sband_5g.sband; 412 break; 413 case NL80211_BAND_6GHZ: 414 sband = &mphy->sband_6g.sband; 415 break; 416 default: 417 sband = &mphy->sband_2g.sband; 418 break; 419 } 420 421 if (!sband->channels) 422 return -EINVAL; 423 424 if (mt76_is_mmio(&dev->mt76) && (rxd3 & csum_mask) == csum_mask && 425 !(csum_status & (BIT(0) | BIT(2) | BIT(3)))) 426 skb->ip_summed = CHECKSUM_UNNECESSARY; 427 428 if (rxd3 & MT_RXD3_NORMAL_FCS_ERR) 429 status->flag |= RX_FLAG_FAILED_FCS_CRC; 430 431 if (rxd1 & MT_RXD1_NORMAL_TKIP_MIC_ERR) 432 status->flag |= RX_FLAG_MMIC_ERROR; 433 434 if (FIELD_GET(MT_RXD2_NORMAL_SEC_MODE, rxd2) != 0 && 435 !(rxd1 & (MT_RXD1_NORMAL_CLM | MT_RXD1_NORMAL_CM))) { 436 status->flag |= RX_FLAG_DECRYPTED; 437 status->flag |= RX_FLAG_IV_STRIPPED; 438 status->flag |= RX_FLAG_MMIC_STRIPPED | RX_FLAG_MIC_STRIPPED; 439 } 440 441 remove_pad = FIELD_GET(MT_RXD2_NORMAL_HDR_OFFSET, rxd2); 442 443 if (rxd2 & MT_RXD2_NORMAL_MAX_LEN_ERROR) 444 return -EINVAL; 445 446 rxd += 8; 447 if (rxd1 & MT_RXD1_NORMAL_GROUP_4) { 448 u32 v0 = le32_to_cpu(rxd[0]); 449 u32 v2 = le32_to_cpu(rxd[2]); 450 451 /* TODO: need to map rxd address */ 452 fc = cpu_to_le16(FIELD_GET(MT_RXD8_FRAME_CONTROL, v0)); 453 seq_ctrl = FIELD_GET(MT_RXD10_SEQ_CTRL, v2); 454 qos_ctl = FIELD_GET(MT_RXD10_QOS_CTL, v2); 455 456 rxd += 4; 457 if ((u8 *)rxd - skb->data >= skb->len) 458 return -EINVAL; 459 } 460 461 if (rxd1 & MT_RXD1_NORMAL_GROUP_1) { 462 u8 *data = (u8 *)rxd; 463 464 if (status->flag & RX_FLAG_DECRYPTED) { 465 switch (FIELD_GET(MT_RXD2_NORMAL_SEC_MODE, rxd2)) { 466 case MT_CIPHER_AES_CCMP: 467 case MT_CIPHER_CCMP_CCX: 468 case MT_CIPHER_CCMP_256: 469 insert_ccmp_hdr = 470 FIELD_GET(MT_RXD2_NORMAL_FRAG, rxd2); 471 fallthrough; 472 case MT_CIPHER_TKIP: 473 case MT_CIPHER_TKIP_NO_MIC: 474 case MT_CIPHER_GCMP: 475 case MT_CIPHER_GCMP_256: 476 status->iv[0] = data[5]; 477 status->iv[1] = data[4]; 478 status->iv[2] = data[3]; 479 status->iv[3] = data[2]; 480 status->iv[4] = data[1]; 481 status->iv[5] = data[0]; 482 break; 483 default: 484 break; 485 } 486 } 487 rxd += 4; 488 if ((u8 *)rxd - skb->data >= skb->len) 489 return -EINVAL; 490 } 491 492 if (rxd1 & MT_RXD1_NORMAL_GROUP_2) { 493 status->timestamp = le32_to_cpu(rxd[0]); 494 status->flag |= RX_FLAG_MACTIME_START; 495 496 if (!(rxd2 & MT_RXD2_NORMAL_NON_AMPDU)) { 497 status->flag |= RX_FLAG_AMPDU_DETAILS; 498 499 /* all subframes of an A-MPDU have the same timestamp */ 500 if (phy->rx_ampdu_ts != status->timestamp) { 501 if (!++phy->ampdu_ref) 502 phy->ampdu_ref++; 503 } 504 phy->rx_ampdu_ts = status->timestamp; 505 506 status->ampdu_ref = phy->ampdu_ref; 507 } 508 509 rxd += 4; 510 if ((u8 *)rxd - skb->data >= skb->len) 511 return -EINVAL; 512 } 513 514 /* RXD Group 3 - P-RXV */ 515 if (rxd1 & MT_RXD1_NORMAL_GROUP_3) { 516 u32 v3; 517 int ret; 518 519 rxv = rxd; 520 rxd += 4; 521 if ((u8 *)rxd - skb->data >= skb->len) 522 return -EINVAL; 523 524 v3 = le32_to_cpu(rxv[3]); 525 526 status->chains = mphy->antenna_mask; 527 status->chain_signal[0] = to_rssi(MT_PRXV_RCPI0, v3); 528 status->chain_signal[1] = to_rssi(MT_PRXV_RCPI1, v3); 529 status->chain_signal[2] = to_rssi(MT_PRXV_RCPI2, v3); 530 status->chain_signal[3] = to_rssi(MT_PRXV_RCPI3, v3); 531 532 /* RXD Group 5 - C-RXV */ 533 if (rxd1 & MT_RXD1_NORMAL_GROUP_5) { 534 rxd += 24; 535 if ((u8 *)rxd - skb->data >= skb->len) 536 return -EINVAL; 537 } 538 539 ret = mt7925_mac_fill_rx_rate(dev, status, sband, rxv, &mode); 540 if (ret < 0) 541 return ret; 542 } 543 544 amsdu_info = FIELD_GET(MT_RXD4_NORMAL_PAYLOAD_FORMAT, rxd4); 545 status->amsdu = !!amsdu_info; 546 if (status->amsdu) { 547 status->first_amsdu = amsdu_info == MT_RXD4_FIRST_AMSDU_FRAME; 548 status->last_amsdu = amsdu_info == MT_RXD4_LAST_AMSDU_FRAME; 549 } 550 551 hdr_gap = (u8 *)rxd - skb->data + 2 * remove_pad; 552 if (hdr_trans && ieee80211_has_morefrags(fc)) { 553 if (mt7925_reverse_frag0_hdr_trans(skb, hdr_gap)) 554 return -EINVAL; 555 hdr_trans = false; 556 } else { 557 int pad_start = 0; 558 559 skb_pull(skb, hdr_gap); 560 if (!hdr_trans && status->amsdu) { 561 pad_start = ieee80211_get_hdrlen_from_skb(skb); 562 } else if (hdr_trans && (rxd2 & MT_RXD2_NORMAL_HDR_TRANS_ERROR)) { 563 /* When header translation failure is indicated, 564 * the hardware will insert an extra 2-byte field 565 * containing the data length after the protocol 566 * type field. 567 */ 568 pad_start = 12; 569 if (get_unaligned_be16(skb->data + pad_start) == ETH_P_8021Q) 570 pad_start += 4; 571 else 572 pad_start = 0; 573 } 574 575 if (pad_start) { 576 memmove(skb->data + 2, skb->data, pad_start); 577 skb_pull(skb, 2); 578 } 579 } 580 581 if (!hdr_trans) { 582 struct ieee80211_hdr *hdr; 583 584 if (insert_ccmp_hdr) { 585 u8 key_id = FIELD_GET(MT_RXD1_NORMAL_KEY_ID, rxd1); 586 587 mt76_insert_ccmp_hdr(skb, key_id); 588 } 589 590 hdr = mt76_skb_get_hdr(skb); 591 fc = hdr->frame_control; 592 if (ieee80211_is_data_qos(fc)) { 593 seq_ctrl = le16_to_cpu(hdr->seq_ctrl); 594 qos_ctl = *ieee80211_get_qos_ctl(hdr); 595 } 596 skb_set_mac_header(skb, (unsigned char *)hdr - skb->data); 597 } else { 598 status->flag |= RX_FLAG_8023; 599 } 600 601 mt792x_mac_assoc_rssi(dev, skb); 602 603 if (rxv && !(status->flag & RX_FLAG_8023)) { 604 switch (status->encoding) { 605 case RX_ENC_EHT: 606 mt76_connac3_mac_decode_eht_radiotap(skb, rxv, mode); 607 break; 608 case RX_ENC_HE: 609 mt76_connac3_mac_decode_he_radiotap(skb, rxv, mode); 610 break; 611 default: 612 break; 613 } 614 } 615 616 if (!status->wcid || !ieee80211_is_data_qos(fc)) 617 return 0; 618 619 status->aggr = unicast && !ieee80211_is_qos_nullfunc(fc); 620 status->seqno = IEEE80211_SEQ_TO_SN(seq_ctrl); 621 status->qos_ctl = qos_ctl; 622 623 return 0; 624 } 625 626 static void 627 mt7925_mac_write_txwi_8023(__le32 *txwi, struct sk_buff *skb, 628 struct mt76_wcid *wcid) 629 { 630 u8 tid = skb->priority & IEEE80211_QOS_CTL_TID_MASK; 631 u8 fc_type, fc_stype; 632 u16 ethertype; 633 bool wmm = false; 634 u32 val; 635 636 if (wcid->sta) { 637 struct ieee80211_sta *sta; 638 639 sta = container_of((void *)wcid, struct ieee80211_sta, drv_priv); 640 wmm = sta->wme; 641 } 642 643 val = FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_802_3) | 644 FIELD_PREP(MT_TXD1_TID, tid); 645 646 ethertype = get_unaligned_be16(&skb->data[12]); 647 if (ethertype >= ETH_P_802_3_MIN) 648 val |= MT_TXD1_ETH_802_3; 649 650 txwi[1] |= cpu_to_le32(val); 651 652 fc_type = IEEE80211_FTYPE_DATA >> 2; 653 fc_stype = wmm ? IEEE80211_STYPE_QOS_DATA >> 4 : 0; 654 655 val = FIELD_PREP(MT_TXD2_FRAME_TYPE, fc_type) | 656 FIELD_PREP(MT_TXD2_SUB_TYPE, fc_stype); 657 658 txwi[2] |= cpu_to_le32(val); 659 } 660 661 static void 662 mt7925_mac_write_txwi_80211(struct mt76_dev *dev, __le32 *txwi, 663 struct sk_buff *skb, 664 struct ieee80211_key_conf *key) 665 { 666 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 667 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data; 668 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 669 bool multicast = is_multicast_ether_addr(hdr->addr1); 670 u8 tid = skb->priority & IEEE80211_QOS_CTL_TID_MASK; 671 __le16 fc = hdr->frame_control; 672 u8 fc_type, fc_stype; 673 u32 val; 674 675 if (ieee80211_is_action(fc) && 676 skb->len >= IEEE80211_MIN_ACTION_SIZE(action_code) && 677 mgmt->u.action.category == WLAN_CATEGORY_BACK && 678 mgmt->u.action.action_code == WLAN_ACTION_ADDBA_REQ) 679 tid = MT_TX_ADDBA; 680 else if (ieee80211_is_mgmt(hdr->frame_control)) 681 tid = MT_TX_NORMAL; 682 683 val = FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_802_11) | 684 FIELD_PREP(MT_TXD1_HDR_INFO, 685 ieee80211_get_hdrlen_from_skb(skb) / 2) | 686 FIELD_PREP(MT_TXD1_TID, tid); 687 688 if (!ieee80211_is_data(fc) || multicast || 689 info->flags & IEEE80211_TX_CTL_USE_MINRATE) 690 val |= MT_TXD1_FIXED_RATE; 691 692 if (key && multicast && ieee80211_is_robust_mgmt_frame(skb) && 693 key->cipher == WLAN_CIPHER_SUITE_AES_CMAC) { 694 val |= MT_TXD1_BIP; 695 txwi[3] &= ~cpu_to_le32(MT_TXD3_PROTECT_FRAME); 696 } 697 698 txwi[1] |= cpu_to_le32(val); 699 700 fc_type = (le16_to_cpu(fc) & IEEE80211_FCTL_FTYPE) >> 2; 701 fc_stype = (le16_to_cpu(fc) & IEEE80211_FCTL_STYPE) >> 4; 702 703 val = FIELD_PREP(MT_TXD2_FRAME_TYPE, fc_type) | 704 FIELD_PREP(MT_TXD2_SUB_TYPE, fc_stype); 705 706 txwi[2] |= cpu_to_le32(val); 707 708 txwi[3] |= cpu_to_le32(FIELD_PREP(MT_TXD3_BCM, multicast)); 709 if (ieee80211_is_beacon(fc)) 710 txwi[3] |= cpu_to_le32(MT_TXD3_REM_TX_COUNT); 711 712 if (info->flags & IEEE80211_TX_CTL_INJECTED) { 713 u16 seqno = le16_to_cpu(hdr->seq_ctrl); 714 715 if (ieee80211_is_back_req(hdr->frame_control)) { 716 struct ieee80211_bar *bar; 717 718 bar = (struct ieee80211_bar *)skb->data; 719 seqno = le16_to_cpu(bar->start_seq_num); 720 } 721 722 val = MT_TXD3_SN_VALID | 723 FIELD_PREP(MT_TXD3_SEQ, IEEE80211_SEQ_TO_SN(seqno)); 724 txwi[3] |= cpu_to_le32(val); 725 txwi[3] &= ~cpu_to_le32(MT_TXD3_HW_AMSDU); 726 } 727 } 728 729 void 730 mt7925_mac_write_txwi(struct mt76_dev *dev, __le32 *txwi, 731 struct sk_buff *skb, struct mt76_wcid *wcid, 732 struct ieee80211_key_conf *key, int pid, 733 enum mt76_txq_id qid, u32 changed) 734 { 735 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 736 struct ieee80211_vif *vif = info->control.vif; 737 u8 p_fmt, q_idx, omac_idx = 0, wmm_idx = 0, band_idx = 0; 738 u32 val, sz_txd = mt76_is_mmio(dev) ? MT_TXD_SIZE : MT_SDIO_TXD_SIZE; 739 bool is_8023 = info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP; 740 struct mt76_vif_link *mvif; 741 bool beacon = !!(changed & (BSS_CHANGED_BEACON | 742 BSS_CHANGED_BEACON_ENABLED)); 743 bool inband_disc = !!(changed & (BSS_CHANGED_UNSOL_BCAST_PROBE_RESP | 744 BSS_CHANGED_FILS_DISCOVERY)); 745 struct mt792x_bss_conf *mconf; 746 747 mconf = vif ? mt792x_vif_to_link((struct mt792x_vif *)vif->drv_priv, 748 wcid->link_id) : NULL; 749 mvif = mconf ? (struct mt76_vif_link *)&mconf->mt76 : NULL; 750 751 if (mvif) { 752 omac_idx = mvif->omac_idx; 753 wmm_idx = mvif->wmm_idx; 754 band_idx = mvif->band_idx; 755 } 756 757 if (inband_disc) { 758 p_fmt = MT_TX_TYPE_FW; 759 q_idx = MT_LMAC_ALTX0; 760 } else if (beacon) { 761 p_fmt = MT_TX_TYPE_FW; 762 q_idx = MT_LMAC_BCN0; 763 } else if (qid >= MT_TXQ_PSD) { 764 p_fmt = mt76_is_mmio(dev) ? MT_TX_TYPE_CT : MT_TX_TYPE_SF; 765 q_idx = MT_LMAC_ALTX0; 766 } else { 767 p_fmt = mt76_is_mmio(dev) ? MT_TX_TYPE_CT : MT_TX_TYPE_SF; 768 q_idx = wmm_idx * MT76_CONNAC_MAX_WMM_SETS + 769 mt76_connac_lmac_mapping(skb_get_queue_mapping(skb)); 770 771 /* counting non-offloading skbs */ 772 wcid->stats.tx_bytes += skb->len; 773 wcid->stats.tx_packets++; 774 } 775 776 val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len + sz_txd) | 777 FIELD_PREP(MT_TXD0_PKT_FMT, p_fmt) | 778 FIELD_PREP(MT_TXD0_Q_IDX, q_idx); 779 txwi[0] = cpu_to_le32(val); 780 781 val = FIELD_PREP(MT_TXD1_WLAN_IDX, wcid->idx) | 782 FIELD_PREP(MT_TXD1_OWN_MAC, omac_idx); 783 784 if (band_idx) 785 val |= FIELD_PREP(MT_TXD1_TGID, band_idx); 786 787 txwi[1] = cpu_to_le32(val); 788 txwi[2] = 0; 789 790 val = FIELD_PREP(MT_TXD3_REM_TX_COUNT, 15); 791 792 if (key) 793 val |= MT_TXD3_PROTECT_FRAME; 794 if (info->flags & IEEE80211_TX_CTL_NO_ACK) 795 val |= MT_TXD3_NO_ACK; 796 if (wcid->amsdu) 797 val |= MT_TXD3_HW_AMSDU; 798 799 txwi[3] = cpu_to_le32(val); 800 txwi[4] = 0; 801 802 val = FIELD_PREP(MT_TXD5_PID, pid); 803 if (pid >= MT_PACKET_ID_FIRST) { 804 val |= MT_TXD5_TX_STATUS_HOST; 805 txwi[3] |= cpu_to_le32(MT_TXD3_BA_DISABLE); 806 txwi[3] &= ~cpu_to_le32(MT_TXD3_HW_AMSDU); 807 } 808 809 txwi[5] = cpu_to_le32(val); 810 811 val = MT_TXD6_DAS | FIELD_PREP(MT_TXD6_MSDU_CNT, 1); 812 if (vif && (!ieee80211_vif_is_mld(vif) || 813 (q_idx >= MT_LMAC_ALTX0 && q_idx <= MT_LMAC_BCN0))) 814 val |= MT_TXD6_DIS_MAT; 815 txwi[6] = cpu_to_le32(val); 816 txwi[7] = 0; 817 818 if (is_8023) 819 mt7925_mac_write_txwi_8023(txwi, skb, wcid); 820 else 821 mt7925_mac_write_txwi_80211(dev, txwi, skb, key); 822 823 if (txwi[1] & cpu_to_le32(MT_TXD1_FIXED_RATE)) { 824 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 825 bool mcast = ieee80211_is_data(hdr->frame_control) && 826 is_multicast_ether_addr(hdr->addr1); 827 u8 idx = MT792x_BASIC_RATES_TBL; 828 829 if (mvif) { 830 if (mcast && mvif->mcast_rates_idx) 831 idx = mvif->mcast_rates_idx; 832 else if (beacon && mvif->beacon_rates_idx) 833 idx = mvif->beacon_rates_idx; 834 else 835 idx = mvif->basic_rates_idx; 836 } 837 838 txwi[6] |= cpu_to_le32(FIELD_PREP(MT_TXD6_TX_RATE, idx)); 839 txwi[3] |= cpu_to_le32(MT_TXD3_BA_DISABLE); 840 } 841 } 842 EXPORT_SYMBOL_GPL(mt7925_mac_write_txwi); 843 844 static void mt7925_tx_check_aggr(struct ieee80211_sta *sta, struct sk_buff *skb, 845 struct mt76_wcid *wcid) 846 { 847 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 848 struct ieee80211_link_sta *link_sta; 849 struct mt792x_sta *msta; 850 bool is_8023; 851 u16 fc, tid; 852 853 if (!sta) 854 return; 855 856 link_sta = rcu_dereference(sta->link[wcid->link_id]); 857 if (!link_sta) 858 return; 859 860 if (!(link_sta->ht_cap.ht_supported || link_sta->he_cap.has_he)) 861 return; 862 863 tid = skb->priority & IEEE80211_QOS_CTL_TID_MASK; 864 is_8023 = info->flags & IEEE80211_TX_CTL_HW_80211_ENCAP; 865 866 if (is_8023) { 867 fc = IEEE80211_FTYPE_DATA | 868 (sta->wme ? IEEE80211_STYPE_QOS_DATA : 869 IEEE80211_STYPE_DATA); 870 } else { 871 /* No need to get precise TID for Action/Management Frame, 872 * since it will not meet the following Frame Control 873 * condition anyway. 874 */ 875 876 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 877 878 fc = le16_to_cpu(hdr->frame_control) & 879 (IEEE80211_FCTL_FTYPE | IEEE80211_FCTL_STYPE); 880 } 881 882 if (unlikely(fc != (IEEE80211_FTYPE_DATA | IEEE80211_STYPE_QOS_DATA))) 883 return; 884 885 msta = (struct mt792x_sta *)sta->drv_priv; 886 887 /* Packets belonging to the same TID can be transmitted over multiple 888 * links. Keep the TX BA session state in the primary link so all links 889 * share the same AMPDU bookkeeping. 890 */ 891 if (!test_and_set_bit(tid, &msta->deflink.wcid.ampdu_state)) { 892 if (ieee80211_start_tx_ba_session(sta, tid, 0)) 893 clear_bit(tid, &msta->deflink.wcid.ampdu_state); 894 895 } 896 } 897 898 static bool 899 mt7925_mac_add_txs_skb(struct mt792x_dev *dev, struct mt76_wcid *wcid, 900 int pid, __le32 *txs_data) 901 { 902 struct mt76_sta_stats *stats = &wcid->stats; 903 struct ieee80211_supported_band *sband; 904 struct mt76_dev *mdev = &dev->mt76; 905 struct mt76_phy *mphy; 906 struct ieee80211_tx_info *info; 907 struct sk_buff_head list; 908 struct rate_info rate = {}; 909 struct sk_buff *skb; 910 bool cck = false; 911 u32 txrate, txs, mode, stbc; 912 913 mt76_tx_status_lock(mdev, &list); 914 skb = mt76_tx_status_skb_get(mdev, wcid, pid, &list); 915 if (!skb) 916 goto out_no_skb; 917 918 txs = le32_to_cpu(txs_data[0]); 919 920 info = IEEE80211_SKB_CB(skb); 921 if (!(txs & MT_TXS0_ACK_ERROR_MASK)) 922 info->flags |= IEEE80211_TX_STAT_ACK; 923 924 info->status.ampdu_len = 1; 925 info->status.ampdu_ack_len = !!(info->flags & 926 IEEE80211_TX_STAT_ACK); 927 928 info->status.rates[0].idx = -1; 929 930 txrate = FIELD_GET(MT_TXS0_TX_RATE, txs); 931 932 rate.mcs = FIELD_GET(MT_TX_RATE_IDX, txrate); 933 rate.nss = FIELD_GET(MT_TX_RATE_NSS, txrate) + 1; 934 stbc = le32_get_bits(txs_data[3], MT_TXS3_RATE_STBC); 935 936 if (stbc && rate.nss > 1) 937 rate.nss >>= 1; 938 939 if (rate.nss - 1 < ARRAY_SIZE(stats->tx_nss)) 940 stats->tx_nss[rate.nss - 1]++; 941 if (rate.mcs < ARRAY_SIZE(stats->tx_mcs)) 942 stats->tx_mcs[rate.mcs]++; 943 944 mode = FIELD_GET(MT_TX_RATE_MODE, txrate); 945 switch (mode) { 946 case MT_PHY_TYPE_CCK: 947 cck = true; 948 fallthrough; 949 case MT_PHY_TYPE_OFDM: 950 mphy = mt76_dev_phy(mdev, wcid->phy_idx); 951 952 if (mphy->chandef.chan->band == NL80211_BAND_5GHZ) 953 sband = &mphy->sband_5g.sband; 954 else if (mphy->chandef.chan->band == NL80211_BAND_6GHZ) 955 sband = &mphy->sband_6g.sband; 956 else 957 sband = &mphy->sband_2g.sband; 958 959 rate.mcs = mt76_get_rate(mphy->dev, sband, rate.mcs, cck); 960 rate.legacy = sband->bitrates[rate.mcs].bitrate; 961 break; 962 case MT_PHY_TYPE_HT: 963 case MT_PHY_TYPE_HT_GF: 964 if (rate.mcs > 31) 965 goto out; 966 967 rate.flags = RATE_INFO_FLAGS_MCS; 968 if (wcid->rate.flags & RATE_INFO_FLAGS_SHORT_GI) 969 rate.flags |= RATE_INFO_FLAGS_SHORT_GI; 970 break; 971 case MT_PHY_TYPE_VHT: 972 if (rate.mcs > 9) 973 goto out; 974 975 rate.flags = RATE_INFO_FLAGS_VHT_MCS; 976 break; 977 case MT_PHY_TYPE_HE_SU: 978 case MT_PHY_TYPE_HE_EXT_SU: 979 case MT_PHY_TYPE_HE_TB: 980 case MT_PHY_TYPE_HE_MU: 981 if (rate.mcs > 11) 982 goto out; 983 984 rate.he_gi = wcid->rate.he_gi; 985 rate.he_dcm = FIELD_GET(MT_TX_RATE_DCM, txrate); 986 rate.flags = RATE_INFO_FLAGS_HE_MCS; 987 break; 988 case MT_PHY_TYPE_EHT_SU: 989 case MT_PHY_TYPE_EHT_TRIG: 990 case MT_PHY_TYPE_EHT_MU: 991 if (rate.mcs > 13) 992 goto out; 993 994 rate.eht_gi = wcid->rate.eht_gi; 995 rate.flags = RATE_INFO_FLAGS_EHT_MCS; 996 break; 997 default: 998 goto out; 999 } 1000 1001 stats->tx_mode[mode]++; 1002 1003 switch (FIELD_GET(MT_TXS0_BW, txs)) { 1004 case IEEE80211_STA_RX_BW_320: 1005 rate.bw = RATE_INFO_BW_320; 1006 stats->tx_bw[4]++; 1007 break; 1008 case IEEE80211_STA_RX_BW_160: 1009 rate.bw = RATE_INFO_BW_160; 1010 stats->tx_bw[3]++; 1011 break; 1012 case IEEE80211_STA_RX_BW_80: 1013 rate.bw = RATE_INFO_BW_80; 1014 stats->tx_bw[2]++; 1015 break; 1016 case IEEE80211_STA_RX_BW_40: 1017 rate.bw = RATE_INFO_BW_40; 1018 stats->tx_bw[1]++; 1019 break; 1020 default: 1021 rate.bw = RATE_INFO_BW_20; 1022 stats->tx_bw[0]++; 1023 break; 1024 } 1025 wcid->rate = rate; 1026 1027 out: 1028 mt76_tx_status_skb_done(mdev, skb, &list); 1029 1030 out_no_skb: 1031 mt76_tx_status_unlock(mdev, &list); 1032 1033 return !!skb; 1034 } 1035 1036 void mt7925_mac_add_txs(struct mt792x_dev *dev, void *data) 1037 { 1038 struct mt792x_link_sta *mlink = NULL; 1039 struct mt76_wcid *wcid; 1040 __le32 *txs_data = data; 1041 u16 wcidx; 1042 u8 pid; 1043 1044 if (le32_get_bits(txs_data[0], MT_TXS0_TXS_FORMAT) > 1) 1045 return; 1046 1047 wcidx = le32_get_bits(txs_data[2], MT_TXS2_WCID); 1048 pid = le32_get_bits(txs_data[3], MT_TXS3_PID); 1049 1050 if (pid < MT_PACKET_ID_FIRST) 1051 return; 1052 1053 if (wcidx >= MT792x_WTBL_SIZE) 1054 return; 1055 1056 rcu_read_lock(); 1057 1058 wcid = mt76_wcid_ptr(dev, wcidx); 1059 if (!wcid) 1060 goto out; 1061 1062 mlink = container_of(wcid, struct mt792x_link_sta, wcid); 1063 1064 mt7925_mac_add_txs_skb(dev, wcid, pid, txs_data); 1065 if (!wcid->sta) 1066 goto out; 1067 1068 mt76_wcid_add_poll(&dev->mt76, &mlink->wcid); 1069 1070 out: 1071 rcu_read_unlock(); 1072 } 1073 1074 void mt7925_txwi_free(struct mt792x_dev *dev, struct mt76_txwi_cache *t, 1075 struct ieee80211_sta *sta, struct mt76_wcid *wcid, 1076 struct list_head *free_list) 1077 { 1078 struct mt76_dev *mdev = &dev->mt76; 1079 __le32 *txwi; 1080 u16 wcid_idx; 1081 1082 mt76_connac_txp_skb_unmap(mdev, t); 1083 if (!t->skb) 1084 goto out; 1085 1086 txwi = (__le32 *)mt76_get_txwi_ptr(mdev, t); 1087 if (sta) { 1088 if (likely(t->skb->protocol != cpu_to_be16(ETH_P_PAE))) 1089 mt7925_tx_check_aggr(sta, t->skb, wcid); 1090 1091 wcid_idx = wcid->idx; 1092 } else { 1093 wcid_idx = le32_get_bits(txwi[1], MT_TXD1_WLAN_IDX); 1094 } 1095 1096 __mt76_tx_complete_skb(mdev, wcid_idx, t->skb, free_list); 1097 out: 1098 t->skb = NULL; 1099 mt76_put_txwi(mdev, t); 1100 } 1101 EXPORT_SYMBOL_GPL(mt7925_txwi_free); 1102 1103 static void 1104 mt7925_mac_tx_free(struct mt792x_dev *dev, void *data, int len) 1105 { 1106 __le32 *tx_free = (__le32 *)data, *cur_info; 1107 struct mt76_dev *mdev = &dev->mt76; 1108 struct mt76_txwi_cache *txwi; 1109 struct ieee80211_sta *sta = NULL; 1110 struct mt76_wcid *wcid = NULL; 1111 LIST_HEAD(free_list); 1112 struct sk_buff *skb, *tmp; 1113 void *end = data + len; 1114 bool wake = false; 1115 u16 total, count = 0; 1116 1117 /* clean DMA queues and unmap buffers first */ 1118 mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[MT_TXQ_PSD], false); 1119 mt76_queue_tx_cleanup(dev, dev->mphy.q_tx[MT_TXQ_BE], false); 1120 1121 if (WARN_ON_ONCE(le32_get_bits(tx_free[1], MT_TXFREE1_VER) < 4)) 1122 return; 1123 1124 total = le32_get_bits(tx_free[0], MT_TXFREE0_MSDU_CNT); 1125 for (cur_info = &tx_free[2]; count < total; cur_info++) { 1126 u32 msdu, info; 1127 u8 i; 1128 1129 if (WARN_ON_ONCE((void *)cur_info >= end)) 1130 return; 1131 /* 1'b1: new wcid pair. 1132 * 1'b0: msdu_id with the same 'wcid pair' as above. 1133 */ 1134 info = le32_to_cpu(*cur_info); 1135 if (info & MT_TXFREE_INFO_PAIR) { 1136 struct mt792x_link_sta *mlink; 1137 u16 idx; 1138 1139 idx = FIELD_GET(MT_TXFREE_INFO_WLAN_ID, info); 1140 wcid = mt76_wcid_ptr(dev, idx); 1141 sta = wcid_to_sta(wcid); 1142 if (!sta) 1143 continue; 1144 1145 mlink = container_of(wcid, struct mt792x_link_sta, wcid); 1146 mt76_wcid_add_poll(&dev->mt76, &mlink->wcid); 1147 continue; 1148 } 1149 1150 if (info & MT_TXFREE_INFO_HEADER) { 1151 if (wcid) { 1152 u32 count = FIELD_GET(MT_TXFREE_INFO_COUNT, info); 1153 1154 wcid->stats.tx_retries += count ? count - 1 : 0; 1155 wcid->stats.tx_failed += 1156 !!FIELD_GET(MT_TXFREE_INFO_STAT, info); 1157 } 1158 continue; 1159 } 1160 1161 for (i = 0; i < 2; i++) { 1162 msdu = (info >> (15 * i)) & MT_TXFREE_INFO_MSDU_ID; 1163 if (msdu == MT_TXFREE_INFO_MSDU_ID) 1164 continue; 1165 1166 count++; 1167 txwi = mt76_token_release(mdev, msdu, &wake); 1168 if (!txwi) 1169 continue; 1170 1171 mt7925_txwi_free(dev, txwi, sta, wcid, &free_list); 1172 } 1173 } 1174 1175 mt7925_mac_sta_poll(dev); 1176 1177 if (wake) 1178 mt76_set_tx_blocked(&dev->mt76, false); 1179 1180 mt76_worker_schedule(&dev->mt76.tx_worker); 1181 1182 list_for_each_entry_safe(skb, tmp, &free_list, list) { 1183 skb_list_del_init(skb); 1184 napi_consume_skb(skb, 1); 1185 } 1186 } 1187 1188 bool mt7925_rx_check(struct mt76_dev *mdev, void *data, int len) 1189 { 1190 struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76); 1191 __le32 *rxd = (__le32 *)data; 1192 __le32 *end = (__le32 *)&rxd[len / 4]; 1193 enum rx_pkt_type type; 1194 1195 type = le32_get_bits(rxd[0], MT_RXD0_PKT_TYPE); 1196 if (type != PKT_TYPE_NORMAL) { 1197 u32 sw_type = le32_get_bits(rxd[0], MT_RXD0_SW_PKT_TYPE_MASK); 1198 1199 if (unlikely((sw_type & MT_RXD0_SW_PKT_TYPE_MAP) == 1200 MT_RXD0_SW_PKT_TYPE_FRAME)) 1201 return true; 1202 } 1203 1204 switch (type) { 1205 case PKT_TYPE_TXRX_NOTIFY: 1206 /* PKT_TYPE_TXRX_NOTIFY can be received only by mmio devices */ 1207 mt7925_mac_tx_free(dev, data, len); /* mmio */ 1208 return false; 1209 case PKT_TYPE_TXS: 1210 for (rxd += 4; rxd + 12 <= end; rxd += 12) 1211 mt7925_mac_add_txs(dev, rxd); 1212 return false; 1213 default: 1214 return true; 1215 } 1216 } 1217 EXPORT_SYMBOL_GPL(mt7925_rx_check); 1218 1219 void mt7925_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q, 1220 struct sk_buff *skb, u32 *info) 1221 { 1222 struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76); 1223 __le32 *rxd = (__le32 *)skb->data; 1224 __le32 *end = (__le32 *)&skb->data[skb->len]; 1225 enum rx_pkt_type type; 1226 u16 flag; 1227 1228 type = le32_get_bits(rxd[0], MT_RXD0_PKT_TYPE); 1229 flag = le32_get_bits(rxd[0], MT_RXD0_PKT_FLAG); 1230 if (type != PKT_TYPE_NORMAL) { 1231 u32 sw_type = le32_get_bits(rxd[0], MT_RXD0_SW_PKT_TYPE_MASK); 1232 1233 if (unlikely((sw_type & MT_RXD0_SW_PKT_TYPE_MAP) == 1234 MT_RXD0_SW_PKT_TYPE_FRAME)) 1235 type = PKT_TYPE_NORMAL; 1236 } 1237 1238 if (type == PKT_TYPE_RX_EVENT && flag == 0x1) 1239 type = PKT_TYPE_NORMAL_MCU; 1240 1241 switch (type) { 1242 case PKT_TYPE_TXRX_NOTIFY: 1243 /* PKT_TYPE_TXRX_NOTIFY can be received only by mmio devices */ 1244 mt7925_mac_tx_free(dev, skb->data, skb->len); 1245 napi_consume_skb(skb, 1); 1246 break; 1247 case PKT_TYPE_RX_EVENT: 1248 mt7925_mcu_rx_event(dev, skb); 1249 break; 1250 case PKT_TYPE_TXS: 1251 for (rxd += 2; rxd + 8 <= end; rxd += 8) 1252 mt7925_mac_add_txs(dev, rxd); 1253 dev_kfree_skb(skb); 1254 break; 1255 case PKT_TYPE_NORMAL_MCU: 1256 case PKT_TYPE_NORMAL: 1257 if (!mt7925_mac_fill_rx(dev, skb)) { 1258 mt76_rx(&dev->mt76, q, skb); 1259 return; 1260 } 1261 fallthrough; 1262 default: 1263 dev_kfree_skb(skb); 1264 break; 1265 } 1266 } 1267 EXPORT_SYMBOL_GPL(mt7925_queue_rx_skb); 1268 1269 static void 1270 mt7925_vif_connect_iter(void *priv, u8 *mac, 1271 struct ieee80211_vif *vif) 1272 { 1273 struct mt792x_vif *mvif = (struct mt792x_vif *)vif->drv_priv; 1274 unsigned long valid = ieee80211_vif_is_mld(vif) ? 1275 mvif->valid_links : BIT(0); 1276 struct mt792x_dev *dev = mvif->phy->dev; 1277 struct ieee80211_hw *hw = mt76_hw(dev); 1278 struct ieee80211_bss_conf *bss_conf; 1279 struct mt792x_bss_conf *mconf; 1280 int i; 1281 1282 if (vif->type == NL80211_IFTYPE_STATION) 1283 ieee80211_disconnect(vif, true); 1284 1285 for_each_set_bit(i, &valid, IEEE80211_MLD_MAX_NUM_LINKS) { 1286 bss_conf = mt792x_vif_to_bss_conf(vif, i); 1287 mconf = mt792x_vif_to_link(mvif, i); 1288 1289 mt76_connac_mcu_uni_add_dev(&dev->mphy, bss_conf, &mconf->mt76, 1290 &mvif->sta.deflink.wcid, true); 1291 mt7925_mcu_set_tx(dev, bss_conf); 1292 } 1293 1294 if (vif->type == NL80211_IFTYPE_AP) { 1295 mt76_connac_mcu_uni_add_bss(dev->phy.mt76, vif, &mvif->sta.deflink.wcid, 1296 true, NULL); 1297 mt7925_mcu_sta_update(dev, NULL, vif, 1298 &mvif->sta.deflink, true, 1299 MT76_STA_INFO_STATE_NONE); 1300 mt7925_mcu_uni_add_beacon_offload(dev, hw, vif, true); 1301 } 1302 } 1303 1304 /* system error recovery */ 1305 void mt7925_mac_reset_work(struct work_struct *work) 1306 { 1307 struct mt792x_dev *dev = container_of(work, struct mt792x_dev, 1308 reset_work); 1309 struct ieee80211_hw *hw = mt76_hw(dev); 1310 struct mt76_connac_pm *pm = &dev->pm; 1311 int i, ret; 1312 1313 dev_dbg(dev->mt76.dev, "chip reset\n"); 1314 dev->hw_full_reset = true; 1315 ieee80211_stop_queues(hw); 1316 1317 cancel_delayed_work_sync(&dev->mphy.mac_work); 1318 cancel_delayed_work_sync(&pm->ps_work); 1319 cancel_work_sync(&pm->wake_work); 1320 1321 for (i = 0; i < 10; i++) { 1322 mutex_lock(&dev->mt76.mutex); 1323 ret = mt792x_dev_reset(dev); 1324 mutex_unlock(&dev->mt76.mutex); 1325 1326 if (!ret) 1327 break; 1328 } 1329 1330 if (i == 10) 1331 dev_err(dev->mt76.dev, "chip reset failed\n"); 1332 1333 if (test_and_clear_bit(MT76_HW_SCANNING, &dev->mphy.state)) { 1334 struct cfg80211_scan_info info = { 1335 .aborted = true, 1336 }; 1337 1338 ieee80211_scan_completed(dev->mphy.hw, &info); 1339 } 1340 1341 dev->hw_full_reset = false; 1342 pm->suspended = false; 1343 ieee80211_wake_queues(hw); 1344 ieee80211_iterate_active_interfaces(hw, 1345 IEEE80211_IFACE_ITER_RESUME_ALL, 1346 mt7925_vif_connect_iter, NULL); 1347 mt76_connac_power_save_sched(&dev->mt76.phy, pm); 1348 1349 mt7925_regd_change(&dev->phy, "00"); 1350 } 1351 1352 void mt7925_coredump_work(struct work_struct *work) 1353 { 1354 struct mt792x_dev *dev; 1355 char *dump, *data; 1356 1357 dev = (struct mt792x_dev *)container_of(work, struct mt792x_dev, 1358 coredump.work.work); 1359 1360 if (time_is_after_jiffies(dev->coredump.last_activity + 1361 4 * MT76_CONNAC_COREDUMP_TIMEOUT)) { 1362 queue_delayed_work(dev->mt76.wq, &dev->coredump.work, 1363 MT76_CONNAC_COREDUMP_TIMEOUT); 1364 return; 1365 } 1366 1367 dump = vzalloc(MT76_CONNAC_COREDUMP_SZ); 1368 data = dump; 1369 1370 while (true) { 1371 struct sk_buff *skb; 1372 1373 spin_lock_bh(&dev->mt76.lock); 1374 skb = __skb_dequeue(&dev->coredump.msg_list); 1375 spin_unlock_bh(&dev->mt76.lock); 1376 1377 if (!skb) 1378 break; 1379 1380 skb_pull(skb, sizeof(struct mt7925_mcu_rxd) + 8); 1381 if (!dump || data + skb->len - dump > MT76_CONNAC_COREDUMP_SZ) { 1382 dev_kfree_skb(skb); 1383 continue; 1384 } 1385 1386 memcpy(data, skb->data, skb->len); 1387 data += skb->len; 1388 1389 dev_kfree_skb(skb); 1390 } 1391 1392 if (dump) 1393 dev_coredumpv(dev->mt76.dev, dump, MT76_CONNAC_COREDUMP_SZ, 1394 GFP_KERNEL); 1395 1396 mt792x_reset(&dev->mt76); 1397 } 1398 1399 /* usb_sdio */ 1400 static void 1401 mt7925_usb_sdio_write_txwi(struct mt792x_dev *dev, struct mt76_wcid *wcid, 1402 enum mt76_txq_id qid, struct ieee80211_sta *sta, 1403 struct ieee80211_key_conf *key, int pid, 1404 struct sk_buff *skb) 1405 { 1406 __le32 *txwi = (__le32 *)(skb->data - MT_SDIO_TXD_SIZE); 1407 1408 memset(txwi, 0, MT_SDIO_TXD_SIZE); 1409 mt7925_mac_write_txwi(&dev->mt76, txwi, skb, wcid, key, pid, qid, 0); 1410 skb_push(skb, MT_SDIO_TXD_SIZE); 1411 } 1412 1413 int mt7925_usb_sdio_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr, 1414 enum mt76_txq_id qid, struct mt76_wcid *wcid, 1415 struct ieee80211_sta *sta, 1416 struct mt76_tx_info *tx_info) 1417 { 1418 struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76); 1419 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(tx_info->skb); 1420 struct ieee80211_key_conf *key = info->control.hw_key; 1421 struct sk_buff *skb = tx_info->skb; 1422 int err, pad, pktid; 1423 1424 if (unlikely(tx_info->skb->len <= ETH_HLEN)) 1425 return -EINVAL; 1426 1427 if (!wcid) 1428 wcid = &dev->mt76.global_wcid; 1429 1430 if (sta) { 1431 struct mt792x_sta *msta = (struct mt792x_sta *)sta->drv_priv; 1432 1433 if (time_after(jiffies, msta->deflink.last_txs + HZ / 4)) { 1434 info->flags |= IEEE80211_TX_CTL_REQ_TX_STATUS; 1435 msta->deflink.last_txs = jiffies; 1436 } 1437 } 1438 1439 pktid = mt76_tx_status_skb_add(&dev->mt76, wcid, skb); 1440 mt7925_usb_sdio_write_txwi(dev, wcid, qid, sta, key, pktid, skb); 1441 1442 mt792x_skb_add_usb_sdio_hdr(dev, skb, 0); 1443 pad = round_up(skb->len, 4) - skb->len; 1444 if (mt76_is_usb(mdev)) 1445 pad += 4; 1446 1447 err = mt76_skb_adjust_pad(skb, pad); 1448 if (err) 1449 /* Release pktid in case of error. */ 1450 idr_remove(&wcid->pktid, pktid); 1451 1452 return err; 1453 } 1454 EXPORT_SYMBOL_GPL(mt7925_usb_sdio_tx_prepare_skb); 1455 1456 void mt7925_usb_sdio_tx_complete_skb(struct mt76_dev *mdev, 1457 struct mt76_queue_entry *e) 1458 { 1459 __le32 *txwi = (__le32 *)(e->skb->data + MT_SDIO_HDR_SIZE); 1460 unsigned int headroom = MT_SDIO_TXD_SIZE + MT_SDIO_HDR_SIZE; 1461 struct ieee80211_sta *sta; 1462 struct mt76_wcid *wcid; 1463 u16 idx; 1464 1465 idx = le32_get_bits(txwi[1], MT_TXD1_WLAN_IDX); 1466 wcid = __mt76_wcid_ptr(mdev, idx); 1467 sta = wcid_to_sta(wcid); 1468 1469 if (sta && likely(e->skb->protocol != cpu_to_be16(ETH_P_PAE))) 1470 mt7925_tx_check_aggr(sta, e->skb, wcid); 1471 1472 skb_pull(e->skb, headroom); 1473 mt76_tx_complete_skb(mdev, e->wcid, e->skb); 1474 } 1475 EXPORT_SYMBOL_GPL(mt7925_usb_sdio_tx_complete_skb); 1476 1477 bool mt7925_usb_sdio_tx_status_data(struct mt76_dev *mdev, u8 *update) 1478 { 1479 struct mt792x_dev *dev = container_of(mdev, struct mt792x_dev, mt76); 1480 1481 mt792x_mutex_acquire(dev); 1482 mt7925_mac_sta_poll(dev); 1483 mt792x_mutex_release(dev); 1484 1485 return false; 1486 } 1487 EXPORT_SYMBOL_GPL(mt7925_usb_sdio_tx_status_data); 1488 1489 #if IS_ENABLED(CONFIG_IPV6) 1490 void mt7925_set_ipv6_ns_work(struct work_struct *work) 1491 { 1492 struct mt792x_dev *dev = container_of(work, struct mt792x_dev, 1493 ipv6_ns_work); 1494 struct sk_buff *skb; 1495 int ret = 0; 1496 1497 do { 1498 skb = skb_dequeue(&dev->ipv6_ns_list); 1499 1500 if (!skb) 1501 break; 1502 1503 mt792x_mutex_acquire(dev); 1504 ret = mt76_mcu_skb_send_msg(&dev->mt76, skb, 1505 MCU_UNI_CMD(OFFLOAD), true); 1506 mt792x_mutex_release(dev); 1507 1508 } while (!ret); 1509 1510 if (ret) 1511 skb_queue_purge(&dev->ipv6_ns_list); 1512 } 1513 #endif 1514