1 // SPDX-License-Identifier: BSD-3-Clause-Clear
2 /*
3 * Copyright (C) 2023 Lorenzo Bianconi <lorenzo@kernel.org>
4 */
5
6 #include "mt76.h"
7 #include "dma.h"
8
mt76_wed_release_rx_buf(struct mtk_wed_device * wed)9 void mt76_wed_release_rx_buf(struct mtk_wed_device *wed)
10 {
11 struct mt76_dev *dev = mt76_wed_to_dev(wed);
12 int i;
13
14 for (i = 0; i < dev->rx_token_size; i++) {
15 struct mt76_txwi_cache *t;
16
17 t = mt76_rx_token_release(dev, i);
18 if (!t || !t->ptr)
19 continue;
20
21 mt76_put_page_pool_buf(t->ptr, false);
22 t->ptr = NULL;
23
24 mt76_put_rxwi(dev, t);
25 }
26
27 mt76_free_pending_rxwi(dev);
28 }
29 EXPORT_SYMBOL_GPL(mt76_wed_release_rx_buf);
30
31 #ifdef CONFIG_NET_MEDIATEK_SOC_WED
mt76_wed_init_rx_buf(struct mtk_wed_device * wed,int size)32 u32 mt76_wed_init_rx_buf(struct mtk_wed_device *wed, int size)
33 {
34 struct mtk_wed_bm_desc *desc = wed->rx_buf_ring.desc;
35 struct mt76_dev *dev = mt76_wed_to_dev(wed);
36 struct mt76_txwi_cache *t = NULL;
37 struct mt76_queue *q;
38 int i;
39
40 if (wed->version == 2 && dev->phy.band_idx)
41 q = &dev->q_rx[MT_RXQ_BAND1];
42 else
43 q = &dev->q_rx[MT_RXQ_MAIN];
44
45 for (i = 0; i < size; i++) {
46 dma_addr_t addr;
47 u32 offset;
48 int token;
49 void *buf;
50
51 t = mt76_get_rxwi(dev);
52 if (!t)
53 goto unmap;
54
55 buf = mt76_get_page_pool_buf(q, &offset, q->buf_size);
56 if (!buf)
57 goto unmap;
58
59 addr = page_pool_get_dma_addr(virt_to_head_page(buf)) + offset;
60 desc->buf0 = cpu_to_le32(addr);
61 token = mt76_rx_token_consume(dev, buf, t, addr);
62 if (token < 0) {
63 mt76_put_page_pool_buf(buf, false);
64 goto unmap;
65 }
66
67 token = FIELD_PREP(MT_DMA_CTL_TOKEN, token);
68 #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
69 token |= FIELD_PREP(MT_DMA_CTL_SDP0_H, addr >> 32);
70 #endif
71 desc->token |= cpu_to_le32(token);
72 desc++;
73 }
74
75 return 0;
76
77 unmap:
78 if (t)
79 mt76_put_rxwi(dev, t);
80 mt76_wed_release_rx_buf(wed);
81
82 return -ENOMEM;
83 }
84 EXPORT_SYMBOL_GPL(mt76_wed_init_rx_buf);
85
mt76_wed_offload_enable(struct mtk_wed_device * wed)86 int mt76_wed_offload_enable(struct mtk_wed_device *wed)
87 {
88 struct mt76_dev *dev = mt76_wed_to_dev(wed);
89
90 spin_lock_bh(&dev->token_lock);
91 dev->token_size = wed->wlan.token_start;
92 spin_unlock_bh(&dev->token_lock);
93
94 return !wait_event_timeout(dev->tx_wait, !dev->wed_token_count, HZ);
95 }
96 EXPORT_SYMBOL_GPL(mt76_wed_offload_enable);
97
mt76_wed_dma_setup(struct mt76_dev * dev,struct mt76_queue * q,bool reset)98 int mt76_wed_dma_setup(struct mt76_dev *dev, struct mt76_queue *q, bool reset)
99 {
100 int ret = 0, type, ring;
101 u16 flags;
102
103 if (!q || !q->ndesc)
104 return -EINVAL;
105
106 flags = q->flags;
107 if (!q->wed || !mtk_wed_device_active(q->wed))
108 q->flags &= ~MT_QFLAG_WED;
109
110 if (!(q->flags & MT_QFLAG_WED))
111 return 0;
112
113 type = FIELD_GET(MT_QFLAG_WED_TYPE, q->flags);
114 ring = FIELD_GET(MT_QFLAG_WED_RING, q->flags);
115
116 switch (type) {
117 case MT76_WED_Q_TX:
118 ret = mtk_wed_device_tx_ring_setup(q->wed, ring, q->regs,
119 reset);
120 if (!ret)
121 q->wed_regs = q->wed->tx_ring[ring].reg_base;
122 break;
123 case MT76_WED_Q_TXFREE:
124 /* WED txfree queue needs ring to be initialized before setup */
125 q->flags = 0;
126 mt76_dma_queue_reset(dev, q, true);
127 mt76_dma_rx_fill(dev, q, false);
128
129 ret = mtk_wed_device_txfree_ring_setup(q->wed, q->regs);
130 if (!ret)
131 q->wed_regs = q->wed->txfree_ring.reg_base;
132 break;
133 case MT76_WED_Q_RX:
134 ret = mtk_wed_device_rx_ring_setup(q->wed, ring, q->regs,
135 reset);
136 if (!ret)
137 q->wed_regs = q->wed->rx_ring[ring].reg_base;
138 break;
139 case MT76_WED_RRO_Q_DATA:
140 q->flags &= ~MT_QFLAG_WED;
141 mt76_dma_queue_reset(dev, q, false);
142 mtk_wed_device_rro_rx_ring_setup(q->wed, ring, q->regs);
143 q->head = q->ndesc - 1;
144 q->queued = q->head;
145 break;
146 case MT76_WED_RRO_Q_MSDU_PG:
147 q->flags &= ~MT_QFLAG_WED;
148 mt76_dma_queue_reset(dev, q, false);
149 mtk_wed_device_msdu_pg_rx_ring_setup(q->wed, ring, q->regs);
150 q->head = q->ndesc - 1;
151 q->queued = q->head;
152 break;
153 case MT76_WED_RRO_Q_IND:
154 q->flags &= ~MT_QFLAG_WED;
155 mt76_dma_queue_reset(dev, q, true);
156 mt76_dma_rx_fill(dev, q, false);
157 mtk_wed_device_ind_rx_ring_setup(q->wed, q->regs);
158 break;
159 default:
160 ret = -EINVAL;
161 break;
162 }
163 q->flags = flags;
164
165 return ret;
166 }
167 EXPORT_SYMBOL_GPL(mt76_wed_dma_setup);
168 #endif /*CONFIG_NET_MEDIATEK_SOC_WED */
169
mt76_wed_offload_disable(struct mtk_wed_device * wed)170 void mt76_wed_offload_disable(struct mtk_wed_device *wed)
171 {
172 struct mt76_dev *dev = mt76_wed_to_dev(wed);
173
174 spin_lock_bh(&dev->token_lock);
175 dev->token_size = dev->drv->token_size;
176 spin_unlock_bh(&dev->token_lock);
177 }
178 EXPORT_SYMBOL_GPL(mt76_wed_offload_disable);
179
mt76_wed_reset_complete(struct mtk_wed_device * wed)180 void mt76_wed_reset_complete(struct mtk_wed_device *wed)
181 {
182 struct mt76_dev *dev = mt76_wed_to_dev(wed);
183
184 complete(&dev->mmio.wed_reset_complete);
185 }
186 EXPORT_SYMBOL_GPL(mt76_wed_reset_complete);
187
mt76_wed_net_setup_tc(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct net_device * netdev,enum tc_setup_type type,void * type_data)188 int mt76_wed_net_setup_tc(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
189 struct net_device *netdev, enum tc_setup_type type,
190 void *type_data)
191 {
192 struct mt76_phy *phy = hw->priv;
193 struct mtk_wed_device *wed = &phy->dev->mmio.wed;
194
195 if (!mtk_wed_device_active(wed))
196 return -EOPNOTSUPP;
197
198 return mtk_wed_device_setup_tc(wed, netdev, type, type_data);
199 }
200 EXPORT_SYMBOL_GPL(mt76_wed_net_setup_tc);
201
mt76_wed_dma_reset(struct mt76_dev * dev)202 void mt76_wed_dma_reset(struct mt76_dev *dev)
203 {
204 struct mt76_mmio *mmio = &dev->mmio;
205
206 if (!test_bit(MT76_STATE_WED_RESET, &dev->phy.state))
207 return;
208
209 complete(&mmio->wed_reset);
210
211 if (!wait_for_completion_timeout(&mmio->wed_reset_complete, 3 * HZ))
212 dev_err(dev->dev, "wed reset complete timeout\n");
213 }
214 EXPORT_SYMBOL_GPL(mt76_wed_dma_reset);
215