1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (c) 2015-2016 HGST, a Western Digital Company. 4 */ 5 6 #ifndef _NVMET_H 7 #define _NVMET_H 8 9 #include <linux/dma-mapping.h> 10 #include <linux/jiffies.h> 11 #include <linux/types.h> 12 #include <linux/device.h> 13 #include <linux/kref.h> 14 #include <linux/percpu-refcount.h> 15 #include <linux/list.h> 16 #include <linux/mutex.h> 17 #include <linux/uuid.h> 18 #include <linux/nvme.h> 19 #include <linux/configfs.h> 20 #include <linux/rcupdate.h> 21 #include <linux/blkdev.h> 22 #include <linux/radix-tree.h> 23 #include <linux/t10-pi.h> 24 #include <linux/kfifo.h> 25 26 #define NVMET_DEFAULT_VS NVME_VS(2, 1, 0) 27 28 #define NVMET_NS_ENABLED XA_MARK_1 29 #define NVMET_ASYNC_EVENTS 4 30 #define NVMET_ERROR_LOG_SLOTS 128 31 #define NVMET_NO_ERROR_LOC ((u16)-1) 32 #define NVMET_DEFAULT_CTRL_MODEL "Linux" 33 #define NVMET_MN_MAX_SIZE 40 34 #define NVMET_SN_MAX_SIZE 20 35 #define NVMET_FR_MAX_SIZE 8 36 #define NVMET_PR_LOG_QUEUE_SIZE 64 37 38 #define nvmet_for_each_ns(xa, index, entry) \ 39 xa_for_each(xa, index, entry) 40 41 #define nvmet_for_each_enabled_ns(xa, index, entry) \ 42 xa_for_each_marked(xa, index, entry, NVMET_NS_ENABLED) 43 44 /* 45 * Supported optional AENs: 46 */ 47 #define NVMET_AEN_CFG_OPTIONAL \ 48 (NVME_AEN_CFG_NS_ATTR | NVME_AEN_CFG_ANA_CHANGE) 49 #define NVMET_DISC_AEN_CFG_OPTIONAL \ 50 (NVME_AEN_CFG_DISC_CHANGE) 51 52 /* 53 * Plus mandatory SMART AENs (we'll never send them, but allow enabling them): 54 */ 55 #define NVMET_AEN_CFG_ALL \ 56 (NVME_SMART_CRIT_SPARE | NVME_SMART_CRIT_TEMPERATURE | \ 57 NVME_SMART_CRIT_RELIABILITY | NVME_SMART_CRIT_MEDIA | \ 58 NVME_SMART_CRIT_VOLATILE_MEMORY | NVMET_AEN_CFG_OPTIONAL) 59 60 /* Helper Macros when NVMe error is NVME_SC_CONNECT_INVALID_PARAM 61 * The 16 bit shift is to set IATTR bit to 1, which means offending 62 * offset starts in the data section of connect() 63 */ 64 #define IPO_IATTR_CONNECT_DATA(x) \ 65 (cpu_to_le32((1 << 16) | (offsetof(struct nvmf_connect_data, x)))) 66 #define IPO_IATTR_CONNECT_SQE(x) \ 67 (cpu_to_le32(offsetof(struct nvmf_connect_command, x))) 68 69 struct nvmet_pr_registrant { 70 u64 rkey; 71 uuid_t hostid; 72 enum nvme_pr_type rtype; 73 struct list_head entry; 74 struct rcu_head rcu; 75 }; 76 77 struct nvmet_pr { 78 bool enable; 79 unsigned long notify_mask; 80 atomic_t generation; 81 struct nvmet_pr_registrant __rcu *holder; 82 /* 83 * During the execution of the reservation command, mutual 84 * exclusion is required throughout the process. However, 85 * while waiting asynchronously for the 'per controller 86 * percpu_ref' to complete before the 'preempt and abort' 87 * command finishes, a semaphore is needed to ensure mutual 88 * exclusion instead of a mutex. 89 */ 90 struct semaphore pr_sem; 91 struct list_head registrant_list; 92 }; 93 94 struct nvmet_pr_per_ctrl_ref { 95 struct percpu_ref ref; 96 struct completion free_done; 97 struct completion confirm_done; 98 uuid_t hostid; 99 }; 100 101 struct nvmet_ns { 102 struct percpu_ref ref; 103 struct file *bdev_file; 104 struct block_device *bdev; 105 struct file *file; 106 bool readonly; 107 u32 nsid; 108 u32 blksize_shift; 109 loff_t size; 110 u8 nguid[16]; 111 uuid_t uuid; 112 u32 anagrpid; 113 114 bool buffered_io; 115 bool enabled; 116 #define NVMET_NS_IO_LIVE 0 117 unsigned long flags; 118 struct nvmet_subsys *subsys; 119 const char *device_path; 120 121 struct config_group device_group; 122 struct config_group group; 123 124 struct completion disable_done; 125 mempool_t *bvec_pool; 126 127 struct pci_dev *p2p_dev; 128 int use_p2pmem; 129 int pi_type; 130 int metadata_size; 131 u8 csi; 132 struct nvmet_pr pr; 133 struct xarray pr_per_ctrl_refs; 134 #ifdef CONFIG_NVME_TARGET_DEBUGFS 135 struct dentry *debugfs_dir; 136 #endif 137 }; 138 139 static inline struct nvmet_ns *to_nvmet_ns(struct config_item *item) 140 { 141 return container_of(to_config_group(item), struct nvmet_ns, group); 142 } 143 144 static inline struct device *nvmet_ns_dev(struct nvmet_ns *ns) 145 { 146 return ns->bdev ? disk_to_dev(ns->bdev->bd_disk) : NULL; 147 } 148 149 struct nvmet_cq { 150 struct nvmet_ctrl *ctrl; 151 u16 qid; 152 u16 size; 153 refcount_t ref; 154 }; 155 156 struct nvmet_sq { 157 struct nvmet_ctrl *ctrl; 158 struct percpu_ref ref; 159 struct nvmet_cq *cq; 160 u16 qid; 161 u16 size; 162 u32 sqhd; 163 bool sqhd_disabled; 164 #ifdef CONFIG_NVME_TARGET_AUTH 165 struct mutex auth_lock; 166 bool authenticated; 167 struct delayed_work auth_expired_work; 168 bool auth_expiry_active; 169 u16 dhchap_tid; 170 u8 sc_c; 171 u8 dhchap_status; 172 u8 dhchap_step; 173 u8 *dhchap_c1; 174 u8 *dhchap_c2; 175 u32 dhchap_s1; 176 u32 dhchap_s2; 177 u8 *dhchap_skey; 178 int dhchap_skey_len; 179 #endif 180 #ifdef CONFIG_NVME_TARGET_TCP_TLS 181 struct key *tls_key; 182 #endif 183 struct completion free_done; 184 struct completion confirm_done; 185 }; 186 187 struct nvmet_ana_group { 188 struct config_group group; 189 struct nvmet_port *port; 190 u32 grpid; 191 }; 192 193 static inline struct nvmet_ana_group *to_ana_group(struct config_item *item) 194 { 195 return container_of(to_config_group(item), struct nvmet_ana_group, 196 group); 197 } 198 199 /** 200 * struct nvmet_port - Common structure to keep port 201 * information for the target. 202 * @entry: Entry into referrals or transport list. 203 * @disc_addr: Address information is stored in a format defined 204 * for a discovery log page entry. 205 * @group: ConfigFS group for this element's folder. 206 * @priv: Private data for the transport. 207 */ 208 struct nvmet_port { 209 struct list_head entry; 210 struct nvmf_disc_rsp_page_entry disc_addr; 211 struct config_group group; 212 struct config_group subsys_group; 213 struct list_head subsystems; 214 struct config_group referrals_group; 215 struct list_head referrals; 216 struct list_head global_entry; 217 struct config_group ana_groups_group; 218 struct nvmet_ana_group ana_default_group; 219 struct key *keyring; 220 void *priv; 221 bool enabled; 222 int inline_data_size; 223 int max_queue_size; 224 int mdts; 225 const struct nvmet_fabrics_ops *tr_ops; 226 bool pi_enable; 227 enum nvme_ana_state ana_state[]; 228 }; 229 230 static inline struct nvmet_port *to_nvmet_port(struct config_item *item) 231 { 232 return container_of(to_config_group(item), struct nvmet_port, 233 group); 234 } 235 236 static inline struct nvmet_port *ana_groups_to_port( 237 struct config_item *item) 238 { 239 return container_of(to_config_group(item), struct nvmet_port, 240 ana_groups_group); 241 } 242 243 static inline u8 nvmet_port_disc_addr_treq_secure_channel(struct nvmet_port *port) 244 { 245 return (port->disc_addr.treq & NVME_TREQ_SECURE_CHANNEL_MASK); 246 } 247 248 static inline bool nvmet_port_secure_channel_required(struct nvmet_port *port) 249 { 250 return nvmet_port_disc_addr_treq_secure_channel(port) == NVMF_TREQ_REQUIRED; 251 } 252 253 struct nvmet_pr_log_mgr { 254 struct mutex lock; 255 u64 lost_count; 256 u64 counter; 257 DECLARE_KFIFO(log_queue, struct nvme_pr_log, NVMET_PR_LOG_QUEUE_SIZE); 258 }; 259 260 struct nvmet_ctrl { 261 struct nvmet_subsys *subsys; 262 struct nvmet_sq **sqs; 263 struct nvmet_cq **cqs; 264 265 void *drvdata; 266 267 bool reset_tbkas; 268 269 struct mutex lock; 270 u64 cap; 271 u32 cc; 272 u32 csts; 273 274 uuid_t hostid; 275 u16 cntlid; 276 u16 max_qid; 277 u32 kato; 278 bool tbkas; 279 280 struct nvmet_port *port; 281 282 u32 aen_enabled; 283 unsigned long aen_masked; 284 struct nvmet_req *async_event_cmds[NVMET_ASYNC_EVENTS]; 285 unsigned int nr_async_event_cmds; 286 struct list_head async_events; 287 struct work_struct async_event_work; 288 289 struct list_head subsys_entry; 290 struct kref ref; 291 struct delayed_work ka_work; 292 struct work_struct fatal_err_work; 293 294 const struct nvmet_fabrics_ops *ops; 295 296 __le32 *changed_ns_list; 297 u32 nr_changed_ns; 298 299 char hostnqn[NVMF_NQN_FIELD_LEN]; 300 301 struct device *p2p_client; 302 struct radix_tree_root p2p_ns_map; 303 #ifdef CONFIG_NVME_TARGET_DEBUGFS 304 struct dentry *debugfs_dir; 305 #endif 306 spinlock_t error_lock; 307 u64 err_counter; 308 struct nvme_error_slot slots[NVMET_ERROR_LOG_SLOTS]; 309 bool pi_support; 310 bool concat; 311 #ifdef CONFIG_NVME_TARGET_AUTH 312 struct nvme_dhchap_key *host_key; 313 struct nvme_dhchap_key *ctrl_key; 314 u8 shash_id; 315 struct crypto_kpp *dh_tfm; 316 u8 dh_gid; 317 u8 *dh_key; 318 size_t dh_keysize; 319 #endif 320 #ifdef CONFIG_NVME_TARGET_TCP_TLS 321 struct key *tls_key; 322 #endif 323 struct nvmet_pr_log_mgr pr_log_mgr; 324 }; 325 326 struct nvmet_passthru { 327 struct percpu_ref ref; 328 struct completion disable_done; 329 #define NVMET_PASSTHRU_ENABLED 0 330 unsigned long flags; 331 332 struct nvme_ctrl *ctrl; 333 char *ctrl_path; 334 unsigned int admin_timeout; 335 unsigned int io_timeout; 336 unsigned int clear_ids; 337 }; 338 339 struct nvmet_subsys { 340 enum nvme_subsys_type type; 341 342 struct mutex lock; 343 struct kref ref; 344 345 struct xarray namespaces; 346 unsigned int nr_namespaces; 347 u32 max_nsid; 348 u16 cntlid_min; 349 u16 cntlid_max; 350 351 struct list_head ctrls; 352 353 struct list_head hosts; 354 bool allow_any_host; 355 #ifdef CONFIG_NVME_TARGET_DEBUGFS 356 struct dentry *debugfs_dir; 357 #endif 358 u16 max_qid; 359 360 u64 ver; 361 char serial[NVMET_SN_MAX_SIZE]; 362 bool subsys_discovered; 363 char *subsysnqn; 364 bool pi_support; 365 bool tbkas; 366 367 struct config_group group; 368 369 struct config_group namespaces_group; 370 struct config_group allowed_hosts_group; 371 372 u16 vendor_id; 373 u16 subsys_vendor_id; 374 char *model_number; 375 u32 ieee_oui; 376 char *firmware_rev; 377 378 #ifdef CONFIG_NVME_TARGET_PASSTHRU 379 struct nvmet_passthru *passthru; 380 struct config_group passthru_group; 381 #endif /* CONFIG_NVME_TARGET_PASSTHRU */ 382 383 #ifdef CONFIG_BLK_DEV_ZONED 384 u8 zasl; 385 #endif /* CONFIG_BLK_DEV_ZONED */ 386 }; 387 388 static inline struct nvmet_subsys *to_subsys(struct config_item *item) 389 { 390 return container_of(to_config_group(item), struct nvmet_subsys, group); 391 } 392 393 static inline struct nvmet_subsys *namespaces_to_subsys( 394 struct config_item *item) 395 { 396 return container_of(to_config_group(item), struct nvmet_subsys, 397 namespaces_group); 398 } 399 400 struct nvmet_host { 401 struct config_group group; 402 u8 *dhchap_secret; 403 u8 *dhchap_ctrl_secret; 404 u8 dhchap_key_hash; 405 u8 dhchap_ctrl_key_hash; 406 u8 dhchap_hash_id; 407 u8 dhchap_dhgroup_id; 408 }; 409 410 static inline struct nvmet_host *to_host(struct config_item *item) 411 { 412 return container_of(to_config_group(item), struct nvmet_host, group); 413 } 414 415 static inline char *nvmet_host_name(struct nvmet_host *host) 416 { 417 return config_item_name(&host->group.cg_item); 418 } 419 420 struct nvmet_host_link { 421 struct list_head entry; 422 struct nvmet_host *host; 423 }; 424 425 struct nvmet_subsys_link { 426 struct list_head entry; 427 struct nvmet_subsys *subsys; 428 }; 429 430 struct nvmet_req; 431 struct nvmet_fabrics_ops { 432 struct module *owner; 433 unsigned int type; 434 unsigned int msdbd; 435 unsigned int flags; 436 #define NVMF_KEYED_SGLS (1 << 0) 437 #define NVMF_METADATA_SUPPORTED (1 << 1) 438 void (*queue_response)(struct nvmet_req *req); 439 int (*add_port)(struct nvmet_port *port); 440 void (*remove_port)(struct nvmet_port *port); 441 void (*delete_ctrl)(struct nvmet_ctrl *ctrl); 442 void (*disc_traddr)(struct nvmet_req *req, 443 struct nvmet_port *port, char *traddr); 444 ssize_t (*host_traddr)(struct nvmet_ctrl *ctrl, 445 char *traddr, size_t traddr_len); 446 u16 (*install_queue)(struct nvmet_sq *nvme_sq); 447 void (*discovery_chg)(struct nvmet_port *port); 448 u8 (*get_mdts)(const struct nvmet_ctrl *ctrl); 449 u16 (*get_max_queue_size)(const struct nvmet_ctrl *ctrl); 450 451 /* Operations mandatory for PCI target controllers */ 452 u16 (*create_sq)(struct nvmet_ctrl *ctrl, u16 sqid, u16 cqid, u16 flags, 453 u16 qsize, u64 prp1); 454 u16 (*delete_sq)(struct nvmet_ctrl *ctrl, u16 sqid); 455 u16 (*create_cq)(struct nvmet_ctrl *ctrl, u16 cqid, u16 flags, 456 u16 qsize, u64 prp1, u16 irq_vector); 457 u16 (*delete_cq)(struct nvmet_ctrl *ctrl, u16 cqid); 458 u16 (*set_feature)(const struct nvmet_ctrl *ctrl, u8 feat, 459 void *feat_data); 460 u16 (*get_feature)(const struct nvmet_ctrl *ctrl, u8 feat, 461 void *feat_data); 462 }; 463 464 #define NVMET_MAX_INLINE_BIOVEC 8 465 #define NVMET_MAX_INLINE_DATA_LEN NVMET_MAX_INLINE_BIOVEC * PAGE_SIZE 466 467 struct nvmet_req { 468 struct nvme_command *cmd; 469 struct nvme_completion *cqe; 470 struct nvmet_sq *sq; 471 struct nvmet_cq *cq; 472 struct nvmet_ns *ns; 473 struct scatterlist *sg; 474 struct scatterlist *metadata_sg; 475 struct bio_vec inline_bvec[NVMET_MAX_INLINE_BIOVEC]; 476 union { 477 struct { 478 struct bio inline_bio; 479 } b; 480 struct { 481 bool mpool_alloc; 482 struct kiocb iocb; 483 struct bio_vec *bvec; 484 struct work_struct work; 485 } f; 486 struct { 487 struct bio inline_bio; 488 struct request *rq; 489 struct work_struct work; 490 bool use_workqueue; 491 bool ref_held; 492 } p; 493 #ifdef CONFIG_BLK_DEV_ZONED 494 struct { 495 struct bio inline_bio; 496 struct work_struct zmgmt_work; 497 } z; 498 #endif /* CONFIG_BLK_DEV_ZONED */ 499 struct { 500 struct work_struct abort_work; 501 } r; 502 }; 503 int sg_cnt; 504 int metadata_sg_cnt; 505 /* data length as parsed from the SGL descriptor: */ 506 size_t transfer_len; 507 size_t metadata_len; 508 509 struct nvmet_port *port; 510 511 void (*execute)(struct nvmet_req *req); 512 const struct nvmet_fabrics_ops *ops; 513 514 struct pci_dev *p2p_dev; 515 struct device *p2p_client; 516 u16 error_loc; 517 u64 error_slba; 518 struct nvmet_pr_per_ctrl_ref *pc_ref; 519 }; 520 521 #define NVMET_MAX_MPOOL_BVEC 16 522 extern struct kmem_cache *nvmet_bvec_cache; 523 extern struct workqueue_struct *buffered_io_wq; 524 extern struct workqueue_struct *zbd_wq; 525 extern struct workqueue_struct *nvmet_wq; 526 extern struct workqueue_struct *nvmet_aen_wq; 527 528 static inline void nvmet_set_result(struct nvmet_req *req, u32 result) 529 { 530 req->cqe->result.u32 = cpu_to_le32(result); 531 } 532 533 /* 534 * NVMe command writes actually are DMA reads for us on the target side. 535 */ 536 static inline enum dma_data_direction 537 nvmet_data_dir(struct nvmet_req *req) 538 { 539 return nvme_is_write(req->cmd) ? DMA_FROM_DEVICE : DMA_TO_DEVICE; 540 } 541 542 struct nvmet_async_event { 543 struct list_head entry; 544 u8 event_type; 545 u8 event_info; 546 u8 log_page; 547 }; 548 549 static inline void nvmet_clear_aen_bit(struct nvmet_req *req, u32 bn) 550 { 551 int rae = le32_to_cpu(req->cmd->common.cdw10) & 1 << 15; 552 553 if (!rae) 554 clear_bit(bn, &req->sq->ctrl->aen_masked); 555 } 556 557 static inline bool nvmet_aen_bit_disabled(struct nvmet_ctrl *ctrl, u32 bn) 558 { 559 if (!(READ_ONCE(ctrl->aen_enabled) & (1 << bn))) 560 return true; 561 return test_and_set_bit(bn, &ctrl->aen_masked); 562 } 563 564 void nvmet_get_feat_kato(struct nvmet_req *req); 565 void nvmet_get_feat_async_event(struct nvmet_req *req); 566 u16 nvmet_set_feat_kato(struct nvmet_req *req); 567 u16 nvmet_set_feat_async_event(struct nvmet_req *req, u32 mask); 568 void nvmet_execute_async_event(struct nvmet_req *req); 569 void nvmet_start_keep_alive_timer(struct nvmet_ctrl *ctrl); 570 void nvmet_stop_keep_alive_timer(struct nvmet_ctrl *ctrl); 571 572 u16 nvmet_parse_connect_cmd(struct nvmet_req *req); 573 u32 nvmet_connect_cmd_data_len(struct nvmet_req *req); 574 void nvmet_bdev_set_limits(struct block_device *bdev, struct nvme_id_ns *id); 575 void nvmet_bdev_set_nvm_limits(struct block_device *bdev, 576 struct nvme_id_ns_nvm *id); 577 u16 nvmet_bdev_parse_io_cmd(struct nvmet_req *req); 578 u16 nvmet_file_parse_io_cmd(struct nvmet_req *req); 579 u16 nvmet_bdev_zns_parse_io_cmd(struct nvmet_req *req); 580 u32 nvmet_admin_cmd_data_len(struct nvmet_req *req); 581 u16 nvmet_parse_admin_cmd(struct nvmet_req *req); 582 u32 nvmet_discovery_cmd_data_len(struct nvmet_req *req); 583 u16 nvmet_parse_discovery_cmd(struct nvmet_req *req); 584 u16 nvmet_parse_fabrics_admin_cmd(struct nvmet_req *req); 585 u32 nvmet_fabrics_admin_cmd_data_len(struct nvmet_req *req); 586 u16 nvmet_parse_fabrics_io_cmd(struct nvmet_req *req); 587 u32 nvmet_fabrics_io_cmd_data_len(struct nvmet_req *req); 588 589 bool nvmet_req_init(struct nvmet_req *req, struct nvmet_sq *sq, 590 const struct nvmet_fabrics_ops *ops); 591 void nvmet_req_uninit(struct nvmet_req *req); 592 size_t nvmet_req_transfer_len(struct nvmet_req *req); 593 bool nvmet_check_transfer_len(struct nvmet_req *req, size_t len); 594 bool nvmet_check_data_len_lte(struct nvmet_req *req, size_t data_len); 595 void nvmet_req_complete(struct nvmet_req *req, u16 status); 596 int nvmet_req_alloc_sgls(struct nvmet_req *req); 597 void nvmet_req_free_sgls(struct nvmet_req *req); 598 599 void nvmet_execute_set_features(struct nvmet_req *req); 600 void nvmet_execute_get_features(struct nvmet_req *req); 601 void nvmet_execute_keep_alive(struct nvmet_req *req); 602 603 u16 nvmet_check_cqid(struct nvmet_ctrl *ctrl, u16 cqid, bool create); 604 u16 nvmet_check_io_cqid(struct nvmet_ctrl *ctrl, u16 cqid, bool create); 605 void nvmet_cq_init(struct nvmet_cq *cq); 606 void nvmet_cq_setup(struct nvmet_ctrl *ctrl, struct nvmet_cq *cq, u16 qid, 607 u16 size); 608 u16 nvmet_cq_create(struct nvmet_ctrl *ctrl, struct nvmet_cq *cq, u16 qid, 609 u16 size); 610 void nvmet_cq_destroy(struct nvmet_cq *cq); 611 bool nvmet_cq_get(struct nvmet_cq *cq); 612 void nvmet_cq_put(struct nvmet_cq *cq); 613 bool nvmet_cq_in_use(struct nvmet_cq *cq); 614 u16 nvmet_check_sqid(struct nvmet_ctrl *ctrl, u16 sqid, bool create); 615 void nvmet_sq_setup(struct nvmet_ctrl *ctrl, struct nvmet_sq *sq, u16 qid, 616 u16 size); 617 u16 nvmet_sq_create(struct nvmet_ctrl *ctrl, struct nvmet_sq *sq, 618 struct nvmet_cq *cq, u16 qid, u16 size); 619 void nvmet_sq_destroy(struct nvmet_sq *sq); 620 int nvmet_sq_init(struct nvmet_sq *sq, struct nvmet_cq *cq); 621 622 void nvmet_ctrl_fatal_error(struct nvmet_ctrl *ctrl); 623 624 void nvmet_update_cc(struct nvmet_ctrl *ctrl, u32 new); 625 626 struct nvmet_alloc_ctrl_args { 627 struct nvmet_port *port; 628 struct nvmet_sq *sq; 629 char *subsysnqn; 630 char *hostnqn; 631 uuid_t *hostid; 632 const struct nvmet_fabrics_ops *ops; 633 struct device *p2p_client; 634 u32 kato; 635 __le32 result; 636 u16 error_loc; 637 u16 status; 638 }; 639 640 struct nvmet_ctrl *nvmet_alloc_ctrl(struct nvmet_alloc_ctrl_args *args); 641 struct nvmet_ctrl *nvmet_ctrl_find_get(const char *subsysnqn, 642 const char *hostnqn, u16 cntlid, 643 struct nvmet_req *req); 644 void nvmet_ctrl_put(struct nvmet_ctrl *ctrl); 645 u16 nvmet_check_ctrl_status(struct nvmet_req *req); 646 ssize_t nvmet_ctrl_host_traddr(struct nvmet_ctrl *ctrl, 647 char *traddr, size_t traddr_len); 648 649 struct nvmet_subsys *nvmet_subsys_alloc(const char *subsysnqn, 650 enum nvme_subsys_type type); 651 void nvmet_subsys_put(struct nvmet_subsys *subsys); 652 void nvmet_subsys_del_ctrls(struct nvmet_subsys *subsys); 653 654 u16 nvmet_req_find_ns(struct nvmet_req *req); 655 void nvmet_put_namespace(struct nvmet_ns *ns); 656 int nvmet_ns_enable(struct nvmet_ns *ns); 657 void nvmet_ns_disable(struct nvmet_ns *ns); 658 struct nvmet_ns *nvmet_ns_alloc(struct nvmet_subsys *subsys, u32 nsid); 659 void nvmet_ns_free(struct nvmet_ns *ns); 660 661 void nvmet_send_ana_event(struct nvmet_subsys *subsys, 662 struct nvmet_port *port); 663 void nvmet_port_send_ana_event(struct nvmet_port *port); 664 665 int nvmet_register_transport(const struct nvmet_fabrics_ops *ops); 666 void nvmet_unregister_transport(const struct nvmet_fabrics_ops *ops); 667 668 void nvmet_port_del_ctrls(struct nvmet_port *port, 669 struct nvmet_subsys *subsys); 670 671 int nvmet_enable_port(struct nvmet_port *port); 672 void nvmet_disable_port(struct nvmet_port *port); 673 674 void nvmet_referral_enable(struct nvmet_port *parent, struct nvmet_port *port); 675 void nvmet_referral_disable(struct nvmet_port *parent, struct nvmet_port *port); 676 677 u16 nvmet_copy_to_sgl(struct nvmet_req *req, off_t off, const void *buf, 678 size_t len); 679 u16 nvmet_copy_from_sgl(struct nvmet_req *req, off_t off, void *buf, 680 size_t len); 681 u16 nvmet_zero_sgl(struct nvmet_req *req, off_t off, size_t len); 682 683 u32 nvmet_get_log_page_len(struct nvme_command *cmd); 684 u64 nvmet_get_log_page_offset(struct nvme_command *cmd); 685 686 extern struct list_head *nvmet_ports; 687 void nvmet_port_disc_changed(struct nvmet_port *port, 688 struct nvmet_subsys *subsys); 689 void nvmet_subsys_disc_changed(struct nvmet_subsys *subsys, 690 struct nvmet_host *host); 691 void nvmet_add_async_event(struct nvmet_ctrl *ctrl, u8 event_type, 692 u8 event_info, u8 log_page); 693 694 #define NVMET_MIN_QUEUE_SIZE 16 695 #define NVMET_MAX_QUEUE_SIZE 1024 696 #define NVMET_NR_QUEUES 128 697 #define NVMET_MAX_CMD(ctrl) (NVME_CAP_MQES(ctrl->cap) + 1) 698 #define NVMET_MAX_MDTS 255 699 700 /* 701 * Nice round number that makes a list of nsids fit into a page. 702 * Should become tunable at some point in the future. 703 */ 704 #define NVMET_MAX_NAMESPACES 1024 705 706 /* 707 * 0 is not a valid ANA group ID, so we start numbering at 1. 708 * 709 * ANA Group 1 exists without manual intervention, has namespaces assigned to it 710 * by default, and is available in an optimized state through all ports. 711 */ 712 #define NVMET_MAX_ANAGRPS 128 713 #define NVMET_DEFAULT_ANA_GRPID 1 714 715 #define NVMET_KAS 10 716 #define NVMET_DISC_KATO_MS 120000 717 718 /* 719 * Largest keep-alive timeout in seconds that can be reported back in 720 * milliseconds and converted to jiffies without overflowing. 721 */ 722 #define NVMET_MAX_KATO \ 723 min3(U32_MAX / MSEC_PER_SEC, U32_MAX / HZ, MAX_JIFFY_OFFSET / HZ) 724 725 int __init nvmet_init_configfs(void); 726 void __exit nvmet_exit_configfs(void); 727 728 int __init nvmet_init_discovery(void); 729 void nvmet_exit_discovery(void); 730 731 extern struct nvmet_subsys *nvmet_disc_subsys; 732 extern struct rw_semaphore nvmet_config_sem; 733 734 extern u32 nvmet_ana_group_enabled[NVMET_MAX_ANAGRPS + 1]; 735 extern u64 nvmet_ana_chgcnt; 736 extern struct rw_semaphore nvmet_ana_sem; 737 738 bool nvmet_host_allowed(struct nvmet_subsys *subsys, const char *hostnqn); 739 740 int nvmet_bdev_ns_enable(struct nvmet_ns *ns); 741 int nvmet_file_ns_enable(struct nvmet_ns *ns); 742 void nvmet_bdev_ns_disable(struct nvmet_ns *ns); 743 void nvmet_file_ns_disable(struct nvmet_ns *ns); 744 u16 nvmet_bdev_flush(struct nvmet_req *req); 745 u16 nvmet_file_flush(struct nvmet_req *req); 746 void nvmet_ns_changed(struct nvmet_subsys *subsys, u32 nsid); 747 void nvmet_bdev_ns_revalidate(struct nvmet_ns *ns); 748 void nvmet_file_ns_revalidate(struct nvmet_ns *ns); 749 bool nvmet_ns_revalidate(struct nvmet_ns *ns); 750 u16 blk_to_nvme_status(struct nvmet_req *req, blk_status_t blk_sts); 751 752 bool nvmet_bdev_zns_enable(struct nvmet_ns *ns); 753 void nvmet_execute_identify_ctrl_zns(struct nvmet_req *req); 754 void nvmet_execute_identify_ns_zns(struct nvmet_req *req); 755 void nvmet_bdev_execute_zone_mgmt_recv(struct nvmet_req *req); 756 void nvmet_bdev_execute_zone_mgmt_send(struct nvmet_req *req); 757 void nvmet_bdev_execute_zone_append(struct nvmet_req *req); 758 759 static inline u32 nvmet_rw_data_len(struct nvmet_req *req) 760 { 761 return ((u32)le16_to_cpu(req->cmd->rw.length) + 1) << 762 req->ns->blksize_shift; 763 } 764 765 static inline u32 nvmet_rw_metadata_len(struct nvmet_req *req) 766 { 767 if (!IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY)) 768 return 0; 769 return ((u32)le16_to_cpu(req->cmd->rw.length) + 1) * 770 req->ns->metadata_size; 771 } 772 773 static inline u32 nvmet_dsm_len(struct nvmet_req *req) 774 { 775 return (le32_to_cpu(req->cmd->dsm.nr) + 1) * 776 sizeof(struct nvme_dsm_range); 777 } 778 779 static inline struct nvmet_subsys *nvmet_req_subsys(struct nvmet_req *req) 780 { 781 return req->sq->ctrl->subsys; 782 } 783 784 static inline struct nvmet_ctrl *nvmet_req_ctrl(struct nvmet_req *req) 785 { 786 return req->sq->ctrl; 787 } 788 789 static inline bool nvmet_is_disc_subsys(struct nvmet_subsys *subsys) 790 { 791 return subsys->type != NVME_NQN_NVME; 792 } 793 794 static inline bool nvmet_is_pci_ctrl(struct nvmet_ctrl *ctrl) 795 { 796 return ctrl->port->disc_addr.trtype == NVMF_TRTYPE_PCI; 797 } 798 799 /* Limit MDTS according to port config or transport capability */ 800 static inline u8 nvmet_ctrl_mdts(struct nvmet_req *req) 801 { 802 struct nvmet_ctrl *ctrl = req->sq->ctrl; 803 u8 mdts = req->port->mdts; 804 805 if (!ctrl->ops->get_mdts) 806 return mdts; 807 return min_not_zero(ctrl->ops->get_mdts(ctrl), mdts); 808 } 809 810 #ifdef CONFIG_NVME_TARGET_PASSTHRU 811 void nvmet_passthru_subsys_free(struct nvmet_subsys *subsys); 812 int nvmet_passthru_ctrl_enable(struct nvmet_subsys *subsys); 813 void nvmet_passthru_ctrl_disable(struct nvmet_subsys *subsys); 814 u16 nvmet_parse_passthru_admin_cmd(struct nvmet_req *req); 815 u16 nvmet_parse_passthru_io_cmd(struct nvmet_req *req); 816 static inline bool nvmet_is_passthru_subsys(struct nvmet_subsys *subsys) 817 { 818 return subsys->passthru && 819 test_bit(NVMET_PASSTHRU_ENABLED, &subsys->passthru->flags); 820 } 821 822 static inline struct nvmet_passthru *nvmet_subsys_passthru( 823 struct nvmet_subsys *subsys) 824 { 825 lockdep_assert_held(&subsys->lock); 826 827 if (!subsys->passthru) { 828 subsys->passthru = kzalloc_obj(*subsys->passthru); 829 if (!subsys->passthru) 830 return NULL; 831 } 832 return subsys->passthru; 833 } 834 835 static inline struct nvmet_passthru *nvmet_passthru_ref_held( 836 struct nvmet_req *req) 837 { 838 if (req->p.ref_held) 839 return nvmet_req_subsys(req)->passthru; 840 841 return NULL; 842 } 843 844 static inline bool nvmet_get_passthru_ref(struct nvmet_req *req) 845 { 846 if (!percpu_ref_tryget_live(&nvmet_req_subsys(req)->passthru->ref)) 847 return false; 848 849 req->p.ref_held = true; 850 return true; 851 } 852 853 static inline void nvmet_put_passthru_ref(struct nvmet_passthru *passthru) 854 { 855 percpu_ref_put(&passthru->ref); 856 } 857 #else /* CONFIG_NVME_TARGET_PASSTHRU */ 858 static inline void nvmet_passthru_subsys_free(struct nvmet_subsys *subsys) 859 { 860 } 861 static inline void nvmet_passthru_ctrl_disable(struct nvmet_subsys *subsys) 862 { 863 } 864 static inline u16 nvmet_parse_passthru_admin_cmd(struct nvmet_req *req) 865 { 866 return 0; 867 } 868 static inline u16 nvmet_parse_passthru_io_cmd(struct nvmet_req *req) 869 { 870 return 0; 871 } 872 static inline bool nvmet_is_passthru_subsys(struct nvmet_subsys *subsys) 873 { 874 return NULL; 875 } 876 static inline struct nvmet_passthru *nvmet_subsys_passthru( 877 struct nvmet_subsys *subsys) 878 { 879 return NULL; 880 } 881 static inline struct nvmet_passthru *nvmet_passthru_ref_held( 882 struct nvmet_req *req) 883 { 884 return NULL; 885 } 886 static inline bool nvmet_get_passthru_ref(struct nvmet_req *req) 887 { 888 return false; 889 } 890 static inline void nvmet_put_passthru_ref(struct nvmet_passthru *passthru) 891 { 892 } 893 #endif /* CONFIG_NVME_TARGET_PASSTHRU */ 894 895 static inline bool nvmet_is_passthru_req(struct nvmet_req *req) 896 { 897 return nvmet_is_passthru_subsys(nvmet_req_subsys(req)); 898 } 899 900 void nvmet_passthrough_override_cap(struct nvmet_ctrl *ctrl); 901 902 u16 errno_to_nvme_status(struct nvmet_req *req, int errno); 903 u16 nvmet_report_invalid_opcode(struct nvmet_req *req); 904 905 static inline bool nvmet_cc_en(u32 cc) 906 { 907 return (cc & NVME_CC_ENABLE) >> NVME_CC_EN_SHIFT; 908 } 909 910 static inline u8 nvmet_cc_css(u32 cc) 911 { 912 return (cc & NVME_CC_CSS_MASK) >> NVME_CC_CSS_SHIFT; 913 } 914 915 static inline u8 nvmet_cc_mps(u32 cc) 916 { 917 return (cc & NVME_CC_MPS_MASK) >> NVME_CC_MPS_SHIFT; 918 } 919 920 static inline u8 nvmet_cc_ams(u32 cc) 921 { 922 return (cc & NVME_CC_AMS_MASK) >> NVME_CC_AMS_SHIFT; 923 } 924 925 static inline u8 nvmet_cc_shn(u32 cc) 926 { 927 return (cc & NVME_CC_SHN_MASK) >> NVME_CC_SHN_SHIFT; 928 } 929 930 static inline u8 nvmet_cc_iosqes(u32 cc) 931 { 932 return (cc & NVME_CC_IOSQES_MASK) >> NVME_CC_IOSQES_SHIFT; 933 } 934 935 static inline u8 nvmet_cc_iocqes(u32 cc) 936 { 937 return (cc & NVME_CC_IOCQES_MASK) >> NVME_CC_IOCQES_SHIFT; 938 } 939 940 /* Convert a 32-bit number to a 16-bit 0's based number */ 941 static inline __le16 to0based(u32 a) 942 { 943 return cpu_to_le16(clamp(a, 1U, 1U << 16) - 1); 944 } 945 946 static inline bool nvmet_ns_has_pi(struct nvmet_ns *ns) 947 { 948 if (!IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY)) 949 return false; 950 return ns->pi_type && ns->metadata_size == sizeof(struct t10_pi_tuple); 951 } 952 953 static inline __le64 nvmet_sect_to_lba(struct nvmet_ns *ns, sector_t sect) 954 { 955 return cpu_to_le64(sect >> (ns->blksize_shift - SECTOR_SHIFT)); 956 } 957 958 static inline sector_t nvmet_lba_to_sect(struct nvmet_ns *ns, __le64 lba) 959 { 960 return le64_to_cpu(lba) << (ns->blksize_shift - SECTOR_SHIFT); 961 } 962 963 static inline bool nvmet_use_inline_bvec(struct nvmet_req *req) 964 { 965 return req->transfer_len <= NVMET_MAX_INLINE_DATA_LEN && 966 req->sg_cnt <= NVMET_MAX_INLINE_BIOVEC; 967 } 968 969 static inline void nvmet_req_bio_put(struct nvmet_req *req, struct bio *bio) 970 { 971 if (bio != &req->b.inline_bio) 972 bio_put(bio); 973 else 974 bio_uninit(bio); 975 } 976 977 #ifdef CONFIG_NVME_TARGET_TCP_TLS 978 static inline key_serial_t nvmet_queue_tls_keyid(struct nvmet_sq *sq) 979 { 980 /* A PCI endpoint controller is created without a queue */ 981 return sq && sq->tls_key ? key_serial(sq->tls_key) : 0; 982 } 983 static inline void nvmet_sq_put_tls_key(struct nvmet_sq *sq) 984 { 985 if (sq->tls_key) { 986 key_put(sq->tls_key); 987 sq->tls_key = NULL; 988 } 989 } 990 #else 991 static inline key_serial_t nvmet_queue_tls_keyid(struct nvmet_sq *sq) { return 0; } 992 static inline void nvmet_sq_put_tls_key(struct nvmet_sq *sq) {} 993 #endif 994 #ifdef CONFIG_NVME_TARGET_AUTH 995 u32 nvmet_auth_send_data_len(struct nvmet_req *req); 996 void nvmet_execute_auth_send(struct nvmet_req *req); 997 u32 nvmet_auth_receive_data_len(struct nvmet_req *req); 998 void nvmet_execute_auth_receive(struct nvmet_req *req); 999 int nvmet_auth_set_key(struct nvmet_host *host, const char *secret, 1000 bool set_ctrl); 1001 int nvmet_auth_set_host_hash(struct nvmet_host *host, const char *hash); 1002 u8 nvmet_setup_auth(struct nvmet_ctrl *ctrl, struct nvmet_sq *sq, bool reset); 1003 void nvmet_auth_sq_init(struct nvmet_sq *sq); 1004 void nvmet_destroy_auth(struct nvmet_ctrl *ctrl); 1005 void nvmet_auth_sq_free(struct nvmet_sq *sq); 1006 void nvmet_auth_sq_destroy(struct nvmet_sq *sq); 1007 int nvmet_setup_dhgroup(struct nvmet_ctrl *ctrl, u8 dhgroup_id); 1008 bool nvmet_check_auth_status(struct nvmet_req *req); 1009 int nvmet_auth_host_hash(struct nvmet_req *req, u8 *response, 1010 unsigned int hash_len); 1011 int nvmet_auth_ctrl_hash(struct nvmet_req *req, u8 *response, 1012 unsigned int hash_len); 1013 static inline bool nvmet_has_auth(struct nvmet_ctrl *ctrl, struct nvmet_sq *sq) 1014 { 1015 return ctrl->host_key != NULL && !nvmet_queue_tls_keyid(sq); 1016 } 1017 int nvmet_auth_ctrl_exponential(struct nvmet_req *req, 1018 u8 *buf, int buf_size); 1019 int nvmet_auth_ctrl_sesskey(struct nvmet_req *req, 1020 const u8 *pkey, int pkey_size); 1021 void nvmet_auth_insert_psk(struct nvmet_sq *sq); 1022 #else 1023 static inline u8 nvmet_setup_auth(struct nvmet_ctrl *ctrl, 1024 struct nvmet_sq *sq, bool reset) 1025 { 1026 return 0; 1027 } 1028 static inline void nvmet_auth_sq_init(struct nvmet_sq *sq) 1029 { 1030 } 1031 static inline void nvmet_destroy_auth(struct nvmet_ctrl *ctrl) {}; 1032 static inline void nvmet_auth_sq_free(struct nvmet_sq *sq) {}; 1033 static inline void nvmet_auth_sq_destroy(struct nvmet_sq *sq) {}; 1034 static inline bool nvmet_check_auth_status(struct nvmet_req *req) 1035 { 1036 return true; 1037 } 1038 static inline bool nvmet_has_auth(struct nvmet_ctrl *ctrl, 1039 struct nvmet_sq *sq) 1040 { 1041 return false; 1042 } 1043 static inline const char *nvmet_dhchap_dhgroup_name(u8 dhgid) { return NULL; } 1044 static inline void nvmet_auth_insert_psk(struct nvmet_sq *sq) {}; 1045 #endif 1046 1047 int nvmet_pr_init_ns(struct nvmet_ns *ns); 1048 u16 nvmet_parse_pr_cmd(struct nvmet_req *req); 1049 u16 nvmet_pr_check_cmd_access(struct nvmet_req *req); 1050 int nvmet_ctrl_init_pr(struct nvmet_ctrl *ctrl); 1051 void nvmet_ctrl_destroy_pr(struct nvmet_ctrl *ctrl); 1052 void nvmet_pr_exit_ns(struct nvmet_ns *ns); 1053 void nvmet_execute_get_log_page_resv(struct nvmet_req *req); 1054 u16 nvmet_set_feat_resv_notif_mask(struct nvmet_req *req, u32 mask); 1055 u16 nvmet_get_feat_resv_notif_mask(struct nvmet_req *req); 1056 u16 nvmet_pr_get_ns_pc_ref(struct nvmet_req *req); 1057 static inline void nvmet_pr_put_ns_pc_ref(struct nvmet_pr_per_ctrl_ref *pc_ref) 1058 { 1059 percpu_ref_put(&pc_ref->ref); 1060 } 1061 1062 /* 1063 * Data for the get_feature() and set_feature() operations of PCI target 1064 * controllers. 1065 */ 1066 struct nvmet_feat_irq_coalesce { 1067 u8 thr; 1068 u8 time; 1069 }; 1070 1071 struct nvmet_feat_irq_config { 1072 u16 iv; 1073 bool cd; 1074 }; 1075 1076 struct nvmet_feat_arbitration { 1077 u8 hpw; 1078 u8 mpw; 1079 u8 lpw; 1080 u8 ab; 1081 }; 1082 1083 #endif /* _NVMET_H */ 1084