1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
2 /*
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved.
5 */
6
7 #ifndef ATH11K_CORE_H
8 #define ATH11K_CORE_H
9
10 #include <linux/types.h>
11 #include <linux/interrupt.h>
12 #include <linux/irq.h>
13 #include <linux/bitfield.h>
14 #include <linux/dmi.h>
15 #include <linux/ctype.h>
16 #include <linux/rhashtable.h>
17 #include <linux/average.h>
18 #include <linux/firmware.h>
19 #include <linux/suspend.h>
20
21 #include "qmi.h"
22 #include "htc.h"
23 #include "wmi.h"
24 #include "hal.h"
25 #include "dp.h"
26 #include "ce.h"
27 #include "mac.h"
28 #include "hw.h"
29 #include "hal_rx.h"
30 #include "reg.h"
31 #include "thermal.h"
32 #include "dbring.h"
33 #include "spectral.h"
34 #include "wow.h"
35 #include "fw.h"
36 #include "coredump.h"
37
38 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
39
40 #define ATH11K_TX_MGMT_NUM_PENDING_MAX 512
41
42 #define ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI 64
43
44 /* Pending management packets threshold for dropping probe responses */
45 #define ATH11K_PRB_RSP_DROP_THRESHOLD ((ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI * 3) / 4)
46
47 #define ATH11K_INVALID_HW_MAC_ID 0xFF
48 #define ATH11K_CONNECTION_LOSS_HZ (3 * HZ)
49
50 /* SMBIOS type containing Board Data File Name Extension */
51 #define ATH11K_SMBIOS_BDF_EXT_TYPE 0xF8
52
53 /* SMBIOS type structure length (excluding strings-set) */
54 #define ATH11K_SMBIOS_BDF_EXT_LENGTH 0x9
55
56 /* The magic used by QCA spec */
57 #define ATH11K_SMBIOS_BDF_EXT_MAGIC "BDF_"
58
59 extern unsigned int ath11k_frame_mode;
60 extern bool ath11k_ftm_mode;
61
62 #define ATH11K_SCAN_TIMEOUT_HZ (20 * HZ)
63
64 #define ATH11K_MON_TIMER_INTERVAL 10
65 #define ATH11K_RESET_TIMEOUT_HZ (20 * HZ)
66 #define ATH11K_RESET_MAX_FAIL_COUNT_FIRST 3
67 #define ATH11K_RESET_MAX_FAIL_COUNT_FINAL 5
68 #define ATH11K_RESET_FAIL_TIMEOUT_HZ (20 * HZ)
69 #define ATH11K_RECONFIGURE_TIMEOUT_HZ (10 * HZ)
70 #define ATH11K_RECOVER_START_TIMEOUT_HZ (20 * HZ)
71
72 enum ath11k_supported_bw {
73 ATH11K_BW_20 = 0,
74 ATH11K_BW_40 = 1,
75 ATH11K_BW_80 = 2,
76 ATH11K_BW_160 = 3,
77 };
78
79 enum ath11k_bdf_search {
80 ATH11K_BDF_SEARCH_DEFAULT,
81 ATH11K_BDF_SEARCH_BUS_AND_BOARD,
82 };
83
84 enum wme_ac {
85 WME_AC_BE,
86 WME_AC_BK,
87 WME_AC_VI,
88 WME_AC_VO,
89 WME_NUM_AC
90 };
91
92 #define ATH11K_HT_MCS_MAX 7
93 #define ATH11K_VHT_MCS_MAX 9
94 #define ATH11K_HE_MCS_MAX 11
95
96 enum ath11k_crypt_mode {
97 /* Only use hardware crypto engine */
98 ATH11K_CRYPT_MODE_HW,
99 /* Only use software crypto */
100 ATH11K_CRYPT_MODE_SW,
101 };
102
ath11k_tid_to_ac(u32 tid)103 static inline enum wme_ac ath11k_tid_to_ac(u32 tid)
104 {
105 return (((tid == 0) || (tid == 3)) ? WME_AC_BE :
106 ((tid == 1) || (tid == 2)) ? WME_AC_BK :
107 ((tid == 4) || (tid == 5)) ? WME_AC_VI :
108 WME_AC_VO);
109 }
110
111 enum ath11k_skb_flags {
112 ATH11K_SKB_HW_80211_ENCAP = BIT(0),
113 ATH11K_SKB_CIPHER_SET = BIT(1),
114 };
115
116 struct ath11k_skb_cb {
117 dma_addr_t paddr;
118 u8 eid;
119 u8 flags;
120 u32 cipher;
121 struct ath11k *ar;
122 struct ieee80211_vif *vif;
123 } __packed;
124
125 struct ath11k_skb_rxcb {
126 dma_addr_t paddr;
127 bool is_first_msdu;
128 bool is_last_msdu;
129 bool is_continuation;
130 bool is_mcbc;
131 bool is_eapol;
132 struct hal_rx_desc *rx_desc;
133 u8 err_rel_src;
134 u8 err_code;
135 u8 mac_id;
136 u8 unmapped;
137 u8 is_frag;
138 u8 tid;
139 u16 peer_id;
140 u16 seq_no;
141 };
142
143 enum ath11k_hw_rev {
144 ATH11K_HW_IPQ8074,
145 ATH11K_HW_QCA6390_HW20,
146 ATH11K_HW_IPQ6018_HW10,
147 ATH11K_HW_QCN9074_HW10,
148 ATH11K_HW_WCN6855_HW20,
149 ATH11K_HW_WCN6855_HW21,
150 ATH11K_HW_WCN6750_HW10,
151 ATH11K_HW_IPQ5018_HW10,
152 ATH11K_HW_QCA2066_HW21,
153 ATH11K_HW_QCA6698AQ_HW21,
154 };
155
156 enum ath11k_firmware_mode {
157 /* the default mode, standard 802.11 functionality */
158 ATH11K_FIRMWARE_MODE_NORMAL,
159
160 /* factory tests etc */
161 ATH11K_FIRMWARE_MODE_FTM,
162
163 /* Cold boot calibration */
164 ATH11K_FIRMWARE_MODE_COLD_BOOT = 7,
165 };
166
167 extern bool ath11k_cold_boot_cal;
168
169 #define ATH11K_IRQ_NUM_MAX 52
170 #define ATH11K_EXT_IRQ_NUM_MAX 16
171
172 struct ath11k_ext_irq_grp {
173 struct ath11k_base *ab;
174 u32 irqs[ATH11K_EXT_IRQ_NUM_MAX];
175 u32 num_irq;
176 u32 grp_id;
177 u64 timestamp;
178 bool napi_enabled;
179 struct napi_struct napi;
180 struct net_device *napi_ndev;
181 };
182
183 enum ath11k_smbios_cc_type {
184 /* disable country code setting from SMBIOS */
185 ATH11K_SMBIOS_CC_DISABLE = 0,
186
187 /* set country code by ANSI country name, based on ISO3166-1 alpha2 */
188 ATH11K_SMBIOS_CC_ISO = 1,
189
190 /* worldwide regdomain */
191 ATH11K_SMBIOS_CC_WW = 2,
192 };
193
194 struct ath11k_smbios_bdf {
195 struct dmi_header hdr;
196
197 u8 features_disabled;
198
199 /* enum ath11k_smbios_cc_type */
200 u8 country_code_flag;
201
202 /* To set specific country, you need to set country code
203 * flag=ATH11K_SMBIOS_CC_ISO first, then if country is United
204 * States, then country code value = 0x5553 ("US",'U' = 0x55, 'S'=
205 * 0x53). To set country to INDONESIA, then country code value =
206 * 0x4944 ("IN", 'I'=0x49, 'D'=0x44). If country code flag =
207 * ATH11K_SMBIOS_CC_WW, then you can use worldwide regulatory
208 * setting.
209 */
210 u16 cc_code;
211
212 u8 bdf_enabled;
213 u8 bdf_ext[];
214 } __packed;
215
216 #define HEHANDLE_CAP_PHYINFO_SIZE 3
217 #define HECAP_PHYINFO_SIZE 9
218 #define HECAP_MACINFO_SIZE 5
219 #define HECAP_TXRX_MCS_NSS_SIZE 2
220 #define HECAP_PPET16_PPET8_MAX_SIZE 25
221
222 #define HE_PPET16_PPET8_SIZE 8
223
224 /* 802.11ax PPE (PPDU packet Extension) threshold */
225 struct he_ppe_threshold {
226 u32 numss_m1;
227 u32 ru_mask;
228 u32 ppet16_ppet8_ru3_ru0[HE_PPET16_PPET8_SIZE];
229 };
230
231 struct ath11k_he {
232 u8 hecap_macinfo[HECAP_MACINFO_SIZE];
233 u32 hecap_rxmcsnssmap;
234 u32 hecap_txmcsnssmap;
235 u32 hecap_phyinfo[HEHANDLE_CAP_PHYINFO_SIZE];
236 struct he_ppe_threshold hecap_ppet;
237 u32 heop_param;
238 };
239
240 #define MAX_RADIOS 3
241
242 /* ipq5018 hw param macros */
243 #define MAX_RADIOS_5018 1
244 #define CE_CNT_5018 6
245 #define TARGET_CE_CNT_5018 9
246 #define SVC_CE_MAP_LEN_5018 17
247 #define RXDMA_PER_PDEV_5018 1
248
249 enum {
250 WMI_HOST_TP_SCALE_MAX = 0,
251 WMI_HOST_TP_SCALE_50 = 1,
252 WMI_HOST_TP_SCALE_25 = 2,
253 WMI_HOST_TP_SCALE_12 = 3,
254 WMI_HOST_TP_SCALE_MIN = 4,
255 WMI_HOST_TP_SCALE_SIZE = 5,
256 };
257
258 enum ath11k_scan_state {
259 ATH11K_SCAN_IDLE,
260 ATH11K_SCAN_STARTING,
261 ATH11K_SCAN_RUNNING,
262 ATH11K_SCAN_ABORTING,
263 };
264
265 enum ath11k_11d_state {
266 ATH11K_11D_IDLE,
267 ATH11K_11D_PREPARING,
268 ATH11K_11D_RUNNING,
269 };
270
271 enum ath11k_dev_flags {
272 ATH11K_CAC_RUNNING,
273 ATH11K_FLAG_CORE_REGISTERED,
274 ATH11K_FLAG_CRASH_FLUSH,
275 ATH11K_FLAG_RAW_MODE,
276 ATH11K_FLAG_HW_CRYPTO_DISABLED,
277 ATH11K_FLAG_BTCOEX,
278 ATH11K_FLAG_RECOVERY,
279 ATH11K_FLAG_UNREGISTERING,
280 ATH11K_FLAG_REGISTERED,
281 ATH11K_FLAG_QMI_FAIL,
282 ATH11K_FLAG_HTC_SUSPEND_COMPLETE,
283 ATH11K_FLAG_CE_IRQ_ENABLED,
284 ATH11K_FLAG_EXT_IRQ_ENABLED,
285 ATH11K_FLAG_FIXED_MEM_RGN,
286 ATH11K_FLAG_DEVICE_INIT_DONE,
287 ATH11K_FLAG_MULTI_MSI_VECTORS,
288 ATH11K_FLAG_FTM_SEGMENTED,
289 };
290
291 enum ath11k_monitor_flags {
292 ATH11K_FLAG_MONITOR_CONF_ENABLED,
293 ATH11K_FLAG_MONITOR_STARTED,
294 ATH11K_FLAG_MONITOR_VDEV_CREATED,
295 };
296
297 #define ATH11K_IPV6_UC_TYPE 0
298 #define ATH11K_IPV6_AC_TYPE 1
299
300 #define ATH11K_IPV6_MAX_COUNT 16
301 #define ATH11K_IPV4_MAX_COUNT 2
302
303 struct ath11k_arp_ns_offload {
304 u8 ipv4_addr[ATH11K_IPV4_MAX_COUNT][4];
305 u32 ipv4_count;
306 u32 ipv6_count;
307 u8 ipv6_addr[ATH11K_IPV6_MAX_COUNT][16];
308 u8 self_ipv6_addr[ATH11K_IPV6_MAX_COUNT][16];
309 u8 ipv6_type[ATH11K_IPV6_MAX_COUNT];
310 bool ipv6_valid[ATH11K_IPV6_MAX_COUNT];
311 u8 mac_addr[ETH_ALEN];
312 };
313
314 struct ath11k_rekey_data {
315 u8 kck[NL80211_KCK_LEN];
316 u8 kek[NL80211_KCK_LEN];
317 u64 replay_ctr;
318 bool enable_offload;
319 };
320
321 /**
322 * struct ath11k_chan_power_info - TPE containing power info per channel chunk
323 * @chan_cfreq: channel center freq (MHz)
324 * e.g.
325 * channel 37/20 MHz, it is 6135
326 * channel 37/40 MHz, it is 6125
327 * channel 37/80 MHz, it is 6145
328 * channel 37/160 MHz, it is 6185
329 * @tx_power: transmit power (dBm)
330 */
331 struct ath11k_chan_power_info {
332 u16 chan_cfreq;
333 s8 tx_power;
334 };
335
336 /* ath11k only deals with 160 MHz, so 8 subchannels */
337 #define ATH11K_NUM_PWR_LEVELS 8
338
339 /**
340 * struct ath11k_reg_tpc_power_info - regulatory TPC power info
341 * @is_psd_power: is PSD power or not
342 * @eirp_power: Maximum EIRP power (dBm), valid only if power is PSD
343 * @ap_power_type: type of power (SP/LPI/VLP)
344 * @num_pwr_levels: number of power levels
345 * @reg_max: Array of maximum TX power (dBm) per PSD value
346 * @tpe: TPE values processed from TPE IE
347 * @chan_power_info: power info to send to firmware
348 */
349 struct ath11k_reg_tpc_power_info {
350 bool is_psd_power;
351 u8 eirp_power;
352 enum wmi_reg_6ghz_ap_type ap_power_type;
353 u8 num_pwr_levels;
354 u8 reg_max[ATH11K_NUM_PWR_LEVELS];
355 s8 tpe[ATH11K_NUM_PWR_LEVELS];
356 struct ath11k_chan_power_info chan_power_info[ATH11K_NUM_PWR_LEVELS];
357 };
358
359 struct ath11k_vif {
360 u32 vdev_id;
361 enum wmi_vdev_type vdev_type;
362 enum wmi_vdev_subtype vdev_subtype;
363 u32 beacon_interval;
364 u32 dtim_period;
365 u16 ast_hash;
366 u16 ast_idx;
367 u16 tcl_metadata;
368 u8 hal_addr_search_flags;
369 u8 search_type;
370
371 struct ath11k *ar;
372 struct ieee80211_vif *vif;
373
374 struct wmi_wmm_params_all_arg wmm_params;
375 struct wmi_wmm_params_all_arg muedca_params;
376 struct list_head list;
377 union {
378 struct {
379 u32 uapsd;
380 } sta;
381 struct {
382 /* 127 stations; wmi limit */
383 u8 tim_bitmap[16];
384 u8 tim_len;
385 u32 ssid_len;
386 u8 ssid[IEEE80211_MAX_SSID_LEN];
387 bool hidden_ssid;
388 /* P2P_IE with NoA attribute for P2P_GO case */
389 u32 noa_len;
390 u8 *noa_data;
391 } ap;
392 } u;
393
394 bool is_started;
395 bool is_up;
396 bool ftm_responder;
397 bool spectral_enabled;
398 bool ps;
399 u32 aid;
400 u8 bssid[ETH_ALEN];
401 struct cfg80211_bitrate_mask bitrate_mask;
402 struct delayed_work connection_loss_work;
403 struct work_struct bcn_tx_work;
404 int num_legacy_stations;
405 int rtscts_prot_mode;
406 int txpower;
407 bool rsnie_present;
408 bool wpaie_present;
409 bool bcca_zero_sent;
410 bool do_not_send_tmpl;
411 struct ath11k_arp_ns_offload arp_ns_offload;
412 struct ath11k_rekey_data rekey_data;
413
414 struct ath11k_reg_tpc_power_info reg_tpc_info;
415
416 /* Must be last - ends in a flexible-array member.
417 *
418 * FIXME: Driver should not copy struct ieee80211_chanctx_conf,
419 * especially because it has a flexible array. Find a better way.
420 */
421 struct ieee80211_chanctx_conf chanctx;
422 };
423
424 struct ath11k_vif_iter {
425 u32 vdev_id;
426 struct ath11k_vif *arvif;
427 };
428
429 struct ath11k_rx_peer_stats {
430 u64 num_msdu;
431 u64 num_mpdu_fcs_ok;
432 u64 num_mpdu_fcs_err;
433 u64 tcp_msdu_count;
434 u64 udp_msdu_count;
435 u64 other_msdu_count;
436 u64 ampdu_msdu_count;
437 u64 non_ampdu_msdu_count;
438 u64 stbc_count;
439 u64 beamformed_count;
440 u64 mcs_count[HAL_RX_MAX_MCS + 1];
441 u64 nss_count[HAL_RX_MAX_NSS];
442 u64 bw_count[HAL_RX_BW_MAX];
443 u64 gi_count[HAL_RX_GI_MAX];
444 u64 coding_count[HAL_RX_SU_MU_CODING_MAX];
445 u64 tid_count[IEEE80211_NUM_TIDS + 1];
446 u64 pream_cnt[HAL_RX_PREAMBLE_MAX];
447 u64 reception_type[HAL_RX_RECEPTION_TYPE_MAX];
448 u64 rx_duration;
449 u64 dcm_count;
450 u64 ru_alloc_cnt[HAL_RX_RU_ALLOC_TYPE_MAX];
451 };
452
453 #define ATH11K_HE_MCS_NUM 12
454 #define ATH11K_VHT_MCS_NUM 10
455 #define ATH11K_BW_NUM 4
456 #define ATH11K_NSS_NUM 4
457 #define ATH11K_LEGACY_NUM 12
458 #define ATH11K_GI_NUM 4
459 #define ATH11K_HT_MCS_NUM 32
460
461 enum ath11k_pkt_rx_err {
462 ATH11K_PKT_RX_ERR_FCS,
463 ATH11K_PKT_RX_ERR_TKIP,
464 ATH11K_PKT_RX_ERR_CRYPT,
465 ATH11K_PKT_RX_ERR_PEER_IDX_INVAL,
466 ATH11K_PKT_RX_ERR_MAX,
467 };
468
469 enum ath11k_ampdu_subfrm_num {
470 ATH11K_AMPDU_SUBFRM_NUM_10,
471 ATH11K_AMPDU_SUBFRM_NUM_20,
472 ATH11K_AMPDU_SUBFRM_NUM_30,
473 ATH11K_AMPDU_SUBFRM_NUM_40,
474 ATH11K_AMPDU_SUBFRM_NUM_50,
475 ATH11K_AMPDU_SUBFRM_NUM_60,
476 ATH11K_AMPDU_SUBFRM_NUM_MORE,
477 ATH11K_AMPDU_SUBFRM_NUM_MAX,
478 };
479
480 enum ath11k_amsdu_subfrm_num {
481 ATH11K_AMSDU_SUBFRM_NUM_1,
482 ATH11K_AMSDU_SUBFRM_NUM_2,
483 ATH11K_AMSDU_SUBFRM_NUM_3,
484 ATH11K_AMSDU_SUBFRM_NUM_4,
485 ATH11K_AMSDU_SUBFRM_NUM_MORE,
486 ATH11K_AMSDU_SUBFRM_NUM_MAX,
487 };
488
489 enum ath11k_counter_type {
490 ATH11K_COUNTER_TYPE_BYTES,
491 ATH11K_COUNTER_TYPE_PKTS,
492 ATH11K_COUNTER_TYPE_MAX,
493 };
494
495 enum ath11k_stats_type {
496 ATH11K_STATS_TYPE_SUCC,
497 ATH11K_STATS_TYPE_FAIL,
498 ATH11K_STATS_TYPE_RETRY,
499 ATH11K_STATS_TYPE_AMPDU,
500 ATH11K_STATS_TYPE_MAX,
501 };
502
503 struct ath11k_htt_data_stats {
504 u64 legacy[ATH11K_COUNTER_TYPE_MAX][ATH11K_LEGACY_NUM];
505 u64 ht[ATH11K_COUNTER_TYPE_MAX][ATH11K_HT_MCS_NUM];
506 u64 vht[ATH11K_COUNTER_TYPE_MAX][ATH11K_VHT_MCS_NUM];
507 u64 he[ATH11K_COUNTER_TYPE_MAX][ATH11K_HE_MCS_NUM];
508 u64 bw[ATH11K_COUNTER_TYPE_MAX][ATH11K_BW_NUM];
509 u64 nss[ATH11K_COUNTER_TYPE_MAX][ATH11K_NSS_NUM];
510 u64 gi[ATH11K_COUNTER_TYPE_MAX][ATH11K_GI_NUM];
511 };
512
513 struct ath11k_htt_tx_stats {
514 struct ath11k_htt_data_stats stats[ATH11K_STATS_TYPE_MAX];
515 u64 tx_duration;
516 u64 ba_fails;
517 u64 ack_fails;
518 };
519
520 struct ath11k_per_ppdu_tx_stats {
521 u16 succ_pkts;
522 u16 failed_pkts;
523 u16 retry_pkts;
524 u32 succ_bytes;
525 u32 failed_bytes;
526 u32 retry_bytes;
527 };
528
529 DECLARE_EWMA(avg_rssi, 10, 8)
530
531 struct ath11k_sta {
532 struct ath11k_vif *arvif;
533
534 /* the following are protected by ar->data_lock */
535 u32 changed; /* IEEE80211_RC_* */
536 u32 bw;
537 u32 nss;
538 u32 smps;
539 enum hal_pn_type pn_type;
540
541 struct work_struct update_wk;
542 struct work_struct set_4addr_wk;
543 struct rate_info txrate;
544 u32 peer_nss;
545 struct rate_info last_txrate;
546 u64 rx_duration;
547 u64 tx_duration;
548 u8 rssi_comb;
549 struct ewma_avg_rssi avg_rssi;
550 s8 rssi_beacon;
551 s8 chain_signal[IEEE80211_MAX_CHAINS];
552 struct ath11k_htt_tx_stats *tx_stats;
553 struct ath11k_rx_peer_stats *rx_stats;
554
555 #ifdef CONFIG_MAC80211_DEBUGFS
556 /* protected by conf_mutex */
557 bool aggr_mode;
558 #endif
559
560 bool use_4addr_set;
561 u16 tcl_metadata;
562
563 /* Protected with ar->data_lock */
564 enum ath11k_wmi_peer_ps_state peer_ps_state;
565 u64 ps_start_time;
566 u64 ps_start_jiffies;
567 u64 ps_total_duration;
568 bool peer_current_ps_valid;
569
570 u32 bw_prev;
571 };
572
573 #define ATH11K_MIN_5G_FREQ 4150
574 #define ATH11K_MIN_6G_FREQ 5925
575 #define ATH11K_MAX_6G_FREQ 7115
576 #define ATH11K_NUM_CHANS 102
577 #define ATH11K_MAX_5G_CHAN 177
578
579 enum ath11k_state {
580 ATH11K_STATE_OFF,
581 ATH11K_STATE_ON,
582 ATH11K_STATE_RESTARTING,
583 ATH11K_STATE_RESTARTED,
584 ATH11K_STATE_WEDGED,
585 ATH11K_STATE_FTM,
586 /* Add other states as required */
587 };
588
589 /* Antenna noise floor */
590 #define ATH11K_DEFAULT_NOISE_FLOOR -95
591
592 #define ATH11K_INVALID_RSSI_FULL -1
593
594 #define ATH11K_INVALID_RSSI_EMPTY -128
595
596 struct ath11k_fw_stats {
597 struct dentry *debugfs_fwstats;
598 u32 pdev_id;
599 u32 stats_id;
600 struct list_head pdevs;
601 struct list_head vdevs;
602 struct list_head bcn;
603 u32 num_vdev_recvd;
604 u32 num_bcn_recvd;
605 };
606
607 struct ath11k_dbg_htt_stats {
608 u8 type;
609 u8 reset;
610 struct debug_htt_stats_req *stats_req;
611 /* protects shared stats req buffer */
612 spinlock_t lock;
613 };
614
615 #define MAX_MODULE_ID_BITMAP_WORDS 16
616
617 struct ath11k_debug {
618 struct dentry *debugfs_pdev;
619 struct ath11k_dbg_htt_stats htt_stats;
620 u32 extd_tx_stats;
621 u32 extd_rx_stats;
622 u32 pktlog_filter;
623 u32 pktlog_mode;
624 u32 pktlog_peer_valid;
625 u8 pktlog_peer_addr[ETH_ALEN];
626 u32 rx_filter;
627 u32 mem_offset;
628 u32 module_id_bitmap[MAX_MODULE_ID_BITMAP_WORDS];
629 struct ath11k_debug_dbr *dbr_debug[WMI_DIRECT_BUF_MAX];
630 };
631
632 struct ath11k_per_peer_tx_stats {
633 u32 succ_bytes;
634 u32 retry_bytes;
635 u32 failed_bytes;
636 u16 succ_pkts;
637 u16 retry_pkts;
638 u16 failed_pkts;
639 u32 duration;
640 u8 ba_fails;
641 bool is_ampdu;
642 };
643
644 #define ATH11K_FLUSH_TIMEOUT (5 * HZ)
645 #define ATH11K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ)
646
647 struct ath11k {
648 struct ath11k_base *ab;
649 struct ath11k_pdev *pdev;
650 struct ieee80211_hw *hw;
651 struct ath11k_pdev_wmi *wmi;
652 struct ath11k_pdev_dp dp;
653 u8 mac_addr[ETH_ALEN];
654 struct ath11k_he ar_he;
655 enum ath11k_state state;
656 bool supports_6ghz;
657 struct {
658 struct completion started;
659 struct completion completed;
660 struct completion on_channel;
661 struct delayed_work timeout;
662 enum ath11k_scan_state state;
663 bool is_roc;
664 int vdev_id;
665 int roc_freq;
666 bool roc_notify;
667 } scan;
668
669 struct {
670 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS];
671 struct ieee80211_sband_iftype_data
672 iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES];
673 } mac;
674
675 unsigned long dev_flags;
676 unsigned int filter_flags;
677 unsigned long monitor_flags;
678 u32 min_tx_power;
679 u32 max_tx_power;
680 u32 txpower_limit_2g;
681 u32 txpower_limit_5g;
682 u32 txpower_scale;
683 u32 power_scale;
684 u32 chan_tx_pwr;
685 u32 num_stations;
686 u32 max_num_stations;
687 /* To synchronize concurrent synchronous mac80211 callback operations,
688 * concurrent debugfs configuration and concurrent FW statistics events.
689 */
690 struct mutex conf_mutex;
691 /* protects the radio specific data like debug stats, ppdu_stats_info stats,
692 * vdev_stop_status info, scan data, ath11k_sta info, ath11k_vif info,
693 * channel context data, survey info, test mode data, channel_update_queue.
694 */
695 spinlock_t data_lock;
696
697 struct list_head arvifs;
698 /* should never be NULL; needed for regular htt rx */
699 struct ieee80211_channel *rx_channel;
700
701 /* valid during scan; needed for mgmt rx during scan */
702 struct ieee80211_channel *scan_channel;
703
704 u8 cfg_tx_chainmask;
705 u8 cfg_rx_chainmask;
706 u8 num_rx_chains;
707 u8 num_tx_chains;
708 /* pdev_idx starts from 0 whereas pdev->pdev_id starts with 1 */
709 u8 pdev_idx;
710 u8 lmac_id;
711
712 struct completion peer_assoc_done;
713 struct completion peer_delete_done;
714
715 int install_key_status;
716 struct completion install_key_done;
717
718 int last_wmi_vdev_start_status;
719 struct completion vdev_setup_done;
720 struct completion vdev_delete_done;
721
722 int num_peers;
723 int max_num_peers;
724 u32 num_started_vdevs;
725 u32 num_created_vdevs;
726 unsigned long long allocated_vdev_map;
727
728 struct idr txmgmt_idr;
729 /* protects txmgmt_idr data */
730 spinlock_t txmgmt_idr_lock;
731 atomic_t num_pending_mgmt_tx;
732 wait_queue_head_t txmgmt_empty_waitq;
733
734 /* cycle count is reported twice for each visited channel during scan.
735 * access protected by data_lock
736 */
737 u32 survey_last_rx_clear_count;
738 u32 survey_last_cycle_count;
739
740 /* Channel info events are expected to come in pairs without and with
741 * COMPLETE flag set respectively for each channel visit during scan.
742 *
743 * However there are deviations from this rule. This flag is used to
744 * avoid reporting garbage data.
745 */
746 bool ch_info_can_report_survey;
747 struct survey_info survey[ATH11K_NUM_CHANS];
748 struct completion bss_survey_done;
749
750 struct work_struct regd_update_work;
751 struct work_struct channel_update_work;
752 /* protected with data_lock */
753 struct list_head channel_update_queue;
754
755 struct work_struct wmi_mgmt_tx_work;
756 struct sk_buff_head wmi_mgmt_tx_queue;
757
758 struct ath11k_wow wow;
759 struct completion target_suspend;
760 bool target_suspend_ack;
761 struct ath11k_per_peer_tx_stats peer_tx_stats;
762 struct list_head ppdu_stats_info;
763 u32 ppdu_stat_list_depth;
764
765 struct ath11k_per_peer_tx_stats cached_stats;
766 u32 last_ppdu_id;
767 u32 cached_ppdu_id;
768 int monitor_vdev_id;
769 struct completion fw_mode_reset;
770 u8 ftm_msgref;
771 #ifdef CONFIG_ATH11K_DEBUGFS
772 struct ath11k_debug debug;
773 #endif
774 #ifdef CONFIG_ATH11K_SPECTRAL
775 struct ath11k_spectral spectral;
776 #endif
777 bool dfs_block_radar_events;
778 struct ath11k_thermal thermal;
779 u32 vdev_id_11d_scan;
780 struct completion completed_11d_scan;
781 enum ath11k_11d_state state_11d;
782 bool regdom_set_by_user;
783 int hw_rate_code;
784 u8 twt_enabled;
785 bool nlo_enabled;
786 u8 alpha2[REG_ALPHA2_LEN + 1];
787 struct ath11k_fw_stats fw_stats;
788 struct completion fw_stats_complete;
789 struct completion fw_stats_done;
790
791 /* protected by conf_mutex */
792 bool ps_state_enable;
793 bool ps_timekeeper_enable;
794 s8 max_allowed_tx_power;
795 };
796
797 struct ath11k_band_cap {
798 u32 phy_id;
799 u32 max_bw_supported;
800 u32 ht_cap_info;
801 u32 he_cap_info[2];
802 u32 he_mcs;
803 u32 he_cap_phy_info[PSOC_HOST_MAX_PHY_SIZE];
804 struct ath11k_ppe_threshold he_ppet;
805 u16 he_6ghz_capa;
806 };
807
808 struct ath11k_pdev_cap {
809 u32 supported_bands;
810 u32 ampdu_density;
811 u32 vht_cap;
812 u32 vht_mcs;
813 u32 he_mcs;
814 u32 tx_chain_mask;
815 u32 rx_chain_mask;
816 u32 tx_chain_mask_shift;
817 u32 rx_chain_mask_shift;
818 struct ath11k_band_cap band[NUM_NL80211_BANDS];
819 bool nss_ratio_enabled;
820 u8 nss_ratio_info;
821 };
822
823 struct ath11k_pdev {
824 struct ath11k *ar;
825 u32 pdev_id;
826 struct ath11k_pdev_cap cap;
827 u8 mac_addr[ETH_ALEN];
828 };
829
830 struct ath11k_board_data {
831 const struct firmware *fw;
832 const void *data;
833 size_t len;
834 };
835
836 struct ath11k_pci_ops {
837 int (*wakeup)(struct ath11k_base *ab);
838 void (*release)(struct ath11k_base *ab);
839 int (*get_msi_irq)(struct ath11k_base *ab, unsigned int vector);
840 void (*window_write32)(struct ath11k_base *ab, u32 offset, u32 value);
841 u32 (*window_read32)(struct ath11k_base *ab, u32 offset);
842 };
843
844 /* IPQ8074 HW channel counters frequency value in hertz */
845 #define IPQ8074_CC_FREQ_HERTZ 320000
846
847 struct ath11k_bp_stats {
848 /* Head Pointer reported by the last HTT Backpressure event for the ring */
849 u16 hp;
850
851 /* Tail Pointer reported by the last HTT Backpressure event for the ring */
852 u16 tp;
853
854 /* Number of Backpressure events received for the ring */
855 u32 count;
856
857 /* Last recorded event timestamp */
858 unsigned long jiffies;
859 };
860
861 struct ath11k_dp_ring_bp_stats {
862 struct ath11k_bp_stats umac_ring_bp_stats[HTT_SW_UMAC_RING_IDX_MAX];
863 struct ath11k_bp_stats lmac_ring_bp_stats[HTT_SW_LMAC_RING_IDX_MAX][MAX_RADIOS];
864 };
865
866 struct ath11k_soc_dp_tx_err_stats {
867 /* TCL Ring Descriptor unavailable */
868 u32 desc_na[DP_TCL_NUM_RING_MAX];
869 /* Other failures during dp_tx due to mem allocation failure
870 * idr unavailable etc.
871 */
872 atomic_t misc_fail;
873 };
874
875 struct ath11k_soc_dp_stats {
876 u32 err_ring_pkts;
877 u32 invalid_rbm;
878 u32 rxdma_error[HAL_REO_ENTR_RING_RXDMA_ECODE_MAX];
879 u32 reo_error[HAL_REO_DEST_RING_ERROR_CODE_MAX];
880 u32 hal_reo_error[DP_REO_DST_RING_MAX];
881 struct ath11k_soc_dp_tx_err_stats tx_err;
882 struct ath11k_dp_ring_bp_stats bp_stats;
883 };
884
885 struct ath11k_msi_user {
886 char *name;
887 int num_vectors;
888 u32 base_vector;
889 };
890
891 struct ath11k_msi_config {
892 int total_vectors;
893 int total_users;
894 struct ath11k_msi_user *users;
895 u16 hw_rev;
896 };
897
898 enum ath11k_pm_policy {
899 ATH11K_PM_DEFAULT,
900 ATH11K_PM_WOW,
901 };
902
903 /* Master structure to hold the hw data which may be used in core module */
904 struct ath11k_base {
905 enum ath11k_hw_rev hw_rev;
906 enum ath11k_firmware_mode fw_mode;
907 struct platform_device *pdev;
908 struct device *dev;
909 struct ath11k_qmi qmi;
910 struct ath11k_wmi_base wmi_ab;
911 struct completion fw_ready;
912 int num_radios;
913 /* HW channel counters frequency value in hertz common to all MACs */
914 u32 cc_freq_hz;
915
916 struct ath11k_dump_file_data *dump_data;
917 size_t ath11k_coredump_len;
918 struct work_struct dump_work;
919
920 struct ath11k_htc htc;
921
922 struct ath11k_dp dp;
923
924 void __iomem *mem;
925 void __iomem *mem_ce;
926 unsigned long mem_len;
927
928 struct {
929 enum ath11k_bus bus;
930 const struct ath11k_hif_ops *ops;
931 } hif;
932
933 struct {
934 struct completion wakeup_completed;
935 } wow;
936
937 struct ath11k_ce ce;
938 struct timer_list rx_replenish_retry;
939 struct ath11k_hal hal;
940 /* To synchronize core_start/core_stop */
941 struct mutex core_lock;
942 /* Protects data like peers */
943 spinlock_t base_lock;
944 struct ath11k_pdev pdevs[MAX_RADIOS];
945 struct {
946 enum WMI_HOST_WLAN_BAND supported_bands;
947 u32 pdev_id;
948 } target_pdev_ids[MAX_RADIOS];
949 u8 target_pdev_count;
950 struct ath11k_pdev __rcu *pdevs_active[MAX_RADIOS];
951 struct ath11k_hal_reg_capabilities_ext hal_reg_cap[MAX_RADIOS];
952 unsigned long long free_vdev_map;
953
954 /* To synchronize rhash tbl write operation */
955 struct mutex tbl_mtx_lock;
956
957 /* The rhashtable containing struct ath11k_peer keyed by mac addr */
958 struct rhashtable *rhead_peer_addr;
959 struct rhashtable_params rhash_peer_addr_param;
960
961 /* The rhashtable containing struct ath11k_peer keyed by id */
962 struct rhashtable *rhead_peer_id;
963 struct rhashtable_params rhash_peer_id_param;
964
965 struct list_head peers;
966 wait_queue_head_t peer_mapping_wq;
967 u8 mac_addr[ETH_ALEN];
968 int irq_num[ATH11K_IRQ_NUM_MAX];
969 struct ath11k_ext_irq_grp ext_irq_grp[ATH11K_EXT_IRQ_GRP_NUM_MAX];
970 struct ath11k_targ_cap target_caps;
971 u32 ext_service_bitmap[WMI_SERVICE_EXT_BM_SIZE];
972 bool pdevs_macaddr_valid;
973
974 struct ath11k_hw_params hw_params;
975
976 const struct firmware *cal_file;
977
978 /* Below regd's are protected by ab->data_lock */
979 /* This is the regd set for every radio
980 * by the firmware during initialization
981 */
982 struct ieee80211_regdomain *default_regd[MAX_RADIOS];
983 /* This regd is set during dynamic country setting
984 * This may or may not be used during the runtime
985 */
986 struct ieee80211_regdomain *new_regd[MAX_RADIOS];
987 struct cur_regulatory_info *reg_info_store;
988
989 /* Current DFS Regulatory */
990 enum ath11k_dfs_region dfs_region;
991 #ifdef CONFIG_ATH11K_DEBUGFS
992 struct dentry *debugfs_soc;
993 #endif
994 struct ath11k_soc_dp_stats soc_stats;
995
996 unsigned long dev_flags;
997 struct completion driver_recovery;
998 struct workqueue_struct *workqueue;
999 struct work_struct restart_work;
1000 struct work_struct update_11d_work;
1001 u8 new_alpha2[3];
1002 struct workqueue_struct *workqueue_aux;
1003 struct work_struct reset_work;
1004 atomic_t reset_count;
1005 atomic_t recovery_count;
1006 atomic_t recovery_start_count;
1007 bool is_reset;
1008 struct completion reset_complete;
1009 struct completion reconfigure_complete;
1010 struct completion recovery_start;
1011 /* continuous recovery fail count */
1012 atomic_t fail_cont_count;
1013 unsigned long reset_fail_timeout;
1014 struct {
1015 /* protected by data_lock */
1016 u32 fw_crash_counter;
1017 } stats;
1018 u32 pktlog_defs_checksum;
1019
1020 struct ath11k_dbring_cap *db_caps;
1021 u32 num_db_cap;
1022
1023 /* To synchronize 11d scan vdev id */
1024 struct mutex vdev_id_11d_lock;
1025 struct timer_list mon_reap_timer;
1026
1027 struct completion htc_suspend;
1028
1029 struct {
1030 enum ath11k_bdf_search bdf_search;
1031 u32 vendor;
1032 u32 device;
1033 u32 subsystem_vendor;
1034 u32 subsystem_device;
1035 } id;
1036
1037 struct {
1038 struct {
1039 const struct ath11k_msi_config *config;
1040 u32 ep_base_data;
1041 u32 irqs[32];
1042 u32 addr_lo;
1043 u32 addr_hi;
1044 } msi;
1045
1046 const struct ath11k_pci_ops *ops;
1047 } pci;
1048
1049 struct {
1050 u32 api_version;
1051
1052 const struct firmware *fw;
1053 const u8 *amss_data;
1054 size_t amss_len;
1055 const u8 *m3_data;
1056 size_t m3_len;
1057
1058 DECLARE_BITMAP(fw_features, ATH11K_FW_FEATURE_COUNT);
1059 } fw;
1060
1061 struct completion restart_completed;
1062
1063 #ifdef CONFIG_NL80211_TESTMODE
1064 struct {
1065 u32 data_pos;
1066 u32 expected_seq;
1067 u8 *eventdata;
1068 } testmode;
1069 #endif
1070
1071 enum ath11k_pm_policy pm_policy;
1072 enum ath11k_pm_policy actual_pm_policy;
1073 struct notifier_block pm_nb;
1074
1075 /* must be last */
1076 u8 drv_priv[] __aligned(sizeof(void *));
1077 };
1078
1079 struct ath11k_fw_stats_pdev {
1080 struct list_head list;
1081
1082 /* PDEV stats */
1083 s32 ch_noise_floor;
1084 /* Cycles spent transmitting frames */
1085 u32 tx_frame_count;
1086 /* Cycles spent receiving frames */
1087 u32 rx_frame_count;
1088 /* Total channel busy time, evidently */
1089 u32 rx_clear_count;
1090 /* Total on-channel time */
1091 u32 cycle_count;
1092 u32 phy_err_count;
1093 u32 chan_tx_power;
1094 u32 ack_rx_bad;
1095 u32 rts_bad;
1096 u32 rts_good;
1097 u32 fcs_bad;
1098 u32 no_beacons;
1099 u32 mib_int_count;
1100
1101 /* PDEV TX stats */
1102 /* Num HTT cookies queued to dispatch list */
1103 s32 comp_queued;
1104 /* Num HTT cookies dispatched */
1105 s32 comp_delivered;
1106 /* Num MSDU queued to WAL */
1107 s32 msdu_enqued;
1108 /* Num MPDU queue to WAL */
1109 s32 mpdu_enqued;
1110 /* Num MSDUs dropped by WMM limit */
1111 s32 wmm_drop;
1112 /* Num Local frames queued */
1113 s32 local_enqued;
1114 /* Num Local frames done */
1115 s32 local_freed;
1116 /* Num queued to HW */
1117 s32 hw_queued;
1118 /* Num PPDU reaped from HW */
1119 s32 hw_reaped;
1120 /* Num underruns */
1121 s32 underrun;
1122 /* Num hw paused */
1123 u32 hw_paused;
1124 /* Num PPDUs cleaned up in TX abort */
1125 s32 tx_abort;
1126 /* Num MPDUs requeued by SW */
1127 s32 mpdus_requeued;
1128 /* excessive retries */
1129 u32 tx_ko;
1130 u32 tx_xretry;
1131 /* data hw rate code */
1132 u32 data_rc;
1133 /* Scheduler self triggers */
1134 u32 self_triggers;
1135 /* frames dropped due to excessive sw retries */
1136 u32 sw_retry_failure;
1137 /* illegal rate phy errors */
1138 u32 illgl_rate_phy_err;
1139 /* wal pdev continuous xretry */
1140 u32 pdev_cont_xretry;
1141 /* wal pdev tx timeouts */
1142 u32 pdev_tx_timeout;
1143 /* wal pdev resets */
1144 u32 pdev_resets;
1145 /* frames dropped due to non-availability of stateless TIDs */
1146 u32 stateless_tid_alloc_failure;
1147 /* PhY/BB underrun */
1148 u32 phy_underrun;
1149 /* MPDU is more than txop limit */
1150 u32 txop_ovf;
1151 /* Num sequences posted */
1152 u32 seq_posted;
1153 /* Num sequences failed in queueing */
1154 u32 seq_failed_queueing;
1155 /* Num sequences completed */
1156 u32 seq_completed;
1157 /* Num sequences restarted */
1158 u32 seq_restarted;
1159 /* Num of MU sequences posted */
1160 u32 mu_seq_posted;
1161 /* Num MPDUs flushed by SW, HWPAUSED, SW TXABORT
1162 * (Reset,channel change)
1163 */
1164 s32 mpdus_sw_flush;
1165 /* Num MPDUs filtered by HW, all filter condition (TTL expired) */
1166 s32 mpdus_hw_filter;
1167 /* Num MPDUs truncated by PDG (TXOP, TBTT,
1168 * PPDU_duration based on rate, dyn_bw)
1169 */
1170 s32 mpdus_truncated;
1171 /* Num MPDUs that was tried but didn't receive ACK or BA */
1172 s32 mpdus_ack_failed;
1173 /* Num MPDUs that was dropped du to expiry. */
1174 s32 mpdus_expired;
1175
1176 /* PDEV RX stats */
1177 /* Cnts any change in ring routing mid-ppdu */
1178 s32 mid_ppdu_route_change;
1179 /* Total number of statuses processed */
1180 s32 status_rcvd;
1181 /* Extra frags on rings 0-3 */
1182 s32 r0_frags;
1183 s32 r1_frags;
1184 s32 r2_frags;
1185 s32 r3_frags;
1186 /* MSDUs / MPDUs delivered to HTT */
1187 s32 htt_msdus;
1188 s32 htt_mpdus;
1189 /* MSDUs / MPDUs delivered to local stack */
1190 s32 loc_msdus;
1191 s32 loc_mpdus;
1192 /* AMSDUs that have more MSDUs than the status ring size */
1193 s32 oversize_amsdu;
1194 /* Number of PHY errors */
1195 s32 phy_errs;
1196 /* Number of PHY errors drops */
1197 s32 phy_err_drop;
1198 /* Number of mpdu errors - FCS, MIC, ENC etc. */
1199 s32 mpdu_errs;
1200 /* Num overflow errors */
1201 s32 rx_ovfl_errs;
1202 };
1203
1204 struct ath11k_fw_stats_vdev {
1205 struct list_head list;
1206
1207 u32 vdev_id;
1208 u32 beacon_snr;
1209 u32 data_snr;
1210 u32 num_tx_frames[WLAN_MAX_AC];
1211 u32 num_rx_frames;
1212 u32 num_tx_frames_retries[WLAN_MAX_AC];
1213 u32 num_tx_frames_failures[WLAN_MAX_AC];
1214 u32 num_rts_fail;
1215 u32 num_rts_success;
1216 u32 num_rx_err;
1217 u32 num_rx_discard;
1218 u32 num_tx_not_acked;
1219 u32 tx_rate_history[MAX_TX_RATE_VALUES];
1220 u32 beacon_rssi_history[MAX_TX_RATE_VALUES];
1221 };
1222
1223 struct ath11k_fw_stats_bcn {
1224 struct list_head list;
1225
1226 u32 vdev_id;
1227 u32 tx_bcn_succ_cnt;
1228 u32 tx_bcn_outage_cnt;
1229 };
1230
1231 void ath11k_fw_stats_init(struct ath11k *ar);
1232 void ath11k_fw_stats_pdevs_free(struct list_head *head);
1233 void ath11k_fw_stats_vdevs_free(struct list_head *head);
1234 void ath11k_fw_stats_bcn_free(struct list_head *head);
1235 void ath11k_fw_stats_free(struct ath11k_fw_stats *stats);
1236
1237 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_ipq8074[];
1238 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq8074[];
1239 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq6018[];
1240
1241 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qca6390[];
1242 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qca6390[];
1243
1244 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_ipq5018[];
1245 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq5018[];
1246
1247 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qcn9074[];
1248 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qcn9074[];
1249 int ath11k_core_qmi_firmware_ready(struct ath11k_base *ab);
1250 int ath11k_core_pre_init(struct ath11k_base *ab);
1251 int ath11k_core_init(struct ath11k_base *ath11k);
1252 void ath11k_core_deinit(struct ath11k_base *ath11k);
1253 struct ath11k_base *ath11k_core_alloc(struct device *dev, size_t priv_size,
1254 enum ath11k_bus bus);
1255 void ath11k_core_free(struct ath11k_base *ath11k);
1256 int ath11k_core_fetch_bdf(struct ath11k_base *ath11k,
1257 struct ath11k_board_data *bd);
1258 int ath11k_core_fetch_regdb(struct ath11k_base *ab, struct ath11k_board_data *bd);
1259 int ath11k_core_fetch_board_data_api_1(struct ath11k_base *ab,
1260 struct ath11k_board_data *bd,
1261 const char *name);
1262 void ath11k_core_free_bdf(struct ath11k_base *ab, struct ath11k_board_data *bd);
1263 int ath11k_core_check_dt(struct ath11k_base *ath11k);
1264 int ath11k_core_check_smbios(struct ath11k_base *ab);
1265 void ath11k_core_halt(struct ath11k *ar);
1266 int ath11k_core_resume_early(struct ath11k_base *ab);
1267 int ath11k_core_resume(struct ath11k_base *ab);
1268 int ath11k_core_suspend(struct ath11k_base *ab);
1269 int ath11k_core_suspend_late(struct ath11k_base *ab);
1270 void ath11k_core_pre_reconfigure_recovery(struct ath11k_base *ab);
1271 bool ath11k_core_coldboot_cal_support(struct ath11k_base *ab);
1272
1273 const struct firmware *ath11k_core_firmware_request(struct ath11k_base *ab,
1274 const char *filename);
1275
ath11k_scan_state_str(enum ath11k_scan_state state)1276 static inline const char *ath11k_scan_state_str(enum ath11k_scan_state state)
1277 {
1278 switch (state) {
1279 case ATH11K_SCAN_IDLE:
1280 return "idle";
1281 case ATH11K_SCAN_STARTING:
1282 return "starting";
1283 case ATH11K_SCAN_RUNNING:
1284 return "running";
1285 case ATH11K_SCAN_ABORTING:
1286 return "aborting";
1287 }
1288
1289 return "unknown";
1290 }
1291
ATH11K_SKB_CB(struct sk_buff * skb)1292 static inline struct ath11k_skb_cb *ATH11K_SKB_CB(struct sk_buff *skb)
1293 {
1294 BUILD_BUG_ON(sizeof(struct ath11k_skb_cb) >
1295 IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
1296 return (struct ath11k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
1297 }
1298
ATH11K_SKB_RXCB(struct sk_buff * skb)1299 static inline struct ath11k_skb_rxcb *ATH11K_SKB_RXCB(struct sk_buff *skb)
1300 {
1301 BUILD_BUG_ON(sizeof(struct ath11k_skb_rxcb) > sizeof(skb->cb));
1302 return (struct ath11k_skb_rxcb *)skb->cb;
1303 }
1304
ath11k_vif_to_arvif(struct ieee80211_vif * vif)1305 static inline struct ath11k_vif *ath11k_vif_to_arvif(struct ieee80211_vif *vif)
1306 {
1307 return (struct ath11k_vif *)vif->drv_priv;
1308 }
1309
ath11k_sta_to_arsta(struct ieee80211_sta * sta)1310 static inline struct ath11k_sta *ath11k_sta_to_arsta(struct ieee80211_sta *sta)
1311 {
1312 return (struct ath11k_sta *)sta->drv_priv;
1313 }
1314
ath11k_ab_to_ar(struct ath11k_base * ab,int mac_id)1315 static inline struct ath11k *ath11k_ab_to_ar(struct ath11k_base *ab,
1316 int mac_id)
1317 {
1318 return ab->pdevs[ath11k_hw_mac_id_to_pdev_id(&ab->hw_params, mac_id)].ar;
1319 }
1320
ath11k_core_create_firmware_path(struct ath11k_base * ab,const char * filename,void * buf,size_t buf_len)1321 static inline void ath11k_core_create_firmware_path(struct ath11k_base *ab,
1322 const char *filename,
1323 void *buf, size_t buf_len)
1324 {
1325 snprintf(buf, buf_len, "%s/%s/%s", ATH11K_FW_DIR,
1326 ab->hw_params.fw.dir, filename);
1327 }
1328
ath11k_bus_str(enum ath11k_bus bus)1329 static inline const char *ath11k_bus_str(enum ath11k_bus bus)
1330 {
1331 switch (bus) {
1332 case ATH11K_BUS_PCI:
1333 return "pci";
1334 case ATH11K_BUS_AHB:
1335 return "ahb";
1336 }
1337
1338 return "unknown";
1339 }
1340
1341 void ath11k_core_pm_notifier_unregister(struct ath11k_base *ab);
1342
1343 #endif /* _CORE_H_ */
1344