xref: /linux/drivers/gpu/drm/xe/tests/xe_mocs.c (revision 3a39d672e7f48b8d6b91a09afa4b55352773b4b5)
1 // SPDX-License-Identifier: GPL-2.0 AND MIT
2 /*
3  * Copyright © 2022 Intel Corporation
4  */
5 
6 #include <kunit/test.h>
7 #include <kunit/visibility.h>
8 
9 #include "tests/xe_kunit_helpers.h"
10 #include "tests/xe_pci_test.h"
11 #include "tests/xe_test.h"
12 
13 #include "xe_device.h"
14 #include "xe_gt.h"
15 #include "xe_mocs.h"
16 #include "xe_pci.h"
17 #include "xe_pm.h"
18 
19 struct live_mocs {
20 	struct xe_mocs_info table;
21 };
22 
live_mocs_init(struct live_mocs * arg,struct xe_gt * gt)23 static int live_mocs_init(struct live_mocs *arg, struct xe_gt *gt)
24 {
25 	unsigned int flags;
26 	struct kunit *test = kunit_get_current_test();
27 
28 	memset(arg, 0, sizeof(*arg));
29 
30 	flags = get_mocs_settings(gt_to_xe(gt), &arg->table);
31 
32 	kunit_info(test, "gt %d", gt->info.id);
33 	kunit_info(test, "gt type %d", gt->info.type);
34 	kunit_info(test, "table size %d", arg->table.table_size);
35 	kunit_info(test, "table uc_index %d", arg->table.uc_index);
36 	kunit_info(test, "table num_mocs_regs %d", arg->table.num_mocs_regs);
37 
38 	return flags;
39 }
40 
read_l3cc_table(struct xe_gt * gt,const struct xe_mocs_info * info)41 static void read_l3cc_table(struct xe_gt *gt,
42 			    const struct xe_mocs_info *info)
43 {
44 	struct kunit *test = kunit_get_current_test();
45 	u32 l3cc, l3cc_expected;
46 	unsigned int i;
47 	u32 reg_val;
48 	u32 ret;
49 
50 	ret = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT);
51 	KUNIT_ASSERT_EQ_MSG(test, ret, 0, "Forcewake Failed.\n");
52 
53 	for (i = 0; i < info->num_mocs_regs; i++) {
54 		if (!(i & 1)) {
55 			if (regs_are_mcr(gt))
56 				reg_val = xe_gt_mcr_unicast_read_any(gt, XEHP_LNCFCMOCS(i >> 1));
57 			else
58 				reg_val = xe_mmio_read32(gt, XELP_LNCFCMOCS(i >> 1));
59 
60 			mocs_dbg(gt, "reg_val=0x%x\n", reg_val);
61 		} else {
62 			/* Just re-use value read on previous iteration */
63 			reg_val >>= 16;
64 		}
65 
66 		l3cc_expected = get_entry_l3cc(info, i);
67 		l3cc = reg_val & 0xffff;
68 
69 		mocs_dbg(gt, "[%u] expected=0x%x actual=0x%x\n",
70 			 i, l3cc_expected, l3cc);
71 
72 		KUNIT_EXPECT_EQ_MSG(test, l3cc_expected, l3cc,
73 				    "l3cc idx=%u has incorrect val.\n", i);
74 	}
75 	xe_force_wake_put(gt_to_fw(gt), XE_FW_GT);
76 }
77 
read_mocs_table(struct xe_gt * gt,const struct xe_mocs_info * info)78 static void read_mocs_table(struct xe_gt *gt,
79 			    const struct xe_mocs_info *info)
80 {
81 	struct kunit *test = kunit_get_current_test();
82 	u32 mocs, mocs_expected;
83 	unsigned int i;
84 	u32 reg_val;
85 	u32 ret;
86 
87 	KUNIT_EXPECT_TRUE_MSG(test, info->unused_entries_index,
88 			      "Unused entries index should have been defined\n");
89 
90 	ret = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT);
91 	KUNIT_ASSERT_EQ_MSG(test, ret, 0, "Forcewake Failed.\n");
92 
93 	for (i = 0; i < info->num_mocs_regs; i++) {
94 		if (regs_are_mcr(gt))
95 			reg_val = xe_gt_mcr_unicast_read_any(gt, XEHP_GLOBAL_MOCS(i));
96 		else
97 			reg_val = xe_mmio_read32(gt, XELP_GLOBAL_MOCS(i));
98 
99 		mocs_expected = get_entry_control(info, i);
100 		mocs = reg_val;
101 
102 		mocs_dbg(gt, "[%u] expected=0x%x actual=0x%x\n",
103 			 i, mocs_expected, mocs);
104 
105 		KUNIT_EXPECT_EQ_MSG(test, mocs_expected, mocs,
106 				    "mocs reg 0x%x has incorrect val.\n", i);
107 	}
108 
109 	xe_force_wake_put(gt_to_fw(gt), XE_FW_GT);
110 }
111 
mocs_kernel_test_run_device(struct xe_device * xe)112 static int mocs_kernel_test_run_device(struct xe_device *xe)
113 {
114 	/* Basic check the system is configured with the expected mocs table */
115 
116 	struct live_mocs mocs;
117 	struct xe_gt *gt;
118 
119 	unsigned int flags;
120 	int id;
121 
122 	xe_pm_runtime_get(xe);
123 
124 	for_each_gt(gt, xe, id) {
125 		flags = live_mocs_init(&mocs, gt);
126 		if (flags & HAS_GLOBAL_MOCS)
127 			read_mocs_table(gt, &mocs.table);
128 		if (flags & HAS_LNCF_MOCS)
129 			read_l3cc_table(gt, &mocs.table);
130 	}
131 
132 	xe_pm_runtime_put(xe);
133 
134 	return 0;
135 }
136 
xe_live_mocs_kernel_kunit(struct kunit * test)137 static void xe_live_mocs_kernel_kunit(struct kunit *test)
138 {
139 	struct xe_device *xe = test->priv;
140 
141 	if (IS_SRIOV_VF(xe))
142 		kunit_skip(test, "this test is N/A for VF");
143 
144 	mocs_kernel_test_run_device(xe);
145 }
146 
mocs_reset_test_run_device(struct xe_device * xe)147 static int mocs_reset_test_run_device(struct xe_device *xe)
148 {
149 	/* Check the mocs setup is retained over GT reset */
150 
151 	struct live_mocs mocs;
152 	struct xe_gt *gt;
153 	unsigned int flags;
154 	int id;
155 	struct kunit *test = kunit_get_current_test();
156 
157 	xe_pm_runtime_get(xe);
158 
159 	for_each_gt(gt, xe, id) {
160 		flags = live_mocs_init(&mocs, gt);
161 		kunit_info(test, "mocs_reset_test before reset\n");
162 		if (flags & HAS_GLOBAL_MOCS)
163 			read_mocs_table(gt, &mocs.table);
164 		if (flags & HAS_LNCF_MOCS)
165 			read_l3cc_table(gt, &mocs.table);
166 
167 		xe_gt_reset_async(gt);
168 		flush_work(&gt->reset.worker);
169 
170 		kunit_info(test, "mocs_reset_test after reset\n");
171 		if (flags & HAS_GLOBAL_MOCS)
172 			read_mocs_table(gt, &mocs.table);
173 		if (flags & HAS_LNCF_MOCS)
174 			read_l3cc_table(gt, &mocs.table);
175 	}
176 
177 	xe_pm_runtime_put(xe);
178 
179 	return 0;
180 }
181 
xe_live_mocs_reset_kunit(struct kunit * test)182 static void xe_live_mocs_reset_kunit(struct kunit *test)
183 {
184 	struct xe_device *xe = test->priv;
185 
186 	if (IS_SRIOV_VF(xe))
187 		kunit_skip(test, "this test is N/A for VF");
188 
189 	mocs_reset_test_run_device(xe);
190 }
191 
192 static struct kunit_case xe_mocs_tests[] = {
193 	KUNIT_CASE_PARAM(xe_live_mocs_kernel_kunit, xe_pci_live_device_gen_param),
194 	KUNIT_CASE_PARAM(xe_live_mocs_reset_kunit, xe_pci_live_device_gen_param),
195 	{}
196 };
197 
198 VISIBLE_IF_KUNIT
199 struct kunit_suite xe_mocs_test_suite = {
200 	.name = "xe_mocs",
201 	.test_cases = xe_mocs_tests,
202 	.init = xe_kunit_helper_xe_device_live_test_init,
203 };
204 EXPORT_SYMBOL_IF_KUNIT(xe_mocs_test_suite);
205