1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * Support for Intel Camera Imaging ISP subsystem.
4 * Copyright (c) 2015, Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 */
15
16 #ifndef __MMU_PUBLIC_H_INCLUDED__
17 #define __MMU_PUBLIC_H_INCLUDED__
18
19 #include "system_local.h"
20 #include "device_access.h"
21 #include "assert_support.h"
22
23 /*! Set the page table base index of MMU[ID]
24
25 \param ID[in] MMU identifier
26 \param base_index[in] page table base index
27
28 \return none, MMU[ID].page_table_base_index = base_index
29 */
30 void mmu_set_page_table_base_index(
31 const mmu_ID_t ID,
32 const hrt_data base_index);
33
34 /*! Get the page table base index of MMU[ID]
35
36 \param ID[in] MMU identifier
37 \param base_index[in] page table base index
38
39 \return MMU[ID].page_table_base_index
40 */
41 hrt_data mmu_get_page_table_base_index(
42 const mmu_ID_t ID);
43
44 /*! Invalidate the page table cache of MMU[ID]
45
46 \param ID[in] MMU identifier
47
48 \return none
49 */
50 void mmu_invalidate_cache(
51 const mmu_ID_t ID);
52
53 /*! Invalidate the page table cache of all MMUs
54
55 \return none
56 */
57 void mmu_invalidate_cache_all(void);
58
59 /*! Write to a control register of MMU[ID]
60
61 \param ID[in] MMU identifier
62 \param reg[in] register index
63 \param value[in] The data to be written
64
65 \return none, MMU[ID].ctrl[reg] = value
66 */
mmu_reg_store(const mmu_ID_t ID,const unsigned int reg,const hrt_data value)67 static inline void mmu_reg_store(
68 const mmu_ID_t ID,
69 const unsigned int reg,
70 const hrt_data value)
71 {
72 assert(ID < N_MMU_ID);
73 assert(MMU_BASE[ID] != (hrt_address) - 1);
74 ia_css_device_store_uint32(MMU_BASE[ID] + reg * sizeof(hrt_data), value);
75 return;
76 }
77
78 /*! Read from a control register of MMU[ID]
79
80 \param ID[in] MMU identifier
81 \param reg[in] register index
82 \param value[in] The data to be written
83
84 \return MMU[ID].ctrl[reg]
85 */
mmu_reg_load(const mmu_ID_t ID,const unsigned int reg)86 static inline hrt_data mmu_reg_load(
87 const mmu_ID_t ID,
88 const unsigned int reg)
89 {
90 assert(ID < N_MMU_ID);
91 assert(MMU_BASE[ID] != (hrt_address) - 1);
92 return ia_css_device_load_uint32(MMU_BASE[ID] + reg * sizeof(hrt_data));
93 }
94
95 #endif /* __MMU_PUBLIC_H_INCLUDED__ */
96