1 /* SPDX-License-Identifier: GPL-2.0 2 * 3 * Copyright 2016-2020 HabanaLabs, Ltd. 4 * All Rights Reserved. 5 * 6 */ 7 8 /************************************ 9 ** This is an auto-generated file ** 10 ** DO NOT EDIT BELOW ** 11 ************************************/ 12 13 #ifndef ASIC_REG_DCORE0_TPC0_EML_BUSMON_0_REGS_H_ 14 #define ASIC_REG_DCORE0_TPC0_EML_BUSMON_0_REGS_H_ 15 16 /* 17 ***************************************** 18 * DCORE0_TPC0_EML_BUSMON_0 19 * (Prototype: BMON) 20 ***************************************** 21 */ 22 23 #define mmDCORE0_TPC0_EML_BUSMON_0_CR 0x7000 24 25 #define mmDCORE0_TPC0_EML_BUSMON_0_REG_RESET 0x7004 26 27 #define mmDCORE0_TPC0_EML_BUSMON_0_INT_CLR 0x7008 28 29 #define mmDCORE0_TPC0_EML_BUSMON_0_TRIG_TH 0x700C 30 31 #define mmDCORE0_TPC0_EML_BUSMON_0_ADDRL_S0 0x7020 32 33 #define mmDCORE0_TPC0_EML_BUSMON_0_ADDRH_S0 0x7024 34 35 #define mmDCORE0_TPC0_EML_BUSMON_0_ADDRL_E0 0x7028 36 37 #define mmDCORE0_TPC0_EML_BUSMON_0_ADDRH_E0 0x702C 38 39 #define mmDCORE0_TPC0_EML_BUSMON_0_ADDRL_S1 0x7030 40 41 #define mmDCORE0_TPC0_EML_BUSMON_0_ADDRH_S1 0x7034 42 43 #define mmDCORE0_TPC0_EML_BUSMON_0_ADDRL_E1 0x7038 44 45 #define mmDCORE0_TPC0_EML_BUSMON_0_ADDRH_E1 0x703C 46 47 #define mmDCORE0_TPC0_EML_BUSMON_0_ADDRL_S2 0x7040 48 49 #define mmDCORE0_TPC0_EML_BUSMON_0_ADDRH_S2 0x7044 50 51 #define mmDCORE0_TPC0_EML_BUSMON_0_ADDRL_E2 0x7048 52 53 #define mmDCORE0_TPC0_EML_BUSMON_0_ADDRH_E2 0x704C 54 55 #define mmDCORE0_TPC0_EML_BUSMON_0_ADDRL_S3 0x7050 56 57 #define mmDCORE0_TPC0_EML_BUSMON_0_ADDRH_S3 0x7054 58 59 #define mmDCORE0_TPC0_EML_BUSMON_0_ADDRL_E3 0x7058 60 61 #define mmDCORE0_TPC0_EML_BUSMON_0_ADDRH_E3 0x705C 62 63 #define mmDCORE0_TPC0_EML_BUSMON_0_REDUCTION 0x7060 64 65 #define mmDCORE0_TPC0_EML_BUSMON_0_IDL 0x7070 66 67 #define mmDCORE0_TPC0_EML_BUSMON_0_IDH 0x7074 68 69 #define mmDCORE0_TPC0_EML_BUSMON_0_IDENL 0x7078 70 71 #define mmDCORE0_TPC0_EML_BUSMON_0_IDENH 0x707C 72 73 #define mmDCORE0_TPC0_EML_BUSMON_0_LATENCY_SMP 0x7090 74 75 #define mmDCORE0_TPC0_EML_BUSMON_0_ATTR 0x7100 76 77 #define mmDCORE0_TPC0_EML_BUSMON_0_ATTREN 0x7104 78 79 #define mmDCORE0_TPC0_EML_BUSMON_0_USRENL 0x7108 80 81 #define mmDCORE0_TPC0_EML_BUSMON_0_USRL 0x710C 82 83 #define mmDCORE0_TPC0_EML_BUSMON_0_USRENH 0x7120 84 85 #define mmDCORE0_TPC0_EML_BUSMON_0_USRH 0x7124 86 87 #define mmDCORE0_TPC0_EML_BUSMON_0_CAPTURE 0x7200 88 89 #define mmDCORE0_TPC0_EML_BUSMON_0_RELEASE 0x7204 90 91 #define mmDCORE0_TPC0_EML_BUSMON_0_WIN_CAPTURE 0x7208 92 93 #define mmDCORE0_TPC0_EML_BUSMON_0_BW_WIN 0x720C 94 95 #define mmDCORE0_TPC0_EML_BUSMON_0_MATCH_CNT_SOD 0x7220 96 97 #define mmDCORE0_TPC0_EML_BUSMON_0_MATCH_CNT_WIN 0x7224 98 99 #define mmDCORE0_TPC0_EML_BUSMON_0_CYCCNT_L 0x7228 100 101 #define mmDCORE0_TPC0_EML_BUSMON_0_CYCCNT_H 0x722C 102 103 #define mmDCORE0_TPC0_EML_BUSMON_0_MAXLAT_SOD 0x7304 104 105 #define mmDCORE0_TPC0_EML_BUSMON_0_MINLAT_SOD 0x7308 106 107 #define mmDCORE0_TPC0_EML_BUSMON_0_MAXBW_SOD 0x7310 108 109 #define mmDCORE0_TPC0_EML_BUSMON_0_MINBW_SOD 0x7314 110 111 #define mmDCORE0_TPC0_EML_BUSMON_0_MAXOS_SOD 0x7320 112 113 #define mmDCORE0_TPC0_EML_BUSMON_0_MINOS_SOD 0x7324 114 115 #define mmDCORE0_TPC0_EML_BUSMON_0_ADDRL_SNAPSHOT 0x7400 116 117 #define mmDCORE0_TPC0_EML_BUSMON_0_ADDRH_SNAPSHOT 0x7404 118 119 #define mmDCORE0_TPC0_EML_BUSMON_0_IDL_SNAPSHOT 0x7408 120 121 #define mmDCORE0_TPC0_EML_BUSMON_0_IDH_SNAPSHOT 0x740C 122 123 #define mmDCORE0_TPC0_EML_BUSMON_0_ATTR_SNAPSHOT 0x7410 124 125 #define mmDCORE0_TPC0_EML_BUSMON_0_STM_TRC 0x7420 126 127 #define mmDCORE0_TPC0_EML_BUSMON_0_STM_TRC_DROP 0x7424 128 129 #define mmDCORE0_TPC0_EML_BUSMON_0_DEVARCH 0x7FBC 130 131 #define mmDCORE0_TPC0_EML_BUSMON_0_PMDEVID2 0x7FC0 132 133 #define mmDCORE0_TPC0_EML_BUSMON_0_PMDEVID1 0x7FC4 134 135 #define mmDCORE0_TPC0_EML_BUSMON_0_PMDEVID 0x7FC8 136 137 #define mmDCORE0_TPC0_EML_BUSMON_0_DEVTYPE 0x7FCC 138 139 #define mmDCORE0_TPC0_EML_BUSMON_0_PIDR4 0x7FD0 140 141 #define mmDCORE0_TPC0_EML_BUSMON_0_PIDR5 0x7FD4 142 143 #define mmDCORE0_TPC0_EML_BUSMON_0_PIDR6 0x7FD8 144 145 #define mmDCORE0_TPC0_EML_BUSMON_0_PIDR7 0x7FDC 146 147 #define mmDCORE0_TPC0_EML_BUSMON_0_PIDR0 0x7FE0 148 149 #define mmDCORE0_TPC0_EML_BUSMON_0_PIDR1 0x7FE4 150 151 #define mmDCORE0_TPC0_EML_BUSMON_0_PIDR2 0x7FE8 152 153 #define mmDCORE0_TPC0_EML_BUSMON_0_PIDR3 0x7FEC 154 155 #define mmDCORE0_TPC0_EML_BUSMON_0_CIDR0 0x7FF0 156 157 #define mmDCORE0_TPC0_EML_BUSMON_0_CIDR1 0x7FF4 158 159 #define mmDCORE0_TPC0_EML_BUSMON_0_CIDR2 0x7FF8 160 161 #define mmDCORE0_TPC0_EML_BUSMON_0_CIDR3 0x7FFC 162 163 #endif /* ASIC_REG_DCORE0_TPC0_EML_BUSMON_0_REGS_H_ */ 164