1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (c) 2017-2026 Morse Micro
4 */
5 #include "core.h"
6 #include <linux/slab.h>
7 #include <linux/jiffies.h>
8 #include <linux/crc32.h>
9 #include <net/mac80211.h>
10 #include <asm/div64.h>
11 #include <linux/kernel.h>
12 #include "hif.h"
13 #include "mac.h"
14 #include "bus.h"
15 #include "ps.h"
16 #include "rc.h"
17
18 /*
19 * Arbitrary size limit for the filter command address list, to ensure that
20 * the command does not exceed page/MTU size. This will be far greater than
21 * the number of filters supported by the firmware.
22 */
23 #define MCAST_FILTER_COUNT_MAX (1024 / sizeof(filter->addr_list[0]))
24
25 /* Calculate average RSSI for Rx status */
26 #define CALC_AVG_RSSI(_avg, _sample) ((((_avg) * 9 + (_sample)) / 10))
27
28 /*
29 * When automatically trying MCS0 before MCS10, this is how many
30 * MCS0 attempts to make
31 */
32 #define MCS0_BEFORE_MCS10_COUNT (1)
33
34 /* Maximum TX power (default) */
35 #define MAX_TX_POWER_MBM (2200)
36
37 /*
38 * Since S1G runs at 1/10th the clockrate of VHT, the worst-case
39 * transmission time is significantly longer then that of non-S1G
40 * PHYs.
41 */
42 #define MM81X_FLUSH_TIMEOUT (16 * HZ)
43
44 /* Default queue count */
45 #define MM81X_HW_QUEUE_COUNT (4)
46
47 /* Max rates per skb */
48 #define MM81X_HW_MAX_RATES (4)
49
50 /* Max reported rates */
51 #define MM81X_HW_MAX_REPORT_RATES (4)
52
53 /* Max rate attempts */
54 #define MM81X_HW_MAX_RATE_TRIES (1)
55
56 /* Max sk pacing shift */
57 #define MM81X_HW_TX_SK_PACING_SHIFT (3)
58
59 /* NSS/MCS map values */
60 #define MM81X_NSS_MCS_BYTE_0 0xfe /* 1SS */
61 #define MM81X_NSS_MCS_BYTE_1 0x00
62 #define MM81X_NSS_MCS_BYTE_2 0xfc /* 1SS */
63 #define MM81X_NSS_MCS_BYTE_3 0x01
64 #define MM81X_NSS_MCS_BYTE_4 0x00
65
66 /* HW restart delay time before terminating hardware IF work items */
67 #define MM81X_HW_RESTART_DELAY_MS 20
68
69 /* clang-format off */
70
71 /* mm81x chips do not support 16MHz */
72 #define CHANS1G(channel, frequency, offset, chan_flags) \
73 { \
74 .band = NL80211_BAND_S1GHZ, \
75 .center_freq = (frequency), \
76 .freq_offset = (offset), \
77 .hw_value = (channel), \
78 .flags = ((chan_flags) | IEEE80211_CHAN_NO_16MHZ), \
79 .max_antenna_gain = 0, \
80 .max_power = 30, \
81 }
82
83 static struct ieee80211_channel mors_s1ghz_channels[] = {
84 CHANS1G(1, 902, 500, IEEE80211_CHAN_S1G_NO_PRIMARY),
85 CHANS1G(3, 903, 500, 0),
86 CHANS1G(5, 904, 500, 0),
87 CHANS1G(7, 905, 500, 0),
88 CHANS1G(9, 906, 500, 0),
89 CHANS1G(11, 907, 500, 0),
90 CHANS1G(13, 908, 500, 0),
91 CHANS1G(15, 909, 500, 0),
92 CHANS1G(17, 910, 500, 0),
93 CHANS1G(19, 911, 500, 0),
94 CHANS1G(21, 912, 500, 0),
95 CHANS1G(23, 913, 500, 0),
96 CHANS1G(25, 914, 500, 0),
97 CHANS1G(27, 915, 500, 0),
98 CHANS1G(29, 916, 500, 0),
99 CHANS1G(31, 917, 500, 0),
100 CHANS1G(33, 918, 500, 0),
101 CHANS1G(35, 919, 500, 0),
102 CHANS1G(37, 920, 500, 0),
103 CHANS1G(39, 921, 500, 0),
104 CHANS1G(41, 922, 500, 0),
105 CHANS1G(43, 923, 500, 0),
106 CHANS1G(45, 924, 500, 0),
107 CHANS1G(47, 925, 500, 0),
108 CHANS1G(49, 926, 500, 0),
109 CHANS1G(51, 927, 500, IEEE80211_CHAN_S1G_NO_PRIMARY),
110 };
111
112 /* clang-format on */
113
114 static struct ieee80211_supported_band mors_band_s1ghz = {
115 .band = NL80211_BAND_S1GHZ,
116 .s1g_cap.s1g = true,
117 .channels = mors_s1ghz_channels,
118 .n_channels = ARRAY_SIZE(mors_s1ghz_channels),
119 .bitrates = NULL,
120 .n_bitrates = 0,
121 .s1g_cap.cap[4] = 0x80 /* STA type sensor only for AP & STA */
122 };
123
124 static struct ieee80211_iface_limit mors_if_limits[] = {
125 {
126 .max = MM81X_MAX_IF,
127 .types = BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_AP),
128 },
129 };
130
131 static struct ieee80211_iface_combination mors_if_combs[] = {
132 {
133 .limits = mors_if_limits,
134 .n_limits = ARRAY_SIZE(mors_if_limits),
135 .max_interfaces = MM81X_MAX_IF,
136 .num_different_channels = 1,
137 },
138 };
139
140 /* Convert from a time in time units (1024us) to us */
141 #define MM81X_TU_TO_US(x) ((x) * 1024UL)
142
143 /* Convert from a time in time units (1024us) to ms */
144 #define MM81X_TU_TO_MS(x) (MM81X_TU_TO_US(x) / 1000UL)
145
146 /* Default time to dwell on a scan channel */
147 #define MM81X_HWSCAN_DEFAULT_DWELL_TIME_MS (30)
148
149 /* Default time to dwell on a scan channel for passive scan */
150 #define MM81X_HWSCAN_DEFAULT_PASSIVE_DWELL_TIME_MS (110)
151
152 /* Default time to dwell on home channel, in between scan channels */
153 #define MM81X_HWSCAN_DEFAULT_DWELL_ON_HOME_MS (200)
154
155 /* Typical time it takes to send the probe */
156 #define MM81X_HWSCAN_PROBE_DELAY_MS (30)
157
158 /* A margin to account for event/command processing */
159 #define MM81X_HWSCAN_TIMEOUT_OVERHEAD_MS (2000)
160
161 /* Scan channel frequency mask */
162 #define HW_SCAN_CH_LIST_FREQ_KHZ GENMASK(19, 0)
163
164 /*
165 * Scan channel bandwidth mask.
166 * Encoded as: 0 = 1MHz, 1 = 2MHz, 2 = 4MHz, 3 = 8MHz
167 */
168 #define HW_SCAN_CH_LIST_OP_BW GENMASK(21, 20)
169
170 /*
171 * Scan channel primary channel width.
172 * Encoded as: 0 = 1MHz, 1 = 2MHz
173 */
174 #define HW_SCAN_CH_LIST_PRIM_CH_WIDTH BIT(22)
175
176 /* Index into power_list for tx power of channel */
177 #define HW_SCAN_CH_LIST_PWR_LIST_IDX GENMASK(31, 26)
178
179 struct hw_scan_tlv_hdr {
180 __le16 tag;
181 __le16 len;
182 } __packed;
183
184 struct hw_scan_tlv_channel_list {
185 struct hw_scan_tlv_hdr hdr;
186 __le32 channels[];
187 } __packed;
188
189 struct hw_scan_tlv_power_list {
190 struct hw_scan_tlv_hdr hdr;
191 s32 tx_power_qdbm[];
192 } __packed;
193
194 struct hw_scan_tlv_probe_req {
195 struct hw_scan_tlv_hdr hdr;
196 /* Probe request frame template (including SSIDs) */
197 u8 buf[];
198 } __packed;
199
200 struct hw_scan_tlv_dwell_on_home {
201 struct hw_scan_tlv_hdr hdr;
202 /* Time to dwell on home between scan channels */
203 __le32 home_dwell_time_ms;
204 } __packed;
205
206 #define DOT11AH_BA_MAX_MPDU_PER_AMPDU (32)
207
208 /* wiphy scan params */
209 #define MM81X_MAX_SCAN_IE_LEN 512
210 #define MM81X_MAX_SCAN_SSIDS 1
211 #define MM81X_MAX_REMAIN_ON_CHAN_DURATION 10000
212
mm81x_reg_h_cc_equal(const char * cc1,const char * cc2)213 static bool mm81x_reg_h_cc_equal(const char *cc1, const char *cc2)
214 {
215 return (cc1[0] == cc2[0]) && (cc1[1] == cc2[1]);
216 }
217
mm81x_tx_h_pkt_over_rts_threshold(struct mm81x * mors,struct ieee80211_tx_info * info,struct sk_buff * skb)218 static bool mm81x_tx_h_pkt_over_rts_threshold(struct mm81x *mors,
219 struct ieee80211_tx_info *info,
220 struct sk_buff *skb)
221 {
222 u8 ccmp_len;
223
224 if (!info->control.hw_key)
225 return ((skb->len + FCS_LEN) > mors->rts_threshold);
226
227 if (info->control.hw_key->keylen == 32)
228 ccmp_len =
229 IEEE80211_CCMP_256_HDR_LEN + IEEE80211_CCMP_256_MIC_LEN;
230 else if (info->control.hw_key->keylen == 16)
231 ccmp_len = IEEE80211_CCMP_HDR_LEN + IEEE80211_CCMP_MIC_LEN;
232 else
233 ccmp_len = 0;
234
235 return ((skb->len + FCS_LEN + ccmp_len) > mors->rts_threshold);
236 }
237
mm81x_tx_h_ps_filtered_for_sta(struct mm81x * mors,struct sk_buff * skb,struct ieee80211_sta * sta)238 static bool mm81x_tx_h_ps_filtered_for_sta(struct mm81x *mors,
239 struct sk_buff *skb,
240 struct ieee80211_sta *sta)
241 {
242 struct mm81x_sta *mors_sta;
243 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
244
245 if (!sta)
246 return false;
247
248 mors_sta = (struct mm81x_sta *)sta->drv_priv;
249
250 if (!mors_sta->tx_ps_filter_en)
251 return false;
252
253 dev_dbg(mors->dev, "Frame for sta[%pM] PS filtered", mors_sta->addr);
254
255 info->flags |= IEEE80211_TX_STAT_TX_FILTERED;
256 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
257
258 ieee80211_tx_status_skb(mors->hw, skb);
259 return true;
260 }
261
mm81x_mac_check_fw_disabled_chans(struct ieee80211_hw * hw)262 static void mm81x_mac_check_fw_disabled_chans(struct ieee80211_hw *hw)
263 {
264 int ret = 0;
265 u32 i;
266 struct mm81x *mors = hw->priv;
267 struct host_cmd_resp_get_disabled_channels *resp;
268 u32 resp_len = sizeof(struct host_cmd_disabled_channel_entry) *
269 ARRAY_SIZE(mors_s1ghz_channels) +
270 sizeof(*resp);
271
272 resp = kzalloc(resp_len, GFP_KERNEL);
273 if (!resp) {
274 ret = -ENOMEM;
275 goto out;
276 }
277
278 ret = mm81x_cmd_get_disabled_channels(mors, resp, resp_len);
279 if (ret)
280 goto out;
281
282 for (i = 0; i < ARRAY_SIZE(mors_s1ghz_channels); i++) {
283 struct ieee80211_channel *ch = &mors_s1ghz_channels[i];
284
285 if (ch->flags & IEEE80211_CHAN_DISABLED)
286 continue;
287
288 ch->flags &= ~IEEE80211_CHAN_S1G_NO_PRIMARY;
289 }
290
291 for (i = 0; i < le32_to_cpu(resp->n_channels); i++) {
292 struct ieee80211_channel *ch;
293 struct host_cmd_disabled_channel_entry *entry =
294 &resp->channels[i];
295
296 if (entry->bw_mhz != 1)
297 continue;
298
299 ch = ieee80211_get_channel_khz(
300 hw->wiphy,
301 KHZ100_TO_KHZ(le16_to_cpu(entry->freq_100khz)));
302 if (!ch)
303 continue;
304
305 ch->flags |= IEEE80211_CHAN_S1G_NO_PRIMARY;
306 dev_dbg(mors->dev, "set NO_PRIMARY on %u KHz",
307 ieee80211_channel_to_khz(ch));
308 }
309
310 out:
311 if (ret)
312 dev_err(mors->dev, "failed to set disabled primary channels");
313
314 kfree(resp);
315 }
316
mm81x_mac_ops_start(struct ieee80211_hw * hw)317 static int mm81x_mac_ops_start(struct ieee80211_hw *hw)
318 {
319 struct mm81x *mors = hw->priv;
320
321 mors->started = true;
322 return 0;
323 }
324
mm81x_tx_h_get_max_bw(struct mm81x * mors)325 static int mm81x_tx_h_get_max_bw(struct mm81x *mors)
326 {
327 return MM81X_FW_SUPP(&mors->fw_caps, 8MHZ) ? 8 :
328 MM81X_FW_SUPP(&mors->fw_caps, 4MHZ) ? 4 :
329 MM81X_FW_SUPP(&mors->fw_caps, 2MHZ) ? 2 :
330 1;
331 }
332
mm81x_mac_caps_init(struct mm81x * mors)333 static void mm81x_mac_caps_init(struct mm81x *mors)
334 {
335 struct mm81x_fw_caps *fw_caps = &mors->fw_caps;
336 struct ieee80211_sta_s1g_cap *s1g = &mors_band_s1ghz.s1g_cap;
337
338 #define __FW_CAP_N(_n, _cap, _bit) \
339 do { \
340 if (MM81X_FW_SUPP(fw_caps, _cap)) \
341 s1g->cap[_n] |= (_bit); \
342 } while (0)
343
344 #define FW_CAP0(_cap, _bit) __FW_CAP_N(0, _cap, _bit)
345 #define FW_CAP3(_cap, _bit) __FW_CAP_N(3, _cap, _bit)
346 #define FW_CAP5(_cap, _bit) __FW_CAP_N(5, _cap, _bit)
347 #define FW_CAP6(_cap, _bit) __FW_CAP_N(6, _cap, _bit)
348 #define FW_CAP7(_cap, _bit) __FW_CAP_N(7, _cap, _bit)
349 #define FW_CAP8(_cap, _bit) __FW_CAP_N(8, _cap, _bit)
350 #define FW_CAP9(_cap, _bit) __FW_CAP_N(9, _cap, _bit)
351
352 FW_CAP0(S1G_LONG, S1G_CAP0_S1G_LONG);
353
354 s1g->cap[0] |= S1G_CAP0_SGI_1MHZ;
355 if (MM81X_FW_SUPP(fw_caps, SGI)) {
356 FW_CAP0(2MHZ, S1G_CAP0_SGI_2MHZ);
357 FW_CAP0(4MHZ, S1G_CAP0_SGI_4MHZ);
358 FW_CAP0(8MHZ, S1G_CAP0_SGI_8MHZ);
359 }
360
361 if (MM81X_FW_SUPP(fw_caps, 8MHZ))
362 s1g->cap[0] |= S1G_SUPP_CH_WIDTH_8;
363 else if (MM81X_FW_SUPP(fw_caps, 4MHZ))
364 s1g->cap[0] |= S1G_SUPP_CH_WIDTH_4;
365 else if (MM81X_FW_SUPP(fw_caps, 2MHZ))
366 s1g->cap[0] |= S1G_SUPP_CH_WIDTH_2;
367
368 FW_CAP3(RD_RESPONDER, S1G_CAP3_RD_RESPONDER);
369 FW_CAP3(LONG_MPDU, S1G_CAP3_MAX_MPDU_LEN);
370
371 FW_CAP5(AMSDU, S1G_CAP5_AMSDU);
372 FW_CAP5(AMPDU, S1G_CAP5_AMPDU);
373 FW_CAP5(ASYMMETRIC_BA_SUPPORT, S1G_CAP5_ASYMMETRIC_BA);
374 FW_CAP5(FLOW_CONTROL, S1G_CAP5_FLOW_CONTROL);
375
376 FW_CAP6(OBSS_MITIGATION, S1G_CAP6_OBSS_MITIGATION);
377 FW_CAP6(FRAGMENT_BA, S1G_CAP6_FRAGMENT_BA);
378 FW_CAP6(NDP_PSPOLL, S1G_CAP6_NDP_PS_POLL);
379 FW_CAP6(TXOP_SHARING_IMPLICIT_ACK, S1G_CAP6_TXOP_SHARING_IMP_ACK);
380 FW_CAP6(HTC_VHT_MFB, S1G_CAP6_VHT_LINK_ADAPT);
381
382 FW_CAP7(TACK_AS_PSPOLL, S1G_CAP7_TACK_AS_PS_POLL);
383 FW_CAP7(DUPLICATE_1MHZ, S1G_CAP7_DUP_1MHZ);
384 FW_CAP7(MCS_NEGOTIATION, S1G_CAP7_MCS_NEGOTIATION);
385 FW_CAP7(1MHZ_CONTROL_RESPONSE_PREAMBLE,
386 S1G_CAP7_1MHZ_CTL_RESPONSE_PREAMBLE);
387 FW_CAP7(SECTOR_TRAINING, S1G_CAP7_SECTOR_TRAINING_OPERATION);
388 FW_CAP7(TMP_PS_MODE_SWITCH, S1G_CAP7_TEMP_PS_MODE_SWITCH);
389
390 FW_CAP8(BDT, S1G_CAP8_BDT);
391
392 FW_CAP9(LINK_ADAPTATION_WO_NDP_CMAC,
393 S1G_CAP9_LINK_ADAPT_PER_CONTROL_RESPONSE);
394
395 /* 1SS MCS 9 for Rx / Tx map */
396 s1g->nss_mcs[0] = MM81X_NSS_MCS_BYTE_0;
397 s1g->nss_mcs[1] = MM81X_NSS_MCS_BYTE_1;
398 s1g->nss_mcs[2] = MM81X_NSS_MCS_BYTE_2;
399 s1g->nss_mcs[3] = MM81X_NSS_MCS_BYTE_3;
400 s1g->nss_mcs[4] = MM81X_NSS_MCS_BYTE_4;
401
402 #undef FW_CAP0
403 #undef FW_CAP3
404 #undef FW_CAP5
405 #undef FW_CAP6
406 #undef FW_CAP7
407 #undef FW_CAP8
408 #undef FW_CAP9
409 #undef __FW_CAP_N
410 }
411
mm81x_mac_beacon_irq_enable(struct mm81x_vif * mors_vif,bool enable)412 static void mm81x_mac_beacon_irq_enable(struct mm81x_vif *mors_vif, bool enable)
413 {
414 struct mm81x *mors = mm81x_vif_to_mors(mors_vif);
415 u8 beacon_irq_num = MM81X_INT_BEACON_BASE_NUM + mors_vif->id;
416
417 enable ? set_bit(beacon_irq_num, &mors->beacon_irqs_enabled) :
418 clear_bit(beacon_irq_num, &mors->beacon_irqs_enabled);
419
420 mm81x_hw_irq_enable(mors, beacon_irq_num, enable);
421 }
422
mm81x_beacon_h_fill_tx_info(struct mm81x * mors,struct mm81x_skb_tx_info * tx_info,struct mm81x_vif * mors_vif,int tx_bw_mhz)423 static void mm81x_beacon_h_fill_tx_info(struct mm81x *mors,
424 struct mm81x_skb_tx_info *tx_info,
425 struct mm81x_vif *mors_vif,
426 int tx_bw_mhz)
427 {
428 enum dot11_bandwidth bw_idx =
429 mm81x_ratecode_bw_mhz_to_bw_index(tx_bw_mhz);
430 enum mm81x_rate_preamble pream = MM81X_RATE_PREAMBLE_S1G_SHORT;
431
432 tx_info->flags |=
433 cpu_to_le32(MM81X_TX_CONF_FLAGS_VIF_ID_SET(mors_vif->id));
434
435 if (bw_idx == DOT11_BANDWIDTH_1MHZ)
436 pream = MM81X_RATE_PREAMBLE_S1G_1M;
437
438 tx_info->rates[0].count = 1;
439 tx_info->rates[1].count = 0;
440 tx_info->rates[0].mm81x_ratecode =
441 mm81x_ratecode_init(bw_idx, 0, 0, pream);
442
443 if (mors->fw_flags & MM81X_FW_FLAGS_REPORTS_TX_BEACON_COMPLETION)
444 tx_info->flags |=
445 cpu_to_le32(MM81X_TX_CONF_FLAGS_IMMEDIATE_REPORT);
446 }
447
mm81x_mac_beacon_work(struct work_struct * work)448 static void mm81x_mac_beacon_work(struct work_struct *work)
449 {
450 struct mm81x_vif *mors_vif =
451 from_work(mors_vif, work, u.ap.beacon_work);
452 struct mm81x *mors = mm81x_vif_to_mors(mors_vif);
453 struct mm81x_skbq *mq;
454 struct sk_buff *beacon;
455 struct ieee80211_vif *vif = mm81x_vif_to_ieee80211_vif(mors_vif);
456 struct mm81x_skb_tx_info tx_info = { 0 };
457 int num_bcn_vifs = atomic_read(&mors->num_bcn_vifs);
458
459 mq = mm81x_hif_get_tx_beacon_queue(mors);
460 if (!mq) {
461 dev_err(mors->dev, "no matching beacon Q found");
462 return;
463 }
464
465 if (mm81x_skbq_count(mq) >= num_bcn_vifs) {
466 dev_err(mors->dev,
467 "previous beacon not consumed, dropping req [id:%d]",
468 mors_vif->id);
469 return;
470 }
471
472 beacon = ieee80211_beacon_get(mors->hw, vif, false);
473 if (!beacon)
474 return;
475
476 mm81x_beacon_h_fill_tx_info(mors, &tx_info, mors_vif,
477 cfg80211_chandef_s1g_pri_width(&mors->chandef));
478 mm81x_skbq_skb_tx(mq, &beacon, &tx_info, MM81X_SKB_CHAN_BEACON);
479 }
480
mm81x_mac_beacon_irq_handle(struct mm81x * mors,u32 status)481 void mm81x_mac_beacon_irq_handle(struct mm81x *mors, u32 status)
482 {
483 int vif_id;
484 unsigned long masked_status = (status & mors->beacon_irqs_enabled) >>
485 MM81X_INT_BEACON_BASE_NUM;
486
487 guard(rcu)();
488 for_each_set_bit(vif_id, &masked_status, MM81X_MAX_IF) {
489 struct mm81x_vif *mors_vif;
490 struct ieee80211_vif *vif;
491
492 vif = mm81x_rcu_dereference_vif_id(mors, vif_id, true);
493 if (vif) {
494 mors_vif = ieee80211_vif_to_mors_vif(vif);
495 queue_work(system_bh_wq, &mors_vif->u.ap.beacon_work);
496 }
497 }
498 }
499
mm81x_mac_beacon_init(struct mm81x_vif * mors_vif)500 static void mm81x_mac_beacon_init(struct mm81x_vif *mors_vif)
501 {
502 struct mm81x *mors = mm81x_vif_to_mors(mors_vif);
503
504 INIT_WORK(&mors_vif->u.ap.beacon_work, mm81x_mac_beacon_work);
505 mm81x_mac_beacon_irq_enable(mors_vif, true);
506 atomic_inc(&mors->num_bcn_vifs);
507 }
508
mm81x_hw_scan_h_pack_tlv_hdr(u16 tag,u16 len)509 static struct hw_scan_tlv_hdr mm81x_hw_scan_h_pack_tlv_hdr(u16 tag, u16 len)
510 {
511 struct hw_scan_tlv_hdr hdr = { .tag = cpu_to_le16(tag),
512 .len = cpu_to_le16(len) };
513 return hdr;
514 }
515
mm81x_hw_scan_h_pack_channel(struct ieee80211_channel * chan,u8 pwr_idx)516 static __le32 mm81x_hw_scan_h_pack_channel(struct ieee80211_channel *chan,
517 u8 pwr_idx)
518 {
519 __le32 packed = 0;
520 u32 freq_khz = ieee80211_channel_to_khz(chan);
521
522 packed |= le32_encode_bits(freq_khz, HW_SCAN_CH_LIST_FREQ_KHZ);
523 packed |= le32_encode_bits(mm81x_ratecode_bw_mhz_to_bw_index(1),
524 HW_SCAN_CH_LIST_OP_BW);
525 packed |= le32_encode_bits(mm81x_ratecode_bw_mhz_to_bw_index(1),
526 HW_SCAN_CH_LIST_PRIM_CH_WIDTH);
527 packed |= le32_encode_bits(pwr_idx, HW_SCAN_CH_LIST_PWR_LIST_IDX);
528
529 return packed;
530 }
531
532 static u8 *
mm81x_hw_scan_h_add_channel_list_tlv(u8 * buf,struct mm81x_hw_scan_params * params)533 mm81x_hw_scan_h_add_channel_list_tlv(u8 *buf,
534 struct mm81x_hw_scan_params *params)
535 {
536 int i;
537 struct hw_scan_tlv_channel_list *ch_list =
538 (struct hw_scan_tlv_channel_list *)buf;
539
540 ch_list->hdr = mm81x_hw_scan_h_pack_tlv_hdr(
541 HOST_CMD_HW_SCAN_TLV_TAG_CHAN_LIST,
542 params->num_chans * sizeof(ch_list->channels[0]));
543
544 for (i = 0; i < params->num_chans; i++) {
545 struct ieee80211_channel *chan = params->channels[i].channel;
546
547 ch_list->channels[i] = mm81x_hw_scan_h_pack_channel(
548 chan, params->channels[i].power_idx);
549 }
550
551 return (u8 *)&ch_list->channels[i];
552 }
553
554 static u8 *
mm81x_hw_scan_h_add_power_list_tlv(u8 * buf,struct mm81x_hw_scan_params * params)555 mm81x_hw_scan_h_add_power_list_tlv(u8 *buf, struct mm81x_hw_scan_params *params)
556 {
557 int i;
558 struct hw_scan_tlv_power_list *pwr_list =
559 (struct hw_scan_tlv_power_list *)buf;
560 size_t size = sizeof(pwr_list->tx_power_qdbm[0]) * params->n_powers;
561
562 pwr_list->hdr = mm81x_hw_scan_h_pack_tlv_hdr(
563 HOST_CMD_HW_SCAN_TLV_TAG_POWER_LIST, size);
564
565 for (i = 0; i < params->n_powers; i++)
566 pwr_list->tx_power_qdbm[i] = params->powers_qdbm[i];
567
568 return (u8 *)&pwr_list->tx_power_qdbm[i];
569 }
570
571 static u8 *
mm81x_hw_scan_h_add_probe_req_tlv(u8 * buf,struct mm81x_hw_scan_params * params)572 mm81x_hw_scan_h_add_probe_req_tlv(u8 *buf, struct mm81x_hw_scan_params *params)
573 {
574 struct sk_buff *skb = params->probe_req;
575 struct hw_scan_tlv_probe_req *probe_req =
576 (struct hw_scan_tlv_probe_req *)buf;
577
578 probe_req->hdr = mm81x_hw_scan_h_pack_tlv_hdr(
579 HOST_CMD_HW_SCAN_TLV_TAG_PROBE_REQ, skb->len);
580 memcpy(probe_req->buf, skb->data, skb->len);
581
582 return buf + sizeof(*probe_req) + skb->len;
583 }
584
585 static u8 *
mm81x_hw_scan_h_insert_dwell_time_tlv(u8 * buf,struct mm81x_hw_scan_params * params)586 mm81x_hw_scan_h_insert_dwell_time_tlv(u8 *buf,
587 struct mm81x_hw_scan_params *params)
588 {
589 struct hw_scan_tlv_dwell_on_home *dwell =
590 (struct hw_scan_tlv_dwell_on_home *)buf;
591
592 dwell->hdr = mm81x_hw_scan_h_pack_tlv_hdr(
593 HOST_CMD_HW_SCAN_TLV_TAG_DWELL_ON_HOME,
594 sizeof(*dwell) - sizeof(dwell->hdr));
595 dwell->home_dwell_time_ms = cpu_to_le32(params->dwell_on_home_ms);
596
597 return buf + sizeof(*dwell);
598 }
599
__mm81x_hw_scan_h_init_probe_req(struct mm81x_hw_scan_params * params,u8 * ssid,u8 ssid_len,struct ieee80211_scan_ies * ies)600 static int __mm81x_hw_scan_h_init_probe_req(struct mm81x_hw_scan_params *params,
601 u8 *ssid, u8 ssid_len,
602 struct ieee80211_scan_ies *ies)
603 {
604 u8 *pos;
605 struct sk_buff *probe_req;
606 struct ieee80211_tx_info *info;
607 u16 ies_len = ies->len[NL80211_BAND_S1GHZ] + ies->common_ie_len;
608
609 probe_req = ieee80211_probereq_get(params->hw, params->vif->addr, ssid,
610 ssid_len, ies_len);
611 if (!probe_req)
612 return -ENOMEM;
613
614 pos = skb_put(probe_req, ies_len);
615 memcpy(pos, ies->common_ies, ies->common_ie_len);
616 pos += ies->common_ie_len;
617 memcpy(pos, ies->ies[NL80211_BAND_S1GHZ], ies->len[NL80211_BAND_S1GHZ]);
618
619 info = IEEE80211_SKB_CB(probe_req);
620 info->control.vif = params->vif;
621 params->probe_req = probe_req;
622
623 return 0;
624 }
625
mm81x_hw_scan_h_init_ssid(struct mm81x * mors,struct cfg80211_ssid * ssids,int n_ssids,u8 ** out_ssid,u8 * out_ssid_len)626 static void mm81x_hw_scan_h_init_ssid(struct mm81x *mors,
627 struct cfg80211_ssid *ssids, int n_ssids,
628 u8 **out_ssid, u8 *out_ssid_len)
629 {
630 *out_ssid = NULL;
631 *out_ssid_len = 0;
632
633 if (n_ssids > 0) {
634 if (n_ssids > 1) {
635 dev_warn(
636 mors->dev,
637 "Multiple SSIDs found when only one supported. Using the first only.");
638 }
639 *out_ssid_len = ssids[0].ssid_len;
640 *out_ssid = ssids[0].ssid;
641 }
642 }
643
644 static int
mm81x_hw_scan_h_init_probe_req(struct mm81x_hw_scan_params * params,struct ieee80211_scan_request * scan_req)645 mm81x_hw_scan_h_init_probe_req(struct mm81x_hw_scan_params *params,
646 struct ieee80211_scan_request *scan_req)
647 {
648 struct mm81x *mors = params->hw->priv;
649 struct cfg80211_scan_request *req = &scan_req->req;
650 struct ieee80211_scan_ies *ies = &scan_req->ies;
651 u8 ssid_len = 0;
652 u8 *ssid = NULL;
653
654 mm81x_hw_scan_h_init_ssid(mors, req->ssids, req->n_ssids, &ssid,
655 &ssid_len);
656
657 return __mm81x_hw_scan_h_init_probe_req(params, ssid, ssid_len, ies);
658 }
659
660 static bool
mm81x_hw_scan_h_is_chan_present(const struct mm81x_hw_scan_params * params,const struct ieee80211_channel * chan)661 mm81x_hw_scan_h_is_chan_present(const struct mm81x_hw_scan_params *params,
662 const struct ieee80211_channel *chan)
663 {
664 int channel;
665
666 for (channel = 0; channel < params->num_chans; channel++) {
667 if (params->channels[channel].channel == chan)
668 return true;
669 }
670
671 return false;
672 }
673
mm81x_hw_scan_h_insert_chan(struct mm81x_hw_scan_params * params,struct ieee80211_channel * chan)674 static int mm81x_hw_scan_h_insert_chan(struct mm81x_hw_scan_params *params,
675 struct ieee80211_channel *chan)
676 {
677 if (!params->channels)
678 return -EFAULT;
679
680 if (!chan)
681 return -EFAULT;
682
683 if (params->num_chans >= params->allocated_chans)
684 return -ENOMEM;
685
686 if (mm81x_hw_scan_h_is_chan_present(params, chan))
687 return 0;
688
689 params->channels[params->num_chans].channel = chan;
690 params->num_chans++;
691 return 0;
692 }
693
mm81x_hw_scan_h_init_chan_list(struct mm81x_hw_scan_params * params,struct ieee80211_channel ** chans,u32 n_channels)694 static int mm81x_hw_scan_h_init_chan_list(struct mm81x_hw_scan_params *params,
695 struct ieee80211_channel **chans,
696 u32 n_channels)
697 {
698 int i, j;
699 int num_pwrs_coarse = 0;
700 int last_pwr = INT_MIN;
701 int chans_to_allocate = 0;
702
703 for (i = 0; i < n_channels; i++)
704 if (chans[i])
705 chans_to_allocate++;
706
707 params->num_chans = 0;
708 params->allocated_chans = 0;
709 params->channels = kcalloc(chans_to_allocate, sizeof(*params->channels),
710 GFP_KERNEL);
711 if (!params->channels)
712 return -ENOMEM;
713
714 params->allocated_chans = chans_to_allocate;
715
716 for (i = 0; i < n_channels; i++)
717 if (chans[i])
718 mm81x_hw_scan_h_insert_chan(params, chans[i]);
719
720 /*
721 * Calculate a rough estimate of number of different channel
722 * powers required
723 */
724 for (i = 0; i < params->num_chans; i++) {
725 if (chans[i]->max_reg_power != last_pwr) {
726 last_pwr = chans[i]->max_reg_power;
727 num_pwrs_coarse++;
728 }
729 }
730
731 params->powers_qdbm = kmalloc_array(
732 num_pwrs_coarse, sizeof(*params->powers_qdbm), GFP_KERNEL);
733 if (!params->powers_qdbm)
734 return -ENOMEM;
735
736 params->n_powers = 0;
737
738 for (i = 0; i < params->num_chans; i++) {
739 s32 power_qdbm =
740 MBM_TO_QDBM(DBM_TO_MBM(chans[i]->max_reg_power));
741
742 /* Try and find the power in the list */
743 for (j = 0; j < params->n_powers; j++)
744 if (params->powers_qdbm[j] == power_qdbm)
745 break;
746
747 /* Reached the end of the list - add the new power option */
748 if (j == params->n_powers) {
749 params->powers_qdbm[j] = power_qdbm;
750 params->n_powers++;
751 if (params->n_powers > num_pwrs_coarse) {
752 WARN_ON(1);
753 return -EFAULT;
754 }
755 }
756
757 /* Give the index of the power level to the channel */
758 params->channels[i].power_idx = j;
759 }
760 return 0;
761 }
762
mm81x_hw_scan_h_clean_params(struct mm81x_hw_scan_params * params)763 static void mm81x_hw_scan_h_clean_params(struct mm81x_hw_scan_params *params)
764 {
765 if (params->probe_req)
766 dev_kfree_skb_any(params->probe_req);
767 kfree(params->channels);
768 kfree(params->powers_qdbm);
769
770 params->num_chans = 0;
771 params->allocated_chans = 0;
772 }
773
mm81x_hw_scan_h_get_cmd_size(struct mm81x_hw_scan_params * params)774 size_t mm81x_hw_scan_h_get_cmd_size(struct mm81x_hw_scan_params *params)
775 {
776 struct hw_scan_tlv_channel_list *ch_list;
777 struct hw_scan_tlv_power_list *pwr_list;
778 struct hw_scan_tlv_probe_req *probe_req;
779 struct hw_scan_tlv_dwell_on_home *dwell;
780 struct host_cmd_req_hw_scan *req;
781 size_t cmd_size = sizeof(*req);
782
783 /* No TLVs if simple abort command */
784 if (params->operation != MM81X_HW_SCAN_OP_START)
785 return cmd_size;
786
787 cmd_size += struct_size(ch_list, channels, params->num_chans);
788 cmd_size += struct_size(pwr_list, tx_power_qdbm, params->n_powers);
789
790 if (params->probe_req)
791 cmd_size += struct_size(probe_req, buf, params->probe_req->len);
792 if (params->dwell_on_home_ms)
793 cmd_size += sizeof(*dwell);
794
795 return cmd_size;
796 }
797
mm81x_hw_scan_h_insert_tlvs(struct mm81x_hw_scan_params * params,u8 * buf)798 u8 *mm81x_hw_scan_h_insert_tlvs(struct mm81x_hw_scan_params *params, u8 *buf)
799 {
800 buf = mm81x_hw_scan_h_add_channel_list_tlv(buf, params);
801 buf = mm81x_hw_scan_h_add_power_list_tlv(buf, params);
802
803 if (params->dwell_on_home_ms)
804 buf = mm81x_hw_scan_h_insert_dwell_time_tlv(buf, params);
805 if (params->probe_req)
806 buf = mm81x_hw_scan_h_add_probe_req_tlv(buf, params);
807
808 return buf;
809 }
810
mm81x_hw_scan_h_get_dwell_on_home(struct mm81x * mors,struct ieee80211_vif * vif)811 static u32 mm81x_hw_scan_h_get_dwell_on_home(struct mm81x *mors,
812 struct ieee80211_vif *vif)
813 {
814 if (vif->type == NL80211_IFTYPE_STATION && vif->cfg.assoc)
815 return mors->hw_scan.home_dwell_ms;
816 return 0;
817 }
818
819 static struct mm81x_hw_scan_params *
__mm81x_hw_scan_h_init_params(struct mm81x * mors)820 __mm81x_hw_scan_h_init_params(struct mm81x *mors)
821 {
822 struct mm81x_hw_scan_params *params = mors->hw_scan.params;
823
824 if (!params) {
825 params = kzalloc_obj(*params, GFP_KERNEL);
826 if (params)
827 mors->hw_scan.params = params;
828 } else {
829 mm81x_hw_scan_h_clean_params(params);
830 memset(params, 0, sizeof(*params));
831 }
832
833 return params;
834 }
835
mm81x_hw_scan_h_init_params(struct mm81x * mors,struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct cfg80211_scan_request * req)836 static int mm81x_hw_scan_h_init_params(struct mm81x *mors,
837 struct ieee80211_hw *hw,
838 struct ieee80211_vif *vif,
839 struct cfg80211_scan_request *req)
840 {
841 struct mm81x_hw_scan_params *params = mors->hw_scan.params;
842
843 params = __mm81x_hw_scan_h_init_params(mors);
844 if (!params) {
845 mors->hw_scan.state = HW_SCAN_STATE_IDLE;
846 return -ENOMEM;
847 }
848
849 params->hw = hw;
850 params->vif = vif;
851 params->has_directed_ssid = (req->ssids && req->ssids[0].ssid_len > 0);
852 params->operation = MM81X_HW_SCAN_OP_START;
853 params->dwell_on_home_ms = mm81x_hw_scan_h_get_dwell_on_home(mors, vif);
854
855 if (req->duration)
856 params->dwell_time_ms = MM81X_TU_TO_MS(req->duration);
857 else if (req->n_ssids == 0)
858 params->dwell_time_ms =
859 MM81X_HWSCAN_DEFAULT_PASSIVE_DWELL_TIME_MS;
860 else
861 params->dwell_time_ms = MM81X_HWSCAN_DEFAULT_DWELL_TIME_MS;
862
863 return 0;
864 }
865
mm81x_hw_scan_h_calc_timeout(struct mm81x_hw_scan_params * params)866 static u32 mm81x_hw_scan_h_calc_timeout(struct mm81x_hw_scan_params *params)
867 {
868 u32 ret = 0;
869
870 ret = params->dwell_time_ms + params->dwell_on_home_ms;
871 if (params->probe_req)
872 ret += MM81X_HWSCAN_PROBE_DELAY_MS;
873
874 ret *= params->num_chans;
875 ret += MM81X_HWSCAN_TIMEOUT_OVERHEAD_MS;
876
877 return ret;
878 }
879
mm81x_mac_ops_hw_scan(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_scan_request * hw_req)880 static int mm81x_mac_ops_hw_scan(struct ieee80211_hw *hw,
881 struct ieee80211_vif *vif,
882 struct ieee80211_scan_request *hw_req)
883 {
884 int ret = 0;
885 struct mm81x *mors = hw->priv;
886 struct cfg80211_scan_request *req = &hw_req->req;
887 struct mm81x_hw_scan_params *params;
888 struct ieee80211_channel **chans = hw_req->req.channels;
889
890 dev_dbg(mors->dev, "state %d", mors->hw_scan.state);
891
892 if (!mors->started) {
893 dev_warn(mors->dev, "device not ready");
894 ret = -ENODEV;
895 goto exit;
896 }
897
898 switch (mors->hw_scan.state) {
899 case HW_SCAN_STATE_IDLE:
900 mors->hw_scan.state = HW_SCAN_STATE_RUNNING;
901 reinit_completion(&mors->hw_scan.scan_done);
902 break;
903 case HW_SCAN_STATE_RUNNING:
904 case HW_SCAN_STATE_ABORTING:
905 ret = -EBUSY;
906 goto exit;
907 }
908
909 ret = mm81x_hw_scan_h_init_params(mors, hw, vif, req);
910 if (ret)
911 goto exit;
912
913 params = mors->hw_scan.params;
914
915 ret = mm81x_hw_scan_h_init_chan_list(params, chans,
916 hw_req->req.n_channels);
917 if (ret)
918 goto exit;
919
920 /* Only init the probe request template if this is an active scan */
921 if (req->n_ssids > 0) {
922 ret = mm81x_hw_scan_h_init_probe_req(params, hw_req);
923 if (ret) {
924 dev_err(mors->dev, "Failed to init probe req %d", ret);
925 goto exit;
926 }
927 }
928
929 ret = mm81x_cmd_hw_scan(mors, params, false);
930 if (ret) {
931 mors->hw_scan.state = HW_SCAN_STATE_IDLE;
932 goto exit;
933 }
934
935 ieee80211_queue_delayed_work(
936 mors->hw, &mors->hw_scan.timeout,
937 msecs_to_jiffies(mm81x_hw_scan_h_calc_timeout(params)));
938 exit:
939 return ret;
940 }
941
mm81x_hw_scan_abort(struct mm81x * mors)942 static void mm81x_hw_scan_abort(struct mm81x *mors)
943 {
944 int ret;
945 struct mm81x_hw_scan_params params = { 0 };
946
947 switch (mors->hw_scan.state) {
948 case HW_SCAN_STATE_IDLE:
949 case HW_SCAN_STATE_ABORTING:
950 /* scan not running */
951 return;
952 case HW_SCAN_STATE_RUNNING:
953 mors->hw_scan.state = HW_SCAN_STATE_ABORTING;
954 break;
955 }
956
957 params.operation = MM81X_HW_SCAN_OP_STOP;
958
959 ret = mm81x_cmd_hw_scan(mors, ¶ms, false);
960
961 if (ret || !mors->started ||
962 !wait_for_completion_timeout(&mors->hw_scan.scan_done, 1 * HZ)) {
963 /*
964 * We may have lost the event on the bus, the chip could be
965 * wedged, or the cmd failed for another reason. Nevertheless,
966 * we should call the done event so mac80211 knows to unblock
967 * itself.
968 */
969 struct cfg80211_scan_info info = { .aborted = true };
970
971 ieee80211_scan_completed(mors->hw, &info);
972 mors->hw_scan.state = HW_SCAN_STATE_IDLE;
973 }
974 }
975
mm81x_mac_ops_cancel_hw_scan(struct ieee80211_hw * hw,struct ieee80211_vif * vif)976 static void mm81x_mac_ops_cancel_hw_scan(struct ieee80211_hw *hw,
977 struct ieee80211_vif *vif)
978 {
979 struct mm81x *mors = hw->priv;
980
981 cancel_delayed_work_sync(&mors->hw_scan.timeout);
982 mm81x_hw_scan_abort(mors);
983 }
984
mm81x_mac_hw_scan_done_event(struct ieee80211_hw * hw)985 static void mm81x_mac_hw_scan_done_event(struct ieee80211_hw *hw)
986 {
987 struct mm81x *mors = hw->priv;
988 struct cfg80211_scan_info info = { 0 };
989
990 dev_dbg(mors->dev, "completing hw scan");
991
992 switch (mors->hw_scan.state) {
993 case HW_SCAN_STATE_IDLE:
994 /* Scan has already been stopped. Just continue */
995 goto exit;
996 case HW_SCAN_STATE_RUNNING:
997 case HW_SCAN_STATE_ABORTING:
998 info.aborted = (mors->hw_scan.state == HW_SCAN_STATE_ABORTING);
999 mors->hw_scan.state = HW_SCAN_STATE_IDLE;
1000 }
1001
1002 ieee80211_scan_completed(mors->hw, &info);
1003 exit:
1004 complete(&mors->hw_scan.scan_done);
1005 cancel_delayed_work_sync(&mors->hw_scan.timeout);
1006 }
1007
mm81x_mac_hw_scan_timeout_work(struct work_struct * work)1008 static void mm81x_mac_hw_scan_timeout_work(struct work_struct *work)
1009 {
1010 struct mm81x *mors =
1011 container_of(work, struct mm81x, hw_scan.timeout.work);
1012
1013 dev_err(mors->dev, "hw scan timed out, aborting");
1014 mm81x_hw_scan_abort(mors);
1015 }
1016
mm81x_mac_hw_scan_init(struct mm81x * mors)1017 static void mm81x_mac_hw_scan_init(struct mm81x *mors)
1018 {
1019 mors->hw_scan.state = HW_SCAN_STATE_IDLE;
1020 mors->hw_scan.params = NULL;
1021 mors->hw_scan.home_dwell_ms = MM81X_HWSCAN_DEFAULT_DWELL_ON_HOME_MS;
1022
1023 init_completion(&mors->hw_scan.scan_done);
1024 INIT_DELAYED_WORK(&mors->hw_scan.timeout,
1025 mm81x_mac_hw_scan_timeout_work);
1026 }
1027
mm81x_mac_hw_scan_destroy(struct mm81x * mors)1028 static void mm81x_mac_hw_scan_destroy(struct mm81x *mors)
1029 {
1030 cancel_delayed_work_sync(&mors->hw_scan.timeout);
1031 if (mors->hw_scan.params)
1032 mm81x_hw_scan_h_clean_params(mors->hw_scan.params);
1033 kfree(mors->hw_scan.params);
1034 mors->hw_scan.params = NULL;
1035 }
1036
mm81x_mac_hw_scan_finish(struct mm81x * mors)1037 static void mm81x_mac_hw_scan_finish(struct mm81x *mors)
1038 {
1039 struct cfg80211_scan_info info = {
1040 .aborted = true,
1041 };
1042
1043 if (mors->hw_scan.state == HW_SCAN_STATE_IDLE)
1044 return;
1045
1046 ieee80211_scan_completed(mors->hw, &info);
1047 complete(&mors->hw_scan.scan_done);
1048 mors->hw_scan.state = HW_SCAN_STATE_IDLE;
1049 cancel_delayed_work_sync(&mors->hw_scan.timeout);
1050 }
1051
mm81x_mac_event_recv(struct mm81x * mors,struct sk_buff * skb)1052 int mm81x_mac_event_recv(struct mm81x *mors, struct sk_buff *skb)
1053 {
1054 struct host_cmd_event *event = (struct host_cmd_event *)(skb->data);
1055 u16 event_id = le16_to_cpu(event->hdr.message_id);
1056 u16 event_iid = le16_to_cpu(event->hdr.host_id);
1057 u16 vif_id = le16_to_cpu(event->hdr.vif_id);
1058 struct ieee80211_vif *vif;
1059
1060 if (!HOST_CMD_IS_EVT(event) || event_iid != 0)
1061 return -EINVAL;
1062
1063 switch (event_id) {
1064 case HOST_CMD_ID_EVT_HW_SCAN_DONE:
1065 dev_dbg(mors->dev,
1066 "Event: HOST_CMD_ID_EVT_HW_SCAN_DONE Received.");
1067 mm81x_mac_hw_scan_done_event(mors->hw);
1068 break;
1069 case HOST_CMD_ID_EVT_BEACON_LOSS:
1070 dev_dbg(mors->dev,
1071 "Event: HOST_CMD_ID_EVT_BEACON_LOSS Received");
1072 scoped_guard(rcu) {
1073 vif = mm81x_rcu_dereference_vif_id(mors, vif_id, true);
1074 if (vif)
1075 ieee80211_beacon_loss(vif);
1076 }
1077 break;
1078 default:
1079 break;
1080 }
1081
1082 return 0;
1083 }
1084
mm81x_tx_h_apply_mcs10(struct mm81x * mors,struct mm81x_skb_tx_info * tx_info)1085 static void mm81x_tx_h_apply_mcs10(struct mm81x *mors,
1086 struct mm81x_skb_tx_info *tx_info)
1087 {
1088 u8 i;
1089 u8 j;
1090 int mcs0_first_idx = -1;
1091 int mcs0_last_idx = -1;
1092
1093 /* Find out where our first and last MCS0 entries are. */
1094 for (i = 0; i < IEEE80211_TX_MAX_RATES; i++) {
1095 enum dot11_bandwidth bw_idx = mm81x_ratecode_bw_index_get(
1096 tx_info->rates[i].mm81x_ratecode);
1097
1098 if (bw_idx == DOT11_BANDWIDTH_1MHZ) {
1099 mcs0_last_idx = i;
1100 if (mcs0_first_idx == -1)
1101 mcs0_first_idx = i;
1102 }
1103
1104 /*
1105 * If the count is 0 then we are at the end of the table.
1106 * Break to allow us to reuse i indicating the end of the
1107 * table.
1108 */
1109 if (tx_info->rates[i].count == 0)
1110 break;
1111 }
1112
1113 /* If there aren't any MCS0 (at 1MHz) entries we are done. */
1114 if (mcs0_first_idx < 0)
1115 return;
1116
1117 /*
1118 * If we are in MCS10_MODE_AUTO add MCS10 counts to the table if they
1119 * will fit. There should be three cases:
1120 *
1121 * - There is one MSC0 entry and the table is full -> do nothing
1122 * - There is one MSC0 entry and the table has space -> adjust MSC0
1123 * down and add MCS 10
1124 * - There are multiple MCS0 entries -> replace entries after the first
1125 * with MCS 10
1126 */
1127 /* Case 3 - replace additional entries. */
1128 if (mcs0_last_idx > mcs0_first_idx) {
1129 for (j = mcs0_first_idx + 1; j < i; j++) {
1130 enum dot11_bandwidth bw_idx =
1131 mm81x_ratecode_bw_index_get(
1132 tx_info->rates[j].mm81x_ratecode);
1133 u8 mcs_index = mm81x_ratecode_mcs_index_get(
1134 tx_info->rates[j].mm81x_ratecode);
1135 if (mcs_index == 0 && bw_idx == DOT11_BANDWIDTH_1MHZ) {
1136 mm81x_ratecode_mcs_index_set(
1137 &tx_info->rates[j].mm81x_ratecode, 10);
1138 }
1139 }
1140 /* Case 2 - add additional MCS10 entry. */
1141 } else if (mcs0_last_idx == mcs0_first_idx &&
1142 i < (IEEE80211_TX_MAX_RATES)) {
1143 int pre_mcs10_mcs0_count =
1144 min_t(u8, tx_info->rates[mcs0_last_idx].count,
1145 MCS0_BEFORE_MCS10_COUNT);
1146 int mcs10_count = tx_info->rates[mcs0_last_idx].count -
1147 pre_mcs10_mcs0_count;
1148
1149 /*
1150 * If there were less retries than our desired minimum MCS0 we
1151 * don't add MCS10 retries.
1152 */
1153 if (mcs10_count > 0) {
1154 /* Use the same flags for MCS10 as MCS0. */
1155 tx_info->rates[i].mm81x_ratecode =
1156 tx_info->rates[mcs0_last_idx].mm81x_ratecode;
1157 mm81x_ratecode_mcs_index_set(
1158 &tx_info->rates[i].mm81x_ratecode, 10);
1159 tx_info->rates[mcs0_last_idx].count =
1160 pre_mcs10_mcs0_count;
1161 tx_info->rates[i].count = mcs10_count;
1162 }
1163 }
1164 }
1165
mm81x_tx_h_check_aggr(struct ieee80211_sta * pubsta,struct sk_buff * skb)1166 void mm81x_tx_h_check_aggr(struct ieee80211_sta *pubsta, struct sk_buff *skb)
1167 {
1168 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1169 struct mm81x_sta *mors_sta = (struct mm81x_sta *)pubsta->drv_priv;
1170 u8 tid = ieee80211_get_tid(hdr);
1171
1172 /* we are already aggregating */
1173 if (mors_sta->tid_tx[tid] || mors_sta->tid_start_tx[tid])
1174 return;
1175
1176 if (mors_sta->state < IEEE80211_STA_AUTHORIZED)
1177 return;
1178
1179 if (skb_get_queue_mapping(skb) == IEEE80211_AC_VO)
1180 return;
1181
1182 if (unlikely(!ieee80211_is_data_qos(hdr->frame_control)))
1183 return;
1184
1185 if (unlikely(skb->protocol == cpu_to_be16(ETH_P_PAE)))
1186 return;
1187
1188 mors_sta->tid_start_tx[tid] = true;
1189 ieee80211_start_tx_ba_session(pubsta, tid, 0);
1190 }
1191
mm81x_tx_h_get_attempts(struct mm81x * mors,struct mm81x_skb_tx_status * tx_sts)1192 int mm81x_tx_h_get_attempts(struct mm81x *mors,
1193 struct mm81x_skb_tx_status *tx_sts)
1194 {
1195 int attempts = 0;
1196 int i;
1197 int count = min_t(int, MM81X_SKB_MAX_RATES, IEEE80211_TX_MAX_RATES);
1198
1199 for (i = 0; i < count; i++) {
1200 if (tx_sts->rates[i].count > 0)
1201 attempts += tx_sts->rates[i].count;
1202 else
1203 break;
1204 }
1205
1206 return attempts;
1207 }
1208
mm81x_tx_h_fill_info(struct mm81x * mors,struct mm81x_skb_tx_info * tx_info,struct sk_buff * skb,struct ieee80211_vif * vif,int tx_bw_mhz,struct ieee80211_sta * sta)1209 static void mm81x_tx_h_fill_info(struct mm81x *mors,
1210 struct mm81x_skb_tx_info *tx_info,
1211 struct sk_buff *skb, struct ieee80211_vif *vif,
1212 int tx_bw_mhz, struct ieee80211_sta *sta)
1213 {
1214 int i;
1215 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1216 struct mm81x_vif *mors_vif = ieee80211_vif_to_mors_vif(vif);
1217 struct mm81x_sta *mors_sta = NULL;
1218 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1219 int op_bw_mhz = cfg80211_chandef_get_width(&mors->chandef);
1220 u8 tid = skb->priority & IEEE80211_QOS_CTL_TAG1D_MASK;
1221 bool rts_allowed = op_bw_mhz < 8;
1222
1223 if (sta)
1224 mors_sta = (struct mm81x_sta *)sta->drv_priv;
1225
1226 rts_allowed &= mm81x_tx_h_pkt_over_rts_threshold(mors, info, skb);
1227
1228 mm81x_rc_sta_fill_tx_rates(mors, tx_info, skb, sta, tx_bw_mhz,
1229 rts_allowed);
1230
1231 for (i = 0; i < IEEE80211_TX_MAX_RATES; i++) {
1232 if (rts_allowed)
1233 mm81x_ratecode_enable_rts(
1234 &tx_info->rates[i].mm81x_ratecode);
1235
1236 if (info->control.rates[i].flags & IEEE80211_TX_RC_SHORT_GI)
1237 mm81x_ratecode_enable_sgi(
1238 &tx_info->rates[i].mm81x_ratecode);
1239 }
1240
1241 /* Apply change of MCS0 to MCS10 if required. */
1242 mm81x_tx_h_apply_mcs10(mors, tx_info);
1243
1244 tx_info->flags |=
1245 cpu_to_le32(MM81X_TX_CONF_FLAGS_VIF_ID_SET(mors_vif->id));
1246
1247 if (info->flags & IEEE80211_TX_CTL_AMPDU)
1248 tx_info->flags |= cpu_to_le32(MM81X_TX_CONF_FLAGS_CTL_AMPDU);
1249
1250 if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM)
1251 tx_info->flags |=
1252 cpu_to_le32(MM81X_TX_CONF_FLAGS_SEND_AFTER_DTIM);
1253
1254 if (info->flags & IEEE80211_TX_CTL_NO_PS_BUFFER) {
1255 tx_info->flags |= cpu_to_le32(MM81X_TX_CONF_NO_PS_BUFFER);
1256
1257 if (info->flags & IEEE80211_TX_STATUS_EOSP)
1258 tx_info->flags |= cpu_to_le32(
1259 MM81X_TX_CONF_FLAGS_IMMEDIATE_REPORT);
1260 } else if (ieee80211_is_mgmt(hdr->frame_control) &&
1261 !ieee80211_is_bufferable_mmpdu(skb)) {
1262 tx_info->flags |= cpu_to_le32(MM81X_TX_CONF_NO_PS_BUFFER);
1263 }
1264
1265 if (info->control.hw_key) {
1266 tx_info->flags |= cpu_to_le32(MM81X_TX_CONF_FLAGS_HW_ENCRYPT);
1267 tx_info->flags |= cpu_to_le32(MM81X_TX_CONF_FLAGS_KEY_IDX_SET(
1268 info->control.hw_key->hw_key_idx));
1269 }
1270
1271 tx_info->tid = tid;
1272 if (mors_sta) {
1273 tx_info->tid_params = mors_sta->tid_params[tid];
1274
1275 if (info->flags & IEEE80211_TX_CTL_CLEAR_PS_FILT) {
1276 if (mors_sta->tx_ps_filter_en)
1277 dev_dbg(mors->dev,
1278 "TX ps filter cleared sta[%pM]",
1279 mors_sta->addr);
1280 mors_sta->tx_ps_filter_en = false;
1281 }
1282 }
1283 }
1284
mm81x_mac_ops_tx(struct ieee80211_hw * hw,struct ieee80211_tx_control * control,struct sk_buff * skb)1285 static void mm81x_mac_ops_tx(struct ieee80211_hw *hw,
1286 struct ieee80211_tx_control *control,
1287 struct sk_buff *skb)
1288 {
1289 struct mm81x *mors = hw->priv;
1290 struct mm81x_skbq *mq = NULL;
1291 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1292 struct ieee80211_vif *vif = info->control.vif;
1293 struct mm81x_skb_tx_info tx_info = { 0 };
1294 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1295 bool is_mgmt = ieee80211_is_mgmt(hdr->frame_control);
1296 int tx_bw_mhz = cfg80211_chandef_get_width(&mors->chandef);
1297 struct ieee80211_sta *sta = control->sta;
1298 int max_tx_bw = 0, sta_max_bw_mhz = 0;
1299
1300 if (sta) {
1301 struct mm81x_sta *mors_sta = (struct mm81x_sta *)sta->drv_priv;
1302
1303 sta_max_bw_mhz = mors_sta->max_bw_mhz;
1304 }
1305
1306 max_tx_bw = mm81x_tx_h_get_max_bw(mors);
1307 tx_bw_mhz = min(max_tx_bw, tx_bw_mhz);
1308
1309 if (is_mgmt)
1310 tx_bw_mhz = cfg80211_chandef_s1g_pri_width(&mors->chandef);
1311 if (sta_max_bw_mhz)
1312 tx_bw_mhz = min(tx_bw_mhz, sta_max_bw_mhz);
1313 if (ieee80211_is_probe_resp(hdr->frame_control))
1314 tx_bw_mhz = 1;
1315
1316 mm81x_tx_h_fill_info(mors, &tx_info, skb, vif, tx_bw_mhz, sta);
1317
1318 if (mm81x_tx_h_ps_filtered_for_sta(mors, skb, sta))
1319 return;
1320
1321 if (is_mgmt)
1322 mq = mm81x_hif_get_tx_mgmt_queue(mors);
1323 else
1324 mq = mm81x_hif_get_tx_data_queue(mors,
1325 dot11_tid_to_ac(tx_info.tid));
1326
1327 mm81x_skbq_skb_tx(mq, &skb, &tx_info,
1328 (is_mgmt) ? MM81X_SKB_CHAN_MGMT :
1329 MM81X_SKB_CHAN_DATA);
1330 }
1331
mm81x_mac_ops_stop(struct ieee80211_hw * hw,bool suspend)1332 static void mm81x_mac_ops_stop(struct ieee80211_hw *hw, bool suspend)
1333 {
1334 struct mm81x *mors = hw->priv;
1335
1336 mors->started = false;
1337 }
1338
mm81x_mac_beacon_finish(struct mm81x_vif * mors_vif)1339 static void mm81x_mac_beacon_finish(struct mm81x_vif *mors_vif)
1340 {
1341 struct mm81x *mors = mm81x_vif_to_mors(mors_vif);
1342
1343 mm81x_mac_beacon_irq_enable(mors_vif, false);
1344 cancel_work_sync(&mors_vif->u.ap.beacon_work);
1345 /*
1346 * Side effect of the restarting required when
1347 * reacting to regdom changes...
1348 */
1349 atomic_add_unless(&mors->num_bcn_vifs, -1, 0);
1350 }
1351
mm81x_mac_ops_remove_interface(struct ieee80211_hw * hw,struct ieee80211_vif * vif)1352 static void mm81x_mac_ops_remove_interface(struct ieee80211_hw *hw,
1353 struct ieee80211_vif *vif)
1354 {
1355 int ret;
1356 struct mm81x *mors = hw->priv;
1357 struct mm81x_vif *mors_vif = (struct mm81x_vif *)vif->drv_priv;
1358
1359 ret = mm81x_cmd_rm_if(mors, mors_vif->id);
1360 if (ret)
1361 dev_err(mors->dev, "mm81x_cmd_rm_if failed %d", ret);
1362
1363 RCU_INIT_POINTER(mors->vifs[mors_vif->id], NULL);
1364 }
1365
mm81x_mac_get_max_txpower(struct mm81x * mors)1366 static s32 mm81x_mac_get_max_txpower(struct mm81x *mors)
1367 {
1368 int ret;
1369 s32 power_mbm;
1370
1371 /* Retrieve maximum TX power the chip can transmit */
1372 ret = mm81x_cmd_get_max_txpower(mors, &power_mbm);
1373 if (ret) {
1374 dev_err(mors->dev, "using default tx max power %d mBm",
1375 MAX_TX_POWER_MBM);
1376 return MAX_TX_POWER_MBM;
1377 }
1378
1379 dev_dbg(mors->dev, "Max tx power detected %d mBm", power_mbm);
1380 return power_mbm;
1381 }
1382
mm81x_mac_set_txpower(struct mm81x * mors,s32 power_mbm)1383 static s32 mm81x_mac_set_txpower(struct mm81x *mors, s32 power_mbm)
1384 {
1385 int ret;
1386 s32 out_power_mbm;
1387
1388 if (mors->tx_max_power_mbm == INT_MAX)
1389 mors->tx_max_power_mbm = mm81x_mac_get_max_txpower(mors);
1390
1391 power_mbm = min(power_mbm, mors->tx_max_power_mbm);
1392 if (power_mbm == mors->tx_power_mbm)
1393 return mors->tx_power_mbm;
1394
1395 ret = mm81x_cmd_set_txpower(mors, &out_power_mbm, power_mbm);
1396 if (ret) {
1397 dev_err(mors->dev, "failed, power %d mBm ret %d", power_mbm,
1398 ret);
1399 return mors->tx_power_mbm;
1400 }
1401
1402 if (out_power_mbm != mors->tx_power_mbm) {
1403 dev_dbg(mors->dev, "%d -> %d mBm", mors->tx_power_mbm,
1404 out_power_mbm);
1405 mors->tx_power_mbm = out_power_mbm;
1406 }
1407
1408 return mors->tx_power_mbm;
1409 }
1410
mm81x_mac_set_channel(struct mm81x * mors,u32 op_chan_freq_hz,u8 pri_1mhz_chan_idx,u8 op_bw_mhz,u8 pri_bw_mhz)1411 static int mm81x_mac_set_channel(struct mm81x *mors, u32 op_chan_freq_hz,
1412 u8 pri_1mhz_chan_idx, u8 op_bw_mhz,
1413 u8 pri_bw_mhz)
1414 {
1415 int ret;
1416
1417 ret = mm81x_cmd_set_channel(mors, op_chan_freq_hz, pri_1mhz_chan_idx,
1418 op_bw_mhz, pri_bw_mhz, &mors->tx_power_mbm);
1419 if (ret) {
1420 dev_err(mors->dev, "mm81x_cmd_set_channel() failed, ret %d",
1421 ret);
1422 return ret;
1423 }
1424
1425 mm81x_mac_set_txpower(mors, mors->tx_power_mbm);
1426 return 0;
1427 }
1428
mm81x_mac_pri_chan_to_index(const struct cfg80211_chan_def * chandef)1429 static u8 mm81x_mac_pri_chan_to_index(const struct cfg80211_chan_def *chandef)
1430 {
1431 u32 bw_mhz = cfg80211_chandef_get_width(chandef);
1432 u32 op_center_khz = ieee80211_chandef_to_khz(chandef);
1433 u32 first_1mhz_center_khz = op_center_khz - (bw_mhz * 500) + 500;
1434 u32 pri_1mhz_khz = ieee80211_channel_to_khz(chandef->chan);
1435
1436 return (pri_1mhz_khz - first_1mhz_center_khz) / 1000;
1437 }
1438
mm81x_mac_ops_change_channel(struct ieee80211_hw * hw,struct cfg80211_chan_def * chandef)1439 static int mm81x_mac_ops_change_channel(struct ieee80211_hw *hw,
1440 struct cfg80211_chan_def *chandef)
1441 {
1442 int ret;
1443 struct mm81x *mors = hw->priv;
1444 u64 freq_hz = KHZ_TO_HZ(ieee80211_chandef_to_khz(chandef));
1445 u8 op_bw_mhz = cfg80211_chandef_get_width(chandef);
1446 u8 pri_1mhz_idx = mm81x_mac_pri_chan_to_index(chandef);
1447 int pri_chan_width_mhz = cfg80211_chandef_s1g_pri_width(chandef);
1448
1449 dev_dbg(mors->dev, "ch: freq=%llu Hz bw=%u pri_idx=%d pri_bw=%d",
1450 freq_hz, op_bw_mhz, pri_1mhz_idx, pri_chan_width_mhz);
1451
1452 ret = mm81x_mac_set_channel(mors, freq_hz, (u8)pri_1mhz_idx, op_bw_mhz,
1453 pri_chan_width_mhz);
1454 if (ret)
1455 return ret;
1456
1457 memcpy(&mors->chandef, chandef, sizeof(mors->chandef));
1458 return 0;
1459 }
1460
mm81x_mac_ops_config(struct ieee80211_hw * hw,int radio_idx,u32 changed)1461 static int mm81x_mac_ops_config(struct ieee80211_hw *hw, int radio_idx,
1462 u32 changed)
1463 {
1464 int ret;
1465 struct mm81x *mors = hw->priv;
1466 struct ieee80211_conf *conf = &hw->conf;
1467 struct ieee80211_channel *channel = conf->chandef.chan;
1468
1469 if (!mors->started)
1470 return 0;
1471
1472 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1473 ret = mm81x_mac_ops_change_channel(hw, &conf->chandef);
1474 if (ret < 0)
1475 return ret;
1476 }
1477
1478 if ((changed & IEEE80211_CONF_CHANGE_POWER) &&
1479 !(changed & IEEE80211_CONF_CHANGE_CHANNEL) &&
1480 !(conf->flags & IEEE80211_CONF_MONITOR)) {
1481 s32 power_mbm = DBM_TO_MBM(conf->power_level);
1482
1483 power_mbm = min(DBM_TO_MBM(channel->max_reg_power), power_mbm);
1484 power_mbm = mm81x_mac_set_txpower(mors, power_mbm);
1485 conf->power_level = MBM_TO_DBM(power_mbm);
1486 }
1487
1488 return 0;
1489 }
1490
mm81x_mac_ops_get_txpower(struct ieee80211_hw * hw,struct ieee80211_vif * vif,unsigned int link_id,int * dbm)1491 static int mm81x_mac_ops_get_txpower(struct ieee80211_hw *hw,
1492 struct ieee80211_vif *vif,
1493 unsigned int link_id, int *dbm)
1494 {
1495 struct mm81x *mors = hw->priv;
1496 struct ieee80211_chanctx_conf *chanctx_conf;
1497 struct cfg80211_chan_def *chandef = &vif->bss_conf.chanreq.oper;
1498
1499 scoped_guard(rcu) {
1500 chanctx_conf = rcu_access_pointer(vif->bss_conf.chanctx_conf);
1501 if (!chanctx_conf ||
1502 !cfg80211_chandef_identical(chandef, &chanctx_conf->def))
1503 return -ENODATA;
1504 }
1505
1506 *dbm = MBM_TO_DBM(mors->tx_power_mbm);
1507 return 0;
1508 }
1509
mm81x_mac_config_ps(struct mm81x * mors,struct ieee80211_vif * vif)1510 static void mm81x_mac_config_ps(struct mm81x *mors, struct ieee80211_vif *vif)
1511 {
1512 bool en_ps = vif->cfg.ps;
1513
1514 if (vif->type == NL80211_IFTYPE_AP || !mors->ps.enable)
1515 return;
1516
1517 if (mors->config_ps == en_ps)
1518 return;
1519
1520 dev_dbg(mors->dev, "change powersave mode: %d (current %d)", en_ps,
1521 mors->config_ps);
1522
1523 mors->config_ps = en_ps;
1524
1525 if (en_ps) {
1526 mm81x_cmd_set_ps(mors, true);
1527 mm81x_ps_enable(mors);
1528 } else {
1529 mm81x_ps_disable(mors);
1530 mm81x_cmd_set_ps(mors, false);
1531 }
1532 }
1533
mm81x_mac_ops_bss_info_changed(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_bss_conf * info,u64 changed)1534 static void mm81x_mac_ops_bss_info_changed(struct ieee80211_hw *hw,
1535 struct ieee80211_vif *vif,
1536 struct ieee80211_bss_conf *info,
1537 u64 changed)
1538 {
1539 int ret;
1540 struct mm81x *mors = hw->priv;
1541 struct mm81x_vif *mors_vif = (struct mm81x_vif *)vif->drv_priv;
1542
1543 if (changed & BSS_CHANGED_PS)
1544 mm81x_mac_config_ps(mors, vif);
1545
1546 if (changed & BSS_CHANGED_BEACON_ENABLED) {
1547 mm81x_cmd_config_beacon_timer(mors, mors_vif,
1548 info->enable_beacon);
1549
1550 if (!info->enable_beacon)
1551 mm81x_mac_beacon_finish(mors_vif);
1552 }
1553
1554 if (changed & BSS_CHANGED_BEACON_INT || changed & BSS_CHANGED_SSID) {
1555 ret = mm81x_cmd_cfg_bss(mors, mors_vif->id, info->beacon_int,
1556 info->dtim_period,
1557 mm81x_vif_generate_cssid(vif));
1558 if (ret)
1559 dev_err(mors->dev, "mm81x_cmd_cfg_bss failed %d", ret);
1560 }
1561 }
1562
mm81x_mac_ops_prepare_multicast(struct ieee80211_hw * hw,struct netdev_hw_addr_list * mc_list)1563 static u64 mm81x_mac_ops_prepare_multicast(struct ieee80211_hw *hw,
1564 struct netdev_hw_addr_list *mc_list)
1565 {
1566 struct mm81x *mors = hw->priv;
1567 struct mcast_filter *filter;
1568 struct netdev_hw_addr *addr;
1569 u16 addr_count = netdev_hw_addr_list_count(mc_list);
1570 u16 len = sizeof(*filter) + addr_count * sizeof(filter->addr_list[0]);
1571
1572 filter = kzalloc(len, GFP_ATOMIC);
1573 if (!filter)
1574 return 0;
1575
1576 if (addr_count > MCAST_FILTER_COUNT_MAX) {
1577 dev_warn(
1578 mors->dev,
1579 "Multicast filtering disabled - too many groups (%d) > %u",
1580 addr_count, (u16)MCAST_FILTER_COUNT_MAX);
1581 filter->count = 0;
1582 } else {
1583 netdev_hw_addr_list_for_each(addr, mc_list) {
1584 dev_dbg(mors->dev, "mcast whitelist (%d): %pM",
1585 filter->count, addr->addr);
1586 filter->addr_list[filter->count++] =
1587 mac2le32(addr->addr);
1588 }
1589 }
1590
1591 return (u64)(unsigned long)filter;
1592 }
1593
mm81x_mac_ops_configure_filter(struct ieee80211_hw * hw,unsigned int changed_flags,unsigned int * total_flags,u64 multicast)1594 static void mm81x_mac_ops_configure_filter(struct ieee80211_hw *hw,
1595 unsigned int changed_flags,
1596 unsigned int *total_flags,
1597 u64 multicast)
1598 {
1599 struct mm81x *mors = hw->priv;
1600 struct mcast_filter *cmd = (void *)(unsigned long)multicast;
1601 struct mm81x_vif *mors_vif = NULL;
1602 struct ieee80211_vif *vif = NULL;
1603 int vif_id = 0;
1604 int ret = 0;
1605
1606 if (!cmd)
1607 goto out;
1608
1609 kfree(mors->mcast_filter);
1610 mors->mcast_filter = cmd;
1611
1612 for (vif_id = 0; vif_id < ARRAY_SIZE(mors->vifs); vif_id++) {
1613 vif = mm81x_rcu_dereference_vif_id(mors, vif_id, false);
1614 if (!vif)
1615 continue;
1616
1617 mors_vif = ieee80211_vif_to_mors_vif(vif);
1618
1619 ret = mm81x_cmd_cfg_multicast_filter(mors, mors_vif);
1620 if (!ret)
1621 continue;
1622
1623 dev_err(mors->dev, "Multicast filtering failed - rc=%d", ret);
1624 mors->mcast_filter = NULL;
1625 kfree(cmd);
1626 break;
1627 }
1628
1629 out:
1630 *total_flags &= 0;
1631 }
1632
mm81x_mac_ops_conf_tx(struct ieee80211_hw * hw,struct ieee80211_vif * vif,unsigned int link_id,u16 ac,const struct ieee80211_tx_queue_params * params)1633 static int mm81x_mac_ops_conf_tx(struct ieee80211_hw *hw,
1634 struct ieee80211_vif *vif,
1635 unsigned int link_id, u16 ac,
1636 const struct ieee80211_tx_queue_params *params)
1637 {
1638 int ret;
1639 struct mm81x *mors = hw->priv;
1640 struct mm81x_queue_params mqp;
1641
1642 mqp.aci = map_mac80211q_2_mm81x_aci(ac);
1643 mqp.aifs = params->aifs;
1644 mqp.cw_max = params->cw_max;
1645 mqp.cw_min = params->cw_min;
1646 mqp.uapsd = params->uapsd;
1647 mqp.txop = params->txop << 5;
1648
1649 dev_dbg(mors->dev, "queue:%d txop:%d cw_min:%d cw_max:%d aifs:%d",
1650 mqp.aci, mqp.txop, mqp.cw_min, mqp.cw_max, mqp.aifs);
1651
1652 ret = mm81x_cmd_cfg_qos(mors, &mqp);
1653 if (ret)
1654 dev_dbg(mors->dev, "mm81x_cmd_cfg_qos failed %d", ret);
1655 return ret;
1656 }
1657
mm81x_mac_ops_sta_state(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_sta * sta,enum ieee80211_sta_state old_state,enum ieee80211_sta_state new_state)1658 static int mm81x_mac_ops_sta_state(struct ieee80211_hw *hw,
1659 struct ieee80211_vif *vif,
1660 struct ieee80211_sta *sta,
1661 enum ieee80211_sta_state old_state,
1662 enum ieee80211_sta_state new_state)
1663 {
1664 u16 aid;
1665 int ret;
1666 struct mm81x *mors = hw->priv;
1667 struct mm81x_vif *mors_vif = (struct mm81x_vif *)vif->drv_priv;
1668 struct mm81x_sta *mors_sta = (struct mm81x_sta *)sta->drv_priv;
1669
1670 /* Ignore both NOTEXIST to NONE and NONE to NOTEXIST */
1671 if ((old_state == IEEE80211_STA_NOTEXIST &&
1672 new_state == IEEE80211_STA_NONE) ||
1673 (old_state == IEEE80211_STA_NONE &&
1674 new_state == IEEE80211_STA_NOTEXIST))
1675 return 0;
1676
1677 if (vif->type == NL80211_IFTYPE_STATION)
1678 aid = vif->cfg.aid;
1679 else
1680 aid = sta->aid;
1681
1682 ret = mm81x_cmd_sta_state(mors, mors_vif, aid, sta, new_state);
1683 if (ret < 0)
1684 goto exit;
1685
1686 ether_addr_copy(mors_sta->addr, sta->addr);
1687 mors_sta->state = new_state;
1688
1689 if (new_state > old_state && new_state == IEEE80211_STA_ASSOC) {
1690 if (vif->type == NL80211_IFTYPE_AP)
1691 mors_vif->u.ap.num_stas++;
1692 else if (vif->type == NL80211_IFTYPE_STATION)
1693 mors_vif->u.sta.is_assoc = true;
1694 }
1695
1696 if (new_state < old_state && new_state == IEEE80211_STA_NONE) {
1697 if (vif->type == NL80211_IFTYPE_AP)
1698 mors_vif->u.ap.num_stas--;
1699 else if (vif->type == NL80211_IFTYPE_STATION)
1700 mors_vif->u.sta.is_assoc = false;
1701 }
1702
1703 exit:
1704 /*
1705 * Always update our mmrc sta state even on failure to ensure
1706 * we don't hold a dangling sta on error
1707 */
1708 mm81x_rc_sta_state_check(mors, vif, sta, old_state, new_state);
1709 return new_state < old_state ? 0 : ret;
1710 }
1711
mm81x_mac_ops_ampdu_action(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_ampdu_params * params)1712 static int mm81x_mac_ops_ampdu_action(struct ieee80211_hw *hw,
1713 struct ieee80211_vif *vif,
1714 struct ieee80211_ampdu_params *params)
1715 {
1716 u16 tid = params->tid;
1717 struct mm81x *mors = hw->priv;
1718 struct ieee80211_sta *sta = params->sta;
1719 struct mm81x_sta *mors_sta = (struct mm81x_sta *)sta->drv_priv;
1720 u16 buf_size =
1721 min_t(u16, params->buf_size, DOT11AH_BA_MAX_MPDU_PER_AMPDU);
1722
1723 switch (params->action) {
1724 case IEEE80211_AMPDU_TX_START:
1725 dev_dbg(mors->dev, "%pM.%d A-MPDU TX start", mors_sta->addr,
1726 tid);
1727 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1728 break;
1729 case IEEE80211_AMPDU_TX_STOP_CONT:
1730 case IEEE80211_AMPDU_TX_STOP_FLUSH:
1731 case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
1732 dev_dbg(mors->dev, "%pM.%d A-MPDU TX flush", mors_sta->addr,
1733 tid);
1734 mors_sta->tid_start_tx[tid] = false;
1735 mors_sta->tid_tx[tid] = false;
1736 mors_sta->tid_params[tid] = 0;
1737 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1738 break;
1739 case IEEE80211_AMPDU_TX_OPERATIONAL:
1740 dev_dbg(mors->dev, "%pM.%d A-MPDU TX oper", mors_sta->addr,
1741 tid);
1742 mors_sta->tid_tx[tid] = true;
1743 if (!buf_size) {
1744 dev_err(mors->dev, "%pM.%d A-MPDU Invalid buf size",
1745 mors_sta->addr, tid);
1746 break;
1747 }
1748 mors_sta->tid_params[tid] =
1749 u8_encode_bits(buf_size - 1,
1750 TX_INFO_TID_PARAMS_MAX_REORDER_BUF) |
1751 u8_encode_bits(1, TX_INFO_TID_PARAMS_AMPDU_ENABLED) |
1752 u8_encode_bits(params->amsdu,
1753 TX_INFO_TID_PARAMS_AMSDU_SUPPORTED);
1754 break;
1755 default:
1756 break;
1757 }
1758
1759 return 0;
1760 }
1761
mm81x_mac_ops_set_key(struct ieee80211_hw * hw,enum set_key_cmd cmd,struct ieee80211_vif * vif,struct ieee80211_sta * sta,struct ieee80211_key_conf * key)1762 static int mm81x_mac_ops_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
1763 struct ieee80211_vif *vif,
1764 struct ieee80211_sta *sta,
1765 struct ieee80211_key_conf *key)
1766 {
1767 u16 aid;
1768 int ret = -EOPNOTSUPP;
1769 struct mm81x *mors = hw->priv;
1770 struct mm81x_vif *mors_vif = (struct mm81x_vif *)vif->drv_priv;
1771 enum host_cmd_key_cipher cipher;
1772 enum host_cmd_aes_key_len length;
1773
1774 if (vif->type == NL80211_IFTYPE_STATION) {
1775 aid = vif->cfg.aid;
1776 } else if (sta) {
1777 aid = sta->aid;
1778 } else {
1779 /* Is a group key - AID is unused */
1780 WARN_ON(key->flags & IEEE80211_KEY_FLAG_PAIRWISE);
1781 aid = 0;
1782 }
1783
1784 switch (cmd) {
1785 case SET_KEY: {
1786 switch (key->cipher) {
1787 case WLAN_CIPHER_SUITE_CCMP:
1788 case WLAN_CIPHER_SUITE_CCMP_256:
1789 cipher = HOST_CMD_KEY_CIPHER_AES_CCM;
1790 break;
1791 case WLAN_CIPHER_SUITE_GCMP:
1792 case WLAN_CIPHER_SUITE_GCMP_256:
1793 cipher = HOST_CMD_KEY_CIPHER_AES_GCM;
1794 break;
1795 default:
1796 /* Cipher suite currently not supported */
1797 ret = -EOPNOTSUPP;
1798 goto exit;
1799 }
1800
1801 switch (key->keylen) {
1802 case 16:
1803 length = HOST_CMD_AES_KEY_LEN_LENGTH_128;
1804 break;
1805 case 32:
1806 length = HOST_CMD_AES_KEY_LEN_LENGTH_256;
1807 break;
1808 default:
1809 /* Key length not supported */
1810 ret = -EOPNOTSUPP;
1811 goto exit;
1812 }
1813
1814 ret = mm81x_cmd_install_key(mors, mors_vif, aid, key, cipher,
1815 length);
1816 break;
1817 }
1818 case DISABLE_KEY:
1819 ret = mm81x_cmd_disable_key(mors, mors_vif, aid, key);
1820 if (ret) {
1821 /* Must return 0 */
1822 dev_warn(mors->dev, "Failed to remove key");
1823 ret = 0;
1824 }
1825 break;
1826 default:
1827 WARN_ON(1);
1828 }
1829
1830 if (ret) {
1831 dev_dbg(mors->dev, "Falling back to software crypto");
1832 ret = 1;
1833 }
1834
1835 exit:
1836 return ret;
1837 }
1838
mm81x_mac_set_frag_threshold(struct ieee80211_hw * hw,int radio_idx,u32 value)1839 static int mm81x_mac_set_frag_threshold(struct ieee80211_hw *hw, int radio_idx,
1840 u32 value)
1841 {
1842 struct mm81x *mors = hw->priv;
1843
1844 return mm81x_cmd_set_frag_threshold(mors, value);
1845 }
1846
mm81x_rx_h_rc_bw_to_rx_bw(__le32 ratecode)1847 static u8 mm81x_rx_h_rc_bw_to_rx_bw(__le32 ratecode)
1848 {
1849 enum dot11_bandwidth bw = mm81x_ratecode_bw_index_get(ratecode);
1850
1851 switch (bw) {
1852 case DOT11_BANDWIDTH_1MHZ:
1853 return RATE_INFO_BW_1;
1854 case DOT11_BANDWIDTH_2MHZ:
1855 return RATE_INFO_BW_2;
1856 case DOT11_BANDWIDTH_4MHZ:
1857 return RATE_INFO_BW_4;
1858 case DOT11_BANDWIDTH_8MHZ:
1859 return RATE_INFO_BW_8;
1860 default:
1861 return RATE_INFO_BW_1;
1862 }
1863 }
1864
mm81x_rx_h_fill_status(struct mm81x * mors,struct mm81x_skb_rx_status * hdr_rx_status,struct ieee80211_rx_status * rx_status,struct sk_buff * skb)1865 static void mm81x_rx_h_fill_status(struct mm81x *mors,
1866 struct mm81x_skb_rx_status *hdr_rx_status,
1867 struct ieee80211_rx_status *rx_status,
1868 struct sk_buff *skb)
1869 {
1870 u32 flags = le32_to_cpu(hdr_rx_status->flags);
1871 u16 freq_100khz = le16_to_cpu(hdr_rx_status->freq_100khz);
1872 __le32 ratecode = hdr_rx_status->mm81x_ratecode;
1873
1874 rx_status->signal = le16_to_cpu(hdr_rx_status->rssi);
1875 rx_status->encoding = RX_ENC_S1G;
1876 rx_status->band = NL80211_BAND_S1GHZ;
1877 rx_status->freq = KHZ100_TO_MHZ(freq_100khz);
1878 rx_status->freq_offset = (freq_100khz % 10) ? 1 : 0;
1879 rx_status->nss = NSS_IDX_TO_NSS(mm81x_ratecode_nss_index_get(ratecode));
1880
1881 if (flags & MM81X_RX_STATUS_FLAGS_DECRYPTED)
1882 rx_status->flag |= RX_FLAG_DECRYPTED;
1883
1884 rx_status->rate_idx = mm81x_ratecode_mcs_index_get(ratecode);
1885 rx_status->bw = mm81x_rx_h_rc_bw_to_rx_bw(ratecode);
1886
1887 if (mm81x_ratecode_sgi_get(ratecode))
1888 rx_status->enc_flags |= RX_ENC_FLAG_SHORT_GI;
1889 }
1890
mm81x_rx_h_update_sta(struct ieee80211_vif * vif,struct ieee80211_hdr * hdr,struct ieee80211_rx_status * rx_status)1891 static void mm81x_rx_h_update_sta(struct ieee80211_vif *vif,
1892 struct ieee80211_hdr *hdr,
1893 struct ieee80211_rx_status *rx_status)
1894 {
1895 struct ieee80211_sta *sta;
1896 struct mm81x_sta *msta;
1897 u8 *lookup = ieee80211_is_s1g_beacon(hdr->frame_control) ? hdr->addr1 :
1898 hdr->addr2;
1899
1900 lockdep_assert_in_rcu_read_lock();
1901
1902 sta = ieee80211_find_sta(vif, lookup);
1903 if (!sta)
1904 return;
1905
1906 msta = (void *)sta->drv_priv;
1907 if (msta->avg_rssi) {
1908 msta->avg_rssi =
1909 CALC_AVG_RSSI(msta->avg_rssi, rx_status->signal);
1910 } else {
1911 msta->avg_rssi = rx_status->signal;
1912 }
1913 }
1914
1915 static struct ieee80211_vif *
mm81x_rx_h_skb_get_vif(struct mm81x * mors,struct sk_buff * skb,struct mm81x_skb_rx_status * hdr_rx_status)1916 mm81x_rx_h_skb_get_vif(struct mm81x *mors, struct sk_buff *skb,
1917 struct mm81x_skb_rx_status *hdr_rx_status)
1918 {
1919 u8 vif_id = u32_get_bits(le32_to_cpu(hdr_rx_status->flags),
1920 MM81X_RX_STATUS_FLAGS_VIF_ID);
1921
1922 lockdep_assert_in_rcu_read_lock();
1923
1924 if (vif_id == INVALID_VIF_INDEX)
1925 return NULL;
1926
1927 return mm81x_rcu_dereference_vif_id(mors, vif_id, true);
1928 }
1929
mm81x_mac_rx_skb(struct mm81x * mors,struct sk_buff * skb,struct mm81x_skb_rx_status * hdr_rx_status)1930 void mm81x_mac_rx_skb(struct mm81x *mors, struct sk_buff *skb,
1931 struct mm81x_skb_rx_status *hdr_rx_status)
1932 {
1933 struct ieee80211_vif *vif;
1934 struct ieee80211_hw *hw = mors->hw;
1935 struct ieee80211_rx_status rx_status;
1936 struct ieee80211_hdr *hdr = (void *)skb->data;
1937
1938 memset(&rx_status, 0, sizeof(rx_status));
1939
1940 if (!mors->started || !skb->data || !skb->len) {
1941 dev_kfree_skb_any(skb);
1942 return;
1943 }
1944
1945 mm81x_rx_h_fill_status(mors, hdr_rx_status, &rx_status, skb);
1946
1947 scoped_guard(rcu) {
1948 vif = mm81x_rx_h_skb_get_vif(mors, skb, hdr_rx_status);
1949 if (!vif)
1950 goto rx;
1951
1952 mm81x_rx_h_update_sta(vif, hdr, &rx_status);
1953 }
1954
1955 rx:
1956 memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status));
1957 ieee80211_rx_ni(hw, skb);
1958 }
1959
mm81x_mac_flush_queues(struct mm81x * mors)1960 static void mm81x_mac_flush_queues(struct mm81x *mors)
1961 {
1962 /*
1963 * No need to call mm81x_skbq_stop_tx_queues as mac80211
1964 * has already cancelled each queue prior to calling .flush()
1965 */
1966 mm81x_skbq_data_traffic_pause(mors);
1967
1968 flush_work(&mors->hif_work);
1969 flush_work(&mors->tx_stale_work);
1970
1971 mm81x_hif_clear_events(mors);
1972 mm81x_hif_flush_tx_data(mors);
1973 mm81x_hif_flush_cmds(mors);
1974
1975 /* Re-enable data, not that there will be any */
1976 mm81x_skbq_data_traffic_resume(mors);
1977 }
1978
mm81x_mac_has_tx_pending(struct mm81x * mors)1979 static bool mm81x_mac_has_tx_pending(struct mm81x *mors)
1980 {
1981 struct mm81x_skbq *mgmt_q = mm81x_hif_get_tx_mgmt_queue(mors);
1982 struct mm81x_skbq *tx_qs;
1983 int num_qs, i;
1984
1985 mm81x_hif_skbq_get_tx_qs(mors, &tx_qs, &num_qs);
1986 for (i = 0; i < num_qs; i++)
1987 if (mm81x_skbq_count(&tx_qs[i]) ||
1988 mm81x_skbq_pending_count(&tx_qs[i]))
1989 return true;
1990
1991 if (mm81x_skbq_count(mgmt_q) || mm81x_skbq_pending_count(mgmt_q))
1992 return true;
1993
1994 return false;
1995 }
1996
mm81x_mac_wait_queues(struct mm81x * mors)1997 static void mm81x_mac_wait_queues(struct mm81x *mors)
1998 {
1999 if (!wait_event_timeout(mors->tx_empty_waitq,
2000 !mm81x_mac_has_tx_pending(mors),
2001 MM81X_FLUSH_TIMEOUT))
2002 dev_warn(mors->dev, "Unable to empty queues before timeout");
2003 }
2004
mm81x_mac_ops_flush(struct ieee80211_hw * hw,struct ieee80211_vif * vif,u32 queues,bool drop)2005 static void mm81x_mac_ops_flush(struct ieee80211_hw *hw,
2006 struct ieee80211_vif *vif, u32 queues,
2007 bool drop)
2008 {
2009 struct mm81x *mors = hw->priv;
2010
2011 /* We don't support IEEE80211_HW_QUEUE_CONTROL so flush all queues */
2012 if (drop)
2013 mm81x_mac_flush_queues(mors);
2014 else
2015 mm81x_mac_wait_queues(mors);
2016 }
2017
mm81x_mac_ops_set_rts_threshold(struct ieee80211_hw * hw,int radio_idx,u32 value)2018 static int mm81x_mac_ops_set_rts_threshold(struct ieee80211_hw *hw,
2019 int radio_idx, u32 value)
2020 {
2021 struct mm81x *mors = hw->priv;
2022
2023 mors->rts_threshold = value;
2024 return 0;
2025 }
2026
mm81x_mac_ops_sta_statistics(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_sta * sta,struct station_info * sinfo)2027 static void mm81x_mac_ops_sta_statistics(struct ieee80211_hw *hw,
2028 struct ieee80211_vif *vif,
2029 struct ieee80211_sta *sta,
2030 struct station_info *sinfo)
2031 {
2032 struct mm81x_sta *msta = (struct mm81x_sta *)sta->drv_priv;
2033 struct mm81x *mors = hw->priv;
2034 const struct mmrc_table *tb = msta->rc.tb;
2035 struct mmrc_rate rate;
2036
2037 if (!tb || tb->best_tp.rate == MMRC_MCS_UNUSED) {
2038 sinfo->filled &= ~BIT_ULL(NL80211_STA_INFO_TX_BITRATE);
2039 return;
2040 }
2041
2042 rate = tb->best_tp;
2043 sinfo->txrate.mcs = rate.rate;
2044 sinfo->txrate.nss = NSS_IDX_TO_NSS(rate.ss);
2045 sinfo->txrate.flags = RATE_INFO_FLAGS_S1G_MCS;
2046 switch (rate.bw) {
2047 case MMRC_BW_1MHZ:
2048 sinfo->txrate.bw = RATE_INFO_BW_1;
2049 break;
2050 case MMRC_BW_2MHZ:
2051 sinfo->txrate.bw = RATE_INFO_BW_2;
2052 break;
2053 case MMRC_BW_4MHZ:
2054 sinfo->txrate.bw = RATE_INFO_BW_4;
2055 break;
2056 case MMRC_BW_8MHZ:
2057 sinfo->txrate.bw = RATE_INFO_BW_8;
2058 break;
2059 default:
2060 break;
2061 }
2062
2063 if (rate.guard == MMRC_GUARD_SHORT)
2064 sinfo->txrate.flags |= (RATE_INFO_FLAGS_SHORT_GI);
2065
2066 dev_dbg(mors->dev, "mcs: %d, bw: %d, flag: 0x%x", rate.rate, rate.bw,
2067 sinfo->txrate.flags);
2068 sinfo->filled |= BIT_ULL(NL80211_STA_INFO_TX_BITRATE);
2069 }
2070
mm81x_get_expected_throughput(struct ieee80211_hw * hw,struct ieee80211_sta * sta)2071 static u32 mm81x_get_expected_throughput(struct ieee80211_hw *hw,
2072 struct ieee80211_sta *sta)
2073 {
2074 struct mm81x_sta *msta = (struct mm81x_sta *)sta->drv_priv;
2075 struct mm81x *mors = hw->priv;
2076 const struct mmrc_table *tb = msta->rc.tb;
2077 struct mmrc_rate rate;
2078 u32 tput;
2079
2080 if (!tb || tb->best_tp.rate == MMRC_MCS_UNUSED)
2081 return 0;
2082
2083 rate = tb->best_tp;
2084 tput = BPS_TO_KBPS(mmrc_calculate_theoretical_throughput(rate));
2085 dev_dbg(mors->dev, "Throughput: MCS: %d, BW: %d, GI: %d -> %u",
2086 rate.rate, 1 << rate.bw, rate.guard, tput);
2087
2088 return tput;
2089 }
2090
mm81x_mac_restart_cleanup_iter(void * data,u8 * mac,struct ieee80211_vif * vif)2091 static void mm81x_mac_restart_cleanup_iter(void *data, u8 *mac,
2092 struct ieee80211_vif *vif)
2093 {
2094 if (vif->type == NL80211_IFTYPE_AP)
2095 mm81x_mac_beacon_finish((struct mm81x_vif *)vif->drv_priv);
2096 }
2097
mm81x_mac_restart_cleanup(struct mm81x * mors)2098 static void mm81x_mac_restart_cleanup(struct mm81x *mors)
2099 {
2100 ieee80211_iterate_active_interfaces(mors->hw,
2101 IEEE80211_IFACE_ITER_NORMAL,
2102 mm81x_mac_restart_cleanup_iter,
2103 NULL);
2104 mm81x_mac_hw_scan_finish(mors);
2105 }
2106
mm81x_mac_restart(struct mm81x * mors)2107 static int mm81x_mac_restart(struct mm81x *mors)
2108 {
2109 int ret;
2110 u32 chip_id;
2111
2112 mors->started = false;
2113 mm81x_ps_disable(mors);
2114 mm81x_bus_set_irq(mors, false);
2115 mm81x_hw_irq_clear(mors);
2116 ieee80211_stop_queues(mors->hw);
2117
2118 set_bit(MM81X_STATE_DATA_TX_STOPPED, &mors->state_flags);
2119 set_bit(MM81X_STATE_DATA_QS_STOPPED, &mors->state_flags);
2120
2121 /* Allow time for in-transit tx/rx packets to settle */
2122 mdelay(MM81X_HW_RESTART_DELAY_MS);
2123 flush_work(&mors->hif_work);
2124 flush_work(&mors->tx_stale_work);
2125 mm81x_hif_clear_events(mors);
2126 mm81x_hif_flush_tx_data(mors);
2127 mm81x_hif_flush_cmds(mors);
2128
2129 mm81x_claim_bus(mors);
2130 ret = mm81x_reg32_read(mors, MM81X_REG_CHIP_ID(mors), &chip_id);
2131 mm81x_release_bus(mors);
2132
2133 if (ret < 0) {
2134 dev_err(mors->dev, "Failed to access HW: %d", ret);
2135 goto exit;
2136 }
2137
2138 mm81x_mac_restart_cleanup(mors);
2139
2140 ret = mm81x_fw_init(mors, true);
2141 if (ret < 0) {
2142 dev_err(mors->dev, "Failed to init firmware: %d", ret);
2143 goto exit;
2144 }
2145
2146 mm81x_hw_irq_enable(mors, MM81X_INT_HW_STOP_NOTIFICATION_NUM, true);
2147
2148 ret = mm81x_fw_parse_ext_host_tbl(mors);
2149 if (ret) {
2150 dev_err(mors->dev, "failed to parse extended host table: %d",
2151 ret);
2152 goto exit;
2153 }
2154
2155 mm81x_mac_caps_init(mors);
2156
2157 mm81x_bus_set_irq(mors, true);
2158 clear_bit(MM81X_STATE_DATA_TX_STOPPED, &mors->state_flags);
2159 clear_bit(MM81X_STATE_DATA_QS_STOPPED, &mors->state_flags);
2160 clear_bit(MM81X_STATE_CHIP_UNRESPONSIVE, &mors->state_flags);
2161 clear_bit(MM81X_STATE_RELOAD_FW_AFTER_START, &mors->state_flags);
2162 mm81x_mac_check_fw_disabled_chans(mors->hw);
2163 ieee80211_restart_hw(mors->hw);
2164
2165 exit:
2166 mm81x_ps_enable(mors);
2167 return ret;
2168 }
2169
mm81x_mac_ops_add_interface(struct ieee80211_hw * hw,struct ieee80211_vif * vif)2170 static int mm81x_mac_ops_add_interface(struct ieee80211_hw *hw,
2171 struct ieee80211_vif *vif)
2172 {
2173 int ret = 0;
2174 struct mm81x *mors = hw->priv;
2175 struct mm81x_vif *mors_vif = (struct mm81x_vif *)vif->drv_priv;
2176
2177 if (test_bit(MM81X_STATE_RELOAD_FW_AFTER_START, &mors->state_flags)) {
2178 dev_info(mors->dev, "Restarting chip with regdom: %s",
2179 mors->country);
2180
2181 ret = mm81x_mac_restart(mors);
2182 if (ret) {
2183 dev_err(mors->dev, "Failed to restart chip");
2184 return ret;
2185 }
2186
2187 /*
2188 * mac_restart will trigger ieee80211_hw_restart and
2189 * add_interface will re-enter. just exit here instead.
2190 */
2191 return 0;
2192 }
2193
2194 vif->driver_flags |= IEEE80211_VIF_BEACON_FILTER;
2195 mors_vif->mors = mors;
2196
2197 ret = mm81x_cmd_add_if(mors, &mors_vif->id, vif->addr, vif->type);
2198 if (ret) {
2199 dev_err(mors->dev, "mm81x_cmd_add_if failed %d", ret);
2200 return ret;
2201 }
2202
2203 if (mors_vif->id >= ARRAY_SIZE(mors->vifs)) {
2204 dev_err(mors->dev, "vif_id is too large %u", mors_vif->id);
2205 ret = -EOPNOTSUPP;
2206 return ret;
2207 }
2208
2209 if (mors_vif->id != (mors_vif->id & MM81X_TX_CONF_FLAGS_VIF_ID_MASK)) {
2210 dev_err(mors->dev, "invalid vif_id %u", mors_vif->id);
2211 ret = -EOPNOTSUPP;
2212 return ret;
2213 }
2214
2215 rcu_assign_pointer(mors->vifs[mors_vif->id], vif);
2216
2217 if (vif->type == NL80211_IFTYPE_AP)
2218 mm81x_mac_beacon_init(mors_vif);
2219
2220 ret = mm81x_cmd_get_capabilities(mors, mors_vif->id, &mors->fw_caps);
2221 if (ret) {
2222 dev_err(mors->dev,
2223 "mm81x_cmd_get_capabilities failed for vif %d",
2224 mors_vif->id);
2225 return ret;
2226 }
2227
2228 ieee80211_wake_queues(mors->hw);
2229 return ret;
2230 }
2231
2232 static const struct ieee80211_ops mm81x_ops = {
2233 .start = mm81x_mac_ops_start,
2234 .stop = mm81x_mac_ops_stop,
2235 .config = mm81x_mac_ops_config,
2236 .wake_tx_queue = ieee80211_handle_wake_tx_queue,
2237 .tx = mm81x_mac_ops_tx,
2238 .add_interface = mm81x_mac_ops_add_interface,
2239 .remove_interface = mm81x_mac_ops_remove_interface,
2240 .configure_filter = mm81x_mac_ops_configure_filter,
2241 .sta_state = mm81x_mac_ops_sta_state,
2242 .flush = mm81x_mac_ops_flush,
2243 .set_frag_threshold = mm81x_mac_set_frag_threshold,
2244 .set_rts_threshold = mm81x_mac_ops_set_rts_threshold,
2245 .sta_statistics = mm81x_mac_ops_sta_statistics,
2246 .get_expected_throughput = mm81x_get_expected_throughput,
2247 .hw_scan = mm81x_mac_ops_hw_scan,
2248 .cancel_hw_scan = mm81x_mac_ops_cancel_hw_scan,
2249 .get_txpower = mm81x_mac_ops_get_txpower,
2250 .bss_info_changed = mm81x_mac_ops_bss_info_changed,
2251 .prepare_multicast = mm81x_mac_ops_prepare_multicast,
2252 .conf_tx = mm81x_mac_ops_conf_tx,
2253 .ampdu_action = mm81x_mac_ops_ampdu_action,
2254 .set_key = mm81x_mac_ops_set_key,
2255 .add_chanctx = ieee80211_emulate_add_chanctx,
2256 .remove_chanctx = ieee80211_emulate_remove_chanctx,
2257 .change_chanctx = ieee80211_emulate_change_chanctx,
2258 .switch_vif_chanctx = ieee80211_emulate_switch_vif_chanctx,
2259 };
2260
mm81x_reg_notifier(struct wiphy * wiphy,struct regulatory_request * request)2261 static void mm81x_reg_notifier(struct wiphy *wiphy,
2262 struct regulatory_request *request)
2263 {
2264 int ret;
2265 struct mm81x *mors = wiphy_to_ieee80211_hw(wiphy)->priv;
2266
2267 if (mm81x_reg_h_cc_equal(request->alpha2, "00") ||
2268 mm81x_reg_h_cc_equal(request->alpha2, mors->country))
2269 return;
2270
2271 memcpy(mors->country, request->alpha2, sizeof(mors->country));
2272
2273 ret = mm81x_mac_restart(mors);
2274 if (ret)
2275 dev_err(mors->dev, "Failed to restart chip: %d", ret);
2276 }
2277
mm81x_mac_config_hw(struct mm81x * mors)2278 static void mm81x_mac_config_hw(struct mm81x *mors)
2279 {
2280 int i;
2281 struct ieee80211_hw *hw = mors->hw;
2282 struct wiphy *wiphy;
2283
2284 for (i = 0; i < NUM_NL80211_BANDS; i++)
2285 hw->wiphy->bands[i] = NULL;
2286
2287 hw->wiphy->bands[NL80211_BAND_S1GHZ] = &mors_band_s1ghz;
2288 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_AP) |
2289 BIT(NL80211_IFTYPE_STATION);
2290 hw->wiphy->reg_notifier = mm81x_reg_notifier;
2291 hw->queues = MM81X_HW_QUEUE_COUNT;
2292 hw->max_rates = MM81X_HW_MAX_RATES;
2293 hw->max_report_rates = MM81X_HW_MAX_REPORT_RATES;
2294 hw->max_rate_tries = MM81X_HW_MAX_RATE_TRIES;
2295 hw->tx_sk_pacing_shift = MM81X_HW_TX_SK_PACING_SHIFT;
2296 hw->vif_data_size = sizeof(struct mm81x_vif);
2297 hw->sta_data_size = sizeof(struct mm81x_sta);
2298 hw->extra_tx_headroom =
2299 sizeof(struct mm81x_skb_hdr) + mm81x_bus_get_alignment(mors);
2300
2301 mors->wiphy = hw->wiphy;
2302
2303 ieee80211_hw_set(hw, SIGNAL_DBM);
2304 ieee80211_hw_set(hw, MFP_CAPABLE);
2305 ieee80211_hw_set(hw, REPORTS_TX_ACK_STATUS);
2306 ieee80211_hw_set(hw, AMPDU_AGGREGATION);
2307 ieee80211_hw_set(hw, HOST_BROADCAST_PS_BUFFERING);
2308 ieee80211_hw_set(hw, HAS_RATE_CONTROL);
2309 ieee80211_hw_set(hw, SUPPORTS_PS);
2310 ieee80211_hw_set(hw, NEED_DTIM_BEFORE_ASSOC);
2311 ieee80211_hw_set(hw, PS_NULLFUNC_STACK);
2312 ieee80211_hw_set(hw, SUPPORTS_TX_FRAG);
2313 ieee80211_hw_set(hw, SUPPORTS_NDP_BLOCKACK);
2314
2315 SET_IEEE80211_PERM_ADDR(hw, mors->macaddr);
2316
2317 wiphy = mors->wiphy;
2318
2319 wiphy->flags |= WIPHY_FLAG_AP_UAPSD;
2320 wiphy->flags |= WIPHY_FLAG_PS_ON_BY_DEFAULT;
2321
2322 if (!mors->ps.enable)
2323 wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
2324
2325 wiphy->features |= NL80211_FEATURE_AP_MODE_CHAN_WIDTH_CHANGE |
2326 NL80211_FEATURE_TX_POWER_INSERTION;
2327
2328 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_AIRTIME_FAIRNESS);
2329 wiphy_ext_feature_set(wiphy, NL80211_EXT_FEATURE_SET_SCAN_DWELL);
2330
2331 wiphy->iface_combinations = mors_if_combs;
2332 wiphy->n_iface_combinations = ARRAY_SIZE(mors_if_combs);
2333 wiphy->max_scan_ie_len = MM81X_MAX_SCAN_IE_LEN;
2334 wiphy->max_scan_ssids = MM81X_MAX_SCAN_SSIDS;
2335 wiphy->signal_type = CFG80211_SIGNAL_TYPE_MBM;
2336 wiphy->max_remain_on_channel_duration =
2337 MM81X_MAX_REMAIN_ON_CHAN_DURATION;
2338 }
2339
mm81x_stale_tx_status_timer(struct timer_list * t)2340 static void mm81x_stale_tx_status_timer(struct timer_list *t)
2341 {
2342 struct mm81x *mors = timer_container_of(mors, t, stale_status.timer);
2343
2344 spin_lock_bh(&mors->stale_status.lock);
2345 if (mm81x_hif_get_tx_status_pending_count(mors))
2346 queue_work(mors->net_wq, &mors->tx_stale_work);
2347 spin_unlock_bh(&mors->stale_status.lock);
2348 }
2349
mm81x_stale_tx_status_timer_finish(struct mm81x * mors)2350 static void mm81x_stale_tx_status_timer_finish(struct mm81x *mors)
2351 {
2352 timer_shutdown_sync(&mors->stale_status.timer);
2353 }
2354
mm81x_mac_stale_tx_status_timer_init(struct mm81x * mors)2355 static void mm81x_mac_stale_tx_status_timer_init(struct mm81x *mors)
2356 {
2357 spin_lock_init(&mors->stale_status.lock);
2358 timer_setup(&mors->stale_status.timer, mm81x_stale_tx_status_timer, 0);
2359 }
2360
mm81x_mac_register(struct mm81x * mors)2361 int mm81x_mac_register(struct mm81x *mors)
2362 {
2363 int ret;
2364 struct ieee80211_hw *hw = mors->hw;
2365
2366 mors->tx_power_mbm = INT_MAX;
2367 mors->tx_max_power_mbm = INT_MAX;
2368 mors->rts_threshold = IEEE80211_MAX_RTS_THRESHOLD;
2369
2370 ret = mm81x_ps_init(mors);
2371 if (ret)
2372 return ret;
2373
2374 mm81x_mac_config_hw(mors);
2375 mm81x_mac_hw_scan_init(mors);
2376 mm81x_mac_stale_tx_status_timer_init(mors);
2377
2378 ret = ieee80211_register_hw(hw);
2379 if (ret) {
2380 dev_err(mors->dev, "ieee80211_register_hw failed %d", ret);
2381 mm81x_mac_unregister(mors);
2382 return ret;
2383 }
2384
2385 mm81x_rc_init(mors);
2386
2387 /*
2388 * At this stage, we know bus and pager system interrupts are enabled.
2389 * Trigger the receive workqueue to drain any incoming chip-to-host
2390 * pending packets been pushed in the period between the firmware
2391 * initialization and interrupts being enabled.
2392 */
2393 set_bit(MM81X_HIF_EVT_RX_PEND, &mors->hif.event_flags);
2394 queue_work(mors->chip_wq, &mors->hif_work);
2395
2396 return ret;
2397 }
2398
mm81x_mac_unregister(struct mm81x * mors)2399 void mm81x_mac_unregister(struct mm81x *mors)
2400 {
2401 mm81x_ps_disable(mors);
2402 mm81x_rc_deinit(mors);
2403 mm81x_mac_hw_scan_destroy(mors);
2404
2405 ieee80211_stop_queues(mors->hw);
2406 ieee80211_unregister_hw(mors->hw);
2407
2408 mm81x_hif_flush_tx_data(mors);
2409 mm81x_hif_flush_cmds(mors);
2410 mm81x_stale_tx_status_timer_finish(mors);
2411 mm81x_ps_finish(mors);
2412
2413 kfree(mors->mcast_filter);
2414 }
2415
mm81x_mac_alloc(size_t priv_size,struct device * dev)2416 struct mm81x *mm81x_mac_alloc(size_t priv_size, struct device *dev)
2417 {
2418 struct ieee80211_hw *hw;
2419 struct mm81x *mors;
2420
2421 hw = ieee80211_alloc_hw(sizeof(*mors) + priv_size, &mm81x_ops);
2422 if (!hw) {
2423 dev_err(dev, "ieee80211_alloc_hw failed\r\n");
2424 return NULL;
2425 }
2426
2427 SET_IEEE80211_DEV(hw, dev);
2428 memset(hw->priv, 0, sizeof(*mors));
2429
2430 mors = hw->priv;
2431 mors->hw = hw;
2432 mors->dev = dev;
2433 mutex_init(&mors->cmd_lock);
2434 mutex_init(&mors->cmd_wait);
2435 init_waitqueue_head(&mors->tx_empty_waitq);
2436
2437 return mors;
2438 }
2439
mm81x_mac_free(struct mm81x * mors)2440 void mm81x_mac_free(struct mm81x *mors)
2441 {
2442 ieee80211_free_hw(mors->hw);
2443 }
2444