1 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
2 /* Copyright (c) 2024 NVIDIA Corporation & Affiliates */
3
4 #ifndef MLX5HWS_INTERNAL_H_
5 #define MLX5HWS_INTERNAL_H_
6
7 #include <linux/mlx5/transobj.h>
8 #include <linux/mlx5/vport.h>
9 #include "fs_core.h"
10 #include "wq.h"
11 #include "lib/mlx5.h"
12
13 #include "mlx5hws_prm.h"
14 #include "mlx5hws.h"
15 #include "mlx5hws_pool.h"
16 #include "mlx5hws_vport.h"
17 #include "mlx5hws_context.h"
18 #include "mlx5hws_table.h"
19 #include "mlx5hws_send.h"
20 #include "mlx5hws_rule.h"
21 #include "mlx5hws_cmd.h"
22 #include "mlx5hws_action.h"
23 #include "mlx5hws_definer.h"
24 #include "mlx5hws_matcher.h"
25 #include "mlx5hws_debug.h"
26 #include "mlx5hws_pat_arg.h"
27 #include "mlx5hws_bwc.h"
28 #include "mlx5hws_bwc_complex.h"
29
30 #define W_SIZE 2
31 #define DW_SIZE 4
32 #define BITS_IN_BYTE 8
33 #define BITS_IN_DW (BITS_IN_BYTE * DW_SIZE)
34
35 #define IS_BIT_SET(_value, _bit) ((_value) & (1ULL << (_bit)))
36
37 #define mlx5hws_err(ctx, arg...) mlx5_core_err((ctx)->mdev, ##arg)
38 #define mlx5hws_info(ctx, arg...) mlx5_core_info((ctx)->mdev, ##arg)
39 #define mlx5hws_dbg(ctx, arg...) mlx5_core_dbg((ctx)->mdev, ##arg)
40
41 #define MLX5HWS_TABLE_TYPE_BASE 2
42 #define MLX5HWS_ACTION_STE_IDX_ANY 0
43
is_mem_zero(const u8 * mem,size_t size)44 static inline bool is_mem_zero(const u8 *mem, size_t size)
45 {
46 if (unlikely(!size)) {
47 pr_warn("HWS: invalid buffer of size 0 in %s\n", __func__);
48 return true;
49 }
50
51 return (*mem == 0) && memcmp(mem, mem + 1, size - 1) == 0;
52 }
53
align(unsigned long val,unsigned long align)54 static inline unsigned long align(unsigned long val, unsigned long align)
55 {
56 return (val + align - 1) & ~(align - 1);
57 }
58
59 #endif /* MLX5HWS_INTERNAL_H_ */
60