1 /*
2 * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33 #include <linux/etherdevice.h>
34 #include <linux/debugfs.h>
35 #include <linux/mlx5/driver.h>
36 #include <linux/mlx5/mlx5_ifc.h>
37 #include <linux/mlx5/vport.h>
38 #include <linux/mlx5/fs.h>
39 #include <linux/mlx5/mpfs.h>
40 #include "esw/acl/lgcy.h"
41 #include "esw/legacy.h"
42 #include "esw/qos.h"
43 #include "mlx5_core.h"
44 #include "lib/eq.h"
45 #include "lag/lag.h"
46 #include "eswitch.h"
47 #include "fs_core.h"
48 #include "devlink.h"
49 #include "ecpf.h"
50 #include "en/mod_hdr.h"
51 #include "en_accel/ipsec.h"
52
53 enum {
54 MLX5_ACTION_NONE = 0,
55 MLX5_ACTION_ADD = 1,
56 MLX5_ACTION_DEL = 2,
57 };
58
59 /* Vport UC/MC hash node */
60 struct vport_addr {
61 struct l2addr_node node;
62 u8 action;
63 u16 vport;
64 struct mlx5_flow_handle *flow_rule;
65 bool mpfs; /* UC MAC was added to MPFs */
66 /* A flag indicating that mac was added due to mc promiscuous vport */
67 bool mc_promisc;
68 };
69
mlx5_eswitch_check(const struct mlx5_core_dev * dev)70 static int mlx5_eswitch_check(const struct mlx5_core_dev *dev)
71 {
72 if (MLX5_CAP_GEN(dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
73 return -EOPNOTSUPP;
74
75 if (!MLX5_ESWITCH_MANAGER(dev))
76 return -EOPNOTSUPP;
77
78 return 0;
79 }
80
__mlx5_devlink_eswitch_get(struct devlink * devlink,bool check)81 static struct mlx5_eswitch *__mlx5_devlink_eswitch_get(struct devlink *devlink, bool check)
82 {
83 struct mlx5_core_dev *dev = devlink_priv(devlink);
84 int err;
85
86 if (check) {
87 err = mlx5_eswitch_check(dev);
88 if (err)
89 return ERR_PTR(err);
90 }
91
92 return dev->priv.eswitch;
93 }
94
95 struct mlx5_eswitch *__must_check
mlx5_devlink_eswitch_get(struct devlink * devlink)96 mlx5_devlink_eswitch_get(struct devlink *devlink)
97 {
98 return __mlx5_devlink_eswitch_get(devlink, true);
99 }
100
mlx5_devlink_eswitch_nocheck_get(struct devlink * devlink)101 struct mlx5_eswitch *mlx5_devlink_eswitch_nocheck_get(struct devlink *devlink)
102 {
103 return __mlx5_devlink_eswitch_get(devlink, false);
104 }
105
106 struct mlx5_vport *__must_check
mlx5_eswitch_get_vport(struct mlx5_eswitch * esw,u16 vport_num)107 mlx5_eswitch_get_vport(struct mlx5_eswitch *esw, u16 vport_num)
108 {
109 struct mlx5_vport *vport;
110
111 if (!esw)
112 return ERR_PTR(-EPERM);
113
114 vport = xa_load(&esw->vports, vport_num);
115 if (!vport) {
116 esw_debug(esw->dev, "vport out of range: num(0x%x)\n", vport_num);
117 return ERR_PTR(-EINVAL);
118 }
119 return vport;
120 }
121
arm_vport_context_events_cmd(struct mlx5_core_dev * dev,u16 vport,u32 events_mask)122 static int arm_vport_context_events_cmd(struct mlx5_core_dev *dev, u16 vport,
123 u32 events_mask)
124 {
125 u32 in[MLX5_ST_SZ_DW(modify_nic_vport_context_in)] = {};
126 void *nic_vport_ctx;
127
128 MLX5_SET(modify_nic_vport_context_in, in,
129 opcode, MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
130 MLX5_SET(modify_nic_vport_context_in, in, field_select.change_event, 1);
131 MLX5_SET(modify_nic_vport_context_in, in, vport_number, vport);
132 if (vport || mlx5_core_is_ecpf(dev))
133 MLX5_SET(modify_nic_vport_context_in, in, other_vport, 1);
134 nic_vport_ctx = MLX5_ADDR_OF(modify_nic_vport_context_in,
135 in, nic_vport_context);
136
137 MLX5_SET(nic_vport_context, nic_vport_ctx, arm_change_event, 1);
138
139 if (events_mask & MLX5_VPORT_UC_ADDR_CHANGE)
140 MLX5_SET(nic_vport_context, nic_vport_ctx,
141 event_on_uc_address_change, 1);
142 if (events_mask & MLX5_VPORT_MC_ADDR_CHANGE)
143 MLX5_SET(nic_vport_context, nic_vport_ctx,
144 event_on_mc_address_change, 1);
145 if (events_mask & MLX5_VPORT_PROMISC_CHANGE)
146 MLX5_SET(nic_vport_context, nic_vport_ctx,
147 event_on_promisc_change, 1);
148
149 return mlx5_cmd_exec_in(dev, modify_nic_vport_context, in);
150 }
151
152 /* E-Switch vport context HW commands */
mlx5_eswitch_modify_esw_vport_context(struct mlx5_core_dev * dev,u16 vport,bool other_vport,void * in)153 int mlx5_eswitch_modify_esw_vport_context(struct mlx5_core_dev *dev, u16 vport,
154 bool other_vport, void *in)
155 {
156 MLX5_SET(modify_esw_vport_context_in, in, opcode,
157 MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT);
158 MLX5_SET(modify_esw_vport_context_in, in, vport_number, vport);
159 MLX5_SET(modify_esw_vport_context_in, in, other_vport, other_vport);
160 return mlx5_cmd_exec_in(dev, modify_esw_vport_context, in);
161 }
162
modify_esw_vport_cvlan(struct mlx5_core_dev * dev,u16 vport,u16 vlan,u8 qos,u8 set_flags)163 static int modify_esw_vport_cvlan(struct mlx5_core_dev *dev, u16 vport,
164 u16 vlan, u8 qos, u8 set_flags)
165 {
166 u32 in[MLX5_ST_SZ_DW(modify_esw_vport_context_in)] = {};
167
168 if (!MLX5_CAP_ESW(dev, vport_cvlan_strip) ||
169 !MLX5_CAP_ESW(dev, vport_cvlan_insert_if_not_exist))
170 return -EOPNOTSUPP;
171
172 esw_debug(dev, "Set Vport[%d] VLAN %d qos %d set=%x\n",
173 vport, vlan, qos, set_flags);
174
175 if (set_flags & SET_VLAN_STRIP)
176 MLX5_SET(modify_esw_vport_context_in, in,
177 esw_vport_context.vport_cvlan_strip, 1);
178
179 if (set_flags & SET_VLAN_INSERT) {
180 if (MLX5_CAP_ESW(dev, vport_cvlan_insert_always)) {
181 /* insert either if vlan exist in packet or not */
182 MLX5_SET(modify_esw_vport_context_in, in,
183 esw_vport_context.vport_cvlan_insert,
184 MLX5_VPORT_CVLAN_INSERT_ALWAYS);
185 } else {
186 /* insert only if no vlan in packet */
187 MLX5_SET(modify_esw_vport_context_in, in,
188 esw_vport_context.vport_cvlan_insert,
189 MLX5_VPORT_CVLAN_INSERT_WHEN_NO_CVLAN);
190 }
191 MLX5_SET(modify_esw_vport_context_in, in,
192 esw_vport_context.cvlan_pcp, qos);
193 MLX5_SET(modify_esw_vport_context_in, in,
194 esw_vport_context.cvlan_id, vlan);
195 }
196
197 MLX5_SET(modify_esw_vport_context_in, in,
198 field_select.vport_cvlan_strip, 1);
199 MLX5_SET(modify_esw_vport_context_in, in,
200 field_select.vport_cvlan_insert, 1);
201
202 return mlx5_eswitch_modify_esw_vport_context(dev, vport, true, in);
203 }
204
205 /* E-Switch FDB */
206 static struct mlx5_flow_handle *
__esw_fdb_set_vport_rule(struct mlx5_eswitch * esw,u16 vport,bool rx_rule,u8 mac_c[ETH_ALEN],u8 mac_v[ETH_ALEN])207 __esw_fdb_set_vport_rule(struct mlx5_eswitch *esw, u16 vport, bool rx_rule,
208 u8 mac_c[ETH_ALEN], u8 mac_v[ETH_ALEN])
209 {
210 int match_header = (is_zero_ether_addr(mac_c) ? 0 :
211 MLX5_MATCH_OUTER_HEADERS);
212 struct mlx5_flow_handle *flow_rule = NULL;
213 struct mlx5_flow_act flow_act = {0};
214 struct mlx5_flow_destination dest = {};
215 struct mlx5_flow_spec *spec;
216 void *mv_misc = NULL;
217 void *mc_misc = NULL;
218 u8 *dmac_v = NULL;
219 u8 *dmac_c = NULL;
220
221 if (rx_rule)
222 match_header |= MLX5_MATCH_MISC_PARAMETERS;
223
224 spec = kvzalloc_obj(*spec);
225 if (!spec)
226 return NULL;
227
228 dmac_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
229 outer_headers.dmac_47_16);
230 dmac_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
231 outer_headers.dmac_47_16);
232
233 if (match_header & MLX5_MATCH_OUTER_HEADERS) {
234 ether_addr_copy(dmac_v, mac_v);
235 ether_addr_copy(dmac_c, mac_c);
236 }
237
238 if (match_header & MLX5_MATCH_MISC_PARAMETERS) {
239 mv_misc = MLX5_ADDR_OF(fte_match_param, spec->match_value,
240 misc_parameters);
241 mc_misc = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
242 misc_parameters);
243 MLX5_SET(fte_match_set_misc, mv_misc, source_port, MLX5_VPORT_UPLINK);
244 MLX5_SET_TO_ONES(fte_match_set_misc, mc_misc, source_port);
245 }
246
247 dest.type = MLX5_FLOW_DESTINATION_TYPE_VPORT;
248 dest.vport.num = vport;
249
250 esw_debug(esw->dev,
251 "\tFDB add rule dmac_v(%pM) dmac_c(%pM) -> vport(%d)\n",
252 dmac_v, dmac_c, vport);
253 spec->match_criteria_enable = match_header;
254 flow_act.action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
255 flow_rule =
256 mlx5_add_flow_rules(esw->fdb_table.legacy.fdb, spec,
257 &flow_act, &dest, 1);
258 if (IS_ERR(flow_rule)) {
259 esw_warn(esw->dev,
260 "FDB: Failed to add flow rule: dmac_v(%pM) dmac_c(%pM) -> vport(%d), err(%pe)\n",
261 dmac_v, dmac_c, vport, flow_rule);
262 flow_rule = NULL;
263 }
264
265 kvfree(spec);
266 return flow_rule;
267 }
268
269 static struct mlx5_flow_handle *
esw_fdb_set_vport_rule(struct mlx5_eswitch * esw,u8 mac[ETH_ALEN],u16 vport)270 esw_fdb_set_vport_rule(struct mlx5_eswitch *esw, u8 mac[ETH_ALEN], u16 vport)
271 {
272 u8 mac_c[ETH_ALEN];
273
274 eth_broadcast_addr(mac_c);
275 return __esw_fdb_set_vport_rule(esw, vport, false, mac_c, mac);
276 }
277
278 static struct mlx5_flow_handle *
esw_fdb_set_vport_allmulti_rule(struct mlx5_eswitch * esw,u16 vport)279 esw_fdb_set_vport_allmulti_rule(struct mlx5_eswitch *esw, u16 vport)
280 {
281 u8 mac_c[ETH_ALEN];
282 u8 mac_v[ETH_ALEN];
283
284 eth_zero_addr(mac_c);
285 eth_zero_addr(mac_v);
286 mac_c[0] = 0x01;
287 mac_v[0] = 0x01;
288 return __esw_fdb_set_vport_rule(esw, vport, false, mac_c, mac_v);
289 }
290
291 static struct mlx5_flow_handle *
esw_fdb_set_vport_promisc_rule(struct mlx5_eswitch * esw,u16 vport)292 esw_fdb_set_vport_promisc_rule(struct mlx5_eswitch *esw, u16 vport)
293 {
294 u8 mac_c[ETH_ALEN];
295 u8 mac_v[ETH_ALEN];
296
297 eth_zero_addr(mac_c);
298 eth_zero_addr(mac_v);
299 return __esw_fdb_set_vport_rule(esw, vport, true, mac_c, mac_v);
300 }
301
302 /* E-Switch vport UC/MC lists management */
303 typedef int (*vport_addr_action)(struct mlx5_eswitch *esw,
304 struct vport_addr *vaddr);
305
esw_add_uc_addr(struct mlx5_eswitch * esw,struct vport_addr * vaddr)306 static int esw_add_uc_addr(struct mlx5_eswitch *esw, struct vport_addr *vaddr)
307 {
308 u8 *mac = vaddr->node.addr;
309 u16 vport = vaddr->vport;
310 int err;
311
312 /* Skip mlx5_mpfs_add_mac for eswitch_managers,
313 * it is already done by its netdev in mlx5e_execute_l2_action
314 */
315 if (mlx5_esw_is_manager_vport(esw, vport))
316 goto fdb_add;
317
318 err = mlx5_mpfs_add_mac(esw->dev, mac);
319 if (err) {
320 esw_warn(esw->dev,
321 "Failed to add L2 table mac(%pM) for vport(0x%x), err(%d)\n",
322 mac, vport, err);
323 return err;
324 }
325 vaddr->mpfs = true;
326
327 fdb_add:
328 /* SRIOV is enabled: Forward UC MAC to vport */
329 if (esw->fdb_table.legacy.fdb && esw->mode == MLX5_ESWITCH_LEGACY) {
330 vaddr->flow_rule = esw_fdb_set_vport_rule(esw, mac, vport);
331
332 esw_debug(esw->dev, "\tADDED UC MAC: vport[%d] %pM fr(%p)\n",
333 vport, mac, vaddr->flow_rule);
334 }
335
336 return 0;
337 }
338
esw_del_uc_addr(struct mlx5_eswitch * esw,struct vport_addr * vaddr)339 static int esw_del_uc_addr(struct mlx5_eswitch *esw, struct vport_addr *vaddr)
340 {
341 u8 *mac = vaddr->node.addr;
342 u16 vport = vaddr->vport;
343 int err = 0;
344
345 /* Skip mlx5_mpfs_del_mac for eswitch managers,
346 * it is already done by its netdev in mlx5e_execute_l2_action
347 */
348 if (!vaddr->mpfs || mlx5_esw_is_manager_vport(esw, vport))
349 goto fdb_del;
350
351 err = mlx5_mpfs_del_mac(esw->dev, mac);
352 if (err)
353 esw_warn(esw->dev,
354 "Failed to del L2 table mac(%pM) for vport(%d), err(%d)\n",
355 mac, vport, err);
356 vaddr->mpfs = false;
357
358 fdb_del:
359 if (vaddr->flow_rule)
360 mlx5_del_flow_rules(vaddr->flow_rule);
361 vaddr->flow_rule = NULL;
362
363 return 0;
364 }
365
update_allmulti_vports(struct mlx5_eswitch * esw,struct vport_addr * vaddr,struct esw_mc_addr * esw_mc)366 static void update_allmulti_vports(struct mlx5_eswitch *esw,
367 struct vport_addr *vaddr,
368 struct esw_mc_addr *esw_mc)
369 {
370 u8 *mac = vaddr->node.addr;
371 struct mlx5_vport *vport;
372 unsigned long i;
373 u16 vport_num;
374
375 mlx5_esw_for_each_vport(esw, i, vport) {
376 struct hlist_head *vport_hash = vport->mc_list;
377 struct vport_addr *iter_vaddr =
378 l2addr_hash_find(vport_hash,
379 mac,
380 struct vport_addr);
381 vport_num = vport->vport;
382 if (IS_ERR_OR_NULL(vport->allmulti_rule) ||
383 vaddr->vport == vport_num)
384 continue;
385 switch (vaddr->action) {
386 case MLX5_ACTION_ADD:
387 if (iter_vaddr)
388 continue;
389 iter_vaddr = l2addr_hash_add(vport_hash, mac,
390 struct vport_addr,
391 GFP_KERNEL);
392 if (!iter_vaddr) {
393 esw_warn(esw->dev,
394 "ALL-MULTI: Failed to add MAC(%pM) to vport[%d] DB\n",
395 mac, vport_num);
396 continue;
397 }
398 iter_vaddr->vport = vport_num;
399 iter_vaddr->flow_rule =
400 esw_fdb_set_vport_rule(esw,
401 mac,
402 vport_num);
403 iter_vaddr->mc_promisc = true;
404 break;
405 case MLX5_ACTION_DEL:
406 if (!iter_vaddr)
407 continue;
408 mlx5_del_flow_rules(iter_vaddr->flow_rule);
409 l2addr_hash_del(iter_vaddr);
410 break;
411 }
412 }
413 }
414
esw_add_mc_addr(struct mlx5_eswitch * esw,struct vport_addr * vaddr)415 static int esw_add_mc_addr(struct mlx5_eswitch *esw, struct vport_addr *vaddr)
416 {
417 struct hlist_head *hash = esw->mc_table;
418 struct esw_mc_addr *esw_mc;
419 u8 *mac = vaddr->node.addr;
420 u16 vport = vaddr->vport;
421
422 if (!esw->fdb_table.legacy.fdb)
423 return 0;
424
425 esw_mc = l2addr_hash_find(hash, mac, struct esw_mc_addr);
426 if (esw_mc)
427 goto add;
428
429 esw_mc = l2addr_hash_add(hash, mac, struct esw_mc_addr, GFP_KERNEL);
430 if (!esw_mc)
431 return -ENOMEM;
432
433 esw_mc->uplink_rule = /* Forward MC MAC to Uplink */
434 esw_fdb_set_vport_rule(esw, mac, MLX5_VPORT_UPLINK);
435
436 /* Add this multicast mac to all the mc promiscuous vports */
437 update_allmulti_vports(esw, vaddr, esw_mc);
438
439 add:
440 /* If the multicast mac is added as a result of mc promiscuous vport,
441 * don't increment the multicast ref count
442 */
443 if (!vaddr->mc_promisc)
444 esw_mc->refcnt++;
445
446 /* Forward MC MAC to vport */
447 vaddr->flow_rule = esw_fdb_set_vport_rule(esw, mac, vport);
448 esw_debug(esw->dev,
449 "\tADDED MC MAC: vport[%d] %pM fr(%p) refcnt(%d) uplinkfr(%p)\n",
450 vport, mac, vaddr->flow_rule,
451 esw_mc->refcnt, esw_mc->uplink_rule);
452 return 0;
453 }
454
esw_del_mc_addr(struct mlx5_eswitch * esw,struct vport_addr * vaddr)455 static int esw_del_mc_addr(struct mlx5_eswitch *esw, struct vport_addr *vaddr)
456 {
457 struct hlist_head *hash = esw->mc_table;
458 struct esw_mc_addr *esw_mc;
459 u8 *mac = vaddr->node.addr;
460 u16 vport = vaddr->vport;
461
462 if (!esw->fdb_table.legacy.fdb)
463 return 0;
464
465 esw_mc = l2addr_hash_find(hash, mac, struct esw_mc_addr);
466 if (!esw_mc) {
467 esw_warn(esw->dev,
468 "Failed to find eswitch MC addr for MAC(%pM) vport(%d)",
469 mac, vport);
470 return -EINVAL;
471 }
472 esw_debug(esw->dev,
473 "\tDELETE MC MAC: vport[%d] %pM fr(%p) refcnt(%d) uplinkfr(%p)\n",
474 vport, mac, vaddr->flow_rule, esw_mc->refcnt,
475 esw_mc->uplink_rule);
476
477 if (vaddr->flow_rule)
478 mlx5_del_flow_rules(vaddr->flow_rule);
479 vaddr->flow_rule = NULL;
480
481 /* If the multicast mac is added as a result of mc promiscuous vport,
482 * don't decrement the multicast ref count.
483 */
484 if (vaddr->mc_promisc || (--esw_mc->refcnt > 0))
485 return 0;
486
487 /* Remove this multicast mac from all the mc promiscuous vports */
488 update_allmulti_vports(esw, vaddr, esw_mc);
489
490 if (esw_mc->uplink_rule)
491 mlx5_del_flow_rules(esw_mc->uplink_rule);
492
493 l2addr_hash_del(esw_mc);
494 return 0;
495 }
496
497 /* Apply vport UC/MC list to HW l2 table and FDB table */
esw_apply_vport_addr_list(struct mlx5_eswitch * esw,struct mlx5_vport * vport,int list_type)498 static void esw_apply_vport_addr_list(struct mlx5_eswitch *esw,
499 struct mlx5_vport *vport, int list_type)
500 {
501 bool is_uc = list_type == MLX5_NVPRT_LIST_TYPE_UC;
502 vport_addr_action vport_addr_add;
503 vport_addr_action vport_addr_del;
504 struct vport_addr *addr;
505 struct l2addr_node *node;
506 struct hlist_head *hash;
507 struct hlist_node *tmp;
508 int hi;
509
510 vport_addr_add = is_uc ? esw_add_uc_addr :
511 esw_add_mc_addr;
512 vport_addr_del = is_uc ? esw_del_uc_addr :
513 esw_del_mc_addr;
514
515 hash = is_uc ? vport->uc_list : vport->mc_list;
516 for_each_l2hash_node(node, tmp, hash, hi) {
517 addr = container_of(node, struct vport_addr, node);
518 switch (addr->action) {
519 case MLX5_ACTION_ADD:
520 vport_addr_add(esw, addr);
521 addr->action = MLX5_ACTION_NONE;
522 break;
523 case MLX5_ACTION_DEL:
524 vport_addr_del(esw, addr);
525 l2addr_hash_del(addr);
526 break;
527 }
528 }
529 }
530
531 /* Sync vport UC/MC list from vport context */
esw_update_vport_addr_list(struct mlx5_eswitch * esw,struct mlx5_vport * vport,int list_type)532 static void esw_update_vport_addr_list(struct mlx5_eswitch *esw,
533 struct mlx5_vport *vport, int list_type)
534 {
535 bool is_uc = list_type == MLX5_NVPRT_LIST_TYPE_UC;
536 u8 (*mac_list)[ETH_ALEN];
537 struct l2addr_node *node;
538 struct vport_addr *addr;
539 struct hlist_head *hash;
540 struct hlist_node *tmp;
541 int size;
542 int err;
543 int hi;
544 int i;
545
546 size = is_uc ? MLX5_MAX_UC_PER_VPORT(esw->dev) :
547 MLX5_MAX_MC_PER_VPORT(esw->dev);
548
549 mac_list = kcalloc(size, ETH_ALEN, GFP_KERNEL);
550 if (!mac_list)
551 return;
552
553 hash = is_uc ? vport->uc_list : vport->mc_list;
554
555 for_each_l2hash_node(node, tmp, hash, hi) {
556 addr = container_of(node, struct vport_addr, node);
557 addr->action = MLX5_ACTION_DEL;
558 }
559
560 if (!vport->enabled)
561 goto out;
562
563 err = mlx5_query_nic_vport_mac_list(esw->dev, vport->vport, list_type,
564 mac_list, &size);
565 if (err)
566 goto out;
567 esw_debug(esw->dev, "vport[%d] context update %s list size (%d)\n",
568 vport->vport, is_uc ? "UC" : "MC", size);
569
570 for (i = 0; i < size; i++) {
571 if (is_uc && !is_valid_ether_addr(mac_list[i]))
572 continue;
573
574 if (!is_uc && !is_multicast_ether_addr(mac_list[i]))
575 continue;
576
577 addr = l2addr_hash_find(hash, mac_list[i], struct vport_addr);
578 if (addr) {
579 addr->action = MLX5_ACTION_NONE;
580 /* If this mac was previously added because of allmulti
581 * promiscuous rx mode, its now converted to be original
582 * vport mac.
583 */
584 if (addr->mc_promisc) {
585 struct esw_mc_addr *esw_mc =
586 l2addr_hash_find(esw->mc_table,
587 mac_list[i],
588 struct esw_mc_addr);
589 if (!esw_mc) {
590 esw_warn(esw->dev,
591 "Failed to MAC(%pM) in mcast DB\n",
592 mac_list[i]);
593 continue;
594 }
595 esw_mc->refcnt++;
596 addr->mc_promisc = false;
597 }
598 continue;
599 }
600
601 addr = l2addr_hash_add(hash, mac_list[i], struct vport_addr,
602 GFP_KERNEL);
603 if (!addr) {
604 esw_warn(esw->dev,
605 "Failed to add MAC(%pM) to vport[%d] DB\n",
606 mac_list[i], vport->vport);
607 continue;
608 }
609 addr->vport = vport->vport;
610 addr->action = MLX5_ACTION_ADD;
611 }
612 out:
613 kfree(mac_list);
614 }
615
616 /* Sync vport UC/MC list from vport context
617 * Must be called after esw_update_vport_addr_list
618 */
esw_update_vport_mc_promisc(struct mlx5_eswitch * esw,struct mlx5_vport * vport)619 static void esw_update_vport_mc_promisc(struct mlx5_eswitch *esw,
620 struct mlx5_vport *vport)
621 {
622 struct l2addr_node *node;
623 struct vport_addr *addr;
624 struct hlist_head *hash;
625 struct hlist_node *tmp;
626 int hi;
627
628 hash = vport->mc_list;
629
630 for_each_l2hash_node(node, tmp, esw->mc_table, hi) {
631 u8 *mac = node->addr;
632
633 addr = l2addr_hash_find(hash, mac, struct vport_addr);
634 if (addr) {
635 if (addr->action == MLX5_ACTION_DEL)
636 addr->action = MLX5_ACTION_NONE;
637 continue;
638 }
639 addr = l2addr_hash_add(hash, mac, struct vport_addr,
640 GFP_KERNEL);
641 if (!addr) {
642 esw_warn(esw->dev,
643 "Failed to add allmulti MAC(%pM) to vport[%d] DB\n",
644 mac, vport->vport);
645 continue;
646 }
647 addr->vport = vport->vport;
648 addr->action = MLX5_ACTION_ADD;
649 addr->mc_promisc = true;
650 }
651 }
652
653 /* Apply vport rx mode to HW FDB table */
esw_apply_vport_rx_mode(struct mlx5_eswitch * esw,struct mlx5_vport * vport,bool promisc,bool mc_promisc)654 static void esw_apply_vport_rx_mode(struct mlx5_eswitch *esw,
655 struct mlx5_vport *vport,
656 bool promisc, bool mc_promisc)
657 {
658 struct esw_mc_addr *allmulti_addr = &esw->mc_promisc;
659
660 if (IS_ERR_OR_NULL(vport->allmulti_rule) != mc_promisc)
661 goto promisc;
662
663 if (mc_promisc) {
664 vport->allmulti_rule =
665 esw_fdb_set_vport_allmulti_rule(esw, vport->vport);
666 if (!allmulti_addr->uplink_rule)
667 allmulti_addr->uplink_rule =
668 esw_fdb_set_vport_allmulti_rule(esw,
669 MLX5_VPORT_UPLINK);
670 allmulti_addr->refcnt++;
671 } else if (vport->allmulti_rule) {
672 mlx5_del_flow_rules(vport->allmulti_rule);
673 vport->allmulti_rule = NULL;
674
675 if (--allmulti_addr->refcnt > 0)
676 goto promisc;
677
678 if (allmulti_addr->uplink_rule)
679 mlx5_del_flow_rules(allmulti_addr->uplink_rule);
680 allmulti_addr->uplink_rule = NULL;
681 }
682
683 promisc:
684 if (IS_ERR_OR_NULL(vport->promisc_rule) != promisc)
685 return;
686
687 if (promisc) {
688 vport->promisc_rule =
689 esw_fdb_set_vport_promisc_rule(esw, vport->vport);
690 } else if (vport->promisc_rule) {
691 mlx5_del_flow_rules(vport->promisc_rule);
692 vport->promisc_rule = NULL;
693 }
694 }
695
696 /* Sync vport rx mode from vport context */
esw_update_vport_rx_mode(struct mlx5_eswitch * esw,struct mlx5_vport * vport)697 static void esw_update_vport_rx_mode(struct mlx5_eswitch *esw,
698 struct mlx5_vport *vport)
699 {
700 int promisc_all = 0;
701 int promisc_uc = 0;
702 int promisc_mc = 0;
703 int err;
704
705 err = mlx5_query_nic_vport_promisc(esw->dev,
706 vport->vport,
707 &promisc_uc,
708 &promisc_mc,
709 &promisc_all);
710 if (err)
711 return;
712 esw_debug(esw->dev, "vport[%d] context update rx mode promisc_all=%d, all_multi=%d\n",
713 vport->vport, promisc_all, promisc_mc);
714
715 if (!vport->info.trusted || !vport->enabled) {
716 promisc_uc = 0;
717 promisc_mc = 0;
718 promisc_all = 0;
719 }
720
721 esw_apply_vport_rx_mode(esw, vport, promisc_all,
722 (promisc_all || promisc_mc));
723 }
724
esw_vport_change_handle_locked(struct mlx5_vport * vport)725 void esw_vport_change_handle_locked(struct mlx5_vport *vport)
726 {
727 struct mlx5_core_dev *dev = vport->dev;
728 struct mlx5_eswitch *esw = dev->priv.eswitch;
729 u8 mac[ETH_ALEN];
730
731 if (!MLX5_CAP_GEN(dev, log_max_l2_table))
732 return;
733
734 mlx5_query_nic_vport_mac_address(dev, vport->vport, true, mac);
735 esw_debug(dev, "vport[%d] Context Changed: perm mac: %pM\n",
736 vport->vport, mac);
737
738 if (vport->enabled_events & MLX5_VPORT_UC_ADDR_CHANGE) {
739 esw_update_vport_addr_list(esw, vport, MLX5_NVPRT_LIST_TYPE_UC);
740 esw_apply_vport_addr_list(esw, vport, MLX5_NVPRT_LIST_TYPE_UC);
741 }
742
743 if (vport->enabled_events & MLX5_VPORT_MC_ADDR_CHANGE)
744 esw_update_vport_addr_list(esw, vport, MLX5_NVPRT_LIST_TYPE_MC);
745
746 if (vport->enabled_events & MLX5_VPORT_PROMISC_CHANGE) {
747 esw_update_vport_rx_mode(esw, vport);
748 if (!IS_ERR_OR_NULL(vport->allmulti_rule))
749 esw_update_vport_mc_promisc(esw, vport);
750 }
751
752 if (vport->enabled_events & (MLX5_VPORT_PROMISC_CHANGE | MLX5_VPORT_MC_ADDR_CHANGE))
753 esw_apply_vport_addr_list(esw, vport, MLX5_NVPRT_LIST_TYPE_MC);
754
755 esw_debug(esw->dev, "vport[%d] Context Changed: Done\n", vport->vport);
756 if (vport->enabled)
757 arm_vport_context_events_cmd(dev, vport->vport,
758 vport->enabled_events);
759 }
760
esw_vport_change_handler(struct work_struct * work)761 static void esw_vport_change_handler(struct work_struct *work)
762 {
763 struct mlx5_vport *vport =
764 container_of(work, struct mlx5_vport, vport_change_handler);
765 struct mlx5_eswitch *esw = vport->dev->priv.eswitch;
766
767 mutex_lock(&esw->state_lock);
768 esw_vport_change_handle_locked(vport);
769 mutex_unlock(&esw->state_lock);
770 }
771
node_guid_gen_from_mac(u64 * node_guid,const u8 * mac)772 static void node_guid_gen_from_mac(u64 *node_guid, const u8 *mac)
773 {
774 ((u8 *)node_guid)[7] = mac[0];
775 ((u8 *)node_guid)[6] = mac[1];
776 ((u8 *)node_guid)[5] = mac[2];
777 ((u8 *)node_guid)[4] = 0xff;
778 ((u8 *)node_guid)[3] = 0xfe;
779 ((u8 *)node_guid)[2] = mac[3];
780 ((u8 *)node_guid)[1] = mac[4];
781 ((u8 *)node_guid)[0] = mac[5];
782 }
783
esw_vport_setup_acl(struct mlx5_eswitch * esw,struct mlx5_vport * vport)784 static int esw_vport_setup_acl(struct mlx5_eswitch *esw,
785 struct mlx5_vport *vport)
786 {
787 if (esw->mode == MLX5_ESWITCH_LEGACY)
788 return esw_legacy_vport_acl_setup(esw, vport);
789 else
790 return esw_vport_create_offloads_acl_tables(esw, vport);
791 }
792
esw_vport_cleanup_acl(struct mlx5_eswitch * esw,struct mlx5_vport * vport)793 static void esw_vport_cleanup_acl(struct mlx5_eswitch *esw,
794 struct mlx5_vport *vport)
795 {
796 if (esw->mode == MLX5_ESWITCH_LEGACY)
797 esw_legacy_vport_acl_cleanup(esw, vport);
798 else
799 esw_vport_destroy_offloads_acl_tables(esw, vport);
800 }
801
mlx5_esw_vport_caps_get(struct mlx5_eswitch * esw,struct mlx5_vport * vport)802 static int mlx5_esw_vport_caps_get(struct mlx5_eswitch *esw, struct mlx5_vport *vport)
803 {
804 int query_out_sz = MLX5_ST_SZ_BYTES(query_hca_cap_out);
805 void *query_ctx;
806 void *hca_caps;
807 int err;
808
809 if (!MLX5_CAP_GEN(esw->dev, vhca_resource_manager))
810 return 0;
811
812 query_ctx = kzalloc(query_out_sz, GFP_KERNEL);
813 if (!query_ctx)
814 return -ENOMEM;
815
816 err = mlx5_vport_get_other_func_cap(esw->dev, vport->vport, query_ctx,
817 MLX5_CAP_GENERAL);
818 if (err)
819 goto out_free;
820
821 hca_caps = MLX5_ADDR_OF(query_hca_cap_out, query_ctx, capability);
822 vport->info.roce_enabled = MLX5_GET(cmd_hca_cap, hca_caps, roce);
823 vport->vhca_id = MLX5_GET(cmd_hca_cap, hca_caps, vhca_id);
824
825 if (!MLX5_CAP_GEN_MAX(esw->dev, hca_cap_2))
826 goto out_free;
827
828 memset(query_ctx, 0, query_out_sz);
829 err = mlx5_vport_get_other_func_cap(esw->dev, vport->vport, query_ctx,
830 MLX5_CAP_GENERAL_2);
831 if (err)
832 goto out_free;
833
834 hca_caps = MLX5_ADDR_OF(query_hca_cap_out, query_ctx, capability);
835 vport->info.mig_enabled = MLX5_GET(cmd_hca_cap_2, hca_caps, migratable);
836
837 err = mlx5_esw_ipsec_vf_offload_get(esw->dev, vport);
838 out_free:
839 kfree(query_ctx);
840 return err;
841 }
842
mlx5_esw_vport_vhca_id(struct mlx5_eswitch * esw,u16 vportn,u16 * vhca_id)843 bool mlx5_esw_vport_vhca_id(struct mlx5_eswitch *esw, u16 vportn, u16 *vhca_id)
844 {
845 struct mlx5_vport *vport;
846
847 vport = mlx5_eswitch_get_vport(esw, vportn);
848 if (IS_ERR(vport) || MLX5_VPORT_INVAL_VHCA_ID(vport))
849 return false;
850
851 *vhca_id = vport->vhca_id;
852 return true;
853 }
854
esw_vport_setup(struct mlx5_eswitch * esw,struct mlx5_vport * vport)855 static int esw_vport_setup(struct mlx5_eswitch *esw, struct mlx5_vport *vport)
856 {
857 bool vst_mode_steering = esw_vst_mode_is_steering(esw);
858 u16 vport_num = vport->vport;
859 int flags;
860 int err;
861
862 err = esw_vport_setup_acl(esw, vport);
863 if (err)
864 return err;
865
866 if (mlx5_esw_is_manager_vport(esw, vport_num))
867 return 0;
868
869 err = mlx5_esw_vport_caps_get(esw, vport);
870 if (err)
871 goto err_caps;
872
873 mlx5_modify_vport_admin_state(esw->dev,
874 MLX5_VPORT_STATE_OP_MOD_ESW_VPORT,
875 vport_num, 1,
876 vport->info.link_state);
877
878 mlx5_query_nic_vport_mac_address(esw->dev, vport_num, true,
879 vport->info.mac);
880 mlx5_query_nic_vport_node_guid(esw->dev, vport_num, true,
881 &vport->info.node_guid);
882
883 flags = (vport->info.vlan || vport->info.qos) ?
884 SET_VLAN_STRIP | SET_VLAN_INSERT : 0;
885 if (esw->mode == MLX5_ESWITCH_OFFLOADS || !vst_mode_steering)
886 modify_esw_vport_cvlan(esw->dev, vport_num, vport->info.vlan,
887 vport->info.qos, flags);
888
889 return 0;
890
891 err_caps:
892 esw_vport_cleanup_acl(esw, vport);
893 return err;
894 }
895
896 /* Don't cleanup vport->info, it's needed to restore vport configuration */
esw_vport_cleanup(struct mlx5_eswitch * esw,struct mlx5_vport * vport)897 static void esw_vport_cleanup(struct mlx5_eswitch *esw, struct mlx5_vport *vport)
898 {
899 u16 vport_num = vport->vport;
900
901 if (!mlx5_esw_is_manager_vport(esw, vport_num))
902 mlx5_modify_vport_admin_state(esw->dev,
903 MLX5_VPORT_STATE_OP_MOD_ESW_VPORT,
904 vport_num, 1,
905 MLX5_VPORT_ADMIN_STATE_DOWN);
906
907 mlx5_esw_qos_vport_disable(vport);
908 esw_vport_cleanup_acl(esw, vport);
909 }
910
mlx5_esw_vport_set_max_tx_speed(struct mlx5_eswitch * esw,struct mlx5_vport * vport)911 static void mlx5_esw_vport_set_max_tx_speed(struct mlx5_eswitch *esw,
912 struct mlx5_vport *vport)
913 {
914 int ret;
915
916 if (!MLX5_CAP_ESW(esw->dev, esw_vport_state_max_tx_speed))
917 return;
918
919 ret = mlx5_modify_vport_max_tx_speed(esw->dev,
920 MLX5_VPORT_STATE_OP_MOD_ESW_VPORT,
921 vport->vport, true,
922 vport->agg_max_tx_speed);
923 if (ret)
924 mlx5_core_dbg(esw->dev,
925 "Failed to set vport %d speed %d, err=%d\n",
926 vport->vport, vport->agg_max_tx_speed, ret);
927 }
928
mlx5_esw_vport_enable(struct mlx5_eswitch * esw,struct mlx5_vport * vport,enum mlx5_eswitch_vport_event enabled_events)929 int mlx5_esw_vport_enable(struct mlx5_eswitch *esw, struct mlx5_vport *vport,
930 enum mlx5_eswitch_vport_event enabled_events)
931 {
932 u16 vport_num = vport->vport;
933 int ret;
934
935 mutex_lock(&esw->state_lock);
936 WARN_ON(vport->enabled);
937
938 esw_debug(esw->dev, "Enabling VPORT(%d)\n", vport_num);
939
940 ret = esw_vport_setup(esw, vport);
941 if (ret)
942 goto done;
943
944 /* Sync with current vport context */
945 vport->enabled_events = enabled_events;
946 vport->enabled = true;
947 if (vport->vport != MLX5_VPORT_PF &&
948 (vport->info.ipsec_crypto_enabled || vport->info.ipsec_packet_enabled))
949 esw->enabled_ipsec_vf_count++;
950
951 /* Esw manager is trusted by default. Host PF (vport 0) is trusted as well
952 * in smartNIC as it's a vport group manager.
953 */
954 if (mlx5_esw_is_manager_vport(esw, vport_num) ||
955 (!vport_num && mlx5_core_is_ecpf(esw->dev)))
956 vport->info.trusted = true;
957
958 if (!mlx5_esw_is_manager_vport(esw, vport_num) &&
959 MLX5_CAP_GEN(esw->dev, vhca_resource_manager)) {
960 ret = mlx5_esw_vport_vhca_id_map(esw, vport);
961 if (ret)
962 goto err_vhca_mapping;
963 }
964
965 esw_vport_change_handle_locked(vport);
966
967 esw->enabled_vports++;
968 esw_debug(esw->dev, "Enabled VPORT(%d)\n", vport_num);
969
970 if (vport->agg_max_tx_speed)
971 mlx5_esw_vport_set_max_tx_speed(esw, vport);
972 done:
973 mutex_unlock(&esw->state_lock);
974 return ret;
975
976 err_vhca_mapping:
977 esw_vport_cleanup(esw, vport);
978 mutex_unlock(&esw->state_lock);
979 return ret;
980 }
981
mlx5_esw_vport_disable(struct mlx5_eswitch * esw,struct mlx5_vport * vport)982 void mlx5_esw_vport_disable(struct mlx5_eswitch *esw, struct mlx5_vport *vport)
983 {
984 u16 vport_num = vport->vport;
985
986 mutex_lock(&esw->state_lock);
987
988 if (!vport->enabled)
989 goto done;
990
991 esw_debug(esw->dev, "Disabling vport(%d)\n", vport_num);
992 /* Mark this vport as disabled to discard new events */
993 vport->enabled = false;
994
995 /* Disable events from this vport */
996 if (MLX5_CAP_GEN(esw->dev, log_max_l2_table))
997 arm_vport_context_events_cmd(esw->dev, vport_num, 0);
998
999 if (!mlx5_esw_is_manager_vport(esw, vport_num) &&
1000 MLX5_CAP_GEN(esw->dev, vhca_resource_manager))
1001 mlx5_esw_vport_vhca_id_unmap(esw, vport);
1002
1003 if (vport->vport != MLX5_VPORT_PF &&
1004 (vport->info.ipsec_crypto_enabled || vport->info.ipsec_packet_enabled))
1005 esw->enabled_ipsec_vf_count--;
1006
1007 /* We don't assume VFs will cleanup after themselves.
1008 * Calling vport change handler while vport is disabled will cleanup
1009 * the vport resources.
1010 */
1011 esw_vport_change_handle_locked(vport);
1012 vport->enabled_events = 0;
1013 esw_apply_vport_rx_mode(esw, vport, false, false);
1014 esw_vport_cleanup(esw, vport);
1015 esw->enabled_vports--;
1016
1017 done:
1018 mutex_unlock(&esw->state_lock);
1019 }
1020
eswitch_vport_event(struct notifier_block * nb,unsigned long type,void * data)1021 static int eswitch_vport_event(struct notifier_block *nb,
1022 unsigned long type, void *data)
1023 {
1024 struct mlx5_eswitch *esw = mlx5_nb_cof(nb, struct mlx5_eswitch, nb);
1025 struct mlx5_eqe *eqe = data;
1026 struct mlx5_vport *vport;
1027 u16 vport_num;
1028
1029 vport_num = be16_to_cpu(eqe->data.vport_change.vport_num);
1030 vport = mlx5_eswitch_get_vport(esw, vport_num);
1031 if (!IS_ERR(vport))
1032 queue_work(esw->work_queue, &vport->vport_change_handler);
1033 return NOTIFY_OK;
1034 }
1035
1036 /**
1037 * mlx5_esw_query_functions - Returns raw output about functions state
1038 * @dev: Pointer to device to query
1039 *
1040 * mlx5_esw_query_functions() allocates and returns functions changed
1041 * raw output memory pointer from device on success. Otherwise returns ERR_PTR.
1042 * Caller must free the memory using kvfree() when valid pointer is returned.
1043 */
mlx5_esw_query_functions(struct mlx5_core_dev * dev)1044 const u32 *mlx5_esw_query_functions(struct mlx5_core_dev *dev)
1045 {
1046 int outlen = MLX5_ST_SZ_BYTES(query_esw_functions_out);
1047 u32 in[MLX5_ST_SZ_DW(query_esw_functions_in)] = {};
1048 u32 *out;
1049 int err;
1050
1051 out = kvzalloc(outlen, GFP_KERNEL);
1052 if (!out)
1053 return ERR_PTR(-ENOMEM);
1054
1055 MLX5_SET(query_esw_functions_in, in, opcode,
1056 MLX5_CMD_OP_QUERY_ESW_FUNCTIONS);
1057
1058 err = mlx5_cmd_exec(dev, in, sizeof(in), out, outlen);
1059 if (!err)
1060 return out;
1061
1062 kvfree(out);
1063 return ERR_PTR(err);
1064 }
1065
mlx5_esw_host_functions_enabled_query(struct mlx5_eswitch * esw)1066 static int mlx5_esw_host_functions_enabled_query(struct mlx5_eswitch *esw)
1067 {
1068 const u32 *query_host_out;
1069
1070 if (!mlx5_core_is_ecpf_esw_manager(esw->dev))
1071 return 0;
1072
1073 query_host_out = mlx5_esw_query_functions(esw->dev);
1074 if (IS_ERR(query_host_out))
1075 return PTR_ERR(query_host_out);
1076
1077 esw->esw_funcs.host_funcs_disabled =
1078 MLX5_GET(query_esw_functions_out, query_host_out,
1079 host_params_context.host_pf_not_exist);
1080
1081 kvfree(query_host_out);
1082 return 0;
1083 }
1084
mlx5_eswitch_event_handler_register(struct mlx5_eswitch * esw)1085 static void mlx5_eswitch_event_handler_register(struct mlx5_eswitch *esw)
1086 {
1087 if (esw->mode == MLX5_ESWITCH_OFFLOADS && mlx5_eswitch_is_funcs_handler(esw->dev)) {
1088 MLX5_NB_INIT(&esw->esw_funcs.nb, mlx5_esw_funcs_changed_handler,
1089 ESW_FUNCTIONS_CHANGED);
1090 mlx5_eq_notifier_register(esw->dev, &esw->esw_funcs.nb);
1091 }
1092 }
1093
mlx5_eswitch_event_handler_unregister(struct mlx5_eswitch * esw)1094 static void mlx5_eswitch_event_handler_unregister(struct mlx5_eswitch *esw)
1095 {
1096 if (esw->mode == MLX5_ESWITCH_OFFLOADS &&
1097 mlx5_eswitch_is_funcs_handler(esw->dev)) {
1098 mlx5_eq_notifier_unregister(esw->dev, &esw->esw_funcs.nb);
1099 atomic_inc(&esw->esw_funcs.generation);
1100 }
1101 }
1102
mlx5_eswitch_clear_vf_vports_info(struct mlx5_eswitch * esw)1103 static void mlx5_eswitch_clear_vf_vports_info(struct mlx5_eswitch *esw)
1104 {
1105 struct mlx5_vport *vport;
1106 unsigned long i;
1107
1108 mlx5_esw_for_each_vf_vport(esw, i, vport, esw->esw_funcs.num_vfs) {
1109 mlx5_esw_qos_vport_qos_free(vport);
1110 memset(&vport->info, 0, sizeof(vport->info));
1111 vport->info.link_state = MLX5_VPORT_ADMIN_STATE_AUTO;
1112 }
1113 }
1114
mlx5_eswitch_clear_ec_vf_vports_info(struct mlx5_eswitch * esw)1115 static void mlx5_eswitch_clear_ec_vf_vports_info(struct mlx5_eswitch *esw)
1116 {
1117 struct mlx5_vport *vport;
1118 unsigned long i;
1119
1120 mlx5_esw_for_each_ec_vf_vport(esw, i, vport, esw->esw_funcs.num_ec_vfs) {
1121 mlx5_esw_qos_vport_qos_free(vport);
1122 memset(&vport->info, 0, sizeof(vport->info));
1123 vport->info.link_state = MLX5_VPORT_ADMIN_STATE_AUTO;
1124 }
1125 }
1126
mlx5_eswitch_load_vport(struct mlx5_eswitch * esw,struct mlx5_vport * vport,enum mlx5_eswitch_vport_event enabled_events)1127 static int mlx5_eswitch_load_vport(struct mlx5_eswitch *esw, struct mlx5_vport *vport,
1128 enum mlx5_eswitch_vport_event enabled_events)
1129 {
1130 int err;
1131
1132 err = mlx5_esw_vport_enable(esw, vport, enabled_events);
1133 if (err)
1134 return err;
1135
1136 err = mlx5_esw_offloads_load_rep(esw, vport);
1137 if (err)
1138 goto err_rep;
1139
1140 return err;
1141
1142 err_rep:
1143 mlx5_esw_vport_disable(esw, vport);
1144 return err;
1145 }
1146
mlx5_eswitch_unload_vport(struct mlx5_eswitch * esw,struct mlx5_vport * vport)1147 static void mlx5_eswitch_unload_vport(struct mlx5_eswitch *esw, struct mlx5_vport *vport)
1148 {
1149 mlx5_esw_offloads_unload_rep(esw, vport);
1150 mlx5_esw_vport_disable(esw, vport);
1151 }
1152
mlx5_eswitch_load_pf_vf_vport(struct mlx5_eswitch * esw,u16 vport_num,enum mlx5_eswitch_vport_event enabled_events)1153 static int mlx5_eswitch_load_pf_vf_vport(struct mlx5_eswitch *esw, u16 vport_num,
1154 enum mlx5_eswitch_vport_event enabled_events)
1155 {
1156 struct mlx5_vport *vport;
1157 int err;
1158
1159 vport = mlx5_eswitch_get_vport(esw, vport_num);
1160 if (IS_ERR(vport))
1161 return PTR_ERR(vport);
1162
1163 err = mlx5_esw_offloads_init_pf_vf_rep(esw, vport);
1164 if (err)
1165 return err;
1166
1167 err = mlx5_eswitch_load_vport(esw, vport, enabled_events);
1168 if (err)
1169 goto err_load;
1170 return 0;
1171
1172 err_load:
1173 mlx5_esw_offloads_cleanup_pf_vf_rep(esw, vport);
1174 return err;
1175 }
1176
mlx5_eswitch_unload_pf_vf_vport(struct mlx5_eswitch * esw,u16 vport_num)1177 static void mlx5_eswitch_unload_pf_vf_vport(struct mlx5_eswitch *esw, u16 vport_num)
1178 {
1179 struct mlx5_vport *vport;
1180
1181 vport = mlx5_eswitch_get_vport(esw, vport_num);
1182 if (IS_ERR(vport))
1183 return;
1184
1185 mlx5_eswitch_unload_vport(esw, vport);
1186 mlx5_esw_offloads_cleanup_pf_vf_rep(esw, vport);
1187 }
1188
mlx5_eswitch_load_sf_vport(struct mlx5_eswitch * esw,u16 vport_num,enum mlx5_eswitch_vport_event enabled_events,struct mlx5_devlink_port * dl_port,u32 controller,u32 sfnum)1189 int mlx5_eswitch_load_sf_vport(struct mlx5_eswitch *esw, u16 vport_num,
1190 enum mlx5_eswitch_vport_event enabled_events,
1191 struct mlx5_devlink_port *dl_port, u32 controller, u32 sfnum)
1192 {
1193 struct mlx5_vport *vport;
1194 int err;
1195
1196 vport = mlx5_eswitch_get_vport(esw, vport_num);
1197 if (IS_ERR(vport))
1198 return PTR_ERR(vport);
1199
1200 err = mlx5_esw_offloads_init_sf_rep(esw, vport, dl_port, controller, sfnum);
1201 if (err)
1202 return err;
1203
1204 err = mlx5_eswitch_load_vport(esw, vport, enabled_events);
1205 if (err)
1206 goto err_load;
1207
1208 return 0;
1209
1210 err_load:
1211 mlx5_esw_offloads_cleanup_sf_rep(esw, vport);
1212 return err;
1213 }
1214
mlx5_eswitch_unload_sf_vport(struct mlx5_eswitch * esw,u16 vport_num)1215 void mlx5_eswitch_unload_sf_vport(struct mlx5_eswitch *esw, u16 vport_num)
1216 {
1217 struct mlx5_vport *vport;
1218
1219 vport = mlx5_eswitch_get_vport(esw, vport_num);
1220 if (IS_ERR(vport))
1221 return;
1222
1223 mlx5_eswitch_unload_vport(esw, vport);
1224 mlx5_esw_offloads_cleanup_sf_rep(esw, vport);
1225 }
1226
mlx5_eswitch_unload_vf_vports(struct mlx5_eswitch * esw,u16 num_vfs)1227 void mlx5_eswitch_unload_vf_vports(struct mlx5_eswitch *esw, u16 num_vfs)
1228 {
1229 struct mlx5_vport *vport;
1230 unsigned long i;
1231
1232 mlx5_esw_for_each_vf_vport(esw, i, vport, num_vfs) {
1233 /* Adjacent VFs are unloaded separately */
1234 if (!vport->enabled || vport->adjacent)
1235 continue;
1236 mlx5_eswitch_unload_pf_vf_vport(esw, vport->vport);
1237 }
1238 }
1239
mlx5_eswitch_unload_ec_vf_vports(struct mlx5_eswitch * esw,u16 num_ec_vfs)1240 static void mlx5_eswitch_unload_ec_vf_vports(struct mlx5_eswitch *esw,
1241 u16 num_ec_vfs)
1242 {
1243 struct mlx5_vport *vport;
1244 unsigned long i;
1245
1246 mlx5_esw_for_each_ec_vf_vport(esw, i, vport, num_ec_vfs) {
1247 if (!vport->enabled)
1248 continue;
1249 mlx5_eswitch_unload_pf_vf_vport(esw, vport->vport);
1250 }
1251 }
1252
mlx5_eswitch_unload_adj_vf_vports(struct mlx5_eswitch * esw)1253 static void mlx5_eswitch_unload_adj_vf_vports(struct mlx5_eswitch *esw)
1254 {
1255 struct mlx5_vport *vport;
1256 unsigned long i;
1257
1258 mlx5_esw_for_each_vf_vport(esw, i, vport, U16_MAX) {
1259 if (!vport->enabled || !vport->adjacent)
1260 continue;
1261 mlx5_eswitch_unload_pf_vf_vport(esw, vport->vport);
1262 }
1263 }
1264
1265 static int
mlx5_eswitch_load_adj_vf_vports(struct mlx5_eswitch * esw,enum mlx5_eswitch_vport_event enabled_events)1266 mlx5_eswitch_load_adj_vf_vports(struct mlx5_eswitch *esw,
1267 enum mlx5_eswitch_vport_event enabled_events)
1268 {
1269 struct mlx5_vport *vport;
1270 unsigned long i;
1271 int err;
1272
1273 mlx5_esw_for_each_vf_vport(esw, i, vport, U16_MAX) {
1274 if (!vport->adjacent)
1275 continue;
1276 err = mlx5_eswitch_load_pf_vf_vport(esw, vport->vport,
1277 enabled_events);
1278 if (err)
1279 goto unload_adj_vf_vport;
1280 }
1281
1282 return 0;
1283
1284 unload_adj_vf_vport:
1285 mlx5_eswitch_unload_adj_vf_vports(esw);
1286 return err;
1287 }
1288
mlx5_eswitch_load_vf_vports(struct mlx5_eswitch * esw,u16 num_vfs,enum mlx5_eswitch_vport_event enabled_events)1289 int mlx5_eswitch_load_vf_vports(struct mlx5_eswitch *esw, u16 num_vfs,
1290 enum mlx5_eswitch_vport_event enabled_events)
1291 {
1292 struct mlx5_vport *vport;
1293 unsigned long i;
1294 int err;
1295
1296 mlx5_esw_for_each_vf_vport(esw, i, vport, num_vfs) {
1297 err = mlx5_eswitch_load_pf_vf_vport(esw, vport->vport, enabled_events);
1298 if (err)
1299 goto vf_err;
1300 }
1301
1302 return 0;
1303
1304 vf_err:
1305 mlx5_eswitch_unload_vf_vports(esw, num_vfs);
1306 return err;
1307 }
1308
mlx5_eswitch_load_ec_vf_vports(struct mlx5_eswitch * esw,u16 num_ec_vfs,enum mlx5_eswitch_vport_event enabled_events)1309 static int mlx5_eswitch_load_ec_vf_vports(struct mlx5_eswitch *esw, u16 num_ec_vfs,
1310 enum mlx5_eswitch_vport_event enabled_events)
1311 {
1312 struct mlx5_vport *vport;
1313 unsigned long i;
1314 int err;
1315
1316 mlx5_esw_for_each_ec_vf_vport(esw, i, vport, num_ec_vfs) {
1317 err = mlx5_eswitch_load_pf_vf_vport(esw, vport->vport, enabled_events);
1318 if (err)
1319 goto vf_err;
1320 }
1321
1322 return 0;
1323
1324 vf_err:
1325 mlx5_eswitch_unload_ec_vf_vports(esw, num_ec_vfs);
1326 return err;
1327 }
1328
mlx5_esw_host_pf_enable_hca(struct mlx5_core_dev * dev)1329 int mlx5_esw_host_pf_enable_hca(struct mlx5_core_dev *dev)
1330 {
1331 struct mlx5_eswitch *esw = dev->priv.eswitch;
1332 struct mlx5_vport *vport;
1333 int err;
1334
1335 if (!mlx5_core_is_ecpf(dev) || !mlx5_esw_allowed(esw))
1336 return 0;
1337
1338 vport = mlx5_eswitch_get_vport(esw, MLX5_VPORT_PF);
1339 if (IS_ERR(vport))
1340 return PTR_ERR(vport);
1341
1342 /* Once vport and representor are ready, take out the external host PF
1343 * out of initializing state. Enabling HCA clears the iser->initializing
1344 * bit and host PF driver loading can progress.
1345 */
1346 err = mlx5_cmd_host_pf_enable_hca(dev);
1347 if (err)
1348 return err;
1349
1350 vport->pf_activated = true;
1351
1352 return 0;
1353 }
1354
mlx5_esw_host_pf_disable_hca(struct mlx5_core_dev * dev)1355 int mlx5_esw_host_pf_disable_hca(struct mlx5_core_dev *dev)
1356 {
1357 struct mlx5_eswitch *esw = dev->priv.eswitch;
1358 struct mlx5_vport *vport;
1359 int err;
1360
1361 if (!mlx5_core_is_ecpf(dev) || !mlx5_esw_allowed(esw))
1362 return 0;
1363
1364 vport = mlx5_eswitch_get_vport(esw, MLX5_VPORT_PF);
1365 if (IS_ERR(vport))
1366 return PTR_ERR(vport);
1367
1368 err = mlx5_cmd_host_pf_disable_hca(dev);
1369 if (err)
1370 return err;
1371
1372 vport->pf_activated = false;
1373
1374 return 0;
1375 }
1376
1377 /* mlx5_eswitch_enable_pf_vf_vports() enables vports of PF, ECPF and VFs
1378 * whichever are present on the eswitch.
1379 */
1380 int
mlx5_eswitch_enable_pf_vf_vports(struct mlx5_eswitch * esw,enum mlx5_eswitch_vport_event enabled_events)1381 mlx5_eswitch_enable_pf_vf_vports(struct mlx5_eswitch *esw,
1382 enum mlx5_eswitch_vport_event enabled_events)
1383 {
1384 bool pf_needed;
1385 int ret;
1386
1387 pf_needed = mlx5_core_is_ecpf_esw_manager(esw->dev) ||
1388 esw->mode == MLX5_ESWITCH_LEGACY;
1389
1390 /* Enable PF vport */
1391 if (pf_needed && mlx5_esw_host_functions_enabled(esw->dev)) {
1392 ret = mlx5_eswitch_load_pf_vf_vport(esw, MLX5_VPORT_PF,
1393 enabled_events);
1394 if (ret)
1395 return ret;
1396 }
1397
1398 if (mlx5_esw_host_functions_enabled(esw->dev)) {
1399 /* Enable external host PF HCA */
1400 ret = mlx5_esw_host_pf_enable_hca(esw->dev);
1401 if (ret)
1402 goto pf_hca_err;
1403 }
1404
1405 /* Enable ECPF vport */
1406 if (mlx5_ecpf_vport_exists(esw->dev)) {
1407 ret = mlx5_eswitch_load_pf_vf_vport(esw, MLX5_VPORT_ECPF, enabled_events);
1408 if (ret)
1409 goto ecpf_err;
1410 }
1411
1412 /* Enable ECVF vports */
1413 if (mlx5_core_ec_sriov_enabled(esw->dev)) {
1414 ret = mlx5_eswitch_load_ec_vf_vports(esw,
1415 esw->esw_funcs.num_ec_vfs,
1416 enabled_events);
1417 if (ret)
1418 goto ec_vf_err;
1419 }
1420
1421 /* Enable VF vports */
1422 ret = mlx5_eswitch_load_vf_vports(esw, esw->esw_funcs.num_vfs,
1423 enabled_events);
1424 if (ret)
1425 goto vf_err;
1426
1427 /* Enable adjacent VF vports */
1428 ret = mlx5_eswitch_load_adj_vf_vports(esw, enabled_events);
1429 if (ret)
1430 goto unload_vf_vports;
1431
1432 return 0;
1433
1434 unload_vf_vports:
1435 mlx5_eswitch_unload_vf_vports(esw, esw->esw_funcs.num_vfs);
1436 vf_err:
1437 if (mlx5_core_ec_sriov_enabled(esw->dev))
1438 mlx5_eswitch_unload_ec_vf_vports(esw, esw->esw_funcs.num_ec_vfs);
1439 ec_vf_err:
1440 if (mlx5_ecpf_vport_exists(esw->dev))
1441 mlx5_eswitch_unload_pf_vf_vport(esw, MLX5_VPORT_ECPF);
1442 ecpf_err:
1443 if (mlx5_esw_host_functions_enabled(esw->dev))
1444 mlx5_esw_host_pf_disable_hca(esw->dev);
1445 pf_hca_err:
1446 if (pf_needed && mlx5_esw_host_functions_enabled(esw->dev))
1447 mlx5_eswitch_unload_pf_vf_vport(esw, MLX5_VPORT_PF);
1448 return ret;
1449 }
1450
1451 /* mlx5_eswitch_disable_pf_vf_vports() disables vports of PF, ECPF and VFs
1452 * whichever are previously enabled on the eswitch.
1453 */
mlx5_eswitch_disable_pf_vf_vports(struct mlx5_eswitch * esw)1454 void mlx5_eswitch_disable_pf_vf_vports(struct mlx5_eswitch *esw)
1455 {
1456 mlx5_eswitch_unload_adj_vf_vports(esw);
1457
1458 mlx5_eswitch_unload_vf_vports(esw, esw->esw_funcs.num_vfs);
1459
1460 if (mlx5_core_ec_sriov_enabled(esw->dev))
1461 mlx5_eswitch_unload_ec_vf_vports(esw,
1462 esw->esw_funcs.num_ec_vfs);
1463
1464 if (mlx5_ecpf_vport_exists(esw->dev)) {
1465 mlx5_eswitch_unload_pf_vf_vport(esw, MLX5_VPORT_ECPF);
1466 }
1467
1468 if (mlx5_esw_host_functions_enabled(esw->dev))
1469 mlx5_esw_host_pf_disable_hca(esw->dev);
1470
1471 if ((mlx5_core_is_ecpf_esw_manager(esw->dev) ||
1472 esw->mode == MLX5_ESWITCH_LEGACY) &&
1473 mlx5_esw_host_functions_enabled(esw->dev))
1474 mlx5_eswitch_unload_pf_vf_vport(esw, MLX5_VPORT_PF);
1475 }
1476
mlx5_eswitch_get_devlink_param(struct mlx5_eswitch * esw)1477 static void mlx5_eswitch_get_devlink_param(struct mlx5_eswitch *esw)
1478 {
1479 struct devlink *devlink = priv_to_devlink(esw->dev);
1480 union devlink_param_value val;
1481 int err;
1482
1483 err = devl_param_driverinit_value_get(devlink,
1484 MLX5_DEVLINK_PARAM_ID_ESW_LARGE_GROUP_NUM,
1485 &val);
1486 if (!err) {
1487 esw->params.large_group_num = val.vu32;
1488 } else {
1489 esw_warn(esw->dev,
1490 "Devlink can't get param fdb_large_groups, uses default (%d).\n",
1491 ESW_OFFLOADS_DEFAULT_NUM_GROUPS);
1492 esw->params.large_group_num = ESW_OFFLOADS_DEFAULT_NUM_GROUPS;
1493 }
1494 }
1495
1496 static void
mlx5_eswitch_update_num_of_vfs(struct mlx5_eswitch * esw,int num_vfs)1497 mlx5_eswitch_update_num_of_vfs(struct mlx5_eswitch *esw, int num_vfs)
1498 {
1499 const u32 *out;
1500
1501 if (num_vfs < 0)
1502 return;
1503
1504 if (!mlx5_core_is_ecpf_esw_manager(esw->dev)) {
1505 esw->esw_funcs.num_vfs = num_vfs;
1506 return;
1507 }
1508
1509 out = mlx5_esw_query_functions(esw->dev);
1510 if (IS_ERR(out))
1511 return;
1512
1513 esw->esw_funcs.num_vfs = MLX5_GET(query_esw_functions_out, out,
1514 host_params_context.host_num_of_vfs);
1515 if (mlx5_core_ec_sriov_enabled(esw->dev))
1516 esw->esw_funcs.num_ec_vfs = num_vfs;
1517
1518 kvfree(out);
1519 }
1520
mlx5_esw_mode_change_notify(struct mlx5_eswitch * esw,u16 mode)1521 static void mlx5_esw_mode_change_notify(struct mlx5_eswitch *esw, u16 mode)
1522 {
1523 struct mlx5_esw_event_info info = {};
1524
1525 info.new_mode = mode;
1526
1527 blocking_notifier_call_chain(&esw->dev->priv.esw_n_head, 0, &info);
1528 }
1529
mlx5_esw_egress_acls_init(struct mlx5_core_dev * dev)1530 static int mlx5_esw_egress_acls_init(struct mlx5_core_dev *dev)
1531 {
1532 struct mlx5_flow_steering *steering = dev->priv.steering;
1533 int total_vports = mlx5_eswitch_get_total_vports(dev);
1534 int err;
1535 int i;
1536
1537 for (i = 0; i < total_vports; i++) {
1538 err = mlx5_fs_vport_egress_acl_ns_add(steering, i);
1539 if (err)
1540 goto acl_ns_remove;
1541 }
1542 return 0;
1543
1544 acl_ns_remove:
1545 while (i--)
1546 mlx5_fs_vport_egress_acl_ns_remove(steering, i);
1547 return err;
1548 }
1549
mlx5_esw_egress_acls_cleanup(struct mlx5_core_dev * dev)1550 static void mlx5_esw_egress_acls_cleanup(struct mlx5_core_dev *dev)
1551 {
1552 struct mlx5_flow_steering *steering = dev->priv.steering;
1553 int total_vports = mlx5_eswitch_get_total_vports(dev);
1554 int i;
1555
1556 for (i = total_vports - 1; i >= 0; i--)
1557 mlx5_fs_vport_egress_acl_ns_remove(steering, i);
1558 }
1559
mlx5_esw_ingress_acls_init(struct mlx5_core_dev * dev)1560 static int mlx5_esw_ingress_acls_init(struct mlx5_core_dev *dev)
1561 {
1562 struct mlx5_flow_steering *steering = dev->priv.steering;
1563 int total_vports = mlx5_eswitch_get_total_vports(dev);
1564 int err;
1565 int i;
1566
1567 for (i = 0; i < total_vports; i++) {
1568 err = mlx5_fs_vport_ingress_acl_ns_add(steering, i);
1569 if (err)
1570 goto acl_ns_remove;
1571 }
1572 return 0;
1573
1574 acl_ns_remove:
1575 while (i--)
1576 mlx5_fs_vport_ingress_acl_ns_remove(steering, i);
1577 return err;
1578 }
1579
mlx5_esw_ingress_acls_cleanup(struct mlx5_core_dev * dev)1580 static void mlx5_esw_ingress_acls_cleanup(struct mlx5_core_dev *dev)
1581 {
1582 struct mlx5_flow_steering *steering = dev->priv.steering;
1583 int total_vports = mlx5_eswitch_get_total_vports(dev);
1584 int i;
1585
1586 for (i = total_vports - 1; i >= 0; i--)
1587 mlx5_fs_vport_ingress_acl_ns_remove(steering, i);
1588 }
1589
mlx5_esw_acls_ns_init(struct mlx5_eswitch * esw)1590 static int mlx5_esw_acls_ns_init(struct mlx5_eswitch *esw)
1591 {
1592 struct mlx5_core_dev *dev = esw->dev;
1593 int err;
1594
1595 if (esw->flags & MLX5_ESWITCH_VPORT_ACL_NS_CREATED)
1596 return 0;
1597
1598 if (MLX5_CAP_ESW_EGRESS_ACL(dev, ft_support)) {
1599 err = mlx5_esw_egress_acls_init(dev);
1600 if (err)
1601 return err;
1602 } else {
1603 esw_warn(dev, "egress ACL is not supported by FW\n");
1604 }
1605
1606 if (MLX5_CAP_ESW_INGRESS_ACL(dev, ft_support)) {
1607 err = mlx5_esw_ingress_acls_init(dev);
1608 if (err)
1609 goto err;
1610 } else {
1611 esw_warn(dev, "ingress ACL is not supported by FW\n");
1612 }
1613 esw->flags |= MLX5_ESWITCH_VPORT_ACL_NS_CREATED;
1614 return 0;
1615
1616 err:
1617 if (MLX5_CAP_ESW_EGRESS_ACL(dev, ft_support))
1618 mlx5_esw_egress_acls_cleanup(dev);
1619 return err;
1620 }
1621
mlx5_esw_acls_ns_cleanup(struct mlx5_eswitch * esw)1622 static void mlx5_esw_acls_ns_cleanup(struct mlx5_eswitch *esw)
1623 {
1624 struct mlx5_core_dev *dev = esw->dev;
1625
1626 esw->flags &= ~MLX5_ESWITCH_VPORT_ACL_NS_CREATED;
1627 if (MLX5_CAP_ESW_INGRESS_ACL(dev, ft_support))
1628 mlx5_esw_ingress_acls_cleanup(dev);
1629 if (MLX5_CAP_ESW_EGRESS_ACL(dev, ft_support))
1630 mlx5_esw_egress_acls_cleanup(dev);
1631 }
1632
1633 /**
1634 * mlx5_eswitch_enable_locked - Enable eswitch
1635 * @esw: Pointer to eswitch
1636 * @num_vfs: Enable eswitch for given number of VFs. This is optional.
1637 * Valid value are 0, > 0 and MLX5_ESWITCH_IGNORE_NUM_VFS.
1638 * Caller should pass num_vfs > 0 when enabling eswitch for
1639 * vf vports. Caller should pass num_vfs = 0, when eswitch
1640 * is enabled without sriov VFs or when caller
1641 * is unaware of the sriov state of the host PF on ECPF based
1642 * eswitch. Caller should pass < 0 when num_vfs should be
1643 * completely ignored. This is typically the case when eswitch
1644 * is enabled without sriov regardless of PF/ECPF system.
1645 * mlx5_eswitch_enable_locked() Enables eswitch in either legacy or offloads
1646 * mode. If num_vfs >=0 is provided, it setup VF related eswitch vports.
1647 * It returns 0 on success or error code on failure.
1648 */
mlx5_eswitch_enable_locked(struct mlx5_eswitch * esw,int num_vfs)1649 int mlx5_eswitch_enable_locked(struct mlx5_eswitch *esw, int num_vfs)
1650 {
1651 int err;
1652
1653 devl_assert_locked(priv_to_devlink(esw->dev));
1654
1655 if (!MLX5_CAP_ESW_FLOWTABLE_FDB(esw->dev, ft_support)) {
1656 esw_warn(esw->dev, "FDB is not supported, aborting ...\n");
1657 return -EOPNOTSUPP;
1658 }
1659
1660 mlx5_eswitch_get_devlink_param(esw);
1661
1662 err = mlx5_esw_acls_ns_init(esw);
1663 if (err)
1664 return err;
1665
1666 mlx5_eswitch_update_num_of_vfs(esw, num_vfs);
1667
1668 MLX5_NB_INIT(&esw->nb, eswitch_vport_event, NIC_VPORT_CHANGE);
1669 mlx5_eq_notifier_register(esw->dev, &esw->nb);
1670
1671 err = mlx5_esw_qos_init(esw);
1672 if (err)
1673 goto err_esw_init;
1674
1675 if (esw->mode == MLX5_ESWITCH_LEGACY) {
1676 err = esw_legacy_enable(esw);
1677 } else {
1678 err = esw_offloads_enable(esw);
1679 }
1680
1681 if (err)
1682 goto err_esw_init;
1683
1684 esw->fdb_table.flags |= MLX5_ESW_FDB_CREATED;
1685
1686 mlx5_eswitch_event_handler_register(esw);
1687
1688 esw_info(esw->dev, "Enable: mode(%s), nvfs(%d), necvfs(%d), active vports(%d)\n",
1689 esw->mode == MLX5_ESWITCH_LEGACY ? "LEGACY" : "OFFLOADS",
1690 esw->esw_funcs.num_vfs, esw->esw_funcs.num_ec_vfs, esw->enabled_vports);
1691
1692 mlx5_esw_mode_change_notify(esw, esw->mode);
1693
1694 return 0;
1695
1696 err_esw_init:
1697 mlx5_eq_notifier_unregister(esw->dev, &esw->nb);
1698 mlx5_esw_acls_ns_cleanup(esw);
1699 return err;
1700 }
1701
1702 /**
1703 * mlx5_eswitch_enable - Enable eswitch
1704 * @esw: Pointer to eswitch
1705 * @num_vfs: Enable eswitch switch for given number of VFs.
1706 * Caller must pass num_vfs > 0 when enabling eswitch for
1707 * vf vports.
1708 * mlx5_eswitch_enable() returns 0 on success or error code on failure.
1709 */
mlx5_eswitch_enable(struct mlx5_eswitch * esw,int num_vfs)1710 int mlx5_eswitch_enable(struct mlx5_eswitch *esw, int num_vfs)
1711 {
1712 bool toggle_lag;
1713 int ret = 0;
1714
1715 if (!mlx5_esw_allowed(esw))
1716 return 0;
1717
1718 devl_assert_locked(priv_to_devlink(esw->dev));
1719
1720 toggle_lag = !mlx5_esw_is_fdb_created(esw);
1721
1722 if (toggle_lag)
1723 mlx5_lag_disable_change(esw->dev);
1724
1725 if (!mlx5_esw_is_fdb_created(esw)) {
1726 ret = mlx5_eswitch_enable_locked(esw, num_vfs);
1727 } else {
1728 enum mlx5_eswitch_vport_event vport_events;
1729
1730 vport_events = (esw->mode == MLX5_ESWITCH_LEGACY) ?
1731 MLX5_LEGACY_SRIOV_VPORT_EVENTS : MLX5_VPORT_UC_ADDR_CHANGE;
1732 /* If this is the ECPF the number of host VFs is managed via the
1733 * eswitch function change event handler, and any num_vfs provided
1734 * here are intended to be EC VFs.
1735 */
1736 if (!mlx5_core_is_ecpf(esw->dev)) {
1737 ret = mlx5_eswitch_load_vf_vports(esw, num_vfs, vport_events);
1738 if (!ret)
1739 esw->esw_funcs.num_vfs = num_vfs;
1740 } else if (mlx5_core_ec_sriov_enabled(esw->dev)) {
1741 ret = mlx5_eswitch_load_ec_vf_vports(esw, num_vfs, vport_events);
1742 if (!ret)
1743 esw->esw_funcs.num_ec_vfs = num_vfs;
1744 }
1745 }
1746
1747 if (toggle_lag)
1748 mlx5_lag_enable_change(esw->dev);
1749
1750 return ret;
1751 }
1752
1753 /* When disabling sriov, free driver level resources. */
mlx5_eswitch_disable_sriov(struct mlx5_eswitch * esw,bool clear_vf)1754 void mlx5_eswitch_disable_sriov(struct mlx5_eswitch *esw, bool clear_vf)
1755 {
1756 if (!mlx5_esw_allowed(esw))
1757 return;
1758
1759 devl_assert_locked(priv_to_devlink(esw->dev));
1760 /* If driver is unloaded, this function is called twice by remove_one()
1761 * and mlx5_unload(). Prevent the second call.
1762 */
1763 if (!esw->esw_funcs.num_vfs && !esw->esw_funcs.num_ec_vfs && !clear_vf)
1764 return;
1765
1766 esw_info(esw->dev, "Unload vfs: mode(%s), nvfs(%d), necvfs(%d), active vports(%d)\n",
1767 esw->mode == MLX5_ESWITCH_LEGACY ? "LEGACY" : "OFFLOADS",
1768 esw->esw_funcs.num_vfs, esw->esw_funcs.num_ec_vfs, esw->enabled_vports);
1769
1770 if (!mlx5_core_is_ecpf(esw->dev)) {
1771 mlx5_eswitch_unload_vf_vports(esw, esw->esw_funcs.num_vfs);
1772 if (clear_vf)
1773 mlx5_eswitch_clear_vf_vports_info(esw);
1774 } else if (mlx5_core_ec_sriov_enabled(esw->dev)) {
1775 mlx5_eswitch_unload_ec_vf_vports(esw, esw->esw_funcs.num_ec_vfs);
1776 if (clear_vf)
1777 mlx5_eswitch_clear_ec_vf_vports_info(esw);
1778 }
1779
1780 if (esw->mode == MLX5_ESWITCH_OFFLOADS) {
1781 struct devlink *devlink = priv_to_devlink(esw->dev);
1782
1783 devl_rate_nodes_destroy(devlink);
1784 }
1785 /* Destroy legacy fdb when disabling sriov in legacy mode. */
1786 if (esw->mode == MLX5_ESWITCH_LEGACY)
1787 mlx5_eswitch_disable_locked(esw);
1788
1789 if (!mlx5_core_is_ecpf(esw->dev))
1790 esw->esw_funcs.num_vfs = 0;
1791 else
1792 esw->esw_funcs.num_ec_vfs = 0;
1793 }
1794
1795 /* Free resources for corresponding eswitch mode. It is called by devlink
1796 * when changing eswitch mode or modprobe when unloading driver.
1797 */
mlx5_eswitch_disable_locked(struct mlx5_eswitch * esw)1798 void mlx5_eswitch_disable_locked(struct mlx5_eswitch *esw)
1799 {
1800 struct devlink *devlink = priv_to_devlink(esw->dev);
1801
1802 /* Notify eswitch users that it is exiting from current mode.
1803 * So that it can do necessary cleanup before the eswitch is disabled.
1804 */
1805 mlx5_esw_mode_change_notify(esw, MLX5_ESWITCH_LEGACY);
1806
1807 mlx5_eq_notifier_unregister(esw->dev, &esw->nb);
1808 mlx5_eswitch_event_handler_unregister(esw);
1809
1810 esw_info(esw->dev, "Disable: mode(%s), nvfs(%d), necvfs(%d), active vports(%d)\n",
1811 esw->mode == MLX5_ESWITCH_LEGACY ? "LEGACY" : "OFFLOADS",
1812 esw->esw_funcs.num_vfs, esw->esw_funcs.num_ec_vfs, esw->enabled_vports);
1813
1814 if (esw->fdb_table.flags & MLX5_ESW_FDB_CREATED) {
1815 esw->fdb_table.flags &= ~MLX5_ESW_FDB_CREATED;
1816 if (esw->mode == MLX5_ESWITCH_OFFLOADS)
1817 esw_offloads_disable(esw);
1818 else if (esw->mode == MLX5_ESWITCH_LEGACY)
1819 esw_legacy_disable(esw);
1820 mlx5_esw_acls_ns_cleanup(esw);
1821 }
1822
1823 if (esw->mode == MLX5_ESWITCH_OFFLOADS)
1824 devl_rate_nodes_destroy(devlink);
1825 }
1826
mlx5_eswitch_disable(struct mlx5_eswitch * esw)1827 void mlx5_eswitch_disable(struct mlx5_eswitch *esw)
1828 {
1829 if (!mlx5_esw_allowed(esw))
1830 return;
1831
1832 devl_assert_locked(priv_to_devlink(esw->dev));
1833 mlx5_lag_disable_change(esw->dev);
1834 mlx5_eswitch_disable_locked(esw);
1835 esw->mode = MLX5_ESWITCH_LEGACY;
1836 mlx5_lag_enable_change(esw->dev);
1837 }
1838
mlx5_query_hca_cap_host_pf(struct mlx5_core_dev * dev,void * out)1839 static int mlx5_query_hca_cap_host_pf(struct mlx5_core_dev *dev, void *out)
1840 {
1841 u16 opmod = (MLX5_CAP_GENERAL << 1) | (HCA_CAP_OPMOD_GET_MAX & 0x01);
1842 u8 in[MLX5_ST_SZ_BYTES(query_hca_cap_in)] = {};
1843
1844 MLX5_SET(query_hca_cap_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_CAP);
1845 MLX5_SET(query_hca_cap_in, in, op_mod, opmod);
1846 MLX5_SET(query_hca_cap_in, in, function_id, MLX5_VPORT_PF);
1847 MLX5_SET(query_hca_cap_in, in, other_function, true);
1848 return mlx5_cmd_exec_inout(dev, query_hca_cap, in, out);
1849 }
1850
mlx5_esw_sf_max_hpf_functions(struct mlx5_core_dev * dev,u16 * max_sfs,u16 * sf_base_id)1851 int mlx5_esw_sf_max_hpf_functions(struct mlx5_core_dev *dev, u16 *max_sfs, u16 *sf_base_id)
1852
1853 {
1854 int query_out_sz = MLX5_ST_SZ_BYTES(query_hca_cap_out);
1855 void *query_ctx;
1856 void *hca_caps;
1857 int err;
1858
1859 if (!mlx5_core_is_ecpf(dev) ||
1860 !mlx5_esw_host_functions_enabled(dev)) {
1861 *max_sfs = 0;
1862 return 0;
1863 }
1864
1865 query_ctx = kzalloc(query_out_sz, GFP_KERNEL);
1866 if (!query_ctx)
1867 return -ENOMEM;
1868
1869 err = mlx5_query_hca_cap_host_pf(dev, query_ctx);
1870 if (err)
1871 goto out_free;
1872
1873 hca_caps = MLX5_ADDR_OF(query_hca_cap_out, query_ctx, capability);
1874 *max_sfs = MLX5_GET(cmd_hca_cap, hca_caps, max_num_sf);
1875 *sf_base_id = MLX5_GET(cmd_hca_cap, hca_caps, sf_base_id);
1876
1877 out_free:
1878 kfree(query_ctx);
1879 return err;
1880 }
1881
mlx5_esw_vport_alloc(struct mlx5_eswitch * esw,int index,u16 vport_num)1882 int mlx5_esw_vport_alloc(struct mlx5_eswitch *esw, int index, u16 vport_num)
1883 {
1884 struct mlx5_vport *vport;
1885 int err;
1886
1887 vport = kzalloc_obj(*vport);
1888 if (!vport)
1889 return -ENOMEM;
1890
1891 vport->dev = esw->dev;
1892 vport->vport = vport_num;
1893 vport->index = index;
1894 vport->info.link_state = MLX5_VPORT_ADMIN_STATE_AUTO;
1895 vport->vhca_id = MLX5_VHCA_ID_INVALID;
1896 INIT_WORK(&vport->vport_change_handler, esw_vport_change_handler);
1897 err = xa_insert(&esw->vports, vport_num, vport, GFP_KERNEL);
1898 if (err)
1899 goto insert_err;
1900
1901 esw->total_vports++;
1902 return 0;
1903
1904 insert_err:
1905 kfree(vport);
1906 return err;
1907 }
1908
mlx5_esw_vport_free(struct mlx5_eswitch * esw,struct mlx5_vport * vport)1909 void mlx5_esw_vport_free(struct mlx5_eswitch *esw, struct mlx5_vport *vport)
1910 {
1911 esw->total_vports--;
1912 xa_erase(&esw->vports, vport->vport);
1913 kfree(vport);
1914 }
1915
mlx5_esw_vports_cleanup(struct mlx5_eswitch * esw)1916 static void mlx5_esw_vports_cleanup(struct mlx5_eswitch *esw)
1917 {
1918 struct mlx5_vport *vport;
1919 unsigned long i;
1920
1921 mlx5_esw_for_each_vport(esw, i, vport)
1922 mlx5_esw_vport_free(esw, vport);
1923 xa_destroy(&esw->vports);
1924 }
1925
mlx5_esw_vports_init(struct mlx5_eswitch * esw)1926 static int mlx5_esw_vports_init(struct mlx5_eswitch *esw)
1927 {
1928 struct mlx5_core_dev *dev = esw->dev;
1929 u16 max_host_pf_sfs;
1930 u16 base_sf_num;
1931 int idx = 0;
1932 int err;
1933 int i;
1934
1935 xa_init(&esw->vports);
1936
1937 if (mlx5_esw_host_functions_enabled(dev)) {
1938 err = mlx5_esw_vport_alloc(esw, idx, MLX5_VPORT_PF);
1939 if (err)
1940 goto err;
1941 if (esw->first_host_vport == MLX5_VPORT_PF)
1942 xa_set_mark(&esw->vports, idx, MLX5_ESW_VPT_HOST_FN);
1943 idx++;
1944 for (i = 0; i < mlx5_core_max_vfs(dev); i++) {
1945 err = mlx5_esw_vport_alloc(esw, idx, idx);
1946 if (err)
1947 goto err;
1948 xa_set_mark(&esw->vports, idx, MLX5_ESW_VPT_VF);
1949 xa_set_mark(&esw->vports, idx, MLX5_ESW_VPT_HOST_FN);
1950 idx++;
1951 }
1952 }
1953
1954 base_sf_num = mlx5_sf_start_function_id(dev);
1955 for (i = 0; i < mlx5_sf_max_functions(dev); i++) {
1956 err = mlx5_esw_vport_alloc(esw, idx, base_sf_num + i);
1957 if (err)
1958 goto err;
1959 xa_set_mark(&esw->vports, base_sf_num + i, MLX5_ESW_VPT_SF);
1960 idx++;
1961 }
1962
1963 err = mlx5_esw_sf_max_hpf_functions(dev, &max_host_pf_sfs, &base_sf_num);
1964 if (err)
1965 goto err;
1966 for (i = 0; i < max_host_pf_sfs; i++) {
1967 err = mlx5_esw_vport_alloc(esw, idx, base_sf_num + i);
1968 if (err)
1969 goto err;
1970 xa_set_mark(&esw->vports, base_sf_num + i, MLX5_ESW_VPT_SF);
1971 idx++;
1972 }
1973
1974 if (mlx5_core_ec_sriov_enabled(esw->dev)) {
1975 int ec_vf_base_num = mlx5_core_ec_vf_vport_base(dev);
1976
1977 for (i = 0; i < mlx5_core_max_ec_vfs(esw->dev); i++) {
1978 err = mlx5_esw_vport_alloc(esw, idx, ec_vf_base_num + i);
1979 if (err)
1980 goto err;
1981 idx++;
1982 }
1983 }
1984
1985 if (mlx5_ecpf_vport_exists(dev) ||
1986 mlx5_core_is_ecpf_esw_manager(dev)) {
1987 err = mlx5_esw_vport_alloc(esw, idx, MLX5_VPORT_ECPF);
1988 if (err)
1989 goto err;
1990 idx++;
1991 }
1992 err = mlx5_esw_vport_alloc(esw, idx, MLX5_VPORT_UPLINK);
1993 if (err)
1994 goto err;
1995
1996 /* Adjacent vports or other dynamically create vports will use this */
1997 esw->last_vport_idx = ++idx;
1998 return 0;
1999
2000 err:
2001 mlx5_esw_vports_cleanup(esw);
2002 return err;
2003 }
2004
mlx5_devlink_esw_multiport_set(struct devlink * devlink,u32 id,struct devlink_param_gset_ctx * ctx,struct netlink_ext_ack * extack)2005 static int mlx5_devlink_esw_multiport_set(struct devlink *devlink, u32 id,
2006 struct devlink_param_gset_ctx *ctx,
2007 struct netlink_ext_ack *extack)
2008 {
2009 struct mlx5_core_dev *dev = devlink_priv(devlink);
2010
2011 if (!MLX5_ESWITCH_MANAGER(dev))
2012 return -EOPNOTSUPP;
2013
2014 if (ctx->val.vbool)
2015 return mlx5_lag_mpesw_enable(dev);
2016
2017 mlx5_lag_mpesw_disable(dev);
2018 return 0;
2019 }
2020
mlx5_devlink_esw_multiport_get(struct devlink * devlink,u32 id,struct devlink_param_gset_ctx * ctx,struct netlink_ext_ack * extack)2021 static int mlx5_devlink_esw_multiport_get(struct devlink *devlink, u32 id,
2022 struct devlink_param_gset_ctx *ctx,
2023 struct netlink_ext_ack *extack)
2024 {
2025 struct mlx5_core_dev *dev = devlink_priv(devlink);
2026
2027 ctx->val.vbool = mlx5_lag_is_mpesw(dev);
2028 return 0;
2029 }
2030
2031 static const struct devlink_param mlx5_eswitch_params[] = {
2032 DEVLINK_PARAM_DRIVER(MLX5_DEVLINK_PARAM_ID_ESW_MULTIPORT,
2033 "esw_multiport", DEVLINK_PARAM_TYPE_BOOL,
2034 BIT(DEVLINK_PARAM_CMODE_RUNTIME),
2035 mlx5_devlink_esw_multiport_get,
2036 mlx5_devlink_esw_multiport_set, NULL),
2037 };
2038
mlx5_eswitch_init(struct mlx5_core_dev * dev)2039 int mlx5_eswitch_init(struct mlx5_core_dev *dev)
2040 {
2041 struct mlx5_eswitch *esw;
2042 int err;
2043
2044 if (!MLX5_VPORT_MANAGER(dev) && !MLX5_ESWITCH_MANAGER(dev))
2045 return 0;
2046
2047 esw = kzalloc_obj(*esw);
2048 if (!esw)
2049 return -ENOMEM;
2050
2051 err = devl_params_register(priv_to_devlink(dev), mlx5_eswitch_params,
2052 ARRAY_SIZE(mlx5_eswitch_params));
2053 if (err)
2054 goto free_esw;
2055
2056 esw->dev = dev;
2057 dev->priv.eswitch = esw;
2058 esw->manager_vport = mlx5_eswitch_manager_vport(dev);
2059 esw->first_host_vport = mlx5_eswitch_first_host_vport_num(dev);
2060
2061 esw->debugfs_root = debugfs_create_dir("esw", mlx5_debugfs_get_dev_root(dev));
2062 esw->work_queue = create_singlethread_workqueue("mlx5_esw_wq");
2063 if (!esw->work_queue) {
2064 err = -ENOMEM;
2065 goto abort;
2066 }
2067
2068 err = mlx5_esw_host_functions_enabled_query(esw);
2069 if (err)
2070 goto abort;
2071
2072 err = mlx5_esw_vports_init(esw);
2073 if (err)
2074 goto abort;
2075
2076 err = esw_offloads_init(esw);
2077 if (err)
2078 goto reps_err;
2079
2080 esw->mode = MLX5_ESWITCH_LEGACY;
2081 err = mlx5_esw_qos_init(esw);
2082 if (err)
2083 goto reps_err;
2084
2085 mutex_init(&esw->offloads.encap_tbl_lock);
2086 hash_init(esw->offloads.encap_tbl);
2087 mutex_init(&esw->offloads.decap_tbl_lock);
2088 hash_init(esw->offloads.decap_tbl);
2089 mlx5e_mod_hdr_tbl_init(&esw->offloads.mod_hdr);
2090 atomic64_set(&esw->offloads.num_flows, 0);
2091 ida_init(&esw->offloads.vport_metadata_ida);
2092 xa_init_flags(&esw->offloads.vhca_map, XA_FLAGS_ALLOC);
2093 mutex_init(&esw->state_lock);
2094 init_rwsem(&esw->mode_lock);
2095 refcount_set(&esw->qos.refcnt, 0);
2096
2097 esw->enabled_vports = 0;
2098 esw->offloads.inline_mode = MLX5_INLINE_MODE_NONE;
2099 if (MLX5_CAP_ESW_FLOWTABLE_FDB(dev, reformat) &&
2100 MLX5_CAP_ESW_FLOWTABLE_FDB(dev, decap))
2101 esw->offloads.encap = DEVLINK_ESWITCH_ENCAP_MODE_BASIC;
2102 else
2103 esw->offloads.encap = DEVLINK_ESWITCH_ENCAP_MODE_NONE;
2104
2105 esw_info(dev,
2106 "Total vports %d, per vport: max uc(%d) max mc(%d)\n",
2107 esw->total_vports,
2108 MLX5_MAX_UC_PER_VPORT(dev),
2109 MLX5_MAX_MC_PER_VPORT(dev));
2110 return 0;
2111
2112 reps_err:
2113 mlx5_esw_vports_cleanup(esw);
2114 dev->priv.eswitch = NULL;
2115 abort:
2116 if (esw->work_queue)
2117 destroy_workqueue(esw->work_queue);
2118 debugfs_remove_recursive(esw->debugfs_root);
2119 devl_params_unregister(priv_to_devlink(dev), mlx5_eswitch_params,
2120 ARRAY_SIZE(mlx5_eswitch_params));
2121 free_esw:
2122 kfree(esw);
2123 return err;
2124 }
2125
mlx5_eswitch_cleanup(struct mlx5_eswitch * esw)2126 void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw)
2127 {
2128 if (!esw)
2129 return;
2130
2131 esw_info(esw->dev, "cleanup\n");
2132
2133 mlx5_esw_qos_cleanup(esw);
2134 destroy_workqueue(esw->work_queue);
2135 WARN_ON(refcount_read(&esw->qos.refcnt));
2136 mutex_destroy(&esw->state_lock);
2137 WARN_ON(!xa_empty(&esw->offloads.vhca_map));
2138 xa_destroy(&esw->offloads.vhca_map);
2139 ida_destroy(&esw->offloads.vport_metadata_ida);
2140 mlx5e_mod_hdr_tbl_destroy(&esw->offloads.mod_hdr);
2141 mutex_destroy(&esw->offloads.encap_tbl_lock);
2142 mutex_destroy(&esw->offloads.decap_tbl_lock);
2143 esw_offloads_cleanup(esw);
2144 esw->dev->priv.eswitch = NULL;
2145 mlx5_esw_vports_cleanup(esw);
2146 debugfs_remove_recursive(esw->debugfs_root);
2147 devl_params_unregister(priv_to_devlink(esw->dev), mlx5_eswitch_params,
2148 ARRAY_SIZE(mlx5_eswitch_params));
2149 kfree(esw);
2150 }
2151
2152 /* Vport Administration */
2153 static int
mlx5_esw_set_vport_mac_locked(struct mlx5_eswitch * esw,struct mlx5_vport * evport,const u8 * mac)2154 mlx5_esw_set_vport_mac_locked(struct mlx5_eswitch *esw,
2155 struct mlx5_vport *evport, const u8 *mac)
2156 {
2157 u16 vport_num = evport->vport;
2158 u64 node_guid;
2159 int err = 0;
2160
2161 if (is_multicast_ether_addr(mac))
2162 return -EINVAL;
2163
2164 if (evport->info.spoofchk && !is_valid_ether_addr(mac))
2165 mlx5_core_warn(esw->dev,
2166 "Set invalid MAC while spoofchk is on, vport(%d)\n",
2167 vport_num);
2168
2169 err = mlx5_modify_nic_vport_mac_address(esw->dev, vport_num, mac);
2170 if (err) {
2171 mlx5_core_warn(esw->dev,
2172 "Failed to mlx5_modify_nic_vport_mac vport(%d) err=(%d)\n",
2173 vport_num, err);
2174 return err;
2175 }
2176
2177 node_guid_gen_from_mac(&node_guid, mac);
2178 err = mlx5_modify_nic_vport_node_guid(esw->dev, vport_num, node_guid);
2179 if (err)
2180 mlx5_core_warn(esw->dev,
2181 "Failed to set vport %d node guid, err = %d. RDMA_CM will not function properly for this VF.\n",
2182 vport_num, err);
2183
2184 ether_addr_copy(evport->info.mac, mac);
2185 evport->info.node_guid = node_guid;
2186 if (evport->enabled && esw->mode == MLX5_ESWITCH_LEGACY)
2187 err = esw_acl_ingress_lgcy_setup(esw, evport);
2188
2189 return err;
2190 }
2191
mlx5_eswitch_set_vport_mac(struct mlx5_eswitch * esw,u16 vport,const u8 * mac)2192 int mlx5_eswitch_set_vport_mac(struct mlx5_eswitch *esw,
2193 u16 vport, const u8 *mac)
2194 {
2195 struct mlx5_vport *evport = mlx5_eswitch_get_vport(esw, vport);
2196 int err = 0;
2197
2198 if (IS_ERR(evport))
2199 return PTR_ERR(evport);
2200
2201 mutex_lock(&esw->state_lock);
2202 err = mlx5_esw_set_vport_mac_locked(esw, evport, mac);
2203 mutex_unlock(&esw->state_lock);
2204 return err;
2205 }
2206
mlx5_esw_check_port_type(struct mlx5_eswitch * esw,u16 vport_num,xa_mark_t mark)2207 static bool mlx5_esw_check_port_type(struct mlx5_eswitch *esw, u16 vport_num, xa_mark_t mark)
2208 {
2209 return xa_get_mark(&esw->vports, vport_num, mark);
2210 }
2211
mlx5_eswitch_is_vf_vport(struct mlx5_eswitch * esw,u16 vport_num)2212 bool mlx5_eswitch_is_vf_vport(struct mlx5_eswitch *esw, u16 vport_num)
2213 {
2214 return mlx5_esw_check_port_type(esw, vport_num, MLX5_ESW_VPT_VF);
2215 }
2216
mlx5_eswitch_is_pf_vf_vport(struct mlx5_eswitch * esw,u16 vport_num)2217 bool mlx5_eswitch_is_pf_vf_vport(struct mlx5_eswitch *esw, u16 vport_num)
2218 {
2219 return vport_num == MLX5_VPORT_PF ||
2220 mlx5_eswitch_is_vf_vport(esw, vport_num);
2221 }
2222
mlx5_esw_is_sf_vport(struct mlx5_eswitch * esw,u16 vport_num)2223 bool mlx5_esw_is_sf_vport(struct mlx5_eswitch *esw, u16 vport_num)
2224 {
2225 return mlx5_esw_check_port_type(esw, vport_num, MLX5_ESW_VPT_SF);
2226 }
2227
mlx5_eswitch_set_vport_state(struct mlx5_eswitch * esw,u16 vport,int link_state)2228 int mlx5_eswitch_set_vport_state(struct mlx5_eswitch *esw,
2229 u16 vport, int link_state)
2230 {
2231 struct mlx5_vport *evport = mlx5_eswitch_get_vport(esw, vport);
2232 int opmod = MLX5_VPORT_STATE_OP_MOD_ESW_VPORT;
2233 int other_vport = 1;
2234 int err = 0;
2235
2236 if (!mlx5_esw_allowed(esw))
2237 return -EPERM;
2238 if (IS_ERR(evport))
2239 return PTR_ERR(evport);
2240
2241 if (vport == MLX5_VPORT_UPLINK) {
2242 opmod = MLX5_VPORT_STATE_OP_MOD_UPLINK;
2243 other_vport = 0;
2244 vport = 0;
2245 }
2246 mutex_lock(&esw->state_lock);
2247 if (esw->mode != MLX5_ESWITCH_LEGACY) {
2248 err = -EOPNOTSUPP;
2249 goto unlock;
2250 }
2251
2252 err = mlx5_modify_vport_admin_state(esw->dev, opmod, vport, other_vport, link_state);
2253 if (err) {
2254 mlx5_core_warn(esw->dev, "Failed to set vport %d link state, opmod = %d, err = %d",
2255 vport, opmod, err);
2256 goto unlock;
2257 }
2258
2259 evport->info.link_state = link_state;
2260
2261 unlock:
2262 mutex_unlock(&esw->state_lock);
2263 return err;
2264 }
2265
mlx5_eswitch_get_vport_config(struct mlx5_eswitch * esw,u16 vport,struct ifla_vf_info * ivi)2266 int mlx5_eswitch_get_vport_config(struct mlx5_eswitch *esw,
2267 u16 vport, struct ifla_vf_info *ivi)
2268 {
2269 struct mlx5_vport *evport = mlx5_eswitch_get_vport(esw, vport);
2270 u32 max_rate, min_rate;
2271
2272 if (IS_ERR(evport))
2273 return PTR_ERR(evport);
2274
2275 memset(ivi, 0, sizeof(*ivi));
2276 ivi->vf = vport - 1;
2277
2278 mutex_lock(&esw->state_lock);
2279
2280 mlx5_query_nic_vport_mac_address(esw->dev, vport, true,
2281 evport->info.mac);
2282 ether_addr_copy(ivi->mac, evport->info.mac);
2283 ivi->linkstate = evport->info.link_state;
2284 ivi->vlan = evport->info.vlan;
2285 ivi->qos = evport->info.qos;
2286 ivi->spoofchk = evport->info.spoofchk;
2287 ivi->trusted = evport->info.trusted;
2288
2289 if (mlx5_esw_qos_get_vport_rate(evport, &max_rate, &min_rate)) {
2290 ivi->max_tx_rate = max_rate;
2291 ivi->min_tx_rate = min_rate;
2292 }
2293 mutex_unlock(&esw->state_lock);
2294
2295 return 0;
2296 }
2297
__mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch * esw,u16 vport,u16 vlan,u8 qos,u8 set_flags)2298 int __mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw,
2299 u16 vport, u16 vlan, u8 qos, u8 set_flags)
2300 {
2301 struct mlx5_vport *evport = mlx5_eswitch_get_vport(esw, vport);
2302 bool vst_mode_steering = esw_vst_mode_is_steering(esw);
2303 int err = 0;
2304
2305 if (IS_ERR(evport))
2306 return PTR_ERR(evport);
2307 if (vlan > 4095 || qos > 7)
2308 return -EINVAL;
2309
2310 if (esw->mode == MLX5_ESWITCH_OFFLOADS || !vst_mode_steering) {
2311 err = modify_esw_vport_cvlan(esw->dev, vport, vlan, qos, set_flags);
2312 if (err)
2313 return err;
2314 }
2315
2316 evport->info.vlan = vlan;
2317 evport->info.qos = qos;
2318 if (evport->enabled && esw->mode == MLX5_ESWITCH_LEGACY) {
2319 err = esw_acl_ingress_lgcy_setup(esw, evport);
2320 if (err)
2321 return err;
2322 err = esw_acl_egress_lgcy_setup(esw, evport);
2323 }
2324
2325 return err;
2326 }
2327
mlx5_eswitch_get_vport_stats(struct mlx5_eswitch * esw,u16 vport_num,struct ifla_vf_stats * vf_stats)2328 int mlx5_eswitch_get_vport_stats(struct mlx5_eswitch *esw,
2329 u16 vport_num,
2330 struct ifla_vf_stats *vf_stats)
2331 {
2332 struct mlx5_vport *vport = mlx5_eswitch_get_vport(esw, vport_num);
2333 int outlen = MLX5_ST_SZ_BYTES(query_vport_counter_out);
2334 u32 in[MLX5_ST_SZ_DW(query_vport_counter_in)] = {};
2335 struct mlx5_vport_drop_stats stats = {};
2336 int err = 0;
2337 u32 *out;
2338
2339 if (IS_ERR(vport))
2340 return PTR_ERR(vport);
2341
2342 out = kvzalloc(outlen, GFP_KERNEL);
2343 if (!out)
2344 return -ENOMEM;
2345
2346 MLX5_SET(query_vport_counter_in, in, opcode,
2347 MLX5_CMD_OP_QUERY_VPORT_COUNTER);
2348 MLX5_SET(query_vport_counter_in, in, op_mod, 0);
2349 MLX5_SET(query_vport_counter_in, in, vport_number, vport->vport);
2350 MLX5_SET(query_vport_counter_in, in, other_vport, 1);
2351
2352 err = mlx5_cmd_exec_inout(esw->dev, query_vport_counter, in, out);
2353 if (err)
2354 goto free_out;
2355
2356 #define MLX5_GET_CTR(p, x) \
2357 MLX5_GET64(query_vport_counter_out, p, x)
2358
2359 memset(vf_stats, 0, sizeof(*vf_stats));
2360 vf_stats->rx_packets =
2361 MLX5_GET_CTR(out, received_eth_unicast.packets) +
2362 MLX5_GET_CTR(out, received_ib_unicast.packets) +
2363 MLX5_GET_CTR(out, received_eth_multicast.packets) +
2364 MLX5_GET_CTR(out, received_ib_multicast.packets) +
2365 MLX5_GET_CTR(out, received_eth_broadcast.packets);
2366
2367 vf_stats->rx_bytes =
2368 MLX5_GET_CTR(out, received_eth_unicast.octets) +
2369 MLX5_GET_CTR(out, received_ib_unicast.octets) +
2370 MLX5_GET_CTR(out, received_eth_multicast.octets) +
2371 MLX5_GET_CTR(out, received_ib_multicast.octets) +
2372 MLX5_GET_CTR(out, received_eth_broadcast.octets);
2373
2374 vf_stats->tx_packets =
2375 MLX5_GET_CTR(out, transmitted_eth_unicast.packets) +
2376 MLX5_GET_CTR(out, transmitted_ib_unicast.packets) +
2377 MLX5_GET_CTR(out, transmitted_eth_multicast.packets) +
2378 MLX5_GET_CTR(out, transmitted_ib_multicast.packets) +
2379 MLX5_GET_CTR(out, transmitted_eth_broadcast.packets);
2380
2381 vf_stats->tx_bytes =
2382 MLX5_GET_CTR(out, transmitted_eth_unicast.octets) +
2383 MLX5_GET_CTR(out, transmitted_ib_unicast.octets) +
2384 MLX5_GET_CTR(out, transmitted_eth_multicast.octets) +
2385 MLX5_GET_CTR(out, transmitted_ib_multicast.octets) +
2386 MLX5_GET_CTR(out, transmitted_eth_broadcast.octets);
2387
2388 vf_stats->multicast =
2389 MLX5_GET_CTR(out, received_eth_multicast.packets) +
2390 MLX5_GET_CTR(out, received_ib_multicast.packets);
2391
2392 vf_stats->broadcast =
2393 MLX5_GET_CTR(out, received_eth_broadcast.packets);
2394
2395 err = mlx5_esw_query_vport_drop_stats(esw->dev, vport, &stats);
2396 if (err)
2397 goto free_out;
2398 vf_stats->rx_dropped = stats.rx_dropped;
2399 vf_stats->tx_dropped = stats.tx_dropped;
2400
2401 free_out:
2402 kvfree(out);
2403 return err;
2404 }
2405
mlx5_eswitch_mode(const struct mlx5_core_dev * dev)2406 u8 mlx5_eswitch_mode(const struct mlx5_core_dev *dev)
2407 {
2408 struct mlx5_eswitch *esw = dev->priv.eswitch;
2409
2410 return mlx5_esw_allowed(esw) ? esw->mode : MLX5_ESWITCH_LEGACY;
2411 }
2412 EXPORT_SYMBOL_GPL(mlx5_eswitch_mode);
2413
2414 enum devlink_eswitch_encap_mode
mlx5_eswitch_get_encap_mode(const struct mlx5_core_dev * dev)2415 mlx5_eswitch_get_encap_mode(const struct mlx5_core_dev *dev)
2416 {
2417 struct mlx5_eswitch *esw;
2418
2419 esw = dev->priv.eswitch;
2420 return (mlx5_eswitch_mode(dev) == MLX5_ESWITCH_OFFLOADS) ? esw->offloads.encap :
2421 DEVLINK_ESWITCH_ENCAP_MODE_NONE;
2422 }
2423 EXPORT_SYMBOL(mlx5_eswitch_get_encap_mode);
2424
mlx5_esw_multipath_prereq(struct mlx5_core_dev * dev0,struct mlx5_core_dev * dev1)2425 bool mlx5_esw_multipath_prereq(struct mlx5_core_dev *dev0,
2426 struct mlx5_core_dev *dev1)
2427 {
2428 return (dev0->priv.eswitch->mode == MLX5_ESWITCH_OFFLOADS &&
2429 dev1->priv.eswitch->mode == MLX5_ESWITCH_OFFLOADS);
2430 }
2431
mlx5_esw_event_notifier_register(struct mlx5_core_dev * dev,struct notifier_block * nb)2432 int mlx5_esw_event_notifier_register(struct mlx5_core_dev *dev,
2433 struct notifier_block *nb)
2434 {
2435 return blocking_notifier_chain_register(&dev->priv.esw_n_head, nb);
2436 }
2437
mlx5_esw_event_notifier_unregister(struct mlx5_core_dev * dev,struct notifier_block * nb)2438 void mlx5_esw_event_notifier_unregister(struct mlx5_core_dev *dev,
2439 struct notifier_block *nb)
2440 {
2441 blocking_notifier_chain_unregister(&dev->priv.esw_n_head, nb);
2442 }
2443
2444 /**
2445 * mlx5_esw_hold() - Try to take a read lock on esw mode lock.
2446 * @mdev: mlx5 core device.
2447 *
2448 * Should be called by esw resources callers.
2449 *
2450 * Return: true on success or false.
2451 */
mlx5_esw_hold(struct mlx5_core_dev * mdev)2452 bool mlx5_esw_hold(struct mlx5_core_dev *mdev)
2453 {
2454 struct mlx5_eswitch *esw = mdev->priv.eswitch;
2455
2456 /* e.g. VF doesn't have eswitch so nothing to do */
2457 if (!mlx5_esw_allowed(esw))
2458 return true;
2459
2460 if (down_read_trylock(&esw->mode_lock) != 0) {
2461 if (esw->eswitch_operation_in_progress) {
2462 up_read(&esw->mode_lock);
2463 return false;
2464 }
2465 return true;
2466 }
2467
2468 return false;
2469 }
2470
2471 /**
2472 * mlx5_esw_release() - Release a read lock on esw mode lock.
2473 * @mdev: mlx5 core device.
2474 */
mlx5_esw_release(struct mlx5_core_dev * mdev)2475 void mlx5_esw_release(struct mlx5_core_dev *mdev)
2476 {
2477 struct mlx5_eswitch *esw = mdev->priv.eswitch;
2478
2479 if (mlx5_esw_allowed(esw))
2480 up_read(&esw->mode_lock);
2481 }
2482
2483 /**
2484 * mlx5_esw_get() - Increase esw user count.
2485 * @mdev: mlx5 core device.
2486 */
mlx5_esw_get(struct mlx5_core_dev * mdev)2487 void mlx5_esw_get(struct mlx5_core_dev *mdev)
2488 {
2489 struct mlx5_eswitch *esw = mdev->priv.eswitch;
2490
2491 if (mlx5_esw_allowed(esw))
2492 atomic64_inc(&esw->user_count);
2493 }
2494
2495 /**
2496 * mlx5_esw_put() - Decrease esw user count.
2497 * @mdev: mlx5 core device.
2498 */
mlx5_esw_put(struct mlx5_core_dev * mdev)2499 void mlx5_esw_put(struct mlx5_core_dev *mdev)
2500 {
2501 struct mlx5_eswitch *esw = mdev->priv.eswitch;
2502
2503 if (mlx5_esw_allowed(esw))
2504 atomic64_dec_if_positive(&esw->user_count);
2505 }
2506
2507 /**
2508 * mlx5_esw_try_lock() - Take a write lock on esw mode lock.
2509 * @esw: eswitch device.
2510 *
2511 * Should be called by esw mode change routine.
2512 *
2513 * Return:
2514 * * 0 - esw mode if successfully locked and refcount is 0.
2515 * * -EBUSY - refcount is not 0.
2516 * * -EINVAL - In the middle of switching mode or lock is already held.
2517 */
mlx5_esw_try_lock(struct mlx5_eswitch * esw)2518 int mlx5_esw_try_lock(struct mlx5_eswitch *esw)
2519 {
2520 if (down_write_trylock(&esw->mode_lock) == 0)
2521 return -EINVAL;
2522
2523 if (esw->eswitch_operation_in_progress ||
2524 atomic64_read(&esw->user_count) > 0) {
2525 up_write(&esw->mode_lock);
2526 return -EBUSY;
2527 }
2528
2529 return esw->mode;
2530 }
2531
mlx5_esw_lock(struct mlx5_eswitch * esw)2532 int mlx5_esw_lock(struct mlx5_eswitch *esw)
2533 {
2534 down_write(&esw->mode_lock);
2535
2536 if (esw->eswitch_operation_in_progress) {
2537 up_write(&esw->mode_lock);
2538 return -EBUSY;
2539 }
2540
2541 return 0;
2542 }
2543
2544 /**
2545 * mlx5_esw_unlock() - Release write lock on esw mode lock
2546 * @esw: eswitch device.
2547 */
mlx5_esw_unlock(struct mlx5_eswitch * esw)2548 void mlx5_esw_unlock(struct mlx5_eswitch *esw)
2549 {
2550 up_write(&esw->mode_lock);
2551 }
2552
2553 /**
2554 * mlx5_eswitch_get_total_vports - Get total vports of the eswitch
2555 *
2556 * @dev: Pointer to core device
2557 *
2558 * mlx5_eswitch_get_total_vports returns total number of eswitch vports.
2559 */
mlx5_eswitch_get_total_vports(const struct mlx5_core_dev * dev)2560 u16 mlx5_eswitch_get_total_vports(const struct mlx5_core_dev *dev)
2561 {
2562 struct mlx5_eswitch *esw;
2563
2564 esw = dev->priv.eswitch;
2565 return mlx5_esw_allowed(esw) ? esw->total_vports : 0;
2566 }
2567 EXPORT_SYMBOL_GPL(mlx5_eswitch_get_total_vports);
2568
2569 /**
2570 * mlx5_eswitch_get_core_dev - Get the mdev device
2571 * @esw : eswitch device.
2572 *
2573 * Return the mellanox core device which manages the eswitch.
2574 */
mlx5_eswitch_get_core_dev(struct mlx5_eswitch * esw)2575 struct mlx5_core_dev *mlx5_eswitch_get_core_dev(struct mlx5_eswitch *esw)
2576 {
2577 return mlx5_esw_allowed(esw) ? esw->dev : NULL;
2578 }
2579 EXPORT_SYMBOL(mlx5_eswitch_get_core_dev);
2580
mlx5_eswitch_block_ipsec(struct mlx5_core_dev * dev)2581 bool mlx5_eswitch_block_ipsec(struct mlx5_core_dev *dev)
2582 {
2583 struct mlx5_eswitch *esw = dev->priv.eswitch;
2584
2585 if (!mlx5_esw_allowed(esw))
2586 return true;
2587
2588 mutex_lock(&esw->state_lock);
2589 if (esw->enabled_ipsec_vf_count) {
2590 mutex_unlock(&esw->state_lock);
2591 return false;
2592 }
2593
2594 dev->num_ipsec_offloads++;
2595 mutex_unlock(&esw->state_lock);
2596 return true;
2597 }
2598
mlx5_eswitch_unblock_ipsec(struct mlx5_core_dev * dev)2599 void mlx5_eswitch_unblock_ipsec(struct mlx5_core_dev *dev)
2600 {
2601 struct mlx5_eswitch *esw = dev->priv.eswitch;
2602
2603 if (!mlx5_esw_allowed(esw))
2604 /* Failure means no eswitch => core dev is not a PF */
2605 return;
2606
2607 mutex_lock(&esw->state_lock);
2608 dev->num_ipsec_offloads--;
2609 mutex_unlock(&esw->state_lock);
2610 }
2611
mlx5_esw_host_functions_enabled(const struct mlx5_core_dev * dev)2612 bool mlx5_esw_host_functions_enabled(const struct mlx5_core_dev *dev)
2613 {
2614 if (!dev->priv.eswitch)
2615 return true;
2616
2617 return !dev->priv.eswitch->esw_funcs.host_funcs_disabled;
2618 }
2619