1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
2 /* Copyright (c) 2019 Mellanox Technologies */
3
4 #include <devlink.h>
5
6 #include "mlx5_core.h"
7 #include "fw_reset.h"
8 #include "fs_core.h"
9 #include "eswitch.h"
10 #include "esw/qos.h"
11 #include "sf/dev/dev.h"
12 #include "sf/sf.h"
13
mlx5_devlink_flash_update(struct devlink * devlink,struct devlink_flash_update_params * params,struct netlink_ext_ack * extack)14 static int mlx5_devlink_flash_update(struct devlink *devlink,
15 struct devlink_flash_update_params *params,
16 struct netlink_ext_ack *extack)
17 {
18 struct mlx5_core_dev *dev = devlink_priv(devlink);
19
20 return mlx5_firmware_flash(dev, params->fw, extack);
21 }
22
mlx5_fw_ver_major(u32 version)23 static u8 mlx5_fw_ver_major(u32 version)
24 {
25 return (version >> 24) & 0xff;
26 }
27
mlx5_fw_ver_minor(u32 version)28 static u8 mlx5_fw_ver_minor(u32 version)
29 {
30 return (version >> 16) & 0xff;
31 }
32
mlx5_fw_ver_subminor(u32 version)33 static u16 mlx5_fw_ver_subminor(u32 version)
34 {
35 return version & 0xffff;
36 }
37
38 #define DEVLINK_FW_STRING_LEN 32
39
40 static int
mlx5_devlink_info_get(struct devlink * devlink,struct devlink_info_req * req,struct netlink_ext_ack * extack)41 mlx5_devlink_info_get(struct devlink *devlink, struct devlink_info_req *req,
42 struct netlink_ext_ack *extack)
43 {
44 struct mlx5_core_dev *dev = devlink_priv(devlink);
45 char version_str[DEVLINK_FW_STRING_LEN];
46 u32 running_fw, stored_fw;
47 int err;
48
49 if (!mlx5_core_is_pf(dev))
50 return 0;
51
52 err = devlink_info_version_fixed_put(req, "fw.psid", dev->board_id);
53 if (err)
54 return err;
55
56 err = mlx5_fw_version_query(dev, &running_fw, &stored_fw);
57 if (err)
58 return err;
59
60 snprintf(version_str, sizeof(version_str), "%d.%d.%04d",
61 mlx5_fw_ver_major(running_fw), mlx5_fw_ver_minor(running_fw),
62 mlx5_fw_ver_subminor(running_fw));
63 err = devlink_info_version_running_put(req, "fw.version", version_str);
64 if (err)
65 return err;
66 err = devlink_info_version_running_put(req,
67 DEVLINK_INFO_VERSION_GENERIC_FW,
68 version_str);
69 if (err)
70 return err;
71
72 /* no pending version, return running (stored) version */
73 if (stored_fw == 0)
74 stored_fw = running_fw;
75
76 snprintf(version_str, sizeof(version_str), "%d.%d.%04d",
77 mlx5_fw_ver_major(stored_fw), mlx5_fw_ver_minor(stored_fw),
78 mlx5_fw_ver_subminor(stored_fw));
79 err = devlink_info_version_stored_put(req, "fw.version", version_str);
80 if (err)
81 return err;
82 return devlink_info_version_stored_put(req,
83 DEVLINK_INFO_VERSION_GENERIC_FW,
84 version_str);
85 }
86
mlx5_devlink_reload_fw_activate(struct devlink * devlink,struct netlink_ext_ack * extack)87 static int mlx5_devlink_reload_fw_activate(struct devlink *devlink, struct netlink_ext_ack *extack)
88 {
89 struct mlx5_core_dev *dev = devlink_priv(devlink);
90 u8 reset_level, reset_type, net_port_alive;
91 int err;
92
93 err = mlx5_fw_reset_query(dev, &reset_level, &reset_type);
94 if (err)
95 return err;
96 if (!(reset_level & MLX5_MFRL_REG_RESET_LEVEL3)) {
97 NL_SET_ERR_MSG_MOD(extack, "FW activate requires reboot");
98 return -EINVAL;
99 }
100
101 net_port_alive = !!(reset_type & MLX5_MFRL_REG_RESET_TYPE_NET_PORT_ALIVE);
102 err = mlx5_fw_reset_set_reset_sync(dev, net_port_alive, extack);
103 if (err)
104 return err;
105
106 err = mlx5_fw_reset_wait_reset_done(dev);
107 if (err)
108 return err;
109
110 mlx5_unload_one_devl_locked(dev, true);
111 err = mlx5_health_wait_pci_up(dev);
112 if (err)
113 NL_SET_ERR_MSG_MOD(extack, "FW activate aborted, PCI reads fail after reset");
114
115 return err;
116 }
117
mlx5_devlink_trigger_fw_live_patch(struct devlink * devlink,struct netlink_ext_ack * extack)118 static int mlx5_devlink_trigger_fw_live_patch(struct devlink *devlink,
119 struct netlink_ext_ack *extack)
120 {
121 struct mlx5_core_dev *dev = devlink_priv(devlink);
122 u8 reset_level;
123 int err;
124
125 err = mlx5_fw_reset_query(dev, &reset_level, NULL);
126 if (err)
127 return err;
128 if (!(reset_level & MLX5_MFRL_REG_RESET_LEVEL0)) {
129 NL_SET_ERR_MSG_MOD(extack,
130 "FW upgrade to the stored FW can't be done by FW live patching");
131 return -EINVAL;
132 }
133
134 return mlx5_fw_reset_set_live_patch(dev);
135 }
136
mlx5_devlink_reload_down(struct devlink * devlink,bool netns_change,enum devlink_reload_action action,enum devlink_reload_limit limit,struct netlink_ext_ack * extack)137 static int mlx5_devlink_reload_down(struct devlink *devlink, bool netns_change,
138 enum devlink_reload_action action,
139 enum devlink_reload_limit limit,
140 struct netlink_ext_ack *extack)
141 {
142 struct mlx5_core_dev *dev = devlink_priv(devlink);
143 struct pci_dev *pdev = dev->pdev;
144 int ret = 0;
145
146 if (mlx5_dev_is_lightweight(dev)) {
147 if (action != DEVLINK_RELOAD_ACTION_DRIVER_REINIT)
148 return -EOPNOTSUPP;
149 mlx5_unload_one_light(dev);
150 return 0;
151 }
152
153 if (mlx5_lag_is_active(dev)) {
154 NL_SET_ERR_MSG_MOD(extack, "reload is unsupported in Lag mode");
155 return -EOPNOTSUPP;
156 }
157
158 if (mlx5_core_is_mp_slave(dev)) {
159 NL_SET_ERR_MSG_MOD(extack, "reload is unsupported for multi port slave");
160 return -EOPNOTSUPP;
161 }
162
163 if (action == DEVLINK_RELOAD_ACTION_FW_ACTIVATE &&
164 !dev->priv.fw_reset) {
165 NL_SET_ERR_MSG_MOD(extack, "FW activate is unsupported for this function");
166 return -EOPNOTSUPP;
167 }
168
169 if (mlx5_core_is_pf(dev) && pci_num_vf(pdev))
170 NL_SET_ERR_MSG_MOD(extack, "reload while VFs are present is unfavorable");
171
172 switch (action) {
173 case DEVLINK_RELOAD_ACTION_DRIVER_REINIT:
174 mlx5_unload_one_devl_locked(dev, false);
175 break;
176 case DEVLINK_RELOAD_ACTION_FW_ACTIVATE:
177 if (limit == DEVLINK_RELOAD_LIMIT_NO_RESET)
178 ret = mlx5_devlink_trigger_fw_live_patch(devlink, extack);
179 else
180 ret = mlx5_devlink_reload_fw_activate(devlink, extack);
181 break;
182 default:
183 /* Unsupported action should not get to this function */
184 WARN_ON(1);
185 ret = -EOPNOTSUPP;
186 }
187
188 return ret;
189 }
190
mlx5_devlink_reload_up(struct devlink * devlink,enum devlink_reload_action action,enum devlink_reload_limit limit,u32 * actions_performed,struct netlink_ext_ack * extack)191 static int mlx5_devlink_reload_up(struct devlink *devlink, enum devlink_reload_action action,
192 enum devlink_reload_limit limit, u32 *actions_performed,
193 struct netlink_ext_ack *extack)
194 {
195 struct mlx5_core_dev *dev = devlink_priv(devlink);
196 int ret = 0;
197
198 *actions_performed = BIT(action);
199 switch (action) {
200 case DEVLINK_RELOAD_ACTION_DRIVER_REINIT:
201 if (mlx5_dev_is_lightweight(dev)) {
202 mlx5_fw_reporters_create(dev);
203 return mlx5_init_one_devl_locked(dev);
204 }
205 ret = mlx5_load_one_devl_locked(dev, false);
206 break;
207 case DEVLINK_RELOAD_ACTION_FW_ACTIVATE:
208 if (limit == DEVLINK_RELOAD_LIMIT_NO_RESET)
209 break;
210 /* On fw_activate action, also driver is reloaded and reinit performed */
211 *actions_performed |= BIT(DEVLINK_RELOAD_ACTION_DRIVER_REINIT);
212 ret = mlx5_load_one_devl_locked(dev, true);
213 if (ret)
214 return ret;
215 ret = mlx5_fw_reset_verify_fw_complete(dev, extack);
216 break;
217 default:
218 /* Unsupported action should not get to this function */
219 WARN_ON(1);
220 ret = -EOPNOTSUPP;
221 }
222
223 return ret;
224 }
225
mlx5_find_trap_by_id(struct mlx5_core_dev * dev,int trap_id)226 static struct mlx5_devlink_trap *mlx5_find_trap_by_id(struct mlx5_core_dev *dev, int trap_id)
227 {
228 struct mlx5_devlink_trap *dl_trap;
229
230 list_for_each_entry(dl_trap, &dev->priv.traps, list)
231 if (dl_trap->trap.id == trap_id)
232 return dl_trap;
233
234 return NULL;
235 }
236
mlx5_devlink_trap_init(struct devlink * devlink,const struct devlink_trap * trap,void * trap_ctx)237 static int mlx5_devlink_trap_init(struct devlink *devlink, const struct devlink_trap *trap,
238 void *trap_ctx)
239 {
240 struct mlx5_core_dev *dev = devlink_priv(devlink);
241 struct mlx5_devlink_trap *dl_trap;
242
243 dl_trap = kzalloc(sizeof(*dl_trap), GFP_KERNEL);
244 if (!dl_trap)
245 return -ENOMEM;
246
247 dl_trap->trap.id = trap->id;
248 dl_trap->trap.action = DEVLINK_TRAP_ACTION_DROP;
249 dl_trap->item = trap_ctx;
250
251 if (mlx5_find_trap_by_id(dev, trap->id)) {
252 kfree(dl_trap);
253 mlx5_core_err(dev, "Devlink trap: Trap 0x%x already found", trap->id);
254 return -EEXIST;
255 }
256
257 list_add_tail(&dl_trap->list, &dev->priv.traps);
258 return 0;
259 }
260
mlx5_devlink_trap_fini(struct devlink * devlink,const struct devlink_trap * trap,void * trap_ctx)261 static void mlx5_devlink_trap_fini(struct devlink *devlink, const struct devlink_trap *trap,
262 void *trap_ctx)
263 {
264 struct mlx5_core_dev *dev = devlink_priv(devlink);
265 struct mlx5_devlink_trap *dl_trap;
266
267 dl_trap = mlx5_find_trap_by_id(dev, trap->id);
268 if (!dl_trap) {
269 mlx5_core_err(dev, "Devlink trap: Missing trap id 0x%x", trap->id);
270 return;
271 }
272 list_del(&dl_trap->list);
273 kfree(dl_trap);
274 }
275
mlx5_devlink_trap_action_set(struct devlink * devlink,const struct devlink_trap * trap,enum devlink_trap_action action,struct netlink_ext_ack * extack)276 static int mlx5_devlink_trap_action_set(struct devlink *devlink,
277 const struct devlink_trap *trap,
278 enum devlink_trap_action action,
279 struct netlink_ext_ack *extack)
280 {
281 struct mlx5_core_dev *dev = devlink_priv(devlink);
282 struct mlx5_devlink_trap_event_ctx trap_event_ctx;
283 enum devlink_trap_action action_orig;
284 struct mlx5_devlink_trap *dl_trap;
285 int err;
286
287 if (is_mdev_switchdev_mode(dev)) {
288 NL_SET_ERR_MSG_MOD(extack, "Devlink traps can't be set in switchdev mode");
289 return -EOPNOTSUPP;
290 }
291
292 dl_trap = mlx5_find_trap_by_id(dev, trap->id);
293 if (!dl_trap) {
294 mlx5_core_err(dev, "Devlink trap: Set action on invalid trap id 0x%x", trap->id);
295 return -EINVAL;
296 }
297
298 if (action != DEVLINK_TRAP_ACTION_DROP && action != DEVLINK_TRAP_ACTION_TRAP)
299 return -EOPNOTSUPP;
300
301 if (action == dl_trap->trap.action)
302 return 0;
303
304 action_orig = dl_trap->trap.action;
305 dl_trap->trap.action = action;
306 trap_event_ctx.trap = &dl_trap->trap;
307 trap_event_ctx.err = 0;
308 err = mlx5_blocking_notifier_call_chain(dev, MLX5_DRIVER_EVENT_TYPE_TRAP,
309 &trap_event_ctx);
310 if (err == NOTIFY_BAD)
311 dl_trap->trap.action = action_orig;
312
313 return trap_event_ctx.err;
314 }
315
316 static const struct devlink_ops mlx5_devlink_ops = {
317 #ifdef CONFIG_MLX5_ESWITCH
318 .eswitch_mode_set = mlx5_devlink_eswitch_mode_set,
319 .eswitch_mode_get = mlx5_devlink_eswitch_mode_get,
320 .eswitch_inline_mode_set = mlx5_devlink_eswitch_inline_mode_set,
321 .eswitch_inline_mode_get = mlx5_devlink_eswitch_inline_mode_get,
322 .eswitch_encap_mode_set = mlx5_devlink_eswitch_encap_mode_set,
323 .eswitch_encap_mode_get = mlx5_devlink_eswitch_encap_mode_get,
324 .rate_leaf_tx_share_set = mlx5_esw_devlink_rate_leaf_tx_share_set,
325 .rate_leaf_tx_max_set = mlx5_esw_devlink_rate_leaf_tx_max_set,
326 .rate_node_tx_share_set = mlx5_esw_devlink_rate_node_tx_share_set,
327 .rate_node_tx_max_set = mlx5_esw_devlink_rate_node_tx_max_set,
328 .rate_node_new = mlx5_esw_devlink_rate_node_new,
329 .rate_node_del = mlx5_esw_devlink_rate_node_del,
330 .rate_leaf_parent_set = mlx5_esw_devlink_rate_parent_set,
331 #endif
332 #ifdef CONFIG_MLX5_SF_MANAGER
333 .port_new = mlx5_devlink_sf_port_new,
334 #endif
335 .flash_update = mlx5_devlink_flash_update,
336 .info_get = mlx5_devlink_info_get,
337 .reload_actions = BIT(DEVLINK_RELOAD_ACTION_DRIVER_REINIT) |
338 BIT(DEVLINK_RELOAD_ACTION_FW_ACTIVATE),
339 .reload_limits = BIT(DEVLINK_RELOAD_LIMIT_NO_RESET),
340 .reload_down = mlx5_devlink_reload_down,
341 .reload_up = mlx5_devlink_reload_up,
342 .trap_init = mlx5_devlink_trap_init,
343 .trap_fini = mlx5_devlink_trap_fini,
344 .trap_action_set = mlx5_devlink_trap_action_set,
345 };
346
mlx5_devlink_trap_report(struct mlx5_core_dev * dev,int trap_id,struct sk_buff * skb,struct devlink_port * dl_port)347 void mlx5_devlink_trap_report(struct mlx5_core_dev *dev, int trap_id, struct sk_buff *skb,
348 struct devlink_port *dl_port)
349 {
350 struct devlink *devlink = priv_to_devlink(dev);
351 struct mlx5_devlink_trap *dl_trap;
352
353 dl_trap = mlx5_find_trap_by_id(dev, trap_id);
354 if (!dl_trap) {
355 mlx5_core_err(dev, "Devlink trap: Report on invalid trap id 0x%x", trap_id);
356 return;
357 }
358
359 if (dl_trap->trap.action != DEVLINK_TRAP_ACTION_TRAP) {
360 mlx5_core_dbg(dev, "Devlink trap: Trap id %d has action %d", trap_id,
361 dl_trap->trap.action);
362 return;
363 }
364 devlink_trap_report(devlink, skb, dl_trap->item, dl_port, NULL);
365 }
366
mlx5_devlink_trap_get_num_active(struct mlx5_core_dev * dev)367 int mlx5_devlink_trap_get_num_active(struct mlx5_core_dev *dev)
368 {
369 struct mlx5_devlink_trap *dl_trap;
370 int count = 0;
371
372 list_for_each_entry(dl_trap, &dev->priv.traps, list)
373 if (dl_trap->trap.action == DEVLINK_TRAP_ACTION_TRAP)
374 count++;
375
376 return count;
377 }
378
mlx5_devlink_traps_get_action(struct mlx5_core_dev * dev,int trap_id,enum devlink_trap_action * action)379 int mlx5_devlink_traps_get_action(struct mlx5_core_dev *dev, int trap_id,
380 enum devlink_trap_action *action)
381 {
382 struct mlx5_devlink_trap *dl_trap;
383
384 dl_trap = mlx5_find_trap_by_id(dev, trap_id);
385 if (!dl_trap) {
386 mlx5_core_err(dev, "Devlink trap: Get action on invalid trap id 0x%x",
387 trap_id);
388 return -EINVAL;
389 }
390
391 *action = dl_trap->trap.action;
392 return 0;
393 }
394
mlx5_devlink_alloc(struct device * dev)395 struct devlink *mlx5_devlink_alloc(struct device *dev)
396 {
397 return devlink_alloc(&mlx5_devlink_ops, sizeof(struct mlx5_core_dev),
398 dev);
399 }
400
mlx5_devlink_free(struct devlink * devlink)401 void mlx5_devlink_free(struct devlink *devlink)
402 {
403 devlink_free(devlink);
404 }
405
mlx5_devlink_enable_roce_validate(struct devlink * devlink,u32 id,union devlink_param_value val,struct netlink_ext_ack * extack)406 static int mlx5_devlink_enable_roce_validate(struct devlink *devlink, u32 id,
407 union devlink_param_value val,
408 struct netlink_ext_ack *extack)
409 {
410 struct mlx5_core_dev *dev = devlink_priv(devlink);
411 bool new_state = val.vbool;
412
413 if (new_state && !MLX5_CAP_GEN(dev, roce) &&
414 !(MLX5_CAP_GEN(dev, roce_rw_supported) && MLX5_CAP_GEN_MAX(dev, roce))) {
415 NL_SET_ERR_MSG_MOD(extack, "Device doesn't support RoCE");
416 return -EOPNOTSUPP;
417 }
418 if (mlx5_core_is_mp_slave(dev) || mlx5_lag_is_active(dev)) {
419 NL_SET_ERR_MSG_MOD(extack, "Multi port slave/Lag device can't configure RoCE");
420 return -EOPNOTSUPP;
421 }
422
423 return 0;
424 }
425
426 #ifdef CONFIG_MLX5_ESWITCH
mlx5_devlink_large_group_num_validate(struct devlink * devlink,u32 id,union devlink_param_value val,struct netlink_ext_ack * extack)427 static int mlx5_devlink_large_group_num_validate(struct devlink *devlink, u32 id,
428 union devlink_param_value val,
429 struct netlink_ext_ack *extack)
430 {
431 int group_num = val.vu32;
432
433 if (group_num < 1 || group_num > 1024) {
434 NL_SET_ERR_MSG_MOD(extack,
435 "Unsupported group number, supported range is 1-1024");
436 return -EOPNOTSUPP;
437 }
438
439 return 0;
440 }
441 #endif
442
mlx5_devlink_eq_depth_validate(struct devlink * devlink,u32 id,union devlink_param_value val,struct netlink_ext_ack * extack)443 static int mlx5_devlink_eq_depth_validate(struct devlink *devlink, u32 id,
444 union devlink_param_value val,
445 struct netlink_ext_ack *extack)
446 {
447 return (val.vu32 >= 64 && val.vu32 <= 4096) ? 0 : -EINVAL;
448 }
449
450 static int
mlx5_devlink_hairpin_num_queues_validate(struct devlink * devlink,u32 id,union devlink_param_value val,struct netlink_ext_ack * extack)451 mlx5_devlink_hairpin_num_queues_validate(struct devlink *devlink, u32 id,
452 union devlink_param_value val,
453 struct netlink_ext_ack *extack)
454 {
455 return val.vu32 ? 0 : -EINVAL;
456 }
457
458 static int
mlx5_devlink_hairpin_queue_size_validate(struct devlink * devlink,u32 id,union devlink_param_value val,struct netlink_ext_ack * extack)459 mlx5_devlink_hairpin_queue_size_validate(struct devlink *devlink, u32 id,
460 union devlink_param_value val,
461 struct netlink_ext_ack *extack)
462 {
463 struct mlx5_core_dev *dev = devlink_priv(devlink);
464 u32 val32 = val.vu32;
465
466 if (!is_power_of_2(val32)) {
467 NL_SET_ERR_MSG_MOD(extack, "Value is not power of two");
468 return -EINVAL;
469 }
470
471 if (val32 > BIT(MLX5_CAP_GEN(dev, log_max_hairpin_num_packets))) {
472 NL_SET_ERR_MSG_FMT_MOD(
473 extack, "Maximum hairpin queue size is %lu",
474 BIT(MLX5_CAP_GEN(dev, log_max_hairpin_num_packets)));
475 return -EINVAL;
476 }
477
478 return 0;
479 }
480
mlx5_devlink_hairpin_params_init_values(struct devlink * devlink)481 static void mlx5_devlink_hairpin_params_init_values(struct devlink *devlink)
482 {
483 struct mlx5_core_dev *dev = devlink_priv(devlink);
484 union devlink_param_value value;
485 u32 link_speed = 0;
486 u64 link_speed64;
487
488 /* set hairpin pair per each 50Gbs share of the link */
489 mlx5_port_max_linkspeed(dev, &link_speed);
490 link_speed = max_t(u32, link_speed, 50000);
491 link_speed64 = link_speed;
492 do_div(link_speed64, 50000);
493
494 value.vu32 = link_speed64;
495 devl_param_driverinit_value_set(
496 devlink, MLX5_DEVLINK_PARAM_ID_HAIRPIN_NUM_QUEUES, value);
497
498 value.vu32 =
499 BIT(min_t(u32, 16 - MLX5_MPWRQ_MIN_LOG_STRIDE_SZ(dev),
500 MLX5_CAP_GEN(dev, log_max_hairpin_num_packets)));
501 devl_param_driverinit_value_set(
502 devlink, MLX5_DEVLINK_PARAM_ID_HAIRPIN_QUEUE_SIZE, value);
503 }
504
505 static const struct devlink_param mlx5_devlink_params[] = {
506 DEVLINK_PARAM_GENERIC(ENABLE_ROCE, BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),
507 NULL, NULL, mlx5_devlink_enable_roce_validate),
508 #ifdef CONFIG_MLX5_ESWITCH
509 DEVLINK_PARAM_DRIVER(MLX5_DEVLINK_PARAM_ID_ESW_LARGE_GROUP_NUM,
510 "fdb_large_groups", DEVLINK_PARAM_TYPE_U32,
511 BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),
512 NULL, NULL,
513 mlx5_devlink_large_group_num_validate),
514 #endif
515 DEVLINK_PARAM_GENERIC(IO_EQ_SIZE, BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),
516 NULL, NULL, mlx5_devlink_eq_depth_validate),
517 DEVLINK_PARAM_GENERIC(EVENT_EQ_SIZE, BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),
518 NULL, NULL, mlx5_devlink_eq_depth_validate),
519 };
520
mlx5_devlink_set_params_init_values(struct devlink * devlink)521 static void mlx5_devlink_set_params_init_values(struct devlink *devlink)
522 {
523 struct mlx5_core_dev *dev = devlink_priv(devlink);
524 union devlink_param_value value;
525
526 value.vbool = MLX5_CAP_GEN(dev, roce) && !mlx5_dev_is_lightweight(dev);
527 devl_param_driverinit_value_set(devlink,
528 DEVLINK_PARAM_GENERIC_ID_ENABLE_ROCE,
529 value);
530
531 #ifdef CONFIG_MLX5_ESWITCH
532 value.vu32 = ESW_OFFLOADS_DEFAULT_NUM_GROUPS;
533 devl_param_driverinit_value_set(devlink,
534 MLX5_DEVLINK_PARAM_ID_ESW_LARGE_GROUP_NUM,
535 value);
536 #endif
537
538 value.vu32 = MLX5_COMP_EQ_SIZE;
539 devl_param_driverinit_value_set(devlink,
540 DEVLINK_PARAM_GENERIC_ID_IO_EQ_SIZE,
541 value);
542
543 value.vu32 = MLX5_NUM_ASYNC_EQE;
544 devl_param_driverinit_value_set(devlink,
545 DEVLINK_PARAM_GENERIC_ID_EVENT_EQ_SIZE,
546 value);
547 }
548
549 static const struct devlink_param mlx5_devlink_eth_params[] = {
550 DEVLINK_PARAM_GENERIC(ENABLE_ETH, BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),
551 NULL, NULL, NULL),
552 DEVLINK_PARAM_DRIVER(MLX5_DEVLINK_PARAM_ID_HAIRPIN_NUM_QUEUES,
553 "hairpin_num_queues", DEVLINK_PARAM_TYPE_U32,
554 BIT(DEVLINK_PARAM_CMODE_DRIVERINIT), NULL, NULL,
555 mlx5_devlink_hairpin_num_queues_validate),
556 DEVLINK_PARAM_DRIVER(MLX5_DEVLINK_PARAM_ID_HAIRPIN_QUEUE_SIZE,
557 "hairpin_queue_size", DEVLINK_PARAM_TYPE_U32,
558 BIT(DEVLINK_PARAM_CMODE_DRIVERINIT), NULL, NULL,
559 mlx5_devlink_hairpin_queue_size_validate),
560 };
561
mlx5_devlink_eth_params_register(struct devlink * devlink)562 static int mlx5_devlink_eth_params_register(struct devlink *devlink)
563 {
564 struct mlx5_core_dev *dev = devlink_priv(devlink);
565 union devlink_param_value value;
566 int err;
567
568 if (!mlx5_eth_supported(dev))
569 return 0;
570
571 err = devl_params_register(devlink, mlx5_devlink_eth_params,
572 ARRAY_SIZE(mlx5_devlink_eth_params));
573 if (err)
574 return err;
575
576 value.vbool = !mlx5_dev_is_lightweight(dev);
577 devl_param_driverinit_value_set(devlink,
578 DEVLINK_PARAM_GENERIC_ID_ENABLE_ETH,
579 value);
580
581 mlx5_devlink_hairpin_params_init_values(devlink);
582
583 return 0;
584 }
585
mlx5_devlink_eth_params_unregister(struct devlink * devlink)586 static void mlx5_devlink_eth_params_unregister(struct devlink *devlink)
587 {
588 struct mlx5_core_dev *dev = devlink_priv(devlink);
589
590 if (!mlx5_eth_supported(dev))
591 return;
592
593 devl_params_unregister(devlink, mlx5_devlink_eth_params,
594 ARRAY_SIZE(mlx5_devlink_eth_params));
595 }
596
mlx5_devlink_enable_rdma_validate(struct devlink * devlink,u32 id,union devlink_param_value val,struct netlink_ext_ack * extack)597 static int mlx5_devlink_enable_rdma_validate(struct devlink *devlink, u32 id,
598 union devlink_param_value val,
599 struct netlink_ext_ack *extack)
600 {
601 struct mlx5_core_dev *dev = devlink_priv(devlink);
602 bool new_state = val.vbool;
603
604 if (new_state && !mlx5_rdma_supported(dev))
605 return -EOPNOTSUPP;
606 return 0;
607 }
608
609 static const struct devlink_param mlx5_devlink_rdma_params[] = {
610 DEVLINK_PARAM_GENERIC(ENABLE_RDMA, BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),
611 NULL, NULL, mlx5_devlink_enable_rdma_validate),
612 };
613
mlx5_devlink_rdma_params_register(struct devlink * devlink)614 static int mlx5_devlink_rdma_params_register(struct devlink *devlink)
615 {
616 struct mlx5_core_dev *dev = devlink_priv(devlink);
617 union devlink_param_value value;
618 int err;
619
620 if (!IS_ENABLED(CONFIG_MLX5_INFINIBAND))
621 return 0;
622
623 err = devl_params_register(devlink, mlx5_devlink_rdma_params,
624 ARRAY_SIZE(mlx5_devlink_rdma_params));
625 if (err)
626 return err;
627
628 value.vbool = !mlx5_dev_is_lightweight(dev);
629 devl_param_driverinit_value_set(devlink,
630 DEVLINK_PARAM_GENERIC_ID_ENABLE_RDMA,
631 value);
632 return 0;
633 }
634
mlx5_devlink_rdma_params_unregister(struct devlink * devlink)635 static void mlx5_devlink_rdma_params_unregister(struct devlink *devlink)
636 {
637 if (!IS_ENABLED(CONFIG_MLX5_INFINIBAND))
638 return;
639
640 devl_params_unregister(devlink, mlx5_devlink_rdma_params,
641 ARRAY_SIZE(mlx5_devlink_rdma_params));
642 }
643
644 static const struct devlink_param mlx5_devlink_vnet_params[] = {
645 DEVLINK_PARAM_GENERIC(ENABLE_VNET, BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),
646 NULL, NULL, NULL),
647 };
648
mlx5_devlink_vnet_params_register(struct devlink * devlink)649 static int mlx5_devlink_vnet_params_register(struct devlink *devlink)
650 {
651 struct mlx5_core_dev *dev = devlink_priv(devlink);
652 union devlink_param_value value;
653 int err;
654
655 if (!mlx5_vnet_supported(dev))
656 return 0;
657
658 err = devl_params_register(devlink, mlx5_devlink_vnet_params,
659 ARRAY_SIZE(mlx5_devlink_vnet_params));
660 if (err)
661 return err;
662
663 value.vbool = !mlx5_dev_is_lightweight(dev);
664 devl_param_driverinit_value_set(devlink,
665 DEVLINK_PARAM_GENERIC_ID_ENABLE_VNET,
666 value);
667 return 0;
668 }
669
mlx5_devlink_vnet_params_unregister(struct devlink * devlink)670 static void mlx5_devlink_vnet_params_unregister(struct devlink *devlink)
671 {
672 struct mlx5_core_dev *dev = devlink_priv(devlink);
673
674 if (!mlx5_vnet_supported(dev))
675 return;
676
677 devl_params_unregister(devlink, mlx5_devlink_vnet_params,
678 ARRAY_SIZE(mlx5_devlink_vnet_params));
679 }
680
mlx5_devlink_auxdev_params_register(struct devlink * devlink)681 static int mlx5_devlink_auxdev_params_register(struct devlink *devlink)
682 {
683 int err;
684
685 err = mlx5_devlink_eth_params_register(devlink);
686 if (err)
687 return err;
688
689 err = mlx5_devlink_rdma_params_register(devlink);
690 if (err)
691 goto rdma_err;
692
693 err = mlx5_devlink_vnet_params_register(devlink);
694 if (err)
695 goto vnet_err;
696 return 0;
697
698 vnet_err:
699 mlx5_devlink_rdma_params_unregister(devlink);
700 rdma_err:
701 mlx5_devlink_eth_params_unregister(devlink);
702 return err;
703 }
704
mlx5_devlink_auxdev_params_unregister(struct devlink * devlink)705 static void mlx5_devlink_auxdev_params_unregister(struct devlink *devlink)
706 {
707 mlx5_devlink_vnet_params_unregister(devlink);
708 mlx5_devlink_rdma_params_unregister(devlink);
709 mlx5_devlink_eth_params_unregister(devlink);
710 }
711
mlx5_devlink_max_uc_list_validate(struct devlink * devlink,u32 id,union devlink_param_value val,struct netlink_ext_ack * extack)712 static int mlx5_devlink_max_uc_list_validate(struct devlink *devlink, u32 id,
713 union devlink_param_value val,
714 struct netlink_ext_ack *extack)
715 {
716 struct mlx5_core_dev *dev = devlink_priv(devlink);
717
718 if (val.vu32 == 0) {
719 NL_SET_ERR_MSG_MOD(extack, "max_macs value must be greater than 0");
720 return -EINVAL;
721 }
722
723 if (!is_power_of_2(val.vu32)) {
724 NL_SET_ERR_MSG_MOD(extack, "Only power of 2 values are supported for max_macs");
725 return -EINVAL;
726 }
727
728 if (ilog2(val.vu32) >
729 MLX5_CAP_GEN_MAX(dev, log_max_current_uc_list)) {
730 NL_SET_ERR_MSG_MOD(extack, "max_macs value is out of the supported range");
731 return -EINVAL;
732 }
733
734 return 0;
735 }
736
737 static const struct devlink_param mlx5_devlink_max_uc_list_params[] = {
738 DEVLINK_PARAM_GENERIC(MAX_MACS, BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),
739 NULL, NULL, mlx5_devlink_max_uc_list_validate),
740 };
741
mlx5_devlink_max_uc_list_params_register(struct devlink * devlink)742 static int mlx5_devlink_max_uc_list_params_register(struct devlink *devlink)
743 {
744 struct mlx5_core_dev *dev = devlink_priv(devlink);
745 union devlink_param_value value;
746 int err;
747
748 if (!MLX5_CAP_GEN_MAX(dev, log_max_current_uc_list_wr_supported))
749 return 0;
750
751 err = devl_params_register(devlink, mlx5_devlink_max_uc_list_params,
752 ARRAY_SIZE(mlx5_devlink_max_uc_list_params));
753 if (err)
754 return err;
755
756 value.vu32 = 1 << MLX5_CAP_GEN(dev, log_max_current_uc_list);
757 devl_param_driverinit_value_set(devlink,
758 DEVLINK_PARAM_GENERIC_ID_MAX_MACS,
759 value);
760 return 0;
761 }
762
763 static void
mlx5_devlink_max_uc_list_params_unregister(struct devlink * devlink)764 mlx5_devlink_max_uc_list_params_unregister(struct devlink *devlink)
765 {
766 struct mlx5_core_dev *dev = devlink_priv(devlink);
767
768 if (!MLX5_CAP_GEN_MAX(dev, log_max_current_uc_list_wr_supported))
769 return;
770
771 devl_params_unregister(devlink, mlx5_devlink_max_uc_list_params,
772 ARRAY_SIZE(mlx5_devlink_max_uc_list_params));
773 }
774
775 #define MLX5_TRAP_DROP(_id, _group_id) \
776 DEVLINK_TRAP_GENERIC(DROP, DROP, _id, \
777 DEVLINK_TRAP_GROUP_GENERIC_ID_##_group_id, \
778 DEVLINK_TRAP_METADATA_TYPE_F_IN_PORT)
779
780 static const struct devlink_trap mlx5_traps_arr[] = {
781 MLX5_TRAP_DROP(INGRESS_VLAN_FILTER, L2_DROPS),
782 MLX5_TRAP_DROP(DMAC_FILTER, L2_DROPS),
783 };
784
785 static const struct devlink_trap_group mlx5_trap_groups_arr[] = {
786 DEVLINK_TRAP_GROUP_GENERIC(L2_DROPS, 0),
787 };
788
mlx5_devlink_traps_register(struct devlink * devlink)789 int mlx5_devlink_traps_register(struct devlink *devlink)
790 {
791 struct mlx5_core_dev *core_dev = devlink_priv(devlink);
792 int err;
793
794 err = devl_trap_groups_register(devlink, mlx5_trap_groups_arr,
795 ARRAY_SIZE(mlx5_trap_groups_arr));
796 if (err)
797 return err;
798
799 err = devl_traps_register(devlink, mlx5_traps_arr, ARRAY_SIZE(mlx5_traps_arr),
800 &core_dev->priv);
801 if (err)
802 goto err_trap_group;
803 return 0;
804
805 err_trap_group:
806 devl_trap_groups_unregister(devlink, mlx5_trap_groups_arr,
807 ARRAY_SIZE(mlx5_trap_groups_arr));
808 return err;
809 }
810
mlx5_devlink_traps_unregister(struct devlink * devlink)811 void mlx5_devlink_traps_unregister(struct devlink *devlink)
812 {
813 devl_traps_unregister(devlink, mlx5_traps_arr, ARRAY_SIZE(mlx5_traps_arr));
814 devl_trap_groups_unregister(devlink, mlx5_trap_groups_arr,
815 ARRAY_SIZE(mlx5_trap_groups_arr));
816 }
817
mlx5_devlink_params_register(struct devlink * devlink)818 int mlx5_devlink_params_register(struct devlink *devlink)
819 {
820 int err;
821
822 /* Here only the driver init params should be registered.
823 * Runtime params should be registered by the code which
824 * behaviour they configure.
825 */
826
827 err = devl_params_register(devlink, mlx5_devlink_params,
828 ARRAY_SIZE(mlx5_devlink_params));
829 if (err)
830 return err;
831
832 mlx5_devlink_set_params_init_values(devlink);
833
834 err = mlx5_devlink_auxdev_params_register(devlink);
835 if (err)
836 goto auxdev_reg_err;
837
838 err = mlx5_devlink_max_uc_list_params_register(devlink);
839 if (err)
840 goto max_uc_list_err;
841
842 return 0;
843
844 max_uc_list_err:
845 mlx5_devlink_auxdev_params_unregister(devlink);
846 auxdev_reg_err:
847 devl_params_unregister(devlink, mlx5_devlink_params,
848 ARRAY_SIZE(mlx5_devlink_params));
849 return err;
850 }
851
mlx5_devlink_params_unregister(struct devlink * devlink)852 void mlx5_devlink_params_unregister(struct devlink *devlink)
853 {
854 mlx5_devlink_max_uc_list_params_unregister(devlink);
855 mlx5_devlink_auxdev_params_unregister(devlink);
856 devl_params_unregister(devlink, mlx5_devlink_params,
857 ARRAY_SIZE(mlx5_devlink_params));
858 }
859