xref: /linux/drivers/net/ethernet/mellanox/mlx5/core/devlink.c (revision 1a9239bb4253f9076b5b4b2a1a4e8d7defd77a95)
1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
2 /* Copyright (c) 2019 Mellanox Technologies */
3 
4 #include <devlink.h>
5 
6 #include "mlx5_core.h"
7 #include "fw_reset.h"
8 #include "fs_core.h"
9 #include "eswitch.h"
10 #include "esw/qos.h"
11 #include "sf/dev/dev.h"
12 #include "sf/sf.h"
13 
mlx5_devlink_flash_update(struct devlink * devlink,struct devlink_flash_update_params * params,struct netlink_ext_ack * extack)14 static int mlx5_devlink_flash_update(struct devlink *devlink,
15 				     struct devlink_flash_update_params *params,
16 				     struct netlink_ext_ack *extack)
17 {
18 	struct mlx5_core_dev *dev = devlink_priv(devlink);
19 
20 	return mlx5_firmware_flash(dev, params->fw, extack);
21 }
22 
mlx5_fw_ver_major(u32 version)23 static u8 mlx5_fw_ver_major(u32 version)
24 {
25 	return (version >> 24) & 0xff;
26 }
27 
mlx5_fw_ver_minor(u32 version)28 static u8 mlx5_fw_ver_minor(u32 version)
29 {
30 	return (version >> 16) & 0xff;
31 }
32 
mlx5_fw_ver_subminor(u32 version)33 static u16 mlx5_fw_ver_subminor(u32 version)
34 {
35 	return version & 0xffff;
36 }
37 
38 #define DEVLINK_FW_STRING_LEN 32
39 
40 static int
mlx5_devlink_info_get(struct devlink * devlink,struct devlink_info_req * req,struct netlink_ext_ack * extack)41 mlx5_devlink_info_get(struct devlink *devlink, struct devlink_info_req *req,
42 		      struct netlink_ext_ack *extack)
43 {
44 	struct mlx5_core_dev *dev = devlink_priv(devlink);
45 	char version_str[DEVLINK_FW_STRING_LEN];
46 	u32 running_fw, stored_fw;
47 	int err;
48 
49 	if (!mlx5_core_is_pf(dev))
50 		return 0;
51 
52 	err = devlink_info_version_fixed_put(req, "fw.psid", dev->board_id);
53 	if (err)
54 		return err;
55 
56 	err = mlx5_fw_version_query(dev, &running_fw, &stored_fw);
57 	if (err)
58 		return err;
59 
60 	snprintf(version_str, sizeof(version_str), "%d.%d.%04d",
61 		 mlx5_fw_ver_major(running_fw), mlx5_fw_ver_minor(running_fw),
62 		 mlx5_fw_ver_subminor(running_fw));
63 	err = devlink_info_version_running_put(req, "fw.version", version_str);
64 	if (err)
65 		return err;
66 	err = devlink_info_version_running_put(req,
67 					       DEVLINK_INFO_VERSION_GENERIC_FW,
68 					       version_str);
69 	if (err)
70 		return err;
71 
72 	/* no pending version, return running (stored) version */
73 	if (stored_fw == 0)
74 		stored_fw = running_fw;
75 
76 	snprintf(version_str, sizeof(version_str), "%d.%d.%04d",
77 		 mlx5_fw_ver_major(stored_fw), mlx5_fw_ver_minor(stored_fw),
78 		 mlx5_fw_ver_subminor(stored_fw));
79 	err = devlink_info_version_stored_put(req, "fw.version", version_str);
80 	if (err)
81 		return err;
82 	return devlink_info_version_stored_put(req,
83 					       DEVLINK_INFO_VERSION_GENERIC_FW,
84 					       version_str);
85 }
86 
mlx5_devlink_reload_fw_activate(struct devlink * devlink,struct netlink_ext_ack * extack)87 static int mlx5_devlink_reload_fw_activate(struct devlink *devlink, struct netlink_ext_ack *extack)
88 {
89 	struct mlx5_core_dev *dev = devlink_priv(devlink);
90 	u8 reset_level, reset_type, net_port_alive;
91 	int err;
92 
93 	err = mlx5_fw_reset_query(dev, &reset_level, &reset_type);
94 	if (err)
95 		return err;
96 	if (!(reset_level & MLX5_MFRL_REG_RESET_LEVEL3)) {
97 		NL_SET_ERR_MSG_MOD(extack, "FW activate requires reboot");
98 		return -EINVAL;
99 	}
100 
101 	net_port_alive = !!(reset_type & MLX5_MFRL_REG_RESET_TYPE_NET_PORT_ALIVE);
102 	err = mlx5_fw_reset_set_reset_sync(dev, net_port_alive, extack);
103 	if (err)
104 		return err;
105 
106 	err = mlx5_fw_reset_wait_reset_done(dev);
107 	if (err)
108 		return err;
109 
110 	mlx5_unload_one_devl_locked(dev, true);
111 	err = mlx5_health_wait_pci_up(dev);
112 	if (err)
113 		NL_SET_ERR_MSG_MOD(extack, "FW activate aborted, PCI reads fail after reset");
114 
115 	return err;
116 }
117 
mlx5_devlink_trigger_fw_live_patch(struct devlink * devlink,struct netlink_ext_ack * extack)118 static int mlx5_devlink_trigger_fw_live_patch(struct devlink *devlink,
119 					      struct netlink_ext_ack *extack)
120 {
121 	struct mlx5_core_dev *dev = devlink_priv(devlink);
122 	u8 reset_level;
123 	int err;
124 
125 	err = mlx5_fw_reset_query(dev, &reset_level, NULL);
126 	if (err)
127 		return err;
128 	if (!(reset_level & MLX5_MFRL_REG_RESET_LEVEL0)) {
129 		NL_SET_ERR_MSG_MOD(extack,
130 				   "FW upgrade to the stored FW can't be done by FW live patching");
131 		return -EINVAL;
132 	}
133 
134 	return mlx5_fw_reset_set_live_patch(dev);
135 }
136 
mlx5_devlink_reload_down(struct devlink * devlink,bool netns_change,enum devlink_reload_action action,enum devlink_reload_limit limit,struct netlink_ext_ack * extack)137 static int mlx5_devlink_reload_down(struct devlink *devlink, bool netns_change,
138 				    enum devlink_reload_action action,
139 				    enum devlink_reload_limit limit,
140 				    struct netlink_ext_ack *extack)
141 {
142 	struct mlx5_core_dev *dev = devlink_priv(devlink);
143 	struct pci_dev *pdev = dev->pdev;
144 	int ret = 0;
145 
146 	if (mlx5_dev_is_lightweight(dev)) {
147 		if (action != DEVLINK_RELOAD_ACTION_DRIVER_REINIT)
148 			return -EOPNOTSUPP;
149 		mlx5_unload_one_light(dev);
150 		return 0;
151 	}
152 
153 	if (mlx5_lag_is_active(dev)) {
154 		NL_SET_ERR_MSG_MOD(extack, "reload is unsupported in Lag mode");
155 		return -EOPNOTSUPP;
156 	}
157 
158 	if (mlx5_core_is_mp_slave(dev)) {
159 		NL_SET_ERR_MSG_MOD(extack, "reload is unsupported for multi port slave");
160 		return -EOPNOTSUPP;
161 	}
162 
163 	if (action == DEVLINK_RELOAD_ACTION_FW_ACTIVATE &&
164 	    !dev->priv.fw_reset) {
165 		NL_SET_ERR_MSG_MOD(extack, "FW activate is unsupported for this function");
166 		return -EOPNOTSUPP;
167 	}
168 
169 	if (mlx5_core_is_pf(dev) && pci_num_vf(pdev))
170 		NL_SET_ERR_MSG_MOD(extack, "reload while VFs are present is unfavorable");
171 
172 	switch (action) {
173 	case DEVLINK_RELOAD_ACTION_DRIVER_REINIT:
174 		mlx5_unload_one_devl_locked(dev, false);
175 		break;
176 	case DEVLINK_RELOAD_ACTION_FW_ACTIVATE:
177 		if (limit == DEVLINK_RELOAD_LIMIT_NO_RESET)
178 			ret = mlx5_devlink_trigger_fw_live_patch(devlink, extack);
179 		else
180 			ret = mlx5_devlink_reload_fw_activate(devlink, extack);
181 		break;
182 	default:
183 		/* Unsupported action should not get to this function */
184 		WARN_ON(1);
185 		ret = -EOPNOTSUPP;
186 	}
187 
188 	return ret;
189 }
190 
mlx5_devlink_reload_up(struct devlink * devlink,enum devlink_reload_action action,enum devlink_reload_limit limit,u32 * actions_performed,struct netlink_ext_ack * extack)191 static int mlx5_devlink_reload_up(struct devlink *devlink, enum devlink_reload_action action,
192 				  enum devlink_reload_limit limit, u32 *actions_performed,
193 				  struct netlink_ext_ack *extack)
194 {
195 	struct mlx5_core_dev *dev = devlink_priv(devlink);
196 	int ret = 0;
197 
198 	*actions_performed = BIT(action);
199 	switch (action) {
200 	case DEVLINK_RELOAD_ACTION_DRIVER_REINIT:
201 		if (mlx5_dev_is_lightweight(dev)) {
202 			mlx5_fw_reporters_create(dev);
203 			return mlx5_init_one_devl_locked(dev);
204 		}
205 		ret = mlx5_load_one_devl_locked(dev, false);
206 		break;
207 	case DEVLINK_RELOAD_ACTION_FW_ACTIVATE:
208 		if (limit == DEVLINK_RELOAD_LIMIT_NO_RESET)
209 			break;
210 		/* On fw_activate action, also driver is reloaded and reinit performed */
211 		*actions_performed |= BIT(DEVLINK_RELOAD_ACTION_DRIVER_REINIT);
212 		ret = mlx5_load_one_devl_locked(dev, true);
213 		if (ret)
214 			return ret;
215 		ret = mlx5_fw_reset_verify_fw_complete(dev, extack);
216 		break;
217 	default:
218 		/* Unsupported action should not get to this function */
219 		WARN_ON(1);
220 		ret = -EOPNOTSUPP;
221 	}
222 
223 	return ret;
224 }
225 
mlx5_find_trap_by_id(struct mlx5_core_dev * dev,int trap_id)226 static struct mlx5_devlink_trap *mlx5_find_trap_by_id(struct mlx5_core_dev *dev, int trap_id)
227 {
228 	struct mlx5_devlink_trap *dl_trap;
229 
230 	list_for_each_entry(dl_trap, &dev->priv.traps, list)
231 		if (dl_trap->trap.id == trap_id)
232 			return dl_trap;
233 
234 	return NULL;
235 }
236 
mlx5_devlink_trap_init(struct devlink * devlink,const struct devlink_trap * trap,void * trap_ctx)237 static int mlx5_devlink_trap_init(struct devlink *devlink, const struct devlink_trap *trap,
238 				  void *trap_ctx)
239 {
240 	struct mlx5_core_dev *dev = devlink_priv(devlink);
241 	struct mlx5_devlink_trap *dl_trap;
242 
243 	dl_trap = kzalloc(sizeof(*dl_trap), GFP_KERNEL);
244 	if (!dl_trap)
245 		return -ENOMEM;
246 
247 	dl_trap->trap.id = trap->id;
248 	dl_trap->trap.action = DEVLINK_TRAP_ACTION_DROP;
249 	dl_trap->item = trap_ctx;
250 
251 	if (mlx5_find_trap_by_id(dev, trap->id)) {
252 		kfree(dl_trap);
253 		mlx5_core_err(dev, "Devlink trap: Trap 0x%x already found", trap->id);
254 		return -EEXIST;
255 	}
256 
257 	list_add_tail(&dl_trap->list, &dev->priv.traps);
258 	return 0;
259 }
260 
mlx5_devlink_trap_fini(struct devlink * devlink,const struct devlink_trap * trap,void * trap_ctx)261 static void mlx5_devlink_trap_fini(struct devlink *devlink, const struct devlink_trap *trap,
262 				   void *trap_ctx)
263 {
264 	struct mlx5_core_dev *dev = devlink_priv(devlink);
265 	struct mlx5_devlink_trap *dl_trap;
266 
267 	dl_trap = mlx5_find_trap_by_id(dev, trap->id);
268 	if (!dl_trap) {
269 		mlx5_core_err(dev, "Devlink trap: Missing trap id 0x%x", trap->id);
270 		return;
271 	}
272 	list_del(&dl_trap->list);
273 	kfree(dl_trap);
274 }
275 
mlx5_devlink_trap_action_set(struct devlink * devlink,const struct devlink_trap * trap,enum devlink_trap_action action,struct netlink_ext_ack * extack)276 static int mlx5_devlink_trap_action_set(struct devlink *devlink,
277 					const struct devlink_trap *trap,
278 					enum devlink_trap_action action,
279 					struct netlink_ext_ack *extack)
280 {
281 	struct mlx5_core_dev *dev = devlink_priv(devlink);
282 	struct mlx5_devlink_trap_event_ctx trap_event_ctx;
283 	enum devlink_trap_action action_orig;
284 	struct mlx5_devlink_trap *dl_trap;
285 	int err;
286 
287 	if (is_mdev_switchdev_mode(dev)) {
288 		NL_SET_ERR_MSG_MOD(extack, "Devlink traps can't be set in switchdev mode");
289 		return -EOPNOTSUPP;
290 	}
291 
292 	dl_trap = mlx5_find_trap_by_id(dev, trap->id);
293 	if (!dl_trap) {
294 		mlx5_core_err(dev, "Devlink trap: Set action on invalid trap id 0x%x", trap->id);
295 		return -EINVAL;
296 	}
297 
298 	if (action != DEVLINK_TRAP_ACTION_DROP && action != DEVLINK_TRAP_ACTION_TRAP)
299 		return -EOPNOTSUPP;
300 
301 	if (action == dl_trap->trap.action)
302 		return 0;
303 
304 	action_orig = dl_trap->trap.action;
305 	dl_trap->trap.action = action;
306 	trap_event_ctx.trap = &dl_trap->trap;
307 	trap_event_ctx.err = 0;
308 	err = mlx5_blocking_notifier_call_chain(dev, MLX5_DRIVER_EVENT_TYPE_TRAP,
309 						&trap_event_ctx);
310 	if (err == NOTIFY_BAD)
311 		dl_trap->trap.action = action_orig;
312 
313 	return trap_event_ctx.err;
314 }
315 
316 static const struct devlink_ops mlx5_devlink_ops = {
317 #ifdef CONFIG_MLX5_ESWITCH
318 	.eswitch_mode_set = mlx5_devlink_eswitch_mode_set,
319 	.eswitch_mode_get = mlx5_devlink_eswitch_mode_get,
320 	.eswitch_inline_mode_set = mlx5_devlink_eswitch_inline_mode_set,
321 	.eswitch_inline_mode_get = mlx5_devlink_eswitch_inline_mode_get,
322 	.eswitch_encap_mode_set = mlx5_devlink_eswitch_encap_mode_set,
323 	.eswitch_encap_mode_get = mlx5_devlink_eswitch_encap_mode_get,
324 	.rate_leaf_tx_share_set = mlx5_esw_devlink_rate_leaf_tx_share_set,
325 	.rate_leaf_tx_max_set = mlx5_esw_devlink_rate_leaf_tx_max_set,
326 	.rate_node_tx_share_set = mlx5_esw_devlink_rate_node_tx_share_set,
327 	.rate_node_tx_max_set = mlx5_esw_devlink_rate_node_tx_max_set,
328 	.rate_node_new = mlx5_esw_devlink_rate_node_new,
329 	.rate_node_del = mlx5_esw_devlink_rate_node_del,
330 	.rate_leaf_parent_set = mlx5_esw_devlink_rate_leaf_parent_set,
331 	.rate_node_parent_set = mlx5_esw_devlink_rate_node_parent_set,
332 #endif
333 #ifdef CONFIG_MLX5_SF_MANAGER
334 	.port_new = mlx5_devlink_sf_port_new,
335 #endif
336 	.flash_update = mlx5_devlink_flash_update,
337 	.info_get = mlx5_devlink_info_get,
338 	.reload_actions = BIT(DEVLINK_RELOAD_ACTION_DRIVER_REINIT) |
339 			  BIT(DEVLINK_RELOAD_ACTION_FW_ACTIVATE),
340 	.reload_limits = BIT(DEVLINK_RELOAD_LIMIT_NO_RESET),
341 	.reload_down = mlx5_devlink_reload_down,
342 	.reload_up = mlx5_devlink_reload_up,
343 	.trap_init = mlx5_devlink_trap_init,
344 	.trap_fini = mlx5_devlink_trap_fini,
345 	.trap_action_set = mlx5_devlink_trap_action_set,
346 };
347 
mlx5_devlink_trap_report(struct mlx5_core_dev * dev,int trap_id,struct sk_buff * skb,struct devlink_port * dl_port)348 void mlx5_devlink_trap_report(struct mlx5_core_dev *dev, int trap_id, struct sk_buff *skb,
349 			      struct devlink_port *dl_port)
350 {
351 	struct devlink *devlink = priv_to_devlink(dev);
352 	struct mlx5_devlink_trap *dl_trap;
353 
354 	dl_trap = mlx5_find_trap_by_id(dev, trap_id);
355 	if (!dl_trap) {
356 		mlx5_core_err(dev, "Devlink trap: Report on invalid trap id 0x%x", trap_id);
357 		return;
358 	}
359 
360 	if (dl_trap->trap.action != DEVLINK_TRAP_ACTION_TRAP) {
361 		mlx5_core_dbg(dev, "Devlink trap: Trap id %d has action %d", trap_id,
362 			      dl_trap->trap.action);
363 		return;
364 	}
365 	devlink_trap_report(devlink, skb, dl_trap->item, dl_port, NULL);
366 }
367 
mlx5_devlink_trap_get_num_active(struct mlx5_core_dev * dev)368 int mlx5_devlink_trap_get_num_active(struct mlx5_core_dev *dev)
369 {
370 	struct mlx5_devlink_trap *dl_trap;
371 	int count = 0;
372 
373 	list_for_each_entry(dl_trap, &dev->priv.traps, list)
374 		if (dl_trap->trap.action == DEVLINK_TRAP_ACTION_TRAP)
375 			count++;
376 
377 	return count;
378 }
379 
mlx5_devlink_traps_get_action(struct mlx5_core_dev * dev,int trap_id,enum devlink_trap_action * action)380 int mlx5_devlink_traps_get_action(struct mlx5_core_dev *dev, int trap_id,
381 				  enum devlink_trap_action *action)
382 {
383 	struct mlx5_devlink_trap *dl_trap;
384 
385 	dl_trap = mlx5_find_trap_by_id(dev, trap_id);
386 	if (!dl_trap) {
387 		mlx5_core_err(dev, "Devlink trap: Get action on invalid trap id 0x%x",
388 			      trap_id);
389 		return -EINVAL;
390 	}
391 
392 	*action = dl_trap->trap.action;
393 	return 0;
394 }
395 
mlx5_devlink_alloc(struct device * dev)396 struct devlink *mlx5_devlink_alloc(struct device *dev)
397 {
398 	return devlink_alloc(&mlx5_devlink_ops, sizeof(struct mlx5_core_dev),
399 			     dev);
400 }
401 
mlx5_devlink_free(struct devlink * devlink)402 void mlx5_devlink_free(struct devlink *devlink)
403 {
404 	devlink_free(devlink);
405 }
406 
mlx5_devlink_enable_roce_validate(struct devlink * devlink,u32 id,union devlink_param_value val,struct netlink_ext_ack * extack)407 static int mlx5_devlink_enable_roce_validate(struct devlink *devlink, u32 id,
408 					     union devlink_param_value val,
409 					     struct netlink_ext_ack *extack)
410 {
411 	struct mlx5_core_dev *dev = devlink_priv(devlink);
412 	bool new_state = val.vbool;
413 
414 	if (new_state && !MLX5_CAP_GEN(dev, roce) &&
415 	    !(MLX5_CAP_GEN(dev, roce_rw_supported) && MLX5_CAP_GEN_MAX(dev, roce))) {
416 		NL_SET_ERR_MSG_MOD(extack, "Device doesn't support RoCE");
417 		return -EOPNOTSUPP;
418 	}
419 	if (mlx5_core_is_mp_slave(dev) || mlx5_lag_is_active(dev)) {
420 		NL_SET_ERR_MSG_MOD(extack, "Multi port slave/Lag device can't configure RoCE");
421 		return -EOPNOTSUPP;
422 	}
423 
424 	return 0;
425 }
426 
427 #ifdef CONFIG_MLX5_ESWITCH
mlx5_devlink_large_group_num_validate(struct devlink * devlink,u32 id,union devlink_param_value val,struct netlink_ext_ack * extack)428 static int mlx5_devlink_large_group_num_validate(struct devlink *devlink, u32 id,
429 						 union devlink_param_value val,
430 						 struct netlink_ext_ack *extack)
431 {
432 	int group_num = val.vu32;
433 
434 	if (group_num < 1 || group_num > 1024) {
435 		NL_SET_ERR_MSG_MOD(extack,
436 				   "Unsupported group number, supported range is 1-1024");
437 		return -EOPNOTSUPP;
438 	}
439 
440 	return 0;
441 }
442 #endif
443 
mlx5_devlink_eq_depth_validate(struct devlink * devlink,u32 id,union devlink_param_value val,struct netlink_ext_ack * extack)444 static int mlx5_devlink_eq_depth_validate(struct devlink *devlink, u32 id,
445 					  union devlink_param_value val,
446 					  struct netlink_ext_ack *extack)
447 {
448 	return (val.vu32 >= 64 && val.vu32 <= 4096) ? 0 : -EINVAL;
449 }
450 
451 static int
mlx5_devlink_hairpin_num_queues_validate(struct devlink * devlink,u32 id,union devlink_param_value val,struct netlink_ext_ack * extack)452 mlx5_devlink_hairpin_num_queues_validate(struct devlink *devlink, u32 id,
453 					 union devlink_param_value val,
454 					 struct netlink_ext_ack *extack)
455 {
456 	return val.vu32 ? 0 : -EINVAL;
457 }
458 
459 static int
mlx5_devlink_hairpin_queue_size_validate(struct devlink * devlink,u32 id,union devlink_param_value val,struct netlink_ext_ack * extack)460 mlx5_devlink_hairpin_queue_size_validate(struct devlink *devlink, u32 id,
461 					 union devlink_param_value val,
462 					 struct netlink_ext_ack *extack)
463 {
464 	struct mlx5_core_dev *dev = devlink_priv(devlink);
465 	u32 val32 = val.vu32;
466 
467 	if (!is_power_of_2(val32)) {
468 		NL_SET_ERR_MSG_MOD(extack, "Value is not power of two");
469 		return -EINVAL;
470 	}
471 
472 	if (val32 > BIT(MLX5_CAP_GEN(dev, log_max_hairpin_num_packets))) {
473 		NL_SET_ERR_MSG_FMT_MOD(
474 			extack, "Maximum hairpin queue size is %lu",
475 			BIT(MLX5_CAP_GEN(dev, log_max_hairpin_num_packets)));
476 		return -EINVAL;
477 	}
478 
479 	return 0;
480 }
481 
mlx5_devlink_hairpin_params_init_values(struct devlink * devlink)482 static void mlx5_devlink_hairpin_params_init_values(struct devlink *devlink)
483 {
484 	struct mlx5_core_dev *dev = devlink_priv(devlink);
485 	union devlink_param_value value;
486 	u32 link_speed = 0;
487 	u64 link_speed64;
488 
489 	/* set hairpin pair per each 50Gbs share of the link */
490 	mlx5_port_max_linkspeed(dev, &link_speed);
491 	link_speed = max_t(u32, link_speed, 50000);
492 	link_speed64 = link_speed;
493 	do_div(link_speed64, 50000);
494 
495 	value.vu32 = link_speed64;
496 	devl_param_driverinit_value_set(
497 		devlink, MLX5_DEVLINK_PARAM_ID_HAIRPIN_NUM_QUEUES, value);
498 
499 	value.vu32 =
500 		BIT(min_t(u32, 16 - MLX5_MPWRQ_MIN_LOG_STRIDE_SZ(dev),
501 			  MLX5_CAP_GEN(dev, log_max_hairpin_num_packets)));
502 	devl_param_driverinit_value_set(
503 		devlink, MLX5_DEVLINK_PARAM_ID_HAIRPIN_QUEUE_SIZE, value);
504 }
505 
506 static const struct devlink_param mlx5_devlink_params[] = {
507 	DEVLINK_PARAM_GENERIC(ENABLE_ROCE, BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),
508 			      NULL, NULL, mlx5_devlink_enable_roce_validate),
509 #ifdef CONFIG_MLX5_ESWITCH
510 	DEVLINK_PARAM_DRIVER(MLX5_DEVLINK_PARAM_ID_ESW_LARGE_GROUP_NUM,
511 			     "fdb_large_groups", DEVLINK_PARAM_TYPE_U32,
512 			     BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),
513 			     NULL, NULL,
514 			     mlx5_devlink_large_group_num_validate),
515 #endif
516 	DEVLINK_PARAM_GENERIC(IO_EQ_SIZE, BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),
517 			      NULL, NULL, mlx5_devlink_eq_depth_validate),
518 	DEVLINK_PARAM_GENERIC(EVENT_EQ_SIZE, BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),
519 			      NULL, NULL, mlx5_devlink_eq_depth_validate),
520 };
521 
mlx5_devlink_set_params_init_values(struct devlink * devlink)522 static void mlx5_devlink_set_params_init_values(struct devlink *devlink)
523 {
524 	struct mlx5_core_dev *dev = devlink_priv(devlink);
525 	union devlink_param_value value;
526 
527 	value.vbool = MLX5_CAP_GEN(dev, roce) && !mlx5_dev_is_lightweight(dev);
528 	devl_param_driverinit_value_set(devlink,
529 					DEVLINK_PARAM_GENERIC_ID_ENABLE_ROCE,
530 					value);
531 
532 #ifdef CONFIG_MLX5_ESWITCH
533 	value.vu32 = ESW_OFFLOADS_DEFAULT_NUM_GROUPS;
534 	devl_param_driverinit_value_set(devlink,
535 					MLX5_DEVLINK_PARAM_ID_ESW_LARGE_GROUP_NUM,
536 					value);
537 #endif
538 
539 	value.vu32 = MLX5_COMP_EQ_SIZE;
540 	devl_param_driverinit_value_set(devlink,
541 					DEVLINK_PARAM_GENERIC_ID_IO_EQ_SIZE,
542 					value);
543 
544 	value.vu32 = MLX5_NUM_ASYNC_EQE;
545 	devl_param_driverinit_value_set(devlink,
546 					DEVLINK_PARAM_GENERIC_ID_EVENT_EQ_SIZE,
547 					value);
548 }
549 
550 static const struct devlink_param mlx5_devlink_eth_params[] = {
551 	DEVLINK_PARAM_GENERIC(ENABLE_ETH, BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),
552 			      NULL, NULL, NULL),
553 	DEVLINK_PARAM_DRIVER(MLX5_DEVLINK_PARAM_ID_HAIRPIN_NUM_QUEUES,
554 			     "hairpin_num_queues", DEVLINK_PARAM_TYPE_U32,
555 			     BIT(DEVLINK_PARAM_CMODE_DRIVERINIT), NULL, NULL,
556 			     mlx5_devlink_hairpin_num_queues_validate),
557 	DEVLINK_PARAM_DRIVER(MLX5_DEVLINK_PARAM_ID_HAIRPIN_QUEUE_SIZE,
558 			     "hairpin_queue_size", DEVLINK_PARAM_TYPE_U32,
559 			     BIT(DEVLINK_PARAM_CMODE_DRIVERINIT), NULL, NULL,
560 			     mlx5_devlink_hairpin_queue_size_validate),
561 };
562 
mlx5_devlink_eth_params_register(struct devlink * devlink)563 static int mlx5_devlink_eth_params_register(struct devlink *devlink)
564 {
565 	struct mlx5_core_dev *dev = devlink_priv(devlink);
566 	union devlink_param_value value;
567 	int err;
568 
569 	if (!mlx5_eth_supported(dev))
570 		return 0;
571 
572 	err = devl_params_register(devlink, mlx5_devlink_eth_params,
573 				   ARRAY_SIZE(mlx5_devlink_eth_params));
574 	if (err)
575 		return err;
576 
577 	value.vbool = !mlx5_dev_is_lightweight(dev);
578 	devl_param_driverinit_value_set(devlink,
579 					DEVLINK_PARAM_GENERIC_ID_ENABLE_ETH,
580 					value);
581 
582 	mlx5_devlink_hairpin_params_init_values(devlink);
583 
584 	return 0;
585 }
586 
mlx5_devlink_eth_params_unregister(struct devlink * devlink)587 static void mlx5_devlink_eth_params_unregister(struct devlink *devlink)
588 {
589 	struct mlx5_core_dev *dev = devlink_priv(devlink);
590 
591 	if (!mlx5_eth_supported(dev))
592 		return;
593 
594 	devl_params_unregister(devlink, mlx5_devlink_eth_params,
595 			       ARRAY_SIZE(mlx5_devlink_eth_params));
596 }
597 
mlx5_devlink_enable_rdma_validate(struct devlink * devlink,u32 id,union devlink_param_value val,struct netlink_ext_ack * extack)598 static int mlx5_devlink_enable_rdma_validate(struct devlink *devlink, u32 id,
599 					     union devlink_param_value val,
600 					     struct netlink_ext_ack *extack)
601 {
602 	struct mlx5_core_dev *dev = devlink_priv(devlink);
603 	bool new_state = val.vbool;
604 
605 	if (new_state && !mlx5_rdma_supported(dev))
606 		return -EOPNOTSUPP;
607 	return 0;
608 }
609 
610 static const struct devlink_param mlx5_devlink_rdma_params[] = {
611 	DEVLINK_PARAM_GENERIC(ENABLE_RDMA, BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),
612 			      NULL, NULL, mlx5_devlink_enable_rdma_validate),
613 };
614 
mlx5_devlink_rdma_params_register(struct devlink * devlink)615 static int mlx5_devlink_rdma_params_register(struct devlink *devlink)
616 {
617 	struct mlx5_core_dev *dev = devlink_priv(devlink);
618 	union devlink_param_value value;
619 	int err;
620 
621 	if (!IS_ENABLED(CONFIG_MLX5_INFINIBAND))
622 		return 0;
623 
624 	err = devl_params_register(devlink, mlx5_devlink_rdma_params,
625 				   ARRAY_SIZE(mlx5_devlink_rdma_params));
626 	if (err)
627 		return err;
628 
629 	value.vbool = !mlx5_dev_is_lightweight(dev);
630 	devl_param_driverinit_value_set(devlink,
631 					DEVLINK_PARAM_GENERIC_ID_ENABLE_RDMA,
632 					value);
633 	return 0;
634 }
635 
mlx5_devlink_rdma_params_unregister(struct devlink * devlink)636 static void mlx5_devlink_rdma_params_unregister(struct devlink *devlink)
637 {
638 	if (!IS_ENABLED(CONFIG_MLX5_INFINIBAND))
639 		return;
640 
641 	devl_params_unregister(devlink, mlx5_devlink_rdma_params,
642 			       ARRAY_SIZE(mlx5_devlink_rdma_params));
643 }
644 
645 static const struct devlink_param mlx5_devlink_vnet_params[] = {
646 	DEVLINK_PARAM_GENERIC(ENABLE_VNET, BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),
647 			      NULL, NULL, NULL),
648 };
649 
mlx5_devlink_vnet_params_register(struct devlink * devlink)650 static int mlx5_devlink_vnet_params_register(struct devlink *devlink)
651 {
652 	struct mlx5_core_dev *dev = devlink_priv(devlink);
653 	union devlink_param_value value;
654 	int err;
655 
656 	if (!mlx5_vnet_supported(dev))
657 		return 0;
658 
659 	err = devl_params_register(devlink, mlx5_devlink_vnet_params,
660 				   ARRAY_SIZE(mlx5_devlink_vnet_params));
661 	if (err)
662 		return err;
663 
664 	value.vbool = !mlx5_dev_is_lightweight(dev);
665 	devl_param_driverinit_value_set(devlink,
666 					DEVLINK_PARAM_GENERIC_ID_ENABLE_VNET,
667 					value);
668 	return 0;
669 }
670 
mlx5_devlink_vnet_params_unregister(struct devlink * devlink)671 static void mlx5_devlink_vnet_params_unregister(struct devlink *devlink)
672 {
673 	struct mlx5_core_dev *dev = devlink_priv(devlink);
674 
675 	if (!mlx5_vnet_supported(dev))
676 		return;
677 
678 	devl_params_unregister(devlink, mlx5_devlink_vnet_params,
679 			       ARRAY_SIZE(mlx5_devlink_vnet_params));
680 }
681 
mlx5_devlink_auxdev_params_register(struct devlink * devlink)682 static int mlx5_devlink_auxdev_params_register(struct devlink *devlink)
683 {
684 	int err;
685 
686 	err = mlx5_devlink_eth_params_register(devlink);
687 	if (err)
688 		return err;
689 
690 	err = mlx5_devlink_rdma_params_register(devlink);
691 	if (err)
692 		goto rdma_err;
693 
694 	err = mlx5_devlink_vnet_params_register(devlink);
695 	if (err)
696 		goto vnet_err;
697 	return 0;
698 
699 vnet_err:
700 	mlx5_devlink_rdma_params_unregister(devlink);
701 rdma_err:
702 	mlx5_devlink_eth_params_unregister(devlink);
703 	return err;
704 }
705 
mlx5_devlink_auxdev_params_unregister(struct devlink * devlink)706 static void mlx5_devlink_auxdev_params_unregister(struct devlink *devlink)
707 {
708 	mlx5_devlink_vnet_params_unregister(devlink);
709 	mlx5_devlink_rdma_params_unregister(devlink);
710 	mlx5_devlink_eth_params_unregister(devlink);
711 }
712 
mlx5_devlink_max_uc_list_validate(struct devlink * devlink,u32 id,union devlink_param_value val,struct netlink_ext_ack * extack)713 static int mlx5_devlink_max_uc_list_validate(struct devlink *devlink, u32 id,
714 					     union devlink_param_value val,
715 					     struct netlink_ext_ack *extack)
716 {
717 	struct mlx5_core_dev *dev = devlink_priv(devlink);
718 
719 	if (val.vu32 == 0) {
720 		NL_SET_ERR_MSG_MOD(extack, "max_macs value must be greater than 0");
721 		return -EINVAL;
722 	}
723 
724 	if (!is_power_of_2(val.vu32)) {
725 		NL_SET_ERR_MSG_MOD(extack, "Only power of 2 values are supported for max_macs");
726 		return -EINVAL;
727 	}
728 
729 	if (ilog2(val.vu32) >
730 	    MLX5_CAP_GEN_MAX(dev, log_max_current_uc_list)) {
731 		NL_SET_ERR_MSG_MOD(extack, "max_macs value is out of the supported range");
732 		return -EINVAL;
733 	}
734 
735 	return 0;
736 }
737 
738 static const struct devlink_param mlx5_devlink_max_uc_list_params[] = {
739 	DEVLINK_PARAM_GENERIC(MAX_MACS, BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),
740 			      NULL, NULL, mlx5_devlink_max_uc_list_validate),
741 };
742 
mlx5_devlink_max_uc_list_params_register(struct devlink * devlink)743 static int mlx5_devlink_max_uc_list_params_register(struct devlink *devlink)
744 {
745 	struct mlx5_core_dev *dev = devlink_priv(devlink);
746 	union devlink_param_value value;
747 	int err;
748 
749 	if (!MLX5_CAP_GEN_MAX(dev, log_max_current_uc_list_wr_supported))
750 		return 0;
751 
752 	err = devl_params_register(devlink, mlx5_devlink_max_uc_list_params,
753 				   ARRAY_SIZE(mlx5_devlink_max_uc_list_params));
754 	if (err)
755 		return err;
756 
757 	value.vu32 = 1 << MLX5_CAP_GEN(dev, log_max_current_uc_list);
758 	devl_param_driverinit_value_set(devlink,
759 					DEVLINK_PARAM_GENERIC_ID_MAX_MACS,
760 					value);
761 	return 0;
762 }
763 
764 static void
mlx5_devlink_max_uc_list_params_unregister(struct devlink * devlink)765 mlx5_devlink_max_uc_list_params_unregister(struct devlink *devlink)
766 {
767 	struct mlx5_core_dev *dev = devlink_priv(devlink);
768 
769 	if (!MLX5_CAP_GEN_MAX(dev, log_max_current_uc_list_wr_supported))
770 		return;
771 
772 	devl_params_unregister(devlink, mlx5_devlink_max_uc_list_params,
773 			       ARRAY_SIZE(mlx5_devlink_max_uc_list_params));
774 }
775 
776 #define MLX5_TRAP_DROP(_id, _group_id)					\
777 	DEVLINK_TRAP_GENERIC(DROP, DROP, _id,				\
778 			     DEVLINK_TRAP_GROUP_GENERIC_ID_##_group_id, \
779 			     DEVLINK_TRAP_METADATA_TYPE_F_IN_PORT)
780 
781 static const struct devlink_trap mlx5_traps_arr[] = {
782 	MLX5_TRAP_DROP(INGRESS_VLAN_FILTER, L2_DROPS),
783 	MLX5_TRAP_DROP(DMAC_FILTER, L2_DROPS),
784 };
785 
786 static const struct devlink_trap_group mlx5_trap_groups_arr[] = {
787 	DEVLINK_TRAP_GROUP_GENERIC(L2_DROPS, 0),
788 };
789 
mlx5_devlink_traps_register(struct devlink * devlink)790 int mlx5_devlink_traps_register(struct devlink *devlink)
791 {
792 	struct mlx5_core_dev *core_dev = devlink_priv(devlink);
793 	int err;
794 
795 	err = devl_trap_groups_register(devlink, mlx5_trap_groups_arr,
796 					ARRAY_SIZE(mlx5_trap_groups_arr));
797 	if (err)
798 		return err;
799 
800 	err = devl_traps_register(devlink, mlx5_traps_arr, ARRAY_SIZE(mlx5_traps_arr),
801 				  &core_dev->priv);
802 	if (err)
803 		goto err_trap_group;
804 	return 0;
805 
806 err_trap_group:
807 	devl_trap_groups_unregister(devlink, mlx5_trap_groups_arr,
808 				    ARRAY_SIZE(mlx5_trap_groups_arr));
809 	return err;
810 }
811 
mlx5_devlink_traps_unregister(struct devlink * devlink)812 void mlx5_devlink_traps_unregister(struct devlink *devlink)
813 {
814 	devl_traps_unregister(devlink, mlx5_traps_arr, ARRAY_SIZE(mlx5_traps_arr));
815 	devl_trap_groups_unregister(devlink, mlx5_trap_groups_arr,
816 				    ARRAY_SIZE(mlx5_trap_groups_arr));
817 }
818 
mlx5_devlink_params_register(struct devlink * devlink)819 int mlx5_devlink_params_register(struct devlink *devlink)
820 {
821 	int err;
822 
823 	/* Here only the driver init params should be registered.
824 	 * Runtime params should be registered by the code which
825 	 * behaviour they configure.
826 	 */
827 
828 	err = devl_params_register(devlink, mlx5_devlink_params,
829 				   ARRAY_SIZE(mlx5_devlink_params));
830 	if (err)
831 		return err;
832 
833 	mlx5_devlink_set_params_init_values(devlink);
834 
835 	err = mlx5_devlink_auxdev_params_register(devlink);
836 	if (err)
837 		goto auxdev_reg_err;
838 
839 	err = mlx5_devlink_max_uc_list_params_register(devlink);
840 	if (err)
841 		goto max_uc_list_err;
842 
843 	return 0;
844 
845 max_uc_list_err:
846 	mlx5_devlink_auxdev_params_unregister(devlink);
847 auxdev_reg_err:
848 	devl_params_unregister(devlink, mlx5_devlink_params,
849 			       ARRAY_SIZE(mlx5_devlink_params));
850 	return err;
851 }
852 
mlx5_devlink_params_unregister(struct devlink * devlink)853 void mlx5_devlink_params_unregister(struct devlink *devlink)
854 {
855 	mlx5_devlink_max_uc_list_params_unregister(devlink);
856 	mlx5_devlink_auxdev_params_unregister(devlink);
857 	devl_params_unregister(devlink, mlx5_devlink_params,
858 			       ARRAY_SIZE(mlx5_devlink_params));
859 }
860