1 /*
2 * Copyright (c) 2016, Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33 #include <linux/netdevice.h>
34 #include <net/bonding.h>
35 #include <linux/mlx5/driver.h>
36 #include <linux/mlx5/eswitch.h>
37 #include <linux/mlx5/vport.h>
38 #include <linux/mlx5/lag.h>
39 #include "lib/mlx5.h"
40 #include "lib/devcom.h"
41 #include "mlx5_core.h"
42 #include "eswitch.h"
43 #include "esw/acl/ofld.h"
44 #include "lag.h"
45 #include "mp.h"
46 #include "mpesw.h"
47
48
49 /* General purpose, use for short periods of time.
50 * Beware of lock dependencies (preferably, no locks should be acquired
51 * under it).
52 */
53 static DEFINE_SPINLOCK(lag_lock);
54
get_port_sel_mode(enum mlx5_lag_mode mode,unsigned long flags)55 static int get_port_sel_mode(enum mlx5_lag_mode mode, unsigned long flags)
56 {
57 if (test_bit(MLX5_LAG_MODE_FLAG_HASH_BASED, &flags))
58 return MLX5_LAG_PORT_SELECT_MODE_PORT_SELECT_FT;
59
60 if (mode == MLX5_LAG_MODE_MPESW)
61 return MLX5_LAG_PORT_SELECT_MODE_PORT_SELECT_MPESW;
62
63 return MLX5_LAG_PORT_SELECT_MODE_QUEUE_AFFINITY;
64 }
65
lag_active_port_bits(struct mlx5_lag * ldev,struct lag_tracker * tracker)66 static u8 lag_active_port_bits(struct mlx5_lag *ldev,
67 struct lag_tracker *tracker)
68 {
69 u8 enabled_ports[MLX5_MAX_PORTS] = {};
70 u8 active_port = 0;
71 int num_enabled;
72 int idx;
73
74 mlx5_infer_tx_enabled(tracker, ldev, enabled_ports,
75 &num_enabled);
76 for (idx = 0; idx < num_enabled; idx++)
77 active_port |= BIT_MASK(enabled_ports[idx]);
78
79 return active_port;
80 }
81
mlx5_cmd_create_lag(struct mlx5_core_dev * dev,struct mlx5_lag * ldev,struct lag_tracker * tracker,int mode,unsigned long flags)82 static int mlx5_cmd_create_lag(struct mlx5_core_dev *dev, struct mlx5_lag *ldev,
83 struct lag_tracker *tracker, int mode,
84 unsigned long flags)
85 {
86 bool fdb_sel_mode = test_bit(MLX5_LAG_MODE_FLAG_FDB_SEL_MODE_NATIVE,
87 &flags);
88 int port_sel_mode = get_port_sel_mode(mode, flags);
89 u32 in[MLX5_ST_SZ_DW(create_lag_in)] = {};
90 u8 *ports = ldev->v2p_map;
91 int idx0, idx1;
92 void *lag_ctx;
93
94 lag_ctx = MLX5_ADDR_OF(create_lag_in, in, ctx);
95 MLX5_SET(create_lag_in, in, opcode, MLX5_CMD_OP_CREATE_LAG);
96 MLX5_SET(lagc, lag_ctx, fdb_selection_mode, fdb_sel_mode);
97 idx0 = mlx5_lag_get_dev_index_by_seq(ldev, 0);
98 idx1 = mlx5_lag_get_dev_index_by_seq(ldev, 1);
99
100 if (idx0 < 0 || idx1 < 0)
101 return -EINVAL;
102
103 switch (port_sel_mode) {
104 case MLX5_LAG_PORT_SELECT_MODE_QUEUE_AFFINITY:
105 MLX5_SET(lagc, lag_ctx, tx_remap_affinity_1, ports[idx0]);
106 MLX5_SET(lagc, lag_ctx, tx_remap_affinity_2, ports[idx1]);
107 break;
108 case MLX5_LAG_PORT_SELECT_MODE_PORT_SELECT_FT:
109 if (!MLX5_CAP_PORT_SELECTION(dev, port_select_flow_table_bypass))
110 break;
111
112 MLX5_SET(lagc, lag_ctx, active_port,
113 lag_active_port_bits(ldev, tracker));
114 break;
115 default:
116 break;
117 }
118 MLX5_SET(lagc, lag_ctx, port_select_mode, port_sel_mode);
119
120 return mlx5_cmd_exec_in(dev, create_lag, in);
121 }
122
mlx5_cmd_modify_lag(struct mlx5_core_dev * dev,struct mlx5_lag * ldev,u8 * ports)123 static int mlx5_cmd_modify_lag(struct mlx5_core_dev *dev, struct mlx5_lag *ldev,
124 u8 *ports)
125 {
126 u32 in[MLX5_ST_SZ_DW(modify_lag_in)] = {};
127 void *lag_ctx = MLX5_ADDR_OF(modify_lag_in, in, ctx);
128 int idx0, idx1;
129
130 idx0 = mlx5_lag_get_dev_index_by_seq(ldev, 0);
131 idx1 = mlx5_lag_get_dev_index_by_seq(ldev, 1);
132 if (idx0 < 0 || idx1 < 0)
133 return -EINVAL;
134
135 MLX5_SET(modify_lag_in, in, opcode, MLX5_CMD_OP_MODIFY_LAG);
136 MLX5_SET(modify_lag_in, in, field_select, 0x1);
137
138 MLX5_SET(lagc, lag_ctx, tx_remap_affinity_1, ports[idx0]);
139 MLX5_SET(lagc, lag_ctx, tx_remap_affinity_2, ports[idx1]);
140
141 return mlx5_cmd_exec_in(dev, modify_lag, in);
142 }
143
mlx5_lag_dev_group_id(struct mlx5_core_dev * dev)144 static u32 mlx5_lag_dev_group_id(struct mlx5_core_dev *dev)
145 {
146 struct mlx5_lag *ldev = mlx5_lag_dev(dev);
147 struct lag_func *pf;
148 int i;
149
150 if (!ldev)
151 return 0;
152
153 mlx5_lag_for_each(i, 0, ldev, MLX5_LAG_FILTER_ALL) {
154 pf = mlx5_lag_pf(ldev, i);
155 if (pf->dev == dev)
156 return pf->sd_fdb_active ? pf->group_id : 0;
157 }
158 return 0;
159 }
160
mlx5_lag_is_sw_lag(struct mlx5_core_dev * dev)161 static int mlx5_lag_is_sw_lag(struct mlx5_core_dev *dev)
162 {
163 return mlx5_lag_is_sd(dev);
164 }
165
mlx5_cmd_create_vport_lag(struct mlx5_core_dev * dev)166 int mlx5_cmd_create_vport_lag(struct mlx5_core_dev *dev)
167 {
168 u32 in[MLX5_ST_SZ_DW(create_vport_lag_in)] = {};
169 struct mlx5_lag *ldev = mlx5_lag_dev(dev);
170 int ret;
171
172 if (mlx5_lag_is_sw_lag(dev)) {
173 if (!ldev)
174 return -ENODEV;
175
176 mutex_lock(&ldev->lock);
177 ret = mlx5_lag_create_vport_lag(mlx5_lag_dev(dev),
178 mlx5_lag_dev_group_id(dev));
179 mutex_unlock(&ldev->lock);
180 return ret;
181 }
182
183 MLX5_SET(create_vport_lag_in, in, opcode, MLX5_CMD_OP_CREATE_VPORT_LAG);
184
185 return mlx5_cmd_exec_in(dev, create_vport_lag, in);
186 }
187 EXPORT_SYMBOL(mlx5_cmd_create_vport_lag);
188
mlx5_cmd_destroy_vport_lag(struct mlx5_core_dev * dev)189 int mlx5_cmd_destroy_vport_lag(struct mlx5_core_dev *dev)
190 {
191 u32 in[MLX5_ST_SZ_DW(destroy_vport_lag_in)] = {};
192 struct mlx5_lag *ldev = mlx5_lag_dev(dev);
193
194 if (mlx5_lag_is_sw_lag(dev)) {
195 if (!ldev)
196 return 0;
197
198 mutex_lock(&ldev->lock);
199 mlx5_lag_destroy_vport_lag(mlx5_lag_dev(dev),
200 mlx5_lag_dev_group_id(dev));
201 mutex_unlock(&ldev->lock);
202 return 0;
203 }
204
205 MLX5_SET(destroy_vport_lag_in, in, opcode, MLX5_CMD_OP_DESTROY_VPORT_LAG);
206
207 return mlx5_cmd_exec_in(dev, destroy_vport_lag, in);
208 }
209 EXPORT_SYMBOL(mlx5_cmd_destroy_vport_lag);
210
mlx5_infer_tx_disabled(struct lag_tracker * tracker,struct mlx5_lag * ldev,u8 * ports,int * num_disabled)211 static void mlx5_infer_tx_disabled(struct lag_tracker *tracker, struct mlx5_lag *ldev,
212 u8 *ports, int *num_disabled)
213 {
214 int i;
215
216 *num_disabled = 0;
217 mlx5_ldev_for_each(i, 0, ldev)
218 if (!tracker->netdev_state[i].tx_enabled ||
219 !tracker->netdev_state[i].link_up)
220 ports[(*num_disabled)++] = i;
221 }
222
mlx5_infer_tx_enabled(struct lag_tracker * tracker,struct mlx5_lag * ldev,u8 * ports,int * num_enabled)223 void mlx5_infer_tx_enabled(struct lag_tracker *tracker, struct mlx5_lag *ldev,
224 u8 *ports, int *num_enabled)
225 {
226 int i;
227
228 *num_enabled = 0;
229 mlx5_ldev_for_each(i, 0, ldev)
230 if (tracker->netdev_state[i].tx_enabled &&
231 tracker->netdev_state[i].link_up)
232 ports[(*num_enabled)++] = i;
233
234 if (*num_enabled == 0)
235 mlx5_infer_tx_disabled(tracker, ldev, ports, num_enabled);
236 }
237
mlx5_lag_print_mapping(struct mlx5_core_dev * dev,struct mlx5_lag * ldev,struct lag_tracker * tracker,unsigned long flags)238 static void mlx5_lag_print_mapping(struct mlx5_core_dev *dev,
239 struct mlx5_lag *ldev,
240 struct lag_tracker *tracker,
241 unsigned long flags)
242 {
243 char buf[MLX5_MAX_PORTS * 10 + 1] = {};
244 u8 enabled_ports[MLX5_MAX_PORTS] = {};
245 int written = 0;
246 int num_enabled;
247 int idx;
248 int err;
249 int i;
250 int j;
251
252 if (test_bit(MLX5_LAG_MODE_FLAG_HASH_BASED, &flags)) {
253 mlx5_infer_tx_enabled(tracker, ldev, enabled_ports,
254 &num_enabled);
255 for (i = 0; i < num_enabled; i++) {
256 err = scnprintf(buf + written, 4, "%d, ", enabled_ports[i] + 1);
257 if (err != 3)
258 return;
259 written += err;
260 }
261 buf[written - 2] = 0;
262 mlx5_core_info(dev, "lag map active ports: %s\n", buf);
263 } else {
264 mlx5_ldev_for_each(i, 0, ldev) {
265 for (j = 0; j < ldev->buckets; j++) {
266 idx = i * ldev->buckets + j;
267 err = scnprintf(buf + written, 10,
268 " port %d:%d", i + 1, ldev->v2p_map[idx]);
269 if (err != 9)
270 return;
271 written += err;
272 }
273 }
274 mlx5_core_info(dev, "lag map:%s\n", buf);
275 }
276 }
277
278 static int mlx5_lag_netdev_event(struct notifier_block *this,
279 unsigned long event, void *ptr);
280 static void mlx5_do_bond_work(struct work_struct *work);
281
mlx5_ldev_free(struct kref * ref)282 static void mlx5_ldev_free(struct kref *ref)
283 {
284 struct mlx5_lag *ldev = container_of(ref, struct mlx5_lag, ref);
285 struct lag_func *pf;
286 struct net *net;
287 int i;
288
289 if (ldev->nb.notifier_call) {
290 net = read_pnet(&ldev->net);
291 unregister_netdevice_notifier_net(net, &ldev->nb);
292 }
293
294 mlx5_lag_for_each(i, 0, ldev, MLX5_LAG_FILTER_ALL) {
295 pf = mlx5_lag_pf(ldev, i);
296 if (pf->port_change_nb.nb.notifier_call) {
297 struct mlx5_nb *nb = &pf->port_change_nb;
298
299 mlx5_eq_notifier_unregister(pf->dev, nb);
300 }
301 xa_erase(&ldev->pfs, i);
302 kfree(pf);
303 }
304 xa_destroy(&ldev->pfs);
305
306 mlx5_lag_mp_cleanup(ldev);
307 cancel_delayed_work_sync(&ldev->bond_work);
308 cancel_work_sync(&ldev->speed_update_work);
309 destroy_workqueue(ldev->wq);
310 mutex_destroy(&ldev->lock);
311 kfree(ldev);
312 }
313
mlx5_ldev_put(struct mlx5_lag * ldev)314 static void mlx5_ldev_put(struct mlx5_lag *ldev)
315 {
316 kref_put(&ldev->ref, mlx5_ldev_free);
317 }
318
mlx5_ldev_get(struct mlx5_lag * ldev)319 static void mlx5_ldev_get(struct mlx5_lag *ldev)
320 {
321 kref_get(&ldev->ref);
322 }
323
mlx5_lag_dev_alloc(struct mlx5_core_dev * dev)324 static struct mlx5_lag *mlx5_lag_dev_alloc(struct mlx5_core_dev *dev)
325 {
326 struct mlx5_lag *ldev;
327 int err;
328
329 ldev = kzalloc_obj(*ldev);
330 if (!ldev)
331 return NULL;
332
333 ldev->wq = create_singlethread_workqueue("mlx5_lag");
334 if (!ldev->wq) {
335 kfree(ldev);
336 return NULL;
337 }
338
339 kref_init(&ldev->ref);
340 mutex_init(&ldev->lock);
341 xa_init_flags(&ldev->pfs, XA_FLAGS_ALLOC);
342 INIT_DELAYED_WORK(&ldev->bond_work, mlx5_do_bond_work);
343 INIT_WORK(&ldev->speed_update_work, mlx5_mpesw_speed_update_work);
344
345 if (!mlx5_sd_is_supported(dev)) {
346 ldev->nb.notifier_call = mlx5_lag_netdev_event;
347 write_pnet(&ldev->net, mlx5_core_net(dev));
348 if (register_netdevice_notifier_net(read_pnet(&ldev->net),
349 &ldev->nb)) {
350 ldev->nb.notifier_call = NULL;
351 mlx5_core_err(dev, "Failed to register LAG netdev notifier\n");
352 }
353 }
354 ldev->mode = MLX5_LAG_MODE_NONE;
355
356 err = mlx5_lag_mp_init(ldev);
357 if (err)
358 mlx5_core_err(dev, "Failed to init multipath lag err=%d\n",
359 err);
360
361 ldev->ports = MLX5_CAP_GEN(dev, num_lag_ports);
362 ldev->buckets = 1;
363
364 return ldev;
365 }
366
mlx5_lag_dev_get_netdev_idx(struct mlx5_lag * ldev,struct net_device * ndev)367 int mlx5_lag_dev_get_netdev_idx(struct mlx5_lag *ldev,
368 struct net_device *ndev)
369 {
370 struct lag_func *pf;
371 int i;
372
373 mlx5_ldev_for_each(i, 0, ldev) {
374 pf = mlx5_lag_pf(ldev, i);
375 if (pf->netdev == ndev)
376 return i;
377 }
378
379 return -ENOENT;
380 }
381
mlx5_lag_get_master_idx(struct mlx5_lag * ldev)382 static int mlx5_lag_get_master_idx(struct mlx5_lag *ldev)
383 {
384 unsigned long idx = 0;
385 void *entry;
386
387 if (!ldev)
388 return -ENOENT;
389
390 entry = xa_find(&ldev->pfs, &idx, U8_MAX, MLX5_LAG_XA_MARK_MASTER);
391 if (!entry)
392 return -ENOENT;
393
394 return (int)idx;
395 }
396
mlx5_lag_get_dev_index_by_seq(struct mlx5_lag * ldev,int seq)397 int mlx5_lag_get_dev_index_by_seq(struct mlx5_lag *ldev, int seq)
398 {
399 int master_idx, i, num = 0;
400
401 if (!ldev)
402 return -ENOENT;
403
404 master_idx = mlx5_lag_get_master_idx(ldev);
405
406 /* If seq 0 is requested and there's a primary PF, return it */
407 if (master_idx >= 0) {
408 if (seq == 0)
409 return master_idx;
410 num++;
411 }
412
413 mlx5_ldev_for_each(i, 0, ldev) {
414 /* Skip the primary PF in the loop */
415 if (i == master_idx)
416 continue;
417
418 if (num == seq)
419 return i;
420 num++;
421 }
422 return -ENOENT;
423 }
424
425 /* Return the appropriate iterator filter for a device in LAG:
426 * - SD shared FDB active: iterate only the device's SD group
427 * - SD group exists but shared FDB not active: iterate all devices
428 * - No SD: iterate ports only
429 */
mlx5_lag_get_filter(struct mlx5_lag * ldev,struct mlx5_core_dev * dev)430 static u32 mlx5_lag_get_filter(struct mlx5_lag *ldev, struct mlx5_core_dev *dev)
431 {
432 struct lag_func *pf = mlx5_lag_pf_by_dev(ldev, dev);
433
434 if (pf && pf->sd_fdb_active)
435 return pf->group_id;
436 if (pf && pf->group_id)
437 return MLX5_LAG_FILTER_ALL;
438 return MLX5_LAG_FILTER_PORTS;
439 }
440
441 /* Reverse of mlx5_lag_get_dev_index_by_seq: given a device, return its
442 * sequence number in the LAG. Master is always 0, others numbered
443 * sequentially starting from 1.
444 */
mlx5_lag_get_dev_seq(struct mlx5_core_dev * dev)445 int mlx5_lag_get_dev_seq(struct mlx5_core_dev *dev)
446 {
447 struct mlx5_lag *ldev = mlx5_lag_dev(dev);
448 int master_idx, i, num = 1;
449 struct lag_func *pf;
450 u32 filter;
451
452 if (!ldev)
453 return -ENOENT;
454
455 filter = mlx5_lag_get_filter(ldev, dev);
456 master_idx = mlx5_lag_get_dev_index_by_seq_filter(ldev, 0, filter);
457 if (master_idx < 0)
458 return -ENOENT;
459
460 pf = mlx5_lag_pf(ldev, master_idx);
461 if (pf && pf->dev == dev)
462 return 0;
463
464 mlx5_lag_for_each(i, 0, ldev, filter) {
465 if (i == master_idx)
466 continue;
467 pf = mlx5_lag_pf(ldev, i);
468 if (pf->dev == dev)
469 return num;
470 num++;
471 }
472 return -ENOENT;
473 }
474 EXPORT_SYMBOL(mlx5_lag_get_dev_seq);
475
476 /* seq 0 = master, then all remaining devices */
mlx5_lag_get_dev_index_by_seq_all(struct mlx5_lag * ldev,int seq)477 static int mlx5_lag_get_dev_index_by_seq_all(struct mlx5_lag *ldev, int seq)
478 {
479 int master_idx, i, num = 0;
480
481 master_idx = mlx5_lag_get_master_idx(ldev);
482
483 if (master_idx >= 0) {
484 if (seq == 0)
485 return master_idx;
486 num++;
487 }
488
489 mlx5_lag_for_each(i, 0, ldev, MLX5_LAG_FILTER_ALL) {
490 if (i == master_idx)
491 continue;
492 if (num == seq)
493 return i;
494 num++;
495 }
496 return -ENOENT;
497 }
498
499 /* From group POV, port-marked entry is the lag master */
mlx5_lag_get_dev_index_by_seq_group(struct mlx5_lag * ldev,int seq,u32 group_id)500 static int mlx5_lag_get_dev_index_by_seq_group(struct mlx5_lag *ldev, int seq,
501 u32 group_id)
502 {
503 int i, num = 0;
504
505 mlx5_lag_for_each(i, 0, ldev, group_id) {
506 if (xa_get_mark(&ldev->pfs, i, MLX5_LAG_XA_MARK_PORT)) {
507 if (seq == 0)
508 return i;
509 num++;
510 break;
511 }
512 }
513
514 mlx5_lag_for_each(i, 0, ldev, group_id) {
515 if (xa_get_mark(&ldev->pfs, i, MLX5_LAG_XA_MARK_PORT))
516 continue;
517 if (num == seq)
518 return i;
519 num++;
520 }
521 return -ENOENT;
522 }
523
mlx5_lag_get_dev_index_by_seq_filter(struct mlx5_lag * ldev,int seq,u32 filter)524 int mlx5_lag_get_dev_index_by_seq_filter(struct mlx5_lag *ldev, int seq,
525 u32 filter)
526 {
527 if (!ldev)
528 return -ENOENT;
529
530 if (!filter || filter == MLX5_LAG_FILTER_PORTS)
531 return mlx5_lag_get_dev_index_by_seq(ldev, seq);
532
533 if (filter == MLX5_LAG_FILTER_ALL)
534 return mlx5_lag_get_dev_index_by_seq_all(ldev, seq);
535
536 return mlx5_lag_get_dev_index_by_seq_group(ldev, seq, filter);
537 }
538
539 /* Devcom events for LAG master marking */
540 #define LAG_DEVCOM_PAIR (0)
541 #define LAG_DEVCOM_UNPAIR (1)
542
mlx5_lag_mark_master(struct mlx5_lag * ldev)543 static void mlx5_lag_mark_master(struct mlx5_lag *ldev)
544 {
545 int lowest_dev_idx = INT_MAX;
546 struct lag_func *pf;
547 int master_xa_idx = -1;
548 int dev_idx;
549 int i;
550
551 mlx5_ldev_for_each(i, 0, ldev) {
552 pf = mlx5_lag_pf(ldev, i);
553 dev_idx = mlx5_get_dev_index(pf->dev);
554 if (dev_idx < lowest_dev_idx) {
555 lowest_dev_idx = dev_idx;
556 master_xa_idx = i;
557 }
558 }
559
560 if (master_xa_idx >= 0)
561 xa_set_mark(&ldev->pfs, master_xa_idx, MLX5_LAG_XA_MARK_MASTER);
562 }
563
mlx5_lag_clear_master(struct mlx5_lag * ldev)564 static void mlx5_lag_clear_master(struct mlx5_lag *ldev)
565 {
566 unsigned long idx = 0;
567 void *entry;
568
569 entry = xa_find(&ldev->pfs, &idx, U8_MAX, MLX5_LAG_XA_MARK_MASTER);
570 if (!entry)
571 return;
572
573 xa_clear_mark(&ldev->pfs, idx, MLX5_LAG_XA_MARK_MASTER);
574 }
575
576 /* Devcom event handler to manage LAG master marking */
mlx5_lag_devcom_event(int event,void * my_data,void * event_data)577 static int mlx5_lag_devcom_event(int event, void *my_data, void *event_data)
578 {
579 struct mlx5_core_dev *dev = my_data;
580 struct mlx5_lag *ldev;
581 int idx;
582
583 ldev = mlx5_lag_dev(dev);
584 if (!ldev)
585 return 0;
586
587 mutex_lock(&ldev->lock);
588 switch (event) {
589 case LAG_DEVCOM_PAIR:
590 /* No need to mark more than once */
591 idx = mlx5_lag_get_master_idx(ldev);
592 if (idx >= 0)
593 break;
594 /* Check if all LAG ports are now registered */
595 if (mlx5_lag_num_devs(ldev) == ldev->ports)
596 mlx5_lag_mark_master(ldev);
597 break;
598
599 case LAG_DEVCOM_UNPAIR:
600 /* Clear master mark when a device is removed */
601 mlx5_lag_clear_master(ldev);
602 break;
603 }
604 mutex_unlock(&ldev->lock);
605 return 0;
606 }
607
mlx5_lag_num_devs(struct mlx5_lag * ldev)608 int mlx5_lag_num_devs(struct mlx5_lag *ldev)
609 {
610 int i, num = 0;
611
612 if (!ldev)
613 return 0;
614
615 mlx5_ldev_for_each(i, 0, ldev) {
616 (void)i;
617 num++;
618 }
619 return num;
620 }
621
mlx5_lag_num_netdevs(struct mlx5_lag * ldev)622 int mlx5_lag_num_netdevs(struct mlx5_lag *ldev)
623 {
624 struct lag_func *pf;
625 int i, num = 0;
626
627 if (!ldev)
628 return 0;
629
630 mlx5_ldev_for_each(i, 0, ldev) {
631 pf = mlx5_lag_pf(ldev, i);
632 if (pf->netdev)
633 num++;
634 }
635 return num;
636 }
637
__mlx5_lag_is_roce(struct mlx5_lag * ldev)638 static bool __mlx5_lag_is_roce(struct mlx5_lag *ldev)
639 {
640 return ldev->mode == MLX5_LAG_MODE_ROCE;
641 }
642
__mlx5_lag_is_sriov(struct mlx5_lag * ldev)643 static bool __mlx5_lag_is_sriov(struct mlx5_lag *ldev)
644 {
645 return ldev->mode == MLX5_LAG_MODE_SRIOV;
646 }
647
__mlx5_lag_is_sd_active(struct mlx5_lag * ldev,struct mlx5_core_dev * dev)648 static bool __mlx5_lag_is_sd_active(struct mlx5_lag *ldev,
649 struct mlx5_core_dev *dev)
650 {
651 struct lag_func *pf = mlx5_lag_pf_by_dev(ldev, dev);
652
653 return pf && pf->sd_fdb_active;
654 }
655
656 /* Create a mapping between steering slots and active ports.
657 * As we have ldev->buckets slots per port first assume the native
658 * mapping should be used.
659 * If there are ports that are disabled fill the relevant slots
660 * with mapping that points to active ports.
661 */
mlx5_infer_tx_affinity_mapping(struct lag_tracker * tracker,struct mlx5_lag * ldev,u8 buckets,u8 * ports)662 static void mlx5_infer_tx_affinity_mapping(struct lag_tracker *tracker,
663 struct mlx5_lag *ldev,
664 u8 buckets,
665 u8 *ports)
666 {
667 int disabled[MLX5_MAX_PORTS] = {};
668 int enabled[MLX5_MAX_PORTS] = {};
669 int disabled_ports_num = 0;
670 int enabled_ports_num = 0;
671 int idx;
672 u32 rand;
673 int i;
674 int j;
675
676 mlx5_ldev_for_each(i, 0, ldev) {
677 if (tracker->netdev_state[i].tx_enabled &&
678 tracker->netdev_state[i].link_up)
679 enabled[enabled_ports_num++] = i;
680 else
681 disabled[disabled_ports_num++] = i;
682 }
683
684 /* Use native mapping by default where each port's buckets
685 * point the native port: 1 1 1 .. 1 2 2 2 ... 2 3 3 3 ... 3 etc
686 * ports[] values are 1-indexed device indices for FW.
687 */
688 mlx5_ldev_for_each(i, 0, ldev) {
689 for (j = 0; j < buckets; j++) {
690 idx = i * buckets + j;
691 ports[idx] = mlx5_lag_xa_to_dev_idx(ldev, i) + 1;
692 }
693 }
694
695 /* If all ports are disabled/enabled keep native mapping */
696 if (enabled_ports_num == ldev->ports ||
697 disabled_ports_num == ldev->ports)
698 return;
699
700 /* Go over the disabled ports and for each assign a random active port */
701 for (i = 0; i < disabled_ports_num; i++) {
702 for (j = 0; j < buckets; j++) {
703 int rand_xa_idx;
704
705 get_random_bytes(&rand, 4);
706 rand_xa_idx = enabled[rand % enabled_ports_num];
707 ports[disabled[i] * buckets + j] =
708 mlx5_lag_xa_to_dev_idx(ldev, rand_xa_idx) + 1;
709 }
710 }
711 }
712
mlx5_lag_has_drop_rule(struct mlx5_lag * ldev)713 static bool mlx5_lag_has_drop_rule(struct mlx5_lag *ldev)
714 {
715 struct lag_func *pf;
716 int i;
717
718 mlx5_ldev_for_each(i, 0, ldev) {
719 pf = mlx5_lag_pf(ldev, i);
720 if (pf->has_drop)
721 return true;
722 }
723 return false;
724 }
725
mlx5_lag_drop_rule_cleanup(struct mlx5_lag * ldev)726 static void mlx5_lag_drop_rule_cleanup(struct mlx5_lag *ldev)
727 {
728 struct lag_func *pf;
729 int i;
730
731 mlx5_ldev_for_each(i, 0, ldev) {
732 pf = mlx5_lag_pf(ldev, i);
733 if (!pf->has_drop)
734 continue;
735
736 mlx5_esw_acl_ingress_vport_drop_rule_destroy(pf->dev->priv.eswitch,
737 MLX5_VPORT_UPLINK);
738 pf->has_drop = false;
739 }
740 }
741
mlx5_lag_drop_rule_setup(struct mlx5_lag * ldev,struct lag_tracker * tracker)742 static void mlx5_lag_drop_rule_setup(struct mlx5_lag *ldev,
743 struct lag_tracker *tracker)
744 {
745 u8 disabled_ports[MLX5_MAX_PORTS] = {};
746 struct mlx5_core_dev *dev;
747 struct lag_func *pf;
748 int disabled_index;
749 int num_disabled;
750 int err;
751 int i;
752
753 /* First delete the current drop rule so there won't be any dropped
754 * packets
755 */
756 mlx5_lag_drop_rule_cleanup(ldev);
757
758 if (!ldev->tracker.has_inactive)
759 return;
760
761 mlx5_infer_tx_disabled(tracker, ldev, disabled_ports, &num_disabled);
762
763 for (i = 0; i < num_disabled; i++) {
764 disabled_index = disabled_ports[i];
765 pf = mlx5_lag_pf(ldev, disabled_index);
766 dev = pf->dev;
767 err = mlx5_esw_acl_ingress_vport_drop_rule_create(dev->priv.eswitch,
768 MLX5_VPORT_UPLINK);
769 if (!err)
770 pf->has_drop = true;
771 else
772 mlx5_core_err(dev,
773 "Failed to create lag drop rule, error: %d", err);
774 }
775 }
776
mlx5_cmd_modify_active_port(struct mlx5_core_dev * dev,u8 ports)777 static int mlx5_cmd_modify_active_port(struct mlx5_core_dev *dev, u8 ports)
778 {
779 u32 in[MLX5_ST_SZ_DW(modify_lag_in)] = {};
780 void *lag_ctx;
781
782 lag_ctx = MLX5_ADDR_OF(modify_lag_in, in, ctx);
783
784 MLX5_SET(modify_lag_in, in, opcode, MLX5_CMD_OP_MODIFY_LAG);
785 MLX5_SET(modify_lag_in, in, field_select, 0x2);
786
787 MLX5_SET(lagc, lag_ctx, active_port, ports);
788
789 return mlx5_cmd_exec_in(dev, modify_lag, in);
790 }
791
_mlx5_modify_lag(struct mlx5_lag * ldev,struct lag_tracker * tracker,u8 * ports)792 static int _mlx5_modify_lag(struct mlx5_lag *ldev,
793 struct lag_tracker *tracker, u8 *ports)
794 {
795 int idx = mlx5_lag_get_dev_index_by_seq(ldev, MLX5_LAG_P1);
796 struct mlx5_core_dev *dev0;
797 u8 active_ports;
798 int ret;
799
800 if (idx < 0)
801 return -EINVAL;
802
803 dev0 = mlx5_lag_pf(ldev, idx)->dev;
804 if (test_bit(MLX5_LAG_MODE_FLAG_HASH_BASED, &ldev->mode_flags)) {
805 ret = mlx5_lag_port_sel_modify(ldev, ports);
806 if (ret ||
807 !MLX5_CAP_PORT_SELECTION(dev0, port_select_flow_table_bypass))
808 return ret;
809
810 active_ports = lag_active_port_bits(ldev, tracker);
811
812 return mlx5_cmd_modify_active_port(dev0, active_ports);
813 }
814 return mlx5_cmd_modify_lag(dev0, ldev, ports);
815 }
816
mlx5_lag_active_backup_get_netdev(struct mlx5_core_dev * dev)817 static struct net_device *mlx5_lag_active_backup_get_netdev(struct mlx5_core_dev *dev)
818 {
819 struct net_device *ndev = NULL;
820 struct lag_func *pf;
821 struct mlx5_lag *ldev;
822 unsigned long flags;
823 int i, last_idx;
824
825 spin_lock_irqsave(&lag_lock, flags);
826 ldev = mlx5_lag_dev(dev);
827
828 if (!ldev)
829 goto unlock;
830
831 mlx5_ldev_for_each(i, 0, ldev) {
832 pf = mlx5_lag_pf(ldev, i);
833 if (ldev->tracker.netdev_state[i].tx_enabled)
834 ndev = pf->netdev;
835 }
836 if (!ndev) {
837 last_idx = mlx5_lag_get_dev_index_by_seq(ldev, ldev->ports - 1);
838 if (last_idx < 0)
839 goto unlock;
840 pf = mlx5_lag_pf(ldev, last_idx);
841 ndev = pf->netdev;
842 }
843
844 dev_hold(ndev);
845
846 unlock:
847 spin_unlock_irqrestore(&lag_lock, flags);
848
849 return ndev;
850 }
851
mlx5_modify_lag(struct mlx5_lag * ldev,struct lag_tracker * tracker)852 void mlx5_modify_lag(struct mlx5_lag *ldev,
853 struct lag_tracker *tracker)
854 {
855 int first_idx = mlx5_lag_get_dev_index_by_seq(ldev, MLX5_LAG_P1);
856 u8 ports[MLX5_MAX_PORTS * MLX5_LAG_MAX_HASH_BUCKETS] = {};
857 struct mlx5_core_dev *dev0;
858 int idx;
859 int err;
860 int i;
861 int j;
862
863 if (first_idx < 0)
864 return;
865
866 dev0 = mlx5_lag_pf(ldev, first_idx)->dev;
867 mlx5_infer_tx_affinity_mapping(tracker, ldev, ldev->buckets, ports);
868
869 mlx5_ldev_for_each(i, 0, ldev) {
870 for (j = 0; j < ldev->buckets; j++) {
871 idx = i * ldev->buckets + j;
872 if (ports[idx] == ldev->v2p_map[idx])
873 continue;
874 err = _mlx5_modify_lag(ldev, tracker, ports);
875 if (err) {
876 mlx5_core_err(dev0,
877 "Failed to modify LAG (%d)\n",
878 err);
879 return;
880 }
881 memcpy(ldev->v2p_map, ports, sizeof(ports));
882
883 mlx5_lag_print_mapping(dev0, ldev, tracker,
884 ldev->mode_flags);
885 break;
886 }
887 }
888
889 if (tracker->tx_type == NETDEV_LAG_TX_TYPE_ACTIVEBACKUP) {
890 struct net_device *ndev = mlx5_lag_active_backup_get_netdev(dev0);
891
892 if(!(ldev->mode == MLX5_LAG_MODE_ROCE))
893 mlx5_lag_drop_rule_setup(ldev, tracker);
894 /** Only sriov and roce lag should have tracker->tx_type set so
895 * no need to check the mode
896 */
897 blocking_notifier_call_chain(&dev0->priv.lag_nh,
898 MLX5_DRIVER_EVENT_ACTIVE_BACKUP_LAG_CHANGE_LOWERSTATE,
899 ndev);
900 dev_put(ndev);
901 }
902 }
903
mlx5_lag_set_port_sel_mode(struct mlx5_lag * ldev,enum mlx5_lag_mode mode,unsigned long * flags)904 static int mlx5_lag_set_port_sel_mode(struct mlx5_lag *ldev,
905 enum mlx5_lag_mode mode,
906 unsigned long *flags)
907 {
908 int first_idx = mlx5_lag_get_dev_index_by_seq(ldev, MLX5_LAG_P1);
909 struct mlx5_core_dev *dev0;
910
911 if (first_idx < 0)
912 return -EINVAL;
913
914 if (mode == MLX5_LAG_MODE_MPESW ||
915 mode == MLX5_LAG_MODE_MULTIPATH)
916 return 0;
917
918 dev0 = mlx5_lag_pf(ldev, first_idx)->dev;
919
920 if (!MLX5_CAP_PORT_SELECTION(dev0, port_select_flow_table)) {
921 if (ldev->ports > 2)
922 return -EINVAL;
923 return 0;
924 }
925
926 if (ldev->ports > 2)
927 ldev->buckets = MLX5_LAG_MAX_HASH_BUCKETS;
928
929 set_bit(MLX5_LAG_MODE_FLAG_HASH_BASED, flags);
930
931 return 0;
932 }
933
mlx5_lag_set_flags(struct mlx5_lag * ldev,enum mlx5_lag_mode mode,struct lag_tracker * tracker,bool shared_fdb,unsigned long * flags)934 static int mlx5_lag_set_flags(struct mlx5_lag *ldev, enum mlx5_lag_mode mode,
935 struct lag_tracker *tracker, bool shared_fdb,
936 unsigned long *flags)
937 {
938 *flags = 0;
939 if (shared_fdb) {
940 set_bit(MLX5_LAG_MODE_FLAG_SHARED_FDB, flags);
941 set_bit(MLX5_LAG_MODE_FLAG_FDB_SEL_MODE_NATIVE, flags);
942 }
943
944 if (mode == MLX5_LAG_MODE_MPESW)
945 set_bit(MLX5_LAG_MODE_FLAG_FDB_SEL_MODE_NATIVE, flags);
946
947 return mlx5_lag_set_port_sel_mode(ldev, mode, flags);
948 }
949
mlx5_get_str_port_sel_mode(enum mlx5_lag_mode mode,unsigned long flags)950 char *mlx5_get_str_port_sel_mode(enum mlx5_lag_mode mode, unsigned long flags)
951 {
952 int port_sel_mode = get_port_sel_mode(mode, flags);
953
954 switch (port_sel_mode) {
955 case MLX5_LAG_PORT_SELECT_MODE_QUEUE_AFFINITY: return "queue_affinity";
956 case MLX5_LAG_PORT_SELECT_MODE_PORT_SELECT_FT: return "hash";
957 case MLX5_LAG_PORT_SELECT_MODE_PORT_SELECT_MPESW: return "mpesw";
958 default: return "invalid";
959 }
960 }
961
mlx5_create_lag(struct mlx5_lag * ldev,struct lag_tracker * tracker,enum mlx5_lag_mode mode,unsigned long flags)962 static int mlx5_create_lag(struct mlx5_lag *ldev,
963 struct lag_tracker *tracker,
964 enum mlx5_lag_mode mode,
965 unsigned long flags)
966 {
967 int first_idx = mlx5_lag_get_dev_index_by_seq(ldev, MLX5_LAG_P1);
968 bool shared_fdb = test_bit(MLX5_LAG_MODE_FLAG_SHARED_FDB, &flags);
969 u32 in[MLX5_ST_SZ_DW(destroy_lag_in)] = {};
970 struct mlx5_core_dev *dev0;
971 int err;
972
973 if (first_idx < 0)
974 return -EINVAL;
975
976 dev0 = mlx5_lag_pf(ldev, first_idx)->dev;
977 if (tracker)
978 mlx5_lag_print_mapping(dev0, ldev, tracker, flags);
979 mlx5_core_info(dev0, "shared_fdb:%d mode:%s\n",
980 shared_fdb, mlx5_get_str_port_sel_mode(mode, flags));
981
982 err = mlx5_cmd_create_lag(dev0, ldev, tracker, mode, flags);
983 if (err) {
984 mlx5_core_err(dev0,
985 "Failed to create LAG (%d)\n",
986 err);
987 return err;
988 }
989
990 if (shared_fdb) {
991 err = mlx5_lag_create_single_fdb(ldev);
992 if (err)
993 mlx5_core_err(dev0, "Can't enable single FDB mode\n");
994 else
995 mlx5_core_info(dev0, "Operation mode is single FDB\n");
996 }
997
998 if (err) {
999 MLX5_SET(destroy_lag_in, in, opcode, MLX5_CMD_OP_DESTROY_LAG);
1000 if (mlx5_cmd_exec_in(dev0, destroy_lag, in))
1001 mlx5_core_err(dev0,
1002 "Failed to deactivate RoCE LAG; driver restart required\n");
1003 }
1004 BLOCKING_INIT_NOTIFIER_HEAD(&dev0->priv.lag_nh);
1005
1006 return err;
1007 }
1008
mlx5_activate_lag(struct mlx5_lag * ldev,struct lag_tracker * tracker,enum mlx5_lag_mode mode,bool shared_fdb)1009 int mlx5_activate_lag(struct mlx5_lag *ldev,
1010 struct lag_tracker *tracker,
1011 enum mlx5_lag_mode mode,
1012 bool shared_fdb)
1013 {
1014 bool roce_lag = mode == MLX5_LAG_MODE_ROCE;
1015 struct mlx5_core_dev *dev0;
1016 unsigned long flags = 0;
1017 int master_idx;
1018 int err;
1019
1020 master_idx = mlx5_lag_get_dev_index_by_seq(ldev, MLX5_LAG_P1);
1021 if (master_idx < 0)
1022 return -EINVAL;
1023
1024 dev0 = mlx5_lag_pf(ldev, master_idx)->dev;
1025 err = mlx5_lag_set_flags(ldev, mode, tracker, shared_fdb, &flags);
1026 if (err)
1027 return err;
1028
1029 if (mode != MLX5_LAG_MODE_MPESW) {
1030 mlx5_infer_tx_affinity_mapping(tracker, ldev, ldev->buckets, ldev->v2p_map);
1031 if (test_bit(MLX5_LAG_MODE_FLAG_HASH_BASED, &flags)) {
1032 err = mlx5_lag_port_sel_create(ldev, tracker->hash_type,
1033 ldev->v2p_map);
1034 if (err) {
1035 mlx5_core_err(dev0,
1036 "Failed to create LAG port selection(%d)\n",
1037 err);
1038 return err;
1039 }
1040 }
1041 }
1042
1043 err = mlx5_create_lag(ldev, tracker, mode, flags);
1044 if (err) {
1045 if (test_bit(MLX5_LAG_MODE_FLAG_HASH_BASED, &flags))
1046 mlx5_lag_port_sel_destroy(ldev);
1047 if (roce_lag)
1048 mlx5_core_err(dev0,
1049 "Failed to activate RoCE LAG\n");
1050 else
1051 mlx5_core_err(dev0,
1052 "Failed to activate VF LAG\n"
1053 "Make sure all VFs are unbound prior to VF LAG activation or deactivation\n");
1054 return err;
1055 }
1056
1057 if (tracker && tracker->tx_type == NETDEV_LAG_TX_TYPE_ACTIVEBACKUP &&
1058 !roce_lag)
1059 mlx5_lag_drop_rule_setup(ldev, tracker);
1060
1061 ldev->mode = mode;
1062 ldev->mode_flags = flags;
1063 return 0;
1064 }
1065
mlx5_deactivate_lag(struct mlx5_lag * ldev)1066 int mlx5_deactivate_lag(struct mlx5_lag *ldev)
1067 {
1068 int master_idx = mlx5_lag_get_dev_index_by_seq(ldev, MLX5_LAG_P1);
1069 u32 in[MLX5_ST_SZ_DW(destroy_lag_in)] = {};
1070 bool roce_lag = __mlx5_lag_is_roce(ldev);
1071 unsigned long flags = ldev->mode_flags;
1072 struct mlx5_core_dev *dev0;
1073 int err;
1074
1075 if (master_idx < 0)
1076 return -EINVAL;
1077
1078 dev0 = mlx5_lag_pf(ldev, master_idx)->dev;
1079 ldev->mode = MLX5_LAG_MODE_NONE;
1080 ldev->mode_flags = 0;
1081 mlx5_lag_mp_reset(ldev);
1082
1083 if (test_bit(MLX5_LAG_MODE_FLAG_SHARED_FDB, &flags)) {
1084 mlx5_lag_destroy_single_fdb(ldev);
1085 clear_bit(MLX5_LAG_MODE_FLAG_SHARED_FDB, &flags);
1086 }
1087
1088 MLX5_SET(destroy_lag_in, in, opcode, MLX5_CMD_OP_DESTROY_LAG);
1089 err = mlx5_cmd_exec_in(dev0, destroy_lag, in);
1090 if (err) {
1091 if (roce_lag) {
1092 mlx5_core_err(dev0,
1093 "Failed to deactivate RoCE LAG; driver restart required\n");
1094 } else {
1095 mlx5_core_err(dev0,
1096 "Failed to deactivate VF LAG; driver restart required\n"
1097 "Make sure all VFs are unbound prior to VF LAG activation or deactivation\n");
1098 }
1099 return err;
1100 }
1101
1102 if (test_bit(MLX5_LAG_MODE_FLAG_HASH_BASED, &flags)) {
1103 mlx5_lag_port_sel_destroy(ldev);
1104 ldev->buckets = 1;
1105 }
1106 if (mlx5_lag_has_drop_rule(ldev))
1107 mlx5_lag_drop_rule_cleanup(ldev);
1108
1109 return 0;
1110 }
1111
mlx5_lag_check_prereq(struct mlx5_lag * ldev)1112 bool mlx5_lag_check_prereq(struct mlx5_lag *ldev)
1113 {
1114 int master_idx = mlx5_lag_get_dev_index_by_seq(ldev, MLX5_LAG_P1);
1115 #ifdef CONFIG_MLX5_ESWITCH
1116 struct mlx5_core_dev *dev;
1117 u8 mode;
1118 #endif
1119 struct lag_func *pf;
1120 bool roce_support;
1121 int i;
1122
1123 if (master_idx < 0 || mlx5_lag_num_devs(ldev) != ldev->ports)
1124 return false;
1125
1126 #ifdef CONFIG_MLX5_ESWITCH
1127 mlx5_ldev_for_each(i, 0, ldev) {
1128 pf = mlx5_lag_pf(ldev, i);
1129 dev = pf->dev;
1130 if (mlx5_eswitch_num_vfs(dev->priv.eswitch) && !is_mdev_switchdev_mode(dev))
1131 return false;
1132 }
1133
1134 pf = mlx5_lag_pf(ldev, master_idx);
1135 dev = pf->dev;
1136 mode = mlx5_eswitch_mode(dev);
1137 mlx5_ldev_for_each(i, 0, ldev) {
1138 pf = mlx5_lag_pf(ldev, i);
1139 if (mlx5_eswitch_mode(pf->dev) != mode)
1140 return false;
1141 }
1142
1143 #else
1144 mlx5_ldev_for_each(i, 0, ldev) {
1145 pf = mlx5_lag_pf(ldev, i);
1146 if (mlx5_sriov_is_enabled(pf->dev))
1147 return false;
1148 }
1149 #endif
1150 pf = mlx5_lag_pf(ldev, master_idx);
1151 roce_support = mlx5_get_roce_state(pf->dev);
1152 mlx5_ldev_for_each(i, 0, ldev) {
1153 if (i == master_idx)
1154 continue;
1155 pf = mlx5_lag_pf(ldev, i);
1156 if (mlx5_get_roce_state(pf->dev) != roce_support)
1157 return false;
1158 }
1159
1160 return true;
1161 }
1162
mlx5_lag_assert_locked_transition(struct mlx5_lag * ldev,u32 filter)1163 static void mlx5_lag_assert_locked_transition(struct mlx5_lag *ldev, u32 filter)
1164 {
1165 struct mlx5_devcom_comp_dev *devcom = NULL;
1166 struct lag_func *pf;
1167 int i;
1168
1169 lockdep_assert_held(&ldev->lock);
1170
1171 i = mlx5_get_next_lag_func(ldev, 0, filter);
1172 if (i < MLX5_MAX_PORTS) {
1173 pf = mlx5_lag_pf(ldev, i);
1174 if (filter == MLX5_LAG_FILTER_PORTS ||
1175 filter == MLX5_LAG_FILTER_ALL)
1176 devcom = pf->dev->priv.hca_devcom_comp;
1177 else
1178 devcom = mlx5_sd_get_devcom(pf->dev);
1179 }
1180 mlx5_devcom_comp_assert_locked(devcom);
1181 }
1182
mlx5_lag_drop_lock_for_reps(struct mlx5_lag * ldev,u32 filter)1183 static void mlx5_lag_drop_lock_for_reps(struct mlx5_lag *ldev, u32 filter)
1184 {
1185 mlx5_lag_assert_locked_transition(ldev, filter);
1186
1187 /* Keep PF membership stable while ldev->lock is dropped. Device add
1188 * and remove paths observe mode_changes_in_progress and retry.
1189 */
1190 ldev->mode_changes_in_progress++;
1191 mutex_unlock(&ldev->lock);
1192 }
1193
mlx5_lag_retake_lock_after_reps(struct mlx5_lag * ldev)1194 static void mlx5_lag_retake_lock_after_reps(struct mlx5_lag *ldev)
1195 {
1196 mutex_lock(&ldev->lock);
1197 ldev->mode_changes_in_progress--;
1198 }
1199
mlx5_lag_rescan_dev_locked(struct mlx5_lag * ldev,struct mlx5_core_dev * dev,bool enable)1200 void mlx5_lag_rescan_dev_locked(struct mlx5_lag *ldev,
1201 struct mlx5_core_dev *dev,
1202 bool enable)
1203 {
1204 if (dev->priv.flags & MLX5_PRIV_FLAGS_DISABLE_ALL_ADEV)
1205 return;
1206
1207 if (enable)
1208 dev->priv.flags &= ~MLX5_PRIV_FLAGS_DISABLE_IB_ADEV;
1209 else
1210 dev->priv.flags |= MLX5_PRIV_FLAGS_DISABLE_IB_ADEV;
1211
1212 /* Auxiliary bus probe/remove can register or unregister representor
1213 * callbacks and take reps_lock. Drop ldev->lock so the only ordering
1214 * remains reps_lock -> ldev->lock from representor callbacks.
1215 */
1216 mlx5_lag_drop_lock_for_reps(ldev, mlx5_lag_get_filter(ldev, dev));
1217 mlx5_rescan_drivers_locked(dev);
1218 mlx5_lag_retake_lock_after_reps(ldev);
1219 }
1220
mlx5_lag_rescan_devices_locked_filter(struct mlx5_lag * ldev,bool enable,u32 filter)1221 static void mlx5_lag_rescan_devices_locked_filter(struct mlx5_lag *ldev,
1222 bool enable, u32 filter)
1223 {
1224 struct mlx5_core_dev *devs[MLX5_MAX_PORTS];
1225 struct lag_func *pf;
1226 int num_devs = 0;
1227 int i;
1228
1229 mlx5_lag_assert_locked_transition(ldev, filter);
1230
1231 mlx5_lag_for_each(i, 0, ldev, filter) {
1232 pf = mlx5_lag_pf(ldev, i);
1233 if (pf->dev->priv.flags & MLX5_PRIV_FLAGS_DISABLE_ALL_ADEV)
1234 continue;
1235
1236 if (enable)
1237 pf->dev->priv.flags &= ~MLX5_PRIV_FLAGS_DISABLE_IB_ADEV;
1238 else
1239 pf->dev->priv.flags |= MLX5_PRIV_FLAGS_DISABLE_IB_ADEV;
1240 devs[num_devs++] = pf->dev;
1241 }
1242
1243 mlx5_lag_drop_lock_for_reps(ldev, filter);
1244 for (i = 0; i < num_devs; i++)
1245 mlx5_rescan_drivers_locked(devs[i]);
1246 mlx5_lag_retake_lock_after_reps(ldev);
1247 }
1248
mlx5_lag_add_devices_filter(struct mlx5_lag * ldev,u32 filter)1249 void mlx5_lag_add_devices_filter(struct mlx5_lag *ldev, u32 filter)
1250 {
1251 mlx5_lag_rescan_devices_locked_filter(ldev, true, filter);
1252 }
1253
mlx5_lag_add_devices(struct mlx5_lag * ldev)1254 void mlx5_lag_add_devices(struct mlx5_lag *ldev)
1255 {
1256 mlx5_lag_add_devices_filter(ldev, MLX5_LAG_FILTER_PORTS);
1257 }
1258
mlx5_lag_remove_devices_filter(struct mlx5_lag * ldev,u32 filter)1259 void mlx5_lag_remove_devices_filter(struct mlx5_lag *ldev, u32 filter)
1260 {
1261 mlx5_lag_rescan_devices_locked_filter(ldev, false, filter);
1262 }
1263
mlx5_lag_remove_devices(struct mlx5_lag * ldev)1264 void mlx5_lag_remove_devices(struct mlx5_lag *ldev)
1265 {
1266 mlx5_lag_remove_devices_filter(ldev, MLX5_LAG_FILTER_PORTS);
1267 }
1268
mlx5_lag_reload_ib_reps_unlocked(struct mlx5_lag * ldev,u32 flags,u32 filter,bool cont_on_fail)1269 static int mlx5_lag_reload_ib_reps_unlocked(struct mlx5_lag *ldev, u32 flags,
1270 u32 filter, bool cont_on_fail)
1271 {
1272 struct lag_func *pf;
1273 int ret;
1274 int i;
1275
1276 mlx5_lag_for_each(i, 0, ldev, filter) {
1277 pf = mlx5_lag_pf(ldev, i);
1278 if (!(pf->dev->priv.flags & flags)) {
1279 struct mlx5_eswitch *esw;
1280
1281 esw = pf->dev->priv.eswitch;
1282 mlx5_esw_reps_block(esw);
1283 ret = mlx5_eswitch_reload_ib_reps(esw);
1284 mlx5_esw_reps_unblock(esw);
1285 if (ret && !cont_on_fail)
1286 return ret;
1287 }
1288 }
1289
1290 return 0;
1291 }
1292
mlx5_lag_reload_ib_reps(struct mlx5_lag * ldev,u32 flags,u32 filter,bool cont_on_fail)1293 static int mlx5_lag_reload_ib_reps(struct mlx5_lag *ldev, u32 flags,
1294 u32 filter, bool cont_on_fail)
1295 {
1296 int ret;
1297
1298 /* The HCA devcom component lock serializes LAG mode transitions while
1299 * ldev->lock is dropped here. Dropping ldev->lock is required because
1300 * the reload takes the per-E-Switch reps_lock, and representor
1301 * load/unload callbacks can re-enter LAG netdev add/remove and take
1302 * ldev->lock. Keep the ordering reps_lock -> ldev->lock.
1303 */
1304 mlx5_lag_drop_lock_for_reps(ldev, filter);
1305 ret = mlx5_lag_reload_ib_reps_unlocked(ldev, flags, filter,
1306 cont_on_fail);
1307 mlx5_lag_retake_lock_after_reps(ldev);
1308
1309 return ret;
1310 }
1311
mlx5_lag_reload_ib_reps_from_locked(struct mlx5_lag * ldev,u32 flags,u32 filter,bool cont_on_fail)1312 int mlx5_lag_reload_ib_reps_from_locked(struct mlx5_lag *ldev, u32 flags,
1313 u32 filter, bool cont_on_fail)
1314 {
1315 return mlx5_lag_reload_ib_reps(ldev, flags, filter, cont_on_fail);
1316 }
1317
mlx5_lag_unload_reps_unlocked(struct mlx5_lag * ldev,u32 filter)1318 static void mlx5_lag_unload_reps_unlocked(struct mlx5_lag *ldev, u32 filter)
1319 {
1320 struct lag_func *pf;
1321 int i;
1322
1323 mlx5_lag_for_each(i, 0, ldev, filter) {
1324 struct mlx5_eswitch *esw;
1325
1326 pf = mlx5_lag_pf(ldev, i);
1327 esw = pf->dev->priv.eswitch;
1328 mlx5_esw_reps_block(esw);
1329 mlx5_eswitch_unload_reps(esw);
1330 mlx5_esw_reps_unblock(esw);
1331 }
1332 }
1333
mlx5_lag_unload_reps_from_locked(struct mlx5_lag * ldev,u32 filter)1334 void mlx5_lag_unload_reps_from_locked(struct mlx5_lag *ldev, u32 filter)
1335 {
1336 /* Same lock dance as mlx5_lag_reload_ib_reps: drop ldev->lock around
1337 * the per-eswitch reps_lock to keep the reps_lock -> ldev->lock order.
1338 */
1339 mlx5_lag_drop_lock_for_reps(ldev, filter);
1340 mlx5_lag_unload_reps_unlocked(ldev, filter);
1341 mlx5_lag_retake_lock_after_reps(ldev);
1342 }
1343
mlx5_disable_lag(struct mlx5_lag * ldev)1344 void mlx5_disable_lag(struct mlx5_lag *ldev)
1345 {
1346 bool shared_fdb = test_bit(MLX5_LAG_MODE_FLAG_SHARED_FDB, &ldev->mode_flags);
1347 int idx = mlx5_lag_get_dev_index_by_seq(ldev, MLX5_LAG_P1);
1348 struct mlx5_core_dev *dev0;
1349 bool roce_lag;
1350 int err;
1351 int i;
1352
1353 if (idx < 0)
1354 return;
1355
1356 if (shared_fdb) {
1357 mlx5_lag_shared_fdb_destroy(ldev, 0);
1358 return;
1359 }
1360
1361 dev0 = mlx5_lag_pf(ldev, idx)->dev;
1362 roce_lag = __mlx5_lag_is_roce(ldev);
1363
1364 if (roce_lag) {
1365 mlx5_lag_rescan_dev_locked(ldev, dev0, false);
1366 mlx5_ldev_for_each(i, 0, ldev) {
1367 if (i == idx)
1368 continue;
1369 mlx5_nic_vport_disable_roce(mlx5_lag_pf(ldev, i)->dev);
1370 }
1371 }
1372
1373 err = mlx5_deactivate_lag(ldev);
1374 if (err)
1375 return;
1376
1377 if (roce_lag)
1378 mlx5_lag_add_devices(ldev);
1379 }
1380
mlx5_lag_is_roce_lag(struct mlx5_lag * ldev)1381 static bool mlx5_lag_is_roce_lag(struct mlx5_lag *ldev)
1382 {
1383 bool roce_lag = true;
1384 struct lag_func *pf;
1385 int i;
1386
1387 mlx5_ldev_for_each(i, 0, ldev) {
1388 pf = mlx5_lag_pf(ldev, i);
1389 roce_lag = roce_lag && !mlx5_sriov_is_enabled(pf->dev);
1390 }
1391
1392 #ifdef CONFIG_MLX5_ESWITCH
1393 mlx5_ldev_for_each(i, 0, ldev) {
1394 pf = mlx5_lag_pf(ldev, i);
1395 roce_lag = roce_lag && is_mdev_legacy_mode(pf->dev);
1396 }
1397 #endif
1398
1399 return roce_lag;
1400 }
1401
mlx5_lag_should_modify_lag(struct mlx5_lag * ldev,bool do_bond)1402 static bool mlx5_lag_should_modify_lag(struct mlx5_lag *ldev, bool do_bond)
1403 {
1404 return do_bond && __mlx5_lag_is_active(ldev) &&
1405 ldev->mode != MLX5_LAG_MODE_MPESW;
1406 }
1407
mlx5_lag_should_disable_lag(struct mlx5_lag * ldev,bool do_bond)1408 static bool mlx5_lag_should_disable_lag(struct mlx5_lag *ldev, bool do_bond)
1409 {
1410 return !do_bond && __mlx5_lag_is_active(ldev) &&
1411 ldev->mode != MLX5_LAG_MODE_MPESW;
1412 }
1413
1414 #ifdef CONFIG_MLX5_ESWITCH
1415 static int
mlx5_lag_sum_devices_speed(struct mlx5_lag * ldev,u32 * sum_speed,int (* get_speed)(struct mlx5_core_dev *,u32 *))1416 mlx5_lag_sum_devices_speed(struct mlx5_lag *ldev, u32 *sum_speed,
1417 int (*get_speed)(struct mlx5_core_dev *, u32 *))
1418 {
1419 struct mlx5_core_dev *pf_mdev;
1420 struct lag_func *pf;
1421 int pf_idx;
1422 u32 speed;
1423 int ret;
1424
1425 *sum_speed = 0;
1426 mlx5_ldev_for_each(pf_idx, 0, ldev) {
1427 pf = mlx5_lag_pf(ldev, pf_idx);
1428 if (!pf)
1429 continue;
1430 pf_mdev = pf->dev;
1431 if (!pf_mdev)
1432 continue;
1433
1434 ret = get_speed(pf_mdev, &speed);
1435 if (ret) {
1436 mlx5_core_dbg(pf_mdev,
1437 "Failed to get device speed using %ps. Device %s speed is not available (err=%d)\n",
1438 get_speed, dev_name(pf_mdev->device),
1439 ret);
1440 return ret;
1441 }
1442
1443 *sum_speed += speed;
1444 }
1445
1446 return 0;
1447 }
1448
mlx5_lag_sum_devices_max_speed(struct mlx5_lag * ldev,u32 * max_speed)1449 static int mlx5_lag_sum_devices_max_speed(struct mlx5_lag *ldev, u32 *max_speed)
1450 {
1451 return mlx5_lag_sum_devices_speed(ldev, max_speed,
1452 mlx5_port_max_linkspeed);
1453 }
1454
mlx5_lag_sum_devices_oper_speed(struct mlx5_lag * ldev,u32 * oper_speed)1455 static int mlx5_lag_sum_devices_oper_speed(struct mlx5_lag *ldev,
1456 u32 *oper_speed)
1457 {
1458 return mlx5_lag_sum_devices_speed(ldev, oper_speed,
1459 mlx5_port_oper_linkspeed);
1460 }
1461
mlx5_lag_modify_device_vports_speed(struct mlx5_core_dev * mdev,u32 speed)1462 static void mlx5_lag_modify_device_vports_speed(struct mlx5_core_dev *mdev,
1463 u32 speed)
1464 {
1465 u16 op_mod = MLX5_VPORT_STATE_OP_MOD_ESW_VPORT;
1466 struct mlx5_eswitch *esw = mdev->priv.eswitch;
1467 struct mlx5_vport *vport;
1468 unsigned long i;
1469 int ret;
1470
1471 if (!esw)
1472 return;
1473
1474 if (!MLX5_CAP_ESW(mdev, esw_vport_state_max_tx_speed))
1475 return;
1476
1477 mutex_lock(&esw->state_lock);
1478 mlx5_esw_for_each_vport(esw, i, vport) {
1479 if (!vport)
1480 continue;
1481
1482 if (vport->vport == MLX5_VPORT_UPLINK)
1483 continue;
1484
1485 vport->agg_max_tx_speed = speed;
1486
1487 if (!vport->enabled)
1488 continue;
1489
1490 ret = mlx5_modify_vport_max_tx_speed(mdev, op_mod,
1491 vport->vport, true, speed);
1492 if (ret)
1493 mlx5_core_dbg(mdev,
1494 "Failed to set vport %d speed %d, err=%d\n",
1495 vport->vport, speed, ret);
1496 }
1497 mutex_unlock(&esw->state_lock);
1498 }
1499
mlx5_lag_set_vports_agg_speed(struct mlx5_lag * ldev)1500 void mlx5_lag_set_vports_agg_speed(struct mlx5_lag *ldev)
1501 {
1502 struct mlx5_core_dev *mdev;
1503 struct lag_func *pf;
1504 u32 speed;
1505 int pf_idx;
1506
1507 if (ldev->mode == MLX5_LAG_MODE_MPESW) {
1508 if (mlx5_lag_sum_devices_oper_speed(ldev, &speed))
1509 return;
1510 } else {
1511 speed = ldev->tracker.bond_speed_mbps;
1512 if (speed == SPEED_UNKNOWN)
1513 return;
1514 }
1515
1516 /* If speed is not set, use the sum of max speeds of all PFs */
1517 if (!speed && mlx5_lag_sum_devices_max_speed(ldev, &speed))
1518 return;
1519
1520 speed = speed / MLX5_MAX_TX_SPEED_UNIT;
1521
1522 mlx5_ldev_for_each(pf_idx, 0, ldev) {
1523 pf = mlx5_lag_pf(ldev, pf_idx);
1524 if (!pf)
1525 continue;
1526 mdev = pf->dev;
1527 if (!mdev)
1528 continue;
1529
1530 mlx5_lag_modify_device_vports_speed(mdev, speed);
1531 }
1532 }
1533
mlx5_lag_reset_vports_speed(struct mlx5_lag * ldev)1534 void mlx5_lag_reset_vports_speed(struct mlx5_lag *ldev)
1535 {
1536 struct mlx5_core_dev *mdev;
1537 struct lag_func *pf;
1538 u32 speed;
1539 int pf_idx;
1540 int ret;
1541
1542 mlx5_ldev_for_each(pf_idx, 0, ldev) {
1543 pf = mlx5_lag_pf(ldev, pf_idx);
1544 if (!pf)
1545 continue;
1546 mdev = pf->dev;
1547 if (!mdev)
1548 continue;
1549
1550 ret = mlx5_port_oper_linkspeed(mdev, &speed);
1551 if (ret) {
1552 mlx5_core_dbg(mdev,
1553 "Failed to reset vports speed for device %s. Oper speed is not available (err=%d)\n",
1554 dev_name(mdev->device), ret);
1555 continue;
1556 }
1557
1558 speed = speed / MLX5_MAX_TX_SPEED_UNIT;
1559 mlx5_lag_modify_device_vports_speed(mdev, speed);
1560 }
1561 }
1562 #endif
1563
mlx5_do_bond(struct mlx5_lag * ldev)1564 static void mlx5_do_bond(struct mlx5_lag *ldev)
1565 {
1566 int idx = mlx5_lag_get_dev_index_by_seq(ldev, MLX5_LAG_P1);
1567 struct lag_tracker tracker = { };
1568 struct mlx5_core_dev *dev0;
1569 struct net_device *ndev;
1570 bool do_bond, roce_lag;
1571 int err;
1572 int i;
1573
1574 if (idx < 0)
1575 return;
1576
1577 dev0 = mlx5_lag_pf(ldev, idx)->dev;
1578 if (!mlx5_lag_is_ready(ldev)) {
1579 do_bond = false;
1580 } else {
1581 /* VF LAG is in multipath mode, ignore bond change requests */
1582 if (mlx5_lag_is_multipath(dev0))
1583 return;
1584
1585 tracker = ldev->tracker;
1586
1587 do_bond = tracker.is_bonded && mlx5_lag_check_prereq(ldev);
1588 }
1589
1590 if (do_bond && !__mlx5_lag_is_active(ldev)) {
1591 bool shared_fdb = mlx5_lag_shared_fdb_supported(ldev);
1592
1593 roce_lag = mlx5_lag_is_roce_lag(ldev);
1594
1595 if (shared_fdb) {
1596 err = mlx5_lag_shared_fdb_create(ldev, &tracker,
1597 MLX5_LAG_MODE_SRIOV,
1598 0);
1599 if (err)
1600 return;
1601 } else {
1602 if (roce_lag)
1603 mlx5_lag_remove_devices(ldev);
1604
1605 err = mlx5_activate_lag(ldev, &tracker,
1606 roce_lag ? MLX5_LAG_MODE_ROCE :
1607 MLX5_LAG_MODE_SRIOV,
1608 false);
1609 if (err) {
1610 if (roce_lag)
1611 mlx5_lag_add_devices(ldev);
1612 return;
1613 }
1614
1615 if (roce_lag) {
1616 struct mlx5_core_dev *dev;
1617
1618 mlx5_lag_rescan_dev_locked(ldev, dev0, true);
1619 mlx5_ldev_for_each(i, 0, ldev) {
1620 if (i == idx)
1621 continue;
1622 dev = mlx5_lag_pf(ldev, i)->dev;
1623 if (mlx5_get_roce_state(dev))
1624 mlx5_nic_vport_enable_roce(dev);
1625 }
1626 }
1627 }
1628 if (tracker.tx_type == NETDEV_LAG_TX_TYPE_ACTIVEBACKUP) {
1629 ndev = mlx5_lag_active_backup_get_netdev(dev0);
1630 /** Only sriov and roce lag should have tracker->TX_type
1631 * set so no need to check the mode
1632 */
1633 blocking_notifier_call_chain(&dev0->priv.lag_nh,
1634 MLX5_DRIVER_EVENT_ACTIVE_BACKUP_LAG_CHANGE_LOWERSTATE,
1635 ndev);
1636 dev_put(ndev);
1637 }
1638 if (!shared_fdb)
1639 mlx5_lag_set_vports_agg_speed(ldev);
1640 } else if (mlx5_lag_should_modify_lag(ldev, do_bond)) {
1641 mlx5_modify_lag(ldev, &tracker);
1642 mlx5_lag_set_vports_agg_speed(ldev);
1643 } else if (mlx5_lag_should_disable_lag(ldev, do_bond)) {
1644 mlx5_lag_reset_vports_speed(ldev);
1645 mlx5_disable_lag(ldev);
1646 }
1647 }
1648
1649 /* The last mdev to unregister will destroy the workqueue before removing the
1650 * devcom component, and as all the mdevs use the same devcom component we are
1651 * guaranteed that the devcom is valid while the calling work is running.
1652 */
mlx5_lag_get_devcom_comp(struct mlx5_lag * ldev)1653 struct mlx5_devcom_comp_dev *mlx5_lag_get_devcom_comp(struct mlx5_lag *ldev)
1654 {
1655 struct mlx5_devcom_comp_dev *devcom = NULL;
1656 struct lag_func *pf;
1657 int i;
1658
1659 mutex_lock(&ldev->lock);
1660 i = mlx5_get_next_lag_func(ldev, 0, MLX5_LAG_FILTER_PORTS);
1661 if (i < MLX5_MAX_PORTS) {
1662 pf = mlx5_lag_pf(ldev, i);
1663 devcom = pf->dev->priv.hca_devcom_comp;
1664 }
1665 mutex_unlock(&ldev->lock);
1666 return devcom;
1667 }
1668
mlx5_lag_demux_ft_fg_init(struct mlx5_core_dev * dev,struct mlx5_flow_table_attr * ft_attr,struct lag_func * pf)1669 static int mlx5_lag_demux_ft_fg_init(struct mlx5_core_dev *dev,
1670 struct mlx5_flow_table_attr *ft_attr,
1671 struct lag_func *pf)
1672 {
1673 #ifdef CONFIG_MLX5_ESWITCH
1674 struct mlx5_flow_namespace *ns;
1675 struct mlx5_flow_group *fg;
1676 int err;
1677
1678 ns = mlx5_get_flow_namespace(dev, MLX5_FLOW_NAMESPACE_LAG);
1679 if (!ns)
1680 return 0;
1681
1682 pf->lag_demux_ft = mlx5_create_flow_table(ns, ft_attr);
1683 if (IS_ERR(pf->lag_demux_ft))
1684 return PTR_ERR(pf->lag_demux_ft);
1685
1686 fg = mlx5_esw_lag_demux_fg_create(dev->priv.eswitch,
1687 pf->lag_demux_ft);
1688 if (IS_ERR(fg)) {
1689 err = PTR_ERR(fg);
1690 mlx5_destroy_flow_table(pf->lag_demux_ft);
1691 pf->lag_demux_ft = NULL;
1692 return err;
1693 }
1694
1695 pf->lag_demux_fg = fg;
1696 return 0;
1697 #else
1698 return -EOPNOTSUPP;
1699 #endif
1700 }
1701
mlx5_lag_demux_fw_init(struct mlx5_core_dev * dev,struct mlx5_flow_table_attr * ft_attr,struct lag_func * pf)1702 static int mlx5_lag_demux_fw_init(struct mlx5_core_dev *dev,
1703 struct mlx5_flow_table_attr *ft_attr,
1704 struct lag_func *pf)
1705 {
1706 struct mlx5_flow_namespace *ns;
1707 int err;
1708
1709 ns = mlx5_get_flow_namespace(dev, MLX5_FLOW_NAMESPACE_LAG);
1710 if (!ns)
1711 return 0;
1712
1713 pf->lag_demux_fg = NULL;
1714 ft_attr->max_fte = 1;
1715 pf->lag_demux_ft = mlx5_create_lag_demux_flow_table(ns, ft_attr);
1716 if (IS_ERR(pf->lag_demux_ft)) {
1717 err = PTR_ERR(pf->lag_demux_ft);
1718 pf->lag_demux_ft = NULL;
1719 return err;
1720 }
1721
1722 return 0;
1723 }
1724
mlx5_lag_demux_init(struct mlx5_core_dev * dev,struct mlx5_flow_table_attr * ft_attr)1725 int mlx5_lag_demux_init(struct mlx5_core_dev *dev,
1726 struct mlx5_flow_table_attr *ft_attr)
1727 {
1728 struct mlx5_lag *ldev;
1729 struct lag_func *pf;
1730
1731 if (!ft_attr)
1732 return -EINVAL;
1733
1734 ldev = mlx5_lag_dev(dev);
1735 if (!ldev)
1736 return -ENODEV;
1737
1738 pf = mlx5_lag_pf_by_dev(ldev, dev);
1739 if (!pf)
1740 return -ENODEV;
1741
1742 xa_init(&pf->lag_demux_rules);
1743
1744 if (mlx5_lag_is_sw_lag(dev))
1745 return mlx5_lag_demux_ft_fg_init(dev, ft_attr, pf);
1746
1747 return mlx5_lag_demux_fw_init(dev, ft_attr, pf);
1748 }
1749 EXPORT_SYMBOL(mlx5_lag_demux_init);
1750
mlx5_lag_demux_cleanup(struct mlx5_core_dev * dev)1751 void mlx5_lag_demux_cleanup(struct mlx5_core_dev *dev)
1752 {
1753 struct mlx5_flow_handle *rule;
1754 struct mlx5_lag *ldev;
1755 unsigned long vport_num;
1756 struct lag_func *pf;
1757
1758 ldev = mlx5_lag_dev(dev);
1759 if (!ldev)
1760 return;
1761
1762 pf = mlx5_lag_pf_by_dev(ldev, dev);
1763 if (!pf)
1764 return;
1765
1766 xa_for_each(&pf->lag_demux_rules, vport_num, rule)
1767 mlx5_del_flow_rules(rule);
1768 xa_destroy(&pf->lag_demux_rules);
1769
1770 if (pf->lag_demux_fg)
1771 mlx5_destroy_flow_group(pf->lag_demux_fg);
1772 if (pf->lag_demux_ft)
1773 mlx5_destroy_flow_table(pf->lag_demux_ft);
1774 pf->lag_demux_fg = NULL;
1775 pf->lag_demux_ft = NULL;
1776 }
1777 EXPORT_SYMBOL(mlx5_lag_demux_cleanup);
1778
mlx5_lag_dev_get_master_pf(struct mlx5_lag * ldev,struct mlx5_core_dev * dev)1779 static struct lag_func *mlx5_lag_dev_get_master_pf(struct mlx5_lag *ldev,
1780 struct mlx5_core_dev *dev)
1781 {
1782 u32 filter = mlx5_lag_get_filter(ldev, dev);
1783 int idx;
1784
1785 idx = mlx5_lag_get_dev_index_by_seq_filter(ldev, MLX5_LAG_P1, filter);
1786 if (idx < 0)
1787 return NULL;
1788
1789 return mlx5_lag_pf(ldev, idx);
1790 }
1791
mlx5_lag_demux_rule_add(struct mlx5_core_dev * vport_dev,u16 vport_num,int index)1792 int mlx5_lag_demux_rule_add(struct mlx5_core_dev *vport_dev, u16 vport_num,
1793 int index)
1794 {
1795 struct mlx5_flow_handle *rule;
1796 struct lag_func *master;
1797 struct mlx5_lag *ldev;
1798 int err;
1799
1800 ldev = mlx5_lag_dev(vport_dev);
1801 if (!ldev)
1802 return 0;
1803
1804 master = mlx5_lag_dev_get_master_pf(ldev, vport_dev);
1805 if (!master || !master->lag_demux_fg)
1806 return 0;
1807
1808 if (xa_load(&master->lag_demux_rules, index))
1809 return 0;
1810
1811 rule = mlx5_esw_lag_demux_rule_create(vport_dev->priv.eswitch,
1812 vport_num, master->lag_demux_ft);
1813 if (IS_ERR(rule)) {
1814 err = PTR_ERR(rule);
1815 mlx5_core_warn(vport_dev,
1816 "Failed to create LAG demux rule for vport %u, err %d\n",
1817 vport_num, err);
1818 return err;
1819 }
1820
1821 err = xa_err(xa_store(&master->lag_demux_rules, index, rule,
1822 GFP_KERNEL));
1823 if (err) {
1824 mlx5_del_flow_rules(rule);
1825 mlx5_core_warn(vport_dev,
1826 "Failed to store LAG demux rule for vport %u, err %d\n",
1827 vport_num, err);
1828 }
1829
1830 return err;
1831 }
1832 EXPORT_SYMBOL(mlx5_lag_demux_rule_add);
1833
mlx5_lag_demux_rule_del(struct mlx5_core_dev * dev,int index)1834 void mlx5_lag_demux_rule_del(struct mlx5_core_dev *dev, int index)
1835 {
1836 struct mlx5_flow_handle *rule;
1837 struct lag_func *master_pf;
1838 struct mlx5_lag *ldev;
1839
1840 ldev = mlx5_lag_dev(dev);
1841 if (!ldev)
1842 return;
1843
1844 master_pf = mlx5_lag_dev_get_master_pf(ldev, dev);
1845 if (!master_pf || !master_pf->lag_demux_fg)
1846 return;
1847
1848 rule = xa_erase(&master_pf->lag_demux_rules, index);
1849 if (rule)
1850 mlx5_del_flow_rules(rule);
1851 }
1852 EXPORT_SYMBOL(mlx5_lag_demux_rule_del);
1853
mlx5_queue_bond_work(struct mlx5_lag * ldev,unsigned long delay)1854 static void mlx5_queue_bond_work(struct mlx5_lag *ldev, unsigned long delay)
1855 {
1856 queue_delayed_work(ldev->wq, &ldev->bond_work, delay);
1857 }
1858
mlx5_do_bond_work(struct work_struct * work)1859 static void mlx5_do_bond_work(struct work_struct *work)
1860 {
1861 struct delayed_work *delayed_work = to_delayed_work(work);
1862 struct mlx5_lag *ldev = container_of(delayed_work, struct mlx5_lag,
1863 bond_work);
1864 struct mlx5_devcom_comp_dev *devcom;
1865 int status;
1866
1867 devcom = mlx5_lag_get_devcom_comp(ldev);
1868 if (!devcom)
1869 return;
1870
1871 status = mlx5_devcom_comp_trylock(devcom);
1872 if (!status) {
1873 mlx5_queue_bond_work(ldev, HZ);
1874 return;
1875 }
1876
1877 mutex_lock(&ldev->lock);
1878 if (ldev->mode_changes_in_progress) {
1879 mutex_unlock(&ldev->lock);
1880 mlx5_devcom_comp_unlock(devcom);
1881 mlx5_queue_bond_work(ldev, HZ);
1882 return;
1883 }
1884
1885 mlx5_do_bond(ldev);
1886 mutex_unlock(&ldev->lock);
1887 mlx5_devcom_comp_unlock(devcom);
1888 }
1889
mlx5_handle_changeupper_event(struct mlx5_lag * ldev,struct lag_tracker * tracker,struct netdev_notifier_changeupper_info * info)1890 static int mlx5_handle_changeupper_event(struct mlx5_lag *ldev,
1891 struct lag_tracker *tracker,
1892 struct netdev_notifier_changeupper_info *info)
1893 {
1894 struct net_device *upper = info->upper_dev, *ndev_tmp;
1895 struct netdev_lag_upper_info *lag_upper_info = NULL;
1896 bool is_bonded, is_in_lag, mode_supported;
1897 bool has_inactive = 0;
1898 struct lag_func *pf;
1899 struct slave *slave;
1900 u8 bond_status = 0;
1901 int num_slaves = 0;
1902 int changed = 0;
1903 int i, idx = -1;
1904
1905 if (!netif_is_lag_master(upper))
1906 return 0;
1907
1908 if (info->linking)
1909 lag_upper_info = info->upper_info;
1910
1911 /* The event may still be of interest if the slave does not belong to
1912 * us, but is enslaved to a master which has one or more of our netdevs
1913 * as slaves (e.g., if a new slave is added to a master that bonds two
1914 * of our netdevs, we should unbond).
1915 */
1916 rcu_read_lock();
1917 for_each_netdev_in_bond_rcu(upper, ndev_tmp) {
1918 mlx5_ldev_for_each(i, 0, ldev) {
1919 pf = mlx5_lag_pf(ldev, i);
1920 if (pf->netdev == ndev_tmp) {
1921 idx++;
1922 break;
1923 }
1924 }
1925 if (i < MLX5_MAX_PORTS) {
1926 slave = bond_slave_get_rcu(ndev_tmp);
1927 if (slave)
1928 has_inactive |= bond_is_slave_inactive(slave);
1929 bond_status |= (1 << idx);
1930 }
1931
1932 num_slaves++;
1933 }
1934 rcu_read_unlock();
1935
1936 /* None of this lagdev's netdevs are slaves of this master. */
1937 if (!(bond_status & GENMASK(ldev->ports - 1, 0)))
1938 return 0;
1939
1940 if (lag_upper_info) {
1941 tracker->tx_type = lag_upper_info->tx_type;
1942 tracker->hash_type = lag_upper_info->hash_type;
1943 }
1944
1945 tracker->has_inactive = has_inactive;
1946 /* Determine bonding status:
1947 * A device is considered bonded if both its physical ports are slaves
1948 * of the same lag master, and only them.
1949 */
1950 is_in_lag = num_slaves == ldev->ports &&
1951 bond_status == GENMASK(ldev->ports - 1, 0);
1952
1953 /* Lag mode must be activebackup or hash. */
1954 mode_supported = tracker->tx_type == NETDEV_LAG_TX_TYPE_ACTIVEBACKUP ||
1955 tracker->tx_type == NETDEV_LAG_TX_TYPE_HASH;
1956
1957 is_bonded = is_in_lag && mode_supported;
1958 if (tracker->is_bonded != is_bonded) {
1959 tracker->is_bonded = is_bonded;
1960 changed = 1;
1961 }
1962
1963 if (!is_in_lag)
1964 return changed;
1965
1966 if (!mlx5_lag_is_ready(ldev))
1967 NL_SET_ERR_MSG_MOD(info->info.extack,
1968 "Can't activate LAG offload, PF is configured with more than 64 VFs");
1969 else if (!mode_supported)
1970 NL_SET_ERR_MSG_MOD(info->info.extack,
1971 "Can't activate LAG offload, TX type isn't supported");
1972
1973 return changed;
1974 }
1975
mlx5_handle_changelowerstate_event(struct mlx5_lag * ldev,struct lag_tracker * tracker,struct net_device * ndev,struct netdev_notifier_changelowerstate_info * info)1976 static int mlx5_handle_changelowerstate_event(struct mlx5_lag *ldev,
1977 struct lag_tracker *tracker,
1978 struct net_device *ndev,
1979 struct netdev_notifier_changelowerstate_info *info)
1980 {
1981 struct netdev_lag_lower_state_info *lag_lower_info;
1982 int idx;
1983
1984 if (!netif_is_lag_port(ndev))
1985 return 0;
1986
1987 idx = mlx5_lag_dev_get_netdev_idx(ldev, ndev);
1988 if (idx < 0)
1989 return 0;
1990
1991 /* This information is used to determine virtual to physical
1992 * port mapping.
1993 */
1994 lag_lower_info = info->lower_state_info;
1995 if (!lag_lower_info)
1996 return 0;
1997
1998 tracker->netdev_state[idx] = *lag_lower_info;
1999
2000 return 1;
2001 }
2002
mlx5_handle_changeinfodata_event(struct mlx5_lag * ldev,struct lag_tracker * tracker,struct net_device * ndev)2003 static int mlx5_handle_changeinfodata_event(struct mlx5_lag *ldev,
2004 struct lag_tracker *tracker,
2005 struct net_device *ndev)
2006 {
2007 struct net_device *ndev_tmp;
2008 struct slave *slave;
2009 bool has_inactive = 0;
2010 int idx;
2011
2012 if (!netif_is_lag_master(ndev))
2013 return 0;
2014
2015 rcu_read_lock();
2016 for_each_netdev_in_bond_rcu(ndev, ndev_tmp) {
2017 idx = mlx5_lag_dev_get_netdev_idx(ldev, ndev_tmp);
2018 if (idx < 0)
2019 continue;
2020
2021 slave = bond_slave_get_rcu(ndev_tmp);
2022 if (slave)
2023 has_inactive |= bond_is_slave_inactive(slave);
2024 }
2025 rcu_read_unlock();
2026
2027 if (tracker->has_inactive == has_inactive)
2028 return 0;
2029
2030 tracker->has_inactive = has_inactive;
2031
2032 return 1;
2033 }
2034
mlx5_lag_update_tracker_speed(struct lag_tracker * tracker,struct net_device * ndev)2035 static void mlx5_lag_update_tracker_speed(struct lag_tracker *tracker,
2036 struct net_device *ndev)
2037 {
2038 struct ethtool_link_ksettings lksettings;
2039 struct net_device *bond_dev;
2040 int err;
2041
2042 if (netif_is_lag_master(ndev))
2043 bond_dev = ndev;
2044 else
2045 bond_dev = netdev_master_upper_dev_get(ndev);
2046
2047 if (!bond_dev) {
2048 tracker->bond_speed_mbps = SPEED_UNKNOWN;
2049 return;
2050 }
2051
2052 err = __ethtool_get_link_ksettings(bond_dev, &lksettings);
2053 if (err) {
2054 netdev_dbg(bond_dev,
2055 "Failed to get speed for bond dev %s, err=%d\n",
2056 bond_dev->name, err);
2057 tracker->bond_speed_mbps = SPEED_UNKNOWN;
2058 return;
2059 }
2060
2061 if (lksettings.base.speed == SPEED_UNKNOWN)
2062 tracker->bond_speed_mbps = 0;
2063 else
2064 tracker->bond_speed_mbps = lksettings.base.speed;
2065 }
2066
2067 /* Returns speed in Mbps. */
mlx5_lag_query_bond_speed(struct mlx5_core_dev * mdev,u32 * speed)2068 int mlx5_lag_query_bond_speed(struct mlx5_core_dev *mdev, u32 *speed)
2069 {
2070 struct mlx5_lag *ldev;
2071 unsigned long flags;
2072 int ret = 0;
2073
2074 spin_lock_irqsave(&lag_lock, flags);
2075 ldev = mlx5_lag_dev(mdev);
2076 if (!ldev) {
2077 ret = -ENODEV;
2078 goto unlock;
2079 }
2080
2081 *speed = ldev->tracker.bond_speed_mbps;
2082
2083 if (*speed == SPEED_UNKNOWN) {
2084 mlx5_core_dbg(mdev, "Bond speed is unknown\n");
2085 ret = -EINVAL;
2086 }
2087
2088 unlock:
2089 spin_unlock_irqrestore(&lag_lock, flags);
2090 return ret;
2091 }
2092 EXPORT_SYMBOL_GPL(mlx5_lag_query_bond_speed);
2093
2094 /* this handler is always registered to netdev events */
mlx5_lag_netdev_event(struct notifier_block * this,unsigned long event,void * ptr)2095 static int mlx5_lag_netdev_event(struct notifier_block *this,
2096 unsigned long event, void *ptr)
2097 {
2098 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
2099 struct lag_tracker tracker;
2100 struct mlx5_lag *ldev;
2101 int changed = 0;
2102
2103 if (event != NETDEV_CHANGEUPPER &&
2104 event != NETDEV_CHANGELOWERSTATE &&
2105 event != NETDEV_CHANGEINFODATA)
2106 return NOTIFY_DONE;
2107
2108 ldev = container_of(this, struct mlx5_lag, nb);
2109
2110 tracker = ldev->tracker;
2111
2112 switch (event) {
2113 case NETDEV_CHANGEUPPER:
2114 changed = mlx5_handle_changeupper_event(ldev, &tracker, ptr);
2115 break;
2116 case NETDEV_CHANGELOWERSTATE:
2117 changed = mlx5_handle_changelowerstate_event(ldev, &tracker,
2118 ndev, ptr);
2119 break;
2120 case NETDEV_CHANGEINFODATA:
2121 changed = mlx5_handle_changeinfodata_event(ldev, &tracker, ndev);
2122 break;
2123 }
2124
2125 if (changed)
2126 mlx5_lag_update_tracker_speed(&tracker, ndev);
2127
2128 ldev->tracker = tracker;
2129
2130 if (changed)
2131 mlx5_queue_bond_work(ldev, 0);
2132
2133 return NOTIFY_DONE;
2134 }
2135
mlx5_ldev_add_netdev(struct mlx5_lag * ldev,struct mlx5_core_dev * dev,struct net_device * netdev)2136 static void mlx5_ldev_add_netdev(struct mlx5_lag *ldev,
2137 struct mlx5_core_dev *dev,
2138 struct net_device *netdev)
2139 {
2140 struct lag_func *pf;
2141 unsigned long flags;
2142 int i;
2143
2144 spin_lock_irqsave(&lag_lock, flags);
2145 /* Find pf entry by matching dev pointer */
2146 mlx5_ldev_for_each(i, 0, ldev) {
2147 pf = mlx5_lag_pf(ldev, i);
2148 if (pf->dev == dev) {
2149 pf->netdev = netdev;
2150 ldev->tracker.netdev_state[i].link_up = 0;
2151 ldev->tracker.netdev_state[i].tx_enabled = 0;
2152 break;
2153 }
2154 }
2155 spin_unlock_irqrestore(&lag_lock, flags);
2156 }
2157
mlx5_ldev_remove_netdev(struct mlx5_lag * ldev,struct net_device * netdev)2158 static void mlx5_ldev_remove_netdev(struct mlx5_lag *ldev,
2159 struct net_device *netdev)
2160 {
2161 struct lag_func *pf;
2162 unsigned long flags;
2163 int i;
2164
2165 spin_lock_irqsave(&lag_lock, flags);
2166 mlx5_ldev_for_each(i, 0, ldev) {
2167 pf = mlx5_lag_pf(ldev, i);
2168 if (pf->netdev == netdev) {
2169 pf->netdev = NULL;
2170 break;
2171 }
2172 }
2173 spin_unlock_irqrestore(&lag_lock, flags);
2174 }
2175
mlx5_ldev_add_mdev(struct mlx5_lag * ldev,struct mlx5_core_dev * dev,u32 group_id)2176 int mlx5_ldev_add_mdev(struct mlx5_lag *ldev,
2177 struct mlx5_core_dev *dev,
2178 u32 group_id)
2179 {
2180 struct lag_func *pf;
2181 u32 idx;
2182 int err;
2183
2184 pf = kzalloc_obj(*pf);
2185 if (!pf)
2186 return -ENOMEM;
2187
2188 err = xa_alloc(&ldev->pfs, &idx, pf, XA_LIMIT(0, MLX5_MAX_PORTS - 1),
2189 GFP_KERNEL);
2190 if (err) {
2191 kfree(pf);
2192 return err;
2193 }
2194
2195 pf->idx = idx;
2196 pf->dev = dev;
2197 pf->group_id = group_id;
2198 dev->priv.lag = ldev;
2199
2200 if (group_id)
2201 return 0;
2202
2203 xa_set_mark(&ldev->pfs, idx, MLX5_LAG_XA_MARK_PORT);
2204
2205 MLX5_NB_INIT(&pf->port_change_nb,
2206 mlx5_lag_mpesw_port_change_event, PORT_CHANGE);
2207 mlx5_eq_notifier_register(dev, &pf->port_change_nb);
2208
2209 return 0;
2210 }
2211
mlx5_ldev_remove_mdev(struct mlx5_lag * ldev,struct mlx5_core_dev * dev)2212 void mlx5_ldev_remove_mdev(struct mlx5_lag *ldev,
2213 struct mlx5_core_dev *dev)
2214 {
2215 struct lag_func *pf;
2216 int i;
2217
2218 mlx5_lag_for_each(i, 0, ldev, MLX5_LAG_FILTER_ALL) {
2219 pf = mlx5_lag_pf(ldev, i);
2220 if (pf->dev == dev)
2221 break;
2222 }
2223 if (i >= MLX5_MAX_PORTS)
2224 return;
2225
2226 if (pf->port_change_nb.nb.notifier_call)
2227 mlx5_eq_notifier_unregister(dev, &pf->port_change_nb);
2228
2229 pf->dev = NULL;
2230 dev->priv.lag = NULL;
2231 xa_erase(&ldev->pfs, pf->idx);
2232 kfree(pf);
2233 }
2234
2235 /* Must be called with HCA devcom component lock held */
__mlx5_lag_dev_add_mdev(struct mlx5_core_dev * dev)2236 static int __mlx5_lag_dev_add_mdev(struct mlx5_core_dev *dev)
2237 {
2238 struct mlx5_devcom_comp_dev *pos = NULL;
2239 struct mlx5_lag *ldev = NULL;
2240 struct mlx5_core_dev *tmp_dev;
2241 int err;
2242
2243 tmp_dev = mlx5_devcom_get_next_peer_data(dev->priv.hca_devcom_comp, &pos);
2244 if (tmp_dev)
2245 ldev = mlx5_lag_dev(tmp_dev);
2246
2247 if (!ldev) {
2248 ldev = mlx5_lag_dev_alloc(dev);
2249 if (!ldev) {
2250 mlx5_core_err(dev, "Failed to alloc lag dev\n");
2251 return 0;
2252 }
2253 err = mlx5_ldev_add_mdev(ldev, dev, 0);
2254 if (err) {
2255 mlx5_core_err(dev, "Failed to add mdev to lag dev\n");
2256 mlx5_ldev_put(ldev);
2257 return 0;
2258 }
2259 return 0;
2260 }
2261
2262 mutex_lock(&ldev->lock);
2263 if (ldev->mode_changes_in_progress) {
2264 mutex_unlock(&ldev->lock);
2265 return -EAGAIN;
2266 }
2267 mlx5_ldev_get(ldev);
2268 err = mlx5_ldev_add_mdev(ldev, dev, 0);
2269 if (err) {
2270 mlx5_ldev_put(ldev);
2271 mutex_unlock(&ldev->lock);
2272 return err;
2273 }
2274 mutex_unlock(&ldev->lock);
2275
2276 return 0;
2277 }
2278
mlx5_lag_unregister_hca_devcom_comp(struct mlx5_core_dev * dev)2279 static void mlx5_lag_unregister_hca_devcom_comp(struct mlx5_core_dev *dev)
2280 {
2281 mlx5_devcom_unregister_component(dev->priv.hca_devcom_comp);
2282 dev->priv.hca_devcom_comp = NULL;
2283 }
2284
mlx5_lag_register_hca_devcom_comp(struct mlx5_core_dev * dev)2285 static int mlx5_lag_register_hca_devcom_comp(struct mlx5_core_dev *dev)
2286 {
2287 struct mlx5_devcom_match_attr attr = {
2288 .flags = MLX5_DEVCOM_MATCH_FLAGS_NS,
2289 .net = mlx5_core_net(dev),
2290 };
2291 u8 len __always_unused;
2292
2293 mlx5_query_nic_sw_system_image_guid(dev, attr.key.buf, &len);
2294
2295 /* This component is use to sync adding core_dev to lag_dev and to sync
2296 * changes of mlx5_adev_devices between LAG layer and other layers.
2297 */
2298 dev->priv.hca_devcom_comp =
2299 mlx5_devcom_register_component(dev->priv.devc,
2300 MLX5_DEVCOM_HCA_PORTS,
2301 &attr, mlx5_lag_devcom_event,
2302 dev);
2303 if (!dev->priv.hca_devcom_comp) {
2304 mlx5_core_err(dev,
2305 "Failed to register devcom HCA component.");
2306 return -EINVAL;
2307 }
2308
2309 return 0;
2310 }
2311
mlx5_lag_remove_mdev(struct mlx5_core_dev * dev)2312 void mlx5_lag_remove_mdev(struct mlx5_core_dev *dev)
2313 {
2314 struct mlx5_lag *ldev;
2315
2316 ldev = mlx5_lag_dev(dev);
2317 if (!ldev)
2318 return;
2319
2320 /* mdev is being removed, might as well remove debugfs
2321 * as early as possible.
2322 */
2323 mlx5_ldev_remove_debugfs(dev->priv.dbg.lag_debugfs);
2324 recheck:
2325 mutex_lock(&ldev->lock);
2326 if (ldev->mode_changes_in_progress) {
2327 mutex_unlock(&ldev->lock);
2328 msleep(100);
2329 goto recheck;
2330 }
2331 mlx5_ldev_remove_mdev(ldev, dev);
2332 mutex_unlock(&ldev->lock);
2333 /* Send devcom event to notify peers that a device is being removed */
2334 mlx5_devcom_send_event(dev->priv.hca_devcom_comp,
2335 LAG_DEVCOM_UNPAIR, LAG_DEVCOM_UNPAIR, dev);
2336 mlx5_lag_unregister_hca_devcom_comp(dev);
2337 mlx5_ldev_put(ldev);
2338 }
2339
mlx5_lag_add_mdev(struct mlx5_core_dev * dev)2340 void mlx5_lag_add_mdev(struct mlx5_core_dev *dev)
2341 {
2342 int err;
2343
2344 if (!mlx5_lag_is_supported(dev))
2345 return;
2346
2347 if (mlx5_lag_register_hca_devcom_comp(dev))
2348 return;
2349
2350 recheck:
2351 mlx5_devcom_comp_lock(dev->priv.hca_devcom_comp);
2352 err = __mlx5_lag_dev_add_mdev(dev);
2353 mlx5_devcom_comp_unlock(dev->priv.hca_devcom_comp);
2354
2355 if (err) {
2356 msleep(100);
2357 goto recheck;
2358 }
2359 /* Send devcom event to notify peers that a device was added */
2360 mlx5_devcom_send_event(dev->priv.hca_devcom_comp,
2361 LAG_DEVCOM_PAIR, LAG_DEVCOM_UNPAIR, dev);
2362 mlx5_ldev_add_debugfs(dev);
2363 }
2364
mlx5_lag_remove_netdev(struct mlx5_core_dev * dev,struct net_device * netdev)2365 void mlx5_lag_remove_netdev(struct mlx5_core_dev *dev,
2366 struct net_device *netdev)
2367 {
2368 struct mlx5_lag *ldev;
2369 bool lag_is_active;
2370
2371 ldev = mlx5_lag_dev(dev);
2372 if (!ldev)
2373 return;
2374
2375 mutex_lock(&ldev->lock);
2376 mlx5_ldev_remove_netdev(ldev, netdev);
2377 clear_bit(MLX5_LAG_FLAG_NDEVS_READY, &ldev->state_flags);
2378
2379 lag_is_active = __mlx5_lag_is_active(ldev);
2380 mutex_unlock(&ldev->lock);
2381
2382 if (lag_is_active)
2383 mlx5_queue_bond_work(ldev, 0);
2384 }
2385
mlx5_lag_add_netdev(struct mlx5_core_dev * dev,struct net_device * netdev)2386 void mlx5_lag_add_netdev(struct mlx5_core_dev *dev,
2387 struct net_device *netdev)
2388 {
2389 struct mlx5_lag *ldev;
2390 int num = 0;
2391
2392 ldev = mlx5_lag_dev(dev);
2393 if (!ldev)
2394 return;
2395
2396 mutex_lock(&ldev->lock);
2397 mlx5_ldev_add_netdev(ldev, dev, netdev);
2398 num = mlx5_lag_num_netdevs(ldev);
2399 if (num >= ldev->ports)
2400 set_bit(MLX5_LAG_FLAG_NDEVS_READY, &ldev->state_flags);
2401 mutex_unlock(&ldev->lock);
2402 mlx5_queue_bond_work(ldev, 0);
2403 }
2404
mlx5_get_pre_lag_func(struct mlx5_lag * ldev,int start_idx,int end_idx,u32 filter)2405 int mlx5_get_pre_lag_func(struct mlx5_lag *ldev, int start_idx, int end_idx,
2406 u32 filter)
2407 {
2408 struct lag_func *pf;
2409 int i;
2410
2411 for (i = start_idx; i >= end_idx; i--) {
2412 pf = xa_load(&ldev->pfs, i);
2413 if (!pf || !pf->dev)
2414 continue;
2415 if (filter == MLX5_LAG_FILTER_PORTS) {
2416 if (xa_get_mark(&ldev->pfs, i, MLX5_LAG_XA_MARK_PORT))
2417 return i;
2418 } else if (filter == MLX5_LAG_FILTER_ALL ||
2419 filter == pf->group_id) {
2420 return i;
2421 }
2422 }
2423 return -1;
2424 }
2425
mlx5_get_next_lag_func(struct mlx5_lag * ldev,int start_idx,u32 filter)2426 int mlx5_get_next_lag_func(struct mlx5_lag *ldev, int start_idx, u32 filter)
2427 {
2428 struct lag_func *pf;
2429 unsigned long idx;
2430
2431 if (filter == MLX5_LAG_FILTER_PORTS) {
2432 xa_for_each_marked_start(&ldev->pfs, idx, pf,
2433 MLX5_LAG_XA_MARK_PORT, start_idx)
2434 if (pf->dev)
2435 return idx;
2436 return MLX5_MAX_PORTS;
2437 }
2438
2439 xa_for_each_start(&ldev->pfs, idx, pf, start_idx) {
2440 if (!pf->dev)
2441 continue;
2442 if (filter == MLX5_LAG_FILTER_ALL ||
2443 filter == pf->group_id)
2444 return idx;
2445 }
2446 return MLX5_MAX_PORTS;
2447 }
2448
mlx5_lag_is_roce(struct mlx5_core_dev * dev)2449 bool mlx5_lag_is_roce(struct mlx5_core_dev *dev)
2450 {
2451 struct mlx5_lag *ldev;
2452 unsigned long flags;
2453 bool res;
2454
2455 spin_lock_irqsave(&lag_lock, flags);
2456 ldev = mlx5_lag_dev(dev);
2457 res = ldev && __mlx5_lag_is_roce(ldev);
2458 spin_unlock_irqrestore(&lag_lock, flags);
2459
2460 return res;
2461 }
2462 EXPORT_SYMBOL(mlx5_lag_is_roce);
2463
mlx5_lag_is_active(struct mlx5_core_dev * dev)2464 bool mlx5_lag_is_active(struct mlx5_core_dev *dev)
2465 {
2466 struct mlx5_lag *ldev;
2467 unsigned long flags;
2468 bool res;
2469
2470 spin_lock_irqsave(&lag_lock, flags);
2471 ldev = mlx5_lag_dev(dev);
2472 res = ldev && (__mlx5_lag_is_active(ldev) ||
2473 __mlx5_lag_is_sd_active(ldev, dev));
2474 spin_unlock_irqrestore(&lag_lock, flags);
2475
2476 return res;
2477 }
2478 EXPORT_SYMBOL(mlx5_lag_is_active);
2479
mlx5_lag_mode_is_hash(struct mlx5_core_dev * dev)2480 bool mlx5_lag_mode_is_hash(struct mlx5_core_dev *dev)
2481 {
2482 struct mlx5_lag *ldev;
2483 unsigned long flags;
2484 bool res = 0;
2485
2486 spin_lock_irqsave(&lag_lock, flags);
2487 ldev = mlx5_lag_dev(dev);
2488 if (ldev)
2489 res = test_bit(MLX5_LAG_MODE_FLAG_HASH_BASED, &ldev->mode_flags);
2490 spin_unlock_irqrestore(&lag_lock, flags);
2491
2492 return res;
2493 }
2494 EXPORT_SYMBOL(mlx5_lag_mode_is_hash);
2495
mlx5_lag_is_master(struct mlx5_core_dev * dev)2496 bool mlx5_lag_is_master(struct mlx5_core_dev *dev)
2497 {
2498 struct mlx5_lag *ldev;
2499 unsigned long flags;
2500 struct lag_func *pf;
2501 bool res = false;
2502 int idx;
2503
2504 spin_lock_irqsave(&lag_lock, flags);
2505 ldev = mlx5_lag_dev(dev);
2506 if (ldev) {
2507 u32 filter;
2508
2509 filter = mlx5_lag_get_filter(ldev, dev);
2510 idx = mlx5_lag_get_dev_index_by_seq_filter(ldev, MLX5_LAG_P1,
2511 filter);
2512 if ((__mlx5_lag_is_active(ldev) ||
2513 __mlx5_lag_is_sd_active(ldev, dev)) && idx >= 0) {
2514 pf = mlx5_lag_pf(ldev, idx);
2515 res = pf && dev == pf->dev;
2516 }
2517 }
2518 spin_unlock_irqrestore(&lag_lock, flags);
2519
2520 return res;
2521 }
2522 EXPORT_SYMBOL(mlx5_lag_is_master);
2523
mlx5_lag_is_sriov(struct mlx5_core_dev * dev)2524 bool mlx5_lag_is_sriov(struct mlx5_core_dev *dev)
2525 {
2526 struct mlx5_lag *ldev;
2527 unsigned long flags;
2528 bool res;
2529
2530 spin_lock_irqsave(&lag_lock, flags);
2531 ldev = mlx5_lag_dev(dev);
2532 res = ldev && __mlx5_lag_is_sriov(ldev);
2533 spin_unlock_irqrestore(&lag_lock, flags);
2534
2535 return res;
2536 }
2537 EXPORT_SYMBOL(mlx5_lag_is_sriov);
2538
mlx5_lag_is_sd(struct mlx5_core_dev * dev)2539 bool mlx5_lag_is_sd(struct mlx5_core_dev *dev)
2540 {
2541 struct mlx5_lag *ldev;
2542 unsigned long flags;
2543 bool res;
2544
2545 spin_lock_irqsave(&lag_lock, flags);
2546 ldev = mlx5_lag_dev(dev);
2547 res = ldev && __mlx5_lag_is_sd(ldev, dev);
2548 spin_unlock_irqrestore(&lag_lock, flags);
2549
2550 return res;
2551 }
2552
mlx5_lag_is_shared_fdb(struct mlx5_core_dev * dev)2553 bool mlx5_lag_is_shared_fdb(struct mlx5_core_dev *dev)
2554 {
2555 struct mlx5_lag *ldev;
2556 unsigned long flags;
2557 bool res = false;
2558
2559 spin_lock_irqsave(&lag_lock, flags);
2560 ldev = mlx5_lag_dev(dev);
2561 if (ldev) {
2562 res = test_bit(MLX5_LAG_MODE_FLAG_SHARED_FDB,
2563 &ldev->mode_flags);
2564 if (__mlx5_lag_is_sd(ldev, dev) && !__mlx5_lag_is_active(ldev))
2565 res = __mlx5_lag_is_sd_active(ldev, dev);
2566 }
2567 spin_unlock_irqrestore(&lag_lock, flags);
2568
2569 return res;
2570 }
2571 EXPORT_SYMBOL(mlx5_lag_is_shared_fdb);
2572
mlx5_lag_disable_change(struct mlx5_core_dev * dev)2573 void mlx5_lag_disable_change(struct mlx5_core_dev *dev)
2574 {
2575 struct mlx5_devcom_comp_dev *sd_devcom = mlx5_sd_get_devcom(dev);
2576 struct mlx5_core_dev *primary = dev;
2577 struct mlx5_lag *ldev;
2578 struct lag_func *pf;
2579 bool mpesw;
2580 int i;
2581
2582 ldev = mlx5_lag_dev(dev);
2583 if (!ldev)
2584 return;
2585
2586 if (sd_devcom) {
2587 mlx5_devcom_comp_lock(sd_devcom);
2588 primary = mlx5_sd_get_primary(dev) ?: dev;
2589 mlx5_devcom_comp_unlock(sd_devcom);
2590 }
2591 mlx5_devcom_comp_lock(primary->priv.hca_devcom_comp);
2592 mpesw = ldev->mode == MLX5_LAG_MODE_MPESW;
2593 if (mpesw)
2594 mlx5_mpesw_sd_devcoms_lock(ldev);
2595 mutex_lock(&ldev->lock);
2596
2597 ldev->mode_changes_in_progress++;
2598 if (__mlx5_lag_is_active(ldev)) {
2599 if (ldev->mode == MLX5_LAG_MODE_MPESW)
2600 mlx5_lag_disable_mpesw(ldev);
2601 else
2602 mlx5_disable_lag(ldev);
2603 }
2604
2605 mutex_unlock(&ldev->lock);
2606 if (mpesw)
2607 mlx5_mpesw_sd_devcoms_unlock(ldev);
2608 mlx5_devcom_comp_unlock(primary->priv.hca_devcom_comp);
2609
2610 if (!sd_devcom)
2611 return;
2612
2613 /* Teardown SD shared FDB for this device's group if active */
2614 mlx5_devcom_comp_lock(sd_devcom);
2615 mutex_lock(&ldev->lock);
2616 mlx5_lag_for_each(i, 0, ldev, MLX5_LAG_FILTER_ALL) {
2617 pf = mlx5_lag_pf(ldev, i);
2618 if (pf->dev == dev && pf->sd_fdb_active) {
2619 mlx5_lag_shared_fdb_destroy(ldev, pf->group_id);
2620 break;
2621 }
2622 }
2623 mutex_unlock(&ldev->lock);
2624 mlx5_devcom_comp_unlock(sd_devcom);
2625 }
2626
mlx5_lag_enable_change(struct mlx5_core_dev * dev)2627 void mlx5_lag_enable_change(struct mlx5_core_dev *dev)
2628 {
2629 struct mlx5_lag *ldev;
2630
2631 ldev = mlx5_lag_dev(dev);
2632 if (!ldev)
2633 return;
2634
2635 mutex_lock(&ldev->lock);
2636 ldev->mode_changes_in_progress--;
2637 mutex_unlock(&ldev->lock);
2638 mlx5_queue_bond_work(ldev, 0);
2639 }
2640
mlx5_lag_get_slave_port(struct mlx5_core_dev * dev,struct net_device * slave)2641 u8 mlx5_lag_get_slave_port(struct mlx5_core_dev *dev,
2642 struct net_device *slave)
2643 {
2644 struct mlx5_lag *ldev;
2645 unsigned long flags;
2646 struct lag_func *pf;
2647 u8 port = 0;
2648 int i;
2649
2650 spin_lock_irqsave(&lag_lock, flags);
2651 ldev = mlx5_lag_dev(dev);
2652 if (!(ldev && __mlx5_lag_is_roce(ldev)))
2653 goto unlock;
2654
2655 mlx5_ldev_for_each(i, 0, ldev) {
2656 pf = mlx5_lag_pf(ldev, i);
2657 if (pf->netdev == slave) {
2658 port = i;
2659 break;
2660 }
2661 }
2662
2663 port = ldev->v2p_map[port * ldev->buckets];
2664
2665 unlock:
2666 spin_unlock_irqrestore(&lag_lock, flags);
2667 return port;
2668 }
2669 EXPORT_SYMBOL(mlx5_lag_get_slave_port);
2670
mlx5_lag_get_num_ports(struct mlx5_core_dev * dev)2671 u8 mlx5_lag_get_num_ports(struct mlx5_core_dev *dev)
2672 {
2673 struct mlx5_lag *ldev;
2674
2675 ldev = mlx5_lag_dev(dev);
2676 if (!ldev)
2677 return 0;
2678
2679 return ldev->ports;
2680 }
2681 EXPORT_SYMBOL(mlx5_lag_get_num_ports);
2682
mlx5_lag_get_next_peer_mdev(struct mlx5_core_dev * dev,int * i)2683 struct mlx5_core_dev *mlx5_lag_get_next_peer_mdev(struct mlx5_core_dev *dev, int *i)
2684 {
2685 struct mlx5_core_dev *peer_dev = NULL;
2686 struct mlx5_lag *ldev;
2687 unsigned long flags;
2688 struct lag_func *pf;
2689 int idx;
2690
2691 spin_lock_irqsave(&lag_lock, flags);
2692 ldev = mlx5_lag_dev(dev);
2693 if (!ldev)
2694 goto unlock;
2695
2696 if (*i == MLX5_MAX_PORTS)
2697 goto unlock;
2698 mlx5_lag_for_each(idx, *i, ldev, mlx5_lag_get_filter(ldev, dev)) {
2699 pf = mlx5_lag_pf(ldev, idx);
2700 if (pf->dev != dev)
2701 break;
2702 }
2703
2704 if (idx == MLX5_MAX_PORTS) {
2705 *i = idx;
2706 goto unlock;
2707 }
2708 *i = idx + 1;
2709
2710 pf = mlx5_lag_pf(ldev, idx);
2711 peer_dev = pf->dev;
2712
2713 unlock:
2714 spin_unlock_irqrestore(&lag_lock, flags);
2715 return peer_dev;
2716 }
2717 EXPORT_SYMBOL(mlx5_lag_get_next_peer_mdev);
2718
mlx5_lag_query_cong_counters(struct mlx5_core_dev * dev,u64 * values,int num_counters,size_t * offsets)2719 int mlx5_lag_query_cong_counters(struct mlx5_core_dev *dev,
2720 u64 *values,
2721 int num_counters,
2722 size_t *offsets)
2723 {
2724 int outlen = MLX5_ST_SZ_BYTES(query_cong_statistics_out);
2725 struct mlx5_core_dev **mdev;
2726 int ret = 0, i, j, idx = 0;
2727 struct mlx5_lag *ldev;
2728 unsigned long flags;
2729 struct lag_func *pf;
2730 int num_ports;
2731 void *out;
2732
2733 out = kvzalloc(outlen, GFP_KERNEL);
2734 if (!out)
2735 return -ENOMEM;
2736
2737 mdev = kvzalloc(sizeof(mdev[0]) * MLX5_MAX_PORTS, GFP_KERNEL);
2738 if (!mdev) {
2739 ret = -ENOMEM;
2740 goto free_out;
2741 }
2742
2743 memset(values, 0, sizeof(*values) * num_counters);
2744
2745 spin_lock_irqsave(&lag_lock, flags);
2746 ldev = mlx5_lag_dev(dev);
2747 if (ldev && __mlx5_lag_is_active(ldev)) {
2748 num_ports = ldev->ports;
2749 mlx5_ldev_for_each(i, 0, ldev) {
2750 pf = mlx5_lag_pf(ldev, i);
2751 mdev[idx++] = pf->dev;
2752 }
2753 } else {
2754 num_ports = 1;
2755 mdev[MLX5_LAG_P1] = dev;
2756 }
2757 spin_unlock_irqrestore(&lag_lock, flags);
2758
2759 for (i = 0; i < num_ports; ++i) {
2760 u32 in[MLX5_ST_SZ_DW(query_cong_statistics_in)] = {};
2761
2762 MLX5_SET(query_cong_statistics_in, in, opcode,
2763 MLX5_CMD_OP_QUERY_CONG_STATISTICS);
2764 ret = mlx5_cmd_exec_inout(mdev[i], query_cong_statistics, in,
2765 out);
2766 if (ret)
2767 goto free_mdev;
2768
2769 for (j = 0; j < num_counters; ++j)
2770 values[j] += be64_to_cpup((__be64 *)(out + offsets[j]));
2771 }
2772
2773 free_mdev:
2774 kvfree(mdev);
2775 free_out:
2776 kvfree(out);
2777 return ret;
2778 }
2779 EXPORT_SYMBOL(mlx5_lag_query_cong_counters);
2780