1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2016 BayLibre, SAS 4 * Author: Neil Armstrong <narmstrong@baylibre.com> 5 * Copyright (C) 2015 Amlogic, Inc. All rights reserved. 6 */ 7 8 #include <linux/clk.h> 9 #include <linux/component.h> 10 #include <linux/kernel.h> 11 #include <linux/module.h> 12 #include <linux/of.h> 13 #include <linux/of_graph.h> 14 #include <linux/of_platform.h> 15 #include <linux/platform_device.h> 16 #include <linux/regulator/consumer.h> 17 #include <linux/reset.h> 18 19 #include <media/cec-notifier.h> 20 21 #include <drm/drm_atomic_helper.h> 22 #include <drm/drm_bridge.h> 23 #include <drm/drm_bridge_connector.h> 24 #include <drm/drm_device.h> 25 #include <drm/drm_edid.h> 26 #include <drm/drm_probe_helper.h> 27 #include <drm/drm_simple_kms_helper.h> 28 29 #include <linux/media-bus-format.h> 30 #include <linux/videodev2.h> 31 32 #include "meson_drv.h" 33 #include "meson_registers.h" 34 #include "meson_vclk.h" 35 #include "meson_venc.h" 36 #include "meson_encoder_hdmi.h" 37 38 struct meson_encoder_hdmi { 39 struct drm_encoder encoder; 40 struct drm_bridge bridge; 41 struct drm_bridge *next_bridge; 42 struct drm_connector *connector; 43 struct meson_drm *priv; 44 unsigned long output_bus_fmt; 45 struct cec_notifier *cec_notifier; 46 }; 47 48 #define bridge_to_meson_encoder_hdmi(x) \ 49 container_of(x, struct meson_encoder_hdmi, bridge) 50 51 static int meson_encoder_hdmi_attach(struct drm_bridge *bridge, 52 enum drm_bridge_attach_flags flags) 53 { 54 struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge); 55 56 return drm_bridge_attach(bridge->encoder, encoder_hdmi->next_bridge, 57 &encoder_hdmi->bridge, flags); 58 } 59 60 static void meson_encoder_hdmi_detach(struct drm_bridge *bridge) 61 { 62 struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge); 63 64 cec_notifier_conn_unregister(encoder_hdmi->cec_notifier); 65 encoder_hdmi->cec_notifier = NULL; 66 } 67 68 static void meson_encoder_hdmi_set_vclk(struct meson_encoder_hdmi *encoder_hdmi, 69 const struct drm_display_mode *mode) 70 { 71 struct meson_drm *priv = encoder_hdmi->priv; 72 int vic = drm_match_cea_mode(mode); 73 unsigned int phy_freq; 74 unsigned int vclk_freq; 75 unsigned int venc_freq; 76 unsigned int hdmi_freq; 77 78 vclk_freq = mode->clock; 79 80 /* For 420, pixel clock is half unlike venc clock */ 81 if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24) 82 vclk_freq /= 2; 83 84 /* TMDS clock is pixel_clock * 10 */ 85 phy_freq = vclk_freq * 10; 86 87 if (!vic) { 88 meson_vclk_setup(priv, MESON_VCLK_TARGET_DMT, phy_freq, 89 vclk_freq, vclk_freq, vclk_freq, false); 90 return; 91 } 92 93 /* 480i/576i needs global pixel doubling */ 94 if (mode->flags & DRM_MODE_FLAG_DBLCLK) 95 vclk_freq *= 2; 96 97 venc_freq = vclk_freq; 98 hdmi_freq = vclk_freq; 99 100 /* VENC double pixels for 1080i, 720p and YUV420 modes */ 101 if (meson_venc_hdmi_venc_repeat(vic) || 102 encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24) 103 venc_freq *= 2; 104 105 vclk_freq = max(venc_freq, hdmi_freq); 106 107 if (mode->flags & DRM_MODE_FLAG_DBLCLK) 108 venc_freq /= 2; 109 110 dev_dbg(priv->dev, "vclk:%d phy=%d venc=%d hdmi=%d enci=%d\n", 111 phy_freq, vclk_freq, venc_freq, hdmi_freq, 112 priv->venc.hdmi_use_enci); 113 114 meson_vclk_setup(priv, MESON_VCLK_TARGET_HDMI, phy_freq, vclk_freq, 115 venc_freq, hdmi_freq, priv->venc.hdmi_use_enci); 116 } 117 118 static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bridge, 119 const struct drm_display_info *display_info, 120 const struct drm_display_mode *mode) 121 { 122 struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge); 123 struct meson_drm *priv = encoder_hdmi->priv; 124 bool is_hdmi2_sink = display_info->hdmi.scdc.supported; 125 unsigned int phy_freq; 126 unsigned int vclk_freq; 127 unsigned int venc_freq; 128 unsigned int hdmi_freq; 129 int vic = drm_match_cea_mode(mode); 130 enum drm_mode_status status; 131 132 dev_dbg(priv->dev, "Modeline " DRM_MODE_FMT "\n", DRM_MODE_ARG(mode)); 133 134 /* If sink does not support 540MHz, reject the non-420 HDMI2 modes */ 135 if (display_info->max_tmds_clock && 136 mode->clock > display_info->max_tmds_clock && 137 !drm_mode_is_420_only(display_info, mode) && 138 !drm_mode_is_420_also(display_info, mode)) 139 return MODE_BAD; 140 141 /* Check against non-VIC supported modes */ 142 if (!vic) { 143 status = meson_venc_hdmi_supported_mode(mode); 144 if (status != MODE_OK) 145 return status; 146 147 return meson_vclk_dmt_supported_freq(priv, mode->clock); 148 /* Check against supported VIC modes */ 149 } else if (!meson_venc_hdmi_supported_vic(vic)) 150 return MODE_BAD; 151 152 vclk_freq = mode->clock; 153 154 /* For 420, pixel clock is half unlike venc clock */ 155 if (drm_mode_is_420_only(display_info, mode) || 156 (!is_hdmi2_sink && 157 drm_mode_is_420_also(display_info, mode))) 158 vclk_freq /= 2; 159 160 /* TMDS clock is pixel_clock * 10 */ 161 phy_freq = vclk_freq * 10; 162 163 /* 480i/576i needs global pixel doubling */ 164 if (mode->flags & DRM_MODE_FLAG_DBLCLK) 165 vclk_freq *= 2; 166 167 venc_freq = vclk_freq; 168 hdmi_freq = vclk_freq; 169 170 /* VENC double pixels for 1080i, 720p and YUV420 modes */ 171 if (meson_venc_hdmi_venc_repeat(vic) || 172 drm_mode_is_420_only(display_info, mode) || 173 (!is_hdmi2_sink && 174 drm_mode_is_420_also(display_info, mode))) 175 venc_freq *= 2; 176 177 vclk_freq = max(venc_freq, hdmi_freq); 178 179 if (mode->flags & DRM_MODE_FLAG_DBLCLK) 180 venc_freq /= 2; 181 182 dev_dbg(priv->dev, "%s: vclk:%d phy=%d venc=%d hdmi=%d\n", 183 __func__, phy_freq, vclk_freq, venc_freq, hdmi_freq); 184 185 return meson_vclk_vic_supported_freq(priv, phy_freq, vclk_freq); 186 } 187 188 static void meson_encoder_hdmi_atomic_enable(struct drm_bridge *bridge, 189 struct drm_atomic_state *state) 190 { 191 struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge); 192 unsigned int ycrcb_map = VPU_HDMI_OUTPUT_CBYCR; 193 struct meson_drm *priv = encoder_hdmi->priv; 194 struct drm_connector_state *conn_state; 195 const struct drm_display_mode *mode; 196 struct drm_crtc_state *crtc_state; 197 struct drm_connector *connector; 198 bool yuv420_mode = false; 199 int vic; 200 201 connector = drm_atomic_get_new_connector_for_encoder(state, bridge->encoder); 202 if (WARN_ON(!connector)) 203 return; 204 205 conn_state = drm_atomic_get_new_connector_state(state, connector); 206 if (WARN_ON(!conn_state)) 207 return; 208 209 crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc); 210 if (WARN_ON(!crtc_state)) 211 return; 212 213 mode = &crtc_state->adjusted_mode; 214 215 vic = drm_match_cea_mode(mode); 216 217 dev_dbg(priv->dev, "\"%s\" vic %d\n", mode->name, vic); 218 219 if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24) { 220 ycrcb_map = VPU_HDMI_OUTPUT_CRYCB; 221 yuv420_mode = true; 222 } else if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYVY8_1X16) 223 ycrcb_map = VPU_HDMI_OUTPUT_CRYCB; 224 225 /* VENC + VENC-DVI Mode setup */ 226 meson_venc_hdmi_mode_set(priv, vic, ycrcb_map, yuv420_mode, mode); 227 228 /* VCLK Set clock */ 229 meson_encoder_hdmi_set_vclk(encoder_hdmi, mode); 230 231 if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24) 232 /* Setup YUV420 to HDMI-TX, no 10bit diphering */ 233 writel_relaxed(2 | (2 << 2), 234 priv->io_base + _REG(VPU_HDMI_FMT_CTRL)); 235 else if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYVY8_1X16) 236 /* Setup YUV422 to HDMI-TX, no 10bit diphering */ 237 writel_relaxed(1 | (2 << 2), 238 priv->io_base + _REG(VPU_HDMI_FMT_CTRL)); 239 else 240 /* Setup YUV444 to HDMI-TX, no 10bit diphering */ 241 writel_relaxed(0, priv->io_base + _REG(VPU_HDMI_FMT_CTRL)); 242 243 dev_dbg(priv->dev, "%s\n", priv->venc.hdmi_use_enci ? "VENCI" : "VENCP"); 244 245 if (priv->venc.hdmi_use_enci) 246 writel_relaxed(1, priv->io_base + _REG(ENCI_VIDEO_EN)); 247 else 248 writel_relaxed(1, priv->io_base + _REG(ENCP_VIDEO_EN)); 249 } 250 251 static void meson_encoder_hdmi_atomic_disable(struct drm_bridge *bridge, 252 struct drm_atomic_state *state) 253 { 254 struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge); 255 struct meson_drm *priv = encoder_hdmi->priv; 256 257 writel_bits_relaxed(0x3, 0, 258 priv->io_base + _REG(VPU_HDMI_SETTING)); 259 260 writel_relaxed(0, priv->io_base + _REG(ENCI_VIDEO_EN)); 261 writel_relaxed(0, priv->io_base + _REG(ENCP_VIDEO_EN)); 262 } 263 264 static const u32 meson_encoder_hdmi_out_bus_fmts[] = { 265 MEDIA_BUS_FMT_YUV8_1X24, 266 MEDIA_BUS_FMT_UYVY8_1X16, 267 MEDIA_BUS_FMT_UYYVYY8_0_5X24, 268 }; 269 270 static u32 * 271 meson_encoder_hdmi_get_inp_bus_fmts(struct drm_bridge *bridge, 272 struct drm_bridge_state *bridge_state, 273 struct drm_crtc_state *crtc_state, 274 struct drm_connector_state *conn_state, 275 u32 output_fmt, 276 unsigned int *num_input_fmts) 277 { 278 u32 *input_fmts = NULL; 279 int i; 280 281 *num_input_fmts = 0; 282 283 for (i = 0 ; i < ARRAY_SIZE(meson_encoder_hdmi_out_bus_fmts) ; ++i) { 284 if (output_fmt == meson_encoder_hdmi_out_bus_fmts[i]) { 285 *num_input_fmts = 1; 286 input_fmts = kcalloc(*num_input_fmts, 287 sizeof(*input_fmts), 288 GFP_KERNEL); 289 if (!input_fmts) 290 return NULL; 291 292 input_fmts[0] = output_fmt; 293 294 break; 295 } 296 } 297 298 return input_fmts; 299 } 300 301 static int meson_encoder_hdmi_atomic_check(struct drm_bridge *bridge, 302 struct drm_bridge_state *bridge_state, 303 struct drm_crtc_state *crtc_state, 304 struct drm_connector_state *conn_state) 305 { 306 struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge); 307 struct drm_connector_state *old_conn_state = 308 drm_atomic_get_old_connector_state(conn_state->state, conn_state->connector); 309 struct meson_drm *priv = encoder_hdmi->priv; 310 311 encoder_hdmi->output_bus_fmt = bridge_state->output_bus_cfg.format; 312 313 dev_dbg(priv->dev, "output_bus_fmt %lx\n", encoder_hdmi->output_bus_fmt); 314 315 if (!drm_connector_atomic_hdr_metadata_equal(old_conn_state, conn_state)) 316 crtc_state->mode_changed = true; 317 318 return 0; 319 } 320 321 static void meson_encoder_hdmi_hpd_notify(struct drm_bridge *bridge, 322 enum drm_connector_status status) 323 { 324 struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge); 325 326 if (!encoder_hdmi->cec_notifier) 327 return; 328 329 if (status == connector_status_connected) { 330 const struct drm_edid *drm_edid; 331 const struct edid *edid; 332 333 drm_edid = drm_bridge_edid_read(encoder_hdmi->next_bridge, 334 encoder_hdmi->connector); 335 if (!drm_edid) 336 return; 337 338 /* 339 * FIXME: The CEC physical address should be set using 340 * cec_notifier_set_phys_addr(encoder_hdmi->cec_notifier, 341 * connector->display_info.source_physical_address) from a path 342 * that has read the EDID and called 343 * drm_edid_connector_update(). 344 */ 345 edid = drm_edid_raw(drm_edid); 346 347 cec_notifier_set_phys_addr_from_edid(encoder_hdmi->cec_notifier, edid); 348 349 drm_edid_free(drm_edid); 350 } else 351 cec_notifier_phys_addr_invalidate(encoder_hdmi->cec_notifier); 352 } 353 354 static const struct drm_bridge_funcs meson_encoder_hdmi_bridge_funcs = { 355 .attach = meson_encoder_hdmi_attach, 356 .detach = meson_encoder_hdmi_detach, 357 .mode_valid = meson_encoder_hdmi_mode_valid, 358 .hpd_notify = meson_encoder_hdmi_hpd_notify, 359 .atomic_enable = meson_encoder_hdmi_atomic_enable, 360 .atomic_disable = meson_encoder_hdmi_atomic_disable, 361 .atomic_get_input_bus_fmts = meson_encoder_hdmi_get_inp_bus_fmts, 362 .atomic_check = meson_encoder_hdmi_atomic_check, 363 .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state, 364 .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state, 365 .atomic_reset = drm_atomic_helper_bridge_reset, 366 }; 367 368 int meson_encoder_hdmi_probe(struct meson_drm *priv) 369 { 370 struct meson_encoder_hdmi *meson_encoder_hdmi; 371 struct platform_device *pdev; 372 struct device_node *remote; 373 int ret; 374 375 meson_encoder_hdmi = devm_kzalloc(priv->dev, sizeof(*meson_encoder_hdmi), GFP_KERNEL); 376 if (!meson_encoder_hdmi) 377 return -ENOMEM; 378 379 /* HDMI Transceiver Bridge */ 380 remote = of_graph_get_remote_node(priv->dev->of_node, 1, 0); 381 if (!remote) { 382 dev_err(priv->dev, "HDMI transceiver device is disabled"); 383 return 0; 384 } 385 386 meson_encoder_hdmi->next_bridge = of_drm_find_bridge(remote); 387 if (!meson_encoder_hdmi->next_bridge) { 388 ret = dev_err_probe(priv->dev, -EPROBE_DEFER, 389 "Failed to find HDMI transceiver bridge\n"); 390 goto err_put_node; 391 } 392 393 /* HDMI Encoder Bridge */ 394 meson_encoder_hdmi->bridge.funcs = &meson_encoder_hdmi_bridge_funcs; 395 meson_encoder_hdmi->bridge.of_node = priv->dev->of_node; 396 meson_encoder_hdmi->bridge.type = DRM_MODE_CONNECTOR_HDMIA; 397 meson_encoder_hdmi->bridge.interlace_allowed = true; 398 399 drm_bridge_add(&meson_encoder_hdmi->bridge); 400 401 meson_encoder_hdmi->priv = priv; 402 403 /* Encoder */ 404 ret = drm_simple_encoder_init(priv->drm, &meson_encoder_hdmi->encoder, 405 DRM_MODE_ENCODER_TMDS); 406 if (ret) { 407 dev_err_probe(priv->dev, ret, "Failed to init HDMI encoder\n"); 408 goto err_put_node; 409 } 410 411 meson_encoder_hdmi->encoder.possible_crtcs = BIT(0); 412 413 /* Attach HDMI Encoder Bridge to Encoder */ 414 ret = drm_bridge_attach(&meson_encoder_hdmi->encoder, &meson_encoder_hdmi->bridge, NULL, 415 DRM_BRIDGE_ATTACH_NO_CONNECTOR); 416 if (ret) { 417 dev_err_probe(priv->dev, ret, "Failed to attach bridge\n"); 418 goto err_put_node; 419 } 420 421 /* Initialize & attach Bridge Connector */ 422 meson_encoder_hdmi->connector = drm_bridge_connector_init(priv->drm, 423 &meson_encoder_hdmi->encoder); 424 if (IS_ERR(meson_encoder_hdmi->connector)) { 425 ret = dev_err_probe(priv->dev, 426 PTR_ERR(meson_encoder_hdmi->connector), 427 "Unable to create HDMI bridge connector\n"); 428 goto err_put_node; 429 } 430 drm_connector_attach_encoder(meson_encoder_hdmi->connector, 431 &meson_encoder_hdmi->encoder); 432 433 /* 434 * We should have now in place: 435 * encoder->[hdmi encoder bridge]->[dw-hdmi bridge]->[display connector bridge]->[display connector] 436 */ 437 438 /* 439 * drm_connector_attach_max_bpc_property() requires the 440 * connector to have a state. 441 */ 442 drm_atomic_helper_connector_reset(meson_encoder_hdmi->connector); 443 444 if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXL) || 445 meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXM) || 446 meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A)) 447 drm_connector_attach_hdr_output_metadata_property(meson_encoder_hdmi->connector); 448 449 drm_connector_attach_max_bpc_property(meson_encoder_hdmi->connector, 8, 8); 450 451 /* Handle this here until handled by drm_bridge_connector_init() */ 452 meson_encoder_hdmi->connector->ycbcr_420_allowed = true; 453 454 pdev = of_find_device_by_node(remote); 455 of_node_put(remote); 456 if (pdev) { 457 struct cec_connector_info conn_info; 458 struct cec_notifier *notifier; 459 460 cec_fill_conn_info_from_drm(&conn_info, meson_encoder_hdmi->connector); 461 462 notifier = cec_notifier_conn_register(&pdev->dev, NULL, &conn_info); 463 if (!notifier) { 464 put_device(&pdev->dev); 465 return -ENOMEM; 466 } 467 468 meson_encoder_hdmi->cec_notifier = notifier; 469 } 470 471 priv->encoders[MESON_ENC_HDMI] = meson_encoder_hdmi; 472 473 dev_dbg(priv->dev, "HDMI encoder initialized\n"); 474 475 return 0; 476 477 err_put_node: 478 of_node_put(remote); 479 return ret; 480 } 481 482 void meson_encoder_hdmi_remove(struct meson_drm *priv) 483 { 484 struct meson_encoder_hdmi *meson_encoder_hdmi; 485 486 if (priv->encoders[MESON_ENC_HDMI]) { 487 meson_encoder_hdmi = priv->encoders[MESON_ENC_HDMI]; 488 drm_bridge_remove(&meson_encoder_hdmi->bridge); 489 } 490 } 491