xref: /linux/drivers/accel/amdxdna/aie2_msg_priv.h (revision 2c1ed907520c50326b8f604907a8478b27881a2e)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright (C) 2022-2024, Advanced Micro Devices, Inc.
4  */
5 
6 #ifndef _AIE2_MSG_PRIV_H_
7 #define _AIE2_MSG_PRIV_H_
8 
9 enum aie2_msg_opcode {
10 	MSG_OP_CREATE_CONTEXT              = 0x2,
11 	MSG_OP_DESTROY_CONTEXT             = 0x3,
12 	MSG_OP_SYNC_BO			   = 0x7,
13 	MSG_OP_EXECUTE_BUFFER_CF           = 0xC,
14 	MSG_OP_QUERY_COL_STATUS            = 0xD,
15 	MSG_OP_QUERY_AIE_TILE_INFO         = 0xE,
16 	MSG_OP_QUERY_AIE_VERSION           = 0xF,
17 	MSG_OP_EXEC_DPU                    = 0x10,
18 	MSG_OP_CONFIG_CU                   = 0x11,
19 	MSG_OP_CHAIN_EXEC_BUFFER_CF        = 0x12,
20 	MSG_OP_CHAIN_EXEC_DPU              = 0x13,
21 	MSG_OP_MAX_XRT_OPCODE,
22 	MSG_OP_SUSPEND                     = 0x101,
23 	MSG_OP_RESUME                      = 0x102,
24 	MSG_OP_ASSIGN_MGMT_PASID           = 0x103,
25 	MSG_OP_INVOKE_SELF_TEST            = 0x104,
26 	MSG_OP_MAP_HOST_BUFFER             = 0x106,
27 	MSG_OP_GET_FIRMWARE_VERSION        = 0x108,
28 	MSG_OP_SET_RUNTIME_CONFIG          = 0x10A,
29 	MSG_OP_GET_RUNTIME_CONFIG          = 0x10B,
30 	MSG_OP_REGISTER_ASYNC_EVENT_MSG    = 0x10C,
31 	MSG_OP_MAX_DRV_OPCODE,
32 	MSG_OP_GET_PROTOCOL_VERSION        = 0x301,
33 	MSG_OP_MAX_OPCODE
34 };
35 
36 enum aie2_msg_status {
37 	AIE2_STATUS_SUCCESS				= 0x0,
38 	/* AIE Error codes */
39 	AIE2_STATUS_AIE_SATURATION_ERROR		= 0x1000001,
40 	AIE2_STATUS_AIE_FP_ERROR			= 0x1000002,
41 	AIE2_STATUS_AIE_STREAM_ERROR			= 0x1000003,
42 	AIE2_STATUS_AIE_ACCESS_ERROR			= 0x1000004,
43 	AIE2_STATUS_AIE_BUS_ERROR			= 0x1000005,
44 	AIE2_STATUS_AIE_INSTRUCTION_ERROR		= 0x1000006,
45 	AIE2_STATUS_AIE_ECC_ERROR			= 0x1000007,
46 	AIE2_STATUS_AIE_LOCK_ERROR			= 0x1000008,
47 	AIE2_STATUS_AIE_DMA_ERROR			= 0x1000009,
48 	AIE2_STATUS_AIE_MEM_PARITY_ERROR		= 0x100000a,
49 	AIE2_STATUS_AIE_PWR_CFG_ERROR			= 0x100000b,
50 	AIE2_STATUS_AIE_BACKTRACK_ERROR			= 0x100000c,
51 	AIE2_STATUS_MAX_AIE_STATUS_CODE,
52 	/* MGMT ERT Error codes */
53 	AIE2_STATUS_MGMT_ERT_SELF_TEST_FAILURE		= 0x2000001,
54 	AIE2_STATUS_MGMT_ERT_HASH_MISMATCH,
55 	AIE2_STATUS_MGMT_ERT_NOAVAIL,
56 	AIE2_STATUS_MGMT_ERT_INVALID_PARAM,
57 	AIE2_STATUS_MGMT_ERT_ENTER_SUSPEND_FAILURE,
58 	AIE2_STATUS_MGMT_ERT_BUSY,
59 	AIE2_STATUS_MGMT_ERT_APPLICATION_ACTIVE,
60 	MAX_MGMT_ERT_STATUS_CODE,
61 	/* APP ERT Error codes */
62 	AIE2_STATUS_APP_ERT_FIRST_ERROR			= 0x3000001,
63 	AIE2_STATUS_APP_INVALID_INSTR,
64 	AIE2_STATUS_APP_LOAD_PDI_FAIL,
65 	MAX_APP_ERT_STATUS_CODE,
66 	/* NPU RTOS Error Codes */
67 	AIE2_STATUS_INVALID_INPUT_BUFFER		= 0x4000001,
68 	AIE2_STATUS_INVALID_COMMAND,
69 	AIE2_STATUS_INVALID_PARAM,
70 	AIE2_STATUS_INVALID_OPERATION			= 0x4000006,
71 	AIE2_STATUS_ASYNC_EVENT_MSGS_FULL,
72 	AIE2_STATUS_MAX_RTOS_STATUS_CODE,
73 	MAX_AIE2_STATUS_CODE
74 };
75 
76 struct assign_mgmt_pasid_req {
77 	__u16	pasid;
78 	__u16	reserved;
79 } __packed;
80 
81 struct assign_mgmt_pasid_resp {
82 	enum aie2_msg_status	status;
83 } __packed;
84 
85 struct map_host_buffer_req {
86 	__u32		context_id;
87 	__u64		buf_addr;
88 	__u64		buf_size;
89 } __packed;
90 
91 struct map_host_buffer_resp {
92 	enum aie2_msg_status	status;
93 } __packed;
94 
95 #define MAX_CQ_PAIRS		2
96 struct cq_info {
97 	__u32 head_addr;
98 	__u32 tail_addr;
99 	__u32 buf_addr;
100 	__u32 buf_size;
101 };
102 
103 struct cq_pair {
104 	struct cq_info x2i_q;
105 	struct cq_info i2x_q;
106 };
107 
108 struct create_ctx_req {
109 	__u32	aie_type;
110 	__u8	start_col;
111 	__u8	num_col;
112 	__u16	reserved;
113 	__u8	num_cq_pairs_requested;
114 	__u8	reserved1;
115 	__u16	pasid;
116 	__u32	pad[2];
117 	__u32	sec_comm_target_type;
118 	__u32	context_priority;
119 } __packed;
120 
121 struct create_ctx_resp {
122 	enum aie2_msg_status	status;
123 	__u32			context_id;
124 	__u16			msix_id;
125 	__u8			num_cq_pairs_allocated;
126 	__u8			reserved;
127 	struct cq_pair		cq_pair[MAX_CQ_PAIRS];
128 } __packed;
129 
130 struct destroy_ctx_req {
131 	__u32	context_id;
132 } __packed;
133 
134 struct destroy_ctx_resp {
135 	enum aie2_msg_status	status;
136 } __packed;
137 
138 struct execute_buffer_req {
139 	__u32	cu_idx;
140 	__u32	payload[19];
141 } __packed;
142 
143 struct exec_dpu_req {
144 	__u64	inst_buf_addr;
145 	__u32	inst_size;
146 	__u32	inst_prop_cnt;
147 	__u32	cu_idx;
148 	__u32	payload[35];
149 } __packed;
150 
151 struct execute_buffer_resp {
152 	enum aie2_msg_status	status;
153 } __packed;
154 
155 struct aie_tile_info {
156 	__u32		size;
157 	__u16		major;
158 	__u16		minor;
159 	__u16		cols;
160 	__u16		rows;
161 	__u16		core_rows;
162 	__u16		mem_rows;
163 	__u16		shim_rows;
164 	__u16		core_row_start;
165 	__u16		mem_row_start;
166 	__u16		shim_row_start;
167 	__u16		core_dma_channels;
168 	__u16		mem_dma_channels;
169 	__u16		shim_dma_channels;
170 	__u16		core_locks;
171 	__u16		mem_locks;
172 	__u16		shim_locks;
173 	__u16		core_events;
174 	__u16		mem_events;
175 	__u16		shim_events;
176 	__u16		reserved;
177 };
178 
179 struct aie_tile_info_req {
180 	__u32	reserved;
181 } __packed;
182 
183 struct aie_tile_info_resp {
184 	enum aie2_msg_status	status;
185 	struct aie_tile_info	info;
186 } __packed;
187 
188 struct aie_version_info_req {
189 	__u32		reserved;
190 } __packed;
191 
192 struct aie_version_info_resp {
193 	enum aie2_msg_status	status;
194 	__u16			major;
195 	__u16			minor;
196 } __packed;
197 
198 struct aie_column_info_req {
199 	__u64 dump_buff_addr;
200 	__u32 dump_buff_size;
201 	__u32 num_cols;
202 	__u32 aie_bitmap;
203 } __packed;
204 
205 struct aie_column_info_resp {
206 	enum aie2_msg_status	status;
207 	__u32 size;
208 } __packed;
209 
210 struct suspend_req {
211 	__u32		place_holder;
212 } __packed;
213 
214 struct suspend_resp {
215 	enum aie2_msg_status	status;
216 } __packed;
217 
218 struct resume_req {
219 	__u32		place_holder;
220 } __packed;
221 
222 struct resume_resp {
223 	enum aie2_msg_status	status;
224 } __packed;
225 
226 struct check_header_hash_req {
227 	__u64		hash_high;
228 	__u64		hash_low;
229 } __packed;
230 
231 struct check_header_hash_resp {
232 	enum aie2_msg_status	status;
233 } __packed;
234 
235 struct query_error_req {
236 	__u64		buf_addr;
237 	__u32		buf_size;
238 	__u32		next_row;
239 	__u32		next_column;
240 	__u32		next_module;
241 } __packed;
242 
243 struct query_error_resp {
244 	enum aie2_msg_status	status;
245 	__u32			num_err;
246 	__u32			has_next_err;
247 	__u32			next_row;
248 	__u32			next_column;
249 	__u32			next_module;
250 } __packed;
251 
252 struct protocol_version_req {
253 	__u32		reserved;
254 } __packed;
255 
256 struct protocol_version_resp {
257 	enum aie2_msg_status	status;
258 	__u32			major;
259 	__u32			minor;
260 } __packed;
261 
262 struct firmware_version_req {
263 	__u32		reserved;
264 } __packed;
265 
266 struct firmware_version_resp {
267 	enum aie2_msg_status	status;
268 	__u32			major;
269 	__u32			minor;
270 	__u32			sub;
271 	__u32			build;
272 } __packed;
273 
274 #define MAX_NUM_CUS			32
275 #define AIE2_MSG_CFG_CU_PDI_ADDR	GENMASK(16, 0)
276 #define AIE2_MSG_CFG_CU_FUNC		GENMASK(24, 17)
277 struct config_cu_req {
278 	__u32	num_cus;
279 	__u32	cfgs[MAX_NUM_CUS];
280 } __packed;
281 
282 struct config_cu_resp {
283 	enum aie2_msg_status	status;
284 } __packed;
285 
286 struct set_runtime_cfg_req {
287 	__u32	type;
288 	__u64	value;
289 } __packed;
290 
291 struct set_runtime_cfg_resp {
292 	enum aie2_msg_status	status;
293 } __packed;
294 
295 struct get_runtime_cfg_req {
296 	__u32	type;
297 } __packed;
298 
299 struct get_runtime_cfg_resp {
300 	enum aie2_msg_status	status;
301 	__u64			value;
302 } __packed;
303 
304 enum async_event_type {
305 	ASYNC_EVENT_TYPE_AIE_ERROR,
306 	ASYNC_EVENT_TYPE_EXCEPTION,
307 	MAX_ASYNC_EVENT_TYPE
308 };
309 
310 #define ASYNC_BUF_SIZE SZ_8K
311 struct async_event_msg_req {
312 	__u64 buf_addr;
313 	__u32 buf_size;
314 } __packed;
315 
316 struct async_event_msg_resp {
317 	enum aie2_msg_status	status;
318 	enum async_event_type	type;
319 } __packed;
320 
321 #define MAX_CHAIN_CMDBUF_SIZE SZ_4K
322 #define slot_cf_has_space(offset, payload_size) \
323 	(MAX_CHAIN_CMDBUF_SIZE - ((offset) + (payload_size)) > \
324 	 offsetof(struct cmd_chain_slot_execbuf_cf, args[0]))
325 struct cmd_chain_slot_execbuf_cf {
326 	__u32 cu_idx;
327 	__u32 arg_cnt;
328 	__u32 args[] __counted_by(arg_cnt);
329 };
330 
331 #define slot_dpu_has_space(offset, payload_size) \
332 	(MAX_CHAIN_CMDBUF_SIZE - ((offset) + (payload_size)) > \
333 	 offsetof(struct cmd_chain_slot_dpu, args[0]))
334 struct cmd_chain_slot_dpu {
335 	__u64 inst_buf_addr;
336 	__u32 inst_size;
337 	__u32 inst_prop_cnt;
338 	__u32 cu_idx;
339 	__u32 arg_cnt;
340 #define MAX_DPU_ARGS_SIZE (34 * sizeof(__u32))
341 	__u32 args[] __counted_by(arg_cnt);
342 };
343 
344 struct cmd_chain_req {
345 	__u64 buf_addr;
346 	__u32 buf_size;
347 	__u32 count;
348 } __packed;
349 
350 struct cmd_chain_resp {
351 	enum aie2_msg_status	status;
352 	__u32			fail_cmd_idx;
353 	enum aie2_msg_status	fail_cmd_status;
354 } __packed;
355 
356 #define AIE2_MSG_SYNC_BO_SRC_TYPE	GENMASK(3, 0)
357 #define AIE2_MSG_SYNC_BO_DST_TYPE	GENMASK(7, 4)
358 struct sync_bo_req {
359 	__u64 src_addr;
360 	__u64 dst_addr;
361 	__u32 size;
362 #define SYNC_BO_DEV_MEM  0
363 #define SYNC_BO_HOST_MEM 2
364 	__u32 type;
365 } __packed;
366 
367 struct sync_bo_resp {
368 	enum aie2_msg_status	status;
369 } __packed;
370 #endif /* _AIE2_MSG_PRIV_H_ */
371