1 /*
2 * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33 #include <linux/etherdevice.h>
34 #include <linux/debugfs.h>
35 #include <linux/mlx5/driver.h>
36 #include <linux/mlx5/mlx5_ifc.h>
37 #include <linux/mlx5/vport.h>
38 #include <linux/mlx5/fs.h>
39 #include <linux/mlx5/mpfs.h>
40 #include "esw/acl/lgcy.h"
41 #include "esw/legacy.h"
42 #include "esw/qos.h"
43 #include "mlx5_core.h"
44 #include "lib/eq.h"
45 #include "lag/lag.h"
46 #include "eswitch.h"
47 #include "fs_core.h"
48 #include "devlink.h"
49 #include "ecpf.h"
50 #include "en/mod_hdr.h"
51 #include "en_accel/ipsec.h"
52
53 enum {
54 MLX5_ACTION_NONE = 0,
55 MLX5_ACTION_ADD = 1,
56 MLX5_ACTION_DEL = 2,
57 };
58
59 /* Vport UC/MC hash node */
60 struct vport_addr {
61 struct l2addr_node node;
62 u8 action;
63 u16 vport;
64 struct mlx5_flow_handle *flow_rule;
65 bool mpfs; /* UC MAC was added to MPFs */
66 /* A flag indicating that mac was added due to mc promiscuous vport */
67 bool mc_promisc;
68 };
69
mlx5_eswitch_check(const struct mlx5_core_dev * dev)70 static int mlx5_eswitch_check(const struct mlx5_core_dev *dev)
71 {
72 if (MLX5_CAP_GEN(dev, port_type) != MLX5_CAP_PORT_TYPE_ETH)
73 return -EOPNOTSUPP;
74
75 if (!MLX5_ESWITCH_MANAGER(dev))
76 return -EOPNOTSUPP;
77
78 return 0;
79 }
80
__mlx5_devlink_eswitch_get(struct devlink * devlink,bool check)81 static struct mlx5_eswitch *__mlx5_devlink_eswitch_get(struct devlink *devlink, bool check)
82 {
83 struct mlx5_core_dev *dev = devlink_priv(devlink);
84 int err;
85
86 if (check) {
87 err = mlx5_eswitch_check(dev);
88 if (err)
89 return ERR_PTR(err);
90 }
91
92 return dev->priv.eswitch;
93 }
94
95 struct mlx5_eswitch *__must_check
mlx5_devlink_eswitch_get(struct devlink * devlink)96 mlx5_devlink_eswitch_get(struct devlink *devlink)
97 {
98 return __mlx5_devlink_eswitch_get(devlink, true);
99 }
100
mlx5_devlink_eswitch_nocheck_get(struct devlink * devlink)101 struct mlx5_eswitch *mlx5_devlink_eswitch_nocheck_get(struct devlink *devlink)
102 {
103 return __mlx5_devlink_eswitch_get(devlink, false);
104 }
105
106 struct mlx5_vport *__must_check
mlx5_eswitch_get_vport(struct mlx5_eswitch * esw,u16 vport_num)107 mlx5_eswitch_get_vport(struct mlx5_eswitch *esw, u16 vport_num)
108 {
109 struct mlx5_vport *vport;
110
111 if (!esw)
112 return ERR_PTR(-EPERM);
113
114 vport = xa_load(&esw->vports, vport_num);
115 if (!vport) {
116 esw_debug(esw->dev, "vport out of range: num(0x%x)\n", vport_num);
117 return ERR_PTR(-EINVAL);
118 }
119 return vport;
120 }
121
arm_vport_context_events_cmd(struct mlx5_core_dev * dev,u16 vport,u32 events_mask)122 static int arm_vport_context_events_cmd(struct mlx5_core_dev *dev, u16 vport,
123 u32 events_mask)
124 {
125 u32 in[MLX5_ST_SZ_DW(modify_nic_vport_context_in)] = {};
126 void *nic_vport_ctx;
127
128 MLX5_SET(modify_nic_vport_context_in, in,
129 opcode, MLX5_CMD_OP_MODIFY_NIC_VPORT_CONTEXT);
130 MLX5_SET(modify_nic_vport_context_in, in, field_select.change_event, 1);
131 MLX5_SET(modify_nic_vport_context_in, in, vport_number, vport);
132 if (vport || mlx5_core_is_ecpf(dev))
133 MLX5_SET(modify_nic_vport_context_in, in, other_vport, 1);
134 nic_vport_ctx = MLX5_ADDR_OF(modify_nic_vport_context_in,
135 in, nic_vport_context);
136
137 MLX5_SET(nic_vport_context, nic_vport_ctx, arm_change_event, 1);
138
139 if (events_mask & MLX5_VPORT_UC_ADDR_CHANGE)
140 MLX5_SET(nic_vport_context, nic_vport_ctx,
141 event_on_uc_address_change, 1);
142 if (events_mask & MLX5_VPORT_MC_ADDR_CHANGE)
143 MLX5_SET(nic_vport_context, nic_vport_ctx,
144 event_on_mc_address_change, 1);
145 if (events_mask & MLX5_VPORT_PROMISC_CHANGE)
146 MLX5_SET(nic_vport_context, nic_vport_ctx,
147 event_on_promisc_change, 1);
148
149 return mlx5_cmd_exec_in(dev, modify_nic_vport_context, in);
150 }
151
152 /* E-Switch vport context HW commands */
mlx5_eswitch_modify_esw_vport_context(struct mlx5_core_dev * dev,u16 vport,bool other_vport,void * in)153 int mlx5_eswitch_modify_esw_vport_context(struct mlx5_core_dev *dev, u16 vport,
154 bool other_vport, void *in)
155 {
156 MLX5_SET(modify_esw_vport_context_in, in, opcode,
157 MLX5_CMD_OP_MODIFY_ESW_VPORT_CONTEXT);
158 MLX5_SET(modify_esw_vport_context_in, in, vport_number, vport);
159 MLX5_SET(modify_esw_vport_context_in, in, other_vport, other_vport);
160 return mlx5_cmd_exec_in(dev, modify_esw_vport_context, in);
161 }
162
modify_esw_vport_cvlan(struct mlx5_core_dev * dev,u16 vport,u16 vlan,u8 qos,u8 set_flags)163 static int modify_esw_vport_cvlan(struct mlx5_core_dev *dev, u16 vport,
164 u16 vlan, u8 qos, u8 set_flags)
165 {
166 u32 in[MLX5_ST_SZ_DW(modify_esw_vport_context_in)] = {};
167
168 if (!MLX5_CAP_ESW(dev, vport_cvlan_strip) ||
169 !MLX5_CAP_ESW(dev, vport_cvlan_insert_if_not_exist))
170 return -EOPNOTSUPP;
171
172 esw_debug(dev, "Set Vport[%d] VLAN %d qos %d set=%x\n",
173 vport, vlan, qos, set_flags);
174
175 if (set_flags & SET_VLAN_STRIP)
176 MLX5_SET(modify_esw_vport_context_in, in,
177 esw_vport_context.vport_cvlan_strip, 1);
178
179 if (set_flags & SET_VLAN_INSERT) {
180 if (MLX5_CAP_ESW(dev, vport_cvlan_insert_always)) {
181 /* insert either if vlan exist in packet or not */
182 MLX5_SET(modify_esw_vport_context_in, in,
183 esw_vport_context.vport_cvlan_insert,
184 MLX5_VPORT_CVLAN_INSERT_ALWAYS);
185 } else {
186 /* insert only if no vlan in packet */
187 MLX5_SET(modify_esw_vport_context_in, in,
188 esw_vport_context.vport_cvlan_insert,
189 MLX5_VPORT_CVLAN_INSERT_WHEN_NO_CVLAN);
190 }
191 MLX5_SET(modify_esw_vport_context_in, in,
192 esw_vport_context.cvlan_pcp, qos);
193 MLX5_SET(modify_esw_vport_context_in, in,
194 esw_vport_context.cvlan_id, vlan);
195 }
196
197 MLX5_SET(modify_esw_vport_context_in, in,
198 field_select.vport_cvlan_strip, 1);
199 MLX5_SET(modify_esw_vport_context_in, in,
200 field_select.vport_cvlan_insert, 1);
201
202 return mlx5_eswitch_modify_esw_vport_context(dev, vport, true, in);
203 }
204
205 /* E-Switch FDB */
206 static struct mlx5_flow_handle *
__esw_fdb_set_vport_rule(struct mlx5_eswitch * esw,u16 vport,bool rx_rule,u8 mac_c[ETH_ALEN],u8 mac_v[ETH_ALEN])207 __esw_fdb_set_vport_rule(struct mlx5_eswitch *esw, u16 vport, bool rx_rule,
208 u8 mac_c[ETH_ALEN], u8 mac_v[ETH_ALEN])
209 {
210 int match_header = (is_zero_ether_addr(mac_c) ? 0 :
211 MLX5_MATCH_OUTER_HEADERS);
212 struct mlx5_flow_handle *flow_rule = NULL;
213 struct mlx5_flow_act flow_act = {0};
214 struct mlx5_flow_destination dest = {};
215 struct mlx5_flow_spec *spec;
216 void *mv_misc = NULL;
217 void *mc_misc = NULL;
218 u8 *dmac_v = NULL;
219 u8 *dmac_c = NULL;
220
221 if (rx_rule)
222 match_header |= MLX5_MATCH_MISC_PARAMETERS;
223
224 spec = kvzalloc_obj(*spec);
225 if (!spec)
226 return NULL;
227
228 dmac_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
229 outer_headers.dmac_47_16);
230 dmac_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
231 outer_headers.dmac_47_16);
232
233 if (match_header & MLX5_MATCH_OUTER_HEADERS) {
234 ether_addr_copy(dmac_v, mac_v);
235 ether_addr_copy(dmac_c, mac_c);
236 }
237
238 if (match_header & MLX5_MATCH_MISC_PARAMETERS) {
239 mv_misc = MLX5_ADDR_OF(fte_match_param, spec->match_value,
240 misc_parameters);
241 mc_misc = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
242 misc_parameters);
243 MLX5_SET(fte_match_set_misc, mv_misc, source_port, MLX5_VPORT_UPLINK);
244 MLX5_SET_TO_ONES(fte_match_set_misc, mc_misc, source_port);
245 }
246
247 dest.type = MLX5_FLOW_DESTINATION_TYPE_VPORT;
248 dest.vport.num = vport;
249
250 esw_debug(esw->dev,
251 "\tFDB add rule dmac_v(%pM) dmac_c(%pM) -> vport(%d)\n",
252 dmac_v, dmac_c, vport);
253 spec->match_criteria_enable = match_header;
254 flow_act.action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
255 flow_rule =
256 mlx5_add_flow_rules(esw->fdb_table.legacy.fdb, spec,
257 &flow_act, &dest, 1);
258 if (IS_ERR(flow_rule)) {
259 esw_warn(esw->dev,
260 "FDB: Failed to add flow rule: dmac_v(%pM) dmac_c(%pM) -> vport(%d), err(%pe)\n",
261 dmac_v, dmac_c, vport, flow_rule);
262 flow_rule = NULL;
263 }
264
265 kvfree(spec);
266 return flow_rule;
267 }
268
269 static struct mlx5_flow_handle *
esw_fdb_set_vport_rule(struct mlx5_eswitch * esw,u8 mac[ETH_ALEN],u16 vport)270 esw_fdb_set_vport_rule(struct mlx5_eswitch *esw, u8 mac[ETH_ALEN], u16 vport)
271 {
272 u8 mac_c[ETH_ALEN];
273
274 eth_broadcast_addr(mac_c);
275 return __esw_fdb_set_vport_rule(esw, vport, false, mac_c, mac);
276 }
277
278 static struct mlx5_flow_handle *
esw_fdb_set_vport_allmulti_rule(struct mlx5_eswitch * esw,u16 vport)279 esw_fdb_set_vport_allmulti_rule(struct mlx5_eswitch *esw, u16 vport)
280 {
281 u8 mac_c[ETH_ALEN];
282 u8 mac_v[ETH_ALEN];
283
284 eth_zero_addr(mac_c);
285 eth_zero_addr(mac_v);
286 mac_c[0] = 0x01;
287 mac_v[0] = 0x01;
288 return __esw_fdb_set_vport_rule(esw, vport, false, mac_c, mac_v);
289 }
290
291 static struct mlx5_flow_handle *
esw_fdb_set_vport_promisc_rule(struct mlx5_eswitch * esw,u16 vport)292 esw_fdb_set_vport_promisc_rule(struct mlx5_eswitch *esw, u16 vport)
293 {
294 u8 mac_c[ETH_ALEN];
295 u8 mac_v[ETH_ALEN];
296
297 eth_zero_addr(mac_c);
298 eth_zero_addr(mac_v);
299 return __esw_fdb_set_vport_rule(esw, vport, true, mac_c, mac_v);
300 }
301
302 /* E-Switch vport UC/MC lists management */
303 typedef int (*vport_addr_action)(struct mlx5_eswitch *esw,
304 struct vport_addr *vaddr);
305
esw_add_uc_addr(struct mlx5_eswitch * esw,struct vport_addr * vaddr)306 static int esw_add_uc_addr(struct mlx5_eswitch *esw, struct vport_addr *vaddr)
307 {
308 u8 *mac = vaddr->node.addr;
309 u16 vport = vaddr->vport;
310 int err;
311
312 /* Skip mlx5_mpfs_add_mac for eswitch_managers,
313 * it is already done by its netdev in mlx5e_execute_l2_action
314 */
315 if (mlx5_esw_is_manager_vport(esw, vport))
316 goto fdb_add;
317
318 err = mlx5_mpfs_add_mac(esw->dev, mac);
319 if (err) {
320 esw_warn(esw->dev,
321 "Failed to add L2 table mac(%pM) for vport(0x%x), err(%d)\n",
322 mac, vport, err);
323 return err;
324 }
325 vaddr->mpfs = true;
326
327 fdb_add:
328 /* SRIOV is enabled: Forward UC MAC to vport */
329 if (esw->fdb_table.legacy.fdb && esw->mode == MLX5_ESWITCH_LEGACY) {
330 vaddr->flow_rule = esw_fdb_set_vport_rule(esw, mac, vport);
331
332 esw_debug(esw->dev, "\tADDED UC MAC: vport[%d] %pM fr(%p)\n",
333 vport, mac, vaddr->flow_rule);
334 }
335
336 return 0;
337 }
338
esw_del_uc_addr(struct mlx5_eswitch * esw,struct vport_addr * vaddr)339 static int esw_del_uc_addr(struct mlx5_eswitch *esw, struct vport_addr *vaddr)
340 {
341 u8 *mac = vaddr->node.addr;
342 u16 vport = vaddr->vport;
343 int err = 0;
344
345 /* Skip mlx5_mpfs_del_mac for eswitch managers,
346 * it is already done by its netdev in mlx5e_execute_l2_action
347 */
348 if (!vaddr->mpfs || mlx5_esw_is_manager_vport(esw, vport))
349 goto fdb_del;
350
351 err = mlx5_mpfs_del_mac(esw->dev, mac);
352 if (err)
353 esw_warn(esw->dev,
354 "Failed to del L2 table mac(%pM) for vport(%d), err(%d)\n",
355 mac, vport, err);
356 vaddr->mpfs = false;
357
358 fdb_del:
359 if (vaddr->flow_rule)
360 mlx5_del_flow_rules(vaddr->flow_rule);
361 vaddr->flow_rule = NULL;
362
363 return 0;
364 }
365
update_allmulti_vports(struct mlx5_eswitch * esw,struct vport_addr * vaddr,struct esw_mc_addr * esw_mc)366 static void update_allmulti_vports(struct mlx5_eswitch *esw,
367 struct vport_addr *vaddr,
368 struct esw_mc_addr *esw_mc)
369 {
370 u8 *mac = vaddr->node.addr;
371 struct mlx5_vport *vport;
372 unsigned long i;
373 u16 vport_num;
374
375 mlx5_esw_for_each_vport(esw, i, vport) {
376 struct hlist_head *vport_hash = vport->mc_list;
377 struct vport_addr *iter_vaddr =
378 l2addr_hash_find(vport_hash,
379 mac,
380 struct vport_addr);
381 vport_num = vport->vport;
382 if (IS_ERR_OR_NULL(vport->allmulti_rule) ||
383 vaddr->vport == vport_num)
384 continue;
385 switch (vaddr->action) {
386 case MLX5_ACTION_ADD:
387 if (iter_vaddr)
388 continue;
389 iter_vaddr = l2addr_hash_add(vport_hash, mac,
390 struct vport_addr,
391 GFP_KERNEL);
392 if (!iter_vaddr) {
393 esw_warn(esw->dev,
394 "ALL-MULTI: Failed to add MAC(%pM) to vport[%d] DB\n",
395 mac, vport_num);
396 continue;
397 }
398 iter_vaddr->vport = vport_num;
399 iter_vaddr->flow_rule =
400 esw_fdb_set_vport_rule(esw,
401 mac,
402 vport_num);
403 iter_vaddr->mc_promisc = true;
404 break;
405 case MLX5_ACTION_DEL:
406 if (!iter_vaddr)
407 continue;
408 mlx5_del_flow_rules(iter_vaddr->flow_rule);
409 l2addr_hash_del(iter_vaddr);
410 break;
411 }
412 }
413 }
414
esw_add_mc_addr(struct mlx5_eswitch * esw,struct vport_addr * vaddr)415 static int esw_add_mc_addr(struct mlx5_eswitch *esw, struct vport_addr *vaddr)
416 {
417 struct hlist_head *hash = esw->mc_table;
418 struct esw_mc_addr *esw_mc;
419 u8 *mac = vaddr->node.addr;
420 u16 vport = vaddr->vport;
421
422 if (!esw->fdb_table.legacy.fdb)
423 return 0;
424
425 esw_mc = l2addr_hash_find(hash, mac, struct esw_mc_addr);
426 if (esw_mc)
427 goto add;
428
429 esw_mc = l2addr_hash_add(hash, mac, struct esw_mc_addr, GFP_KERNEL);
430 if (!esw_mc)
431 return -ENOMEM;
432
433 esw_mc->uplink_rule = /* Forward MC MAC to Uplink */
434 esw_fdb_set_vport_rule(esw, mac, MLX5_VPORT_UPLINK);
435
436 /* Add this multicast mac to all the mc promiscuous vports */
437 update_allmulti_vports(esw, vaddr, esw_mc);
438
439 add:
440 /* If the multicast mac is added as a result of mc promiscuous vport,
441 * don't increment the multicast ref count
442 */
443 if (!vaddr->mc_promisc)
444 esw_mc->refcnt++;
445
446 /* Forward MC MAC to vport */
447 vaddr->flow_rule = esw_fdb_set_vport_rule(esw, mac, vport);
448 esw_debug(esw->dev,
449 "\tADDED MC MAC: vport[%d] %pM fr(%p) refcnt(%d) uplinkfr(%p)\n",
450 vport, mac, vaddr->flow_rule,
451 esw_mc->refcnt, esw_mc->uplink_rule);
452 return 0;
453 }
454
esw_del_mc_addr(struct mlx5_eswitch * esw,struct vport_addr * vaddr)455 static int esw_del_mc_addr(struct mlx5_eswitch *esw, struct vport_addr *vaddr)
456 {
457 struct hlist_head *hash = esw->mc_table;
458 struct esw_mc_addr *esw_mc;
459 u8 *mac = vaddr->node.addr;
460 u16 vport = vaddr->vport;
461
462 if (!esw->fdb_table.legacy.fdb)
463 return 0;
464
465 esw_mc = l2addr_hash_find(hash, mac, struct esw_mc_addr);
466 if (!esw_mc) {
467 esw_warn(esw->dev,
468 "Failed to find eswitch MC addr for MAC(%pM) vport(%d)",
469 mac, vport);
470 return -EINVAL;
471 }
472 esw_debug(esw->dev,
473 "\tDELETE MC MAC: vport[%d] %pM fr(%p) refcnt(%d) uplinkfr(%p)\n",
474 vport, mac, vaddr->flow_rule, esw_mc->refcnt,
475 esw_mc->uplink_rule);
476
477 if (vaddr->flow_rule)
478 mlx5_del_flow_rules(vaddr->flow_rule);
479 vaddr->flow_rule = NULL;
480
481 /* If the multicast mac is added as a result of mc promiscuous vport,
482 * don't decrement the multicast ref count.
483 */
484 if (vaddr->mc_promisc || (--esw_mc->refcnt > 0))
485 return 0;
486
487 /* Remove this multicast mac from all the mc promiscuous vports */
488 update_allmulti_vports(esw, vaddr, esw_mc);
489
490 if (esw_mc->uplink_rule)
491 mlx5_del_flow_rules(esw_mc->uplink_rule);
492
493 l2addr_hash_del(esw_mc);
494 return 0;
495 }
496
497 /* Apply vport UC/MC list to HW l2 table and FDB table */
esw_apply_vport_addr_list(struct mlx5_eswitch * esw,struct mlx5_vport * vport,int list_type)498 static void esw_apply_vport_addr_list(struct mlx5_eswitch *esw,
499 struct mlx5_vport *vport, int list_type)
500 {
501 bool is_uc = list_type == MLX5_NVPRT_LIST_TYPE_UC;
502 vport_addr_action vport_addr_add;
503 vport_addr_action vport_addr_del;
504 struct vport_addr *addr;
505 struct l2addr_node *node;
506 struct hlist_head *hash;
507 struct hlist_node *tmp;
508 int hi;
509
510 vport_addr_add = is_uc ? esw_add_uc_addr :
511 esw_add_mc_addr;
512 vport_addr_del = is_uc ? esw_del_uc_addr :
513 esw_del_mc_addr;
514
515 hash = is_uc ? vport->uc_list : vport->mc_list;
516 for_each_l2hash_node(node, tmp, hash, hi) {
517 addr = container_of(node, struct vport_addr, node);
518 switch (addr->action) {
519 case MLX5_ACTION_ADD:
520 vport_addr_add(esw, addr);
521 addr->action = MLX5_ACTION_NONE;
522 break;
523 case MLX5_ACTION_DEL:
524 vport_addr_del(esw, addr);
525 l2addr_hash_del(addr);
526 break;
527 }
528 }
529 }
530
531 /* Sync vport UC/MC list from vport context */
esw_update_vport_addr_list(struct mlx5_eswitch * esw,struct mlx5_vport * vport,int list_type)532 static void esw_update_vport_addr_list(struct mlx5_eswitch *esw,
533 struct mlx5_vport *vport, int list_type)
534 {
535 bool is_uc = list_type == MLX5_NVPRT_LIST_TYPE_UC;
536 u8 (*mac_list)[ETH_ALEN];
537 struct l2addr_node *node;
538 struct vport_addr *addr;
539 struct hlist_head *hash;
540 struct hlist_node *tmp;
541 int size;
542 int err;
543 int hi;
544 int i;
545
546 size = is_uc ? MLX5_MAX_UC_PER_VPORT(esw->dev) :
547 MLX5_MAX_MC_PER_VPORT(esw->dev);
548
549 mac_list = kcalloc(size, ETH_ALEN, GFP_KERNEL);
550 if (!mac_list)
551 return;
552
553 hash = is_uc ? vport->uc_list : vport->mc_list;
554
555 for_each_l2hash_node(node, tmp, hash, hi) {
556 addr = container_of(node, struct vport_addr, node);
557 addr->action = MLX5_ACTION_DEL;
558 }
559
560 if (!vport->enabled)
561 goto out;
562
563 err = mlx5_query_nic_vport_mac_list(esw->dev, vport->vport, list_type,
564 mac_list, &size);
565 if (err)
566 goto out;
567 esw_debug(esw->dev, "vport[%d] context update %s list size (%d)\n",
568 vport->vport, is_uc ? "UC" : "MC", size);
569
570 for (i = 0; i < size; i++) {
571 if (is_uc && !is_valid_ether_addr(mac_list[i]))
572 continue;
573
574 if (!is_uc && !is_multicast_ether_addr(mac_list[i]))
575 continue;
576
577 addr = l2addr_hash_find(hash, mac_list[i], struct vport_addr);
578 if (addr) {
579 addr->action = MLX5_ACTION_NONE;
580 /* If this mac was previously added because of allmulti
581 * promiscuous rx mode, its now converted to be original
582 * vport mac.
583 */
584 if (addr->mc_promisc) {
585 struct esw_mc_addr *esw_mc =
586 l2addr_hash_find(esw->mc_table,
587 mac_list[i],
588 struct esw_mc_addr);
589 if (!esw_mc) {
590 esw_warn(esw->dev,
591 "Failed to MAC(%pM) in mcast DB\n",
592 mac_list[i]);
593 continue;
594 }
595 esw_mc->refcnt++;
596 addr->mc_promisc = false;
597 }
598 continue;
599 }
600
601 addr = l2addr_hash_add(hash, mac_list[i], struct vport_addr,
602 GFP_KERNEL);
603 if (!addr) {
604 esw_warn(esw->dev,
605 "Failed to add MAC(%pM) to vport[%d] DB\n",
606 mac_list[i], vport->vport);
607 continue;
608 }
609 addr->vport = vport->vport;
610 addr->action = MLX5_ACTION_ADD;
611 }
612 out:
613 kfree(mac_list);
614 }
615
616 /* Sync vport UC/MC list from vport context
617 * Must be called after esw_update_vport_addr_list
618 */
esw_update_vport_mc_promisc(struct mlx5_eswitch * esw,struct mlx5_vport * vport)619 static void esw_update_vport_mc_promisc(struct mlx5_eswitch *esw,
620 struct mlx5_vport *vport)
621 {
622 struct l2addr_node *node;
623 struct vport_addr *addr;
624 struct hlist_head *hash;
625 struct hlist_node *tmp;
626 int hi;
627
628 hash = vport->mc_list;
629
630 for_each_l2hash_node(node, tmp, esw->mc_table, hi) {
631 u8 *mac = node->addr;
632
633 addr = l2addr_hash_find(hash, mac, struct vport_addr);
634 if (addr) {
635 if (addr->action == MLX5_ACTION_DEL)
636 addr->action = MLX5_ACTION_NONE;
637 continue;
638 }
639 addr = l2addr_hash_add(hash, mac, struct vport_addr,
640 GFP_KERNEL);
641 if (!addr) {
642 esw_warn(esw->dev,
643 "Failed to add allmulti MAC(%pM) to vport[%d] DB\n",
644 mac, vport->vport);
645 continue;
646 }
647 addr->vport = vport->vport;
648 addr->action = MLX5_ACTION_ADD;
649 addr->mc_promisc = true;
650 }
651 }
652
653 /* Apply vport rx mode to HW FDB table */
esw_apply_vport_rx_mode(struct mlx5_eswitch * esw,struct mlx5_vport * vport,bool promisc,bool mc_promisc)654 static void esw_apply_vport_rx_mode(struct mlx5_eswitch *esw,
655 struct mlx5_vport *vport,
656 bool promisc, bool mc_promisc)
657 {
658 struct esw_mc_addr *allmulti_addr = &esw->mc_promisc;
659
660 if (IS_ERR_OR_NULL(vport->allmulti_rule) != mc_promisc)
661 goto promisc;
662
663 if (mc_promisc) {
664 vport->allmulti_rule =
665 esw_fdb_set_vport_allmulti_rule(esw, vport->vport);
666 if (!allmulti_addr->uplink_rule)
667 allmulti_addr->uplink_rule =
668 esw_fdb_set_vport_allmulti_rule(esw,
669 MLX5_VPORT_UPLINK);
670 allmulti_addr->refcnt++;
671 } else if (vport->allmulti_rule) {
672 mlx5_del_flow_rules(vport->allmulti_rule);
673 vport->allmulti_rule = NULL;
674
675 if (--allmulti_addr->refcnt > 0)
676 goto promisc;
677
678 if (allmulti_addr->uplink_rule)
679 mlx5_del_flow_rules(allmulti_addr->uplink_rule);
680 allmulti_addr->uplink_rule = NULL;
681 }
682
683 promisc:
684 if (IS_ERR_OR_NULL(vport->promisc_rule) != promisc)
685 return;
686
687 if (promisc) {
688 vport->promisc_rule =
689 esw_fdb_set_vport_promisc_rule(esw, vport->vport);
690 } else if (vport->promisc_rule) {
691 mlx5_del_flow_rules(vport->promisc_rule);
692 vport->promisc_rule = NULL;
693 }
694 }
695
696 /* Sync vport rx mode from vport context */
esw_update_vport_rx_mode(struct mlx5_eswitch * esw,struct mlx5_vport * vport)697 static void esw_update_vport_rx_mode(struct mlx5_eswitch *esw,
698 struct mlx5_vport *vport)
699 {
700 int promisc_all = 0;
701 int promisc_uc = 0;
702 int promisc_mc = 0;
703 int err;
704
705 err = mlx5_query_nic_vport_promisc(esw->dev,
706 vport->vport,
707 &promisc_uc,
708 &promisc_mc,
709 &promisc_all);
710 if (err)
711 return;
712 esw_debug(esw->dev, "vport[%d] context update rx mode promisc_all=%d, all_multi=%d\n",
713 vport->vport, promisc_all, promisc_mc);
714
715 if (!vport->info.trusted || !vport->enabled) {
716 promisc_uc = 0;
717 promisc_mc = 0;
718 promisc_all = 0;
719 }
720
721 esw_apply_vport_rx_mode(esw, vport, promisc_all,
722 (promisc_all || promisc_mc));
723 }
724
esw_vport_change_handle_locked(struct mlx5_vport * vport)725 void esw_vport_change_handle_locked(struct mlx5_vport *vport)
726 {
727 struct mlx5_core_dev *dev = vport->dev;
728 struct mlx5_eswitch *esw = dev->priv.eswitch;
729 u8 mac[ETH_ALEN];
730
731 if (!MLX5_CAP_GEN(dev, log_max_l2_table))
732 return;
733
734 mlx5_query_nic_vport_mac_address(dev, vport->vport, true, mac);
735 esw_debug(dev, "vport[%d] Context Changed: perm mac: %pM\n",
736 vport->vport, mac);
737
738 if (vport->enabled_events & MLX5_VPORT_UC_ADDR_CHANGE) {
739 esw_update_vport_addr_list(esw, vport, MLX5_NVPRT_LIST_TYPE_UC);
740 esw_apply_vport_addr_list(esw, vport, MLX5_NVPRT_LIST_TYPE_UC);
741 }
742
743 if (vport->enabled_events & MLX5_VPORT_MC_ADDR_CHANGE)
744 esw_update_vport_addr_list(esw, vport, MLX5_NVPRT_LIST_TYPE_MC);
745
746 if (vport->enabled_events & MLX5_VPORT_PROMISC_CHANGE) {
747 esw_update_vport_rx_mode(esw, vport);
748 if (!IS_ERR_OR_NULL(vport->allmulti_rule))
749 esw_update_vport_mc_promisc(esw, vport);
750 }
751
752 if (vport->enabled_events & (MLX5_VPORT_PROMISC_CHANGE | MLX5_VPORT_MC_ADDR_CHANGE))
753 esw_apply_vport_addr_list(esw, vport, MLX5_NVPRT_LIST_TYPE_MC);
754
755 esw_debug(esw->dev, "vport[%d] Context Changed: Done\n", vport->vport);
756 if (vport->enabled)
757 arm_vport_context_events_cmd(dev, vport->vport,
758 vport->enabled_events);
759 }
760
esw_vport_change_handler(struct work_struct * work)761 static void esw_vport_change_handler(struct work_struct *work)
762 {
763 struct mlx5_vport *vport =
764 container_of(work, struct mlx5_vport, vport_change_handler);
765 struct mlx5_eswitch *esw = vport->dev->priv.eswitch;
766
767 mutex_lock(&esw->state_lock);
768 esw_vport_change_handle_locked(vport);
769 mutex_unlock(&esw->state_lock);
770 }
771
node_guid_gen_from_mac(u64 * node_guid,const u8 * mac)772 static void node_guid_gen_from_mac(u64 *node_guid, const u8 *mac)
773 {
774 ((u8 *)node_guid)[7] = mac[0];
775 ((u8 *)node_guid)[6] = mac[1];
776 ((u8 *)node_guid)[5] = mac[2];
777 ((u8 *)node_guid)[4] = 0xff;
778 ((u8 *)node_guid)[3] = 0xfe;
779 ((u8 *)node_guid)[2] = mac[3];
780 ((u8 *)node_guid)[1] = mac[4];
781 ((u8 *)node_guid)[0] = mac[5];
782 }
783
esw_vport_setup_acl(struct mlx5_eswitch * esw,struct mlx5_vport * vport)784 static int esw_vport_setup_acl(struct mlx5_eswitch *esw,
785 struct mlx5_vport *vport)
786 {
787 if (esw->mode == MLX5_ESWITCH_LEGACY)
788 return esw_legacy_vport_acl_setup(esw, vport);
789 else
790 return esw_vport_create_offloads_acl_tables(esw, vport);
791 }
792
esw_vport_cleanup_acl(struct mlx5_eswitch * esw,struct mlx5_vport * vport)793 static void esw_vport_cleanup_acl(struct mlx5_eswitch *esw,
794 struct mlx5_vport *vport)
795 {
796 if (esw->mode == MLX5_ESWITCH_LEGACY)
797 esw_legacy_vport_acl_cleanup(esw, vport);
798 else
799 esw_vport_destroy_offloads_acl_tables(esw, vport);
800 }
801
mlx5_esw_vport_caps_get(struct mlx5_eswitch * esw,struct mlx5_vport * vport)802 static int mlx5_esw_vport_caps_get(struct mlx5_eswitch *esw, struct mlx5_vport *vport)
803 {
804 int query_out_sz = MLX5_ST_SZ_BYTES(query_hca_cap_out);
805 void *query_ctx;
806 void *hca_caps;
807 int err;
808
809 if (!MLX5_CAP_GEN(esw->dev, vhca_resource_manager))
810 return 0;
811
812 query_ctx = kzalloc(query_out_sz, GFP_KERNEL);
813 if (!query_ctx)
814 return -ENOMEM;
815
816 err = mlx5_vport_get_other_func_cap(esw->dev, vport->vport, query_ctx,
817 MLX5_CAP_GENERAL);
818 if (err)
819 goto out_free;
820
821 hca_caps = MLX5_ADDR_OF(query_hca_cap_out, query_ctx, capability);
822 vport->info.roce_enabled = MLX5_GET(cmd_hca_cap, hca_caps, roce);
823 vport->vhca_id = MLX5_GET(cmd_hca_cap, hca_caps, vhca_id);
824
825 if (!MLX5_CAP_GEN_MAX(esw->dev, hca_cap_2))
826 goto out_free;
827
828 memset(query_ctx, 0, query_out_sz);
829 err = mlx5_vport_get_other_func_cap(esw->dev, vport->vport, query_ctx,
830 MLX5_CAP_GENERAL_2);
831 if (err)
832 goto out_free;
833
834 hca_caps = MLX5_ADDR_OF(query_hca_cap_out, query_ctx, capability);
835 vport->info.mig_enabled = MLX5_GET(cmd_hca_cap_2, hca_caps, migratable);
836
837 err = mlx5_esw_ipsec_vf_offload_get(esw->dev, vport);
838 out_free:
839 kfree(query_ctx);
840 return err;
841 }
842
mlx5_esw_vport_vhca_id(struct mlx5_eswitch * esw,u16 vportn,u16 * vhca_id)843 bool mlx5_esw_vport_vhca_id(struct mlx5_eswitch *esw, u16 vportn, u16 *vhca_id)
844 {
845 struct mlx5_vport *vport;
846
847 vport = mlx5_eswitch_get_vport(esw, vportn);
848 if (IS_ERR(vport) || MLX5_VPORT_INVAL_VHCA_ID(vport))
849 return false;
850
851 *vhca_id = vport->vhca_id;
852 return true;
853 }
854
esw_vport_setup(struct mlx5_eswitch * esw,struct mlx5_vport * vport)855 static int esw_vport_setup(struct mlx5_eswitch *esw, struct mlx5_vport *vport)
856 {
857 bool vst_mode_steering = esw_vst_mode_is_steering(esw);
858 u16 vport_num = vport->vport;
859 int flags;
860 int err;
861
862 err = esw_vport_setup_acl(esw, vport);
863 if (err)
864 return err;
865
866 if (mlx5_esw_is_manager_vport(esw, vport_num))
867 return 0;
868
869 err = mlx5_esw_vport_caps_get(esw, vport);
870 if (err)
871 goto err_caps;
872
873 mlx5_modify_vport_admin_state(esw->dev,
874 MLX5_VPORT_STATE_OP_MOD_ESW_VPORT,
875 vport_num, 1,
876 vport->info.link_state);
877
878 mlx5_query_nic_vport_mac_address(esw->dev, vport_num, true,
879 vport->info.mac);
880 mlx5_query_nic_vport_node_guid(esw->dev, vport_num, true,
881 &vport->info.node_guid);
882
883 flags = (vport->info.vlan || vport->info.qos) ?
884 SET_VLAN_STRIP | SET_VLAN_INSERT : 0;
885 if (esw->mode == MLX5_ESWITCH_OFFLOADS || !vst_mode_steering)
886 modify_esw_vport_cvlan(esw->dev, vport_num, vport->info.vlan,
887 vport->info.qos, flags);
888
889 return 0;
890
891 err_caps:
892 esw_vport_cleanup_acl(esw, vport);
893 return err;
894 }
895
896 /* Don't cleanup vport->info, it's needed to restore vport configuration */
esw_vport_cleanup(struct mlx5_eswitch * esw,struct mlx5_vport * vport)897 static void esw_vport_cleanup(struct mlx5_eswitch *esw, struct mlx5_vport *vport)
898 {
899 u16 vport_num = vport->vport;
900
901 if (!mlx5_esw_is_manager_vport(esw, vport_num))
902 mlx5_modify_vport_admin_state(esw->dev,
903 MLX5_VPORT_STATE_OP_MOD_ESW_VPORT,
904 vport_num, 1,
905 MLX5_VPORT_ADMIN_STATE_DOWN);
906
907 mlx5_esw_qos_vport_disable(vport);
908 esw_vport_cleanup_acl(esw, vport);
909 }
910
mlx5_esw_vport_enable(struct mlx5_eswitch * esw,struct mlx5_vport * vport,enum mlx5_eswitch_vport_event enabled_events)911 int mlx5_esw_vport_enable(struct mlx5_eswitch *esw, struct mlx5_vport *vport,
912 enum mlx5_eswitch_vport_event enabled_events)
913 {
914 u16 vport_num = vport->vport;
915 int ret;
916
917 mutex_lock(&esw->state_lock);
918 WARN_ON(vport->enabled);
919
920 esw_debug(esw->dev, "Enabling VPORT(%d)\n", vport_num);
921
922 ret = esw_vport_setup(esw, vport);
923 if (ret)
924 goto done;
925
926 /* Sync with current vport context */
927 vport->enabled_events = enabled_events;
928 vport->enabled = true;
929 if (vport->vport != MLX5_VPORT_PF &&
930 (vport->info.ipsec_crypto_enabled || vport->info.ipsec_packet_enabled))
931 esw->enabled_ipsec_vf_count++;
932
933 /* Esw manager is trusted by default. Host PF (vport 0) is trusted as well
934 * in smartNIC as it's a vport group manager.
935 */
936 if (mlx5_esw_is_manager_vport(esw, vport_num) ||
937 (!vport_num && mlx5_core_is_ecpf(esw->dev)))
938 vport->info.trusted = true;
939
940 if (!mlx5_esw_is_manager_vport(esw, vport_num) &&
941 MLX5_CAP_GEN(esw->dev, vhca_resource_manager)) {
942 ret = mlx5_esw_vport_vhca_id_map(esw, vport);
943 if (ret)
944 goto err_vhca_mapping;
945 }
946
947 esw_vport_change_handle_locked(vport);
948
949 esw->enabled_vports++;
950 esw_debug(esw->dev, "Enabled VPORT(%d)\n", vport_num);
951 done:
952 mutex_unlock(&esw->state_lock);
953 return ret;
954
955 err_vhca_mapping:
956 esw_vport_cleanup(esw, vport);
957 mutex_unlock(&esw->state_lock);
958 return ret;
959 }
960
mlx5_esw_vport_disable(struct mlx5_eswitch * esw,struct mlx5_vport * vport)961 void mlx5_esw_vport_disable(struct mlx5_eswitch *esw, struct mlx5_vport *vport)
962 {
963 u16 vport_num = vport->vport;
964
965 mutex_lock(&esw->state_lock);
966
967 if (!vport->enabled)
968 goto done;
969
970 esw_debug(esw->dev, "Disabling vport(%d)\n", vport_num);
971 /* Mark this vport as disabled to discard new events */
972 vport->enabled = false;
973
974 /* Disable events from this vport */
975 if (MLX5_CAP_GEN(esw->dev, log_max_l2_table))
976 arm_vport_context_events_cmd(esw->dev, vport_num, 0);
977
978 if (!mlx5_esw_is_manager_vport(esw, vport_num) &&
979 MLX5_CAP_GEN(esw->dev, vhca_resource_manager))
980 mlx5_esw_vport_vhca_id_unmap(esw, vport);
981
982 if (vport->vport != MLX5_VPORT_PF &&
983 (vport->info.ipsec_crypto_enabled || vport->info.ipsec_packet_enabled))
984 esw->enabled_ipsec_vf_count--;
985
986 /* We don't assume VFs will cleanup after themselves.
987 * Calling vport change handler while vport is disabled will cleanup
988 * the vport resources.
989 */
990 esw_vport_change_handle_locked(vport);
991 vport->enabled_events = 0;
992 esw_apply_vport_rx_mode(esw, vport, false, false);
993 esw_vport_cleanup(esw, vport);
994 esw->enabled_vports--;
995
996 done:
997 mutex_unlock(&esw->state_lock);
998 }
999
eswitch_vport_event(struct notifier_block * nb,unsigned long type,void * data)1000 static int eswitch_vport_event(struct notifier_block *nb,
1001 unsigned long type, void *data)
1002 {
1003 struct mlx5_eswitch *esw = mlx5_nb_cof(nb, struct mlx5_eswitch, nb);
1004 struct mlx5_eqe *eqe = data;
1005 struct mlx5_vport *vport;
1006 u16 vport_num;
1007
1008 vport_num = be16_to_cpu(eqe->data.vport_change.vport_num);
1009 vport = mlx5_eswitch_get_vport(esw, vport_num);
1010 if (!IS_ERR(vport))
1011 queue_work(esw->work_queue, &vport->vport_change_handler);
1012 return NOTIFY_OK;
1013 }
1014
1015 /**
1016 * mlx5_esw_query_functions - Returns raw output about functions state
1017 * @dev: Pointer to device to query
1018 *
1019 * mlx5_esw_query_functions() allocates and returns functions changed
1020 * raw output memory pointer from device on success. Otherwise returns ERR_PTR.
1021 * Caller must free the memory using kvfree() when valid pointer is returned.
1022 */
mlx5_esw_query_functions(struct mlx5_core_dev * dev)1023 const u32 *mlx5_esw_query_functions(struct mlx5_core_dev *dev)
1024 {
1025 int outlen = MLX5_ST_SZ_BYTES(query_esw_functions_out);
1026 u32 in[MLX5_ST_SZ_DW(query_esw_functions_in)] = {};
1027 u32 *out;
1028 int err;
1029
1030 out = kvzalloc(outlen, GFP_KERNEL);
1031 if (!out)
1032 return ERR_PTR(-ENOMEM);
1033
1034 MLX5_SET(query_esw_functions_in, in, opcode,
1035 MLX5_CMD_OP_QUERY_ESW_FUNCTIONS);
1036
1037 err = mlx5_cmd_exec(dev, in, sizeof(in), out, outlen);
1038 if (!err)
1039 return out;
1040
1041 kvfree(out);
1042 return ERR_PTR(err);
1043 }
1044
mlx5_esw_host_functions_enabled_query(struct mlx5_eswitch * esw)1045 static int mlx5_esw_host_functions_enabled_query(struct mlx5_eswitch *esw)
1046 {
1047 const u32 *query_host_out;
1048
1049 if (!mlx5_core_is_ecpf_esw_manager(esw->dev))
1050 return 0;
1051
1052 query_host_out = mlx5_esw_query_functions(esw->dev);
1053 if (IS_ERR(query_host_out))
1054 return PTR_ERR(query_host_out);
1055
1056 esw->esw_funcs.host_funcs_disabled =
1057 MLX5_GET(query_esw_functions_out, query_host_out,
1058 host_params_context.host_pf_not_exist);
1059
1060 kvfree(query_host_out);
1061 return 0;
1062 }
1063
mlx5_eswitch_event_handler_register(struct mlx5_eswitch * esw)1064 static void mlx5_eswitch_event_handler_register(struct mlx5_eswitch *esw)
1065 {
1066 if (esw->mode == MLX5_ESWITCH_OFFLOADS && mlx5_eswitch_is_funcs_handler(esw->dev)) {
1067 MLX5_NB_INIT(&esw->esw_funcs.nb, mlx5_esw_funcs_changed_handler,
1068 ESW_FUNCTIONS_CHANGED);
1069 mlx5_eq_notifier_register(esw->dev, &esw->esw_funcs.nb);
1070 }
1071 }
1072
mlx5_eswitch_event_handler_unregister(struct mlx5_eswitch * esw)1073 static void mlx5_eswitch_event_handler_unregister(struct mlx5_eswitch *esw)
1074 {
1075 if (esw->mode == MLX5_ESWITCH_OFFLOADS && mlx5_eswitch_is_funcs_handler(esw->dev))
1076 mlx5_eq_notifier_unregister(esw->dev, &esw->esw_funcs.nb);
1077
1078 flush_workqueue(esw->work_queue);
1079 }
1080
mlx5_eswitch_clear_vf_vports_info(struct mlx5_eswitch * esw)1081 static void mlx5_eswitch_clear_vf_vports_info(struct mlx5_eswitch *esw)
1082 {
1083 struct mlx5_vport *vport;
1084 unsigned long i;
1085
1086 mlx5_esw_for_each_vf_vport(esw, i, vport, esw->esw_funcs.num_vfs) {
1087 mlx5_esw_qos_vport_qos_free(vport);
1088 memset(&vport->info, 0, sizeof(vport->info));
1089 vport->info.link_state = MLX5_VPORT_ADMIN_STATE_AUTO;
1090 }
1091 }
1092
mlx5_eswitch_clear_ec_vf_vports_info(struct mlx5_eswitch * esw)1093 static void mlx5_eswitch_clear_ec_vf_vports_info(struct mlx5_eswitch *esw)
1094 {
1095 struct mlx5_vport *vport;
1096 unsigned long i;
1097
1098 mlx5_esw_for_each_ec_vf_vport(esw, i, vport, esw->esw_funcs.num_ec_vfs) {
1099 mlx5_esw_qos_vport_qos_free(vport);
1100 memset(&vport->info, 0, sizeof(vport->info));
1101 vport->info.link_state = MLX5_VPORT_ADMIN_STATE_AUTO;
1102 }
1103 }
1104
mlx5_eswitch_load_vport(struct mlx5_eswitch * esw,struct mlx5_vport * vport,enum mlx5_eswitch_vport_event enabled_events)1105 static int mlx5_eswitch_load_vport(struct mlx5_eswitch *esw, struct mlx5_vport *vport,
1106 enum mlx5_eswitch_vport_event enabled_events)
1107 {
1108 int err;
1109
1110 err = mlx5_esw_vport_enable(esw, vport, enabled_events);
1111 if (err)
1112 return err;
1113
1114 err = mlx5_esw_offloads_load_rep(esw, vport);
1115 if (err)
1116 goto err_rep;
1117
1118 return err;
1119
1120 err_rep:
1121 mlx5_esw_vport_disable(esw, vport);
1122 return err;
1123 }
1124
mlx5_eswitch_unload_vport(struct mlx5_eswitch * esw,struct mlx5_vport * vport)1125 static void mlx5_eswitch_unload_vport(struct mlx5_eswitch *esw, struct mlx5_vport *vport)
1126 {
1127 mlx5_esw_offloads_unload_rep(esw, vport);
1128 mlx5_esw_vport_disable(esw, vport);
1129 }
1130
mlx5_eswitch_load_pf_vf_vport(struct mlx5_eswitch * esw,u16 vport_num,enum mlx5_eswitch_vport_event enabled_events)1131 static int mlx5_eswitch_load_pf_vf_vport(struct mlx5_eswitch *esw, u16 vport_num,
1132 enum mlx5_eswitch_vport_event enabled_events)
1133 {
1134 struct mlx5_vport *vport;
1135 int err;
1136
1137 vport = mlx5_eswitch_get_vport(esw, vport_num);
1138 if (IS_ERR(vport))
1139 return PTR_ERR(vport);
1140
1141 err = mlx5_esw_offloads_init_pf_vf_rep(esw, vport);
1142 if (err)
1143 return err;
1144
1145 err = mlx5_eswitch_load_vport(esw, vport, enabled_events);
1146 if (err)
1147 goto err_load;
1148 return 0;
1149
1150 err_load:
1151 mlx5_esw_offloads_cleanup_pf_vf_rep(esw, vport);
1152 return err;
1153 }
1154
mlx5_eswitch_unload_pf_vf_vport(struct mlx5_eswitch * esw,u16 vport_num)1155 static void mlx5_eswitch_unload_pf_vf_vport(struct mlx5_eswitch *esw, u16 vport_num)
1156 {
1157 struct mlx5_vport *vport;
1158
1159 vport = mlx5_eswitch_get_vport(esw, vport_num);
1160 if (IS_ERR(vport))
1161 return;
1162
1163 mlx5_eswitch_unload_vport(esw, vport);
1164 mlx5_esw_offloads_cleanup_pf_vf_rep(esw, vport);
1165 }
1166
mlx5_eswitch_load_sf_vport(struct mlx5_eswitch * esw,u16 vport_num,enum mlx5_eswitch_vport_event enabled_events,struct mlx5_devlink_port * dl_port,u32 controller,u32 sfnum)1167 int mlx5_eswitch_load_sf_vport(struct mlx5_eswitch *esw, u16 vport_num,
1168 enum mlx5_eswitch_vport_event enabled_events,
1169 struct mlx5_devlink_port *dl_port, u32 controller, u32 sfnum)
1170 {
1171 struct mlx5_vport *vport;
1172 int err;
1173
1174 vport = mlx5_eswitch_get_vport(esw, vport_num);
1175 if (IS_ERR(vport))
1176 return PTR_ERR(vport);
1177
1178 err = mlx5_esw_offloads_init_sf_rep(esw, vport, dl_port, controller, sfnum);
1179 if (err)
1180 return err;
1181
1182 err = mlx5_eswitch_load_vport(esw, vport, enabled_events);
1183 if (err)
1184 goto err_load;
1185
1186 return 0;
1187
1188 err_load:
1189 mlx5_esw_offloads_cleanup_sf_rep(esw, vport);
1190 return err;
1191 }
1192
mlx5_eswitch_unload_sf_vport(struct mlx5_eswitch * esw,u16 vport_num)1193 void mlx5_eswitch_unload_sf_vport(struct mlx5_eswitch *esw, u16 vport_num)
1194 {
1195 struct mlx5_vport *vport;
1196
1197 vport = mlx5_eswitch_get_vport(esw, vport_num);
1198 if (IS_ERR(vport))
1199 return;
1200
1201 mlx5_eswitch_unload_vport(esw, vport);
1202 mlx5_esw_offloads_cleanup_sf_rep(esw, vport);
1203 }
1204
mlx5_eswitch_unload_vf_vports(struct mlx5_eswitch * esw,u16 num_vfs)1205 void mlx5_eswitch_unload_vf_vports(struct mlx5_eswitch *esw, u16 num_vfs)
1206 {
1207 struct mlx5_vport *vport;
1208 unsigned long i;
1209
1210 mlx5_esw_for_each_vf_vport(esw, i, vport, num_vfs) {
1211 /* Adjacent VFs are unloaded separately */
1212 if (!vport->enabled || vport->adjacent)
1213 continue;
1214 mlx5_eswitch_unload_pf_vf_vport(esw, vport->vport);
1215 }
1216 }
1217
mlx5_eswitch_unload_ec_vf_vports(struct mlx5_eswitch * esw,u16 num_ec_vfs)1218 static void mlx5_eswitch_unload_ec_vf_vports(struct mlx5_eswitch *esw,
1219 u16 num_ec_vfs)
1220 {
1221 struct mlx5_vport *vport;
1222 unsigned long i;
1223
1224 mlx5_esw_for_each_ec_vf_vport(esw, i, vport, num_ec_vfs) {
1225 if (!vport->enabled)
1226 continue;
1227 mlx5_eswitch_unload_pf_vf_vport(esw, vport->vport);
1228 }
1229 }
1230
mlx5_eswitch_unload_adj_vf_vports(struct mlx5_eswitch * esw)1231 static void mlx5_eswitch_unload_adj_vf_vports(struct mlx5_eswitch *esw)
1232 {
1233 struct mlx5_vport *vport;
1234 unsigned long i;
1235
1236 mlx5_esw_for_each_vf_vport(esw, i, vport, U16_MAX) {
1237 if (!vport->enabled || !vport->adjacent)
1238 continue;
1239 mlx5_eswitch_unload_pf_vf_vport(esw, vport->vport);
1240 }
1241 }
1242
1243 static int
mlx5_eswitch_load_adj_vf_vports(struct mlx5_eswitch * esw,enum mlx5_eswitch_vport_event enabled_events)1244 mlx5_eswitch_load_adj_vf_vports(struct mlx5_eswitch *esw,
1245 enum mlx5_eswitch_vport_event enabled_events)
1246 {
1247 struct mlx5_vport *vport;
1248 unsigned long i;
1249 int err;
1250
1251 mlx5_esw_for_each_vf_vport(esw, i, vport, U16_MAX) {
1252 if (!vport->adjacent)
1253 continue;
1254 err = mlx5_eswitch_load_pf_vf_vport(esw, vport->vport,
1255 enabled_events);
1256 if (err)
1257 goto unload_adj_vf_vport;
1258 }
1259
1260 return 0;
1261
1262 unload_adj_vf_vport:
1263 mlx5_eswitch_unload_adj_vf_vports(esw);
1264 return err;
1265 }
1266
mlx5_eswitch_load_vf_vports(struct mlx5_eswitch * esw,u16 num_vfs,enum mlx5_eswitch_vport_event enabled_events)1267 int mlx5_eswitch_load_vf_vports(struct mlx5_eswitch *esw, u16 num_vfs,
1268 enum mlx5_eswitch_vport_event enabled_events)
1269 {
1270 struct mlx5_vport *vport;
1271 unsigned long i;
1272 int err;
1273
1274 mlx5_esw_for_each_vf_vport(esw, i, vport, num_vfs) {
1275 err = mlx5_eswitch_load_pf_vf_vport(esw, vport->vport, enabled_events);
1276 if (err)
1277 goto vf_err;
1278 }
1279
1280 return 0;
1281
1282 vf_err:
1283 mlx5_eswitch_unload_vf_vports(esw, num_vfs);
1284 return err;
1285 }
1286
mlx5_eswitch_load_ec_vf_vports(struct mlx5_eswitch * esw,u16 num_ec_vfs,enum mlx5_eswitch_vport_event enabled_events)1287 static int mlx5_eswitch_load_ec_vf_vports(struct mlx5_eswitch *esw, u16 num_ec_vfs,
1288 enum mlx5_eswitch_vport_event enabled_events)
1289 {
1290 struct mlx5_vport *vport;
1291 unsigned long i;
1292 int err;
1293
1294 mlx5_esw_for_each_ec_vf_vport(esw, i, vport, num_ec_vfs) {
1295 err = mlx5_eswitch_load_pf_vf_vport(esw, vport->vport, enabled_events);
1296 if (err)
1297 goto vf_err;
1298 }
1299
1300 return 0;
1301
1302 vf_err:
1303 mlx5_eswitch_unload_ec_vf_vports(esw, num_ec_vfs);
1304 return err;
1305 }
1306
mlx5_esw_host_pf_enable_hca(struct mlx5_core_dev * dev)1307 int mlx5_esw_host_pf_enable_hca(struct mlx5_core_dev *dev)
1308 {
1309 struct mlx5_eswitch *esw = dev->priv.eswitch;
1310 struct mlx5_vport *vport;
1311 int err;
1312
1313 if (!mlx5_core_is_ecpf(dev) || !mlx5_esw_allowed(esw))
1314 return 0;
1315
1316 vport = mlx5_eswitch_get_vport(esw, MLX5_VPORT_PF);
1317 if (IS_ERR(vport))
1318 return PTR_ERR(vport);
1319
1320 /* Once vport and representor are ready, take out the external host PF
1321 * out of initializing state. Enabling HCA clears the iser->initializing
1322 * bit and host PF driver loading can progress.
1323 */
1324 err = mlx5_cmd_host_pf_enable_hca(dev);
1325 if (err)
1326 return err;
1327
1328 vport->pf_activated = true;
1329
1330 return 0;
1331 }
1332
mlx5_esw_host_pf_disable_hca(struct mlx5_core_dev * dev)1333 int mlx5_esw_host_pf_disable_hca(struct mlx5_core_dev *dev)
1334 {
1335 struct mlx5_eswitch *esw = dev->priv.eswitch;
1336 struct mlx5_vport *vport;
1337 int err;
1338
1339 if (!mlx5_core_is_ecpf(dev) || !mlx5_esw_allowed(esw))
1340 return 0;
1341
1342 vport = mlx5_eswitch_get_vport(esw, MLX5_VPORT_PF);
1343 if (IS_ERR(vport))
1344 return PTR_ERR(vport);
1345
1346 err = mlx5_cmd_host_pf_disable_hca(dev);
1347 if (err)
1348 return err;
1349
1350 vport->pf_activated = false;
1351
1352 return 0;
1353 }
1354
1355 /* mlx5_eswitch_enable_pf_vf_vports() enables vports of PF, ECPF and VFs
1356 * whichever are present on the eswitch.
1357 */
1358 int
mlx5_eswitch_enable_pf_vf_vports(struct mlx5_eswitch * esw,enum mlx5_eswitch_vport_event enabled_events)1359 mlx5_eswitch_enable_pf_vf_vports(struct mlx5_eswitch *esw,
1360 enum mlx5_eswitch_vport_event enabled_events)
1361 {
1362 bool pf_needed;
1363 int ret;
1364
1365 pf_needed = mlx5_core_is_ecpf_esw_manager(esw->dev) ||
1366 esw->mode == MLX5_ESWITCH_LEGACY;
1367
1368 /* Enable PF vport */
1369 if (pf_needed && mlx5_esw_host_functions_enabled(esw->dev)) {
1370 ret = mlx5_eswitch_load_pf_vf_vport(esw, MLX5_VPORT_PF,
1371 enabled_events);
1372 if (ret)
1373 return ret;
1374 }
1375
1376 if (mlx5_esw_host_functions_enabled(esw->dev)) {
1377 /* Enable external host PF HCA */
1378 ret = mlx5_esw_host_pf_enable_hca(esw->dev);
1379 if (ret)
1380 goto pf_hca_err;
1381 }
1382
1383 /* Enable ECPF vport */
1384 if (mlx5_ecpf_vport_exists(esw->dev)) {
1385 ret = mlx5_eswitch_load_pf_vf_vport(esw, MLX5_VPORT_ECPF, enabled_events);
1386 if (ret)
1387 goto ecpf_err;
1388 }
1389
1390 /* Enable ECVF vports */
1391 if (mlx5_core_ec_sriov_enabled(esw->dev)) {
1392 ret = mlx5_eswitch_load_ec_vf_vports(esw,
1393 esw->esw_funcs.num_ec_vfs,
1394 enabled_events);
1395 if (ret)
1396 goto ec_vf_err;
1397 }
1398
1399 /* Enable VF vports */
1400 ret = mlx5_eswitch_load_vf_vports(esw, esw->esw_funcs.num_vfs,
1401 enabled_events);
1402 if (ret)
1403 goto vf_err;
1404
1405 /* Enable adjacent VF vports */
1406 ret = mlx5_eswitch_load_adj_vf_vports(esw, enabled_events);
1407 if (ret)
1408 goto unload_vf_vports;
1409
1410 return 0;
1411
1412 unload_vf_vports:
1413 mlx5_eswitch_unload_vf_vports(esw, esw->esw_funcs.num_vfs);
1414 vf_err:
1415 if (mlx5_core_ec_sriov_enabled(esw->dev))
1416 mlx5_eswitch_unload_ec_vf_vports(esw, esw->esw_funcs.num_ec_vfs);
1417 ec_vf_err:
1418 if (mlx5_ecpf_vport_exists(esw->dev))
1419 mlx5_eswitch_unload_pf_vf_vport(esw, MLX5_VPORT_ECPF);
1420 ecpf_err:
1421 if (mlx5_esw_host_functions_enabled(esw->dev))
1422 mlx5_esw_host_pf_disable_hca(esw->dev);
1423 pf_hca_err:
1424 if (pf_needed && mlx5_esw_host_functions_enabled(esw->dev))
1425 mlx5_eswitch_unload_pf_vf_vport(esw, MLX5_VPORT_PF);
1426 return ret;
1427 }
1428
1429 /* mlx5_eswitch_disable_pf_vf_vports() disables vports of PF, ECPF and VFs
1430 * whichever are previously enabled on the eswitch.
1431 */
mlx5_eswitch_disable_pf_vf_vports(struct mlx5_eswitch * esw)1432 void mlx5_eswitch_disable_pf_vf_vports(struct mlx5_eswitch *esw)
1433 {
1434 mlx5_eswitch_unload_adj_vf_vports(esw);
1435
1436 mlx5_eswitch_unload_vf_vports(esw, esw->esw_funcs.num_vfs);
1437
1438 if (mlx5_core_ec_sriov_enabled(esw->dev))
1439 mlx5_eswitch_unload_ec_vf_vports(esw,
1440 esw->esw_funcs.num_ec_vfs);
1441
1442 if (mlx5_ecpf_vport_exists(esw->dev)) {
1443 mlx5_eswitch_unload_pf_vf_vport(esw, MLX5_VPORT_ECPF);
1444 }
1445
1446 if (mlx5_esw_host_functions_enabled(esw->dev))
1447 mlx5_esw_host_pf_disable_hca(esw->dev);
1448
1449 if ((mlx5_core_is_ecpf_esw_manager(esw->dev) ||
1450 esw->mode == MLX5_ESWITCH_LEGACY) &&
1451 mlx5_esw_host_functions_enabled(esw->dev))
1452 mlx5_eswitch_unload_pf_vf_vport(esw, MLX5_VPORT_PF);
1453 }
1454
mlx5_eswitch_get_devlink_param(struct mlx5_eswitch * esw)1455 static void mlx5_eswitch_get_devlink_param(struct mlx5_eswitch *esw)
1456 {
1457 struct devlink *devlink = priv_to_devlink(esw->dev);
1458 union devlink_param_value val;
1459 int err;
1460
1461 err = devl_param_driverinit_value_get(devlink,
1462 MLX5_DEVLINK_PARAM_ID_ESW_LARGE_GROUP_NUM,
1463 &val);
1464 if (!err) {
1465 esw->params.large_group_num = val.vu32;
1466 } else {
1467 esw_warn(esw->dev,
1468 "Devlink can't get param fdb_large_groups, uses default (%d).\n",
1469 ESW_OFFLOADS_DEFAULT_NUM_GROUPS);
1470 esw->params.large_group_num = ESW_OFFLOADS_DEFAULT_NUM_GROUPS;
1471 }
1472 }
1473
1474 static void
mlx5_eswitch_update_num_of_vfs(struct mlx5_eswitch * esw,int num_vfs)1475 mlx5_eswitch_update_num_of_vfs(struct mlx5_eswitch *esw, int num_vfs)
1476 {
1477 const u32 *out;
1478
1479 if (num_vfs < 0)
1480 return;
1481
1482 if (!mlx5_core_is_ecpf_esw_manager(esw->dev)) {
1483 esw->esw_funcs.num_vfs = num_vfs;
1484 return;
1485 }
1486
1487 out = mlx5_esw_query_functions(esw->dev);
1488 if (IS_ERR(out))
1489 return;
1490
1491 esw->esw_funcs.num_vfs = MLX5_GET(query_esw_functions_out, out,
1492 host_params_context.host_num_of_vfs);
1493 if (mlx5_core_ec_sriov_enabled(esw->dev))
1494 esw->esw_funcs.num_ec_vfs = num_vfs;
1495
1496 kvfree(out);
1497 }
1498
mlx5_esw_mode_change_notify(struct mlx5_eswitch * esw,u16 mode)1499 static void mlx5_esw_mode_change_notify(struct mlx5_eswitch *esw, u16 mode)
1500 {
1501 struct mlx5_esw_event_info info = {};
1502
1503 info.new_mode = mode;
1504
1505 blocking_notifier_call_chain(&esw->dev->priv.esw_n_head, 0, &info);
1506 }
1507
mlx5_esw_egress_acls_init(struct mlx5_core_dev * dev)1508 static int mlx5_esw_egress_acls_init(struct mlx5_core_dev *dev)
1509 {
1510 struct mlx5_flow_steering *steering = dev->priv.steering;
1511 int total_vports = mlx5_eswitch_get_total_vports(dev);
1512 int err;
1513 int i;
1514
1515 for (i = 0; i < total_vports; i++) {
1516 err = mlx5_fs_vport_egress_acl_ns_add(steering, i);
1517 if (err)
1518 goto acl_ns_remove;
1519 }
1520 return 0;
1521
1522 acl_ns_remove:
1523 while (i--)
1524 mlx5_fs_vport_egress_acl_ns_remove(steering, i);
1525 return err;
1526 }
1527
mlx5_esw_egress_acls_cleanup(struct mlx5_core_dev * dev)1528 static void mlx5_esw_egress_acls_cleanup(struct mlx5_core_dev *dev)
1529 {
1530 struct mlx5_flow_steering *steering = dev->priv.steering;
1531 int total_vports = mlx5_eswitch_get_total_vports(dev);
1532 int i;
1533
1534 for (i = total_vports - 1; i >= 0; i--)
1535 mlx5_fs_vport_egress_acl_ns_remove(steering, i);
1536 }
1537
mlx5_esw_ingress_acls_init(struct mlx5_core_dev * dev)1538 static int mlx5_esw_ingress_acls_init(struct mlx5_core_dev *dev)
1539 {
1540 struct mlx5_flow_steering *steering = dev->priv.steering;
1541 int total_vports = mlx5_eswitch_get_total_vports(dev);
1542 int err;
1543 int i;
1544
1545 for (i = 0; i < total_vports; i++) {
1546 err = mlx5_fs_vport_ingress_acl_ns_add(steering, i);
1547 if (err)
1548 goto acl_ns_remove;
1549 }
1550 return 0;
1551
1552 acl_ns_remove:
1553 while (i--)
1554 mlx5_fs_vport_ingress_acl_ns_remove(steering, i);
1555 return err;
1556 }
1557
mlx5_esw_ingress_acls_cleanup(struct mlx5_core_dev * dev)1558 static void mlx5_esw_ingress_acls_cleanup(struct mlx5_core_dev *dev)
1559 {
1560 struct mlx5_flow_steering *steering = dev->priv.steering;
1561 int total_vports = mlx5_eswitch_get_total_vports(dev);
1562 int i;
1563
1564 for (i = total_vports - 1; i >= 0; i--)
1565 mlx5_fs_vport_ingress_acl_ns_remove(steering, i);
1566 }
1567
mlx5_esw_acls_ns_init(struct mlx5_eswitch * esw)1568 static int mlx5_esw_acls_ns_init(struct mlx5_eswitch *esw)
1569 {
1570 struct mlx5_core_dev *dev = esw->dev;
1571 int err;
1572
1573 if (esw->flags & MLX5_ESWITCH_VPORT_ACL_NS_CREATED)
1574 return 0;
1575
1576 if (MLX5_CAP_ESW_EGRESS_ACL(dev, ft_support)) {
1577 err = mlx5_esw_egress_acls_init(dev);
1578 if (err)
1579 return err;
1580 } else {
1581 esw_warn(dev, "egress ACL is not supported by FW\n");
1582 }
1583
1584 if (MLX5_CAP_ESW_INGRESS_ACL(dev, ft_support)) {
1585 err = mlx5_esw_ingress_acls_init(dev);
1586 if (err)
1587 goto err;
1588 } else {
1589 esw_warn(dev, "ingress ACL is not supported by FW\n");
1590 }
1591 esw->flags |= MLX5_ESWITCH_VPORT_ACL_NS_CREATED;
1592 return 0;
1593
1594 err:
1595 if (MLX5_CAP_ESW_EGRESS_ACL(dev, ft_support))
1596 mlx5_esw_egress_acls_cleanup(dev);
1597 return err;
1598 }
1599
mlx5_esw_acls_ns_cleanup(struct mlx5_eswitch * esw)1600 static void mlx5_esw_acls_ns_cleanup(struct mlx5_eswitch *esw)
1601 {
1602 struct mlx5_core_dev *dev = esw->dev;
1603
1604 esw->flags &= ~MLX5_ESWITCH_VPORT_ACL_NS_CREATED;
1605 if (MLX5_CAP_ESW_INGRESS_ACL(dev, ft_support))
1606 mlx5_esw_ingress_acls_cleanup(dev);
1607 if (MLX5_CAP_ESW_EGRESS_ACL(dev, ft_support))
1608 mlx5_esw_egress_acls_cleanup(dev);
1609 }
1610
1611 /**
1612 * mlx5_eswitch_enable_locked - Enable eswitch
1613 * @esw: Pointer to eswitch
1614 * @num_vfs: Enable eswitch for given number of VFs. This is optional.
1615 * Valid value are 0, > 0 and MLX5_ESWITCH_IGNORE_NUM_VFS.
1616 * Caller should pass num_vfs > 0 when enabling eswitch for
1617 * vf vports. Caller should pass num_vfs = 0, when eswitch
1618 * is enabled without sriov VFs or when caller
1619 * is unaware of the sriov state of the host PF on ECPF based
1620 * eswitch. Caller should pass < 0 when num_vfs should be
1621 * completely ignored. This is typically the case when eswitch
1622 * is enabled without sriov regardless of PF/ECPF system.
1623 * mlx5_eswitch_enable_locked() Enables eswitch in either legacy or offloads
1624 * mode. If num_vfs >=0 is provided, it setup VF related eswitch vports.
1625 * It returns 0 on success or error code on failure.
1626 */
mlx5_eswitch_enable_locked(struct mlx5_eswitch * esw,int num_vfs)1627 int mlx5_eswitch_enable_locked(struct mlx5_eswitch *esw, int num_vfs)
1628 {
1629 int err;
1630
1631 devl_assert_locked(priv_to_devlink(esw->dev));
1632
1633 if (!MLX5_CAP_ESW_FLOWTABLE_FDB(esw->dev, ft_support)) {
1634 esw_warn(esw->dev, "FDB is not supported, aborting ...\n");
1635 return -EOPNOTSUPP;
1636 }
1637
1638 mlx5_eswitch_get_devlink_param(esw);
1639
1640 err = mlx5_esw_acls_ns_init(esw);
1641 if (err)
1642 return err;
1643
1644 mlx5_eswitch_update_num_of_vfs(esw, num_vfs);
1645
1646 MLX5_NB_INIT(&esw->nb, eswitch_vport_event, NIC_VPORT_CHANGE);
1647 mlx5_eq_notifier_register(esw->dev, &esw->nb);
1648
1649 err = mlx5_esw_qos_init(esw);
1650 if (err)
1651 goto err_esw_init;
1652
1653 if (esw->mode == MLX5_ESWITCH_LEGACY) {
1654 err = esw_legacy_enable(esw);
1655 } else {
1656 err = esw_offloads_enable(esw);
1657 }
1658
1659 if (err)
1660 goto err_esw_init;
1661
1662 esw->fdb_table.flags |= MLX5_ESW_FDB_CREATED;
1663
1664 mlx5_eswitch_event_handler_register(esw);
1665
1666 esw_info(esw->dev, "Enable: mode(%s), nvfs(%d), necvfs(%d), active vports(%d)\n",
1667 esw->mode == MLX5_ESWITCH_LEGACY ? "LEGACY" : "OFFLOADS",
1668 esw->esw_funcs.num_vfs, esw->esw_funcs.num_ec_vfs, esw->enabled_vports);
1669
1670 mlx5_esw_mode_change_notify(esw, esw->mode);
1671
1672 return 0;
1673
1674 err_esw_init:
1675 mlx5_eq_notifier_unregister(esw->dev, &esw->nb);
1676 mlx5_esw_acls_ns_cleanup(esw);
1677 return err;
1678 }
1679
1680 /**
1681 * mlx5_eswitch_enable - Enable eswitch
1682 * @esw: Pointer to eswitch
1683 * @num_vfs: Enable eswitch switch for given number of VFs.
1684 * Caller must pass num_vfs > 0 when enabling eswitch for
1685 * vf vports.
1686 * mlx5_eswitch_enable() returns 0 on success or error code on failure.
1687 */
mlx5_eswitch_enable(struct mlx5_eswitch * esw,int num_vfs)1688 int mlx5_eswitch_enable(struct mlx5_eswitch *esw, int num_vfs)
1689 {
1690 bool toggle_lag;
1691 int ret = 0;
1692
1693 if (!mlx5_esw_allowed(esw))
1694 return 0;
1695
1696 devl_assert_locked(priv_to_devlink(esw->dev));
1697
1698 toggle_lag = !mlx5_esw_is_fdb_created(esw);
1699
1700 if (toggle_lag)
1701 mlx5_lag_disable_change(esw->dev);
1702
1703 if (!mlx5_esw_is_fdb_created(esw)) {
1704 ret = mlx5_eswitch_enable_locked(esw, num_vfs);
1705 } else {
1706 enum mlx5_eswitch_vport_event vport_events;
1707
1708 vport_events = (esw->mode == MLX5_ESWITCH_LEGACY) ?
1709 MLX5_LEGACY_SRIOV_VPORT_EVENTS : MLX5_VPORT_UC_ADDR_CHANGE;
1710 /* If this is the ECPF the number of host VFs is managed via the
1711 * eswitch function change event handler, and any num_vfs provided
1712 * here are intended to be EC VFs.
1713 */
1714 if (!mlx5_core_is_ecpf(esw->dev)) {
1715 ret = mlx5_eswitch_load_vf_vports(esw, num_vfs, vport_events);
1716 if (!ret)
1717 esw->esw_funcs.num_vfs = num_vfs;
1718 } else if (mlx5_core_ec_sriov_enabled(esw->dev)) {
1719 ret = mlx5_eswitch_load_ec_vf_vports(esw, num_vfs, vport_events);
1720 if (!ret)
1721 esw->esw_funcs.num_ec_vfs = num_vfs;
1722 }
1723 }
1724
1725 if (toggle_lag)
1726 mlx5_lag_enable_change(esw->dev);
1727
1728 return ret;
1729 }
1730
1731 /* When disabling sriov, free driver level resources. */
mlx5_eswitch_disable_sriov(struct mlx5_eswitch * esw,bool clear_vf)1732 void mlx5_eswitch_disable_sriov(struct mlx5_eswitch *esw, bool clear_vf)
1733 {
1734 if (!mlx5_esw_allowed(esw))
1735 return;
1736
1737 devl_assert_locked(priv_to_devlink(esw->dev));
1738 /* If driver is unloaded, this function is called twice by remove_one()
1739 * and mlx5_unload(). Prevent the second call.
1740 */
1741 if (!esw->esw_funcs.num_vfs && !esw->esw_funcs.num_ec_vfs && !clear_vf)
1742 return;
1743
1744 esw_info(esw->dev, "Unload vfs: mode(%s), nvfs(%d), necvfs(%d), active vports(%d)\n",
1745 esw->mode == MLX5_ESWITCH_LEGACY ? "LEGACY" : "OFFLOADS",
1746 esw->esw_funcs.num_vfs, esw->esw_funcs.num_ec_vfs, esw->enabled_vports);
1747
1748 if (!mlx5_core_is_ecpf(esw->dev)) {
1749 mlx5_eswitch_unload_vf_vports(esw, esw->esw_funcs.num_vfs);
1750 if (clear_vf)
1751 mlx5_eswitch_clear_vf_vports_info(esw);
1752 } else if (mlx5_core_ec_sriov_enabled(esw->dev)) {
1753 mlx5_eswitch_unload_ec_vf_vports(esw, esw->esw_funcs.num_ec_vfs);
1754 if (clear_vf)
1755 mlx5_eswitch_clear_ec_vf_vports_info(esw);
1756 }
1757
1758 if (esw->mode == MLX5_ESWITCH_OFFLOADS) {
1759 struct devlink *devlink = priv_to_devlink(esw->dev);
1760
1761 devl_rate_nodes_destroy(devlink);
1762 }
1763 /* Destroy legacy fdb when disabling sriov in legacy mode. */
1764 if (esw->mode == MLX5_ESWITCH_LEGACY)
1765 mlx5_eswitch_disable_locked(esw);
1766
1767 if (!mlx5_core_is_ecpf(esw->dev))
1768 esw->esw_funcs.num_vfs = 0;
1769 else
1770 esw->esw_funcs.num_ec_vfs = 0;
1771 }
1772
1773 /* Free resources for corresponding eswitch mode. It is called by devlink
1774 * when changing eswitch mode or modprobe when unloading driver.
1775 */
mlx5_eswitch_disable_locked(struct mlx5_eswitch * esw)1776 void mlx5_eswitch_disable_locked(struct mlx5_eswitch *esw)
1777 {
1778 struct devlink *devlink = priv_to_devlink(esw->dev);
1779
1780 /* Notify eswitch users that it is exiting from current mode.
1781 * So that it can do necessary cleanup before the eswitch is disabled.
1782 */
1783 mlx5_esw_mode_change_notify(esw, MLX5_ESWITCH_LEGACY);
1784
1785 mlx5_eq_notifier_unregister(esw->dev, &esw->nb);
1786 mlx5_eswitch_event_handler_unregister(esw);
1787
1788 esw_info(esw->dev, "Disable: mode(%s), nvfs(%d), necvfs(%d), active vports(%d)\n",
1789 esw->mode == MLX5_ESWITCH_LEGACY ? "LEGACY" : "OFFLOADS",
1790 esw->esw_funcs.num_vfs, esw->esw_funcs.num_ec_vfs, esw->enabled_vports);
1791
1792 if (esw->fdb_table.flags & MLX5_ESW_FDB_CREATED) {
1793 esw->fdb_table.flags &= ~MLX5_ESW_FDB_CREATED;
1794 if (esw->mode == MLX5_ESWITCH_OFFLOADS)
1795 esw_offloads_disable(esw);
1796 else if (esw->mode == MLX5_ESWITCH_LEGACY)
1797 esw_legacy_disable(esw);
1798 mlx5_esw_acls_ns_cleanup(esw);
1799 }
1800
1801 if (esw->mode == MLX5_ESWITCH_OFFLOADS)
1802 devl_rate_nodes_destroy(devlink);
1803 }
1804
mlx5_eswitch_disable(struct mlx5_eswitch * esw)1805 void mlx5_eswitch_disable(struct mlx5_eswitch *esw)
1806 {
1807 if (!mlx5_esw_allowed(esw))
1808 return;
1809
1810 devl_assert_locked(priv_to_devlink(esw->dev));
1811 mlx5_lag_disable_change(esw->dev);
1812 mlx5_eswitch_disable_locked(esw);
1813 esw->mode = MLX5_ESWITCH_LEGACY;
1814 mlx5_lag_enable_change(esw->dev);
1815 }
1816
mlx5_query_hca_cap_host_pf(struct mlx5_core_dev * dev,void * out)1817 static int mlx5_query_hca_cap_host_pf(struct mlx5_core_dev *dev, void *out)
1818 {
1819 u16 opmod = (MLX5_CAP_GENERAL << 1) | (HCA_CAP_OPMOD_GET_MAX & 0x01);
1820 u8 in[MLX5_ST_SZ_BYTES(query_hca_cap_in)] = {};
1821
1822 MLX5_SET(query_hca_cap_in, in, opcode, MLX5_CMD_OP_QUERY_HCA_CAP);
1823 MLX5_SET(query_hca_cap_in, in, op_mod, opmod);
1824 MLX5_SET(query_hca_cap_in, in, function_id, MLX5_VPORT_PF);
1825 MLX5_SET(query_hca_cap_in, in, other_function, true);
1826 return mlx5_cmd_exec_inout(dev, query_hca_cap, in, out);
1827 }
1828
mlx5_esw_sf_max_hpf_functions(struct mlx5_core_dev * dev,u16 * max_sfs,u16 * sf_base_id)1829 int mlx5_esw_sf_max_hpf_functions(struct mlx5_core_dev *dev, u16 *max_sfs, u16 *sf_base_id)
1830
1831 {
1832 int query_out_sz = MLX5_ST_SZ_BYTES(query_hca_cap_out);
1833 void *query_ctx;
1834 void *hca_caps;
1835 int err;
1836
1837 if (!mlx5_core_is_ecpf(dev) ||
1838 !mlx5_esw_host_functions_enabled(dev)) {
1839 *max_sfs = 0;
1840 return 0;
1841 }
1842
1843 query_ctx = kzalloc(query_out_sz, GFP_KERNEL);
1844 if (!query_ctx)
1845 return -ENOMEM;
1846
1847 err = mlx5_query_hca_cap_host_pf(dev, query_ctx);
1848 if (err)
1849 goto out_free;
1850
1851 hca_caps = MLX5_ADDR_OF(query_hca_cap_out, query_ctx, capability);
1852 *max_sfs = MLX5_GET(cmd_hca_cap, hca_caps, max_num_sf);
1853 *sf_base_id = MLX5_GET(cmd_hca_cap, hca_caps, sf_base_id);
1854
1855 out_free:
1856 kfree(query_ctx);
1857 return err;
1858 }
1859
mlx5_esw_vport_alloc(struct mlx5_eswitch * esw,int index,u16 vport_num)1860 int mlx5_esw_vport_alloc(struct mlx5_eswitch *esw, int index, u16 vport_num)
1861 {
1862 struct mlx5_vport *vport;
1863 int err;
1864
1865 vport = kzalloc_obj(*vport);
1866 if (!vport)
1867 return -ENOMEM;
1868
1869 vport->dev = esw->dev;
1870 vport->vport = vport_num;
1871 vport->index = index;
1872 vport->info.link_state = MLX5_VPORT_ADMIN_STATE_AUTO;
1873 vport->vhca_id = MLX5_VHCA_ID_INVALID;
1874 INIT_WORK(&vport->vport_change_handler, esw_vport_change_handler);
1875 err = xa_insert(&esw->vports, vport_num, vport, GFP_KERNEL);
1876 if (err)
1877 goto insert_err;
1878
1879 esw->total_vports++;
1880 return 0;
1881
1882 insert_err:
1883 kfree(vport);
1884 return err;
1885 }
1886
mlx5_esw_vport_free(struct mlx5_eswitch * esw,struct mlx5_vport * vport)1887 void mlx5_esw_vport_free(struct mlx5_eswitch *esw, struct mlx5_vport *vport)
1888 {
1889 esw->total_vports--;
1890 xa_erase(&esw->vports, vport->vport);
1891 kfree(vport);
1892 }
1893
mlx5_esw_vports_cleanup(struct mlx5_eswitch * esw)1894 static void mlx5_esw_vports_cleanup(struct mlx5_eswitch *esw)
1895 {
1896 struct mlx5_vport *vport;
1897 unsigned long i;
1898
1899 mlx5_esw_for_each_vport(esw, i, vport)
1900 mlx5_esw_vport_free(esw, vport);
1901 xa_destroy(&esw->vports);
1902 }
1903
mlx5_esw_vports_init(struct mlx5_eswitch * esw)1904 static int mlx5_esw_vports_init(struct mlx5_eswitch *esw)
1905 {
1906 struct mlx5_core_dev *dev = esw->dev;
1907 u16 max_host_pf_sfs;
1908 u16 base_sf_num;
1909 int idx = 0;
1910 int err;
1911 int i;
1912
1913 xa_init(&esw->vports);
1914
1915 if (mlx5_esw_host_functions_enabled(dev)) {
1916 err = mlx5_esw_vport_alloc(esw, idx, MLX5_VPORT_PF);
1917 if (err)
1918 goto err;
1919 if (esw->first_host_vport == MLX5_VPORT_PF)
1920 xa_set_mark(&esw->vports, idx, MLX5_ESW_VPT_HOST_FN);
1921 idx++;
1922 for (i = 0; i < mlx5_core_max_vfs(dev); i++) {
1923 err = mlx5_esw_vport_alloc(esw, idx, idx);
1924 if (err)
1925 goto err;
1926 xa_set_mark(&esw->vports, idx, MLX5_ESW_VPT_VF);
1927 xa_set_mark(&esw->vports, idx, MLX5_ESW_VPT_HOST_FN);
1928 idx++;
1929 }
1930 }
1931
1932 base_sf_num = mlx5_sf_start_function_id(dev);
1933 for (i = 0; i < mlx5_sf_max_functions(dev); i++) {
1934 err = mlx5_esw_vport_alloc(esw, idx, base_sf_num + i);
1935 if (err)
1936 goto err;
1937 xa_set_mark(&esw->vports, base_sf_num + i, MLX5_ESW_VPT_SF);
1938 idx++;
1939 }
1940
1941 err = mlx5_esw_sf_max_hpf_functions(dev, &max_host_pf_sfs, &base_sf_num);
1942 if (err)
1943 goto err;
1944 for (i = 0; i < max_host_pf_sfs; i++) {
1945 err = mlx5_esw_vport_alloc(esw, idx, base_sf_num + i);
1946 if (err)
1947 goto err;
1948 xa_set_mark(&esw->vports, base_sf_num + i, MLX5_ESW_VPT_SF);
1949 idx++;
1950 }
1951
1952 if (mlx5_core_ec_sriov_enabled(esw->dev)) {
1953 int ec_vf_base_num = mlx5_core_ec_vf_vport_base(dev);
1954
1955 for (i = 0; i < mlx5_core_max_ec_vfs(esw->dev); i++) {
1956 err = mlx5_esw_vport_alloc(esw, idx, ec_vf_base_num + i);
1957 if (err)
1958 goto err;
1959 idx++;
1960 }
1961 }
1962
1963 if (mlx5_ecpf_vport_exists(dev) ||
1964 mlx5_core_is_ecpf_esw_manager(dev)) {
1965 err = mlx5_esw_vport_alloc(esw, idx, MLX5_VPORT_ECPF);
1966 if (err)
1967 goto err;
1968 idx++;
1969 }
1970 err = mlx5_esw_vport_alloc(esw, idx, MLX5_VPORT_UPLINK);
1971 if (err)
1972 goto err;
1973
1974 /* Adjacent vports or other dynamically create vports will use this */
1975 esw->last_vport_idx = ++idx;
1976 return 0;
1977
1978 err:
1979 mlx5_esw_vports_cleanup(esw);
1980 return err;
1981 }
1982
mlx5_devlink_esw_multiport_set(struct devlink * devlink,u32 id,struct devlink_param_gset_ctx * ctx,struct netlink_ext_ack * extack)1983 static int mlx5_devlink_esw_multiport_set(struct devlink *devlink, u32 id,
1984 struct devlink_param_gset_ctx *ctx,
1985 struct netlink_ext_ack *extack)
1986 {
1987 struct mlx5_core_dev *dev = devlink_priv(devlink);
1988
1989 if (!MLX5_ESWITCH_MANAGER(dev))
1990 return -EOPNOTSUPP;
1991
1992 if (ctx->val.vbool)
1993 return mlx5_lag_mpesw_enable(dev);
1994
1995 mlx5_lag_mpesw_disable(dev);
1996 return 0;
1997 }
1998
mlx5_devlink_esw_multiport_get(struct devlink * devlink,u32 id,struct devlink_param_gset_ctx * ctx,struct netlink_ext_ack * extack)1999 static int mlx5_devlink_esw_multiport_get(struct devlink *devlink, u32 id,
2000 struct devlink_param_gset_ctx *ctx,
2001 struct netlink_ext_ack *extack)
2002 {
2003 struct mlx5_core_dev *dev = devlink_priv(devlink);
2004
2005 ctx->val.vbool = mlx5_lag_is_mpesw(dev);
2006 return 0;
2007 }
2008
2009 static const struct devlink_param mlx5_eswitch_params[] = {
2010 DEVLINK_PARAM_DRIVER(MLX5_DEVLINK_PARAM_ID_ESW_MULTIPORT,
2011 "esw_multiport", DEVLINK_PARAM_TYPE_BOOL,
2012 BIT(DEVLINK_PARAM_CMODE_RUNTIME),
2013 mlx5_devlink_esw_multiport_get,
2014 mlx5_devlink_esw_multiport_set, NULL),
2015 };
2016
mlx5_eswitch_init(struct mlx5_core_dev * dev)2017 int mlx5_eswitch_init(struct mlx5_core_dev *dev)
2018 {
2019 struct mlx5_eswitch *esw;
2020 int err;
2021
2022 if (!MLX5_VPORT_MANAGER(dev) && !MLX5_ESWITCH_MANAGER(dev))
2023 return 0;
2024
2025 esw = kzalloc_obj(*esw);
2026 if (!esw)
2027 return -ENOMEM;
2028
2029 err = devl_params_register(priv_to_devlink(dev), mlx5_eswitch_params,
2030 ARRAY_SIZE(mlx5_eswitch_params));
2031 if (err)
2032 goto free_esw;
2033
2034 esw->dev = dev;
2035 dev->priv.eswitch = esw;
2036 esw->manager_vport = mlx5_eswitch_manager_vport(dev);
2037 esw->first_host_vport = mlx5_eswitch_first_host_vport_num(dev);
2038
2039 esw->debugfs_root = debugfs_create_dir("esw", mlx5_debugfs_get_dev_root(dev));
2040 esw->work_queue = create_singlethread_workqueue("mlx5_esw_wq");
2041 if (!esw->work_queue) {
2042 err = -ENOMEM;
2043 goto abort;
2044 }
2045
2046 err = mlx5_esw_host_functions_enabled_query(esw);
2047 if (err)
2048 goto abort;
2049
2050 err = mlx5_esw_vports_init(esw);
2051 if (err)
2052 goto abort;
2053
2054 err = esw_offloads_init(esw);
2055 if (err)
2056 goto reps_err;
2057
2058 esw->mode = MLX5_ESWITCH_LEGACY;
2059 err = mlx5_esw_qos_init(esw);
2060 if (err)
2061 goto reps_err;
2062
2063 mutex_init(&esw->offloads.encap_tbl_lock);
2064 hash_init(esw->offloads.encap_tbl);
2065 mutex_init(&esw->offloads.decap_tbl_lock);
2066 hash_init(esw->offloads.decap_tbl);
2067 mlx5e_mod_hdr_tbl_init(&esw->offloads.mod_hdr);
2068 atomic64_set(&esw->offloads.num_flows, 0);
2069 ida_init(&esw->offloads.vport_metadata_ida);
2070 xa_init_flags(&esw->offloads.vhca_map, XA_FLAGS_ALLOC);
2071 mutex_init(&esw->state_lock);
2072 init_rwsem(&esw->mode_lock);
2073 refcount_set(&esw->qos.refcnt, 0);
2074
2075 esw->enabled_vports = 0;
2076 esw->offloads.inline_mode = MLX5_INLINE_MODE_NONE;
2077 if (MLX5_CAP_ESW_FLOWTABLE_FDB(dev, reformat) &&
2078 MLX5_CAP_ESW_FLOWTABLE_FDB(dev, decap))
2079 esw->offloads.encap = DEVLINK_ESWITCH_ENCAP_MODE_BASIC;
2080 else
2081 esw->offloads.encap = DEVLINK_ESWITCH_ENCAP_MODE_NONE;
2082
2083 esw_info(dev,
2084 "Total vports %d, per vport: max uc(%d) max mc(%d)\n",
2085 esw->total_vports,
2086 MLX5_MAX_UC_PER_VPORT(dev),
2087 MLX5_MAX_MC_PER_VPORT(dev));
2088 return 0;
2089
2090 reps_err:
2091 mlx5_esw_vports_cleanup(esw);
2092 dev->priv.eswitch = NULL;
2093 abort:
2094 if (esw->work_queue)
2095 destroy_workqueue(esw->work_queue);
2096 debugfs_remove_recursive(esw->debugfs_root);
2097 devl_params_unregister(priv_to_devlink(dev), mlx5_eswitch_params,
2098 ARRAY_SIZE(mlx5_eswitch_params));
2099 free_esw:
2100 kfree(esw);
2101 return err;
2102 }
2103
mlx5_eswitch_cleanup(struct mlx5_eswitch * esw)2104 void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw)
2105 {
2106 if (!esw)
2107 return;
2108
2109 esw_info(esw->dev, "cleanup\n");
2110
2111 mlx5_esw_qos_cleanup(esw);
2112 destroy_workqueue(esw->work_queue);
2113 WARN_ON(refcount_read(&esw->qos.refcnt));
2114 mutex_destroy(&esw->state_lock);
2115 WARN_ON(!xa_empty(&esw->offloads.vhca_map));
2116 xa_destroy(&esw->offloads.vhca_map);
2117 ida_destroy(&esw->offloads.vport_metadata_ida);
2118 mlx5e_mod_hdr_tbl_destroy(&esw->offloads.mod_hdr);
2119 mutex_destroy(&esw->offloads.encap_tbl_lock);
2120 mutex_destroy(&esw->offloads.decap_tbl_lock);
2121 esw_offloads_cleanup(esw);
2122 esw->dev->priv.eswitch = NULL;
2123 mlx5_esw_vports_cleanup(esw);
2124 debugfs_remove_recursive(esw->debugfs_root);
2125 devl_params_unregister(priv_to_devlink(esw->dev), mlx5_eswitch_params,
2126 ARRAY_SIZE(mlx5_eswitch_params));
2127 kfree(esw);
2128 }
2129
2130 /* Vport Administration */
2131 static int
mlx5_esw_set_vport_mac_locked(struct mlx5_eswitch * esw,struct mlx5_vport * evport,const u8 * mac)2132 mlx5_esw_set_vport_mac_locked(struct mlx5_eswitch *esw,
2133 struct mlx5_vport *evport, const u8 *mac)
2134 {
2135 u16 vport_num = evport->vport;
2136 u64 node_guid;
2137 int err = 0;
2138
2139 if (is_multicast_ether_addr(mac))
2140 return -EINVAL;
2141
2142 if (evport->info.spoofchk && !is_valid_ether_addr(mac))
2143 mlx5_core_warn(esw->dev,
2144 "Set invalid MAC while spoofchk is on, vport(%d)\n",
2145 vport_num);
2146
2147 err = mlx5_modify_nic_vport_mac_address(esw->dev, vport_num, mac);
2148 if (err) {
2149 mlx5_core_warn(esw->dev,
2150 "Failed to mlx5_modify_nic_vport_mac vport(%d) err=(%d)\n",
2151 vport_num, err);
2152 return err;
2153 }
2154
2155 node_guid_gen_from_mac(&node_guid, mac);
2156 err = mlx5_modify_nic_vport_node_guid(esw->dev, vport_num, node_guid);
2157 if (err)
2158 mlx5_core_warn(esw->dev,
2159 "Failed to set vport %d node guid, err = %d. RDMA_CM will not function properly for this VF.\n",
2160 vport_num, err);
2161
2162 ether_addr_copy(evport->info.mac, mac);
2163 evport->info.node_guid = node_guid;
2164 if (evport->enabled && esw->mode == MLX5_ESWITCH_LEGACY)
2165 err = esw_acl_ingress_lgcy_setup(esw, evport);
2166
2167 return err;
2168 }
2169
mlx5_eswitch_set_vport_mac(struct mlx5_eswitch * esw,u16 vport,const u8 * mac)2170 int mlx5_eswitch_set_vport_mac(struct mlx5_eswitch *esw,
2171 u16 vport, const u8 *mac)
2172 {
2173 struct mlx5_vport *evport = mlx5_eswitch_get_vport(esw, vport);
2174 int err = 0;
2175
2176 if (IS_ERR(evport))
2177 return PTR_ERR(evport);
2178
2179 mutex_lock(&esw->state_lock);
2180 err = mlx5_esw_set_vport_mac_locked(esw, evport, mac);
2181 mutex_unlock(&esw->state_lock);
2182 return err;
2183 }
2184
mlx5_esw_check_port_type(struct mlx5_eswitch * esw,u16 vport_num,xa_mark_t mark)2185 static bool mlx5_esw_check_port_type(struct mlx5_eswitch *esw, u16 vport_num, xa_mark_t mark)
2186 {
2187 return xa_get_mark(&esw->vports, vport_num, mark);
2188 }
2189
mlx5_eswitch_is_vf_vport(struct mlx5_eswitch * esw,u16 vport_num)2190 bool mlx5_eswitch_is_vf_vport(struct mlx5_eswitch *esw, u16 vport_num)
2191 {
2192 return mlx5_esw_check_port_type(esw, vport_num, MLX5_ESW_VPT_VF);
2193 }
2194
mlx5_eswitch_is_pf_vf_vport(struct mlx5_eswitch * esw,u16 vport_num)2195 bool mlx5_eswitch_is_pf_vf_vport(struct mlx5_eswitch *esw, u16 vport_num)
2196 {
2197 return vport_num == MLX5_VPORT_PF ||
2198 mlx5_eswitch_is_vf_vport(esw, vport_num);
2199 }
2200
mlx5_esw_is_sf_vport(struct mlx5_eswitch * esw,u16 vport_num)2201 bool mlx5_esw_is_sf_vport(struct mlx5_eswitch *esw, u16 vport_num)
2202 {
2203 return mlx5_esw_check_port_type(esw, vport_num, MLX5_ESW_VPT_SF);
2204 }
2205
mlx5_eswitch_set_vport_state(struct mlx5_eswitch * esw,u16 vport,int link_state)2206 int mlx5_eswitch_set_vport_state(struct mlx5_eswitch *esw,
2207 u16 vport, int link_state)
2208 {
2209 struct mlx5_vport *evport = mlx5_eswitch_get_vport(esw, vport);
2210 int opmod = MLX5_VPORT_STATE_OP_MOD_ESW_VPORT;
2211 int other_vport = 1;
2212 int err = 0;
2213
2214 if (!mlx5_esw_allowed(esw))
2215 return -EPERM;
2216 if (IS_ERR(evport))
2217 return PTR_ERR(evport);
2218
2219 if (vport == MLX5_VPORT_UPLINK) {
2220 opmod = MLX5_VPORT_STATE_OP_MOD_UPLINK;
2221 other_vport = 0;
2222 vport = 0;
2223 }
2224 mutex_lock(&esw->state_lock);
2225 if (esw->mode != MLX5_ESWITCH_LEGACY) {
2226 err = -EOPNOTSUPP;
2227 goto unlock;
2228 }
2229
2230 err = mlx5_modify_vport_admin_state(esw->dev, opmod, vport, other_vport, link_state);
2231 if (err) {
2232 mlx5_core_warn(esw->dev, "Failed to set vport %d link state, opmod = %d, err = %d",
2233 vport, opmod, err);
2234 goto unlock;
2235 }
2236
2237 evport->info.link_state = link_state;
2238
2239 unlock:
2240 mutex_unlock(&esw->state_lock);
2241 return err;
2242 }
2243
mlx5_eswitch_get_vport_config(struct mlx5_eswitch * esw,u16 vport,struct ifla_vf_info * ivi)2244 int mlx5_eswitch_get_vport_config(struct mlx5_eswitch *esw,
2245 u16 vport, struct ifla_vf_info *ivi)
2246 {
2247 struct mlx5_vport *evport = mlx5_eswitch_get_vport(esw, vport);
2248 u32 max_rate, min_rate;
2249
2250 if (IS_ERR(evport))
2251 return PTR_ERR(evport);
2252
2253 memset(ivi, 0, sizeof(*ivi));
2254 ivi->vf = vport - 1;
2255
2256 mutex_lock(&esw->state_lock);
2257
2258 mlx5_query_nic_vport_mac_address(esw->dev, vport, true,
2259 evport->info.mac);
2260 ether_addr_copy(ivi->mac, evport->info.mac);
2261 ivi->linkstate = evport->info.link_state;
2262 ivi->vlan = evport->info.vlan;
2263 ivi->qos = evport->info.qos;
2264 ivi->spoofchk = evport->info.spoofchk;
2265 ivi->trusted = evport->info.trusted;
2266
2267 if (mlx5_esw_qos_get_vport_rate(evport, &max_rate, &min_rate)) {
2268 ivi->max_tx_rate = max_rate;
2269 ivi->min_tx_rate = min_rate;
2270 }
2271 mutex_unlock(&esw->state_lock);
2272
2273 return 0;
2274 }
2275
__mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch * esw,u16 vport,u16 vlan,u8 qos,u8 set_flags)2276 int __mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw,
2277 u16 vport, u16 vlan, u8 qos, u8 set_flags)
2278 {
2279 struct mlx5_vport *evport = mlx5_eswitch_get_vport(esw, vport);
2280 bool vst_mode_steering = esw_vst_mode_is_steering(esw);
2281 int err = 0;
2282
2283 if (IS_ERR(evport))
2284 return PTR_ERR(evport);
2285 if (vlan > 4095 || qos > 7)
2286 return -EINVAL;
2287
2288 if (esw->mode == MLX5_ESWITCH_OFFLOADS || !vst_mode_steering) {
2289 err = modify_esw_vport_cvlan(esw->dev, vport, vlan, qos, set_flags);
2290 if (err)
2291 return err;
2292 }
2293
2294 evport->info.vlan = vlan;
2295 evport->info.qos = qos;
2296 if (evport->enabled && esw->mode == MLX5_ESWITCH_LEGACY) {
2297 err = esw_acl_ingress_lgcy_setup(esw, evport);
2298 if (err)
2299 return err;
2300 err = esw_acl_egress_lgcy_setup(esw, evport);
2301 }
2302
2303 return err;
2304 }
2305
mlx5_eswitch_get_vport_stats(struct mlx5_eswitch * esw,u16 vport_num,struct ifla_vf_stats * vf_stats)2306 int mlx5_eswitch_get_vport_stats(struct mlx5_eswitch *esw,
2307 u16 vport_num,
2308 struct ifla_vf_stats *vf_stats)
2309 {
2310 struct mlx5_vport *vport = mlx5_eswitch_get_vport(esw, vport_num);
2311 int outlen = MLX5_ST_SZ_BYTES(query_vport_counter_out);
2312 u32 in[MLX5_ST_SZ_DW(query_vport_counter_in)] = {};
2313 struct mlx5_vport_drop_stats stats = {};
2314 int err = 0;
2315 u32 *out;
2316
2317 if (IS_ERR(vport))
2318 return PTR_ERR(vport);
2319
2320 out = kvzalloc(outlen, GFP_KERNEL);
2321 if (!out)
2322 return -ENOMEM;
2323
2324 MLX5_SET(query_vport_counter_in, in, opcode,
2325 MLX5_CMD_OP_QUERY_VPORT_COUNTER);
2326 MLX5_SET(query_vport_counter_in, in, op_mod, 0);
2327 MLX5_SET(query_vport_counter_in, in, vport_number, vport->vport);
2328 MLX5_SET(query_vport_counter_in, in, other_vport, 1);
2329
2330 err = mlx5_cmd_exec_inout(esw->dev, query_vport_counter, in, out);
2331 if (err)
2332 goto free_out;
2333
2334 #define MLX5_GET_CTR(p, x) \
2335 MLX5_GET64(query_vport_counter_out, p, x)
2336
2337 memset(vf_stats, 0, sizeof(*vf_stats));
2338 vf_stats->rx_packets =
2339 MLX5_GET_CTR(out, received_eth_unicast.packets) +
2340 MLX5_GET_CTR(out, received_ib_unicast.packets) +
2341 MLX5_GET_CTR(out, received_eth_multicast.packets) +
2342 MLX5_GET_CTR(out, received_ib_multicast.packets) +
2343 MLX5_GET_CTR(out, received_eth_broadcast.packets);
2344
2345 vf_stats->rx_bytes =
2346 MLX5_GET_CTR(out, received_eth_unicast.octets) +
2347 MLX5_GET_CTR(out, received_ib_unicast.octets) +
2348 MLX5_GET_CTR(out, received_eth_multicast.octets) +
2349 MLX5_GET_CTR(out, received_ib_multicast.octets) +
2350 MLX5_GET_CTR(out, received_eth_broadcast.octets);
2351
2352 vf_stats->tx_packets =
2353 MLX5_GET_CTR(out, transmitted_eth_unicast.packets) +
2354 MLX5_GET_CTR(out, transmitted_ib_unicast.packets) +
2355 MLX5_GET_CTR(out, transmitted_eth_multicast.packets) +
2356 MLX5_GET_CTR(out, transmitted_ib_multicast.packets) +
2357 MLX5_GET_CTR(out, transmitted_eth_broadcast.packets);
2358
2359 vf_stats->tx_bytes =
2360 MLX5_GET_CTR(out, transmitted_eth_unicast.octets) +
2361 MLX5_GET_CTR(out, transmitted_ib_unicast.octets) +
2362 MLX5_GET_CTR(out, transmitted_eth_multicast.octets) +
2363 MLX5_GET_CTR(out, transmitted_ib_multicast.octets) +
2364 MLX5_GET_CTR(out, transmitted_eth_broadcast.octets);
2365
2366 vf_stats->multicast =
2367 MLX5_GET_CTR(out, received_eth_multicast.packets) +
2368 MLX5_GET_CTR(out, received_ib_multicast.packets);
2369
2370 vf_stats->broadcast =
2371 MLX5_GET_CTR(out, received_eth_broadcast.packets);
2372
2373 err = mlx5_esw_query_vport_drop_stats(esw->dev, vport, &stats);
2374 if (err)
2375 goto free_out;
2376 vf_stats->rx_dropped = stats.rx_dropped;
2377 vf_stats->tx_dropped = stats.tx_dropped;
2378
2379 free_out:
2380 kvfree(out);
2381 return err;
2382 }
2383
mlx5_eswitch_mode(const struct mlx5_core_dev * dev)2384 u8 mlx5_eswitch_mode(const struct mlx5_core_dev *dev)
2385 {
2386 struct mlx5_eswitch *esw = dev->priv.eswitch;
2387
2388 return mlx5_esw_allowed(esw) ? esw->mode : MLX5_ESWITCH_LEGACY;
2389 }
2390 EXPORT_SYMBOL_GPL(mlx5_eswitch_mode);
2391
2392 enum devlink_eswitch_encap_mode
mlx5_eswitch_get_encap_mode(const struct mlx5_core_dev * dev)2393 mlx5_eswitch_get_encap_mode(const struct mlx5_core_dev *dev)
2394 {
2395 struct mlx5_eswitch *esw;
2396
2397 esw = dev->priv.eswitch;
2398 return (mlx5_eswitch_mode(dev) == MLX5_ESWITCH_OFFLOADS) ? esw->offloads.encap :
2399 DEVLINK_ESWITCH_ENCAP_MODE_NONE;
2400 }
2401 EXPORT_SYMBOL(mlx5_eswitch_get_encap_mode);
2402
mlx5_esw_multipath_prereq(struct mlx5_core_dev * dev0,struct mlx5_core_dev * dev1)2403 bool mlx5_esw_multipath_prereq(struct mlx5_core_dev *dev0,
2404 struct mlx5_core_dev *dev1)
2405 {
2406 return (dev0->priv.eswitch->mode == MLX5_ESWITCH_OFFLOADS &&
2407 dev1->priv.eswitch->mode == MLX5_ESWITCH_OFFLOADS);
2408 }
2409
mlx5_esw_event_notifier_register(struct mlx5_core_dev * dev,struct notifier_block * nb)2410 int mlx5_esw_event_notifier_register(struct mlx5_core_dev *dev,
2411 struct notifier_block *nb)
2412 {
2413 return blocking_notifier_chain_register(&dev->priv.esw_n_head, nb);
2414 }
2415
mlx5_esw_event_notifier_unregister(struct mlx5_core_dev * dev,struct notifier_block * nb)2416 void mlx5_esw_event_notifier_unregister(struct mlx5_core_dev *dev,
2417 struct notifier_block *nb)
2418 {
2419 blocking_notifier_chain_unregister(&dev->priv.esw_n_head, nb);
2420 }
2421
2422 /**
2423 * mlx5_esw_hold() - Try to take a read lock on esw mode lock.
2424 * @mdev: mlx5 core device.
2425 *
2426 * Should be called by esw resources callers.
2427 *
2428 * Return: true on success or false.
2429 */
mlx5_esw_hold(struct mlx5_core_dev * mdev)2430 bool mlx5_esw_hold(struct mlx5_core_dev *mdev)
2431 {
2432 struct mlx5_eswitch *esw = mdev->priv.eswitch;
2433
2434 /* e.g. VF doesn't have eswitch so nothing to do */
2435 if (!mlx5_esw_allowed(esw))
2436 return true;
2437
2438 if (down_read_trylock(&esw->mode_lock) != 0) {
2439 if (esw->eswitch_operation_in_progress) {
2440 up_read(&esw->mode_lock);
2441 return false;
2442 }
2443 return true;
2444 }
2445
2446 return false;
2447 }
2448
2449 /**
2450 * mlx5_esw_release() - Release a read lock on esw mode lock.
2451 * @mdev: mlx5 core device.
2452 */
mlx5_esw_release(struct mlx5_core_dev * mdev)2453 void mlx5_esw_release(struct mlx5_core_dev *mdev)
2454 {
2455 struct mlx5_eswitch *esw = mdev->priv.eswitch;
2456
2457 if (mlx5_esw_allowed(esw))
2458 up_read(&esw->mode_lock);
2459 }
2460
2461 /**
2462 * mlx5_esw_get() - Increase esw user count.
2463 * @mdev: mlx5 core device.
2464 */
mlx5_esw_get(struct mlx5_core_dev * mdev)2465 void mlx5_esw_get(struct mlx5_core_dev *mdev)
2466 {
2467 struct mlx5_eswitch *esw = mdev->priv.eswitch;
2468
2469 if (mlx5_esw_allowed(esw))
2470 atomic64_inc(&esw->user_count);
2471 }
2472
2473 /**
2474 * mlx5_esw_put() - Decrease esw user count.
2475 * @mdev: mlx5 core device.
2476 */
mlx5_esw_put(struct mlx5_core_dev * mdev)2477 void mlx5_esw_put(struct mlx5_core_dev *mdev)
2478 {
2479 struct mlx5_eswitch *esw = mdev->priv.eswitch;
2480
2481 if (mlx5_esw_allowed(esw))
2482 atomic64_dec_if_positive(&esw->user_count);
2483 }
2484
2485 /**
2486 * mlx5_esw_try_lock() - Take a write lock on esw mode lock.
2487 * @esw: eswitch device.
2488 *
2489 * Should be called by esw mode change routine.
2490 *
2491 * Return:
2492 * * 0 - esw mode if successfully locked and refcount is 0.
2493 * * -EBUSY - refcount is not 0.
2494 * * -EINVAL - In the middle of switching mode or lock is already held.
2495 */
mlx5_esw_try_lock(struct mlx5_eswitch * esw)2496 int mlx5_esw_try_lock(struct mlx5_eswitch *esw)
2497 {
2498 if (down_write_trylock(&esw->mode_lock) == 0)
2499 return -EINVAL;
2500
2501 if (esw->eswitch_operation_in_progress ||
2502 atomic64_read(&esw->user_count) > 0) {
2503 up_write(&esw->mode_lock);
2504 return -EBUSY;
2505 }
2506
2507 return esw->mode;
2508 }
2509
mlx5_esw_lock(struct mlx5_eswitch * esw)2510 int mlx5_esw_lock(struct mlx5_eswitch *esw)
2511 {
2512 down_write(&esw->mode_lock);
2513
2514 if (esw->eswitch_operation_in_progress) {
2515 up_write(&esw->mode_lock);
2516 return -EBUSY;
2517 }
2518
2519 return 0;
2520 }
2521
2522 /**
2523 * mlx5_esw_unlock() - Release write lock on esw mode lock
2524 * @esw: eswitch device.
2525 */
mlx5_esw_unlock(struct mlx5_eswitch * esw)2526 void mlx5_esw_unlock(struct mlx5_eswitch *esw)
2527 {
2528 up_write(&esw->mode_lock);
2529 }
2530
2531 /**
2532 * mlx5_eswitch_get_total_vports - Get total vports of the eswitch
2533 *
2534 * @dev: Pointer to core device
2535 *
2536 * mlx5_eswitch_get_total_vports returns total number of eswitch vports.
2537 */
mlx5_eswitch_get_total_vports(const struct mlx5_core_dev * dev)2538 u16 mlx5_eswitch_get_total_vports(const struct mlx5_core_dev *dev)
2539 {
2540 struct mlx5_eswitch *esw;
2541
2542 esw = dev->priv.eswitch;
2543 return mlx5_esw_allowed(esw) ? esw->total_vports : 0;
2544 }
2545 EXPORT_SYMBOL_GPL(mlx5_eswitch_get_total_vports);
2546
2547 /**
2548 * mlx5_eswitch_get_core_dev - Get the mdev device
2549 * @esw : eswitch device.
2550 *
2551 * Return the mellanox core device which manages the eswitch.
2552 */
mlx5_eswitch_get_core_dev(struct mlx5_eswitch * esw)2553 struct mlx5_core_dev *mlx5_eswitch_get_core_dev(struct mlx5_eswitch *esw)
2554 {
2555 return mlx5_esw_allowed(esw) ? esw->dev : NULL;
2556 }
2557 EXPORT_SYMBOL(mlx5_eswitch_get_core_dev);
2558
mlx5_eswitch_block_ipsec(struct mlx5_core_dev * dev)2559 bool mlx5_eswitch_block_ipsec(struct mlx5_core_dev *dev)
2560 {
2561 struct mlx5_eswitch *esw = dev->priv.eswitch;
2562
2563 if (!mlx5_esw_allowed(esw))
2564 return true;
2565
2566 mutex_lock(&esw->state_lock);
2567 if (esw->enabled_ipsec_vf_count) {
2568 mutex_unlock(&esw->state_lock);
2569 return false;
2570 }
2571
2572 dev->num_ipsec_offloads++;
2573 mutex_unlock(&esw->state_lock);
2574 return true;
2575 }
2576
mlx5_eswitch_unblock_ipsec(struct mlx5_core_dev * dev)2577 void mlx5_eswitch_unblock_ipsec(struct mlx5_core_dev *dev)
2578 {
2579 struct mlx5_eswitch *esw = dev->priv.eswitch;
2580
2581 if (!mlx5_esw_allowed(esw))
2582 /* Failure means no eswitch => core dev is not a PF */
2583 return;
2584
2585 mutex_lock(&esw->state_lock);
2586 dev->num_ipsec_offloads--;
2587 mutex_unlock(&esw->state_lock);
2588 }
2589
mlx5_esw_host_functions_enabled(const struct mlx5_core_dev * dev)2590 bool mlx5_esw_host_functions_enabled(const struct mlx5_core_dev *dev)
2591 {
2592 if (!dev->priv.eswitch)
2593 return true;
2594
2595 return !dev->priv.eswitch->esw_funcs.host_funcs_disabled;
2596 }
2597