1 // SPDX-License-Identifier: BSD-3-Clause-Clear 2 /* Copyright (C) 2020 MediaTek Inc. */ 3 4 #include <linux/firmware.h> 5 #include "mt76_connac2_mac.h" 6 #include "mt76_connac_mcu.h" 7 #include "mt792x_regs.h" 8 9 int mt76_connac_mcu_start_firmware(struct mt76_dev *dev, u32 addr, u32 option) 10 { 11 struct { 12 __le32 option; 13 __le32 addr; 14 } req = { 15 .option = cpu_to_le32(option), 16 .addr = cpu_to_le32(addr), 17 }; 18 19 return mt76_mcu_send_msg(dev, MCU_CMD(FW_START_REQ), &req, 20 sizeof(req), true); 21 } 22 EXPORT_SYMBOL_GPL(mt76_connac_mcu_start_firmware); 23 24 int mt76_connac_mcu_patch_sem_ctrl(struct mt76_dev *dev, bool get) 25 { 26 u32 op = get ? PATCH_SEM_GET : PATCH_SEM_RELEASE; 27 struct { 28 __le32 op; 29 } req = { 30 .op = cpu_to_le32(op), 31 }; 32 33 return mt76_mcu_send_msg(dev, MCU_CMD(PATCH_SEM_CONTROL), 34 &req, sizeof(req), true); 35 } 36 EXPORT_SYMBOL_GPL(mt76_connac_mcu_patch_sem_ctrl); 37 38 int mt76_connac_mcu_start_patch(struct mt76_dev *dev) 39 { 40 struct { 41 u8 check_crc; 42 u8 reserved[3]; 43 } req = { 44 .check_crc = 0, 45 }; 46 47 return mt76_mcu_send_msg(dev, MCU_CMD(PATCH_FINISH_REQ), 48 &req, sizeof(req), true); 49 } 50 EXPORT_SYMBOL_GPL(mt76_connac_mcu_start_patch); 51 52 #define MCU_PATCH_ADDRESS 0x200000 53 54 int mt76_connac_mcu_init_download(struct mt76_dev *dev, u32 addr, u32 len, 55 u32 mode) 56 { 57 struct { 58 __le32 addr; 59 __le32 len; 60 __le32 mode; 61 } req = { 62 .addr = cpu_to_le32(addr), 63 .len = cpu_to_le32(len), 64 .mode = cpu_to_le32(mode), 65 }; 66 int cmd; 67 68 if ((!is_connac_v1(dev) && addr == MCU_PATCH_ADDRESS) || 69 (is_connac2(dev) && addr == 0x900000) || 70 ((is_mt7925(dev) || is_mt7927(dev)) && (addr == 0x900000 || addr == 0xe0002800)) || 71 (is_mt7928(dev) && (addr == 0x900000 || addr == 0xe0002000)) || 72 (is_mt799x(dev) && addr == 0x900000)) 73 cmd = MCU_CMD(PATCH_START_REQ); 74 else 75 cmd = MCU_CMD(TARGET_ADDRESS_LEN_REQ); 76 77 return mt76_mcu_send_msg(dev, cmd, &req, sizeof(req), true); 78 } 79 EXPORT_SYMBOL_GPL(mt76_connac_mcu_init_download); 80 81 int mt76_connac_cb_mcu_patch_sem_ctrl(struct mt76_dev *dev, bool get) 82 { 83 u8 op = get ? PATCH_SEM_GET : PATCH_SEM_RELEASE; 84 struct { 85 u8 op; 86 u8 reserved[3]; 87 } req = { 88 .op = op, 89 }; 90 91 return mt76_mcu_send_msg(dev, MCU_CMD(CB_PATCH_SEM_CONTROL), 92 &req, sizeof(req), true); 93 } 94 EXPORT_SYMBOL_GPL(mt76_connac_cb_mcu_patch_sem_ctrl); 95 96 int mt76_connac_cb_mcu_start_patch(struct mt76_dev *dev) 97 { 98 struct { 99 __le32 reserved; 100 } req = { 101 .reserved = 0, 102 }; 103 104 return mt76_mcu_send_msg(dev, MCU_CMD(CB_PATCH_FINISH_REQ), 105 &req, sizeof(req), true); 106 } 107 EXPORT_SYMBOL_GPL(mt76_connac_cb_mcu_start_patch); 108 109 int mt76_connac_cb_mcu_init_download(struct mt76_dev *dev, u32 len) 110 { 111 struct { 112 __le32 addr; 113 __le32 len; 114 } req = { 115 .addr = 0, /* addr is meaningless for cbmcu fwdl */ 116 .len = cpu_to_le32(len), 117 }; 118 119 return mt76_mcu_send_msg(dev, MCU_CMD(CB_PATCH_START_REQ), &req, sizeof(req), true); 120 } 121 EXPORT_SYMBOL_GPL(mt76_connac_cb_mcu_init_download); 122 123 int mt76_connac_mcu_set_channel_domain(struct mt76_phy *phy) 124 { 125 int len, i, n_max_channels, n_2ch = 0, n_5ch = 0, n_6ch = 0; 126 struct mt76_connac_mcu_channel_domain { 127 u8 alpha2[4]; /* regulatory_request.alpha2 */ 128 u8 bw_2g; /* BW_20_40M 0 129 * BW_20M 1 130 * BW_20_40_80M 2 131 * BW_20_40_80_160M 3 132 * BW_20_40_80_8080M 4 133 */ 134 u8 bw_5g; 135 u8 bw_6g; 136 u8 pad; 137 u8 n_2ch; 138 u8 n_5ch; 139 u8 n_6ch; 140 u8 pad2; 141 } __packed hdr = { 142 .bw_2g = 0, 143 .bw_5g = 3, /* BW_20_40_80_160M */ 144 .bw_6g = 3, 145 }; 146 struct mt76_connac_mcu_chan { 147 __le16 hw_value; 148 __le16 pad; 149 __le32 flags; 150 } __packed channel; 151 struct mt76_dev *dev = phy->dev; 152 struct ieee80211_channel *chan; 153 struct sk_buff *skb; 154 155 n_max_channels = phy->sband_2g.sband.n_channels + 156 phy->sband_5g.sband.n_channels + 157 phy->sband_6g.sband.n_channels; 158 len = sizeof(hdr) + n_max_channels * sizeof(channel); 159 160 skb = mt76_mcu_msg_alloc(dev, NULL, len); 161 if (!skb) 162 return -ENOMEM; 163 164 skb_reserve(skb, sizeof(hdr)); 165 166 for (i = 0; i < phy->sband_2g.sband.n_channels; i++) { 167 chan = &phy->sband_2g.sband.channels[i]; 168 if (chan->flags & IEEE80211_CHAN_DISABLED) 169 continue; 170 171 channel.hw_value = cpu_to_le16(chan->hw_value); 172 channel.flags = cpu_to_le32(chan->flags); 173 channel.pad = 0; 174 175 skb_put_data(skb, &channel, sizeof(channel)); 176 n_2ch++; 177 } 178 for (i = 0; i < phy->sband_5g.sband.n_channels; i++) { 179 chan = &phy->sband_5g.sband.channels[i]; 180 if (chan->flags & IEEE80211_CHAN_DISABLED) 181 continue; 182 183 channel.hw_value = cpu_to_le16(chan->hw_value); 184 channel.flags = cpu_to_le32(chan->flags); 185 channel.pad = 0; 186 187 skb_put_data(skb, &channel, sizeof(channel)); 188 n_5ch++; 189 } 190 for (i = 0; i < phy->sband_6g.sband.n_channels; i++) { 191 chan = &phy->sband_6g.sband.channels[i]; 192 if (chan->flags & IEEE80211_CHAN_DISABLED) 193 continue; 194 195 channel.hw_value = cpu_to_le16(chan->hw_value); 196 channel.flags = cpu_to_le32(chan->flags); 197 channel.pad = 0; 198 199 skb_put_data(skb, &channel, sizeof(channel)); 200 n_6ch++; 201 } 202 203 BUILD_BUG_ON(sizeof(dev->alpha2) > sizeof(hdr.alpha2)); 204 memcpy(hdr.alpha2, dev->alpha2, sizeof(dev->alpha2)); 205 hdr.n_2ch = n_2ch; 206 hdr.n_5ch = n_5ch; 207 hdr.n_6ch = n_6ch; 208 209 memcpy(__skb_push(skb, sizeof(hdr)), &hdr, sizeof(hdr)); 210 211 return mt76_mcu_skb_send_msg(dev, skb, MCU_CE_CMD(SET_CHAN_DOMAIN), 212 false); 213 } 214 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_channel_domain); 215 216 int mt76_connac_mcu_set_mac_enable(struct mt76_dev *dev, int band, bool enable, 217 bool hdr_trans) 218 { 219 struct { 220 u8 enable; 221 u8 band; 222 u8 rsv[2]; 223 } __packed req_mac = { 224 .enable = enable, 225 .band = band, 226 }; 227 228 return mt76_mcu_send_msg(dev, MCU_EXT_CMD(MAC_INIT_CTRL), &req_mac, 229 sizeof(req_mac), true); 230 } 231 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_mac_enable); 232 233 int mt76_connac_mcu_set_vif_ps(struct mt76_dev *dev, struct ieee80211_vif *vif) 234 { 235 struct mt76_vif_link *mvif = (struct mt76_vif_link *)vif->drv_priv; 236 struct { 237 u8 bss_idx; 238 u8 ps_state; /* 0: device awake 239 * 1: static power save 240 * 2: dynamic power saving 241 */ 242 } req = { 243 .bss_idx = mvif->idx, 244 .ps_state = vif->cfg.ps ? 2 : 0, 245 }; 246 247 if (vif->type != NL80211_IFTYPE_STATION) 248 return -EOPNOTSUPP; 249 250 return mt76_mcu_send_msg(dev, MCU_CE_CMD(SET_PS_PROFILE), 251 &req, sizeof(req), false); 252 } 253 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_vif_ps); 254 255 int mt76_connac_mcu_set_rts_thresh(struct mt76_dev *dev, u32 val, u8 band) 256 { 257 struct { 258 u8 prot_idx; 259 u8 band; 260 u8 rsv[2]; 261 __le32 len_thresh; 262 __le32 pkt_thresh; 263 } __packed req = { 264 .prot_idx = 1, 265 .band = band, 266 .len_thresh = cpu_to_le32(val), 267 .pkt_thresh = cpu_to_le32(0x2), 268 }; 269 270 return mt76_mcu_send_msg(dev, MCU_EXT_CMD(PROTECT_CTRL), &req, 271 sizeof(req), true); 272 } 273 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_rts_thresh); 274 275 void mt76_connac_mcu_beacon_loss_iter(void *priv, u8 *mac, 276 struct ieee80211_vif *vif) 277 { 278 struct mt76_vif_link *mvif = (struct mt76_vif_link *)vif->drv_priv; 279 struct mt76_connac_beacon_loss_event *event = priv; 280 281 if (mvif->idx != event->bss_idx) 282 return; 283 284 if (!(vif->driver_flags & IEEE80211_VIF_BEACON_FILTER)) 285 return; 286 287 ieee80211_beacon_loss(vif); 288 } 289 EXPORT_SYMBOL_GPL(mt76_connac_mcu_beacon_loss_iter); 290 291 struct tlv * 292 mt76_connac_mcu_add_nested_tlv(struct sk_buff *skb, int tag, int len, 293 void *sta_ntlv, void *sta_wtbl) 294 { 295 struct sta_ntlv_hdr *ntlv_hdr = sta_ntlv; 296 struct tlv *sta_hdr = sta_wtbl; 297 struct tlv *ptlv, tlv = { 298 .tag = cpu_to_le16(tag), 299 .len = cpu_to_le16(len), 300 }; 301 u16 ntlv; 302 303 ptlv = skb_put_zero(skb, len); 304 memcpy(ptlv, &tlv, sizeof(tlv)); 305 306 ntlv = le16_to_cpu(ntlv_hdr->tlv_num); 307 ntlv_hdr->tlv_num = cpu_to_le16(ntlv + 1); 308 309 if (sta_hdr) { 310 len += le16_to_cpu(sta_hdr->len); 311 sta_hdr->len = cpu_to_le16(len); 312 } 313 314 return ptlv; 315 } 316 EXPORT_SYMBOL_GPL(mt76_connac_mcu_add_nested_tlv); 317 318 struct sk_buff * 319 __mt76_connac_mcu_alloc_sta_req(struct mt76_dev *dev, struct mt76_vif_link *mvif, 320 struct mt76_wcid *wcid, int len) 321 { 322 struct sta_req_hdr hdr = { 323 .bss_idx = mvif->idx, 324 .muar_idx = wcid ? mvif->omac_idx : 0, 325 .is_tlv_append = 1, 326 }; 327 struct sk_buff *skb; 328 329 if (wcid && !wcid->sta && !wcid->sta_disabled) 330 hdr.muar_idx = 0xe; 331 332 mt76_connac_mcu_get_wlan_idx(dev, wcid, &hdr.wlan_idx_lo, 333 &hdr.wlan_idx_hi); 334 skb = __mt76_mcu_msg_alloc(dev, NULL, len, len, GFP_ATOMIC); 335 if (!skb) 336 return ERR_PTR(-ENOMEM); 337 338 skb_put_data(skb, &hdr, sizeof(hdr)); 339 340 return skb; 341 } 342 EXPORT_SYMBOL_GPL(__mt76_connac_mcu_alloc_sta_req); 343 344 struct wtbl_req_hdr * 345 mt76_connac_mcu_alloc_wtbl_req(struct mt76_dev *dev, struct mt76_wcid *wcid, 346 int cmd, void *sta_wtbl, struct sk_buff **skb) 347 { 348 struct tlv *sta_hdr = sta_wtbl; 349 struct wtbl_req_hdr hdr = { 350 .operation = cmd, 351 }; 352 struct sk_buff *nskb = *skb; 353 354 mt76_connac_mcu_get_wlan_idx(dev, wcid, &hdr.wlan_idx_lo, 355 &hdr.wlan_idx_hi); 356 if (!nskb) { 357 nskb = mt76_mcu_msg_alloc(dev, NULL, 358 MT76_CONNAC_WTBL_UPDATE_MAX_SIZE); 359 if (!nskb) 360 return ERR_PTR(-ENOMEM); 361 362 *skb = nskb; 363 } 364 365 if (sta_hdr) 366 le16_add_cpu(&sta_hdr->len, sizeof(hdr)); 367 368 return skb_put_data(nskb, &hdr, sizeof(hdr)); 369 } 370 EXPORT_SYMBOL_GPL(mt76_connac_mcu_alloc_wtbl_req); 371 372 void mt76_connac_mcu_bss_omac_tlv(struct sk_buff *skb, 373 struct ieee80211_vif *vif) 374 { 375 struct mt76_vif_link *mvif = (struct mt76_vif_link *)vif->drv_priv; 376 u8 omac_idx = mvif->omac_idx; 377 struct bss_info_omac *omac; 378 struct tlv *tlv; 379 u32 type = 0; 380 381 switch (vif->type) { 382 case NL80211_IFTYPE_MONITOR: 383 case NL80211_IFTYPE_MESH_POINT: 384 case NL80211_IFTYPE_AP: 385 if (vif->p2p) 386 type = CONNECTION_P2P_GO; 387 else 388 type = CONNECTION_INFRA_AP; 389 break; 390 case NL80211_IFTYPE_STATION: 391 if (vif->p2p) 392 type = CONNECTION_P2P_GC; 393 else 394 type = CONNECTION_INFRA_STA; 395 break; 396 case NL80211_IFTYPE_ADHOC: 397 type = CONNECTION_IBSS_ADHOC; 398 break; 399 default: 400 WARN_ON(1); 401 break; 402 } 403 404 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_OMAC, sizeof(*omac)); 405 406 omac = (struct bss_info_omac *)tlv; 407 omac->conn_type = cpu_to_le32(type); 408 omac->omac_idx = mvif->omac_idx; 409 omac->band_idx = mvif->band_idx; 410 omac->hw_bss_idx = omac_idx > EXT_BSSID_START ? HW_BSSID_0 : omac_idx; 411 } 412 EXPORT_SYMBOL_GPL(mt76_connac_mcu_bss_omac_tlv); 413 414 void mt76_connac_mcu_sta_basic_tlv(struct mt76_dev *dev, struct sk_buff *skb, 415 struct ieee80211_bss_conf *link_conf, 416 struct ieee80211_link_sta *link_sta, 417 int conn_state, bool newly) 418 { 419 struct ieee80211_vif *vif = link_conf->vif; 420 struct sta_rec_basic *basic; 421 struct tlv *tlv; 422 int conn_type; 423 424 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BASIC, sizeof(*basic)); 425 426 basic = (struct sta_rec_basic *)tlv; 427 basic->extra_info = cpu_to_le16(EXTRA_INFO_VER); 428 429 if (newly && conn_state != CONN_STATE_DISCONNECT) 430 basic->extra_info |= cpu_to_le16(EXTRA_INFO_NEW); 431 basic->conn_state = conn_state; 432 433 if (!link_sta) { 434 basic->conn_type = cpu_to_le32(CONNECTION_INFRA_BC); 435 436 if (vif->type == NL80211_IFTYPE_STATION && 437 !is_zero_ether_addr(link_conf->bssid)) { 438 memcpy(basic->peer_addr, link_conf->bssid, ETH_ALEN); 439 basic->aid = cpu_to_le16(vif->cfg.aid); 440 } else { 441 eth_broadcast_addr(basic->peer_addr); 442 } 443 return; 444 } 445 446 switch (vif->type) { 447 case NL80211_IFTYPE_MESH_POINT: 448 case NL80211_IFTYPE_AP: 449 if (vif->p2p && !is_connac2(dev)) 450 conn_type = CONNECTION_P2P_GC; 451 else 452 conn_type = CONNECTION_INFRA_STA; 453 basic->conn_type = cpu_to_le32(conn_type); 454 basic->aid = cpu_to_le16(link_sta->sta->aid); 455 break; 456 case NL80211_IFTYPE_STATION: 457 if (vif->p2p && !is_connac2(dev)) 458 conn_type = CONNECTION_P2P_GO; 459 else 460 conn_type = CONNECTION_INFRA_AP; 461 basic->conn_type = cpu_to_le32(conn_type); 462 basic->aid = cpu_to_le16(vif->cfg.aid); 463 break; 464 case NL80211_IFTYPE_ADHOC: 465 basic->conn_type = cpu_to_le32(CONNECTION_IBSS_ADHOC); 466 basic->aid = cpu_to_le16(link_sta->sta->aid); 467 break; 468 case NL80211_IFTYPE_NAN: 469 case NL80211_IFTYPE_NAN_DATA: 470 basic->conn_type = cpu_to_le32(CONNECTION_NAN); 471 break; 472 default: 473 WARN_ON(1); 474 break; 475 } 476 477 memcpy(basic->peer_addr, link_sta->addr, ETH_ALEN); 478 basic->qos = link_sta->sta->wme; 479 } 480 EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_basic_tlv); 481 482 void mt76_connac_mcu_sta_uapsd(struct sk_buff *skb, struct ieee80211_vif *vif, 483 struct ieee80211_sta *sta) 484 { 485 struct sta_rec_uapsd *uapsd; 486 struct tlv *tlv; 487 488 if (vif->type != NL80211_IFTYPE_AP || !sta->wme) 489 return; 490 491 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_APPS, sizeof(*uapsd)); 492 uapsd = (struct sta_rec_uapsd *)tlv; 493 494 if (sta->uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_VO) { 495 uapsd->dac_map |= BIT(3); 496 uapsd->tac_map |= BIT(3); 497 } 498 if (sta->uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_VI) { 499 uapsd->dac_map |= BIT(2); 500 uapsd->tac_map |= BIT(2); 501 } 502 if (sta->uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_BE) { 503 uapsd->dac_map |= BIT(1); 504 uapsd->tac_map |= BIT(1); 505 } 506 if (sta->uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_BK) { 507 uapsd->dac_map |= BIT(0); 508 uapsd->tac_map |= BIT(0); 509 } 510 uapsd->max_sp = sta->max_sp; 511 } 512 EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_uapsd); 513 514 void mt76_connac_mcu_wtbl_hdr_trans_tlv(struct sk_buff *skb, 515 struct ieee80211_vif *vif, 516 struct mt76_wcid *wcid, 517 void *sta_wtbl, void *wtbl_tlv) 518 { 519 struct wtbl_hdr_trans *htr; 520 struct tlv *tlv; 521 522 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_HDR_TRANS, 523 sizeof(*htr), 524 wtbl_tlv, sta_wtbl); 525 htr = (struct wtbl_hdr_trans *)tlv; 526 htr->no_rx_trans = true; 527 528 if (vif->type == NL80211_IFTYPE_STATION) 529 htr->to_ds = true; 530 else 531 htr->from_ds = true; 532 533 if (!wcid) 534 return; 535 536 htr->no_rx_trans = !test_bit(MT_WCID_FLAG_HDR_TRANS, &wcid->flags); 537 if (test_bit(MT_WCID_FLAG_4ADDR, &wcid->flags)) { 538 htr->to_ds = true; 539 htr->from_ds = true; 540 } 541 542 if (test_bit(MT_WCID_FLAG_TDLS_PEER, &wcid->flags)) { 543 htr->to_ds = false; 544 htr->from_ds = false; 545 } 546 } 547 EXPORT_SYMBOL_GPL(mt76_connac_mcu_wtbl_hdr_trans_tlv); 548 549 int mt76_connac_mcu_sta_update_hdr_trans(struct mt76_dev *dev, 550 struct ieee80211_vif *vif, 551 struct mt76_wcid *wcid, int cmd) 552 { 553 struct mt76_vif_link *mvif = (struct mt76_vif_link *)vif->drv_priv; 554 struct wtbl_req_hdr *wtbl_hdr; 555 struct tlv *sta_wtbl; 556 struct sk_buff *skb; 557 558 skb = mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid); 559 if (IS_ERR(skb)) 560 return PTR_ERR(skb); 561 562 sta_wtbl = mt76_connac_mcu_add_tlv(skb, STA_REC_WTBL, 563 sizeof(struct tlv)); 564 565 wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(dev, wcid, WTBL_SET, 566 sta_wtbl, &skb); 567 if (IS_ERR(wtbl_hdr)) 568 return PTR_ERR(wtbl_hdr); 569 570 mt76_connac_mcu_wtbl_hdr_trans_tlv(skb, vif, wcid, sta_wtbl, wtbl_hdr); 571 572 return mt76_mcu_skb_send_msg(dev, skb, cmd, true); 573 } 574 EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_update_hdr_trans); 575 576 int mt76_connac_mcu_wtbl_update_hdr_trans(struct mt76_dev *dev, 577 struct ieee80211_vif *vif, 578 struct ieee80211_sta *sta) 579 { 580 struct mt76_wcid *wcid = (struct mt76_wcid *)sta->drv_priv; 581 struct wtbl_req_hdr *wtbl_hdr; 582 struct sk_buff *skb = NULL; 583 584 wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(dev, wcid, WTBL_SET, NULL, 585 &skb); 586 if (IS_ERR(wtbl_hdr)) 587 return PTR_ERR(wtbl_hdr); 588 589 mt76_connac_mcu_wtbl_hdr_trans_tlv(skb, vif, wcid, NULL, wtbl_hdr); 590 591 return mt76_mcu_skb_send_msg(dev, skb, MCU_EXT_CMD(WTBL_UPDATE), true); 592 } 593 EXPORT_SYMBOL_GPL(mt76_connac_mcu_wtbl_update_hdr_trans); 594 595 void mt76_connac_mcu_wtbl_generic_tlv(struct mt76_dev *dev, 596 struct sk_buff *skb, 597 struct ieee80211_vif *vif, 598 struct ieee80211_sta *sta, 599 void *sta_wtbl, void *wtbl_tlv) 600 { 601 struct mt76_vif_link *mvif = (struct mt76_vif_link *)vif->drv_priv; 602 struct wtbl_generic *generic; 603 struct wtbl_rx *rx; 604 struct wtbl_spe *spe; 605 struct tlv *tlv; 606 607 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_GENERIC, 608 sizeof(*generic), 609 wtbl_tlv, sta_wtbl); 610 611 generic = (struct wtbl_generic *)tlv; 612 613 if (sta) { 614 if (vif->type == NL80211_IFTYPE_STATION) 615 generic->partial_aid = cpu_to_le16(vif->cfg.aid); 616 else 617 generic->partial_aid = cpu_to_le16(sta->aid); 618 memcpy(generic->peer_addr, sta->addr, ETH_ALEN); 619 generic->muar_idx = mvif->omac_idx; 620 generic->qos = sta->wme; 621 } else { 622 if (!is_connac_v1(dev) && vif->type == NL80211_IFTYPE_STATION) 623 memcpy(generic->peer_addr, vif->bss_conf.bssid, 624 ETH_ALEN); 625 else 626 eth_broadcast_addr(generic->peer_addr); 627 628 generic->muar_idx = 0xe; 629 } 630 631 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_RX, sizeof(*rx), 632 wtbl_tlv, sta_wtbl); 633 634 rx = (struct wtbl_rx *)tlv; 635 rx->rca1 = sta ? vif->type != NL80211_IFTYPE_AP : 1; 636 rx->rca2 = 1; 637 rx->rv = 1; 638 639 if (!is_connac_v1(dev)) 640 return; 641 642 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_SPE, sizeof(*spe), 643 wtbl_tlv, sta_wtbl); 644 spe = (struct wtbl_spe *)tlv; 645 spe->spe_idx = 24; 646 } 647 EXPORT_SYMBOL_GPL(mt76_connac_mcu_wtbl_generic_tlv); 648 649 static void 650 mt76_connac_mcu_sta_amsdu_tlv(struct sk_buff *skb, struct ieee80211_sta *sta, 651 struct ieee80211_vif *vif) 652 { 653 struct mt76_wcid *wcid = (struct mt76_wcid *)sta->drv_priv; 654 struct sta_rec_amsdu *amsdu; 655 struct tlv *tlv; 656 657 if (vif->type != NL80211_IFTYPE_AP && 658 vif->type != NL80211_IFTYPE_STATION) 659 return; 660 661 if (!sta->deflink.agg.max_amsdu_len) 662 return; 663 664 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HW_AMSDU, sizeof(*amsdu)); 665 amsdu = (struct sta_rec_amsdu *)tlv; 666 amsdu->max_amsdu_num = 8; 667 amsdu->amsdu_en = true; 668 amsdu->max_mpdu_size = sta->deflink.agg.max_amsdu_len >= 669 IEEE80211_MAX_MPDU_LEN_VHT_7991; 670 671 wcid->amsdu = true; 672 } 673 674 #define HE_PHY(p, c) u8_get_bits(c, IEEE80211_HE_PHY_##p) 675 #define HE_MAC(m, c) u8_get_bits(c, IEEE80211_HE_MAC_##m) 676 static void 677 mt76_connac_mcu_sta_he_tlv(struct sk_buff *skb, struct ieee80211_sta *sta) 678 { 679 struct ieee80211_sta_he_cap *he_cap = &sta->deflink.he_cap; 680 struct ieee80211_he_cap_elem *elem = &he_cap->he_cap_elem; 681 struct sta_rec_he *he; 682 struct tlv *tlv; 683 u32 cap = 0; 684 685 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE, sizeof(*he)); 686 687 he = (struct sta_rec_he *)tlv; 688 689 if (elem->mac_cap_info[0] & IEEE80211_HE_MAC_CAP0_HTC_HE) 690 cap |= STA_REC_HE_CAP_HTC; 691 692 if (elem->mac_cap_info[2] & IEEE80211_HE_MAC_CAP2_BSR) 693 cap |= STA_REC_HE_CAP_BSR; 694 695 if (elem->mac_cap_info[3] & IEEE80211_HE_MAC_CAP3_OMI_CONTROL) 696 cap |= STA_REC_HE_CAP_OM; 697 698 if (elem->mac_cap_info[4] & IEEE80211_HE_MAC_CAP4_AMSDU_IN_AMPDU) 699 cap |= STA_REC_HE_CAP_AMSDU_IN_AMPDU; 700 701 if (elem->mac_cap_info[4] & IEEE80211_HE_MAC_CAP4_BQR) 702 cap |= STA_REC_HE_CAP_BQR; 703 704 if (elem->phy_cap_info[0] & 705 (IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_2G | 706 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_RU_MAPPING_IN_5G)) 707 cap |= STA_REC_HE_CAP_BW20_RU242_SUPPORT; 708 709 if (elem->phy_cap_info[1] & 710 IEEE80211_HE_PHY_CAP1_LDPC_CODING_IN_PAYLOAD) 711 cap |= STA_REC_HE_CAP_LDPC; 712 713 if (elem->phy_cap_info[1] & 714 IEEE80211_HE_PHY_CAP1_HE_LTF_AND_GI_FOR_HE_PPDUS_0_8US) 715 cap |= STA_REC_HE_CAP_SU_PPDU_1LTF_8US_GI; 716 717 if (elem->phy_cap_info[2] & 718 IEEE80211_HE_PHY_CAP2_NDP_4x_LTF_AND_3_2US) 719 cap |= STA_REC_HE_CAP_NDP_4LTF_3DOT2MS_GI; 720 721 if (elem->phy_cap_info[2] & 722 IEEE80211_HE_PHY_CAP2_STBC_TX_UNDER_80MHZ) 723 cap |= STA_REC_HE_CAP_LE_EQ_80M_TX_STBC; 724 725 if (elem->phy_cap_info[2] & 726 IEEE80211_HE_PHY_CAP2_STBC_RX_UNDER_80MHZ) 727 cap |= STA_REC_HE_CAP_LE_EQ_80M_RX_STBC; 728 729 if (elem->phy_cap_info[6] & 730 IEEE80211_HE_PHY_CAP6_PARTIAL_BW_EXT_RANGE) 731 cap |= STA_REC_HE_CAP_PARTIAL_BW_EXT_RANGE; 732 733 if (elem->phy_cap_info[7] & 734 IEEE80211_HE_PHY_CAP7_HE_SU_MU_PPDU_4XLTF_AND_08_US_GI) 735 cap |= STA_REC_HE_CAP_SU_MU_PPDU_4LTF_8US_GI; 736 737 if (elem->phy_cap_info[7] & 738 IEEE80211_HE_PHY_CAP7_STBC_TX_ABOVE_80MHZ) 739 cap |= STA_REC_HE_CAP_GT_80M_TX_STBC; 740 741 if (elem->phy_cap_info[7] & 742 IEEE80211_HE_PHY_CAP7_STBC_RX_ABOVE_80MHZ) 743 cap |= STA_REC_HE_CAP_GT_80M_RX_STBC; 744 745 if (elem->phy_cap_info[8] & 746 IEEE80211_HE_PHY_CAP8_HE_ER_SU_PPDU_4XLTF_AND_08_US_GI) 747 cap |= STA_REC_HE_CAP_ER_SU_PPDU_4LTF_8US_GI; 748 749 if (elem->phy_cap_info[8] & 750 IEEE80211_HE_PHY_CAP8_HE_ER_SU_1XLTF_AND_08_US_GI) 751 cap |= STA_REC_HE_CAP_ER_SU_PPDU_1LTF_8US_GI; 752 753 if (elem->phy_cap_info[9] & 754 IEEE80211_HE_PHY_CAP9_NON_TRIGGERED_CQI_FEEDBACK) 755 cap |= STA_REC_HE_CAP_TRIG_CQI_FK; 756 757 if (elem->phy_cap_info[9] & 758 IEEE80211_HE_PHY_CAP9_TX_1024_QAM_LESS_THAN_242_TONE_RU) 759 cap |= STA_REC_HE_CAP_TX_1024QAM_UNDER_RU242; 760 761 if (elem->phy_cap_info[9] & 762 IEEE80211_HE_PHY_CAP9_RX_1024_QAM_LESS_THAN_242_TONE_RU) 763 cap |= STA_REC_HE_CAP_RX_1024QAM_UNDER_RU242; 764 765 he->he_cap = cpu_to_le32(cap); 766 767 switch (sta->deflink.bandwidth) { 768 case IEEE80211_STA_RX_BW_160: 769 if (elem->phy_cap_info[0] & 770 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G) 771 he->max_nss_mcs[CMD_HE_MCS_BW8080] = 772 he_cap->he_mcs_nss_supp.rx_mcs_80p80; 773 774 he->max_nss_mcs[CMD_HE_MCS_BW160] = 775 he_cap->he_mcs_nss_supp.rx_mcs_160; 776 fallthrough; 777 default: 778 he->max_nss_mcs[CMD_HE_MCS_BW80] = 779 he_cap->he_mcs_nss_supp.rx_mcs_80; 780 break; 781 } 782 783 he->t_frame_dur = 784 HE_MAC(CAP1_TF_MAC_PAD_DUR_MASK, elem->mac_cap_info[1]); 785 he->max_ampdu_exp = 786 HE_MAC(CAP3_MAX_AMPDU_LEN_EXP_MASK, elem->mac_cap_info[3]); 787 788 he->bw_set = 789 HE_PHY(CAP0_CHANNEL_WIDTH_SET_MASK, elem->phy_cap_info[0]); 790 he->device_class = 791 HE_PHY(CAP1_DEVICE_CLASS_A, elem->phy_cap_info[1]); 792 he->punc_pream_rx = 793 HE_PHY(CAP1_PREAMBLE_PUNC_RX_MASK, elem->phy_cap_info[1]); 794 795 he->dcm_tx_mode = 796 HE_PHY(CAP3_DCM_MAX_CONST_TX_MASK, elem->phy_cap_info[3]); 797 he->dcm_tx_max_nss = 798 HE_PHY(CAP3_DCM_MAX_TX_NSS_2, elem->phy_cap_info[3]); 799 he->dcm_rx_mode = 800 HE_PHY(CAP3_DCM_MAX_CONST_RX_MASK, elem->phy_cap_info[3]); 801 he->dcm_rx_max_nss = 802 HE_PHY(CAP3_DCM_MAX_RX_NSS_2, elem->phy_cap_info[3]); 803 he->dcm_max_ru = 804 HE_PHY(CAP8_DCM_MAX_RU_MASK, elem->phy_cap_info[8]); 805 806 he->pkt_ext = 2; 807 } 808 809 void 810 mt76_connac_mcu_sta_he_tlv_v2(struct sk_buff *skb, struct ieee80211_sta *sta) 811 { 812 struct ieee80211_sta_he_cap *he_cap = &sta->deflink.he_cap; 813 struct ieee80211_he_cap_elem *elem = &he_cap->he_cap_elem; 814 struct sta_rec_he_v2 *he; 815 struct tlv *tlv; 816 817 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE_V2, sizeof(*he)); 818 819 he = (struct sta_rec_he_v2 *)tlv; 820 memcpy(he->he_phy_cap, elem->phy_cap_info, sizeof(he->he_phy_cap)); 821 memcpy(he->he_mac_cap, elem->mac_cap_info, sizeof(he->he_mac_cap)); 822 823 switch (sta->deflink.bandwidth) { 824 case IEEE80211_STA_RX_BW_160: 825 if (elem->phy_cap_info[0] & 826 IEEE80211_HE_PHY_CAP0_CHANNEL_WIDTH_SET_80PLUS80_MHZ_IN_5G) 827 he->max_nss_mcs[CMD_HE_MCS_BW8080] = 828 he_cap->he_mcs_nss_supp.rx_mcs_80p80; 829 830 he->max_nss_mcs[CMD_HE_MCS_BW160] = 831 he_cap->he_mcs_nss_supp.rx_mcs_160; 832 fallthrough; 833 default: 834 he->max_nss_mcs[CMD_HE_MCS_BW80] = 835 he_cap->he_mcs_nss_supp.rx_mcs_80; 836 break; 837 } 838 839 he->pkt_ext = IEEE80211_HE_PHY_CAP9_NOMINAL_PKT_PADDING_16US; 840 } 841 EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_he_tlv_v2); 842 843 u8 844 mt76_connac_get_phy_mode_v2(struct mt76_phy *mphy, struct ieee80211_vif *vif, 845 enum nl80211_band band, 846 struct ieee80211_link_sta *link_sta) 847 { 848 struct ieee80211_sta_ht_cap *ht_cap; 849 struct ieee80211_sta_vht_cap *vht_cap; 850 const struct ieee80211_sta_he_cap *he_cap; 851 const struct ieee80211_sta_eht_cap *eht_cap; 852 u8 mode = 0; 853 854 if (link_sta) { 855 ht_cap = &link_sta->ht_cap; 856 vht_cap = &link_sta->vht_cap; 857 he_cap = &link_sta->he_cap; 858 eht_cap = &link_sta->eht_cap; 859 } else { 860 struct ieee80211_supported_band *sband; 861 862 sband = mphy->hw->wiphy->bands[band]; 863 ht_cap = &sband->ht_cap; 864 vht_cap = &sband->vht_cap; 865 he_cap = ieee80211_get_he_iftype_cap(sband, vif->type); 866 eht_cap = ieee80211_get_eht_iftype_cap(sband, vif->type); 867 } 868 869 if (band == NL80211_BAND_2GHZ) { 870 mode |= PHY_TYPE_BIT_HR_DSSS | PHY_TYPE_BIT_ERP; 871 872 if (ht_cap->ht_supported) 873 mode |= PHY_TYPE_BIT_HT; 874 875 if (he_cap && he_cap->has_he) 876 mode |= PHY_TYPE_BIT_HE; 877 878 if (eht_cap && eht_cap->has_eht) 879 mode |= PHY_TYPE_BIT_BE; 880 } else if (band == NL80211_BAND_5GHZ || band == NL80211_BAND_6GHZ) { 881 mode |= PHY_TYPE_BIT_OFDM; 882 883 if (ht_cap->ht_supported) 884 mode |= PHY_TYPE_BIT_HT; 885 886 if (vht_cap->vht_supported) 887 mode |= PHY_TYPE_BIT_VHT; 888 889 if (he_cap && he_cap->has_he) 890 mode |= PHY_TYPE_BIT_HE; 891 892 if (eht_cap && eht_cap->has_eht) 893 mode |= PHY_TYPE_BIT_BE; 894 } 895 896 return mode; 897 } 898 EXPORT_SYMBOL_GPL(mt76_connac_get_phy_mode_v2); 899 900 void mt76_connac_mcu_sta_tlv(struct mt76_phy *mphy, struct sk_buff *skb, 901 struct ieee80211_sta *sta, 902 struct ieee80211_vif *vif, 903 u8 rcpi, u8 sta_state) 904 { 905 struct mt76_vif_link *mvif = (struct mt76_vif_link *)vif->drv_priv; 906 struct cfg80211_chan_def *chandef = mvif->ctx ? 907 &mvif->ctx->def : &mphy->chandef; 908 enum nl80211_band band = chandef->chan->band; 909 struct mt76_dev *dev = mphy->dev; 910 struct sta_rec_ra_info *ra_info; 911 struct sta_rec_state *state; 912 struct sta_rec_phy *phy; 913 struct tlv *tlv; 914 u16 supp_rates; 915 916 /* starec ht */ 917 if (sta->deflink.ht_cap.ht_supported) { 918 struct sta_rec_ht *ht; 919 920 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HT, sizeof(*ht)); 921 ht = (struct sta_rec_ht *)tlv; 922 ht->ht_cap = cpu_to_le16(sta->deflink.ht_cap.cap); 923 } 924 925 /* starec vht */ 926 if (sta->deflink.vht_cap.vht_supported) { 927 struct sta_rec_vht *vht; 928 int len; 929 930 len = is_connac2(dev) ? sizeof(*vht) : sizeof(*vht) - 4; 931 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_VHT, len); 932 vht = (struct sta_rec_vht *)tlv; 933 vht->vht_cap = cpu_to_le32(sta->deflink.vht_cap.cap); 934 vht->vht_rx_mcs_map = sta->deflink.vht_cap.vht_mcs.rx_mcs_map; 935 vht->vht_tx_mcs_map = sta->deflink.vht_cap.vht_mcs.tx_mcs_map; 936 } 937 938 /* starec uapsd */ 939 mt76_connac_mcu_sta_uapsd(skb, vif, sta); 940 941 if (!is_connac2(dev)) 942 return; 943 944 if (sta->deflink.ht_cap.ht_supported || sta->deflink.he_cap.has_he) 945 mt76_connac_mcu_sta_amsdu_tlv(skb, sta, vif); 946 947 /* starec he */ 948 if (sta->deflink.he_cap.has_he) { 949 mt76_connac_mcu_sta_he_tlv(skb, sta); 950 mt76_connac_mcu_sta_he_tlv_v2(skb, sta); 951 if (band == NL80211_BAND_6GHZ && 952 sta_state == MT76_STA_INFO_STATE_ASSOC) { 953 struct sta_rec_he_6g_capa *he_6g_capa; 954 955 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_HE_6G, 956 sizeof(*he_6g_capa)); 957 he_6g_capa = (struct sta_rec_he_6g_capa *)tlv; 958 he_6g_capa->capa = sta->deflink.he_6ghz_capa.capa; 959 } 960 } 961 962 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_PHY, sizeof(*phy)); 963 phy = (struct sta_rec_phy *)tlv; 964 phy->phy_type = mt76_connac_get_phy_mode_v2(mphy, vif, band, 965 &sta->deflink); 966 phy->basic_rate = cpu_to_le16((u16)vif->bss_conf.basic_rates); 967 phy->rcpi = rcpi; 968 phy->ampdu = FIELD_PREP(IEEE80211_HT_AMPDU_PARM_FACTOR, 969 sta->deflink.ht_cap.ampdu_factor) | 970 FIELD_PREP(IEEE80211_HT_AMPDU_PARM_DENSITY, 971 sta->deflink.ht_cap.ampdu_density); 972 973 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_RA, sizeof(*ra_info)); 974 ra_info = (struct sta_rec_ra_info *)tlv; 975 976 supp_rates = sta->deflink.supp_rates[band]; 977 if (band == NL80211_BAND_2GHZ) 978 supp_rates = FIELD_PREP(RA_LEGACY_OFDM, supp_rates >> 4) | 979 FIELD_PREP(RA_LEGACY_CCK, supp_rates & 0xf); 980 else 981 supp_rates = FIELD_PREP(RA_LEGACY_OFDM, supp_rates); 982 983 ra_info->legacy = cpu_to_le16(supp_rates); 984 985 if (sta->deflink.ht_cap.ht_supported) 986 memcpy(ra_info->rx_mcs_bitmask, 987 sta->deflink.ht_cap.mcs.rx_mask, 988 HT_MCS_MASK_NUM); 989 990 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_STATE, sizeof(*state)); 991 state = (struct sta_rec_state *)tlv; 992 state->state = sta_state; 993 994 if (sta->deflink.vht_cap.vht_supported) { 995 state->vht_opmode = sta->deflink.bandwidth; 996 state->vht_opmode |= (sta->deflink.rx_nss - 1) << 997 IEEE80211_OPMODE_NOTIF_RX_NSS_SHIFT; 998 } 999 } 1000 EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_tlv); 1001 1002 void mt76_connac_mcu_wtbl_smps_tlv(struct sk_buff *skb, 1003 struct ieee80211_sta *sta, 1004 void *sta_wtbl, void *wtbl_tlv) 1005 { 1006 struct wtbl_smps *smps; 1007 struct tlv *tlv; 1008 1009 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_SMPS, sizeof(*smps), 1010 wtbl_tlv, sta_wtbl); 1011 smps = (struct wtbl_smps *)tlv; 1012 smps->smps = (sta->deflink.smps_mode == IEEE80211_SMPS_DYNAMIC); 1013 } 1014 EXPORT_SYMBOL_GPL(mt76_connac_mcu_wtbl_smps_tlv); 1015 1016 void mt76_connac_mcu_wtbl_ht_tlv(struct mt76_dev *dev, struct sk_buff *skb, 1017 struct ieee80211_sta *sta, void *sta_wtbl, 1018 void *wtbl_tlv, bool ht_ldpc, bool vht_ldpc) 1019 { 1020 struct wtbl_ht *ht = NULL; 1021 struct tlv *tlv; 1022 u32 flags = 0; 1023 1024 if (sta->deflink.ht_cap.ht_supported || sta->deflink.he_6ghz_capa.capa) { 1025 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_HT, sizeof(*ht), 1026 wtbl_tlv, sta_wtbl); 1027 ht = (struct wtbl_ht *)tlv; 1028 ht->ldpc = ht_ldpc && 1029 !!(sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING); 1030 1031 if (sta->deflink.ht_cap.ht_supported) { 1032 ht->af = sta->deflink.ht_cap.ampdu_factor; 1033 ht->mm = sta->deflink.ht_cap.ampdu_density; 1034 } else { 1035 ht->af = le16_get_bits(sta->deflink.he_6ghz_capa.capa, 1036 IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP); 1037 ht->mm = le16_get_bits(sta->deflink.he_6ghz_capa.capa, 1038 IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START); 1039 } 1040 1041 ht->ht = true; 1042 } 1043 1044 if (sta->deflink.vht_cap.vht_supported || sta->deflink.he_6ghz_capa.capa) { 1045 struct wtbl_vht *vht; 1046 u8 af; 1047 1048 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_VHT, 1049 sizeof(*vht), wtbl_tlv, 1050 sta_wtbl); 1051 vht = (struct wtbl_vht *)tlv; 1052 vht->ldpc = vht_ldpc && 1053 !!(sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC); 1054 vht->vht = true; 1055 1056 af = FIELD_GET(IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK, 1057 sta->deflink.vht_cap.cap); 1058 if (ht) 1059 ht->af = max(ht->af, af); 1060 } 1061 1062 mt76_connac_mcu_wtbl_smps_tlv(skb, sta, sta_wtbl, wtbl_tlv); 1063 1064 if (is_connac_v1(dev) && sta->deflink.ht_cap.ht_supported) { 1065 /* sgi */ 1066 u32 msk = MT_WTBL_W5_SHORT_GI_20 | MT_WTBL_W5_SHORT_GI_40 | 1067 MT_WTBL_W5_SHORT_GI_80 | MT_WTBL_W5_SHORT_GI_160; 1068 struct wtbl_raw *raw; 1069 1070 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_RAW_DATA, 1071 sizeof(*raw), wtbl_tlv, 1072 sta_wtbl); 1073 1074 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_20) 1075 flags |= MT_WTBL_W5_SHORT_GI_20; 1076 if (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_40) 1077 flags |= MT_WTBL_W5_SHORT_GI_40; 1078 1079 if (sta->deflink.vht_cap.vht_supported) { 1080 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80) 1081 flags |= MT_WTBL_W5_SHORT_GI_80; 1082 if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_160) 1083 flags |= MT_WTBL_W5_SHORT_GI_160; 1084 } 1085 raw = (struct wtbl_raw *)tlv; 1086 raw->val = cpu_to_le32(flags); 1087 raw->msk = cpu_to_le32(~msk); 1088 raw->wtbl_idx = 1; 1089 raw->dw = 5; 1090 } 1091 } 1092 EXPORT_SYMBOL_GPL(mt76_connac_mcu_wtbl_ht_tlv); 1093 1094 int mt76_connac_mcu_sta_cmd(struct mt76_phy *phy, 1095 struct mt76_sta_cmd_info *info) 1096 { 1097 struct mt76_vif_link *mvif = (struct mt76_vif_link *)info->vif->drv_priv; 1098 struct ieee80211_link_sta *link_sta; 1099 struct mt76_dev *dev = phy->dev; 1100 struct wtbl_req_hdr *wtbl_hdr; 1101 struct tlv *sta_wtbl; 1102 struct sk_buff *skb; 1103 int conn_state; 1104 1105 if (!info->link_conf) 1106 info->link_conf = &info->vif->bss_conf; 1107 1108 skb = mt76_connac_mcu_alloc_sta_req(dev, mvif, info->wcid); 1109 if (IS_ERR(skb)) 1110 return PTR_ERR(skb); 1111 1112 conn_state = info->enable ? CONN_STATE_PORT_SECURE : 1113 CONN_STATE_DISCONNECT; 1114 link_sta = info->sta ? &info->sta->deflink : NULL; 1115 if (info->sta || !info->offload_fw) 1116 mt76_connac_mcu_sta_basic_tlv(dev, skb, info->link_conf, 1117 link_sta, conn_state, 1118 info->newly); 1119 if (info->sta && info->enable) 1120 mt76_connac_mcu_sta_tlv(phy, skb, info->sta, 1121 info->vif, info->rcpi, 1122 info->state); 1123 1124 sta_wtbl = mt76_connac_mcu_add_tlv(skb, STA_REC_WTBL, 1125 sizeof(struct tlv)); 1126 1127 wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(dev, info->wcid, 1128 WTBL_RESET_AND_SET, 1129 sta_wtbl, &skb); 1130 if (IS_ERR(wtbl_hdr)) 1131 return PTR_ERR(wtbl_hdr); 1132 1133 if (info->enable) { 1134 mt76_connac_mcu_wtbl_generic_tlv(dev, skb, info->vif, 1135 info->sta, sta_wtbl, 1136 wtbl_hdr); 1137 mt76_connac_mcu_wtbl_hdr_trans_tlv(skb, info->vif, info->wcid, 1138 sta_wtbl, wtbl_hdr); 1139 if (info->sta) 1140 mt76_connac_mcu_wtbl_ht_tlv(dev, skb, info->sta, 1141 sta_wtbl, wtbl_hdr, 1142 true, true); 1143 } 1144 1145 return mt76_mcu_skb_send_msg(dev, skb, info->cmd, true); 1146 } 1147 EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_cmd); 1148 1149 void mt76_connac_mcu_wtbl_ba_tlv(struct mt76_dev *dev, struct sk_buff *skb, 1150 struct ieee80211_ampdu_params *params, 1151 bool enable, bool tx, void *sta_wtbl, 1152 void *wtbl_tlv) 1153 { 1154 struct wtbl_ba *ba; 1155 struct tlv *tlv; 1156 1157 tlv = mt76_connac_mcu_add_nested_tlv(skb, WTBL_BA, sizeof(*ba), 1158 wtbl_tlv, sta_wtbl); 1159 1160 ba = (struct wtbl_ba *)tlv; 1161 ba->tid = params->tid; 1162 1163 if (tx) { 1164 ba->ba_type = MT_BA_TYPE_ORIGINATOR; 1165 ba->sn = enable ? cpu_to_le16(params->ssn) : 0; 1166 ba->ba_winsize = enable ? cpu_to_le16(params->buf_size) : 0; 1167 ba->ba_en = enable; 1168 } else { 1169 memcpy(ba->peer_addr, params->sta->addr, ETH_ALEN); 1170 ba->ba_type = MT_BA_TYPE_RECIPIENT; 1171 ba->rst_ba_tid = params->tid; 1172 ba->rst_ba_sel = RST_BA_MAC_TID_MATCH; 1173 ba->rst_ba_sb = 1; 1174 } 1175 1176 if (!is_connac_v1(dev)) { 1177 ba->ba_winsize = enable ? cpu_to_le16(params->buf_size) : 0; 1178 return; 1179 } 1180 1181 if (enable && tx) { 1182 static const u8 ba_range[] = { 4, 8, 12, 24, 36, 48, 54, 64 }; 1183 int i; 1184 1185 for (i = 7; i > 0; i--) { 1186 if (params->buf_size >= ba_range[i]) 1187 break; 1188 } 1189 ba->ba_winsize_idx = i; 1190 } 1191 } 1192 EXPORT_SYMBOL_GPL(mt76_connac_mcu_wtbl_ba_tlv); 1193 1194 int mt76_connac_mcu_uni_add_dev(struct mt76_phy *phy, 1195 struct ieee80211_bss_conf *bss_conf, 1196 struct mt76_vif_link *mvif, 1197 struct mt76_wcid *wcid, 1198 bool enable) 1199 { 1200 struct mt76_dev *dev = phy->dev; 1201 struct { 1202 struct { 1203 u8 omac_idx; 1204 u8 band_idx; 1205 __le16 pad; 1206 } __packed hdr; 1207 struct req_tlv { 1208 __le16 tag; 1209 __le16 len; 1210 u8 active; 1211 u8 link_idx; /* not link_id */ 1212 u8 omac_addr[ETH_ALEN]; 1213 } __packed tlv; 1214 } dev_req = { 1215 .hdr = { 1216 .omac_idx = mvif->omac_idx, 1217 .band_idx = mvif->band_idx, 1218 }, 1219 .tlv = { 1220 .tag = cpu_to_le16(DEV_INFO_ACTIVE), 1221 .len = cpu_to_le16(sizeof(struct req_tlv)), 1222 .active = enable, 1223 .link_idx = mvif->link_idx, 1224 }, 1225 }; 1226 struct { 1227 struct { 1228 u8 bss_idx; 1229 u8 pad[3]; 1230 } __packed hdr; 1231 struct mt76_connac_bss_basic_tlv basic; 1232 } basic_req = { 1233 .hdr = { 1234 .bss_idx = mvif->idx, 1235 }, 1236 .basic = { 1237 .tag = cpu_to_le16(UNI_BSS_INFO_BASIC), 1238 .len = cpu_to_le16(sizeof(struct mt76_connac_bss_basic_tlv)), 1239 .omac_idx = mvif->omac_idx, 1240 .band_idx = mvif->band_idx, 1241 .wmm_idx = mvif->wmm_idx, 1242 .active = enable, 1243 .bmc_tx_wlan_idx = cpu_to_le16(wcid->idx), 1244 .sta_idx = cpu_to_le16(wcid->idx), 1245 .conn_state = 1, 1246 .link_idx = mvif->link_idx, 1247 }, 1248 }; 1249 int err, idx, cmd, len; 1250 void *data; 1251 1252 switch (bss_conf->vif->type) { 1253 case NL80211_IFTYPE_MESH_POINT: 1254 case NL80211_IFTYPE_MONITOR: 1255 case NL80211_IFTYPE_AP: 1256 basic_req.basic.conn_type = cpu_to_le32(CONNECTION_INFRA_AP); 1257 break; 1258 case NL80211_IFTYPE_STATION: 1259 basic_req.basic.conn_type = cpu_to_le32(CONNECTION_INFRA_STA); 1260 break; 1261 case NL80211_IFTYPE_P2P_DEVICE: 1262 basic_req.basic.conn_type = cpu_to_le32(CONNECTION_P2P_GO); 1263 break; 1264 case NL80211_IFTYPE_ADHOC: 1265 basic_req.basic.conn_type = cpu_to_le32(CONNECTION_IBSS_ADHOC); 1266 break; 1267 case NL80211_IFTYPE_NAN: 1268 case NL80211_IFTYPE_NAN_DATA: 1269 basic_req.basic.conn_type = cpu_to_le32(CONNECTION_NAN); 1270 basic_req.basic.conn_state = !enable; 1271 break; 1272 default: 1273 WARN_ON(1); 1274 break; 1275 } 1276 1277 idx = mvif->omac_idx > EXT_BSSID_START ? HW_BSSID_0 : mvif->omac_idx; 1278 basic_req.basic.hw_bss_idx = idx; 1279 1280 memcpy(dev_req.tlv.omac_addr, bss_conf->addr, ETH_ALEN); 1281 1282 cmd = enable ? MCU_UNI_CMD(DEV_INFO_UPDATE) : MCU_UNI_CMD(BSS_INFO_UPDATE); 1283 data = enable ? (void *)&dev_req : (void *)&basic_req; 1284 len = enable ? sizeof(dev_req) : sizeof(basic_req); 1285 1286 err = mt76_mcu_send_msg(dev, cmd, data, len, true); 1287 if (err && cmd == MCU_UNI_CMD(BSS_INFO_UPDATE)) 1288 err = mt76_connac_mcu_bss_deact_err(dev, err, enable); 1289 1290 if (err < 0) 1291 return err; 1292 1293 cmd = enable ? MCU_UNI_CMD(BSS_INFO_UPDATE) : MCU_UNI_CMD(DEV_INFO_UPDATE); 1294 data = enable ? (void *)&basic_req : (void *)&dev_req; 1295 len = enable ? sizeof(basic_req) : sizeof(dev_req); 1296 1297 err = mt76_mcu_send_msg(dev, cmd, data, len, true); 1298 if (err && cmd == MCU_UNI_CMD(BSS_INFO_UPDATE)) 1299 err = mt76_connac_mcu_bss_deact_err(dev, err, enable); 1300 1301 return err; 1302 } 1303 EXPORT_SYMBOL_GPL(mt76_connac_mcu_uni_add_dev); 1304 1305 void mt76_connac_mcu_sta_ba_tlv(struct sk_buff *skb, 1306 struct ieee80211_ampdu_params *params, 1307 bool enable, bool tx) 1308 { 1309 struct sta_rec_ba *ba; 1310 struct tlv *tlv; 1311 1312 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_BA, sizeof(*ba)); 1313 1314 ba = (struct sta_rec_ba *)tlv; 1315 ba->ba_type = tx ? MT_BA_TYPE_ORIGINATOR : MT_BA_TYPE_RECIPIENT; 1316 ba->winsize = cpu_to_le16(params->buf_size); 1317 ba->ssn = cpu_to_le16(params->ssn); 1318 ba->ba_en = enable << params->tid; 1319 ba->amsdu = params->amsdu; 1320 ba->tid = params->tid; 1321 } 1322 EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_ba_tlv); 1323 1324 int mt76_connac_mcu_sta_wed_update(struct mt76_dev *dev, struct sk_buff *skb) 1325 { 1326 if (!mt76_is_mmio(dev)) 1327 return 0; 1328 1329 if (!mtk_wed_device_active(&dev->mmio.wed)) 1330 return 0; 1331 1332 return mtk_wed_device_update_msg(&dev->mmio.wed, WED_WO_STA_REC, 1333 skb->data, skb->len); 1334 } 1335 EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_wed_update); 1336 1337 int mt76_connac_mcu_sta_ba(struct mt76_dev *dev, struct mt76_vif_link *mvif, 1338 struct ieee80211_ampdu_params *params, 1339 int cmd, bool enable, bool tx) 1340 { 1341 struct mt76_wcid *wcid = (struct mt76_wcid *)params->sta->drv_priv; 1342 struct wtbl_req_hdr *wtbl_hdr; 1343 struct tlv *sta_wtbl; 1344 struct sk_buff *skb; 1345 int ret; 1346 1347 skb = mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid); 1348 if (IS_ERR(skb)) 1349 return PTR_ERR(skb); 1350 1351 sta_wtbl = mt76_connac_mcu_add_tlv(skb, STA_REC_WTBL, 1352 sizeof(struct tlv)); 1353 1354 wtbl_hdr = mt76_connac_mcu_alloc_wtbl_req(dev, wcid, WTBL_SET, 1355 sta_wtbl, &skb); 1356 if (IS_ERR(wtbl_hdr)) 1357 return PTR_ERR(wtbl_hdr); 1358 1359 mt76_connac_mcu_wtbl_ba_tlv(dev, skb, params, enable, tx, sta_wtbl, 1360 wtbl_hdr); 1361 1362 ret = mt76_connac_mcu_sta_wed_update(dev, skb); 1363 if (ret) { 1364 dev_kfree_skb(skb); 1365 return ret; 1366 } 1367 1368 ret = mt76_mcu_skb_send_msg(dev, skb, cmd, true); 1369 if (ret) 1370 return ret; 1371 1372 skb = mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid); 1373 if (IS_ERR(skb)) 1374 return PTR_ERR(skb); 1375 1376 mt76_connac_mcu_sta_ba_tlv(skb, params, enable, tx); 1377 1378 ret = mt76_connac_mcu_sta_wed_update(dev, skb); 1379 if (ret) { 1380 dev_kfree_skb(skb); 1381 return ret; 1382 } 1383 1384 return mt76_mcu_skb_send_msg(dev, skb, cmd, true); 1385 } 1386 EXPORT_SYMBOL_GPL(mt76_connac_mcu_sta_ba); 1387 1388 u8 mt76_connac_get_phy_mode(struct mt76_phy *phy, struct ieee80211_vif *vif, 1389 enum nl80211_band band, 1390 struct ieee80211_link_sta *link_sta) 1391 { 1392 struct mt76_dev *dev = phy->dev; 1393 const struct ieee80211_sta_he_cap *he_cap; 1394 struct ieee80211_sta_vht_cap *vht_cap; 1395 struct ieee80211_sta_ht_cap *ht_cap; 1396 u8 mode = 0; 1397 1398 if (is_connac_v1(dev)) 1399 return 0x38; 1400 1401 if (link_sta) { 1402 ht_cap = &link_sta->ht_cap; 1403 vht_cap = &link_sta->vht_cap; 1404 he_cap = &link_sta->he_cap; 1405 } else { 1406 struct ieee80211_supported_band *sband; 1407 1408 sband = phy->hw->wiphy->bands[band]; 1409 ht_cap = &sband->ht_cap; 1410 vht_cap = &sband->vht_cap; 1411 he_cap = ieee80211_get_he_iftype_cap(sband, vif->type); 1412 } 1413 1414 if (band == NL80211_BAND_2GHZ) { 1415 mode |= PHY_MODE_B | PHY_MODE_G; 1416 1417 if (ht_cap->ht_supported) 1418 mode |= PHY_MODE_GN; 1419 1420 if (he_cap && he_cap->has_he) 1421 mode |= PHY_MODE_AX_24G; 1422 } else if (band == NL80211_BAND_5GHZ) { 1423 mode |= PHY_MODE_A; 1424 1425 if (ht_cap->ht_supported) 1426 mode |= PHY_MODE_AN; 1427 1428 if (vht_cap->vht_supported) 1429 mode |= PHY_MODE_AC; 1430 1431 if (he_cap && he_cap->has_he) 1432 mode |= PHY_MODE_AX_5G; 1433 } else if (band == NL80211_BAND_6GHZ) { 1434 mode |= PHY_MODE_A | PHY_MODE_AN | 1435 PHY_MODE_AC | PHY_MODE_AX_5G; 1436 } 1437 1438 return mode; 1439 } 1440 EXPORT_SYMBOL_GPL(mt76_connac_get_phy_mode); 1441 1442 u8 mt76_connac_get_phy_mode_ext(struct mt76_phy *phy, struct ieee80211_bss_conf *conf, 1443 enum nl80211_band band) 1444 { 1445 const struct ieee80211_sta_eht_cap *eht_cap; 1446 struct ieee80211_supported_band *sband; 1447 u8 mode = 0; 1448 1449 if (band == NL80211_BAND_6GHZ) 1450 mode |= PHY_MODE_AX_6G; 1451 1452 sband = phy->hw->wiphy->bands[band]; 1453 eht_cap = ieee80211_get_eht_iftype_cap(sband, conf->vif->type); 1454 1455 if (!eht_cap || !eht_cap->has_eht || !conf->eht_support) 1456 return mode; 1457 1458 switch (band) { 1459 case NL80211_BAND_6GHZ: 1460 mode |= PHY_MODE_BE_6G; 1461 break; 1462 case NL80211_BAND_5GHZ: 1463 mode |= PHY_MODE_BE_5G; 1464 break; 1465 case NL80211_BAND_2GHZ: 1466 mode |= PHY_MODE_BE_24G; 1467 break; 1468 default: 1469 break; 1470 } 1471 1472 return mode; 1473 } 1474 EXPORT_SYMBOL_GPL(mt76_connac_get_phy_mode_ext); 1475 1476 const struct ieee80211_sta_he_cap * 1477 mt76_connac_get_he_phy_cap(struct mt76_phy *phy, struct ieee80211_vif *vif) 1478 { 1479 struct mt76_vif_link *mvif = (struct mt76_vif_link *)vif->drv_priv; 1480 struct cfg80211_chan_def *chandef = mvif->ctx ? 1481 &mvif->ctx->def : &phy->chandef; 1482 enum nl80211_band band = chandef->chan->band; 1483 struct ieee80211_supported_band *sband; 1484 1485 sband = phy->hw->wiphy->bands[band]; 1486 1487 return ieee80211_get_he_iftype_cap(sband, vif->type); 1488 } 1489 EXPORT_SYMBOL_GPL(mt76_connac_get_he_phy_cap); 1490 1491 const struct ieee80211_sta_eht_cap * 1492 mt76_connac_get_eht_phy_cap(struct mt76_phy *phy, struct ieee80211_vif *vif) 1493 { 1494 enum nl80211_band band = phy->chandef.chan->band; 1495 struct ieee80211_supported_band *sband; 1496 1497 sband = phy->hw->wiphy->bands[band]; 1498 1499 return ieee80211_get_eht_iftype_cap(sband, vif->type); 1500 } 1501 EXPORT_SYMBOL_GPL(mt76_connac_get_eht_phy_cap); 1502 1503 #define DEFAULT_HE_PE_DURATION 4 1504 #define DEFAULT_HE_DURATION_RTS_THRES 1023 1505 static void 1506 mt76_connac_mcu_uni_bss_he_tlv(struct mt76_phy *phy, struct ieee80211_vif *vif, 1507 struct tlv *tlv) 1508 { 1509 const struct ieee80211_sta_he_cap *cap; 1510 struct bss_info_uni_he *he; 1511 1512 cap = mt76_connac_get_he_phy_cap(phy, vif); 1513 if (!cap) 1514 return; 1515 1516 he = (struct bss_info_uni_he *)tlv; 1517 he->he_pe_duration = vif->bss_conf.htc_trig_based_pkt_ext; 1518 if (!he->he_pe_duration) 1519 he->he_pe_duration = DEFAULT_HE_PE_DURATION; 1520 1521 he->he_rts_thres = cpu_to_le16(vif->bss_conf.frame_time_rts_th); 1522 if (!he->he_rts_thres) 1523 he->he_rts_thres = cpu_to_le16(DEFAULT_HE_DURATION_RTS_THRES); 1524 1525 he->max_nss_mcs[CMD_HE_MCS_BW80] = cap->he_mcs_nss_supp.tx_mcs_80; 1526 he->max_nss_mcs[CMD_HE_MCS_BW160] = cap->he_mcs_nss_supp.tx_mcs_160; 1527 he->max_nss_mcs[CMD_HE_MCS_BW8080] = cap->he_mcs_nss_supp.tx_mcs_80p80; 1528 } 1529 1530 int mt76_connac_mcu_uni_set_chctx(struct mt76_phy *phy, struct mt76_vif_link *mvif, 1531 struct ieee80211_chanctx_conf *ctx) 1532 { 1533 struct cfg80211_chan_def *chandef = ctx ? &ctx->def : &phy->chandef; 1534 int freq1 = chandef->center_freq1, freq2 = chandef->center_freq2; 1535 enum nl80211_band band = chandef->chan->band; 1536 struct mt76_dev *mdev = phy->dev; 1537 struct { 1538 struct { 1539 u8 bss_idx; 1540 u8 pad[3]; 1541 } __packed hdr; 1542 struct rlm_tlv { 1543 __le16 tag; 1544 __le16 len; 1545 u8 control_channel; 1546 u8 center_chan; 1547 u8 center_chan2; 1548 u8 bw; 1549 u8 tx_streams; 1550 u8 rx_streams; 1551 u8 short_st; 1552 u8 ht_op_info; 1553 u8 sco; 1554 u8 band; 1555 u8 pad[2]; 1556 } __packed rlm; 1557 } __packed rlm_req = { 1558 .hdr = { 1559 .bss_idx = mvif->idx, 1560 }, 1561 .rlm = { 1562 .tag = cpu_to_le16(UNI_BSS_INFO_RLM), 1563 .len = cpu_to_le16(sizeof(struct rlm_tlv)), 1564 .control_channel = chandef->chan->hw_value, 1565 .center_chan = ieee80211_frequency_to_channel(freq1), 1566 .center_chan2 = ieee80211_frequency_to_channel(freq2), 1567 .tx_streams = hweight8(phy->antenna_mask), 1568 .ht_op_info = 4, /* set HT 40M allowed */ 1569 .rx_streams = phy->chainmask, 1570 .short_st = true, 1571 .band = band, 1572 }, 1573 }; 1574 1575 switch (chandef->width) { 1576 case NL80211_CHAN_WIDTH_40: 1577 rlm_req.rlm.bw = CMD_CBW_40MHZ; 1578 break; 1579 case NL80211_CHAN_WIDTH_80: 1580 rlm_req.rlm.bw = CMD_CBW_80MHZ; 1581 break; 1582 case NL80211_CHAN_WIDTH_80P80: 1583 rlm_req.rlm.bw = CMD_CBW_8080MHZ; 1584 break; 1585 case NL80211_CHAN_WIDTH_160: 1586 rlm_req.rlm.bw = CMD_CBW_160MHZ; 1587 break; 1588 case NL80211_CHAN_WIDTH_5: 1589 rlm_req.rlm.bw = CMD_CBW_5MHZ; 1590 break; 1591 case NL80211_CHAN_WIDTH_10: 1592 rlm_req.rlm.bw = CMD_CBW_10MHZ; 1593 break; 1594 case NL80211_CHAN_WIDTH_20_NOHT: 1595 case NL80211_CHAN_WIDTH_20: 1596 default: 1597 rlm_req.rlm.bw = CMD_CBW_20MHZ; 1598 rlm_req.rlm.ht_op_info = 0; 1599 break; 1600 } 1601 1602 if (rlm_req.rlm.control_channel < rlm_req.rlm.center_chan) 1603 rlm_req.rlm.sco = 1; /* SCA */ 1604 else if (rlm_req.rlm.control_channel > rlm_req.rlm.center_chan) 1605 rlm_req.rlm.sco = 3; /* SCB */ 1606 1607 return mt76_mcu_send_msg(mdev, MCU_UNI_CMD(BSS_INFO_UPDATE), &rlm_req, 1608 sizeof(rlm_req), true); 1609 } 1610 EXPORT_SYMBOL_GPL(mt76_connac_mcu_uni_set_chctx); 1611 1612 int mt76_connac_mcu_uni_add_bss(struct mt76_phy *phy, 1613 struct ieee80211_vif *vif, 1614 struct mt76_wcid *wcid, 1615 bool enable, 1616 struct ieee80211_chanctx_conf *ctx) 1617 { 1618 struct mt76_vif_link *mvif = (struct mt76_vif_link *)vif->drv_priv; 1619 struct cfg80211_chan_def *chandef = ctx ? &ctx->def : &phy->chandef; 1620 enum nl80211_band band = chandef->chan->band; 1621 struct mt76_dev *mdev = phy->dev; 1622 struct { 1623 struct { 1624 u8 bss_idx; 1625 u8 pad[3]; 1626 } __packed hdr; 1627 struct mt76_connac_bss_basic_tlv basic; 1628 struct mt76_connac_bss_qos_tlv qos; 1629 } basic_req = { 1630 .hdr = { 1631 .bss_idx = mvif->idx, 1632 }, 1633 .basic = { 1634 .tag = cpu_to_le16(UNI_BSS_INFO_BASIC), 1635 .len = cpu_to_le16(sizeof(struct mt76_connac_bss_basic_tlv)), 1636 .bcn_interval = cpu_to_le16(vif->bss_conf.beacon_int), 1637 .dtim_period = vif->bss_conf.dtim_period, 1638 .omac_idx = mvif->omac_idx, 1639 .band_idx = mvif->band_idx, 1640 .wmm_idx = mvif->wmm_idx, 1641 .active = true, /* keep bss deactivated */ 1642 .phymode = mt76_connac_get_phy_mode(phy, vif, band, NULL), 1643 }, 1644 .qos = { 1645 .tag = cpu_to_le16(UNI_BSS_INFO_QBSS), 1646 .len = cpu_to_le16(sizeof(struct mt76_connac_bss_qos_tlv)), 1647 .qos = vif->bss_conf.qos, 1648 }, 1649 }; 1650 int err, conn_type; 1651 u8 idx, basic_phy; 1652 1653 idx = mvif->omac_idx > EXT_BSSID_START ? HW_BSSID_0 : mvif->omac_idx; 1654 basic_req.basic.hw_bss_idx = idx; 1655 if (band == NL80211_BAND_6GHZ) 1656 basic_req.basic.phymode_ext = PHY_MODE_AX_6G; 1657 1658 basic_phy = mt76_connac_get_phy_mode_v2(phy, vif, band, NULL); 1659 basic_req.basic.nonht_basic_phy = cpu_to_le16(basic_phy); 1660 1661 switch (vif->type) { 1662 case NL80211_IFTYPE_MESH_POINT: 1663 case NL80211_IFTYPE_AP: 1664 if (vif->p2p) 1665 conn_type = CONNECTION_P2P_GO; 1666 else 1667 conn_type = CONNECTION_INFRA_AP; 1668 basic_req.basic.conn_type = cpu_to_le32(conn_type); 1669 /* Fully active/deactivate BSS network in AP mode only */ 1670 basic_req.basic.active = enable; 1671 break; 1672 case NL80211_IFTYPE_STATION: 1673 if (vif->p2p) 1674 conn_type = CONNECTION_P2P_GC; 1675 else 1676 conn_type = CONNECTION_INFRA_STA; 1677 basic_req.basic.conn_type = cpu_to_le32(conn_type); 1678 break; 1679 case NL80211_IFTYPE_ADHOC: 1680 basic_req.basic.conn_type = cpu_to_le32(CONNECTION_IBSS_ADHOC); 1681 break; 1682 case NL80211_IFTYPE_NAN: 1683 case NL80211_IFTYPE_NAN_DATA: 1684 basic_req.basic.conn_type = cpu_to_le32(CONNECTION_NAN); 1685 basic_req.basic.active = enable; 1686 break; 1687 default: 1688 WARN_ON(1); 1689 break; 1690 } 1691 1692 memcpy(basic_req.basic.bssid, vif->bss_conf.bssid, ETH_ALEN); 1693 basic_req.basic.bmc_tx_wlan_idx = cpu_to_le16(wcid->idx); 1694 basic_req.basic.sta_idx = cpu_to_le16(wcid->idx); 1695 basic_req.basic.conn_state = !enable; 1696 1697 err = mt76_mcu_send_msg(mdev, MCU_UNI_CMD(BSS_INFO_UPDATE), &basic_req, 1698 sizeof(basic_req), true); 1699 if (err < 0) 1700 return err; 1701 1702 if (vif->bss_conf.he_support) { 1703 struct { 1704 struct { 1705 u8 bss_idx; 1706 u8 pad[3]; 1707 } __packed hdr; 1708 struct bss_info_uni_he he; 1709 struct bss_info_uni_bss_color bss_color; 1710 } he_req = { 1711 .hdr = { 1712 .bss_idx = mvif->idx, 1713 }, 1714 .he = { 1715 .tag = cpu_to_le16(UNI_BSS_INFO_HE_BASIC), 1716 .len = cpu_to_le16(sizeof(struct bss_info_uni_he)), 1717 }, 1718 .bss_color = { 1719 .tag = cpu_to_le16(UNI_BSS_INFO_BSS_COLOR), 1720 .len = cpu_to_le16(sizeof(struct bss_info_uni_bss_color)), 1721 .enable = 0, 1722 .bss_color = 0, 1723 }, 1724 }; 1725 1726 if (enable) { 1727 he_req.bss_color.enable = 1728 vif->bss_conf.he_bss_color.enabled; 1729 he_req.bss_color.bss_color = 1730 vif->bss_conf.he_bss_color.color; 1731 } 1732 1733 mt76_connac_mcu_uni_bss_he_tlv(phy, vif, 1734 (struct tlv *)&he_req.he); 1735 err = mt76_mcu_send_msg(mdev, MCU_UNI_CMD(BSS_INFO_UPDATE), 1736 &he_req, sizeof(he_req), true); 1737 if (err < 0) 1738 return err; 1739 } 1740 1741 if (enable && vif->bss_conf.bssid_indicator) { 1742 struct { 1743 struct { 1744 u8 bss_idx; 1745 u8 pad[3]; 1746 } __packed hdr; 1747 struct bss_info_uni_mbssid mbssid; 1748 } mbssid_req = { 1749 .hdr = { 1750 .bss_idx = mvif->idx, 1751 }, 1752 .mbssid = { 1753 .tag = cpu_to_le16(UNI_BSS_INFO_11V_MBSSID), 1754 .len = cpu_to_le16(sizeof(struct bss_info_uni_mbssid)), 1755 .max_indicator = vif->bss_conf.bssid_indicator, 1756 .mbss_idx = vif->bss_conf.bssid_index, 1757 }, 1758 }; 1759 1760 err = mt76_mcu_send_msg(mdev, MCU_UNI_CMD(BSS_INFO_UPDATE), 1761 &mbssid_req, sizeof(mbssid_req), true); 1762 if (err < 0) 1763 return err; 1764 } 1765 1766 return mt76_connac_mcu_uni_set_chctx(phy, mvif, ctx); 1767 } 1768 EXPORT_SYMBOL_GPL(mt76_connac_mcu_uni_add_bss); 1769 1770 void mt76_connac_mcu_build_rnr_scan_param(struct mt76_dev *mdev, 1771 struct cfg80211_scan_request *sreq) 1772 { 1773 struct ieee80211_channel **scan_list = sreq->channels; 1774 int i, bssid_index = 0; 1775 1776 /* clear 6G active Scan BSSID table */ 1777 memset(&mdev->rnr, 0, sizeof(mdev->rnr)); 1778 1779 for (i = 0; i < sreq->n_6ghz_params; i++) { 1780 u8 ch_idx = sreq->scan_6ghz_params[i].channel_idx; 1781 int k = 0; 1782 1783 /* Remove the duplicated BSSID */ 1784 for (k = 0; k < bssid_index; k++) { 1785 if (!memcmp(&mdev->rnr.bssid[k], 1786 sreq->scan_6ghz_params[i].bssid, 1787 ETH_ALEN)) 1788 break; 1789 } 1790 1791 if (k == bssid_index && 1792 bssid_index < MT76_RNR_SCAN_MAX_BSSIDS) { 1793 memcpy(&mdev->rnr.bssid[bssid_index++], 1794 sreq->scan_6ghz_params[i].bssid, ETH_ALEN); 1795 mdev->rnr.channel[k] = scan_list[ch_idx]->hw_value; 1796 } 1797 } 1798 1799 mdev->rnr.bssid_num = bssid_index; 1800 1801 if (sreq->flags & NL80211_SCAN_FLAG_RANDOM_ADDR) { 1802 memcpy(mdev->rnr.random_mac, sreq->mac_addr, ETH_ALEN); 1803 mdev->rnr.sreq_flag = sreq->flags; 1804 } 1805 } 1806 EXPORT_SYMBOL_GPL(mt76_connac_mcu_build_rnr_scan_param); 1807 1808 #define MT76_CONNAC_SCAN_CHANNEL_TIME 60 1809 int mt76_connac_mcu_hw_scan(struct mt76_phy *phy, struct ieee80211_vif *vif, 1810 struct ieee80211_scan_request *scan_req) 1811 { 1812 struct mt76_vif_link *mvif = (struct mt76_vif_link *)vif->drv_priv; 1813 struct cfg80211_scan_request *sreq = &scan_req->req; 1814 int n_ssids = 0, err, i, duration; 1815 int ext_channels_num = max_t(int, sreq->n_channels - 32, 0); 1816 struct ieee80211_channel **scan_list = sreq->channels; 1817 struct mt76_dev *mdev = phy->dev; 1818 struct mt76_connac_mcu_scan_channel *chan; 1819 struct mt76_connac_hw_scan_req *req; 1820 struct sk_buff *skb; 1821 1822 if (test_bit(MT76_HW_SCANNING, &phy->state)) 1823 return -EBUSY; 1824 1825 skb = mt76_mcu_msg_alloc(mdev, NULL, sizeof(*req)); 1826 if (!skb) 1827 return -ENOMEM; 1828 1829 set_bit(MT76_HW_SCANNING, &phy->state); 1830 mvif->scan_seq_num = (mvif->scan_seq_num + 1) & 0x7f; 1831 1832 req = (struct mt76_connac_hw_scan_req *)skb_put_zero(skb, sizeof(*req)); 1833 1834 req->seq_num = mvif->scan_seq_num | mvif->band_idx << 7; 1835 req->bss_idx = mvif->idx; 1836 req->scan_type = sreq->n_ssids ? 1 : 0; 1837 req->probe_req_num = sreq->n_ssids ? 2 : 0; 1838 req->version = 1; 1839 1840 for (i = 0; i < sreq->n_ssids; i++) { 1841 if (!sreq->ssids[i].ssid_len) 1842 continue; 1843 1844 req->ssids[n_ssids].ssid_len = cpu_to_le32(sreq->ssids[i].ssid_len); 1845 memcpy(req->ssids[n_ssids].ssid, sreq->ssids[i].ssid, 1846 sreq->ssids[i].ssid_len); 1847 n_ssids++; 1848 } 1849 req->ssid_type = n_ssids ? BIT(2) : BIT(0); 1850 req->ssid_type_ext = n_ssids ? BIT(0) : 0; 1851 req->ssids_num = n_ssids; 1852 1853 duration = is_connac2(phy->dev) ? 0 : MT76_CONNAC_SCAN_CHANNEL_TIME; 1854 /* increase channel time for passive scan */ 1855 if (!sreq->n_ssids) 1856 duration *= 2; 1857 req->timeout_value = cpu_to_le16(sreq->n_channels * duration); 1858 req->channel_min_dwell_time = cpu_to_le16(duration); 1859 req->channel_dwell_time = cpu_to_le16(duration); 1860 1861 if (sreq->n_channels == 0 || sreq->n_channels > 64) { 1862 req->channel_type = 0; 1863 req->channels_num = 0; 1864 req->ext_channels_num = 0; 1865 } else { 1866 req->channel_type = 4; 1867 req->channels_num = min_t(u8, sreq->n_channels, 32); 1868 req->ext_channels_num = min_t(u8, ext_channels_num, 32); 1869 } 1870 1871 for (i = 0; i < req->channels_num + req->ext_channels_num; i++) { 1872 if (i >= 32) 1873 chan = &req->ext_channels[i - 32]; 1874 else 1875 chan = &req->channels[i]; 1876 1877 switch (scan_list[i]->band) { 1878 case NL80211_BAND_2GHZ: 1879 chan->band = 1; 1880 break; 1881 case NL80211_BAND_6GHZ: 1882 chan->band = 3; 1883 break; 1884 default: 1885 chan->band = 2; 1886 break; 1887 } 1888 chan->channel_num = scan_list[i]->hw_value; 1889 } 1890 1891 if (sreq->ie_len > 0) { 1892 memcpy(req->ies, sreq->ie, sreq->ie_len); 1893 req->ies_len = cpu_to_le16(sreq->ie_len); 1894 } 1895 1896 if (is_connac2(phy->dev)) 1897 req->scan_func |= SCAN_FUNC_SPLIT_SCAN; 1898 1899 memcpy(req->bssid, sreq->bssid, ETH_ALEN); 1900 if (sreq->flags & NL80211_SCAN_FLAG_RANDOM_ADDR) { 1901 get_random_mask_addr(req->random_mac, sreq->mac_addr, 1902 sreq->mac_addr_mask); 1903 req->scan_func |= SCAN_FUNC_RANDOM_MAC; 1904 } 1905 1906 err = mt76_mcu_skb_send_msg(mdev, skb, MCU_CE_CMD(START_HW_SCAN), 1907 false); 1908 if (err < 0) 1909 clear_bit(MT76_HW_SCANNING, &phy->state); 1910 1911 return err; 1912 } 1913 EXPORT_SYMBOL_GPL(mt76_connac_mcu_hw_scan); 1914 1915 int mt76_connac_mcu_cancel_hw_scan(struct mt76_phy *phy, 1916 struct ieee80211_vif *vif) 1917 { 1918 struct mt76_vif_link *mvif = (struct mt76_vif_link *)vif->drv_priv; 1919 struct { 1920 u8 seq_num; 1921 u8 is_ext_channel; 1922 u8 rsv[2]; 1923 } __packed req = { 1924 .seq_num = mvif->scan_seq_num, 1925 }; 1926 1927 if (test_and_clear_bit(MT76_HW_SCANNING, &phy->state)) { 1928 struct cfg80211_scan_info info = { 1929 .aborted = true, 1930 }; 1931 1932 ieee80211_scan_completed(phy->hw, &info); 1933 } 1934 1935 return mt76_mcu_send_msg(phy->dev, MCU_CE_CMD(CANCEL_HW_SCAN), 1936 &req, sizeof(req), false); 1937 } 1938 EXPORT_SYMBOL_GPL(mt76_connac_mcu_cancel_hw_scan); 1939 1940 int mt76_connac_mcu_sched_scan_req(struct mt76_phy *phy, 1941 struct ieee80211_vif *vif, 1942 struct cfg80211_sched_scan_request *sreq) 1943 { 1944 struct mt76_vif_link *mvif = (struct mt76_vif_link *)vif->drv_priv; 1945 struct ieee80211_channel **scan_list = sreq->channels; 1946 struct mt76_connac_mcu_scan_channel *chan; 1947 struct mt76_connac_sched_scan_req *req; 1948 struct mt76_dev *mdev = phy->dev; 1949 struct cfg80211_match_set *match; 1950 struct cfg80211_ssid *ssid; 1951 struct sk_buff *skb; 1952 int i; 1953 1954 skb = mt76_mcu_msg_alloc(mdev, NULL, sizeof(*req) + sreq->ie_len); 1955 if (!skb) 1956 return -ENOMEM; 1957 1958 mvif->scan_seq_num = (mvif->scan_seq_num + 1) & 0x7f; 1959 1960 req = (struct mt76_connac_sched_scan_req *)skb_put_zero(skb, sizeof(*req)); 1961 req->version = 1; 1962 req->seq_num = mvif->scan_seq_num | mvif->band_idx << 7; 1963 1964 if (sreq->flags & NL80211_SCAN_FLAG_RANDOM_ADDR) { 1965 u8 *addr = is_mt7663(phy->dev) ? req->mt7663.random_mac 1966 : req->mt7921.random_mac; 1967 1968 req->scan_func = 1; 1969 get_random_mask_addr(addr, sreq->mac_addr, 1970 sreq->mac_addr_mask); 1971 } 1972 if (is_connac2(phy->dev)) { 1973 req->mt7921.bss_idx = mvif->idx; 1974 req->mt7921.delay = cpu_to_le32(sreq->delay); 1975 } 1976 1977 req->ssids_num = sreq->n_ssids; 1978 for (i = 0; i < req->ssids_num; i++) { 1979 ssid = &sreq->ssids[i]; 1980 memcpy(req->ssids[i].ssid, ssid->ssid, ssid->ssid_len); 1981 req->ssids[i].ssid_len = cpu_to_le32(ssid->ssid_len); 1982 } 1983 1984 req->match_num = sreq->n_match_sets; 1985 for (i = 0; i < req->match_num; i++) { 1986 match = &sreq->match_sets[i]; 1987 memcpy(req->match[i].ssid, match->ssid.ssid, 1988 match->ssid.ssid_len); 1989 req->match[i].rssi_th = cpu_to_le32(match->rssi_thold); 1990 req->match[i].ssid_len = match->ssid.ssid_len; 1991 } 1992 1993 req->channel_type = sreq->n_channels ? 4 : 0; 1994 req->channels_num = min_t(u8, sreq->n_channels, 64); 1995 for (i = 0; i < req->channels_num; i++) { 1996 chan = &req->channels[i]; 1997 1998 switch (scan_list[i]->band) { 1999 case NL80211_BAND_2GHZ: 2000 chan->band = 1; 2001 break; 2002 case NL80211_BAND_6GHZ: 2003 chan->band = 3; 2004 break; 2005 default: 2006 chan->band = 2; 2007 break; 2008 } 2009 chan->channel_num = scan_list[i]->hw_value; 2010 } 2011 2012 req->intervals_num = sreq->n_scan_plans; 2013 for (i = 0; i < req->intervals_num; i++) 2014 req->intervals[i] = cpu_to_le16(sreq->scan_plans[i].interval); 2015 2016 if (sreq->ie_len > 0) { 2017 req->ie_len = cpu_to_le16(sreq->ie_len); 2018 memcpy(skb_put(skb, sreq->ie_len), sreq->ie, sreq->ie_len); 2019 } 2020 2021 return mt76_mcu_skb_send_msg(mdev, skb, MCU_CE_CMD(SCHED_SCAN_REQ), 2022 false); 2023 } 2024 EXPORT_SYMBOL_GPL(mt76_connac_mcu_sched_scan_req); 2025 2026 int mt76_connac_mcu_sched_scan_enable(struct mt76_phy *phy, 2027 struct ieee80211_vif *vif, 2028 bool enable) 2029 { 2030 struct { 2031 u8 active; /* 0: enabled 1: disabled */ 2032 u8 rsv[3]; 2033 } __packed req = { 2034 .active = !enable, 2035 }; 2036 2037 assign_bit(MT76_HW_SCHED_SCANNING, &phy->state, enable); 2038 2039 return mt76_mcu_send_msg(phy->dev, MCU_CE_CMD(SCHED_SCAN_ENABLE), 2040 &req, sizeof(req), false); 2041 } 2042 EXPORT_SYMBOL_GPL(mt76_connac_mcu_sched_scan_enable); 2043 2044 int mt76_connac_mcu_chip_config(struct mt76_dev *dev, const char *cmd) 2045 { 2046 struct mt76_connac_config req = { 2047 .resp_type = 0, 2048 }; 2049 2050 strscpy(req.data, cmd); 2051 2052 return mt76_mcu_send_msg(dev, MCU_CE_CMD(CHIP_CONFIG), 2053 &req, sizeof(req), false); 2054 } 2055 EXPORT_SYMBOL_GPL(mt76_connac_mcu_chip_config); 2056 2057 int mt76_connac_mcu_set_deep_sleep(struct mt76_dev *dev, bool enable) 2058 { 2059 char cmd[16]; 2060 2061 snprintf(cmd, sizeof(cmd), "KeepFullPwr %d", !enable); 2062 2063 return mt76_connac_mcu_chip_config(dev, cmd); 2064 } 2065 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_deep_sleep); 2066 2067 int mt76_connac_sta_state_dp(struct mt76_dev *dev, 2068 enum ieee80211_sta_state old_state, 2069 enum ieee80211_sta_state new_state) 2070 { 2071 if ((old_state == IEEE80211_STA_ASSOC && 2072 new_state == IEEE80211_STA_AUTHORIZED) || 2073 (old_state == IEEE80211_STA_NONE && 2074 new_state == IEEE80211_STA_NOTEXIST)) 2075 mt76_connac_mcu_set_deep_sleep(dev, true); 2076 2077 if ((old_state == IEEE80211_STA_NOTEXIST && 2078 new_state == IEEE80211_STA_NONE) || 2079 (old_state == IEEE80211_STA_AUTHORIZED && 2080 new_state == IEEE80211_STA_ASSOC)) 2081 mt76_connac_mcu_set_deep_sleep(dev, false); 2082 2083 return 0; 2084 } 2085 EXPORT_SYMBOL_GPL(mt76_connac_sta_state_dp); 2086 2087 void mt76_connac_mcu_coredump_event(struct mt76_dev *dev, struct sk_buff *skb, 2088 struct mt76_connac_coredump *coredump) 2089 { 2090 spin_lock_bh(&dev->lock); 2091 __skb_queue_tail(&coredump->msg_list, skb); 2092 spin_unlock_bh(&dev->lock); 2093 2094 coredump->last_activity = jiffies; 2095 2096 queue_delayed_work(dev->wq, &coredump->work, 2097 MT76_CONNAC_COREDUMP_TIMEOUT); 2098 } 2099 EXPORT_SYMBOL_GPL(mt76_connac_mcu_coredump_event); 2100 2101 static void 2102 mt76_connac_mcu_build_sku(struct mt76_dev *dev, s8 *sku, 2103 struct mt76_power_limits *limits, 2104 enum nl80211_band band) 2105 { 2106 int max_power = is_connac2(dev) ? 127 : 63; 2107 int i, offset = sizeof(limits->cck); 2108 2109 memset(sku, max_power, MT_SKU_POWER_LIMIT); 2110 2111 if (band == NL80211_BAND_2GHZ) { 2112 /* cck */ 2113 memcpy(sku, limits->cck, sizeof(limits->cck)); 2114 } 2115 2116 /* ofdm */ 2117 memcpy(&sku[offset], limits->ofdm, sizeof(limits->ofdm)); 2118 offset += sizeof(limits->ofdm); 2119 2120 /* ht */ 2121 for (i = 0; i < 2; i++) { 2122 memcpy(&sku[offset], limits->mcs[i], 8); 2123 offset += 8; 2124 } 2125 sku[offset++] = limits->mcs[0][0]; 2126 2127 /* vht */ 2128 for (i = 0; i < ARRAY_SIZE(limits->mcs); i++) { 2129 memcpy(&sku[offset], limits->mcs[i], 2130 ARRAY_SIZE(limits->mcs[i])); 2131 offset += 12; 2132 } 2133 2134 if (!is_connac2(dev)) 2135 return; 2136 2137 /* he */ 2138 for (i = 0; i < ARRAY_SIZE(limits->ru); i++) { 2139 memcpy(&sku[offset], limits->ru[i], ARRAY_SIZE(limits->ru[i])); 2140 offset += ARRAY_SIZE(limits->ru[i]); 2141 } 2142 } 2143 2144 s8 mt76_connac_get_ch_power(struct mt76_phy *phy, 2145 struct ieee80211_channel *chan, 2146 s8 target_power) 2147 { 2148 struct mt76_dev *dev = phy->dev; 2149 struct ieee80211_supported_band *sband; 2150 int i; 2151 2152 switch (chan->band) { 2153 case NL80211_BAND_2GHZ: 2154 sband = &phy->sband_2g.sband; 2155 break; 2156 case NL80211_BAND_5GHZ: 2157 sband = &phy->sband_5g.sband; 2158 break; 2159 case NL80211_BAND_6GHZ: 2160 sband = &phy->sband_6g.sband; 2161 break; 2162 default: 2163 return target_power; 2164 } 2165 2166 for (i = 0; i < sband->n_channels; i++) { 2167 struct ieee80211_channel *ch = &sband->channels[i]; 2168 2169 if (ch->hw_value == chan->hw_value) { 2170 if (!(ch->flags & IEEE80211_CHAN_DISABLED)) { 2171 int power = 2 * ch->max_reg_power; 2172 2173 if (is_mt7663(dev) && (power > 63 || power < -64)) 2174 power = 63; 2175 target_power = min_t(s8, power, target_power); 2176 } 2177 break; 2178 } 2179 } 2180 2181 return target_power; 2182 } 2183 EXPORT_SYMBOL_GPL(mt76_connac_get_ch_power); 2184 2185 static int 2186 mt76_connac_mcu_rate_txpower_band(struct mt76_phy *phy, 2187 enum nl80211_band band) 2188 { 2189 struct mt76_dev *dev = phy->dev; 2190 int sku_len, batch_len = is_connac2(dev) ? 8 : 16; 2191 static const u8 chan_list_2ghz[] = { 2192 1, 2, 3, 4, 5, 6, 7, 2193 8, 9, 10, 11, 12, 13, 14 2194 }; 2195 static const u8 chan_list_5ghz[] = { 2196 36, 38, 40, 42, 44, 46, 48, 2197 50, 52, 54, 56, 58, 60, 62, 2198 64, 100, 102, 104, 106, 108, 110, 2199 112, 114, 116, 118, 120, 122, 124, 2200 126, 128, 132, 134, 136, 138, 140, 2201 142, 144, 149, 151, 153, 155, 157, 2202 159, 161, 165, 169, 173, 177 2203 }; 2204 static const u8 chan_list_6ghz[] = { 2205 1, 3, 5, 7, 9, 11, 13, 2206 15, 17, 19, 21, 23, 25, 27, 2207 29, 33, 35, 37, 39, 41, 43, 2208 45, 47, 49, 51, 53, 55, 57, 2209 59, 61, 65, 67, 69, 71, 73, 2210 75, 77, 79, 81, 83, 85, 87, 2211 89, 91, 93, 97, 99, 101, 103, 2212 105, 107, 109, 111, 113, 115, 117, 2213 119, 121, 123, 125, 129, 131, 133, 2214 135, 137, 139, 141, 143, 145, 147, 2215 149, 151, 153, 155, 157, 161, 163, 2216 165, 167, 169, 171, 173, 175, 177, 2217 179, 181, 183, 185, 187, 189, 193, 2218 195, 197, 199, 201, 203, 205, 207, 2219 209, 211, 213, 215, 217, 219, 221, 2220 225, 227, 229, 233 2221 }; 2222 int i, n_chan, batch_size, idx = 0, tx_power, last_ch, err = 0; 2223 struct mt76_connac_sku_tlv sku_tlbv; 2224 struct mt76_power_limits *limits; 2225 const u8 *ch_list; 2226 2227 limits = devm_kmalloc(dev->dev, sizeof(*limits), GFP_KERNEL); 2228 if (!limits) 2229 return -ENOMEM; 2230 2231 sku_len = is_connac2(dev) ? sizeof(sku_tlbv) : sizeof(sku_tlbv) - 92; 2232 tx_power = 2 * phy->hw->conf.power_level; 2233 if (!tx_power) 2234 tx_power = 127; 2235 2236 if (band == NL80211_BAND_2GHZ) { 2237 n_chan = ARRAY_SIZE(chan_list_2ghz); 2238 ch_list = chan_list_2ghz; 2239 } else if (band == NL80211_BAND_6GHZ) { 2240 n_chan = ARRAY_SIZE(chan_list_6ghz); 2241 ch_list = chan_list_6ghz; 2242 } else { 2243 n_chan = ARRAY_SIZE(chan_list_5ghz); 2244 ch_list = chan_list_5ghz; 2245 } 2246 batch_size = DIV_ROUND_UP(n_chan, batch_len); 2247 2248 if (phy->cap.has_6ghz) 2249 last_ch = chan_list_6ghz[ARRAY_SIZE(chan_list_6ghz) - 1]; 2250 else if (phy->cap.has_5ghz) 2251 last_ch = chan_list_5ghz[ARRAY_SIZE(chan_list_5ghz) - 1]; 2252 else 2253 last_ch = chan_list_2ghz[ARRAY_SIZE(chan_list_2ghz) - 1]; 2254 2255 for (i = 0; i < batch_size; i++) { 2256 struct mt76_connac_tx_power_limit_tlv tx_power_tlv = {}; 2257 int j, msg_len, num_ch; 2258 struct sk_buff *skb; 2259 2260 num_ch = i == batch_size - 1 ? n_chan - i * batch_len : batch_len; 2261 msg_len = sizeof(tx_power_tlv) + num_ch * sizeof(sku_tlbv); 2262 skb = mt76_mcu_msg_alloc(dev, NULL, msg_len); 2263 if (!skb) { 2264 err = -ENOMEM; 2265 goto out; 2266 } 2267 2268 skb_reserve(skb, sizeof(tx_power_tlv)); 2269 2270 BUILD_BUG_ON(sizeof(dev->alpha2) > sizeof(tx_power_tlv.alpha2)); 2271 memcpy(tx_power_tlv.alpha2, dev->alpha2, sizeof(dev->alpha2)); 2272 tx_power_tlv.n_chan = num_ch; 2273 2274 switch (band) { 2275 case NL80211_BAND_2GHZ: 2276 tx_power_tlv.band = 1; 2277 break; 2278 case NL80211_BAND_6GHZ: 2279 tx_power_tlv.band = 3; 2280 break; 2281 default: 2282 tx_power_tlv.band = 2; 2283 break; 2284 } 2285 2286 for (j = 0; j < num_ch; j++, idx++) { 2287 struct ieee80211_channel chan = { 2288 .hw_value = ch_list[idx], 2289 .band = band, 2290 }; 2291 s8 max_power; 2292 2293 max_power = mt76_connac_get_rate_power_limit(phy, &chan, 2294 limits); 2295 if (phy->chandef.chan && 2296 phy->chandef.chan->hw_value == ch_list[idx] && 2297 phy->chandef.chan->band == band) 2298 mt76_connac_set_txpower_cur(phy, max_power); 2299 2300 tx_power_tlv.last_msg = ch_list[idx] == last_ch; 2301 sku_tlbv.channel = ch_list[idx]; 2302 2303 mt76_connac_mcu_build_sku(dev, sku_tlbv.pwr_limit, 2304 limits, band); 2305 skb_put_data(skb, &sku_tlbv, sku_len); 2306 } 2307 __skb_push(skb, sizeof(tx_power_tlv)); 2308 memcpy(skb->data, &tx_power_tlv, sizeof(tx_power_tlv)); 2309 2310 err = mt76_mcu_skb_send_msg(dev, skb, 2311 MCU_CE_CMD(SET_RATE_TX_POWER), 2312 false); 2313 if (err < 0) 2314 goto out; 2315 2316 /* read a CR to avoid PSE buffer underflow */ 2317 mt76_connac_mcu_reg_rr(dev, MT_PSE_BASE); 2318 } 2319 2320 out: 2321 devm_kfree(dev->dev, limits); 2322 return err; 2323 } 2324 2325 int mt76_connac_mcu_set_rate_txpower(struct mt76_phy *phy) 2326 { 2327 int err; 2328 2329 if (phy->cap.has_2ghz) { 2330 err = mt76_connac_mcu_rate_txpower_band(phy, 2331 NL80211_BAND_2GHZ); 2332 if (err < 0) 2333 return err; 2334 } 2335 if (phy->cap.has_5ghz) { 2336 err = mt76_connac_mcu_rate_txpower_band(phy, 2337 NL80211_BAND_5GHZ); 2338 if (err < 0) 2339 return err; 2340 } 2341 if (phy->cap.has_6ghz) { 2342 err = mt76_connac_mcu_rate_txpower_band(phy, 2343 NL80211_BAND_6GHZ); 2344 if (err < 0) 2345 return err; 2346 } 2347 2348 return 0; 2349 } 2350 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_rate_txpower); 2351 2352 int mt76_connac_mcu_update_arp_filter(struct mt76_dev *dev, 2353 struct mt76_vif_link *vif, 2354 struct ieee80211_bss_conf *info) 2355 { 2356 struct ieee80211_vif *mvif = container_of(info, struct ieee80211_vif, 2357 bss_conf); 2358 struct sk_buff *skb; 2359 int i, len = min_t(int, mvif->cfg.arp_addr_cnt, 2360 IEEE80211_BSS_ARP_ADDR_LIST_LEN); 2361 struct { 2362 struct { 2363 u8 bss_idx; 2364 u8 pad[3]; 2365 } __packed hdr; 2366 struct mt76_connac_arpns_tlv arp; 2367 } req_hdr = { 2368 .hdr = { 2369 .bss_idx = vif->idx, 2370 }, 2371 .arp = { 2372 .tag = cpu_to_le16(UNI_OFFLOAD_OFFLOAD_ARP), 2373 .len = cpu_to_le16(sizeof(struct mt76_connac_arpns_tlv)), 2374 .ips_num = len, 2375 .mode = 2, /* update */ 2376 .option = 1, 2377 }, 2378 }; 2379 2380 skb = mt76_mcu_msg_alloc(dev, NULL, 2381 sizeof(req_hdr) + len * sizeof(__be32)); 2382 if (!skb) 2383 return -ENOMEM; 2384 2385 skb_put_data(skb, &req_hdr, sizeof(req_hdr)); 2386 for (i = 0; i < len; i++) 2387 skb_put_data(skb, &mvif->cfg.arp_addr_list[i], sizeof(__be32)); 2388 2389 return mt76_mcu_skb_send_msg(dev, skb, MCU_UNI_CMD(OFFLOAD), true); 2390 } 2391 EXPORT_SYMBOL_GPL(mt76_connac_mcu_update_arp_filter); 2392 2393 int mt76_connac_mcu_set_p2p_oppps(struct ieee80211_hw *hw, 2394 struct ieee80211_vif *vif) 2395 { 2396 struct mt76_vif_link *mvif = (struct mt76_vif_link *)vif->drv_priv; 2397 int ct_window = vif->bss_conf.p2p_noa_attr.oppps_ctwindow; 2398 struct mt76_phy *phy = hw->priv; 2399 struct { 2400 __le32 ct_win; 2401 u8 bss_idx; 2402 u8 rsv[3]; 2403 } __packed req = { 2404 .ct_win = cpu_to_le32(ct_window), 2405 .bss_idx = mvif->idx, 2406 }; 2407 2408 return mt76_mcu_send_msg(phy->dev, MCU_CE_CMD(SET_P2P_OPPPS), 2409 &req, sizeof(req), false); 2410 } 2411 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_p2p_oppps); 2412 2413 #ifdef CONFIG_PM 2414 2415 const struct wiphy_wowlan_support mt76_connac_wowlan_support = { 2416 .flags = WIPHY_WOWLAN_MAGIC_PKT | WIPHY_WOWLAN_DISCONNECT | 2417 WIPHY_WOWLAN_SUPPORTS_GTK_REKEY | WIPHY_WOWLAN_NET_DETECT, 2418 .n_patterns = 1, 2419 .pattern_min_len = 1, 2420 .pattern_max_len = MT76_CONNAC_WOW_PATTEN_MAX_LEN, 2421 .max_nd_match_sets = 10, 2422 }; 2423 EXPORT_SYMBOL_GPL(mt76_connac_wowlan_support); 2424 2425 static void 2426 mt76_connac_mcu_key_iter(struct ieee80211_hw *hw, 2427 struct ieee80211_vif *vif, 2428 struct ieee80211_sta *sta, 2429 struct ieee80211_key_conf *key, 2430 void *data) 2431 { 2432 struct mt76_connac_gtk_rekey_tlv *gtk_tlv = data; 2433 u32 cipher; 2434 2435 if (key->cipher != WLAN_CIPHER_SUITE_AES_CMAC && 2436 key->cipher != WLAN_CIPHER_SUITE_CCMP && 2437 key->cipher != WLAN_CIPHER_SUITE_TKIP) 2438 return; 2439 2440 if (key->cipher == WLAN_CIPHER_SUITE_TKIP) 2441 cipher = BIT(3); 2442 else 2443 cipher = BIT(4); 2444 2445 /* we are assuming here to have a single pairwise key */ 2446 if (key->flags & IEEE80211_KEY_FLAG_PAIRWISE) { 2447 if (key->cipher == WLAN_CIPHER_SUITE_TKIP) 2448 gtk_tlv->proto = cpu_to_le32(NL80211_WPA_VERSION_1); 2449 else 2450 gtk_tlv->proto = cpu_to_le32(NL80211_WPA_VERSION_2); 2451 2452 gtk_tlv->pairwise_cipher = cpu_to_le32(cipher); 2453 gtk_tlv->keyid = key->keyidx; 2454 } else { 2455 gtk_tlv->group_cipher = cpu_to_le32(cipher); 2456 } 2457 } 2458 2459 int mt76_connac_mcu_update_gtk_rekey(struct ieee80211_hw *hw, 2460 struct ieee80211_vif *vif, 2461 struct cfg80211_gtk_rekey_data *key) 2462 { 2463 struct mt76_vif_link *mvif = (struct mt76_vif_link *)vif->drv_priv; 2464 struct mt76_connac_gtk_rekey_tlv *gtk_tlv; 2465 struct mt76_phy *phy = hw->priv; 2466 struct sk_buff *skb; 2467 struct { 2468 u8 bss_idx; 2469 u8 pad[3]; 2470 } __packed hdr = { 2471 .bss_idx = mvif->idx, 2472 }; 2473 2474 skb = mt76_mcu_msg_alloc(phy->dev, NULL, 2475 sizeof(hdr) + sizeof(*gtk_tlv)); 2476 if (!skb) 2477 return -ENOMEM; 2478 2479 skb_put_data(skb, &hdr, sizeof(hdr)); 2480 gtk_tlv = (struct mt76_connac_gtk_rekey_tlv *)skb_put_zero(skb, 2481 sizeof(*gtk_tlv)); 2482 gtk_tlv->tag = cpu_to_le16(UNI_OFFLOAD_OFFLOAD_GTK_REKEY); 2483 gtk_tlv->len = cpu_to_le16(sizeof(*gtk_tlv)); 2484 gtk_tlv->rekey_mode = 2; 2485 gtk_tlv->option = 1; 2486 2487 ieee80211_iter_keys(hw, vif, mt76_connac_mcu_key_iter, gtk_tlv); 2488 2489 memcpy(gtk_tlv->kek, key->kek, NL80211_KEK_LEN); 2490 memcpy(gtk_tlv->kck, key->kck, NL80211_KCK_LEN); 2491 memcpy(gtk_tlv->replay_ctr, key->replay_ctr, NL80211_REPLAY_CTR_LEN); 2492 2493 return mt76_mcu_skb_send_msg(phy->dev, skb, 2494 MCU_UNI_CMD(OFFLOAD), true); 2495 } 2496 EXPORT_SYMBOL_GPL(mt76_connac_mcu_update_gtk_rekey); 2497 2498 static int 2499 mt76_connac_mcu_set_arp_filter(struct mt76_dev *dev, struct ieee80211_vif *vif, 2500 bool suspend) 2501 { 2502 struct mt76_vif_link *mvif = (struct mt76_vif_link *)vif->drv_priv; 2503 struct { 2504 struct { 2505 u8 bss_idx; 2506 u8 pad[3]; 2507 } __packed hdr; 2508 struct mt76_connac_arpns_tlv arpns; 2509 } req = { 2510 .hdr = { 2511 .bss_idx = mvif->idx, 2512 }, 2513 .arpns = { 2514 .tag = cpu_to_le16(UNI_OFFLOAD_OFFLOAD_ARP), 2515 .len = cpu_to_le16(sizeof(struct mt76_connac_arpns_tlv)), 2516 .mode = suspend, 2517 }, 2518 }; 2519 2520 return mt76_mcu_send_msg(dev, MCU_UNI_CMD(OFFLOAD), &req, 2521 sizeof(req), true); 2522 } 2523 2524 int 2525 mt76_connac_mcu_set_gtk_rekey(struct mt76_dev *dev, struct ieee80211_vif *vif, 2526 bool suspend) 2527 { 2528 struct mt76_vif_link *mvif = (struct mt76_vif_link *)vif->drv_priv; 2529 struct { 2530 struct { 2531 u8 bss_idx; 2532 u8 pad[3]; 2533 } __packed hdr; 2534 struct mt76_connac_gtk_rekey_tlv gtk_tlv; 2535 } __packed req = { 2536 .hdr = { 2537 .bss_idx = mvif->idx, 2538 }, 2539 .gtk_tlv = { 2540 .tag = cpu_to_le16(UNI_OFFLOAD_OFFLOAD_GTK_REKEY), 2541 .len = cpu_to_le16(sizeof(struct mt76_connac_gtk_rekey_tlv)), 2542 .rekey_mode = !suspend, 2543 }, 2544 }; 2545 2546 return mt76_mcu_send_msg(dev, MCU_UNI_CMD(OFFLOAD), &req, 2547 sizeof(req), true); 2548 } 2549 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_gtk_rekey); 2550 2551 int 2552 mt76_connac_mcu_set_suspend_mode(struct mt76_dev *dev, 2553 struct ieee80211_vif *vif, 2554 bool enable, u8 mdtim, 2555 bool wow_suspend) 2556 { 2557 struct mt76_vif_link *mvif = (struct mt76_vif_link *)vif->drv_priv; 2558 struct { 2559 struct { 2560 u8 bss_idx; 2561 u8 pad[3]; 2562 } __packed hdr; 2563 struct mt76_connac_suspend_tlv suspend_tlv; 2564 } req = { 2565 .hdr = { 2566 .bss_idx = mvif->idx, 2567 }, 2568 .suspend_tlv = { 2569 .tag = cpu_to_le16(UNI_SUSPEND_MODE_SETTING), 2570 .len = cpu_to_le16(sizeof(struct mt76_connac_suspend_tlv)), 2571 .enable = enable, 2572 .mdtim = mdtim, 2573 .wow_suspend = wow_suspend, 2574 }, 2575 }; 2576 2577 return mt76_mcu_send_msg(dev, MCU_UNI_CMD(SUSPEND), &req, 2578 sizeof(req), true); 2579 } 2580 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_suspend_mode); 2581 2582 static int 2583 mt76_connac_mcu_set_wow_pattern(struct mt76_dev *dev, 2584 struct ieee80211_vif *vif, 2585 u8 index, bool enable, 2586 struct cfg80211_pkt_pattern *pattern) 2587 { 2588 struct mt76_vif_link *mvif = (struct mt76_vif_link *)vif->drv_priv; 2589 struct mt76_connac_wow_pattern_tlv *ptlv; 2590 struct sk_buff *skb; 2591 struct req_hdr { 2592 u8 bss_idx; 2593 u8 pad[3]; 2594 } __packed hdr = { 2595 .bss_idx = mvif->idx, 2596 }; 2597 2598 skb = mt76_mcu_msg_alloc(dev, NULL, sizeof(hdr) + sizeof(*ptlv)); 2599 if (!skb) 2600 return -ENOMEM; 2601 2602 skb_put_data(skb, &hdr, sizeof(hdr)); 2603 ptlv = (struct mt76_connac_wow_pattern_tlv *)skb_put_zero(skb, sizeof(*ptlv)); 2604 ptlv->tag = cpu_to_le16(UNI_SUSPEND_WOW_PATTERN); 2605 ptlv->len = cpu_to_le16(sizeof(*ptlv)); 2606 ptlv->data_len = pattern->pattern_len; 2607 ptlv->enable = enable; 2608 ptlv->index = index; 2609 2610 memcpy(ptlv->pattern, pattern->pattern, pattern->pattern_len); 2611 memcpy(ptlv->mask, pattern->mask, DIV_ROUND_UP(pattern->pattern_len, 8)); 2612 2613 return mt76_mcu_skb_send_msg(dev, skb, MCU_UNI_CMD(SUSPEND), true); 2614 } 2615 2616 int 2617 mt76_connac_mcu_set_wow_ctrl(struct mt76_phy *phy, struct ieee80211_vif *vif, 2618 bool suspend, struct cfg80211_wowlan *wowlan) 2619 { 2620 struct mt76_vif_link *mvif = (struct mt76_vif_link *)vif->drv_priv; 2621 struct mt76_dev *dev = phy->dev; 2622 struct { 2623 struct { 2624 u8 bss_idx; 2625 u8 pad[3]; 2626 } __packed hdr; 2627 struct mt76_connac_wow_ctrl_tlv wow_ctrl_tlv; 2628 struct mt76_connac_wow_gpio_param_tlv gpio_tlv; 2629 } req = { 2630 .hdr = { 2631 .bss_idx = mvif->idx, 2632 }, 2633 .wow_ctrl_tlv = { 2634 .tag = cpu_to_le16(UNI_SUSPEND_WOW_CTRL), 2635 .len = cpu_to_le16(sizeof(struct mt76_connac_wow_ctrl_tlv)), 2636 .cmd = suspend ? 1 : 2, 2637 }, 2638 .gpio_tlv = { 2639 .tag = cpu_to_le16(UNI_SUSPEND_WOW_GPIO_PARAM), 2640 .len = cpu_to_le16(sizeof(struct mt76_connac_wow_gpio_param_tlv)), 2641 .gpio_pin = 0xff, /* follow fw about GPIO pin */ 2642 }, 2643 }; 2644 2645 if (wowlan->magic_pkt) 2646 req.wow_ctrl_tlv.trigger |= UNI_WOW_DETECT_TYPE_MAGIC; 2647 if (wowlan->disconnect) 2648 req.wow_ctrl_tlv.trigger |= (UNI_WOW_DETECT_TYPE_DISCONNECT | 2649 UNI_WOW_DETECT_TYPE_BCN_LOST); 2650 if (wowlan->nd_config) { 2651 mt76_connac_mcu_sched_scan_req(phy, vif, wowlan->nd_config); 2652 req.wow_ctrl_tlv.trigger |= UNI_WOW_DETECT_TYPE_SCH_SCAN_HIT; 2653 mt76_connac_mcu_sched_scan_enable(phy, vif, suspend); 2654 } 2655 if (wowlan->n_patterns) 2656 req.wow_ctrl_tlv.trigger |= UNI_WOW_DETECT_TYPE_BITMAP; 2657 2658 if (mt76_is_mmio(dev)) 2659 req.wow_ctrl_tlv.wakeup_hif = WOW_PCIE; 2660 else if (mt76_is_usb(dev)) 2661 req.wow_ctrl_tlv.wakeup_hif = WOW_USB; 2662 else if (mt76_is_sdio(dev)) 2663 req.wow_ctrl_tlv.wakeup_hif = WOW_GPIO; 2664 2665 return mt76_mcu_send_msg(dev, MCU_UNI_CMD(SUSPEND), &req, 2666 sizeof(req), true); 2667 } 2668 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_wow_ctrl); 2669 2670 int mt76_connac_mcu_set_hif_suspend(struct mt76_dev *dev, bool suspend, bool wait_resp) 2671 { 2672 struct { 2673 struct { 2674 u8 hif_type; /* 0x0: HIF_SDIO 2675 * 0x1: HIF_USB 2676 * 0x2: HIF_PCIE 2677 */ 2678 u8 pad[3]; 2679 } __packed hdr; 2680 struct hif_suspend_tlv { 2681 __le16 tag; 2682 __le16 len; 2683 u8 suspend; 2684 u8 pad[7]; 2685 } __packed hif_suspend; 2686 } req = { 2687 .hif_suspend = { 2688 .tag = cpu_to_le16(0), /* 0: UNI_HIF_CTRL_BASIC */ 2689 .len = cpu_to_le16(sizeof(struct hif_suspend_tlv)), 2690 .suspend = suspend, 2691 }, 2692 }; 2693 2694 if (mt76_is_mmio(dev)) 2695 req.hdr.hif_type = 2; 2696 else if (mt76_is_usb(dev)) 2697 req.hdr.hif_type = 1; 2698 else if (mt76_is_sdio(dev)) 2699 req.hdr.hif_type = 0; 2700 2701 return mt76_mcu_send_msg(dev, MCU_UNI_CMD(HIF_CTRL), &req, 2702 sizeof(req), wait_resp); 2703 } 2704 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_hif_suspend); 2705 2706 void mt76_connac_mcu_set_suspend_iter(void *priv, u8 *mac, 2707 struct ieee80211_vif *vif) 2708 { 2709 struct mt76_phy *phy = priv; 2710 bool suspend = !test_bit(MT76_STATE_RUNNING, &phy->state); 2711 struct ieee80211_hw *hw = phy->hw; 2712 struct cfg80211_wowlan *wowlan = hw->wiphy->wowlan_config; 2713 int i; 2714 2715 mt76_connac_mcu_set_gtk_rekey(phy->dev, vif, suspend); 2716 mt76_connac_mcu_set_arp_filter(phy->dev, vif, suspend); 2717 2718 mt76_connac_mcu_set_suspend_mode(phy->dev, vif, suspend, 1, true); 2719 2720 for (i = 0; i < wowlan->n_patterns; i++) 2721 mt76_connac_mcu_set_wow_pattern(phy->dev, vif, i, suspend, 2722 &wowlan->patterns[i]); 2723 mt76_connac_mcu_set_wow_ctrl(phy, vif, suspend, wowlan); 2724 } 2725 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_suspend_iter); 2726 #endif /* CONFIG_PM */ 2727 2728 u32 mt76_connac_mcu_reg_rr(struct mt76_dev *dev, u32 offset) 2729 { 2730 struct { 2731 __le32 addr; 2732 __le32 val; 2733 } __packed req = { 2734 .addr = cpu_to_le32(offset), 2735 }; 2736 2737 return mt76_mcu_send_msg(dev, MCU_CE_QUERY(REG_READ), &req, 2738 sizeof(req), true); 2739 } 2740 EXPORT_SYMBOL_GPL(mt76_connac_mcu_reg_rr); 2741 2742 void mt76_connac_mcu_reg_wr(struct mt76_dev *dev, u32 offset, u32 val) 2743 { 2744 struct { 2745 __le32 addr; 2746 __le32 val; 2747 } __packed req = { 2748 .addr = cpu_to_le32(offset), 2749 .val = cpu_to_le32(val), 2750 }; 2751 2752 mt76_mcu_send_msg(dev, MCU_CE_CMD(REG_WRITE), &req, 2753 sizeof(req), false); 2754 } 2755 EXPORT_SYMBOL_GPL(mt76_connac_mcu_reg_wr); 2756 2757 static int 2758 mt76_connac_mcu_sta_key_tlv(struct mt76_connac_sta_key_conf *sta_key_conf, 2759 struct sk_buff *skb, 2760 struct ieee80211_key_conf *key, 2761 enum set_key_cmd cmd) 2762 { 2763 struct sta_rec_sec *sec; 2764 u32 len = sizeof(*sec); 2765 struct tlv *tlv; 2766 2767 tlv = mt76_connac_mcu_add_tlv(skb, STA_REC_KEY_V2, sizeof(*sec)); 2768 sec = (struct sta_rec_sec *)tlv; 2769 sec->add = cmd; 2770 2771 if (cmd == SET_KEY) { 2772 struct sec_key *sec_key; 2773 u8 cipher; 2774 2775 cipher = mt76_connac_mcu_get_cipher(key->cipher); 2776 if (cipher == MCU_CIPHER_NONE) 2777 return -EOPNOTSUPP; 2778 2779 sec_key = &sec->key[0]; 2780 sec_key->cipher_len = sizeof(*sec_key); 2781 2782 if (cipher == MCU_CIPHER_BIP_CMAC_128) { 2783 sec_key->cipher_id = MCU_CIPHER_AES_CCMP; 2784 sec_key->key_id = sta_key_conf->keyidx; 2785 sec_key->key_len = 16; 2786 memcpy(sec_key->key, sta_key_conf->key, 16); 2787 2788 sec_key = &sec->key[1]; 2789 sec_key->cipher_id = MCU_CIPHER_BIP_CMAC_128; 2790 sec_key->cipher_len = sizeof(*sec_key); 2791 sec_key->key_len = 16; 2792 memcpy(sec_key->key, key->key, 16); 2793 sec->n_cipher = 2; 2794 } else { 2795 sec_key->cipher_id = cipher; 2796 sec_key->key_id = key->keyidx; 2797 sec_key->key_len = key->keylen; 2798 memcpy(sec_key->key, key->key, key->keylen); 2799 2800 if (cipher == MCU_CIPHER_TKIP) { 2801 /* Rx/Tx MIC keys are swapped */ 2802 memcpy(sec_key->key + 16, key->key + 24, 8); 2803 memcpy(sec_key->key + 24, key->key + 16, 8); 2804 } 2805 2806 /* store key_conf for BIP batch update */ 2807 if (cipher == MCU_CIPHER_AES_CCMP) { 2808 memcpy(sta_key_conf->key, key->key, key->keylen); 2809 sta_key_conf->keyidx = key->keyidx; 2810 } 2811 2812 len -= sizeof(*sec_key); 2813 sec->n_cipher = 1; 2814 } 2815 } else { 2816 len -= sizeof(sec->key); 2817 sec->n_cipher = 0; 2818 } 2819 sec->len = cpu_to_le16(len); 2820 2821 return 0; 2822 } 2823 2824 int mt76_connac_mcu_add_key(struct mt76_dev *dev, struct ieee80211_vif *vif, 2825 struct mt76_connac_sta_key_conf *sta_key_conf, 2826 struct ieee80211_key_conf *key, int mcu_cmd, 2827 struct mt76_wcid *wcid, enum set_key_cmd cmd) 2828 { 2829 struct mt76_vif_link *mvif = (struct mt76_vif_link *)vif->drv_priv; 2830 struct sk_buff *skb; 2831 int ret; 2832 2833 skb = mt76_connac_mcu_alloc_sta_req(dev, mvif, wcid); 2834 if (IS_ERR(skb)) 2835 return PTR_ERR(skb); 2836 2837 ret = mt76_connac_mcu_sta_key_tlv(sta_key_conf, skb, key, cmd); 2838 if (ret) { 2839 dev_kfree_skb(skb); 2840 return ret; 2841 } 2842 2843 ret = mt76_connac_mcu_sta_wed_update(dev, skb); 2844 if (ret) { 2845 dev_kfree_skb(skb); 2846 return ret; 2847 } 2848 2849 return mt76_mcu_skb_send_msg(dev, skb, mcu_cmd, true); 2850 } 2851 EXPORT_SYMBOL_GPL(mt76_connac_mcu_add_key); 2852 2853 /* SIFS 20us + 512 byte beacon transmitted by 1Mbps (3906us) */ 2854 #define BCN_TX_ESTIMATE_TIME (4096 + 20) 2855 void mt76_connac_mcu_bss_ext_tlv(struct sk_buff *skb, struct mt76_vif_link *mvif) 2856 { 2857 struct bss_info_ext_bss *ext; 2858 int ext_bss_idx, tsf_offset; 2859 struct tlv *tlv; 2860 2861 ext_bss_idx = mvif->omac_idx - EXT_BSSID_START; 2862 if (ext_bss_idx < 0) 2863 return; 2864 2865 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_EXT_BSS, sizeof(*ext)); 2866 2867 ext = (struct bss_info_ext_bss *)tlv; 2868 tsf_offset = ext_bss_idx * BCN_TX_ESTIMATE_TIME; 2869 ext->mbss_tsf_offset = cpu_to_le32(tsf_offset); 2870 } 2871 EXPORT_SYMBOL_GPL(mt76_connac_mcu_bss_ext_tlv); 2872 2873 int mt76_connac_mcu_bss_basic_tlv(struct sk_buff *skb, 2874 struct ieee80211_vif *vif, 2875 struct ieee80211_sta *sta, 2876 struct mt76_phy *phy, u16 wlan_idx, 2877 bool enable) 2878 { 2879 struct mt76_vif_link *mvif = (struct mt76_vif_link *)vif->drv_priv; 2880 u32 type = vif->p2p ? NETWORK_P2P : NETWORK_INFRA; 2881 struct bss_info_basic *bss; 2882 struct tlv *tlv; 2883 2884 tlv = mt76_connac_mcu_add_tlv(skb, BSS_INFO_BASIC, sizeof(*bss)); 2885 bss = (struct bss_info_basic *)tlv; 2886 2887 switch (vif->type) { 2888 case NL80211_IFTYPE_MESH_POINT: 2889 case NL80211_IFTYPE_MONITOR: 2890 break; 2891 case NL80211_IFTYPE_AP: 2892 if (ieee80211_hw_check(phy->hw, SUPPORTS_MULTI_BSSID)) { 2893 u8 bssid_id = vif->bss_conf.bssid_indicator; 2894 struct wiphy *wiphy = phy->hw->wiphy; 2895 2896 if (bssid_id > ilog2(wiphy->mbssid_max_interfaces)) 2897 return -EINVAL; 2898 2899 bss->non_tx_bssid = vif->bss_conf.bssid_index; 2900 bss->max_bssid = bssid_id; 2901 } 2902 break; 2903 case NL80211_IFTYPE_STATION: 2904 if (enable) { 2905 rcu_read_lock(); 2906 if (!sta) 2907 sta = ieee80211_find_sta(vif, 2908 vif->bss_conf.bssid); 2909 /* TODO: enable BSS_INFO_UAPSD & BSS_INFO_PM */ 2910 if (sta) { 2911 struct mt76_wcid *wcid; 2912 2913 wcid = (struct mt76_wcid *)sta->drv_priv; 2914 wlan_idx = wcid->idx; 2915 } 2916 rcu_read_unlock(); 2917 } 2918 break; 2919 case NL80211_IFTYPE_ADHOC: 2920 type = NETWORK_IBSS; 2921 break; 2922 default: 2923 WARN_ON(1); 2924 break; 2925 } 2926 2927 bss->network_type = cpu_to_le32(type); 2928 bss->bmc_wcid_lo = to_wcid_lo(wlan_idx); 2929 bss->bmc_wcid_hi = to_wcid_hi(wlan_idx); 2930 bss->wmm_idx = mvif->wmm_idx; 2931 bss->active = enable; 2932 bss->cipher = mvif->cipher; 2933 2934 if (vif->type != NL80211_IFTYPE_MONITOR) { 2935 struct cfg80211_chan_def *chandef = &phy->chandef; 2936 2937 memcpy(bss->bssid, vif->bss_conf.bssid, ETH_ALEN); 2938 bss->bcn_interval = cpu_to_le16(vif->bss_conf.beacon_int); 2939 bss->dtim_period = vif->bss_conf.dtim_period; 2940 bss->phy_mode = mt76_connac_get_phy_mode(phy, vif, 2941 chandef->chan->band, NULL); 2942 } else { 2943 memcpy(bss->bssid, phy->macaddr, ETH_ALEN); 2944 } 2945 2946 return 0; 2947 } 2948 EXPORT_SYMBOL_GPL(mt76_connac_mcu_bss_basic_tlv); 2949 2950 #define ENTER_PM_STATE 1 2951 #define EXIT_PM_STATE 2 2952 int mt76_connac_mcu_set_pm(struct mt76_dev *dev, int band, int enter) 2953 { 2954 struct { 2955 u8 pm_number; 2956 u8 pm_state; 2957 u8 bssid[ETH_ALEN]; 2958 u8 dtim_period; 2959 u8 wlan_idx_lo; 2960 __le16 bcn_interval; 2961 __le32 aid; 2962 __le32 rx_filter; 2963 u8 band_idx; 2964 u8 wlan_idx_hi; 2965 u8 rsv[2]; 2966 __le32 feature; 2967 u8 omac_idx; 2968 u8 wmm_idx; 2969 u8 bcn_loss_cnt; 2970 u8 bcn_sp_duration; 2971 } __packed req = { 2972 .pm_number = 5, 2973 .pm_state = enter ? ENTER_PM_STATE : EXIT_PM_STATE, 2974 .band_idx = band, 2975 }; 2976 2977 return mt76_mcu_send_msg(dev, MCU_EXT_CMD(PM_STATE_CTRL), &req, 2978 sizeof(req), true); 2979 } 2980 EXPORT_SYMBOL_GPL(mt76_connac_mcu_set_pm); 2981 2982 int mt76_connac_mcu_restart(struct mt76_dev *dev) 2983 { 2984 struct { 2985 u8 power_mode; 2986 u8 rsv[3]; 2987 } req = { 2988 .power_mode = 1, 2989 }; 2990 2991 return mt76_mcu_send_msg(dev, MCU_CMD(NIC_POWER_CTRL), &req, 2992 sizeof(req), false); 2993 } 2994 EXPORT_SYMBOL_GPL(mt76_connac_mcu_restart); 2995 2996 int mt76_connac_mcu_del_wtbl_all(struct mt76_dev *dev) 2997 { 2998 struct wtbl_req_hdr req = { 2999 .operation = WTBL_RESET_ALL, 3000 }; 3001 3002 return mt76_mcu_send_msg(dev, MCU_EXT_CMD(WTBL_UPDATE), 3003 &req, sizeof(req), true); 3004 } 3005 EXPORT_SYMBOL_GPL(mt76_connac_mcu_del_wtbl_all); 3006 3007 int mt76_connac_mcu_rdd_cmd(struct mt76_dev *dev, int cmd, u8 index, 3008 u8 rx_sel, u8 val) 3009 { 3010 struct { 3011 u8 ctrl; 3012 u8 rdd_idx; 3013 u8 rdd_rx_sel; 3014 u8 val; 3015 u8 rsv[4]; 3016 } __packed req = { 3017 .ctrl = cmd, 3018 .rdd_idx = index, 3019 .rdd_rx_sel = rx_sel, 3020 .val = val, 3021 }; 3022 3023 return mt76_mcu_send_msg(dev, MCU_EXT_CMD(SET_RDD_CTRL), &req, 3024 sizeof(req), true); 3025 } 3026 EXPORT_SYMBOL_GPL(mt76_connac_mcu_rdd_cmd); 3027 3028 s8 mt76_connac_get_rate_power_limit(struct mt76_phy *phy, 3029 struct ieee80211_channel *chan, 3030 struct mt76_power_limits *limits) 3031 { 3032 s8 reg_power, sar_power; 3033 int tx_power; 3034 3035 tx_power = 2 * phy->hw->conf.power_level; 3036 if (!tx_power) 3037 tx_power = 127; 3038 3039 reg_power = mt76_connac_get_ch_power(phy, chan, tx_power); 3040 sar_power = mt76_get_sar_power(phy, chan, reg_power); 3041 return mt76_get_rate_power_limits(phy, chan, limits, sar_power); 3042 } 3043 EXPORT_SYMBOL_GPL(mt76_connac_get_rate_power_limit); 3044 3045 static int 3046 mt76_connac_mcu_send_ram_firmware(struct mt76_dev *dev, 3047 const struct mt76_connac2_fw_trailer *hdr, 3048 const u8 *data, bool is_wa) 3049 { 3050 int i, offset = 0, max_len = mt76_is_sdio(dev) ? 2048 : 4096; 3051 u32 override = 0, option = 0; 3052 3053 for (i = 0; i < hdr->n_region; i++) { 3054 const struct mt76_connac2_fw_region *region; 3055 u32 len, addr, mode; 3056 int err; 3057 3058 region = (const void *)((const u8 *)hdr - 3059 (hdr->n_region - i) * sizeof(*region)); 3060 mode = mt76_connac_mcu_gen_dl_mode(dev, region->feature_set, 3061 is_wa); 3062 len = le32_to_cpu(region->len); 3063 addr = le32_to_cpu(region->addr); 3064 3065 if (region->feature_set & FW_FEATURE_NON_DL) 3066 goto next; 3067 3068 if (region->feature_set & FW_FEATURE_OVERRIDE_ADDR) 3069 override = addr; 3070 3071 err = mt76_connac_mcu_init_download(dev, addr, len, mode); 3072 if (err) { 3073 dev_err(dev->dev, "Download request failed\n"); 3074 return err; 3075 } 3076 3077 err = __mt76_mcu_send_firmware(dev, MCU_CMD(FW_SCATTER), 3078 data + offset, len, max_len); 3079 if (err) { 3080 dev_err(dev->dev, "Failed to send firmware.\n"); 3081 return err; 3082 } 3083 3084 next: 3085 offset += len; 3086 } 3087 3088 if (override) 3089 option |= FW_START_OVERRIDE; 3090 if (is_wa) 3091 option |= FW_START_WORKING_PDA_CR4; 3092 3093 return mt76_connac_mcu_start_firmware(dev, override, option); 3094 } 3095 3096 static int 3097 mt76_connac_mcu_send_phy_ram_firmware(struct mt76_dev *dev, 3098 const struct mt76_connac2_fw_trailer *hdr, 3099 const u8 *data) 3100 { 3101 int i, offset = 0, max_len = mt76_is_sdio(dev) ? 2048 : 4096; 3102 u32 override = 0, option = 0; 3103 3104 for (i = 0; i < hdr->n_region; i++) { 3105 const struct mt76_connac2_fw_region *region; 3106 u32 len, addr, mode; 3107 int err; 3108 3109 region = (const void *)((const u8 *)hdr - 3110 (hdr->n_region - i) * sizeof(*region)); 3111 mode = mt76_connac_mcu_gen_dl_mode(dev, region->feature_set, 3112 true); 3113 len = le32_to_cpu(region->len); 3114 addr = le32_to_cpu(region->addr); 3115 3116 if (region->feature_set & FW_FEATURE_NON_DL) 3117 goto next; 3118 3119 if (region->feature_set & FW_FEATURE_OVERRIDE_ADDR) 3120 override = addr; 3121 3122 err = mt76_connac_mcu_init_download(dev, addr, len, mode); 3123 if (err) { 3124 dev_err(dev->dev, 3125 "The request to download PHY firmware failed.\n"); 3126 return err; 3127 } 3128 3129 err = __mt76_mcu_send_firmware(dev, MCU_CMD(FW_SCATTER), 3130 data + offset, len, max_len); 3131 if (err) { 3132 dev_err(dev->dev, "Failed to send PHY firmware.\n"); 3133 return err; 3134 } 3135 3136 next: 3137 offset += len; 3138 } 3139 3140 if (override) 3141 option |= FW_START_OVERRIDE; 3142 option |= FW_START_WORKING_PDA_DSP; 3143 3144 return mt76_connac_mcu_start_firmware(dev, override, option); 3145 } 3146 3147 int mt76_connac2_load_ram(struct mt76_dev *dev, const char *fw_wm, 3148 const char *fw_wa) 3149 { 3150 const struct mt76_connac2_fw_trailer *hdr; 3151 const struct firmware *fw; 3152 int ret; 3153 3154 ret = request_firmware(&fw, fw_wm, dev->dev); 3155 if (ret) 3156 return ret; 3157 3158 if (!fw || !fw->data || fw->size < sizeof(*hdr)) { 3159 dev_err(dev->dev, "Invalid firmware\n"); 3160 ret = -EINVAL; 3161 goto out; 3162 } 3163 3164 hdr = (const void *)(fw->data + fw->size - sizeof(*hdr)); 3165 dev_info(dev->dev, "WM Firmware Version: %.10s, Build Time: %.15s", 3166 hdr->fw_ver, hdr->build_date); 3167 3168 ret = mt76_connac_mcu_send_ram_firmware(dev, hdr, fw->data, false); 3169 if (ret) { 3170 dev_err(dev->dev, "Failed to start WM firmware\n"); 3171 goto out; 3172 } 3173 3174 snprintf(dev->hw->wiphy->fw_version, 3175 sizeof(dev->hw->wiphy->fw_version), 3176 "%.10s-%.15s", hdr->fw_ver, hdr->build_date); 3177 3178 release_firmware(fw); 3179 3180 if (!fw_wa) 3181 return 0; 3182 3183 ret = request_firmware(&fw, fw_wa, dev->dev); 3184 if (ret) 3185 return ret; 3186 3187 if (!fw || !fw->data || fw->size < sizeof(*hdr)) { 3188 dev_err(dev->dev, "Invalid firmware\n"); 3189 ret = -EINVAL; 3190 goto out; 3191 } 3192 3193 hdr = (const void *)(fw->data + fw->size - sizeof(*hdr)); 3194 dev_info(dev->dev, "WA Firmware Version: %.10s, Build Time: %.15s", 3195 hdr->fw_ver, hdr->build_date); 3196 3197 ret = mt76_connac_mcu_send_ram_firmware(dev, hdr, fw->data, true); 3198 if (ret) { 3199 dev_err(dev->dev, "Failed to start WA firmware\n"); 3200 goto out; 3201 } 3202 3203 snprintf(dev->hw->wiphy->fw_version, 3204 sizeof(dev->hw->wiphy->fw_version), 3205 "%.10s-%.15s", hdr->fw_ver, hdr->build_date); 3206 3207 out: 3208 release_firmware(fw); 3209 3210 return ret; 3211 } 3212 EXPORT_SYMBOL_GPL(mt76_connac2_load_ram); 3213 3214 int mt76_connac3_load_phy_ram(struct mt76_dev *dev, const char *fw_name) 3215 { 3216 const struct mt76_connac2_fw_trailer *hdr; 3217 const struct firmware *fw; 3218 int ret; 3219 3220 ret = request_firmware(&fw, fw_name, dev->dev); 3221 if (ret) 3222 return ret; 3223 3224 if (!fw || !fw->data || fw->size < sizeof(*hdr)) { 3225 dev_err(dev->dev, "Invalid PHY firmware\n"); 3226 ret = -EINVAL; 3227 goto out; 3228 } 3229 3230 hdr = (const void *)(fw->data + fw->size - sizeof(*hdr)); 3231 dev_info(dev->dev, "PHY Firmware Version: %.10s, Build Time: %.15s\n", 3232 hdr->fw_ver, hdr->build_date); 3233 3234 ret = mt76_connac_mcu_send_phy_ram_firmware(dev, hdr, fw->data); 3235 if (ret) { 3236 dev_err(dev->dev, "Failed to start PHY firmware\n"); 3237 goto out; 3238 } 3239 3240 out: 3241 release_firmware(fw); 3242 3243 return ret; 3244 } 3245 EXPORT_SYMBOL_GPL(mt76_connac3_load_phy_ram); 3246 3247 static u32 mt76_connac2_get_data_mode(struct mt76_dev *dev, u32 info) 3248 { 3249 u32 mode = DL_MODE_NEED_RSP; 3250 3251 if ((!is_connac2(dev) && !is_connac3(dev)) || info == PATCH_SEC_NOT_SUPPORT) 3252 return mode; 3253 3254 switch (FIELD_GET(PATCH_SEC_ENC_TYPE_MASK, info)) { 3255 case PATCH_SEC_ENC_TYPE_PLAIN: 3256 break; 3257 case PATCH_SEC_ENC_TYPE_AES: 3258 mode |= DL_MODE_ENCRYPT; 3259 mode |= FIELD_PREP(DL_MODE_KEY_IDX, 3260 (info & PATCH_SEC_ENC_AES_KEY_MASK)) & DL_MODE_KEY_IDX; 3261 mode |= DL_MODE_RESET_SEC_IV; 3262 break; 3263 case PATCH_SEC_ENC_TYPE_SCRAMBLE: 3264 mode |= DL_MODE_ENCRYPT; 3265 mode |= DL_CONFIG_ENCRY_MODE_SEL; 3266 mode |= DL_MODE_RESET_SEC_IV; 3267 break; 3268 default: 3269 dev_err(dev->dev, "Encryption type not support!\n"); 3270 } 3271 3272 return mode; 3273 } 3274 3275 int mt76_connac2_load_patch(struct mt76_dev *dev, const char *fw_name) 3276 { 3277 int i, ret, sem, max_len = mt76_is_sdio(dev) ? 2048 : 4096; 3278 const struct mt76_connac2_patch_hdr *hdr; 3279 const struct firmware *fw = NULL; 3280 3281 sem = mt76_connac_mcu_patch_sem_ctrl(dev, true); 3282 switch (sem) { 3283 case PATCH_IS_DL: 3284 return 0; 3285 case PATCH_NOT_DL_SEM_SUCCESS: 3286 break; 3287 default: 3288 dev_err(dev->dev, "Failed to get patch semaphore\n"); 3289 return -EAGAIN; 3290 } 3291 3292 ret = request_firmware(&fw, fw_name, dev->dev); 3293 if (ret) 3294 goto out; 3295 3296 if (!fw || !fw->data || fw->size < sizeof(*hdr)) { 3297 dev_err(dev->dev, "Invalid firmware\n"); 3298 ret = -EINVAL; 3299 goto out; 3300 } 3301 3302 hdr = (const void *)fw->data; 3303 dev_info(dev->dev, "HW/SW Version: 0x%x, Build Time: %.16s", 3304 be32_to_cpu(hdr->hw_sw_ver), hdr->build_date); 3305 3306 for (i = 0; i < be32_to_cpu(hdr->desc.n_region); i++) { 3307 struct mt76_connac2_patch_sec *sec; 3308 u32 len, addr, mode; 3309 const u8 *dl; 3310 u32 sec_info; 3311 3312 sec = (void *)(fw->data + sizeof(*hdr) + i * sizeof(*sec)); 3313 if ((be32_to_cpu(sec->type) & PATCH_SEC_TYPE_MASK) != 3314 PATCH_SEC_TYPE_INFO) { 3315 ret = -EINVAL; 3316 goto out; 3317 } 3318 3319 addr = be32_to_cpu(sec->info.addr); 3320 len = be32_to_cpu(sec->info.len); 3321 dl = fw->data + be32_to_cpu(sec->offs); 3322 sec_info = be32_to_cpu(sec->info.sec_key_idx); 3323 mode = mt76_connac2_get_data_mode(dev, sec_info); 3324 3325 ret = mt76_connac_mcu_init_download(dev, addr, len, mode); 3326 if (ret) { 3327 dev_err(dev->dev, "Download request failed\n"); 3328 goto out; 3329 } 3330 3331 ret = __mt76_mcu_send_firmware(dev, MCU_CMD(FW_SCATTER), 3332 dl, len, max_len); 3333 if (ret) { 3334 dev_err(dev->dev, "Failed to send patch\n"); 3335 goto out; 3336 } 3337 } 3338 3339 ret = mt76_connac_mcu_start_patch(dev); 3340 if (ret) 3341 dev_err(dev->dev, "Failed to start patch\n"); 3342 3343 out: 3344 sem = mt76_connac_mcu_patch_sem_ctrl(dev, false); 3345 switch (sem) { 3346 case PATCH_REL_SEM_SUCCESS: 3347 break; 3348 default: 3349 ret = -EAGAIN; 3350 dev_err(dev->dev, "Failed to release patch semaphore\n"); 3351 break; 3352 } 3353 3354 release_firmware(fw); 3355 3356 return ret; 3357 } 3358 EXPORT_SYMBOL_GPL(mt76_connac2_load_patch); 3359 3360 int mt76_connac3_load_cb_patch(struct mt76_dev *dev, const char *fw_name) 3361 { 3362 const struct mt76_connac3_multi_header_v2_sec_raw_format *sect = NULL; 3363 const struct mt76_connac3_multi_header_v2_raw_format *hdr = NULL; 3364 int i, ret, sem, max_len = mt76_is_sdio(dev) ? 2048 : 4096; 3365 const struct firmware *fw = NULL; 3366 const u8 *dl; 3367 u32 len; 3368 3369 sem = mt76_connac_cb_mcu_patch_sem_ctrl(dev, true); 3370 switch (sem) { 3371 case CB_PATCH_IS_DL: 3372 return 0; 3373 case CB_PATCH_GET_SEM_NEED_PATCH: 3374 break; 3375 default: 3376 dev_err(dev->dev, "Failed to get cb patch semaphore %u\n", sem); 3377 return -EAGAIN; 3378 } 3379 3380 ret = request_firmware(&fw, fw_name, dev->dev); 3381 if (ret) 3382 goto out; 3383 3384 if (!fw || !fw->data || fw->size < sizeof(*hdr)) { 3385 dev_err(dev->dev, "Invalid firmware\n"); 3386 ret = -EINVAL; 3387 goto out; 3388 } 3389 3390 hdr = (const void *)fw->data; 3391 dev_info(dev->dev, "HW/SW Version: 0x%x, Pack Time: %.21s\n", 3392 le32_to_cpu(hdr->patch_ver), hdr->pack_time); 3393 3394 if (le32_to_cpu(hdr->sec_num) < 2) { 3395 dev_err(dev->dev, "Invalid section numbers %u\n", 3396 le32_to_cpu(hdr->sec_num)); 3397 ret = -EINVAL; 3398 goto out; 3399 } 3400 3401 sect = &hdr->sects[0]; 3402 /* check the fw bin basic info */ 3403 if (((le32_to_cpu(sect->type) & SEC_TYPE_SUBSYS_MASK) 3404 != SEC_TYPE_SUBSYS_CBMCU) || 3405 ((le32_to_cpu(sect->type) & SEC_TYPE_SUBSYS_SEC_MASK) 3406 != SEC_TYPE_SUBSYS_SEC_IMG_SIGN)) { 3407 dev_err(dev->dev, "Invalid CBMCU firmware\n"); 3408 ret = -EINVAL; 3409 goto out; 3410 } 3411 3412 /* download global desc + sect map + cert section */ 3413 len = sizeof(struct mt76_connac3_multi_header_v2_raw_format) - 3414 offsetof(struct mt76_connac3_multi_header_v2_raw_format, 3415 global_desc_head) + 3416 sizeof(struct mt76_connac3_multi_header_v2_sec_raw_format) * 3417 le32_to_cpu(hdr->sec_num) + 3418 le32_to_cpu(hdr->sects[0].size); 3419 dl = &hdr->global_desc_head[0]; 3420 3421 ret = mt76_connac_cb_mcu_init_download(dev, len); 3422 if (ret) { 3423 dev_err(dev->dev, "Download cb cert section request failed\n"); 3424 goto out; 3425 } 3426 3427 ret = __mt76_mcu_send_firmware(dev, MCU_CMD(FW_SCATTER), 3428 dl, len, max_len); 3429 if (ret) { 3430 dev_err(dev->dev, "Failed to send cb patch cert section\n"); 3431 goto out; 3432 } 3433 3434 ret = mt76_connac_cb_mcu_start_patch(dev); 3435 if (ret) { 3436 dev_err(dev->dev, "CBMCU cert check fail\n"); 3437 goto out; 3438 } 3439 3440 /* download cbmcu idlm */ 3441 for (i = 1; i < le32_to_cpu(hdr->sec_num); i++) { 3442 dl = (uint8_t *)hdr + le32_to_cpu(hdr->sects[i].offset); 3443 len = le32_to_cpu(hdr->sects[i].size); 3444 3445 ret = mt76_connac_cb_mcu_init_download(dev, len); 3446 if (ret) { 3447 dev_err(dev->dev, 3448 "Download cb section %u request failed\n", i); 3449 goto out; 3450 } 3451 3452 ret = __mt76_mcu_send_firmware(dev, MCU_CMD(FW_SCATTER), 3453 dl, len, max_len); 3454 if (ret) { 3455 dev_err(dev->dev, 3456 "Failed to send cb patch section %u\n", i); 3457 goto out; 3458 } 3459 } 3460 3461 ret = mt76_connac_cb_mcu_start_patch(dev); 3462 if (ret) 3463 dev_err(dev->dev, "Failed to start cb patch\n"); 3464 3465 out: 3466 sem = mt76_connac_cb_mcu_patch_sem_ctrl(dev, false); 3467 switch (sem) { 3468 case CB_PATCH_REL_SEM_SUCCESS: 3469 break; 3470 default: 3471 ret = -EAGAIN; 3472 dev_err(dev->dev, "Failed to release cb patch semaphore\n"); 3473 break; 3474 } 3475 3476 release_firmware(fw); 3477 3478 return ret; 3479 } 3480 EXPORT_SYMBOL_GPL(mt76_connac3_load_cb_patch); 3481 3482 int mt76_connac2_mcu_fill_message(struct mt76_dev *dev, struct sk_buff *skb, 3483 int cmd, int *wait_seq) 3484 { 3485 int txd_len, mcu_cmd = FIELD_GET(__MCU_CMD_FIELD_ID, cmd); 3486 struct mt76_connac2_mcu_uni_txd *uni_txd; 3487 struct mt76_connac2_mcu_txd *mcu_txd; 3488 __le32 *txd; 3489 u32 val; 3490 u8 seq; 3491 3492 /* TODO: make dynamic based on msg type */ 3493 dev->mcu.timeout = 20 * HZ; 3494 3495 seq = ++dev->mcu.msg_seq & 0xf; 3496 if (!seq) 3497 seq = ++dev->mcu.msg_seq & 0xf; 3498 3499 if (cmd == MCU_CMD(FW_SCATTER)) 3500 goto exit; 3501 3502 txd_len = cmd & __MCU_CMD_FIELD_UNI ? sizeof(*uni_txd) : sizeof(*mcu_txd); 3503 txd = (__le32 *)skb_push(skb, txd_len); 3504 3505 val = FIELD_PREP(MT_TXD0_TX_BYTES, skb->len) | 3506 FIELD_PREP(MT_TXD0_PKT_FMT, MT_TX_TYPE_CMD) | 3507 FIELD_PREP(MT_TXD0_Q_IDX, MT_TX_MCU_PORT_RX_Q0); 3508 txd[0] = cpu_to_le32(val); 3509 3510 val = MT_TXD1_LONG_FORMAT | 3511 FIELD_PREP(MT_TXD1_HDR_FORMAT, MT_HDR_FORMAT_CMD); 3512 txd[1] = cpu_to_le32(val); 3513 3514 if (cmd & __MCU_CMD_FIELD_UNI) { 3515 uni_txd = (struct mt76_connac2_mcu_uni_txd *)txd; 3516 uni_txd->len = cpu_to_le16(skb->len - sizeof(uni_txd->txd)); 3517 uni_txd->option = MCU_CMD_UNI_EXT_ACK; 3518 uni_txd->cid = cpu_to_le16(mcu_cmd); 3519 uni_txd->s2d_index = MCU_S2D_H2N; 3520 uni_txd->pkt_type = MCU_PKT_ID; 3521 uni_txd->seq = seq; 3522 3523 goto exit; 3524 } 3525 3526 mcu_txd = (struct mt76_connac2_mcu_txd *)txd; 3527 mcu_txd->len = cpu_to_le16(skb->len - sizeof(mcu_txd->txd)); 3528 mcu_txd->pq_id = cpu_to_le16(MCU_PQ_ID(MT_TX_PORT_IDX_MCU, 3529 MT_TX_MCU_PORT_RX_Q0)); 3530 mcu_txd->pkt_type = MCU_PKT_ID; 3531 mcu_txd->seq = seq; 3532 mcu_txd->cid = mcu_cmd; 3533 mcu_txd->ext_cid = FIELD_GET(__MCU_CMD_FIELD_EXT_ID, cmd); 3534 3535 if (mcu_txd->ext_cid || (cmd & __MCU_CMD_FIELD_CE)) { 3536 if (cmd & __MCU_CMD_FIELD_QUERY) 3537 mcu_txd->set_query = MCU_Q_QUERY; 3538 else 3539 mcu_txd->set_query = MCU_Q_SET; 3540 mcu_txd->ext_cid_ack = !!mcu_txd->ext_cid; 3541 } else { 3542 mcu_txd->set_query = MCU_Q_NA; 3543 } 3544 3545 if (cmd & __MCU_CMD_FIELD_WA) 3546 mcu_txd->s2d_index = MCU_S2D_H2C; 3547 else 3548 mcu_txd->s2d_index = MCU_S2D_H2N; 3549 3550 exit: 3551 if (wait_seq) 3552 *wait_seq = seq; 3553 3554 return 0; 3555 } 3556 EXPORT_SYMBOL_GPL(mt76_connac2_mcu_fill_message); 3557 3558 MODULE_AUTHOR("Lorenzo Bianconi <lorenzo@kernel.org>"); 3559 MODULE_DESCRIPTION("MediaTek MT76x connac layer helpers"); 3560 MODULE_LICENSE("Dual BSD/GPL"); 3561