1 // SPDX-License-Identifier: GPL-2.0 2 /* Copyright(c) 1999 - 2024 Intel Corporation. */ 3 4 /* ethtool support for ixgbe */ 5 6 #include <linux/interrupt.h> 7 #include <linux/types.h> 8 #include <linux/module.h> 9 #include <linux/slab.h> 10 #include <linux/pci.h> 11 #include <linux/netdevice.h> 12 #include <linux/ethtool.h> 13 #include <linux/vmalloc.h> 14 #include <linux/highmem.h> 15 #include <linux/string_choices.h> 16 #include <linux/uaccess.h> 17 18 #include "ixgbe.h" 19 #include "ixgbe_phy.h" 20 21 22 enum {NETDEV_STATS, IXGBE_STATS}; 23 24 struct ixgbe_stats { 25 char stat_string[ETH_GSTRING_LEN]; 26 int type; 27 int sizeof_stat; 28 int stat_offset; 29 }; 30 31 #define IXGBE_STAT(m) IXGBE_STATS, \ 32 sizeof(((struct ixgbe_adapter *)0)->m), \ 33 offsetof(struct ixgbe_adapter, m) 34 #define IXGBE_NETDEV_STAT(m) NETDEV_STATS, \ 35 sizeof(((struct rtnl_link_stats64 *)0)->m), \ 36 offsetof(struct rtnl_link_stats64, m) 37 38 static const struct ixgbe_stats ixgbe_gstrings_stats[] = { 39 {"rx_packets", IXGBE_NETDEV_STAT(rx_packets)}, 40 {"tx_packets", IXGBE_NETDEV_STAT(tx_packets)}, 41 {"rx_bytes", IXGBE_NETDEV_STAT(rx_bytes)}, 42 {"tx_bytes", IXGBE_NETDEV_STAT(tx_bytes)}, 43 {"rx_pkts_nic", IXGBE_STAT(stats.gprc)}, 44 {"tx_pkts_nic", IXGBE_STAT(stats.gptc)}, 45 {"rx_bytes_nic", IXGBE_STAT(stats.gorc)}, 46 {"tx_bytes_nic", IXGBE_STAT(stats.gotc)}, 47 {"lsc_int", IXGBE_STAT(lsc_int)}, 48 {"tx_busy", IXGBE_STAT(tx_busy)}, 49 {"non_eop_descs", IXGBE_STAT(non_eop_descs)}, 50 {"rx_errors", IXGBE_NETDEV_STAT(rx_errors)}, 51 {"tx_errors", IXGBE_NETDEV_STAT(tx_errors)}, 52 {"rx_dropped", IXGBE_NETDEV_STAT(rx_dropped)}, 53 {"tx_dropped", IXGBE_NETDEV_STAT(tx_dropped)}, 54 {"multicast", IXGBE_NETDEV_STAT(multicast)}, 55 {"broadcast", IXGBE_STAT(stats.bprc)}, 56 {"rx_no_buffer_count", IXGBE_STAT(stats.rnbc[0]) }, 57 {"collisions", IXGBE_NETDEV_STAT(collisions)}, 58 {"rx_over_errors", IXGBE_NETDEV_STAT(rx_over_errors)}, 59 {"rx_crc_errors", IXGBE_NETDEV_STAT(rx_crc_errors)}, 60 {"rx_frame_errors", IXGBE_NETDEV_STAT(rx_frame_errors)}, 61 {"hw_rsc_aggregated", IXGBE_STAT(rsc_total_count)}, 62 {"hw_rsc_flushed", IXGBE_STAT(rsc_total_flush)}, 63 {"fdir_match", IXGBE_STAT(stats.fdirmatch)}, 64 {"fdir_miss", IXGBE_STAT(stats.fdirmiss)}, 65 {"fdir_overflow", IXGBE_STAT(fdir_overflow)}, 66 {"rx_fifo_errors", IXGBE_NETDEV_STAT(rx_fifo_errors)}, 67 {"rx_missed_errors", IXGBE_NETDEV_STAT(rx_missed_errors)}, 68 {"tx_aborted_errors", IXGBE_NETDEV_STAT(tx_aborted_errors)}, 69 {"tx_carrier_errors", IXGBE_NETDEV_STAT(tx_carrier_errors)}, 70 {"tx_fifo_errors", IXGBE_NETDEV_STAT(tx_fifo_errors)}, 71 {"tx_heartbeat_errors", IXGBE_NETDEV_STAT(tx_heartbeat_errors)}, 72 {"tx_timeout_count", IXGBE_STAT(tx_timeout_count)}, 73 {"tx_restart_queue", IXGBE_STAT(restart_queue)}, 74 {"rx_length_errors", IXGBE_STAT(stats.rlec)}, 75 {"rx_long_length_errors", IXGBE_STAT(stats.roc)}, 76 {"rx_short_length_errors", IXGBE_STAT(stats.ruc)}, 77 {"tx_flow_control_xon", IXGBE_STAT(stats.lxontxc)}, 78 {"rx_flow_control_xon", IXGBE_STAT(stats.lxonrxc)}, 79 {"tx_flow_control_xoff", IXGBE_STAT(stats.lxofftxc)}, 80 {"rx_flow_control_xoff", IXGBE_STAT(stats.lxoffrxc)}, 81 {"rx_csum_offload_errors", IXGBE_STAT(hw_csum_rx_error)}, 82 {"alloc_rx_page", IXGBE_STAT(alloc_rx_page)}, 83 {"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed)}, 84 {"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed)}, 85 {"rx_no_dma_resources", IXGBE_STAT(hw_rx_no_dma_resources)}, 86 {"os2bmc_rx_by_bmc", IXGBE_STAT(stats.o2bgptc)}, 87 {"os2bmc_tx_by_bmc", IXGBE_STAT(stats.b2ospc)}, 88 {"os2bmc_tx_by_host", IXGBE_STAT(stats.o2bspc)}, 89 {"os2bmc_rx_by_host", IXGBE_STAT(stats.b2ogprc)}, 90 {"tx_hwtstamp_timeouts", IXGBE_STAT(tx_hwtstamp_timeouts)}, 91 {"tx_hwtstamp_skipped", IXGBE_STAT(tx_hwtstamp_skipped)}, 92 {"rx_hwtstamp_cleared", IXGBE_STAT(rx_hwtstamp_cleared)}, 93 {"tx_ipsec", IXGBE_STAT(tx_ipsec)}, 94 {"rx_ipsec", IXGBE_STAT(rx_ipsec)}, 95 #ifdef IXGBE_FCOE 96 {"fcoe_bad_fccrc", IXGBE_STAT(stats.fccrc)}, 97 {"rx_fcoe_dropped", IXGBE_STAT(stats.fcoerpdc)}, 98 {"rx_fcoe_packets", IXGBE_STAT(stats.fcoeprc)}, 99 {"rx_fcoe_dwords", IXGBE_STAT(stats.fcoedwrc)}, 100 {"fcoe_noddp", IXGBE_STAT(stats.fcoe_noddp)}, 101 {"fcoe_noddp_ext_buff", IXGBE_STAT(stats.fcoe_noddp_ext_buff)}, 102 {"tx_fcoe_packets", IXGBE_STAT(stats.fcoeptc)}, 103 {"tx_fcoe_dwords", IXGBE_STAT(stats.fcoedwtc)}, 104 #endif /* IXGBE_FCOE */ 105 }; 106 107 /* ixgbe allocates num_tx_queues and num_rx_queues symmetrically so 108 * we set the num_rx_queues to evaluate to num_tx_queues. This is 109 * used because we do not have a good way to get the max number of 110 * rx queues with CONFIG_RPS disabled. 111 */ 112 #define IXGBE_NUM_RX_QUEUES netdev->num_tx_queues 113 114 #define IXGBE_QUEUE_STATS_LEN ( \ 115 (netdev->num_tx_queues + IXGBE_NUM_RX_QUEUES) * \ 116 (sizeof(struct ixgbe_queue_stats) / sizeof(u64))) 117 #define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats) 118 #define IXGBE_PB_STATS_LEN ( \ 119 (sizeof(((struct ixgbe_adapter *)0)->stats.pxonrxc) + \ 120 sizeof(((struct ixgbe_adapter *)0)->stats.pxontxc) + \ 121 sizeof(((struct ixgbe_adapter *)0)->stats.pxoffrxc) + \ 122 sizeof(((struct ixgbe_adapter *)0)->stats.pxofftxc)) \ 123 / sizeof(u64)) 124 #define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + \ 125 IXGBE_PB_STATS_LEN + \ 126 IXGBE_QUEUE_STATS_LEN) 127 128 static const char ixgbe_gstrings_test[][ETH_GSTRING_LEN] = { 129 "Register test (offline)", "Eeprom test (offline)", 130 "Interrupt test (offline)", "Loopback test (offline)", 131 "Link test (on/offline)" 132 }; 133 #define IXGBE_TEST_LEN sizeof(ixgbe_gstrings_test) / ETH_GSTRING_LEN 134 135 static const char ixgbe_priv_flags_strings[][ETH_GSTRING_LEN] = { 136 #define IXGBE_PRIV_FLAGS_LEGACY_RX BIT(0) 137 "legacy-rx", 138 #define IXGBE_PRIV_FLAGS_VF_IPSEC_EN BIT(1) 139 "vf-ipsec", 140 #define IXGBE_PRIV_FLAGS_AUTO_DISABLE_VF BIT(2) 141 "mdd-disable-vf", 142 }; 143 144 #define IXGBE_PRIV_FLAGS_STR_LEN ARRAY_SIZE(ixgbe_priv_flags_strings) 145 146 #define ixgbe_isbackplane(type) ((type) == ixgbe_media_type_backplane) 147 148 static void ixgbe_set_supported_10gtypes(struct ixgbe_hw *hw, 149 struct ethtool_link_ksettings *cmd) 150 { 151 if (!ixgbe_isbackplane(hw->phy.media_type)) { 152 ethtool_link_ksettings_add_link_mode(cmd, supported, 153 10000baseT_Full); 154 return; 155 } 156 157 switch (hw->device_id) { 158 case IXGBE_DEV_ID_82598: 159 case IXGBE_DEV_ID_82599_KX4: 160 case IXGBE_DEV_ID_82599_KX4_MEZZ: 161 case IXGBE_DEV_ID_X550EM_X_KX4: 162 ethtool_link_ksettings_add_link_mode 163 (cmd, supported, 10000baseKX4_Full); 164 break; 165 case IXGBE_DEV_ID_82598_BX: 166 case IXGBE_DEV_ID_82599_KR: 167 case IXGBE_DEV_ID_X550EM_X_KR: 168 case IXGBE_DEV_ID_X550EM_X_XFI: 169 ethtool_link_ksettings_add_link_mode 170 (cmd, supported, 10000baseKR_Full); 171 break; 172 default: 173 ethtool_link_ksettings_add_link_mode 174 (cmd, supported, 10000baseKX4_Full); 175 ethtool_link_ksettings_add_link_mode 176 (cmd, supported, 10000baseKR_Full); 177 break; 178 } 179 } 180 181 static void ixgbe_set_advertising_10gtypes(struct ixgbe_hw *hw, 182 struct ethtool_link_ksettings *cmd) 183 { 184 if (!ixgbe_isbackplane(hw->phy.media_type)) { 185 ethtool_link_ksettings_add_link_mode(cmd, advertising, 186 10000baseT_Full); 187 return; 188 } 189 190 switch (hw->device_id) { 191 case IXGBE_DEV_ID_82598: 192 case IXGBE_DEV_ID_82599_KX4: 193 case IXGBE_DEV_ID_82599_KX4_MEZZ: 194 case IXGBE_DEV_ID_X550EM_X_KX4: 195 ethtool_link_ksettings_add_link_mode 196 (cmd, advertising, 10000baseKX4_Full); 197 break; 198 case IXGBE_DEV_ID_82598_BX: 199 case IXGBE_DEV_ID_82599_KR: 200 case IXGBE_DEV_ID_X550EM_X_KR: 201 case IXGBE_DEV_ID_X550EM_X_XFI: 202 ethtool_link_ksettings_add_link_mode 203 (cmd, advertising, 10000baseKR_Full); 204 break; 205 default: 206 ethtool_link_ksettings_add_link_mode 207 (cmd, advertising, 10000baseKX4_Full); 208 ethtool_link_ksettings_add_link_mode 209 (cmd, advertising, 10000baseKR_Full); 210 break; 211 } 212 } 213 214 static int ixgbe_get_link_ksettings(struct net_device *netdev, 215 struct ethtool_link_ksettings *cmd) 216 { 217 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 218 struct ixgbe_hw *hw = &adapter->hw; 219 ixgbe_link_speed supported_link; 220 bool autoneg = false; 221 222 ethtool_link_ksettings_zero_link_mode(cmd, supported); 223 ethtool_link_ksettings_zero_link_mode(cmd, advertising); 224 225 hw->mac.ops.get_link_capabilities(hw, &supported_link, &autoneg); 226 227 /* set the supported link speeds */ 228 if (supported_link & IXGBE_LINK_SPEED_10GB_FULL) { 229 ixgbe_set_supported_10gtypes(hw, cmd); 230 ixgbe_set_advertising_10gtypes(hw, cmd); 231 } 232 if (supported_link & IXGBE_LINK_SPEED_5GB_FULL) 233 ethtool_link_ksettings_add_link_mode(cmd, supported, 234 5000baseT_Full); 235 236 if (supported_link & IXGBE_LINK_SPEED_2_5GB_FULL) 237 ethtool_link_ksettings_add_link_mode(cmd, supported, 238 2500baseT_Full); 239 240 if (supported_link & IXGBE_LINK_SPEED_1GB_FULL) { 241 if (ixgbe_isbackplane(hw->phy.media_type)) { 242 ethtool_link_ksettings_add_link_mode(cmd, supported, 243 1000baseKX_Full); 244 ethtool_link_ksettings_add_link_mode(cmd, advertising, 245 1000baseKX_Full); 246 } else { 247 ethtool_link_ksettings_add_link_mode(cmd, supported, 248 1000baseT_Full); 249 ethtool_link_ksettings_add_link_mode(cmd, advertising, 250 1000baseT_Full); 251 } 252 } 253 if (supported_link & IXGBE_LINK_SPEED_100_FULL) { 254 ethtool_link_ksettings_add_link_mode(cmd, supported, 255 100baseT_Full); 256 ethtool_link_ksettings_add_link_mode(cmd, advertising, 257 100baseT_Full); 258 } 259 if (supported_link & IXGBE_LINK_SPEED_10_FULL) { 260 ethtool_link_ksettings_add_link_mode(cmd, supported, 261 10baseT_Full); 262 ethtool_link_ksettings_add_link_mode(cmd, advertising, 263 10baseT_Full); 264 } 265 266 /* set the advertised speeds */ 267 if (hw->phy.autoneg_advertised) { 268 ethtool_link_ksettings_zero_link_mode(cmd, advertising); 269 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10_FULL) 270 ethtool_link_ksettings_add_link_mode(cmd, advertising, 271 10baseT_Full); 272 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_100_FULL) 273 ethtool_link_ksettings_add_link_mode(cmd, advertising, 274 100baseT_Full); 275 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL) 276 ixgbe_set_advertising_10gtypes(hw, cmd); 277 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL) { 278 if (ethtool_link_ksettings_test_link_mode 279 (cmd, supported, 1000baseKX_Full)) 280 ethtool_link_ksettings_add_link_mode 281 (cmd, advertising, 1000baseKX_Full); 282 else 283 ethtool_link_ksettings_add_link_mode 284 (cmd, advertising, 1000baseT_Full); 285 } 286 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_5GB_FULL) 287 ethtool_link_ksettings_add_link_mode(cmd, advertising, 288 5000baseT_Full); 289 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_2_5GB_FULL) 290 ethtool_link_ksettings_add_link_mode(cmd, advertising, 291 2500baseT_Full); 292 } else { 293 if (hw->phy.multispeed_fiber && !autoneg) { 294 if (supported_link & IXGBE_LINK_SPEED_10GB_FULL) 295 ethtool_link_ksettings_add_link_mode 296 (cmd, advertising, 10000baseT_Full); 297 } 298 } 299 300 if (autoneg) { 301 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg); 302 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg); 303 cmd->base.autoneg = AUTONEG_ENABLE; 304 } else 305 cmd->base.autoneg = AUTONEG_DISABLE; 306 307 /* Determine the remaining settings based on the PHY type. */ 308 switch (adapter->hw.phy.type) { 309 case ixgbe_phy_tn: 310 case ixgbe_phy_aq: 311 case ixgbe_phy_x550em_ext_t: 312 case ixgbe_phy_fw: 313 case ixgbe_phy_cu_unknown: 314 ethtool_link_ksettings_add_link_mode(cmd, supported, TP); 315 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP); 316 cmd->base.port = PORT_TP; 317 break; 318 case ixgbe_phy_qt: 319 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE); 320 ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE); 321 cmd->base.port = PORT_FIBRE; 322 break; 323 case ixgbe_phy_nl: 324 case ixgbe_phy_sfp_passive_tyco: 325 case ixgbe_phy_sfp_passive_unknown: 326 case ixgbe_phy_sfp_ftl: 327 case ixgbe_phy_sfp_avago: 328 case ixgbe_phy_sfp_intel: 329 case ixgbe_phy_sfp_unknown: 330 case ixgbe_phy_qsfp_passive_unknown: 331 case ixgbe_phy_qsfp_active_unknown: 332 case ixgbe_phy_qsfp_intel: 333 case ixgbe_phy_qsfp_unknown: 334 /* SFP+ devices, further checking needed */ 335 switch (adapter->hw.phy.sfp_type) { 336 case ixgbe_sfp_type_da_cu: 337 case ixgbe_sfp_type_da_cu_core0: 338 case ixgbe_sfp_type_da_cu_core1: 339 ethtool_link_ksettings_add_link_mode(cmd, supported, 340 FIBRE); 341 ethtool_link_ksettings_add_link_mode(cmd, advertising, 342 FIBRE); 343 cmd->base.port = PORT_DA; 344 break; 345 case ixgbe_sfp_type_sr: 346 case ixgbe_sfp_type_lr: 347 case ixgbe_sfp_type_srlr_core0: 348 case ixgbe_sfp_type_srlr_core1: 349 case ixgbe_sfp_type_1g_sx_core0: 350 case ixgbe_sfp_type_1g_sx_core1: 351 case ixgbe_sfp_type_1g_lx_core0: 352 case ixgbe_sfp_type_1g_lx_core1: 353 case ixgbe_sfp_type_1g_bx_core0: 354 case ixgbe_sfp_type_1g_bx_core1: 355 case ixgbe_sfp_type_10g_bx_core0: 356 case ixgbe_sfp_type_10g_bx_core1: 357 ethtool_link_ksettings_add_link_mode(cmd, supported, 358 FIBRE); 359 ethtool_link_ksettings_add_link_mode(cmd, advertising, 360 FIBRE); 361 cmd->base.port = PORT_FIBRE; 362 break; 363 case ixgbe_sfp_type_not_present: 364 ethtool_link_ksettings_add_link_mode(cmd, supported, 365 FIBRE); 366 ethtool_link_ksettings_add_link_mode(cmd, advertising, 367 FIBRE); 368 cmd->base.port = PORT_NONE; 369 break; 370 case ixgbe_sfp_type_1g_cu_core0: 371 case ixgbe_sfp_type_1g_cu_core1: 372 ethtool_link_ksettings_add_link_mode(cmd, supported, 373 TP); 374 ethtool_link_ksettings_add_link_mode(cmd, advertising, 375 TP); 376 cmd->base.port = PORT_TP; 377 break; 378 case ixgbe_sfp_type_unknown: 379 default: 380 ethtool_link_ksettings_add_link_mode(cmd, supported, 381 FIBRE); 382 ethtool_link_ksettings_add_link_mode(cmd, advertising, 383 FIBRE); 384 cmd->base.port = PORT_OTHER; 385 break; 386 } 387 break; 388 case ixgbe_phy_xaui: 389 ethtool_link_ksettings_add_link_mode(cmd, supported, 390 FIBRE); 391 ethtool_link_ksettings_add_link_mode(cmd, advertising, 392 FIBRE); 393 cmd->base.port = PORT_NONE; 394 break; 395 case ixgbe_phy_unknown: 396 case ixgbe_phy_generic: 397 case ixgbe_phy_sfp_unsupported: 398 default: 399 ethtool_link_ksettings_add_link_mode(cmd, supported, 400 FIBRE); 401 ethtool_link_ksettings_add_link_mode(cmd, advertising, 402 FIBRE); 403 cmd->base.port = PORT_OTHER; 404 break; 405 } 406 407 /* Indicate pause support */ 408 ethtool_link_ksettings_add_link_mode(cmd, supported, Pause); 409 410 switch (hw->fc.requested_mode) { 411 case ixgbe_fc_full: 412 ethtool_link_ksettings_add_link_mode(cmd, advertising, Pause); 413 break; 414 case ixgbe_fc_rx_pause: 415 ethtool_link_ksettings_add_link_mode(cmd, advertising, Pause); 416 ethtool_link_ksettings_add_link_mode(cmd, advertising, 417 Asym_Pause); 418 break; 419 case ixgbe_fc_tx_pause: 420 ethtool_link_ksettings_add_link_mode(cmd, advertising, 421 Asym_Pause); 422 break; 423 default: 424 ethtool_link_ksettings_del_link_mode(cmd, advertising, Pause); 425 ethtool_link_ksettings_del_link_mode(cmd, advertising, 426 Asym_Pause); 427 } 428 429 if (netif_carrier_ok(netdev)) { 430 switch (adapter->link_speed) { 431 case IXGBE_LINK_SPEED_10GB_FULL: 432 cmd->base.speed = SPEED_10000; 433 break; 434 case IXGBE_LINK_SPEED_5GB_FULL: 435 cmd->base.speed = SPEED_5000; 436 break; 437 case IXGBE_LINK_SPEED_2_5GB_FULL: 438 cmd->base.speed = SPEED_2500; 439 break; 440 case IXGBE_LINK_SPEED_1GB_FULL: 441 cmd->base.speed = SPEED_1000; 442 break; 443 case IXGBE_LINK_SPEED_100_FULL: 444 cmd->base.speed = SPEED_100; 445 break; 446 case IXGBE_LINK_SPEED_10_FULL: 447 cmd->base.speed = SPEED_10; 448 break; 449 default: 450 break; 451 } 452 cmd->base.duplex = DUPLEX_FULL; 453 } else { 454 cmd->base.speed = SPEED_UNKNOWN; 455 cmd->base.duplex = DUPLEX_UNKNOWN; 456 } 457 458 return 0; 459 } 460 461 static int ixgbe_set_link_ksettings(struct net_device *netdev, 462 const struct ethtool_link_ksettings *cmd) 463 { 464 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 465 struct ixgbe_hw *hw = &adapter->hw; 466 u32 advertised, old; 467 int err = 0; 468 469 if ((hw->phy.media_type == ixgbe_media_type_copper) || 470 (hw->phy.multispeed_fiber)) { 471 /* 472 * this function does not support duplex forcing, but can 473 * limit the advertising of the adapter to the specified speed 474 */ 475 if (!linkmode_subset(cmd->link_modes.advertising, 476 cmd->link_modes.supported)) 477 return -EINVAL; 478 479 /* only allow one speed at a time if no autoneg */ 480 if (!cmd->base.autoneg && hw->phy.multispeed_fiber) { 481 if (ethtool_link_ksettings_test_link_mode(cmd, advertising, 482 10000baseT_Full) && 483 ethtool_link_ksettings_test_link_mode(cmd, advertising, 484 1000baseT_Full)) 485 return -EINVAL; 486 } 487 488 old = hw->phy.autoneg_advertised; 489 advertised = 0; 490 if (ethtool_link_ksettings_test_link_mode(cmd, advertising, 491 10000baseT_Full)) 492 advertised |= IXGBE_LINK_SPEED_10GB_FULL; 493 if (ethtool_link_ksettings_test_link_mode(cmd, advertising, 494 5000baseT_Full)) 495 advertised |= IXGBE_LINK_SPEED_5GB_FULL; 496 if (ethtool_link_ksettings_test_link_mode(cmd, advertising, 497 2500baseT_Full)) 498 advertised |= IXGBE_LINK_SPEED_2_5GB_FULL; 499 if (ethtool_link_ksettings_test_link_mode(cmd, advertising, 500 1000baseT_Full)) 501 advertised |= IXGBE_LINK_SPEED_1GB_FULL; 502 503 if (ethtool_link_ksettings_test_link_mode(cmd, advertising, 504 100baseT_Full)) 505 advertised |= IXGBE_LINK_SPEED_100_FULL; 506 507 if (ethtool_link_ksettings_test_link_mode(cmd, advertising, 508 10baseT_Full)) 509 advertised |= IXGBE_LINK_SPEED_10_FULL; 510 511 if (old == advertised) 512 return err; 513 /* this sets the link speed and restarts auto-neg */ 514 while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state)) 515 usleep_range(1000, 2000); 516 517 hw->mac.autotry_restart = true; 518 err = hw->mac.ops.setup_link(hw, advertised, true); 519 if (err) { 520 e_info(probe, "setup link failed with code %d\n", err); 521 hw->mac.ops.setup_link(hw, old, true); 522 } 523 clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state); 524 } else { 525 /* in this case we currently only support 10Gb/FULL */ 526 u32 speed = cmd->base.speed; 527 528 if ((cmd->base.autoneg == AUTONEG_ENABLE) || 529 (!ethtool_link_ksettings_test_link_mode(cmd, advertising, 530 10000baseT_Full)) || 531 (speed + cmd->base.duplex != SPEED_10000 + DUPLEX_FULL)) 532 return -EINVAL; 533 } 534 535 return err; 536 } 537 538 static void ixgbe_get_pause_stats(struct net_device *netdev, 539 struct ethtool_pause_stats *stats) 540 { 541 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 542 struct ixgbe_hw_stats *hwstats = &adapter->stats; 543 544 stats->tx_pause_frames = hwstats->lxontxc + hwstats->lxofftxc; 545 stats->rx_pause_frames = hwstats->lxonrxc + hwstats->lxoffrxc; 546 } 547 548 static void ixgbe_get_pauseparam(struct net_device *netdev, 549 struct ethtool_pauseparam *pause) 550 { 551 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 552 struct ixgbe_hw *hw = &adapter->hw; 553 554 if (ixgbe_device_supports_autoneg_fc(hw) && 555 !hw->fc.disable_fc_autoneg) 556 pause->autoneg = 1; 557 else 558 pause->autoneg = 0; 559 560 if (hw->fc.current_mode == ixgbe_fc_rx_pause) { 561 pause->rx_pause = 1; 562 } else if (hw->fc.current_mode == ixgbe_fc_tx_pause) { 563 pause->tx_pause = 1; 564 } else if (hw->fc.current_mode == ixgbe_fc_full) { 565 pause->rx_pause = 1; 566 pause->tx_pause = 1; 567 } 568 } 569 570 static void ixgbe_set_pauseparam_finalize(struct net_device *netdev, 571 struct ixgbe_fc_info *fc) 572 { 573 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 574 struct ixgbe_hw *hw = &adapter->hw; 575 576 /* If the thing changed then we'll update and use new autoneg. */ 577 if (memcmp(fc, &hw->fc, sizeof(*fc))) { 578 hw->fc = *fc; 579 if (netif_running(netdev)) 580 ixgbe_reinit_locked(adapter); 581 else 582 ixgbe_reset(adapter); 583 } 584 } 585 586 static int ixgbe_set_pauseparam(struct net_device *netdev, 587 struct ethtool_pauseparam *pause) 588 { 589 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 590 struct ixgbe_hw *hw = &adapter->hw; 591 struct ixgbe_fc_info fc = hw->fc; 592 593 /* 82598 does no support link flow control with DCB enabled */ 594 if ((hw->mac.type == ixgbe_mac_82598EB) && 595 (adapter->flags & IXGBE_FLAG_DCB_ENABLED)) 596 return -EINVAL; 597 598 /* some devices do not support autoneg of link flow control */ 599 if ((pause->autoneg == AUTONEG_ENABLE) && 600 !ixgbe_device_supports_autoneg_fc(hw)) 601 return -EINVAL; 602 603 fc.disable_fc_autoneg = (pause->autoneg != AUTONEG_ENABLE); 604 605 if ((pause->rx_pause && pause->tx_pause) || pause->autoneg) 606 fc.requested_mode = ixgbe_fc_full; 607 else if (pause->rx_pause && !pause->tx_pause) 608 fc.requested_mode = ixgbe_fc_rx_pause; 609 else if (!pause->rx_pause && pause->tx_pause) 610 fc.requested_mode = ixgbe_fc_tx_pause; 611 else 612 fc.requested_mode = ixgbe_fc_none; 613 614 ixgbe_set_pauseparam_finalize(netdev, &fc); 615 616 return 0; 617 } 618 619 static int ixgbe_set_pauseparam_e610(struct net_device *netdev, 620 struct ethtool_pauseparam *pause) 621 { 622 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 623 struct ixgbe_hw *hw = &adapter->hw; 624 struct ixgbe_fc_info fc = hw->fc; 625 626 if (!ixgbe_device_supports_autoneg_fc(hw)) 627 return -EOPNOTSUPP; 628 629 if (pause->autoneg == AUTONEG_DISABLE) { 630 netdev_info(netdev, 631 "Cannot disable autonegotiation on this device.\n"); 632 return -EOPNOTSUPP; 633 } 634 635 fc.disable_fc_autoneg = false; 636 637 if (pause->rx_pause && pause->tx_pause) 638 fc.requested_mode = ixgbe_fc_full; 639 else if (pause->rx_pause) 640 fc.requested_mode = ixgbe_fc_rx_pause; 641 else if (pause->tx_pause) 642 fc.requested_mode = ixgbe_fc_tx_pause; 643 else 644 fc.requested_mode = ixgbe_fc_none; 645 646 ixgbe_set_pauseparam_finalize(netdev, &fc); 647 648 return 0; 649 } 650 651 static u32 ixgbe_get_msglevel(struct net_device *netdev) 652 { 653 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 654 return adapter->msg_enable; 655 } 656 657 static void ixgbe_set_msglevel(struct net_device *netdev, u32 data) 658 { 659 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 660 adapter->msg_enable = data; 661 } 662 663 static int ixgbe_get_regs_len(struct net_device *netdev) 664 { 665 #define IXGBE_REGS_LEN 1145 666 return IXGBE_REGS_LEN * sizeof(u32); 667 } 668 669 #define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_ 670 671 static void ixgbe_get_regs(struct net_device *netdev, 672 struct ethtool_regs *regs, void *p) 673 { 674 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 675 struct ixgbe_hw *hw = &adapter->hw; 676 u32 *regs_buff = p; 677 u8 i; 678 679 memset(p, 0, IXGBE_REGS_LEN * sizeof(u32)); 680 681 regs->version = hw->mac.type << 24 | hw->revision_id << 16 | 682 hw->device_id; 683 684 /* General Registers */ 685 regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_CTRL); 686 regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_STATUS); 687 regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT); 688 regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_ESDP); 689 regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_EODSDP); 690 regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_LEDCTL); 691 regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_FRTIMER); 692 regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_TCPTIMER); 693 694 /* NVM Register */ 695 regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_EEC(hw)); 696 regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_EERD); 697 regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_FLA(hw)); 698 regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_EEMNGCTL); 699 regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_EEMNGDATA); 700 regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_FLMNGCTL); 701 regs_buff[14] = IXGBE_READ_REG(hw, IXGBE_FLMNGDATA); 702 regs_buff[15] = IXGBE_READ_REG(hw, IXGBE_FLMNGCNT); 703 regs_buff[16] = IXGBE_READ_REG(hw, IXGBE_FLOP); 704 regs_buff[17] = IXGBE_READ_REG(hw, IXGBE_GRC(hw)); 705 706 /* Interrupt */ 707 /* don't read EICR because it can clear interrupt causes, instead 708 * read EICS which is a shadow but doesn't clear EICR */ 709 regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICS); 710 regs_buff[19] = IXGBE_READ_REG(hw, IXGBE_EICS); 711 regs_buff[20] = IXGBE_READ_REG(hw, IXGBE_EIMS); 712 regs_buff[21] = IXGBE_READ_REG(hw, IXGBE_EIMC); 713 regs_buff[22] = IXGBE_READ_REG(hw, IXGBE_EIAC); 714 regs_buff[23] = IXGBE_READ_REG(hw, IXGBE_EIAM); 715 regs_buff[24] = IXGBE_READ_REG(hw, IXGBE_EITR(0)); 716 regs_buff[25] = IXGBE_READ_REG(hw, IXGBE_IVAR(0)); 717 regs_buff[26] = IXGBE_READ_REG(hw, IXGBE_MSIXT); 718 regs_buff[27] = IXGBE_READ_REG(hw, IXGBE_MSIXPBA); 719 regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_PBACL(0)); 720 regs_buff[29] = IXGBE_READ_REG(hw, IXGBE_GPIE); 721 722 /* Flow Control */ 723 regs_buff[30] = IXGBE_READ_REG(hw, IXGBE_PFCTOP); 724 for (i = 0; i < 4; i++) 725 regs_buff[31 + i] = IXGBE_READ_REG(hw, IXGBE_FCTTV(i)); 726 for (i = 0; i < 8; i++) { 727 switch (hw->mac.type) { 728 case ixgbe_mac_82598EB: 729 regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL(i)); 730 regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH(i)); 731 break; 732 case ixgbe_mac_82599EB: 733 case ixgbe_mac_X540: 734 case ixgbe_mac_X550: 735 case ixgbe_mac_X550EM_x: 736 case ixgbe_mac_x550em_a: 737 case ixgbe_mac_e610: 738 regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL_82599(i)); 739 regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH_82599(i)); 740 break; 741 default: 742 break; 743 } 744 } 745 regs_buff[51] = IXGBE_READ_REG(hw, IXGBE_FCRTV); 746 regs_buff[52] = IXGBE_READ_REG(hw, IXGBE_TFCS); 747 748 /* Receive DMA */ 749 for (i = 0; i < 64; i++) 750 regs_buff[53 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i)); 751 for (i = 0; i < 64; i++) 752 regs_buff[117 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i)); 753 for (i = 0; i < 64; i++) 754 regs_buff[181 + i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i)); 755 for (i = 0; i < 64; i++) 756 regs_buff[245 + i] = IXGBE_READ_REG(hw, IXGBE_RDH(i)); 757 for (i = 0; i < 64; i++) 758 regs_buff[309 + i] = IXGBE_READ_REG(hw, IXGBE_RDT(i)); 759 for (i = 0; i < 64; i++) 760 regs_buff[373 + i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i)); 761 for (i = 0; i < 16; i++) 762 regs_buff[437 + i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i)); 763 for (i = 0; i < 16; i++) 764 regs_buff[453 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i)); 765 regs_buff[469] = IXGBE_READ_REG(hw, IXGBE_RDRXCTL); 766 for (i = 0; i < 8; i++) 767 regs_buff[470 + i] = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i)); 768 regs_buff[478] = IXGBE_READ_REG(hw, IXGBE_RXCTRL); 769 regs_buff[479] = IXGBE_READ_REG(hw, IXGBE_DROPEN); 770 771 /* Receive */ 772 regs_buff[480] = IXGBE_READ_REG(hw, IXGBE_RXCSUM); 773 regs_buff[481] = IXGBE_READ_REG(hw, IXGBE_RFCTL); 774 for (i = 0; i < 16; i++) 775 regs_buff[482 + i] = IXGBE_READ_REG(hw, IXGBE_RAL(i)); 776 for (i = 0; i < 16; i++) 777 regs_buff[498 + i] = IXGBE_READ_REG(hw, IXGBE_RAH(i)); 778 regs_buff[514] = IXGBE_READ_REG(hw, IXGBE_PSRTYPE(0)); 779 regs_buff[515] = IXGBE_READ_REG(hw, IXGBE_FCTRL); 780 regs_buff[516] = IXGBE_READ_REG(hw, IXGBE_VLNCTRL); 781 regs_buff[517] = IXGBE_READ_REG(hw, IXGBE_MCSTCTRL); 782 regs_buff[518] = IXGBE_READ_REG(hw, IXGBE_MRQC); 783 regs_buff[519] = IXGBE_READ_REG(hw, IXGBE_VMD_CTL); 784 for (i = 0; i < 8; i++) 785 regs_buff[520 + i] = IXGBE_READ_REG(hw, IXGBE_IMIR(i)); 786 for (i = 0; i < 8; i++) 787 regs_buff[528 + i] = IXGBE_READ_REG(hw, IXGBE_IMIREXT(i)); 788 regs_buff[536] = IXGBE_READ_REG(hw, IXGBE_IMIRVP); 789 790 /* Transmit */ 791 for (i = 0; i < 32; i++) 792 regs_buff[537 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i)); 793 for (i = 0; i < 32; i++) 794 regs_buff[569 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i)); 795 for (i = 0; i < 32; i++) 796 regs_buff[601 + i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i)); 797 for (i = 0; i < 32; i++) 798 regs_buff[633 + i] = IXGBE_READ_REG(hw, IXGBE_TDH(i)); 799 for (i = 0; i < 32; i++) 800 regs_buff[665 + i] = IXGBE_READ_REG(hw, IXGBE_TDT(i)); 801 for (i = 0; i < 32; i++) 802 regs_buff[697 + i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i)); 803 for (i = 0; i < 32; i++) 804 regs_buff[729 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAL(i)); 805 for (i = 0; i < 32; i++) 806 regs_buff[761 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAH(i)); 807 regs_buff[793] = IXGBE_READ_REG(hw, IXGBE_DTXCTL); 808 for (i = 0; i < 16; i++) 809 regs_buff[794 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i)); 810 regs_buff[810] = IXGBE_READ_REG(hw, IXGBE_TIPG); 811 for (i = 0; i < 8; i++) 812 regs_buff[811 + i] = IXGBE_READ_REG(hw, IXGBE_TXPBSIZE(i)); 813 regs_buff[819] = IXGBE_READ_REG(hw, IXGBE_MNGTXMAP); 814 815 /* Wake Up */ 816 regs_buff[820] = IXGBE_READ_REG(hw, IXGBE_WUC); 817 regs_buff[821] = IXGBE_READ_REG(hw, IXGBE_WUFC); 818 regs_buff[822] = IXGBE_READ_REG(hw, IXGBE_WUS); 819 regs_buff[823] = IXGBE_READ_REG(hw, IXGBE_IPAV); 820 regs_buff[824] = IXGBE_READ_REG(hw, IXGBE_IP4AT); 821 regs_buff[825] = IXGBE_READ_REG(hw, IXGBE_IP6AT); 822 regs_buff[826] = IXGBE_READ_REG(hw, IXGBE_WUPL); 823 regs_buff[827] = IXGBE_READ_REG(hw, IXGBE_WUPM); 824 regs_buff[828] = IXGBE_READ_REG(hw, IXGBE_FHFT(0)); 825 826 /* DCB */ 827 regs_buff[829] = IXGBE_READ_REG(hw, IXGBE_RMCS); /* same as FCCFG */ 828 regs_buff[831] = IXGBE_READ_REG(hw, IXGBE_PDPMCS); /* same as RTTPCS */ 829 830 switch (hw->mac.type) { 831 case ixgbe_mac_82598EB: 832 regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_DPMCS); 833 regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RUPPBMR); 834 for (i = 0; i < 8; i++) 835 regs_buff[833 + i] = 836 IXGBE_READ_REG(hw, IXGBE_RT2CR(i)); 837 for (i = 0; i < 8; i++) 838 regs_buff[841 + i] = 839 IXGBE_READ_REG(hw, IXGBE_RT2SR(i)); 840 for (i = 0; i < 8; i++) 841 regs_buff[849 + i] = 842 IXGBE_READ_REG(hw, IXGBE_TDTQ2TCCR(i)); 843 for (i = 0; i < 8; i++) 844 regs_buff[857 + i] = 845 IXGBE_READ_REG(hw, IXGBE_TDTQ2TCSR(i)); 846 break; 847 case ixgbe_mac_82599EB: 848 case ixgbe_mac_X540: 849 case ixgbe_mac_X550: 850 case ixgbe_mac_X550EM_x: 851 case ixgbe_mac_x550em_a: 852 regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_RTTDCS); 853 regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RTRPCS); 854 for (i = 0; i < 8; i++) 855 regs_buff[833 + i] = 856 IXGBE_READ_REG(hw, IXGBE_RTRPT4C(i)); 857 for (i = 0; i < 8; i++) 858 regs_buff[841 + i] = 859 IXGBE_READ_REG(hw, IXGBE_RTRPT4S(i)); 860 for (i = 0; i < 8; i++) 861 regs_buff[849 + i] = 862 IXGBE_READ_REG(hw, IXGBE_RTTDT2C(i)); 863 for (i = 0; i < 8; i++) 864 regs_buff[857 + i] = 865 IXGBE_READ_REG(hw, IXGBE_RTTDT2S(i)); 866 break; 867 default: 868 break; 869 } 870 871 for (i = 0; i < 8; i++) 872 regs_buff[865 + i] = 873 IXGBE_READ_REG(hw, IXGBE_TDPT2TCCR(i)); /* same as RTTPT2C */ 874 for (i = 0; i < 8; i++) 875 regs_buff[873 + i] = 876 IXGBE_READ_REG(hw, IXGBE_TDPT2TCSR(i)); /* same as RTTPT2S */ 877 878 /* Statistics */ 879 regs_buff[881] = IXGBE_GET_STAT(adapter, crcerrs); 880 regs_buff[882] = IXGBE_GET_STAT(adapter, illerrc); 881 regs_buff[883] = IXGBE_GET_STAT(adapter, errbc); 882 regs_buff[884] = IXGBE_GET_STAT(adapter, mspdc); 883 for (i = 0; i < 8; i++) 884 regs_buff[885 + i] = IXGBE_GET_STAT(adapter, mpc[i]); 885 regs_buff[893] = IXGBE_GET_STAT(adapter, mlfc); 886 regs_buff[894] = IXGBE_GET_STAT(adapter, mrfc); 887 regs_buff[895] = IXGBE_GET_STAT(adapter, rlec); 888 regs_buff[896] = IXGBE_GET_STAT(adapter, lxontxc); 889 regs_buff[897] = IXGBE_GET_STAT(adapter, lxonrxc); 890 regs_buff[898] = IXGBE_GET_STAT(adapter, lxofftxc); 891 regs_buff[899] = IXGBE_GET_STAT(adapter, lxoffrxc); 892 for (i = 0; i < 8; i++) 893 regs_buff[900 + i] = IXGBE_GET_STAT(adapter, pxontxc[i]); 894 for (i = 0; i < 8; i++) 895 regs_buff[908 + i] = IXGBE_GET_STAT(adapter, pxonrxc[i]); 896 for (i = 0; i < 8; i++) 897 regs_buff[916 + i] = IXGBE_GET_STAT(adapter, pxofftxc[i]); 898 for (i = 0; i < 8; i++) 899 regs_buff[924 + i] = IXGBE_GET_STAT(adapter, pxoffrxc[i]); 900 regs_buff[932] = IXGBE_GET_STAT(adapter, prc64); 901 regs_buff[933] = IXGBE_GET_STAT(adapter, prc127); 902 regs_buff[934] = IXGBE_GET_STAT(adapter, prc255); 903 regs_buff[935] = IXGBE_GET_STAT(adapter, prc511); 904 regs_buff[936] = IXGBE_GET_STAT(adapter, prc1023); 905 regs_buff[937] = IXGBE_GET_STAT(adapter, prc1522); 906 regs_buff[938] = IXGBE_GET_STAT(adapter, gprc); 907 regs_buff[939] = IXGBE_GET_STAT(adapter, bprc); 908 regs_buff[940] = IXGBE_GET_STAT(adapter, mprc); 909 regs_buff[941] = IXGBE_GET_STAT(adapter, gptc); 910 regs_buff[942] = (u32)IXGBE_GET_STAT(adapter, gorc); 911 regs_buff[943] = (u32)(IXGBE_GET_STAT(adapter, gorc) >> 32); 912 regs_buff[944] = (u32)IXGBE_GET_STAT(adapter, gotc); 913 regs_buff[945] = (u32)(IXGBE_GET_STAT(adapter, gotc) >> 32); 914 for (i = 0; i < 8; i++) 915 regs_buff[946 + i] = IXGBE_GET_STAT(adapter, rnbc[i]); 916 regs_buff[954] = IXGBE_GET_STAT(adapter, ruc); 917 regs_buff[955] = IXGBE_GET_STAT(adapter, rfc); 918 regs_buff[956] = IXGBE_GET_STAT(adapter, roc); 919 regs_buff[957] = IXGBE_GET_STAT(adapter, rjc); 920 regs_buff[958] = IXGBE_GET_STAT(adapter, mngprc); 921 regs_buff[959] = IXGBE_GET_STAT(adapter, mngpdc); 922 regs_buff[960] = IXGBE_GET_STAT(adapter, mngptc); 923 regs_buff[961] = (u32)IXGBE_GET_STAT(adapter, tor); 924 regs_buff[962] = (u32)(IXGBE_GET_STAT(adapter, tor) >> 32); 925 regs_buff[963] = IXGBE_GET_STAT(adapter, tpr); 926 regs_buff[964] = IXGBE_GET_STAT(adapter, tpt); 927 regs_buff[965] = IXGBE_GET_STAT(adapter, ptc64); 928 regs_buff[966] = IXGBE_GET_STAT(adapter, ptc127); 929 regs_buff[967] = IXGBE_GET_STAT(adapter, ptc255); 930 regs_buff[968] = IXGBE_GET_STAT(adapter, ptc511); 931 regs_buff[969] = IXGBE_GET_STAT(adapter, ptc1023); 932 regs_buff[970] = IXGBE_GET_STAT(adapter, ptc1522); 933 regs_buff[971] = IXGBE_GET_STAT(adapter, mptc); 934 regs_buff[972] = IXGBE_GET_STAT(adapter, bptc); 935 regs_buff[973] = IXGBE_GET_STAT(adapter, xec); 936 for (i = 0; i < 16; i++) 937 regs_buff[974 + i] = IXGBE_GET_STAT(adapter, qprc[i]); 938 for (i = 0; i < 16; i++) 939 regs_buff[990 + i] = IXGBE_GET_STAT(adapter, qptc[i]); 940 for (i = 0; i < 16; i++) 941 regs_buff[1006 + i] = IXGBE_GET_STAT(adapter, qbrc[i]); 942 for (i = 0; i < 16; i++) 943 regs_buff[1022 + i] = IXGBE_GET_STAT(adapter, qbtc[i]); 944 945 /* MAC */ 946 regs_buff[1038] = IXGBE_READ_REG(hw, IXGBE_PCS1GCFIG); 947 regs_buff[1039] = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL); 948 regs_buff[1040] = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA); 949 regs_buff[1041] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG0); 950 regs_buff[1042] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG1); 951 regs_buff[1043] = IXGBE_READ_REG(hw, IXGBE_PCS1GANA); 952 regs_buff[1044] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP); 953 regs_buff[1045] = IXGBE_READ_REG(hw, IXGBE_PCS1GANNP); 954 regs_buff[1046] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLPNP); 955 regs_buff[1047] = IXGBE_READ_REG(hw, IXGBE_HLREG0); 956 regs_buff[1048] = IXGBE_READ_REG(hw, IXGBE_HLREG1); 957 regs_buff[1049] = IXGBE_READ_REG(hw, IXGBE_PAP); 958 regs_buff[1050] = IXGBE_READ_REG(hw, IXGBE_MACA); 959 regs_buff[1051] = IXGBE_READ_REG(hw, IXGBE_APAE); 960 regs_buff[1052] = IXGBE_READ_REG(hw, IXGBE_ARD); 961 regs_buff[1053] = IXGBE_READ_REG(hw, IXGBE_AIS); 962 regs_buff[1054] = IXGBE_READ_REG(hw, IXGBE_MSCA); 963 regs_buff[1055] = IXGBE_READ_REG(hw, IXGBE_MSRWD); 964 regs_buff[1056] = IXGBE_READ_REG(hw, IXGBE_MLADD); 965 regs_buff[1057] = IXGBE_READ_REG(hw, IXGBE_MHADD); 966 regs_buff[1058] = IXGBE_READ_REG(hw, IXGBE_TREG); 967 regs_buff[1059] = IXGBE_READ_REG(hw, IXGBE_PCSS1); 968 regs_buff[1060] = IXGBE_READ_REG(hw, IXGBE_PCSS2); 969 regs_buff[1061] = IXGBE_READ_REG(hw, IXGBE_XPCSS); 970 regs_buff[1062] = IXGBE_READ_REG(hw, IXGBE_SERDESC); 971 regs_buff[1063] = IXGBE_READ_REG(hw, IXGBE_MACS); 972 regs_buff[1064] = IXGBE_READ_REG(hw, IXGBE_AUTOC); 973 regs_buff[1065] = IXGBE_READ_REG(hw, IXGBE_LINKS); 974 regs_buff[1066] = IXGBE_READ_REG(hw, IXGBE_AUTOC2); 975 regs_buff[1067] = IXGBE_READ_REG(hw, IXGBE_AUTOC3); 976 regs_buff[1068] = IXGBE_READ_REG(hw, IXGBE_ANLP1); 977 regs_buff[1069] = IXGBE_READ_REG(hw, IXGBE_ANLP2); 978 regs_buff[1070] = IXGBE_READ_REG(hw, IXGBE_ATLASCTL); 979 980 /* Diagnostic */ 981 regs_buff[1071] = IXGBE_READ_REG(hw, IXGBE_RDSTATCTL); 982 for (i = 0; i < 8; i++) 983 regs_buff[1072 + i] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i)); 984 regs_buff[1080] = IXGBE_READ_REG(hw, IXGBE_RDHMPN); 985 for (i = 0; i < 4; i++) 986 regs_buff[1081 + i] = IXGBE_READ_REG(hw, IXGBE_RIC_DW(i)); 987 regs_buff[1085] = IXGBE_READ_REG(hw, IXGBE_RDPROBE); 988 regs_buff[1086] = IXGBE_READ_REG(hw, IXGBE_TDSTATCTL); 989 for (i = 0; i < 8; i++) 990 regs_buff[1087 + i] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i)); 991 regs_buff[1095] = IXGBE_READ_REG(hw, IXGBE_TDHMPN); 992 for (i = 0; i < 4; i++) 993 regs_buff[1096 + i] = IXGBE_READ_REG(hw, IXGBE_TIC_DW(i)); 994 regs_buff[1100] = IXGBE_READ_REG(hw, IXGBE_TDPROBE); 995 regs_buff[1101] = IXGBE_READ_REG(hw, IXGBE_TXBUFCTRL); 996 for (i = 0; i < 4; i++) 997 regs_buff[1102 + i] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA(i)); 998 regs_buff[1106] = IXGBE_READ_REG(hw, IXGBE_RXBUFCTRL); 999 for (i = 0; i < 4; i++) 1000 regs_buff[1107 + i] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA(i)); 1001 for (i = 0; i < 8; i++) 1002 regs_buff[1111 + i] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i)); 1003 regs_buff[1119] = IXGBE_READ_REG(hw, IXGBE_RFVAL); 1004 regs_buff[1120] = IXGBE_READ_REG(hw, IXGBE_MDFTC1); 1005 regs_buff[1121] = IXGBE_READ_REG(hw, IXGBE_MDFTC2); 1006 regs_buff[1122] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO1); 1007 regs_buff[1123] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO2); 1008 regs_buff[1124] = IXGBE_READ_REG(hw, IXGBE_MDFTS); 1009 regs_buff[1125] = IXGBE_READ_REG(hw, IXGBE_PCIEECCCTL); 1010 regs_buff[1126] = IXGBE_READ_REG(hw, IXGBE_PBTXECC); 1011 regs_buff[1127] = IXGBE_READ_REG(hw, IXGBE_PBRXECC); 1012 1013 /* 82599 X540 specific registers */ 1014 regs_buff[1128] = IXGBE_READ_REG(hw, IXGBE_MFLCN); 1015 1016 /* 82599 X540 specific DCB registers */ 1017 regs_buff[1129] = IXGBE_READ_REG(hw, IXGBE_RTRUP2TC); 1018 regs_buff[1130] = IXGBE_READ_REG(hw, IXGBE_RTTUP2TC); 1019 for (i = 0; i < 4; i++) 1020 regs_buff[1131 + i] = IXGBE_READ_REG(hw, IXGBE_TXLLQ(i)); 1021 regs_buff[1135] = IXGBE_READ_REG(hw, IXGBE_RTTBCNRM); 1022 /* same as RTTQCNRM */ 1023 regs_buff[1136] = IXGBE_READ_REG(hw, IXGBE_RTTBCNRD); 1024 /* same as RTTQCNRR */ 1025 1026 /* X540 specific DCB registers */ 1027 regs_buff[1137] = IXGBE_READ_REG(hw, IXGBE_RTTQCNCR); 1028 regs_buff[1138] = IXGBE_READ_REG(hw, IXGBE_RTTQCNTG); 1029 1030 /* Security config registers */ 1031 regs_buff[1139] = IXGBE_READ_REG(hw, IXGBE_SECTXCTRL); 1032 regs_buff[1140] = IXGBE_READ_REG(hw, IXGBE_SECTXSTAT); 1033 regs_buff[1141] = IXGBE_READ_REG(hw, IXGBE_SECTXBUFFAF); 1034 regs_buff[1142] = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG); 1035 regs_buff[1143] = IXGBE_READ_REG(hw, IXGBE_SECRXCTRL); 1036 regs_buff[1144] = IXGBE_READ_REG(hw, IXGBE_SECRXSTAT); 1037 } 1038 1039 static void ixgbe_get_link_ext_stats(struct net_device *netdev, 1040 struct ethtool_link_ext_stats *stats) 1041 { 1042 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 1043 1044 stats->link_down_events = adapter->link_down_events; 1045 } 1046 1047 static int ixgbe_get_eeprom_len(struct net_device *netdev) 1048 { 1049 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 1050 return adapter->hw.eeprom.word_size * 2; 1051 } 1052 1053 static int ixgbe_get_eeprom(struct net_device *netdev, 1054 struct ethtool_eeprom *eeprom, u8 *bytes) 1055 { 1056 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 1057 struct ixgbe_hw *hw = &adapter->hw; 1058 u16 *eeprom_buff; 1059 int first_word, last_word, eeprom_len; 1060 int ret_val = 0; 1061 u16 i; 1062 1063 if (eeprom->len == 0) 1064 return -EINVAL; 1065 1066 eeprom->magic = hw->vendor_id | (hw->device_id << 16); 1067 1068 first_word = eeprom->offset >> 1; 1069 last_word = (eeprom->offset + eeprom->len - 1) >> 1; 1070 eeprom_len = last_word - first_word + 1; 1071 1072 eeprom_buff = kmalloc_array(eeprom_len, sizeof(u16), GFP_KERNEL); 1073 if (!eeprom_buff) 1074 return -ENOMEM; 1075 1076 ret_val = hw->eeprom.ops.read_buffer(hw, first_word, eeprom_len, 1077 eeprom_buff); 1078 1079 /* Device's eeprom is always little-endian, word addressable */ 1080 for (i = 0; i < eeprom_len; i++) 1081 le16_to_cpus(&eeprom_buff[i]); 1082 1083 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len); 1084 kfree(eeprom_buff); 1085 1086 return ret_val; 1087 } 1088 1089 static int ixgbe_set_eeprom(struct net_device *netdev, 1090 struct ethtool_eeprom *eeprom, u8 *bytes) 1091 { 1092 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 1093 struct ixgbe_hw *hw = &adapter->hw; 1094 u16 *eeprom_buff; 1095 void *ptr; 1096 int max_len, first_word, last_word, ret_val = 0; 1097 u16 i; 1098 1099 if (eeprom->len == 0) 1100 return -EINVAL; 1101 1102 if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16))) 1103 return -EINVAL; 1104 1105 max_len = hw->eeprom.word_size * 2; 1106 1107 first_word = eeprom->offset >> 1; 1108 last_word = (eeprom->offset + eeprom->len - 1) >> 1; 1109 eeprom_buff = kmalloc(max_len, GFP_KERNEL); 1110 if (!eeprom_buff) 1111 return -ENOMEM; 1112 1113 ptr = eeprom_buff; 1114 1115 if (eeprom->offset & 1) { 1116 /* 1117 * need read/modify/write of first changed EEPROM word 1118 * only the second byte of the word is being modified 1119 */ 1120 ret_val = hw->eeprom.ops.read(hw, first_word, &eeprom_buff[0]); 1121 if (ret_val) 1122 goto err; 1123 1124 ptr++; 1125 } 1126 if ((eeprom->offset + eeprom->len) & 1) { 1127 /* 1128 * need read/modify/write of last changed EEPROM word 1129 * only the first byte of the word is being modified 1130 */ 1131 ret_val = hw->eeprom.ops.read(hw, last_word, 1132 &eeprom_buff[last_word - first_word]); 1133 if (ret_val) 1134 goto err; 1135 } 1136 1137 /* Device's eeprom is always little-endian, word addressable */ 1138 for (i = 0; i < last_word - first_word + 1; i++) 1139 le16_to_cpus(&eeprom_buff[i]); 1140 1141 memcpy(ptr, bytes, eeprom->len); 1142 1143 for (i = 0; i < last_word - first_word + 1; i++) 1144 cpu_to_le16s(&eeprom_buff[i]); 1145 1146 ret_val = hw->eeprom.ops.write_buffer(hw, first_word, 1147 last_word - first_word + 1, 1148 eeprom_buff); 1149 1150 /* Update the checksum */ 1151 if (ret_val == 0) 1152 hw->eeprom.ops.update_checksum(hw); 1153 1154 err: 1155 kfree(eeprom_buff); 1156 return ret_val; 1157 } 1158 1159 int ixgbe_refresh_fw_version(struct ixgbe_adapter *adapter) 1160 { 1161 struct ixgbe_hw *hw = &adapter->hw; 1162 int err; 1163 1164 err = ixgbe_get_flash_data(hw); 1165 if (err) 1166 return err; 1167 1168 ixgbe_set_fw_version_e610(adapter); 1169 return 0; 1170 } 1171 1172 static void ixgbe_get_drvinfo(struct net_device *netdev, 1173 struct ethtool_drvinfo *drvinfo) 1174 { 1175 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 1176 1177 strscpy(drvinfo->driver, ixgbe_driver_name, sizeof(drvinfo->driver)); 1178 1179 strscpy(drvinfo->fw_version, adapter->eeprom_id, 1180 sizeof(drvinfo->fw_version)); 1181 1182 strscpy(drvinfo->bus_info, pci_name(adapter->pdev), 1183 sizeof(drvinfo->bus_info)); 1184 1185 drvinfo->n_priv_flags = IXGBE_PRIV_FLAGS_STR_LEN; 1186 } 1187 1188 static u32 ixgbe_get_max_rxd(struct ixgbe_adapter *adapter) 1189 { 1190 switch (adapter->hw.mac.type) { 1191 case ixgbe_mac_82598EB: 1192 return IXGBE_MAX_RXD_82598; 1193 case ixgbe_mac_82599EB: 1194 return IXGBE_MAX_RXD_82599; 1195 case ixgbe_mac_X540: 1196 return IXGBE_MAX_RXD_X540; 1197 case ixgbe_mac_X550: 1198 case ixgbe_mac_X550EM_x: 1199 case ixgbe_mac_x550em_a: 1200 return IXGBE_MAX_RXD_X550; 1201 default: 1202 return IXGBE_MAX_RXD_82598; 1203 } 1204 } 1205 1206 static u32 ixgbe_get_max_txd(struct ixgbe_adapter *adapter) 1207 { 1208 switch (adapter->hw.mac.type) { 1209 case ixgbe_mac_82598EB: 1210 return IXGBE_MAX_TXD_82598; 1211 case ixgbe_mac_82599EB: 1212 return IXGBE_MAX_TXD_82599; 1213 case ixgbe_mac_X540: 1214 return IXGBE_MAX_TXD_X540; 1215 case ixgbe_mac_X550: 1216 case ixgbe_mac_X550EM_x: 1217 case ixgbe_mac_x550em_a: 1218 return IXGBE_MAX_TXD_X550; 1219 default: 1220 return IXGBE_MAX_TXD_82598; 1221 } 1222 } 1223 1224 static void ixgbe_get_ringparam(struct net_device *netdev, 1225 struct ethtool_ringparam *ring, 1226 struct kernel_ethtool_ringparam *kernel_ring, 1227 struct netlink_ext_ack *extack) 1228 { 1229 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 1230 struct ixgbe_ring *tx_ring = adapter->tx_ring[0]; 1231 struct ixgbe_ring *rx_ring = adapter->rx_ring[0]; 1232 1233 ring->rx_max_pending = ixgbe_get_max_rxd(adapter); 1234 ring->tx_max_pending = ixgbe_get_max_txd(adapter); 1235 ring->rx_pending = rx_ring->count; 1236 ring->tx_pending = tx_ring->count; 1237 } 1238 1239 static int ixgbe_set_ringparam(struct net_device *netdev, 1240 struct ethtool_ringparam *ring, 1241 struct kernel_ethtool_ringparam *kernel_ring, 1242 struct netlink_ext_ack *extack) 1243 { 1244 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 1245 struct ixgbe_ring *temp_ring; 1246 int i, j, err = 0; 1247 u32 new_rx_count, new_tx_count; 1248 1249 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) 1250 return -EINVAL; 1251 1252 new_tx_count = clamp_t(u32, ring->tx_pending, 1253 IXGBE_MIN_TXD, ixgbe_get_max_txd(adapter)); 1254 new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE); 1255 1256 new_rx_count = clamp_t(u32, ring->rx_pending, 1257 IXGBE_MIN_RXD, ixgbe_get_max_rxd(adapter)); 1258 new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE); 1259 1260 if ((new_tx_count == adapter->tx_ring_count) && 1261 (new_rx_count == adapter->rx_ring_count)) { 1262 /* nothing to do */ 1263 return 0; 1264 } 1265 1266 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state)) 1267 usleep_range(1000, 2000); 1268 1269 if (!netif_running(adapter->netdev)) { 1270 for (i = 0; i < adapter->num_tx_queues; i++) 1271 adapter->tx_ring[i]->count = new_tx_count; 1272 for (i = 0; i < adapter->num_xdp_queues; i++) 1273 adapter->xdp_ring[i]->count = new_tx_count; 1274 for (i = 0; i < adapter->num_rx_queues; i++) 1275 adapter->rx_ring[i]->count = new_rx_count; 1276 adapter->tx_ring_count = new_tx_count; 1277 adapter->xdp_ring_count = new_tx_count; 1278 adapter->rx_ring_count = new_rx_count; 1279 goto clear_reset; 1280 } 1281 1282 /* allocate temporary buffer to store rings in */ 1283 i = max_t(int, adapter->num_tx_queues + adapter->num_xdp_queues, 1284 adapter->num_rx_queues); 1285 temp_ring = vmalloc_array(i, sizeof(struct ixgbe_ring)); 1286 1287 if (!temp_ring) { 1288 err = -ENOMEM; 1289 goto clear_reset; 1290 } 1291 1292 ixgbe_down(adapter); 1293 1294 /* 1295 * Setup new Tx resources and free the old Tx resources in that order. 1296 * We can then assign the new resources to the rings via a memcpy. 1297 * The advantage to this approach is that we are guaranteed to still 1298 * have resources even in the case of an allocation failure. 1299 */ 1300 if (new_tx_count != adapter->tx_ring_count) { 1301 for (i = 0; i < adapter->num_tx_queues; i++) { 1302 memcpy(&temp_ring[i], adapter->tx_ring[i], 1303 sizeof(struct ixgbe_ring)); 1304 1305 temp_ring[i].count = new_tx_count; 1306 err = ixgbe_setup_tx_resources(&temp_ring[i]); 1307 if (err) { 1308 while (i) { 1309 i--; 1310 ixgbe_free_tx_resources(&temp_ring[i]); 1311 } 1312 goto err_setup; 1313 } 1314 } 1315 1316 for (j = 0; j < adapter->num_xdp_queues; j++, i++) { 1317 memcpy(&temp_ring[i], adapter->xdp_ring[j], 1318 sizeof(struct ixgbe_ring)); 1319 1320 temp_ring[i].count = new_tx_count; 1321 err = ixgbe_setup_tx_resources(&temp_ring[i]); 1322 if (err) { 1323 while (i) { 1324 i--; 1325 ixgbe_free_tx_resources(&temp_ring[i]); 1326 } 1327 goto err_setup; 1328 } 1329 } 1330 1331 for (i = 0; i < adapter->num_tx_queues; i++) { 1332 ixgbe_free_tx_resources(adapter->tx_ring[i]); 1333 1334 memcpy(adapter->tx_ring[i], &temp_ring[i], 1335 sizeof(struct ixgbe_ring)); 1336 } 1337 for (j = 0; j < adapter->num_xdp_queues; j++, i++) { 1338 ixgbe_free_tx_resources(adapter->xdp_ring[j]); 1339 1340 memcpy(adapter->xdp_ring[j], &temp_ring[i], 1341 sizeof(struct ixgbe_ring)); 1342 } 1343 1344 adapter->tx_ring_count = new_tx_count; 1345 } 1346 1347 /* Repeat the process for the Rx rings if needed */ 1348 if (new_rx_count != adapter->rx_ring_count) { 1349 for (i = 0; i < adapter->num_rx_queues; i++) { 1350 memcpy(&temp_ring[i], adapter->rx_ring[i], 1351 sizeof(struct ixgbe_ring)); 1352 1353 /* Clear copied XDP RX-queue info */ 1354 memset(&temp_ring[i].xdp_rxq, 0, 1355 sizeof(temp_ring[i].xdp_rxq)); 1356 1357 temp_ring[i].count = new_rx_count; 1358 err = ixgbe_setup_rx_resources(adapter, &temp_ring[i]); 1359 if (err) { 1360 while (i) { 1361 i--; 1362 ixgbe_free_rx_resources(&temp_ring[i]); 1363 } 1364 goto err_setup; 1365 } 1366 1367 } 1368 1369 for (i = 0; i < adapter->num_rx_queues; i++) { 1370 ixgbe_free_rx_resources(adapter->rx_ring[i]); 1371 1372 memcpy(adapter->rx_ring[i], &temp_ring[i], 1373 sizeof(struct ixgbe_ring)); 1374 } 1375 1376 adapter->rx_ring_count = new_rx_count; 1377 } 1378 1379 err_setup: 1380 ixgbe_up(adapter); 1381 vfree(temp_ring); 1382 clear_reset: 1383 clear_bit(__IXGBE_RESETTING, &adapter->state); 1384 return err; 1385 } 1386 1387 static int ixgbe_get_sset_count(struct net_device *netdev, int sset) 1388 { 1389 switch (sset) { 1390 case ETH_SS_TEST: 1391 return IXGBE_TEST_LEN; 1392 case ETH_SS_STATS: 1393 return IXGBE_STATS_LEN; 1394 case ETH_SS_PRIV_FLAGS: 1395 return IXGBE_PRIV_FLAGS_STR_LEN; 1396 default: 1397 return -EOPNOTSUPP; 1398 } 1399 } 1400 1401 static void ixgbe_get_ethtool_stats(struct net_device *netdev, 1402 struct ethtool_stats *stats, u64 *data) 1403 { 1404 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 1405 struct rtnl_link_stats64 temp; 1406 const struct rtnl_link_stats64 *net_stats; 1407 unsigned int start; 1408 struct ixgbe_ring *ring; 1409 int i, j; 1410 char *p = NULL; 1411 1412 ixgbe_update_stats(adapter); 1413 net_stats = dev_get_stats(netdev, &temp); 1414 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) { 1415 switch (ixgbe_gstrings_stats[i].type) { 1416 case NETDEV_STATS: 1417 p = (char *) net_stats + 1418 ixgbe_gstrings_stats[i].stat_offset; 1419 break; 1420 case IXGBE_STATS: 1421 p = (char *) adapter + 1422 ixgbe_gstrings_stats[i].stat_offset; 1423 break; 1424 default: 1425 data[i] = 0; 1426 continue; 1427 } 1428 1429 data[i] = (ixgbe_gstrings_stats[i].sizeof_stat == 1430 sizeof(u64)) ? *(u64 *)p : *(u32 *)p; 1431 } 1432 for (j = 0; j < netdev->num_tx_queues; j++) { 1433 ring = adapter->tx_ring[j]; 1434 if (!ring) { 1435 data[i] = 0; 1436 data[i+1] = 0; 1437 i += 2; 1438 continue; 1439 } 1440 1441 do { 1442 start = u64_stats_fetch_begin(&ring->syncp); 1443 data[i] = ring->stats.packets; 1444 data[i+1] = ring->stats.bytes; 1445 } while (u64_stats_fetch_retry(&ring->syncp, start)); 1446 i += 2; 1447 } 1448 for (j = 0; j < IXGBE_NUM_RX_QUEUES; j++) { 1449 ring = adapter->rx_ring[j]; 1450 if (!ring) { 1451 data[i] = 0; 1452 data[i+1] = 0; 1453 i += 2; 1454 continue; 1455 } 1456 1457 do { 1458 start = u64_stats_fetch_begin(&ring->syncp); 1459 data[i] = ring->stats.packets; 1460 data[i+1] = ring->stats.bytes; 1461 } while (u64_stats_fetch_retry(&ring->syncp, start)); 1462 i += 2; 1463 } 1464 1465 for (j = 0; j < IXGBE_MAX_PACKET_BUFFERS; j++) { 1466 data[i++] = adapter->stats.pxontxc[j]; 1467 data[i++] = adapter->stats.pxofftxc[j]; 1468 } 1469 for (j = 0; j < IXGBE_MAX_PACKET_BUFFERS; j++) { 1470 data[i++] = adapter->stats.pxonrxc[j]; 1471 data[i++] = adapter->stats.pxoffrxc[j]; 1472 } 1473 } 1474 1475 static void ixgbe_get_strings(struct net_device *netdev, u32 stringset, 1476 u8 *data) 1477 { 1478 unsigned int i; 1479 u8 *p = data; 1480 1481 switch (stringset) { 1482 case ETH_SS_TEST: 1483 for (i = 0; i < IXGBE_TEST_LEN; i++) 1484 ethtool_puts(&p, ixgbe_gstrings_test[i]); 1485 break; 1486 case ETH_SS_STATS: 1487 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) 1488 ethtool_puts(&p, ixgbe_gstrings_stats[i].stat_string); 1489 for (i = 0; i < netdev->num_tx_queues; i++) { 1490 ethtool_sprintf(&p, "tx_queue_%u_packets", i); 1491 ethtool_sprintf(&p, "tx_queue_%u_bytes", i); 1492 } 1493 for (i = 0; i < IXGBE_NUM_RX_QUEUES; i++) { 1494 ethtool_sprintf(&p, "rx_queue_%u_packets", i); 1495 ethtool_sprintf(&p, "rx_queue_%u_bytes", i); 1496 } 1497 for (i = 0; i < IXGBE_MAX_PACKET_BUFFERS; i++) { 1498 ethtool_sprintf(&p, "tx_pb_%u_pxon", i); 1499 ethtool_sprintf(&p, "tx_pb_%u_pxoff", i); 1500 } 1501 for (i = 0; i < IXGBE_MAX_PACKET_BUFFERS; i++) { 1502 ethtool_sprintf(&p, "rx_pb_%u_pxon", i); 1503 ethtool_sprintf(&p, "rx_pb_%u_pxoff", i); 1504 } 1505 /* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */ 1506 break; 1507 case ETH_SS_PRIV_FLAGS: 1508 memcpy(data, ixgbe_priv_flags_strings, 1509 IXGBE_PRIV_FLAGS_STR_LEN * ETH_GSTRING_LEN); 1510 } 1511 } 1512 1513 static int ixgbe_link_test(struct ixgbe_adapter *adapter, u64 *data) 1514 { 1515 struct ixgbe_hw *hw = &adapter->hw; 1516 bool link_up; 1517 u32 link_speed = 0; 1518 1519 if (ixgbe_removed(hw->hw_addr)) { 1520 *data = 1; 1521 return 1; 1522 } 1523 *data = 0; 1524 1525 hw->mac.ops.check_link(hw, &link_speed, &link_up, true); 1526 if (link_up) 1527 return *data; 1528 else 1529 *data = 1; 1530 return *data; 1531 } 1532 1533 /* ethtool register test data */ 1534 struct ixgbe_reg_test { 1535 u16 reg; 1536 u8 array_len; 1537 u8 test_type; 1538 u32 mask; 1539 u32 write; 1540 }; 1541 1542 /* In the hardware, registers are laid out either singly, in arrays 1543 * spaced 0x40 bytes apart, or in contiguous tables. We assume 1544 * most tests take place on arrays or single registers (handled 1545 * as a single-element array) and special-case the tables. 1546 * Table tests are always pattern tests. 1547 * 1548 * We also make provision for some required setup steps by specifying 1549 * registers to be written without any read-back testing. 1550 */ 1551 1552 #define PATTERN_TEST 1 1553 #define SET_READ_TEST 2 1554 #define WRITE_NO_TEST 3 1555 #define TABLE32_TEST 4 1556 #define TABLE64_TEST_LO 5 1557 #define TABLE64_TEST_HI 6 1558 1559 /* default 82599 register test */ 1560 static const struct ixgbe_reg_test reg_test_82599[] = { 1561 { IXGBE_FCRTL_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 }, 1562 { IXGBE_FCRTH_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 }, 1563 { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1564 { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 }, 1565 { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFF80 }, 1566 { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1567 { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF }, 1568 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE }, 1569 { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF }, 1570 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 }, 1571 { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 }, 1572 { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1573 { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF }, 1574 { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1575 { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFF80 }, 1576 { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000001, 0x00000001 }, 1577 { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF }, 1578 { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x8001FFFF, 0x800CFFFF }, 1579 { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1580 { .reg = 0 } 1581 }; 1582 1583 /* default 82598 register test */ 1584 static const struct ixgbe_reg_test reg_test_82598[] = { 1585 { IXGBE_FCRTL(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 }, 1586 { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 }, 1587 { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1588 { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 }, 1589 { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF }, 1590 { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1591 { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF }, 1592 /* Enable all four RX queues before testing. */ 1593 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE }, 1594 /* RDH is read-only for 82598, only test RDT. */ 1595 { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF }, 1596 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 }, 1597 { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 }, 1598 { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1599 { IXGBE_TIPG, 1, PATTERN_TEST, 0x000000FF, 0x000000FF }, 1600 { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF }, 1601 { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1602 { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF }, 1603 { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000003, 0x00000003 }, 1604 { IXGBE_DTXCTL, 1, SET_READ_TEST, 0x00000005, 0x00000005 }, 1605 { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF }, 1606 { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x800CFFFF, 0x800CFFFF }, 1607 { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF }, 1608 { .reg = 0 } 1609 }; 1610 1611 static bool reg_pattern_test(struct ixgbe_adapter *adapter, u64 *data, int reg, 1612 u32 mask, u32 write) 1613 { 1614 u32 pat, val, before; 1615 static const u32 test_pattern[] = { 1616 0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; 1617 1618 if (ixgbe_removed(adapter->hw.hw_addr)) { 1619 *data = 1; 1620 return true; 1621 } 1622 for (pat = 0; pat < ARRAY_SIZE(test_pattern); pat++) { 1623 before = ixgbe_read_reg(&adapter->hw, reg); 1624 ixgbe_write_reg(&adapter->hw, reg, test_pattern[pat] & write); 1625 val = ixgbe_read_reg(&adapter->hw, reg); 1626 if (val != (test_pattern[pat] & write & mask)) { 1627 e_err(drv, "pattern test reg %04X failed: got 0x%08X expected 0x%08X\n", 1628 reg, val, (test_pattern[pat] & write & mask)); 1629 *data = reg; 1630 ixgbe_write_reg(&adapter->hw, reg, before); 1631 return true; 1632 } 1633 ixgbe_write_reg(&adapter->hw, reg, before); 1634 } 1635 return false; 1636 } 1637 1638 static bool reg_set_and_check(struct ixgbe_adapter *adapter, u64 *data, int reg, 1639 u32 mask, u32 write) 1640 { 1641 u32 val, before; 1642 1643 if (ixgbe_removed(adapter->hw.hw_addr)) { 1644 *data = 1; 1645 return true; 1646 } 1647 before = ixgbe_read_reg(&adapter->hw, reg); 1648 ixgbe_write_reg(&adapter->hw, reg, write & mask); 1649 val = ixgbe_read_reg(&adapter->hw, reg); 1650 if ((write & mask) != (val & mask)) { 1651 e_err(drv, "set/check reg %04X test failed: got 0x%08X expected 0x%08X\n", 1652 reg, (val & mask), (write & mask)); 1653 *data = reg; 1654 ixgbe_write_reg(&adapter->hw, reg, before); 1655 return true; 1656 } 1657 ixgbe_write_reg(&adapter->hw, reg, before); 1658 return false; 1659 } 1660 1661 static int ixgbe_reg_test(struct ixgbe_adapter *adapter, u64 *data) 1662 { 1663 const struct ixgbe_reg_test *test; 1664 u32 value, before, after; 1665 u32 i, toggle; 1666 1667 if (ixgbe_removed(adapter->hw.hw_addr)) { 1668 e_err(drv, "Adapter removed - register test blocked\n"); 1669 *data = 1; 1670 return 1; 1671 } 1672 switch (adapter->hw.mac.type) { 1673 case ixgbe_mac_82598EB: 1674 toggle = 0x7FFFF3FF; 1675 test = reg_test_82598; 1676 break; 1677 case ixgbe_mac_82599EB: 1678 case ixgbe_mac_X540: 1679 case ixgbe_mac_X550: 1680 case ixgbe_mac_X550EM_x: 1681 case ixgbe_mac_x550em_a: 1682 case ixgbe_mac_e610: 1683 toggle = 0x7FFFF30F; 1684 test = reg_test_82599; 1685 break; 1686 default: 1687 *data = 1; 1688 return 1; 1689 } 1690 1691 /* 1692 * Because the status register is such a special case, 1693 * we handle it separately from the rest of the register 1694 * tests. Some bits are read-only, some toggle, and some 1695 * are writeable on newer MACs. 1696 */ 1697 before = ixgbe_read_reg(&adapter->hw, IXGBE_STATUS); 1698 value = (ixgbe_read_reg(&adapter->hw, IXGBE_STATUS) & toggle); 1699 ixgbe_write_reg(&adapter->hw, IXGBE_STATUS, toggle); 1700 after = ixgbe_read_reg(&adapter->hw, IXGBE_STATUS) & toggle; 1701 if (value != after) { 1702 e_err(drv, "failed STATUS register test got: 0x%08X expected: 0x%08X\n", 1703 after, value); 1704 *data = 1; 1705 return 1; 1706 } 1707 /* restore previous status */ 1708 ixgbe_write_reg(&adapter->hw, IXGBE_STATUS, before); 1709 1710 /* 1711 * Perform the remainder of the register test, looping through 1712 * the test table until we either fail or reach the null entry. 1713 */ 1714 while (test->reg) { 1715 for (i = 0; i < test->array_len; i++) { 1716 bool b = false; 1717 1718 switch (test->test_type) { 1719 case PATTERN_TEST: 1720 b = reg_pattern_test(adapter, data, 1721 test->reg + (i * 0x40), 1722 test->mask, 1723 test->write); 1724 break; 1725 case SET_READ_TEST: 1726 b = reg_set_and_check(adapter, data, 1727 test->reg + (i * 0x40), 1728 test->mask, 1729 test->write); 1730 break; 1731 case WRITE_NO_TEST: 1732 ixgbe_write_reg(&adapter->hw, 1733 test->reg + (i * 0x40), 1734 test->write); 1735 break; 1736 case TABLE32_TEST: 1737 b = reg_pattern_test(adapter, data, 1738 test->reg + (i * 4), 1739 test->mask, 1740 test->write); 1741 break; 1742 case TABLE64_TEST_LO: 1743 b = reg_pattern_test(adapter, data, 1744 test->reg + (i * 8), 1745 test->mask, 1746 test->write); 1747 break; 1748 case TABLE64_TEST_HI: 1749 b = reg_pattern_test(adapter, data, 1750 (test->reg + 4) + (i * 8), 1751 test->mask, 1752 test->write); 1753 break; 1754 } 1755 if (b) 1756 return 1; 1757 } 1758 test++; 1759 } 1760 1761 *data = 0; 1762 return 0; 1763 } 1764 1765 static int ixgbe_eeprom_test(struct ixgbe_adapter *adapter, u64 *data) 1766 { 1767 struct ixgbe_hw *hw = &adapter->hw; 1768 if (hw->eeprom.ops.validate_checksum(hw, NULL)) 1769 *data = 1; 1770 else 1771 *data = 0; 1772 return *data; 1773 } 1774 1775 static irqreturn_t ixgbe_test_intr(int irq, void *data) 1776 { 1777 struct net_device *netdev = (struct net_device *) data; 1778 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 1779 1780 adapter->test_icr |= IXGBE_READ_REG(&adapter->hw, IXGBE_EICR); 1781 1782 return IRQ_HANDLED; 1783 } 1784 1785 static int ixgbe_intr_test(struct ixgbe_adapter *adapter, u64 *data) 1786 { 1787 struct net_device *netdev = adapter->netdev; 1788 u32 mask, i = 0, shared_int = true; 1789 u32 irq = adapter->pdev->irq; 1790 1791 *data = 0; 1792 1793 /* Hook up test interrupt handler just for this test */ 1794 if (adapter->msix_entries) { 1795 /* NOTE: we don't test MSI-X interrupts here, yet */ 1796 return 0; 1797 } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) { 1798 shared_int = false; 1799 if (request_irq(irq, ixgbe_test_intr, 0, netdev->name, 1800 netdev)) { 1801 *data = 1; 1802 return -1; 1803 } 1804 } else if (!request_irq(irq, ixgbe_test_intr, IRQF_PROBE_SHARED, 1805 netdev->name, netdev)) { 1806 shared_int = false; 1807 } else if (request_irq(irq, ixgbe_test_intr, IRQF_SHARED, 1808 netdev->name, netdev)) { 1809 *data = 1; 1810 return -1; 1811 } 1812 e_info(hw, "testing %s interrupt\n", shared_int ? 1813 "shared" : "unshared"); 1814 1815 /* Disable all the interrupts */ 1816 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF); 1817 IXGBE_WRITE_FLUSH(&adapter->hw); 1818 usleep_range(10000, 20000); 1819 1820 /* Test each interrupt */ 1821 for (; i < 10; i++) { 1822 /* Interrupt to test */ 1823 mask = BIT(i); 1824 1825 if (!shared_int) { 1826 /* 1827 * Disable the interrupts to be reported in 1828 * the cause register and then force the same 1829 * interrupt and see if one gets posted. If 1830 * an interrupt was posted to the bus, the 1831 * test failed. 1832 */ 1833 adapter->test_icr = 0; 1834 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 1835 ~mask & 0x00007FFF); 1836 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, 1837 ~mask & 0x00007FFF); 1838 IXGBE_WRITE_FLUSH(&adapter->hw); 1839 usleep_range(10000, 20000); 1840 1841 if (adapter->test_icr & mask) { 1842 *data = 3; 1843 break; 1844 } 1845 } 1846 1847 /* 1848 * Enable the interrupt to be reported in the cause 1849 * register and then force the same interrupt and see 1850 * if one gets posted. If an interrupt was not posted 1851 * to the bus, the test failed. 1852 */ 1853 adapter->test_icr = 0; 1854 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask); 1855 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask); 1856 IXGBE_WRITE_FLUSH(&adapter->hw); 1857 usleep_range(10000, 20000); 1858 1859 if (!(adapter->test_icr & mask)) { 1860 *data = 4; 1861 break; 1862 } 1863 1864 if (!shared_int) { 1865 /* 1866 * Disable the other interrupts to be reported in 1867 * the cause register and then force the other 1868 * interrupts and see if any get posted. If 1869 * an interrupt was posted to the bus, the 1870 * test failed. 1871 */ 1872 adapter->test_icr = 0; 1873 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 1874 ~mask & 0x00007FFF); 1875 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, 1876 ~mask & 0x00007FFF); 1877 IXGBE_WRITE_FLUSH(&adapter->hw); 1878 usleep_range(10000, 20000); 1879 1880 if (adapter->test_icr) { 1881 *data = 5; 1882 break; 1883 } 1884 } 1885 } 1886 1887 /* Disable all the interrupts */ 1888 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF); 1889 IXGBE_WRITE_FLUSH(&adapter->hw); 1890 usleep_range(10000, 20000); 1891 1892 /* Unhook test interrupt handler */ 1893 free_irq(irq, netdev); 1894 1895 return *data; 1896 } 1897 1898 static void ixgbe_free_desc_rings(struct ixgbe_adapter *adapter) 1899 { 1900 /* Shut down the DMA engines now so they can be reinitialized later, 1901 * since the test rings and normally used rings should overlap on 1902 * queue 0 we can just use the standard disable Rx/Tx calls and they 1903 * will take care of disabling the test rings for us. 1904 */ 1905 1906 /* first Rx */ 1907 ixgbe_disable_rx(adapter); 1908 1909 /* now Tx */ 1910 ixgbe_disable_tx(adapter); 1911 1912 ixgbe_reset(adapter); 1913 1914 ixgbe_free_tx_resources(&adapter->test_tx_ring); 1915 ixgbe_free_rx_resources(&adapter->test_rx_ring); 1916 } 1917 1918 static int ixgbe_setup_desc_rings(struct ixgbe_adapter *adapter) 1919 { 1920 struct ixgbe_ring *tx_ring = &adapter->test_tx_ring; 1921 struct ixgbe_ring *rx_ring = &adapter->test_rx_ring; 1922 struct ixgbe_hw *hw = &adapter->hw; 1923 u32 rctl, reg_data; 1924 int ret_val; 1925 int err; 1926 1927 /* Setup Tx descriptor ring and Tx buffers */ 1928 tx_ring->count = IXGBE_DEFAULT_TXD; 1929 tx_ring->queue_index = 0; 1930 tx_ring->dev = &adapter->pdev->dev; 1931 tx_ring->netdev = adapter->netdev; 1932 tx_ring->reg_idx = adapter->tx_ring[0]->reg_idx; 1933 1934 err = ixgbe_setup_tx_resources(tx_ring); 1935 if (err) 1936 return 1; 1937 1938 switch (adapter->hw.mac.type) { 1939 case ixgbe_mac_82599EB: 1940 case ixgbe_mac_X540: 1941 case ixgbe_mac_X550: 1942 case ixgbe_mac_X550EM_x: 1943 case ixgbe_mac_x550em_a: 1944 case ixgbe_mac_e610: 1945 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_DMATXCTL); 1946 reg_data |= IXGBE_DMATXCTL_TE; 1947 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DMATXCTL, reg_data); 1948 break; 1949 default: 1950 break; 1951 } 1952 1953 ixgbe_configure_tx_ring(adapter, tx_ring); 1954 1955 /* Setup Rx Descriptor ring and Rx buffers */ 1956 rx_ring->count = IXGBE_DEFAULT_RXD; 1957 rx_ring->queue_index = 0; 1958 rx_ring->dev = &adapter->pdev->dev; 1959 rx_ring->netdev = adapter->netdev; 1960 rx_ring->reg_idx = adapter->rx_ring[0]->reg_idx; 1961 1962 err = ixgbe_setup_rx_resources(adapter, rx_ring); 1963 if (err) { 1964 ret_val = 4; 1965 goto err_nomem; 1966 } 1967 1968 hw->mac.ops.disable_rx(hw); 1969 1970 ixgbe_configure_rx_ring(adapter, rx_ring); 1971 1972 rctl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL); 1973 rctl |= IXGBE_RXCTRL_DMBYPS; 1974 IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL, rctl); 1975 1976 hw->mac.ops.enable_rx(hw); 1977 1978 return 0; 1979 1980 err_nomem: 1981 ixgbe_free_desc_rings(adapter); 1982 return ret_val; 1983 } 1984 1985 static int ixgbe_setup_loopback_test(struct ixgbe_adapter *adapter) 1986 { 1987 struct ixgbe_hw *hw = &adapter->hw; 1988 u32 reg_data; 1989 1990 1991 /* Setup MAC loopback */ 1992 reg_data = IXGBE_READ_REG(hw, IXGBE_HLREG0); 1993 reg_data |= IXGBE_HLREG0_LPBK; 1994 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, reg_data); 1995 1996 reg_data = IXGBE_READ_REG(hw, IXGBE_FCTRL); 1997 reg_data |= IXGBE_FCTRL_BAM | IXGBE_FCTRL_SBP | IXGBE_FCTRL_MPE; 1998 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, reg_data); 1999 2000 /* X540 and X550 needs to set the MACC.FLU bit to force link up */ 2001 switch (adapter->hw.mac.type) { 2002 case ixgbe_mac_X540: 2003 case ixgbe_mac_X550: 2004 case ixgbe_mac_X550EM_x: 2005 case ixgbe_mac_x550em_a: 2006 case ixgbe_mac_e610: 2007 reg_data = IXGBE_READ_REG(hw, IXGBE_MACC); 2008 reg_data |= IXGBE_MACC_FLU; 2009 IXGBE_WRITE_REG(hw, IXGBE_MACC, reg_data); 2010 break; 2011 default: 2012 if (hw->mac.orig_autoc) { 2013 reg_data = hw->mac.orig_autoc | IXGBE_AUTOC_FLU; 2014 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, reg_data); 2015 } else { 2016 return 10; 2017 } 2018 } 2019 IXGBE_WRITE_FLUSH(hw); 2020 usleep_range(10000, 20000); 2021 2022 /* Disable Atlas Tx lanes; re-enabled in reset path */ 2023 if (hw->mac.type == ixgbe_mac_82598EB) { 2024 u8 atlas; 2025 2026 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &atlas); 2027 atlas |= IXGBE_ATLAS_PDN_TX_REG_EN; 2028 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, atlas); 2029 2030 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, &atlas); 2031 atlas |= IXGBE_ATLAS_PDN_TX_10G_QL_ALL; 2032 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, atlas); 2033 2034 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, &atlas); 2035 atlas |= IXGBE_ATLAS_PDN_TX_1G_QL_ALL; 2036 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, atlas); 2037 2038 hw->mac.ops.read_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, &atlas); 2039 atlas |= IXGBE_ATLAS_PDN_TX_AN_QL_ALL; 2040 hw->mac.ops.write_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, atlas); 2041 } 2042 2043 return 0; 2044 } 2045 2046 static void ixgbe_loopback_cleanup(struct ixgbe_adapter *adapter) 2047 { 2048 u32 reg_data; 2049 2050 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0); 2051 reg_data &= ~IXGBE_HLREG0_LPBK; 2052 IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data); 2053 } 2054 2055 static void ixgbe_create_lbtest_frame(struct sk_buff *skb, 2056 unsigned int frame_size) 2057 { 2058 memset(skb->data, 0xFF, frame_size); 2059 frame_size >>= 1; 2060 memset(&skb->data[frame_size], 0xAA, frame_size / 2 - 1); 2061 skb->data[frame_size + 10] = 0xBE; 2062 skb->data[frame_size + 12] = 0xAF; 2063 } 2064 2065 static bool ixgbe_check_lbtest_frame(struct ixgbe_rx_buffer *rx_buffer, 2066 unsigned int frame_size) 2067 { 2068 unsigned char *data; 2069 2070 frame_size >>= 1; 2071 2072 data = page_address(rx_buffer->page) + rx_buffer->page_offset; 2073 2074 return data[3] == 0xFF && data[frame_size + 10] == 0xBE && 2075 data[frame_size + 12] == 0xAF; 2076 } 2077 2078 static u16 ixgbe_clean_test_rings(struct ixgbe_ring *rx_ring, 2079 struct ixgbe_ring *tx_ring, 2080 unsigned int size) 2081 { 2082 union ixgbe_adv_rx_desc *rx_desc; 2083 u16 rx_ntc, tx_ntc, count = 0; 2084 2085 /* initialize next to clean and descriptor values */ 2086 rx_ntc = rx_ring->next_to_clean; 2087 tx_ntc = tx_ring->next_to_clean; 2088 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ntc); 2089 2090 while (tx_ntc != tx_ring->next_to_use) { 2091 union ixgbe_adv_tx_desc *tx_desc; 2092 struct ixgbe_tx_buffer *tx_buffer; 2093 2094 tx_desc = IXGBE_TX_DESC(tx_ring, tx_ntc); 2095 2096 /* if DD is not set transmit has not completed */ 2097 if (!(tx_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD))) 2098 return count; 2099 2100 /* unmap buffer on Tx side */ 2101 tx_buffer = &tx_ring->tx_buffer_info[tx_ntc]; 2102 2103 /* Free all the Tx ring sk_buffs */ 2104 dev_kfree_skb_any(tx_buffer->skb); 2105 2106 /* unmap skb header data */ 2107 dma_unmap_single(tx_ring->dev, 2108 dma_unmap_addr(tx_buffer, dma), 2109 dma_unmap_len(tx_buffer, len), 2110 DMA_TO_DEVICE); 2111 dma_unmap_len_set(tx_buffer, len, 0); 2112 2113 /* increment Tx next to clean counter */ 2114 tx_ntc++; 2115 if (tx_ntc == tx_ring->count) 2116 tx_ntc = 0; 2117 } 2118 2119 while (rx_desc->wb.upper.length) { 2120 struct ixgbe_rx_buffer *rx_buffer; 2121 2122 /* check Rx buffer */ 2123 rx_buffer = &rx_ring->rx_buffer_info[rx_ntc]; 2124 2125 /* sync Rx buffer for CPU read */ 2126 dma_sync_single_for_cpu(rx_ring->dev, 2127 rx_buffer->dma, 2128 ixgbe_rx_bufsz(rx_ring), 2129 DMA_FROM_DEVICE); 2130 2131 /* verify contents of skb */ 2132 if (ixgbe_check_lbtest_frame(rx_buffer, size)) 2133 count++; 2134 else 2135 break; 2136 2137 /* sync Rx buffer for device write */ 2138 dma_sync_single_for_device(rx_ring->dev, 2139 rx_buffer->dma, 2140 ixgbe_rx_bufsz(rx_ring), 2141 DMA_FROM_DEVICE); 2142 2143 /* increment Rx next to clean counter */ 2144 rx_ntc++; 2145 if (rx_ntc == rx_ring->count) 2146 rx_ntc = 0; 2147 2148 /* fetch next descriptor */ 2149 rx_desc = IXGBE_RX_DESC(rx_ring, rx_ntc); 2150 } 2151 2152 netdev_tx_reset_queue(txring_txq(tx_ring)); 2153 2154 /* re-map buffers to ring, store next to clean values */ 2155 ixgbe_alloc_rx_buffers(rx_ring, count); 2156 rx_ring->next_to_clean = rx_ntc; 2157 tx_ring->next_to_clean = tx_ntc; 2158 2159 return count; 2160 } 2161 2162 static int ixgbe_run_loopback_test(struct ixgbe_adapter *adapter) 2163 { 2164 struct ixgbe_ring *tx_ring = &adapter->test_tx_ring; 2165 struct ixgbe_ring *rx_ring = &adapter->test_rx_ring; 2166 int i, j, lc, good_cnt, ret_val = 0; 2167 unsigned int size = 1024; 2168 netdev_tx_t tx_ret_val; 2169 struct sk_buff *skb; 2170 u32 flags_orig = adapter->flags; 2171 2172 /* DCB can modify the frames on Tx */ 2173 adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED; 2174 2175 /* allocate test skb */ 2176 skb = alloc_skb(size, GFP_KERNEL); 2177 if (!skb) 2178 return 11; 2179 2180 /* place data into test skb */ 2181 ixgbe_create_lbtest_frame(skb, size); 2182 skb_put(skb, size); 2183 2184 /* 2185 * Calculate the loop count based on the largest descriptor ring 2186 * The idea is to wrap the largest ring a number of times using 64 2187 * send/receive pairs during each loop 2188 */ 2189 2190 if (rx_ring->count <= tx_ring->count) 2191 lc = ((tx_ring->count / 64) * 2) + 1; 2192 else 2193 lc = ((rx_ring->count / 64) * 2) + 1; 2194 2195 for (j = 0; j <= lc; j++) { 2196 /* reset count of good packets */ 2197 good_cnt = 0; 2198 2199 /* place 64 packets on the transmit queue*/ 2200 for (i = 0; i < 64; i++) { 2201 skb_get(skb); 2202 tx_ret_val = ixgbe_xmit_frame_ring(skb, 2203 adapter, 2204 tx_ring); 2205 if (tx_ret_val == NETDEV_TX_OK) 2206 good_cnt++; 2207 } 2208 2209 if (good_cnt != 64) { 2210 ret_val = 12; 2211 break; 2212 } 2213 2214 /* allow 200 milliseconds for packets to go from Tx to Rx */ 2215 msleep(200); 2216 2217 good_cnt = ixgbe_clean_test_rings(rx_ring, tx_ring, size); 2218 if (good_cnt != 64) { 2219 ret_val = 13; 2220 break; 2221 } 2222 } 2223 2224 /* free the original skb */ 2225 kfree_skb(skb); 2226 adapter->flags = flags_orig; 2227 2228 return ret_val; 2229 } 2230 2231 static int ixgbe_loopback_test(struct ixgbe_adapter *adapter, u64 *data) 2232 { 2233 *data = ixgbe_setup_desc_rings(adapter); 2234 if (*data) 2235 goto out; 2236 *data = ixgbe_setup_loopback_test(adapter); 2237 if (*data) 2238 goto err_loopback; 2239 *data = ixgbe_run_loopback_test(adapter); 2240 ixgbe_loopback_cleanup(adapter); 2241 2242 err_loopback: 2243 ixgbe_free_desc_rings(adapter); 2244 out: 2245 return *data; 2246 } 2247 2248 static void ixgbe_diag_test(struct net_device *netdev, 2249 struct ethtool_test *eth_test, u64 *data) 2250 { 2251 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 2252 bool if_running = netif_running(netdev); 2253 2254 if (ixgbe_removed(adapter->hw.hw_addr)) { 2255 e_err(hw, "Adapter removed - test blocked\n"); 2256 data[0] = 1; 2257 data[1] = 1; 2258 data[2] = 1; 2259 data[3] = 1; 2260 data[4] = 1; 2261 eth_test->flags |= ETH_TEST_FL_FAILED; 2262 return; 2263 } 2264 set_bit(__IXGBE_TESTING, &adapter->state); 2265 if (eth_test->flags == ETH_TEST_FL_OFFLINE) { 2266 struct ixgbe_hw *hw = &adapter->hw; 2267 2268 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) { 2269 int i; 2270 for (i = 0; i < adapter->num_vfs; i++) { 2271 if (adapter->vfinfo[i].clear_to_send) { 2272 netdev_warn(netdev, "offline diagnostic is not supported when VFs are present\n"); 2273 data[0] = 1; 2274 data[1] = 1; 2275 data[2] = 1; 2276 data[3] = 1; 2277 data[4] = 1; 2278 eth_test->flags |= ETH_TEST_FL_FAILED; 2279 clear_bit(__IXGBE_TESTING, 2280 &adapter->state); 2281 return; 2282 } 2283 } 2284 } 2285 2286 /* Offline tests */ 2287 e_info(hw, "offline testing starting\n"); 2288 2289 /* Link test performed before hardware reset so autoneg doesn't 2290 * interfere with test result 2291 */ 2292 if (ixgbe_link_test(adapter, &data[4])) 2293 eth_test->flags |= ETH_TEST_FL_FAILED; 2294 2295 if (if_running) 2296 /* indicate we're in test mode */ 2297 ixgbe_close(netdev); 2298 else 2299 ixgbe_reset(adapter); 2300 2301 e_info(hw, "register testing starting\n"); 2302 if (ixgbe_reg_test(adapter, &data[0])) 2303 eth_test->flags |= ETH_TEST_FL_FAILED; 2304 2305 ixgbe_reset(adapter); 2306 e_info(hw, "eeprom testing starting\n"); 2307 if (ixgbe_eeprom_test(adapter, &data[1])) 2308 eth_test->flags |= ETH_TEST_FL_FAILED; 2309 2310 ixgbe_reset(adapter); 2311 e_info(hw, "interrupt testing starting\n"); 2312 if (ixgbe_intr_test(adapter, &data[2])) 2313 eth_test->flags |= ETH_TEST_FL_FAILED; 2314 2315 /* If SRIOV or VMDq is enabled then skip MAC 2316 * loopback diagnostic. */ 2317 if (adapter->flags & (IXGBE_FLAG_SRIOV_ENABLED | 2318 IXGBE_FLAG_VMDQ_ENABLED)) { 2319 e_info(hw, "Skip MAC loopback diagnostic in VT mode\n"); 2320 data[3] = 0; 2321 goto skip_loopback; 2322 } 2323 2324 ixgbe_reset(adapter); 2325 e_info(hw, "loopback testing starting\n"); 2326 if (ixgbe_loopback_test(adapter, &data[3])) 2327 eth_test->flags |= ETH_TEST_FL_FAILED; 2328 2329 skip_loopback: 2330 ixgbe_reset(adapter); 2331 2332 /* clear testing bit and return adapter to previous state */ 2333 clear_bit(__IXGBE_TESTING, &adapter->state); 2334 if (if_running) 2335 ixgbe_open(netdev); 2336 else if (hw->mac.ops.disable_tx_laser) 2337 hw->mac.ops.disable_tx_laser(hw); 2338 } else { 2339 e_info(hw, "online testing starting\n"); 2340 2341 /* Online tests */ 2342 if (ixgbe_link_test(adapter, &data[4])) 2343 eth_test->flags |= ETH_TEST_FL_FAILED; 2344 2345 /* Offline tests aren't run; pass by default */ 2346 data[0] = 0; 2347 data[1] = 0; 2348 data[2] = 0; 2349 data[3] = 0; 2350 2351 clear_bit(__IXGBE_TESTING, &adapter->state); 2352 } 2353 } 2354 2355 static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter, 2356 struct ethtool_wolinfo *wol) 2357 { 2358 struct ixgbe_hw *hw = &adapter->hw; 2359 int retval = 0; 2360 2361 /* WOL not supported for all devices */ 2362 if (!ixgbe_wol_supported(adapter, hw->device_id, 2363 hw->subsystem_device_id)) { 2364 retval = 1; 2365 wol->supported = 0; 2366 } 2367 2368 return retval; 2369 } 2370 2371 static void ixgbe_get_wol(struct net_device *netdev, 2372 struct ethtool_wolinfo *wol) 2373 { 2374 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 2375 2376 wol->supported = WAKE_UCAST | WAKE_MCAST | 2377 WAKE_BCAST | WAKE_MAGIC; 2378 wol->wolopts = 0; 2379 2380 if (ixgbe_wol_exclusion(adapter, wol) || 2381 !device_can_wakeup(&adapter->pdev->dev)) 2382 return; 2383 2384 if (adapter->wol & IXGBE_WUFC_EX) 2385 wol->wolopts |= WAKE_UCAST; 2386 if (adapter->wol & IXGBE_WUFC_MC) 2387 wol->wolopts |= WAKE_MCAST; 2388 if (adapter->wol & IXGBE_WUFC_BC) 2389 wol->wolopts |= WAKE_BCAST; 2390 if (adapter->wol & IXGBE_WUFC_MAG) 2391 wol->wolopts |= WAKE_MAGIC; 2392 } 2393 2394 static int ixgbe_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) 2395 { 2396 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 2397 2398 if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE | 2399 WAKE_FILTER)) 2400 return -EOPNOTSUPP; 2401 2402 if (ixgbe_wol_exclusion(adapter, wol)) 2403 return wol->wolopts ? -EOPNOTSUPP : 0; 2404 2405 adapter->wol = 0; 2406 2407 if (wol->wolopts & WAKE_UCAST) 2408 adapter->wol |= IXGBE_WUFC_EX; 2409 if (wol->wolopts & WAKE_MCAST) 2410 adapter->wol |= IXGBE_WUFC_MC; 2411 if (wol->wolopts & WAKE_BCAST) 2412 adapter->wol |= IXGBE_WUFC_BC; 2413 if (wol->wolopts & WAKE_MAGIC) 2414 adapter->wol |= IXGBE_WUFC_MAG; 2415 2416 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol); 2417 2418 return 0; 2419 } 2420 2421 static int ixgbe_set_wol_acpi(struct net_device *netdev, 2422 struct ethtool_wolinfo *wol) 2423 { 2424 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 2425 struct ixgbe_hw *hw = &adapter->hw; 2426 u32 grc; 2427 2428 if (ixgbe_wol_exclusion(adapter, wol)) 2429 return wol->wolopts ? -EOPNOTSUPP : 0; 2430 2431 /* disable APM wakeup */ 2432 grc = IXGBE_READ_REG(hw, IXGBE_GRC_X550EM_a); 2433 grc &= ~IXGBE_GRC_APME; 2434 IXGBE_WRITE_REG(hw, IXGBE_GRC_X550EM_a, grc); 2435 2436 /* erase existing filters */ 2437 IXGBE_WRITE_REG(hw, IXGBE_WUFC, 0); 2438 adapter->wol = 0; 2439 2440 if (wol->wolopts & WAKE_UCAST) 2441 adapter->wol |= IXGBE_WUFC_EX; 2442 if (wol->wolopts & WAKE_MCAST) 2443 adapter->wol |= IXGBE_WUFC_MC; 2444 if (wol->wolopts & WAKE_BCAST) 2445 adapter->wol |= IXGBE_WUFC_BC; 2446 2447 IXGBE_WRITE_REG(hw, IXGBE_WUC, IXGBE_WUC_PME_EN); 2448 IXGBE_WRITE_REG(hw, IXGBE_WUFC, adapter->wol); 2449 2450 hw->wol_enabled = adapter->wol; 2451 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol); 2452 2453 return 0; 2454 } 2455 2456 static int ixgbe_set_wol_e610(struct net_device *netdev, 2457 struct ethtool_wolinfo *wol) 2458 { 2459 if (wol->wolopts & (WAKE_UCAST | WAKE_MCAST | WAKE_BCAST)) 2460 return ixgbe_set_wol_acpi(netdev, wol); 2461 else 2462 return ixgbe_set_wol(netdev, wol); 2463 } 2464 2465 static int ixgbe_nway_reset(struct net_device *netdev) 2466 { 2467 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 2468 2469 if (netif_running(netdev)) 2470 ixgbe_reinit_locked(adapter); 2471 2472 return 0; 2473 } 2474 2475 static int ixgbe_set_phys_id(struct net_device *netdev, 2476 enum ethtool_phys_id_state state) 2477 { 2478 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 2479 struct ixgbe_hw *hw = &adapter->hw; 2480 2481 if (!hw->mac.ops.led_on || !hw->mac.ops.led_off) 2482 return -EOPNOTSUPP; 2483 2484 switch (state) { 2485 case ETHTOOL_ID_ACTIVE: 2486 adapter->led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL); 2487 return 2; 2488 2489 case ETHTOOL_ID_ON: 2490 hw->mac.ops.led_on(hw, hw->mac.led_link_act); 2491 break; 2492 2493 case ETHTOOL_ID_OFF: 2494 hw->mac.ops.led_off(hw, hw->mac.led_link_act); 2495 break; 2496 2497 case ETHTOOL_ID_INACTIVE: 2498 /* Restore LED settings */ 2499 IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, adapter->led_reg); 2500 break; 2501 } 2502 2503 return 0; 2504 } 2505 2506 static int ixgbe_set_phys_id_e610(struct net_device *netdev, 2507 enum ethtool_phys_id_state state) 2508 { 2509 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 2510 bool led_active; 2511 2512 switch (state) { 2513 case ETHTOOL_ID_ACTIVE: 2514 led_active = true; 2515 break; 2516 case ETHTOOL_ID_INACTIVE: 2517 led_active = false; 2518 break; 2519 default: 2520 return -EOPNOTSUPP; 2521 } 2522 2523 return ixgbe_aci_set_port_id_led(&adapter->hw, !led_active); 2524 } 2525 2526 static int ixgbe_get_coalesce(struct net_device *netdev, 2527 struct ethtool_coalesce *ec, 2528 struct kernel_ethtool_coalesce *kernel_coal, 2529 struct netlink_ext_ack *extack) 2530 { 2531 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 2532 2533 /* only valid if in constant ITR mode */ 2534 if (adapter->rx_itr_setting <= 1) 2535 ec->rx_coalesce_usecs = adapter->rx_itr_setting; 2536 else 2537 ec->rx_coalesce_usecs = adapter->rx_itr_setting >> 2; 2538 2539 /* if in mixed tx/rx queues per vector mode, report only rx settings */ 2540 if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count) 2541 return 0; 2542 2543 /* only valid if in constant ITR mode */ 2544 if (adapter->tx_itr_setting <= 1) 2545 ec->tx_coalesce_usecs = adapter->tx_itr_setting; 2546 else 2547 ec->tx_coalesce_usecs = adapter->tx_itr_setting >> 2; 2548 2549 return 0; 2550 } 2551 2552 /* 2553 * this function must be called before setting the new value of 2554 * rx_itr_setting 2555 */ 2556 static bool ixgbe_update_rsc(struct ixgbe_adapter *adapter) 2557 { 2558 struct net_device *netdev = adapter->netdev; 2559 2560 /* nothing to do if LRO or RSC are not enabled */ 2561 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) || 2562 !(netdev->features & NETIF_F_LRO)) 2563 return false; 2564 2565 /* check the feature flag value and enable RSC if necessary */ 2566 if (adapter->rx_itr_setting == 1 || 2567 adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) { 2568 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) { 2569 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED; 2570 e_info(probe, "rx-usecs value high enough to re-enable RSC\n"); 2571 return true; 2572 } 2573 /* if interrupt rate is too high then disable RSC */ 2574 } else if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) { 2575 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED; 2576 e_info(probe, "rx-usecs set too low, disabling RSC\n"); 2577 return true; 2578 } 2579 return false; 2580 } 2581 2582 static int ixgbe_set_coalesce(struct net_device *netdev, 2583 struct ethtool_coalesce *ec, 2584 struct kernel_ethtool_coalesce *kernel_coal, 2585 struct netlink_ext_ack *extack) 2586 { 2587 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 2588 struct ixgbe_q_vector *q_vector; 2589 int i; 2590 u16 tx_itr_param, rx_itr_param, tx_itr_prev; 2591 bool need_reset = false; 2592 2593 if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count) { 2594 /* reject Tx specific changes in case of mixed RxTx vectors */ 2595 if (ec->tx_coalesce_usecs) 2596 return -EINVAL; 2597 tx_itr_prev = adapter->rx_itr_setting; 2598 } else { 2599 tx_itr_prev = adapter->tx_itr_setting; 2600 } 2601 2602 if ((ec->rx_coalesce_usecs > (IXGBE_MAX_EITR >> 2)) || 2603 (ec->tx_coalesce_usecs > (IXGBE_MAX_EITR >> 2))) 2604 return -EINVAL; 2605 2606 if (ec->rx_coalesce_usecs > 1) 2607 adapter->rx_itr_setting = ec->rx_coalesce_usecs << 2; 2608 else 2609 adapter->rx_itr_setting = ec->rx_coalesce_usecs; 2610 2611 if (adapter->rx_itr_setting == 1) 2612 rx_itr_param = IXGBE_20K_ITR; 2613 else 2614 rx_itr_param = adapter->rx_itr_setting; 2615 2616 if (ec->tx_coalesce_usecs > 1) 2617 adapter->tx_itr_setting = ec->tx_coalesce_usecs << 2; 2618 else 2619 adapter->tx_itr_setting = ec->tx_coalesce_usecs; 2620 2621 if (adapter->tx_itr_setting == 1) 2622 tx_itr_param = IXGBE_12K_ITR; 2623 else 2624 tx_itr_param = adapter->tx_itr_setting; 2625 2626 /* mixed Rx/Tx */ 2627 if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count) 2628 adapter->tx_itr_setting = adapter->rx_itr_setting; 2629 2630 /* detect ITR changes that require update of TXDCTL.WTHRESH */ 2631 if ((adapter->tx_itr_setting != 1) && 2632 (adapter->tx_itr_setting < IXGBE_100K_ITR)) { 2633 if ((tx_itr_prev == 1) || 2634 (tx_itr_prev >= IXGBE_100K_ITR)) 2635 need_reset = true; 2636 } else { 2637 if ((tx_itr_prev != 1) && 2638 (tx_itr_prev < IXGBE_100K_ITR)) 2639 need_reset = true; 2640 } 2641 2642 /* check the old value and enable RSC if necessary */ 2643 need_reset |= ixgbe_update_rsc(adapter); 2644 2645 for (i = 0; i < adapter->num_q_vectors; i++) { 2646 q_vector = adapter->q_vector[i]; 2647 if (q_vector->tx.count && !q_vector->rx.count) 2648 /* tx only */ 2649 q_vector->itr = tx_itr_param; 2650 else 2651 /* rx only or mixed */ 2652 q_vector->itr = rx_itr_param; 2653 ixgbe_write_eitr(q_vector); 2654 } 2655 2656 /* 2657 * do reset here at the end to make sure EITR==0 case is handled 2658 * correctly w.r.t stopping tx, and changing TXDCTL.WTHRESH settings 2659 * also locks in RSC enable/disable which requires reset 2660 */ 2661 if (need_reset) 2662 ixgbe_do_reset(netdev); 2663 2664 return 0; 2665 } 2666 2667 static int ixgbe_get_ethtool_fdir_entry(struct ixgbe_adapter *adapter, 2668 struct ethtool_rxnfc *cmd) 2669 { 2670 union ixgbe_atr_input *mask = &adapter->fdir_mask; 2671 struct ethtool_rx_flow_spec *fsp = 2672 (struct ethtool_rx_flow_spec *)&cmd->fs; 2673 struct hlist_node *node2; 2674 struct ixgbe_fdir_filter *rule = NULL; 2675 2676 /* report total rule count */ 2677 cmd->data = (1024 << adapter->fdir_pballoc) - 2; 2678 2679 hlist_for_each_entry_safe(rule, node2, 2680 &adapter->fdir_filter_list, fdir_node) { 2681 if (fsp->location <= rule->sw_idx) 2682 break; 2683 } 2684 2685 if (!rule || fsp->location != rule->sw_idx) 2686 return -EINVAL; 2687 2688 /* fill out the flow spec entry */ 2689 2690 /* set flow type field */ 2691 switch (rule->filter.formatted.flow_type) { 2692 case IXGBE_ATR_FLOW_TYPE_TCPV4: 2693 fsp->flow_type = TCP_V4_FLOW; 2694 break; 2695 case IXGBE_ATR_FLOW_TYPE_UDPV4: 2696 fsp->flow_type = UDP_V4_FLOW; 2697 break; 2698 case IXGBE_ATR_FLOW_TYPE_SCTPV4: 2699 fsp->flow_type = SCTP_V4_FLOW; 2700 break; 2701 case IXGBE_ATR_FLOW_TYPE_IPV4: 2702 fsp->flow_type = IP_USER_FLOW; 2703 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4; 2704 fsp->h_u.usr_ip4_spec.proto = 0; 2705 fsp->m_u.usr_ip4_spec.proto = 0; 2706 break; 2707 default: 2708 return -EINVAL; 2709 } 2710 2711 fsp->h_u.tcp_ip4_spec.psrc = rule->filter.formatted.src_port; 2712 fsp->m_u.tcp_ip4_spec.psrc = mask->formatted.src_port; 2713 fsp->h_u.tcp_ip4_spec.pdst = rule->filter.formatted.dst_port; 2714 fsp->m_u.tcp_ip4_spec.pdst = mask->formatted.dst_port; 2715 fsp->h_u.tcp_ip4_spec.ip4src = rule->filter.formatted.src_ip[0]; 2716 fsp->m_u.tcp_ip4_spec.ip4src = mask->formatted.src_ip[0]; 2717 fsp->h_u.tcp_ip4_spec.ip4dst = rule->filter.formatted.dst_ip[0]; 2718 fsp->m_u.tcp_ip4_spec.ip4dst = mask->formatted.dst_ip[0]; 2719 fsp->h_ext.vlan_tci = rule->filter.formatted.vlan_id; 2720 fsp->m_ext.vlan_tci = mask->formatted.vlan_id; 2721 fsp->h_ext.vlan_etype = rule->filter.formatted.flex_bytes; 2722 fsp->m_ext.vlan_etype = mask->formatted.flex_bytes; 2723 fsp->h_ext.data[1] = htonl(rule->filter.formatted.vm_pool); 2724 fsp->m_ext.data[1] = htonl(mask->formatted.vm_pool); 2725 fsp->flow_type |= FLOW_EXT; 2726 2727 /* record action */ 2728 if (rule->action == IXGBE_FDIR_DROP_QUEUE) 2729 fsp->ring_cookie = RX_CLS_FLOW_DISC; 2730 else 2731 fsp->ring_cookie = rule->action; 2732 2733 return 0; 2734 } 2735 2736 static int ixgbe_get_ethtool_fdir_all(struct ixgbe_adapter *adapter, 2737 struct ethtool_rxnfc *cmd, 2738 u32 *rule_locs) 2739 { 2740 struct hlist_node *node2; 2741 struct ixgbe_fdir_filter *rule; 2742 int cnt = 0; 2743 2744 /* report total rule count */ 2745 cmd->data = (1024 << adapter->fdir_pballoc) - 2; 2746 2747 hlist_for_each_entry_safe(rule, node2, 2748 &adapter->fdir_filter_list, fdir_node) { 2749 if (cnt == cmd->rule_cnt) 2750 return -EMSGSIZE; 2751 rule_locs[cnt] = rule->sw_idx; 2752 cnt++; 2753 } 2754 2755 cmd->rule_cnt = cnt; 2756 2757 return 0; 2758 } 2759 2760 static int ixgbe_get_rxfh_fields(struct net_device *dev, 2761 struct ethtool_rxfh_fields *cmd) 2762 { 2763 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 2764 2765 cmd->data = 0; 2766 2767 /* Report default options for RSS on ixgbe */ 2768 switch (cmd->flow_type) { 2769 case TCP_V4_FLOW: 2770 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 2771 fallthrough; 2772 case UDP_V4_FLOW: 2773 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP) 2774 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 2775 fallthrough; 2776 case SCTP_V4_FLOW: 2777 case AH_ESP_V4_FLOW: 2778 case AH_V4_FLOW: 2779 case ESP_V4_FLOW: 2780 case IPV4_FLOW: 2781 cmd->data |= RXH_IP_SRC | RXH_IP_DST; 2782 break; 2783 case TCP_V6_FLOW: 2784 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 2785 fallthrough; 2786 case UDP_V6_FLOW: 2787 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP) 2788 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; 2789 fallthrough; 2790 case SCTP_V6_FLOW: 2791 case AH_ESP_V6_FLOW: 2792 case AH_V6_FLOW: 2793 case ESP_V6_FLOW: 2794 case IPV6_FLOW: 2795 cmd->data |= RXH_IP_SRC | RXH_IP_DST; 2796 break; 2797 default: 2798 return -EINVAL; 2799 } 2800 2801 return 0; 2802 } 2803 2804 static int ixgbe_rss_indir_tbl_max(struct ixgbe_adapter *adapter) 2805 { 2806 if (adapter->hw.mac.type < ixgbe_mac_X550) 2807 return 16; 2808 else 2809 return 64; 2810 } 2811 2812 static u32 ixgbe_get_rx_ring_count(struct net_device *dev) 2813 { 2814 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 2815 2816 return min_t(u32, adapter->num_rx_queues, 2817 ixgbe_rss_indir_tbl_max(adapter)); 2818 } 2819 2820 static int ixgbe_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd, 2821 u32 *rule_locs) 2822 { 2823 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 2824 int ret = -EOPNOTSUPP; 2825 2826 switch (cmd->cmd) { 2827 case ETHTOOL_GRXCLSRLCNT: 2828 cmd->rule_cnt = adapter->fdir_filter_count; 2829 ret = 0; 2830 break; 2831 case ETHTOOL_GRXCLSRULE: 2832 ret = ixgbe_get_ethtool_fdir_entry(adapter, cmd); 2833 break; 2834 case ETHTOOL_GRXCLSRLALL: 2835 ret = ixgbe_get_ethtool_fdir_all(adapter, cmd, rule_locs); 2836 break; 2837 default: 2838 break; 2839 } 2840 2841 return ret; 2842 } 2843 2844 int ixgbe_update_ethtool_fdir_entry(struct ixgbe_adapter *adapter, 2845 struct ixgbe_fdir_filter *input, 2846 u16 sw_idx) 2847 { 2848 struct ixgbe_hw *hw = &adapter->hw; 2849 struct hlist_node *node2; 2850 struct ixgbe_fdir_filter *rule, *parent; 2851 int err = -EINVAL; 2852 2853 parent = NULL; 2854 rule = NULL; 2855 2856 hlist_for_each_entry_safe(rule, node2, 2857 &adapter->fdir_filter_list, fdir_node) { 2858 /* hash found, or no matching entry */ 2859 if (rule->sw_idx >= sw_idx) 2860 break; 2861 parent = rule; 2862 } 2863 2864 /* if there is an old rule occupying our place remove it */ 2865 if (rule && (rule->sw_idx == sw_idx)) { 2866 if (!input || (rule->filter.formatted.bkt_hash != 2867 input->filter.formatted.bkt_hash)) { 2868 err = ixgbe_fdir_erase_perfect_filter_82599(hw, 2869 &rule->filter, 2870 sw_idx); 2871 } 2872 2873 hlist_del(&rule->fdir_node); 2874 kfree(rule); 2875 adapter->fdir_filter_count--; 2876 } 2877 2878 /* 2879 * If no input this was a delete, err should be 0 if a rule was 2880 * successfully found and removed from the list else -EINVAL 2881 */ 2882 if (!input) 2883 return err; 2884 2885 /* initialize node and set software index */ 2886 INIT_HLIST_NODE(&input->fdir_node); 2887 2888 /* add filter to the list */ 2889 if (parent) 2890 hlist_add_behind(&input->fdir_node, &parent->fdir_node); 2891 else 2892 hlist_add_head(&input->fdir_node, 2893 &adapter->fdir_filter_list); 2894 2895 /* update counts */ 2896 adapter->fdir_filter_count++; 2897 2898 return 0; 2899 } 2900 2901 static int ixgbe_flowspec_to_flow_type(struct ethtool_rx_flow_spec *fsp, 2902 u8 *flow_type) 2903 { 2904 switch (fsp->flow_type & ~FLOW_EXT) { 2905 case TCP_V4_FLOW: 2906 *flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4; 2907 break; 2908 case UDP_V4_FLOW: 2909 *flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4; 2910 break; 2911 case SCTP_V4_FLOW: 2912 *flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4; 2913 break; 2914 case IP_USER_FLOW: 2915 switch (fsp->h_u.usr_ip4_spec.proto) { 2916 case IPPROTO_TCP: 2917 *flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4; 2918 break; 2919 case IPPROTO_UDP: 2920 *flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4; 2921 break; 2922 case IPPROTO_SCTP: 2923 *flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4; 2924 break; 2925 case 0: 2926 if (!fsp->m_u.usr_ip4_spec.proto) { 2927 *flow_type = IXGBE_ATR_FLOW_TYPE_IPV4; 2928 break; 2929 } 2930 fallthrough; 2931 default: 2932 return 0; 2933 } 2934 break; 2935 default: 2936 return 0; 2937 } 2938 2939 return 1; 2940 } 2941 2942 static int ixgbe_add_ethtool_fdir_entry(struct ixgbe_adapter *adapter, 2943 struct ethtool_rxnfc *cmd) 2944 { 2945 struct ethtool_rx_flow_spec *fsp = 2946 (struct ethtool_rx_flow_spec *)&cmd->fs; 2947 struct ixgbe_hw *hw = &adapter->hw; 2948 struct ixgbe_fdir_filter *input; 2949 union ixgbe_atr_input mask; 2950 u8 queue; 2951 int err; 2952 2953 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)) 2954 return -EOPNOTSUPP; 2955 2956 /* ring_cookie is a masked into a set of queues and ixgbe pools or 2957 * we use the drop index. 2958 */ 2959 if (fsp->ring_cookie == RX_CLS_FLOW_DISC) { 2960 queue = IXGBE_FDIR_DROP_QUEUE; 2961 } else { 2962 u32 ring = ethtool_get_flow_spec_ring(fsp->ring_cookie); 2963 u8 vf = ethtool_get_flow_spec_ring_vf(fsp->ring_cookie); 2964 2965 if (!vf && (ring >= adapter->num_rx_queues)) 2966 return -EINVAL; 2967 else if (vf && 2968 ((vf > adapter->num_vfs) || 2969 ring >= adapter->num_rx_queues_per_pool)) 2970 return -EINVAL; 2971 2972 /* Map the ring onto the absolute queue index */ 2973 if (!vf) 2974 queue = adapter->rx_ring[ring]->reg_idx; 2975 else 2976 queue = ((vf - 1) * 2977 adapter->num_rx_queues_per_pool) + ring; 2978 } 2979 2980 /* Don't allow indexes to exist outside of available space */ 2981 if (fsp->location >= ((1024 << adapter->fdir_pballoc) - 2)) { 2982 e_err(drv, "Location out of range\n"); 2983 return -EINVAL; 2984 } 2985 2986 input = kzalloc_obj(*input, GFP_ATOMIC); 2987 if (!input) 2988 return -ENOMEM; 2989 2990 memset(&mask, 0, sizeof(union ixgbe_atr_input)); 2991 2992 /* set SW index */ 2993 input->sw_idx = fsp->location; 2994 2995 /* record flow type */ 2996 if (!ixgbe_flowspec_to_flow_type(fsp, 2997 &input->filter.formatted.flow_type)) { 2998 e_err(drv, "Unrecognized flow type\n"); 2999 goto err_out; 3000 } 3001 3002 mask.formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK | 3003 IXGBE_ATR_L4TYPE_MASK; 3004 3005 if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4) 3006 mask.formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK; 3007 3008 /* Copy input into formatted structures */ 3009 input->filter.formatted.src_ip[0] = fsp->h_u.tcp_ip4_spec.ip4src; 3010 mask.formatted.src_ip[0] = fsp->m_u.tcp_ip4_spec.ip4src; 3011 input->filter.formatted.dst_ip[0] = fsp->h_u.tcp_ip4_spec.ip4dst; 3012 mask.formatted.dst_ip[0] = fsp->m_u.tcp_ip4_spec.ip4dst; 3013 input->filter.formatted.src_port = fsp->h_u.tcp_ip4_spec.psrc; 3014 mask.formatted.src_port = fsp->m_u.tcp_ip4_spec.psrc; 3015 input->filter.formatted.dst_port = fsp->h_u.tcp_ip4_spec.pdst; 3016 mask.formatted.dst_port = fsp->m_u.tcp_ip4_spec.pdst; 3017 3018 if (fsp->flow_type & FLOW_EXT) { 3019 input->filter.formatted.vm_pool = 3020 (unsigned char)ntohl(fsp->h_ext.data[1]); 3021 mask.formatted.vm_pool = 3022 (unsigned char)ntohl(fsp->m_ext.data[1]); 3023 input->filter.formatted.vlan_id = fsp->h_ext.vlan_tci; 3024 mask.formatted.vlan_id = fsp->m_ext.vlan_tci; 3025 input->filter.formatted.flex_bytes = 3026 fsp->h_ext.vlan_etype; 3027 mask.formatted.flex_bytes = fsp->m_ext.vlan_etype; 3028 } 3029 3030 /* determine if we need to drop or route the packet */ 3031 if (fsp->ring_cookie == RX_CLS_FLOW_DISC) 3032 input->action = IXGBE_FDIR_DROP_QUEUE; 3033 else 3034 input->action = fsp->ring_cookie; 3035 3036 spin_lock(&adapter->fdir_perfect_lock); 3037 3038 if (hlist_empty(&adapter->fdir_filter_list)) { 3039 /* save mask and program input mask into HW */ 3040 memcpy(&adapter->fdir_mask, &mask, sizeof(mask)); 3041 err = ixgbe_fdir_set_input_mask_82599(hw, &mask); 3042 if (err) { 3043 e_err(drv, "Error writing mask\n"); 3044 goto err_out_w_lock; 3045 } 3046 } else if (memcmp(&adapter->fdir_mask, &mask, sizeof(mask))) { 3047 e_err(drv, "Only one mask supported per port\n"); 3048 goto err_out_w_lock; 3049 } 3050 3051 /* apply mask and compute/store hash */ 3052 ixgbe_atr_compute_perfect_hash_82599(&input->filter, &mask); 3053 3054 /* program filters to filter memory */ 3055 err = ixgbe_fdir_write_perfect_filter_82599(hw, 3056 &input->filter, input->sw_idx, queue); 3057 if (err) 3058 goto err_out_w_lock; 3059 3060 ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx); 3061 3062 spin_unlock(&adapter->fdir_perfect_lock); 3063 3064 return err; 3065 err_out_w_lock: 3066 spin_unlock(&adapter->fdir_perfect_lock); 3067 err_out: 3068 kfree(input); 3069 return -EINVAL; 3070 } 3071 3072 static int ixgbe_del_ethtool_fdir_entry(struct ixgbe_adapter *adapter, 3073 struct ethtool_rxnfc *cmd) 3074 { 3075 struct ethtool_rx_flow_spec *fsp = 3076 (struct ethtool_rx_flow_spec *)&cmd->fs; 3077 int err; 3078 3079 spin_lock(&adapter->fdir_perfect_lock); 3080 err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, fsp->location); 3081 spin_unlock(&adapter->fdir_perfect_lock); 3082 3083 return err; 3084 } 3085 3086 #define UDP_RSS_FLAGS (IXGBE_FLAG2_RSS_FIELD_IPV4_UDP | \ 3087 IXGBE_FLAG2_RSS_FIELD_IPV6_UDP) 3088 static int ixgbe_set_rxfh_fields(struct net_device *dev, 3089 const struct ethtool_rxfh_fields *nfc, 3090 struct netlink_ext_ack *extack) 3091 { 3092 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 3093 u32 flags2 = adapter->flags2; 3094 3095 /* 3096 * RSS does not support anything other than hashing 3097 * to queues on src and dst IPs and ports 3098 */ 3099 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST | 3100 RXH_L4_B_0_1 | RXH_L4_B_2_3)) 3101 return -EINVAL; 3102 3103 switch (nfc->flow_type) { 3104 case TCP_V4_FLOW: 3105 case TCP_V6_FLOW: 3106 if (!(nfc->data & RXH_IP_SRC) || 3107 !(nfc->data & RXH_IP_DST) || 3108 !(nfc->data & RXH_L4_B_0_1) || 3109 !(nfc->data & RXH_L4_B_2_3)) 3110 return -EINVAL; 3111 break; 3112 case UDP_V4_FLOW: 3113 if (!(nfc->data & RXH_IP_SRC) || 3114 !(nfc->data & RXH_IP_DST)) 3115 return -EINVAL; 3116 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 3117 case 0: 3118 flags2 &= ~IXGBE_FLAG2_RSS_FIELD_IPV4_UDP; 3119 break; 3120 case (RXH_L4_B_0_1 | RXH_L4_B_2_3): 3121 flags2 |= IXGBE_FLAG2_RSS_FIELD_IPV4_UDP; 3122 break; 3123 default: 3124 return -EINVAL; 3125 } 3126 break; 3127 case UDP_V6_FLOW: 3128 if (!(nfc->data & RXH_IP_SRC) || 3129 !(nfc->data & RXH_IP_DST)) 3130 return -EINVAL; 3131 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) { 3132 case 0: 3133 flags2 &= ~IXGBE_FLAG2_RSS_FIELD_IPV6_UDP; 3134 break; 3135 case (RXH_L4_B_0_1 | RXH_L4_B_2_3): 3136 flags2 |= IXGBE_FLAG2_RSS_FIELD_IPV6_UDP; 3137 break; 3138 default: 3139 return -EINVAL; 3140 } 3141 break; 3142 case AH_ESP_V4_FLOW: 3143 case AH_V4_FLOW: 3144 case ESP_V4_FLOW: 3145 case SCTP_V4_FLOW: 3146 case AH_ESP_V6_FLOW: 3147 case AH_V6_FLOW: 3148 case ESP_V6_FLOW: 3149 case SCTP_V6_FLOW: 3150 if (!(nfc->data & RXH_IP_SRC) || 3151 !(nfc->data & RXH_IP_DST) || 3152 (nfc->data & RXH_L4_B_0_1) || 3153 (nfc->data & RXH_L4_B_2_3)) 3154 return -EINVAL; 3155 break; 3156 default: 3157 return -EINVAL; 3158 } 3159 3160 /* if we changed something we need to update flags */ 3161 if (flags2 != adapter->flags2) { 3162 struct ixgbe_hw *hw = &adapter->hw; 3163 u32 mrqc; 3164 unsigned int pf_pool = adapter->num_vfs; 3165 3166 if ((hw->mac.type >= ixgbe_mac_X550) && 3167 (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) 3168 mrqc = IXGBE_READ_REG(hw, IXGBE_PFVFMRQC(pf_pool)); 3169 else 3170 mrqc = IXGBE_READ_REG(hw, IXGBE_MRQC); 3171 3172 if ((flags2 & UDP_RSS_FLAGS) && 3173 !(adapter->flags2 & UDP_RSS_FLAGS)) 3174 e_warn(drv, "enabling UDP RSS: fragmented packets may arrive out of order to the stack above\n"); 3175 3176 adapter->flags2 = flags2; 3177 3178 /* Perform hash on these packet types */ 3179 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4 3180 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP 3181 | IXGBE_MRQC_RSS_FIELD_IPV6 3182 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP; 3183 3184 mrqc &= ~(IXGBE_MRQC_RSS_FIELD_IPV4_UDP | 3185 IXGBE_MRQC_RSS_FIELD_IPV6_UDP); 3186 3187 if (flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP) 3188 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP; 3189 3190 if (flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP) 3191 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP; 3192 3193 if ((hw->mac.type >= ixgbe_mac_X550) && 3194 (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) 3195 IXGBE_WRITE_REG(hw, IXGBE_PFVFMRQC(pf_pool), mrqc); 3196 else 3197 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc); 3198 } 3199 3200 return 0; 3201 } 3202 3203 static int ixgbe_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd) 3204 { 3205 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 3206 int ret = -EOPNOTSUPP; 3207 3208 switch (cmd->cmd) { 3209 case ETHTOOL_SRXCLSRLINS: 3210 ret = ixgbe_add_ethtool_fdir_entry(adapter, cmd); 3211 break; 3212 case ETHTOOL_SRXCLSRLDEL: 3213 ret = ixgbe_del_ethtool_fdir_entry(adapter, cmd); 3214 break; 3215 default: 3216 break; 3217 } 3218 3219 return ret; 3220 } 3221 3222 static u32 ixgbe_get_rxfh_key_size(struct net_device *netdev) 3223 { 3224 return IXGBE_RSS_KEY_SIZE; 3225 } 3226 3227 static u32 ixgbe_rss_indir_size(struct net_device *netdev) 3228 { 3229 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 3230 3231 return ixgbe_rss_indir_tbl_entries(adapter); 3232 } 3233 3234 static void ixgbe_get_reta(struct ixgbe_adapter *adapter, u32 *indir) 3235 { 3236 int i, reta_size = ixgbe_rss_indir_tbl_entries(adapter); 3237 u16 rss_m = adapter->ring_feature[RING_F_RSS].mask; 3238 3239 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) 3240 rss_m = adapter->ring_feature[RING_F_RSS].indices - 1; 3241 3242 for (i = 0; i < reta_size; i++) 3243 indir[i] = adapter->rss_indir_tbl[i] & rss_m; 3244 } 3245 3246 static int ixgbe_get_rxfh(struct net_device *netdev, 3247 struct ethtool_rxfh_param *rxfh) 3248 { 3249 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 3250 3251 rxfh->hfunc = ETH_RSS_HASH_TOP; 3252 3253 if (rxfh->indir) 3254 ixgbe_get_reta(adapter, rxfh->indir); 3255 3256 if (rxfh->key) 3257 memcpy(rxfh->key, adapter->rss_key, 3258 ixgbe_get_rxfh_key_size(netdev)); 3259 3260 return 0; 3261 } 3262 3263 static int ixgbe_set_rxfh(struct net_device *netdev, 3264 struct ethtool_rxfh_param *rxfh, 3265 struct netlink_ext_ack *extack) 3266 { 3267 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 3268 int i; 3269 u32 reta_entries = ixgbe_rss_indir_tbl_entries(adapter); 3270 3271 if (rxfh->hfunc != ETH_RSS_HASH_NO_CHANGE && 3272 rxfh->hfunc != ETH_RSS_HASH_TOP) 3273 return -EOPNOTSUPP; 3274 3275 /* Fill out the redirection table */ 3276 if (rxfh->indir) { 3277 int max_queues = min_t(int, adapter->num_rx_queues, 3278 ixgbe_rss_indir_tbl_max(adapter)); 3279 3280 /*Allow at least 2 queues w/ SR-IOV.*/ 3281 if ((adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) && 3282 (max_queues < 2)) 3283 max_queues = 2; 3284 3285 /* Verify user input. */ 3286 for (i = 0; i < reta_entries; i++) 3287 if (rxfh->indir[i] >= max_queues) 3288 return -EINVAL; 3289 3290 for (i = 0; i < reta_entries; i++) 3291 adapter->rss_indir_tbl[i] = rxfh->indir[i]; 3292 3293 ixgbe_store_reta(adapter); 3294 } 3295 3296 /* Fill out the rss hash key */ 3297 if (rxfh->key) { 3298 memcpy(adapter->rss_key, rxfh->key, 3299 ixgbe_get_rxfh_key_size(netdev)); 3300 ixgbe_store_key(adapter); 3301 } 3302 3303 return 0; 3304 } 3305 3306 static int ixgbe_get_ts_info(struct net_device *dev, 3307 struct kernel_ethtool_ts_info *info) 3308 { 3309 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 3310 3311 /* we always support timestamping disabled */ 3312 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE); 3313 3314 switch (adapter->hw.mac.type) { 3315 case ixgbe_mac_X550: 3316 case ixgbe_mac_X550EM_x: 3317 case ixgbe_mac_x550em_a: 3318 case ixgbe_mac_e610: 3319 info->rx_filters |= BIT(HWTSTAMP_FILTER_ALL); 3320 break; 3321 case ixgbe_mac_X540: 3322 case ixgbe_mac_82599EB: 3323 info->rx_filters |= 3324 BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) | 3325 BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) | 3326 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT); 3327 break; 3328 default: 3329 return ethtool_op_get_ts_info(dev, info); 3330 } 3331 3332 info->so_timestamping = 3333 SOF_TIMESTAMPING_TX_SOFTWARE | 3334 SOF_TIMESTAMPING_TX_HARDWARE | 3335 SOF_TIMESTAMPING_RX_HARDWARE | 3336 SOF_TIMESTAMPING_RAW_HARDWARE; 3337 3338 if (adapter->ptp_clock) 3339 info->phc_index = ptp_clock_index(adapter->ptp_clock); 3340 3341 info->tx_types = 3342 BIT(HWTSTAMP_TX_OFF) | 3343 BIT(HWTSTAMP_TX_ON); 3344 3345 return 0; 3346 } 3347 3348 static unsigned int ixgbe_max_channels(struct ixgbe_adapter *adapter) 3349 { 3350 unsigned int max_combined; 3351 u8 tcs = adapter->hw_tcs; 3352 3353 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) { 3354 /* We only support one q_vector without MSI-X */ 3355 max_combined = 1; 3356 } else if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) { 3357 /* Limit value based on the queue mask */ 3358 max_combined = adapter->ring_feature[RING_F_RSS].mask + 1; 3359 } else if (tcs > 1) { 3360 /* For DCB report channels per traffic class */ 3361 if (adapter->hw.mac.type == ixgbe_mac_82598EB) { 3362 /* 8 TC w/ 4 queues per TC */ 3363 max_combined = 4; 3364 } else if (tcs > 4) { 3365 /* 8 TC w/ 8 queues per TC */ 3366 max_combined = 8; 3367 } else { 3368 /* 4 TC w/ 16 queues per TC */ 3369 max_combined = 16; 3370 } 3371 } else if (adapter->atr_sample_rate) { 3372 /* support up to 64 queues with ATR */ 3373 max_combined = IXGBE_MAX_FDIR_INDICES; 3374 } else { 3375 /* support up to 16 queues with RSS */ 3376 max_combined = ixgbe_max_rss_indices(adapter); 3377 } 3378 3379 return min_t(int, max_combined, num_online_cpus()); 3380 } 3381 3382 static void ixgbe_get_channels(struct net_device *dev, 3383 struct ethtool_channels *ch) 3384 { 3385 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 3386 3387 /* report maximum channels */ 3388 ch->max_combined = ixgbe_max_channels(adapter); 3389 3390 /* report info for other vector */ 3391 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) { 3392 ch->max_other = NON_Q_VECTORS; 3393 ch->other_count = NON_Q_VECTORS; 3394 } 3395 3396 /* record RSS queues */ 3397 ch->combined_count = adapter->ring_feature[RING_F_RSS].indices; 3398 3399 /* nothing else to report if RSS is disabled */ 3400 if (ch->combined_count == 1) 3401 return; 3402 3403 /* we do not support ATR queueing if SR-IOV is enabled */ 3404 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) 3405 return; 3406 3407 /* same thing goes for being DCB enabled */ 3408 if (adapter->hw_tcs > 1) 3409 return; 3410 3411 /* if ATR is disabled we can exit */ 3412 if (!adapter->atr_sample_rate) 3413 return; 3414 3415 /* report flow director queues as maximum channels */ 3416 ch->combined_count = adapter->ring_feature[RING_F_FDIR].indices; 3417 } 3418 3419 static int ixgbe_set_channels(struct net_device *dev, 3420 struct ethtool_channels *ch) 3421 { 3422 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 3423 unsigned int count = ch->combined_count; 3424 u8 max_rss_indices = ixgbe_max_rss_indices(adapter); 3425 3426 /* verify they are not requesting separate vectors */ 3427 if (!count || ch->rx_count || ch->tx_count) 3428 return -EINVAL; 3429 3430 /* verify other_count has not changed */ 3431 if (ch->other_count != NON_Q_VECTORS) 3432 return -EINVAL; 3433 3434 /* verify the number of channels does not exceed hardware limits */ 3435 if (count > ixgbe_max_channels(adapter)) 3436 return -EINVAL; 3437 3438 /* update feature limits from largest to smallest supported values */ 3439 adapter->ring_feature[RING_F_FDIR].limit = count; 3440 3441 /* cap RSS limit */ 3442 if (count > max_rss_indices) 3443 count = max_rss_indices; 3444 adapter->ring_feature[RING_F_RSS].limit = count; 3445 3446 #ifdef IXGBE_FCOE 3447 /* cap FCoE limit at 8 */ 3448 if (count > IXGBE_FCRETA_SIZE) 3449 count = IXGBE_FCRETA_SIZE; 3450 adapter->ring_feature[RING_F_FCOE].limit = count; 3451 3452 #endif 3453 /* use setup TC to update any traffic class queue mapping */ 3454 return ixgbe_setup_tc(dev, adapter->hw_tcs); 3455 } 3456 3457 static int ixgbe_get_module_info(struct net_device *dev, 3458 struct ethtool_modinfo *modinfo) 3459 { 3460 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 3461 struct ixgbe_hw *hw = &adapter->hw; 3462 u8 sff8472_rev, addr_mode; 3463 bool page_swap = false; 3464 int status; 3465 3466 if (hw->phy.type == ixgbe_phy_fw) 3467 return -ENXIO; 3468 3469 /* Check whether we support SFF-8472 or not */ 3470 status = hw->phy.ops.read_i2c_eeprom(hw, 3471 IXGBE_SFF_SFF_8472_COMP, 3472 &sff8472_rev); 3473 if (status) 3474 return -EIO; 3475 3476 /* addressing mode is not supported */ 3477 status = hw->phy.ops.read_i2c_eeprom(hw, 3478 IXGBE_SFF_SFF_8472_SWAP, 3479 &addr_mode); 3480 if (status) 3481 return -EIO; 3482 3483 if (addr_mode & IXGBE_SFF_ADDRESSING_MODE) { 3484 e_err(drv, "Address change required to access page 0xA2, but not supported. Please report the module type to the driver maintainers.\n"); 3485 page_swap = true; 3486 } 3487 3488 if (sff8472_rev == IXGBE_SFF_SFF_8472_UNSUP || page_swap || 3489 !(addr_mode & IXGBE_SFF_DDM_IMPLEMENTED)) { 3490 /* We have a SFP, but it does not support SFF-8472 */ 3491 modinfo->type = ETH_MODULE_SFF_8079; 3492 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN; 3493 } else { 3494 /* We have a SFP which supports a revision of SFF-8472. */ 3495 modinfo->type = ETH_MODULE_SFF_8472; 3496 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN; 3497 } 3498 3499 return 0; 3500 } 3501 3502 static int ixgbe_get_module_eeprom(struct net_device *dev, 3503 struct ethtool_eeprom *ee, 3504 u8 *data) 3505 { 3506 struct ixgbe_adapter *adapter = ixgbe_from_netdev(dev); 3507 struct ixgbe_hw *hw = &adapter->hw; 3508 int status = -EFAULT; 3509 u8 databyte = 0xFF; 3510 int i = 0; 3511 3512 if (ee->len == 0) 3513 return -EINVAL; 3514 3515 if (hw->phy.type == ixgbe_phy_fw) 3516 return -ENXIO; 3517 3518 for (i = ee->offset; i < ee->offset + ee->len; i++) { 3519 /* I2C reads can take long time */ 3520 if (test_bit(__IXGBE_IN_SFP_INIT, &adapter->state)) 3521 return -EBUSY; 3522 3523 if (i < ETH_MODULE_SFF_8079_LEN) 3524 status = hw->phy.ops.read_i2c_eeprom(hw, i, &databyte); 3525 else 3526 status = hw->phy.ops.read_i2c_sff8472(hw, i, &databyte); 3527 3528 if (status) 3529 return -EIO; 3530 3531 data[i - ee->offset] = databyte; 3532 } 3533 3534 return 0; 3535 } 3536 3537 static const struct { 3538 ixgbe_link_speed mac_speed; 3539 u32 link_mode; 3540 } ixgbe_ls_map[] = { 3541 { IXGBE_LINK_SPEED_10_FULL, ETHTOOL_LINK_MODE_10baseT_Full_BIT }, 3542 { IXGBE_LINK_SPEED_100_FULL, ETHTOOL_LINK_MODE_100baseT_Full_BIT }, 3543 { IXGBE_LINK_SPEED_1GB_FULL, ETHTOOL_LINK_MODE_1000baseT_Full_BIT }, 3544 { IXGBE_LINK_SPEED_2_5GB_FULL, ETHTOOL_LINK_MODE_2500baseT_Full_BIT }, 3545 { IXGBE_LINK_SPEED_5GB_FULL, ETHTOOL_LINK_MODE_5000baseT_Full_BIT }, 3546 { IXGBE_LINK_SPEED_10GB_FULL, ETHTOOL_LINK_MODE_10000baseT_Full_BIT }, 3547 }; 3548 3549 static const struct { 3550 u32 lp_advertised; 3551 u32 link_mode; 3552 } ixgbe_lp_map[] = { 3553 { FW_PHY_ACT_UD_2_100M_TX_EEE, ETHTOOL_LINK_MODE_100baseT_Full_BIT }, 3554 { FW_PHY_ACT_UD_2_1G_T_EEE, ETHTOOL_LINK_MODE_1000baseT_Full_BIT }, 3555 { FW_PHY_ACT_UD_2_10G_T_EEE, ETHTOOL_LINK_MODE_10000baseT_Full_BIT }, 3556 { FW_PHY_ACT_UD_2_1G_KX_EEE, ETHTOOL_LINK_MODE_1000baseKX_Full_BIT }, 3557 { FW_PHY_ACT_UD_2_10G_KX4_EEE, ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT }, 3558 { FW_PHY_ACT_UD_2_10G_KR_EEE, ETHTOOL_LINK_MODE_10000baseKR_Full_BIT}, 3559 }; 3560 3561 static int ixgbe_validate_keee(struct net_device *netdev, 3562 struct ethtool_keee *keee_requested) 3563 { 3564 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 3565 struct ethtool_keee keee_stored = {}; 3566 int err; 3567 3568 if (!(adapter->flags2 & IXGBE_FLAG2_EEE_CAPABLE)) 3569 return -EOPNOTSUPP; 3570 3571 err = netdev->ethtool_ops->get_eee(netdev, &keee_stored); 3572 if (err) 3573 return err; 3574 3575 if (keee_stored.tx_lpi_enabled != keee_requested->tx_lpi_enabled) { 3576 e_err(drv, "Setting EEE tx-lpi is not supported\n"); 3577 return -EINVAL; 3578 } 3579 3580 if (keee_stored.tx_lpi_timer != keee_requested->tx_lpi_timer) { 3581 e_err(drv, 3582 "Setting EEE Tx LPI timer is not supported\n"); 3583 return -EINVAL; 3584 } 3585 3586 if (!linkmode_equal(keee_stored.advertised, 3587 keee_requested->advertised)) { 3588 e_err(drv, 3589 "Setting EEE advertised speeds is not supported\n"); 3590 return -EINVAL; 3591 } 3592 3593 /* -EALREADY here is for internal use only, must be converted into 3594 * early bail out with 0 by caller 3595 */ 3596 if (keee_stored.eee_enabled == keee_requested->eee_enabled) 3597 return -EALREADY; 3598 3599 return 0; 3600 } 3601 3602 /** 3603 * ixgbe_is_eee_link_speed_supported_e610 - Check if EEE can be enabled 3604 * @adapter: pointer to the adapter struct 3605 * 3606 * Check whether current link configuration is capable of enabling EEE feature. 3607 * 3608 * E610 specific function - for other adapters supporting EEE there might be 3609 * no such limitation. 3610 * 3611 * Return: true if EEE can be enabled, false otherwise. 3612 */ 3613 static bool 3614 ixgbe_is_eee_link_speed_supported_e610(struct ixgbe_adapter *adapter) 3615 { 3616 switch (adapter->link_speed) { 3617 case IXGBE_LINK_SPEED_10GB_FULL: 3618 case IXGBE_LINK_SPEED_2_5GB_FULL: 3619 case IXGBE_LINK_SPEED_5GB_FULL: 3620 return true; 3621 case IXGBE_LINK_SPEED_100_FULL: 3622 case IXGBE_LINK_SPEED_1GB_FULL: 3623 e_dev_info("Energy Efficient Ethernet (EEE) feature is not supported on link speeds equal to or below 1Gbps. EEE is supported on speeds above 1Gbps.\n"); 3624 fallthrough; 3625 default: 3626 return false; 3627 } 3628 } 3629 3630 static int ixgbe_get_eee_e610(struct net_device *netdev, 3631 struct ethtool_keee *kedata) 3632 { 3633 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 3634 struct ixgbe_aci_cmd_get_phy_caps_data pcaps; 3635 struct ixgbe_hw *hw = &adapter->hw; 3636 struct ixgbe_link_status link; 3637 int err; 3638 3639 linkmode_zero(kedata->lp_advertised); 3640 linkmode_zero(kedata->supported); 3641 linkmode_zero(kedata->advertised); 3642 3643 err = ixgbe_aci_get_link_info(hw, true, &link); 3644 if (err) 3645 return err; 3646 3647 err = ixgbe_aci_get_phy_caps(hw, false, IXGBE_ACI_REPORT_ACTIVE_CFG, 3648 &pcaps); 3649 if (err) 3650 return err; 3651 3652 kedata->eee_active = link.eee_status & IXGBE_ACI_LINK_EEE_ACTIVE; 3653 kedata->eee_enabled = link.eee_status & IXGBE_ACI_LINK_EEE_ENABLED; 3654 3655 /* for E610 devices EEE enablement implies TX LPI enablement */ 3656 kedata->tx_lpi_enabled = kedata->eee_enabled; 3657 3658 if (kedata->eee_enabled) 3659 kedata->tx_lpi_timer = le16_to_cpu(pcaps.eee_entry_delay); 3660 3661 for (int i = 0; i < ARRAY_SIZE(ixgbe_ls_map); i++) { 3662 if (hw->phy.eee_speeds_supported & 3663 ixgbe_ls_map[i].mac_speed) 3664 linkmode_set_bit(ixgbe_ls_map[i].link_mode, 3665 kedata->supported); 3666 3667 if (hw->phy.eee_speeds_advertised & 3668 ixgbe_ls_map[i].mac_speed) 3669 linkmode_set_bit(ixgbe_ls_map[i].link_mode, 3670 kedata->advertised); 3671 } 3672 3673 return 0; 3674 } 3675 3676 static int ixgbe_set_eee_e610(struct net_device *netdev, 3677 struct ethtool_keee *kedata) 3678 { 3679 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 3680 struct ixgbe_hw *hw = &adapter->hw; 3681 int err; 3682 3683 err = ixgbe_validate_keee(netdev, kedata); 3684 3685 if (err == -EALREADY) { 3686 return 0; 3687 } else if (err) { 3688 if (err == -EOPNOTSUPP) 3689 e_dev_info("Energy Efficient Ethernet (EEE) feature is currently not supported on this device, please update the device NVM to the latest and try again\n"); 3690 return err; 3691 } 3692 3693 if (!(ixgbe_is_eee_link_speed_supported_e610(adapter)) && 3694 kedata->eee_enabled) 3695 return -EOPNOTSUPP; 3696 3697 hw->phy.eee_speeds_advertised = kedata->eee_enabled ? 3698 hw->phy.eee_speeds_supported : 0; 3699 3700 err = hw->mac.ops.setup_eee(hw, kedata->eee_enabled); 3701 if (err) { 3702 e_dev_err("Setting EEE %s failed.\n", 3703 str_on_off(kedata->eee_enabled)); 3704 return err; 3705 } 3706 3707 if (kedata->eee_enabled) 3708 adapter->flags2 |= IXGBE_FLAG2_EEE_ENABLED; 3709 else 3710 adapter->flags2 &= ~IXGBE_FLAG2_EEE_ENABLED; 3711 3712 if (netif_running(netdev)) 3713 ixgbe_reinit_locked(adapter); 3714 else 3715 ixgbe_reset(adapter); 3716 3717 return 0; 3718 } 3719 3720 static int 3721 ixgbe_get_eee_fw(struct ixgbe_adapter *adapter, struct ethtool_keee *edata) 3722 { 3723 __ETHTOOL_DECLARE_LINK_MODE_MASK(common); 3724 u32 info[FW_PHY_ACT_DATA_COUNT] = { 0 }; 3725 struct ixgbe_hw *hw = &adapter->hw; 3726 int rc; 3727 u16 i; 3728 3729 rc = ixgbe_fw_phy_activity(hw, FW_PHY_ACT_UD_2, &info); 3730 if (rc) 3731 return rc; 3732 3733 for (i = 0; i < ARRAY_SIZE(ixgbe_lp_map); ++i) { 3734 if (info[0] & ixgbe_lp_map[i].lp_advertised) 3735 linkmode_set_bit(ixgbe_lp_map[i].link_mode, 3736 edata->lp_advertised); 3737 } 3738 3739 for (i = 0; i < ARRAY_SIZE(ixgbe_ls_map); ++i) { 3740 if (hw->phy.eee_speeds_supported & ixgbe_ls_map[i].mac_speed) 3741 linkmode_set_bit(ixgbe_ls_map[i].link_mode, 3742 edata->supported); 3743 } 3744 3745 for (i = 0; i < ARRAY_SIZE(ixgbe_ls_map); ++i) { 3746 if (hw->phy.eee_speeds_advertised & ixgbe_ls_map[i].mac_speed) 3747 linkmode_set_bit(ixgbe_ls_map[i].link_mode, 3748 edata->advertised); 3749 } 3750 3751 edata->eee_enabled = !linkmode_empty(edata->advertised); 3752 edata->tx_lpi_enabled = edata->eee_enabled; 3753 3754 linkmode_and(common, edata->advertised, edata->lp_advertised); 3755 edata->eee_active = !linkmode_empty(common); 3756 3757 return 0; 3758 } 3759 3760 static int ixgbe_get_eee(struct net_device *netdev, struct ethtool_keee *edata) 3761 { 3762 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 3763 struct ixgbe_hw *hw = &adapter->hw; 3764 3765 if (!(adapter->flags2 & IXGBE_FLAG2_EEE_CAPABLE)) 3766 return -EOPNOTSUPP; 3767 3768 if (hw->phy.eee_speeds_supported && hw->phy.type == ixgbe_phy_fw) 3769 return ixgbe_get_eee_fw(adapter, edata); 3770 3771 return -EOPNOTSUPP; 3772 } 3773 3774 static int ixgbe_set_eee(struct net_device *netdev, struct ethtool_keee *edata) 3775 { 3776 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 3777 struct ixgbe_hw *hw = &adapter->hw; 3778 int ret_val; 3779 3780 ret_val = ixgbe_validate_keee(netdev, edata); 3781 if (ret_val == -EALREADY) 3782 return 0; 3783 else if (ret_val) 3784 return ret_val; 3785 3786 if (edata->eee_enabled) { 3787 adapter->flags2 |= IXGBE_FLAG2_EEE_ENABLED; 3788 hw->phy.eee_speeds_advertised = 3789 hw->phy.eee_speeds_supported; 3790 } else { 3791 adapter->flags2 &= ~IXGBE_FLAG2_EEE_ENABLED; 3792 hw->phy.eee_speeds_advertised = 0; 3793 } 3794 3795 /* reset link */ 3796 if (netif_running(netdev)) 3797 ixgbe_reinit_locked(adapter); 3798 else 3799 ixgbe_reset(adapter); 3800 3801 return 0; 3802 } 3803 3804 static u32 ixgbe_get_priv_flags(struct net_device *netdev) 3805 { 3806 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 3807 u32 priv_flags = 0; 3808 3809 if (adapter->flags2 & IXGBE_FLAG2_RX_LEGACY) 3810 priv_flags |= IXGBE_PRIV_FLAGS_LEGACY_RX; 3811 3812 if (adapter->flags2 & IXGBE_FLAG2_VF_IPSEC_ENABLED) 3813 priv_flags |= IXGBE_PRIV_FLAGS_VF_IPSEC_EN; 3814 3815 if (adapter->flags2 & IXGBE_FLAG2_AUTO_DISABLE_VF) 3816 priv_flags |= IXGBE_PRIV_FLAGS_AUTO_DISABLE_VF; 3817 3818 return priv_flags; 3819 } 3820 3821 static int ixgbe_set_priv_flags(struct net_device *netdev, u32 priv_flags) 3822 { 3823 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 3824 unsigned int flags2 = adapter->flags2; 3825 unsigned int i; 3826 3827 flags2 &= ~IXGBE_FLAG2_RX_LEGACY; 3828 if (priv_flags & IXGBE_PRIV_FLAGS_LEGACY_RX) 3829 flags2 |= IXGBE_FLAG2_RX_LEGACY; 3830 3831 flags2 &= ~IXGBE_FLAG2_VF_IPSEC_ENABLED; 3832 if (priv_flags & IXGBE_PRIV_FLAGS_VF_IPSEC_EN) 3833 flags2 |= IXGBE_FLAG2_VF_IPSEC_ENABLED; 3834 3835 flags2 &= ~IXGBE_FLAG2_AUTO_DISABLE_VF; 3836 if (priv_flags & IXGBE_PRIV_FLAGS_AUTO_DISABLE_VF) { 3837 if (adapter->hw.mac.type == ixgbe_mac_82599EB) { 3838 /* Reset primary abort counter */ 3839 for (i = 0; i < adapter->num_vfs; i++) 3840 adapter->vfinfo[i].primary_abort_count = 0; 3841 3842 flags2 |= IXGBE_FLAG2_AUTO_DISABLE_VF; 3843 } else { 3844 e_info(probe, 3845 "Cannot set private flags: Operation not supported\n"); 3846 return -EOPNOTSUPP; 3847 } 3848 } 3849 3850 if (flags2 != adapter->flags2) { 3851 adapter->flags2 = flags2; 3852 3853 /* reset interface to repopulate queues */ 3854 if (netif_running(netdev)) 3855 ixgbe_reinit_locked(adapter); 3856 } 3857 3858 return 0; 3859 } 3860 3861 static const struct ethtool_ops ixgbe_ethtool_ops = { 3862 .supported_coalesce_params = ETHTOOL_COALESCE_USECS, 3863 .get_drvinfo = ixgbe_get_drvinfo, 3864 .get_regs_len = ixgbe_get_regs_len, 3865 .get_regs = ixgbe_get_regs, 3866 .get_wol = ixgbe_get_wol, 3867 .set_wol = ixgbe_set_wol, 3868 .nway_reset = ixgbe_nway_reset, 3869 .get_link = ethtool_op_get_link, 3870 .get_link_ext_stats = ixgbe_get_link_ext_stats, 3871 .get_eeprom_len = ixgbe_get_eeprom_len, 3872 .get_eeprom = ixgbe_get_eeprom, 3873 .set_eeprom = ixgbe_set_eeprom, 3874 .get_ringparam = ixgbe_get_ringparam, 3875 .set_ringparam = ixgbe_set_ringparam, 3876 .get_pause_stats = ixgbe_get_pause_stats, 3877 .get_pauseparam = ixgbe_get_pauseparam, 3878 .set_pauseparam = ixgbe_set_pauseparam, 3879 .get_msglevel = ixgbe_get_msglevel, 3880 .set_msglevel = ixgbe_set_msglevel, 3881 .self_test = ixgbe_diag_test, 3882 .get_strings = ixgbe_get_strings, 3883 .set_phys_id = ixgbe_set_phys_id, 3884 .get_sset_count = ixgbe_get_sset_count, 3885 .get_ethtool_stats = ixgbe_get_ethtool_stats, 3886 .get_coalesce = ixgbe_get_coalesce, 3887 .set_coalesce = ixgbe_set_coalesce, 3888 .get_rx_ring_count = ixgbe_get_rx_ring_count, 3889 .get_rxnfc = ixgbe_get_rxnfc, 3890 .set_rxnfc = ixgbe_set_rxnfc, 3891 .get_rxfh_indir_size = ixgbe_rss_indir_size, 3892 .get_rxfh_key_size = ixgbe_get_rxfh_key_size, 3893 .get_rxfh = ixgbe_get_rxfh, 3894 .set_rxfh = ixgbe_set_rxfh, 3895 .get_rxfh_fields = ixgbe_get_rxfh_fields, 3896 .set_rxfh_fields = ixgbe_set_rxfh_fields, 3897 .get_eee = ixgbe_get_eee, 3898 .set_eee = ixgbe_set_eee, 3899 .get_channels = ixgbe_get_channels, 3900 .set_channels = ixgbe_set_channels, 3901 .get_priv_flags = ixgbe_get_priv_flags, 3902 .set_priv_flags = ixgbe_set_priv_flags, 3903 .get_ts_info = ixgbe_get_ts_info, 3904 .get_module_info = ixgbe_get_module_info, 3905 .get_module_eeprom = ixgbe_get_module_eeprom, 3906 .get_link_ksettings = ixgbe_get_link_ksettings, 3907 .set_link_ksettings = ixgbe_set_link_ksettings, 3908 }; 3909 3910 static const struct ethtool_ops ixgbe_ethtool_ops_e610 = { 3911 .supported_coalesce_params = ETHTOOL_COALESCE_USECS, 3912 .get_drvinfo = ixgbe_get_drvinfo, 3913 .get_regs_len = ixgbe_get_regs_len, 3914 .get_regs = ixgbe_get_regs, 3915 .get_wol = ixgbe_get_wol, 3916 .set_wol = ixgbe_set_wol_e610, 3917 .nway_reset = ixgbe_nway_reset, 3918 .get_link = ethtool_op_get_link, 3919 .get_link_ext_stats = ixgbe_get_link_ext_stats, 3920 .get_eeprom_len = ixgbe_get_eeprom_len, 3921 .get_eeprom = ixgbe_get_eeprom, 3922 .set_eeprom = ixgbe_set_eeprom, 3923 .get_ringparam = ixgbe_get_ringparam, 3924 .set_ringparam = ixgbe_set_ringparam, 3925 .get_pause_stats = ixgbe_get_pause_stats, 3926 .get_pauseparam = ixgbe_get_pauseparam, 3927 .set_pauseparam = ixgbe_set_pauseparam_e610, 3928 .get_msglevel = ixgbe_get_msglevel, 3929 .set_msglevel = ixgbe_set_msglevel, 3930 .self_test = ixgbe_diag_test, 3931 .get_strings = ixgbe_get_strings, 3932 .set_phys_id = ixgbe_set_phys_id_e610, 3933 .get_sset_count = ixgbe_get_sset_count, 3934 .get_ethtool_stats = ixgbe_get_ethtool_stats, 3935 .get_coalesce = ixgbe_get_coalesce, 3936 .set_coalesce = ixgbe_set_coalesce, 3937 .get_rx_ring_count = ixgbe_get_rx_ring_count, 3938 .get_rxnfc = ixgbe_get_rxnfc, 3939 .set_rxnfc = ixgbe_set_rxnfc, 3940 .get_rxfh_indir_size = ixgbe_rss_indir_size, 3941 .get_rxfh_key_size = ixgbe_get_rxfh_key_size, 3942 .get_rxfh = ixgbe_get_rxfh, 3943 .set_rxfh = ixgbe_set_rxfh, 3944 .get_rxfh_fields = ixgbe_get_rxfh_fields, 3945 .set_rxfh_fields = ixgbe_set_rxfh_fields, 3946 .get_eee = ixgbe_get_eee_e610, 3947 .set_eee = ixgbe_set_eee_e610, 3948 .get_channels = ixgbe_get_channels, 3949 .set_channels = ixgbe_set_channels, 3950 .get_priv_flags = ixgbe_get_priv_flags, 3951 .set_priv_flags = ixgbe_set_priv_flags, 3952 .get_ts_info = ixgbe_get_ts_info, 3953 .get_module_info = ixgbe_get_module_info, 3954 .get_module_eeprom = ixgbe_get_module_eeprom, 3955 .get_link_ksettings = ixgbe_get_link_ksettings, 3956 .set_link_ksettings = ixgbe_set_link_ksettings, 3957 }; 3958 3959 void ixgbe_set_ethtool_ops(struct net_device *netdev) 3960 { 3961 struct ixgbe_adapter *adapter = ixgbe_from_netdev(netdev); 3962 3963 if (adapter->hw.mac.type == ixgbe_mac_e610) 3964 netdev->ethtool_ops = &ixgbe_ethtool_ops_e610; 3965 else 3966 netdev->ethtool_ops = &ixgbe_ethtool_ops; 3967 } 3968