xref: /linux/drivers/net/ethernet/freescale/enetc/enetc.h (revision 6bdc3144c0dc737915450c0cd9641ac64c53d714)
1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
2 /* Copyright 2017-2019 NXP */
3 
4 #include <linux/timer.h>
5 #include <linux/pci.h>
6 #include <linux/netdevice.h>
7 #include <linux/etherdevice.h>
8 #include <linux/dma-mapping.h>
9 #include <linux/skbuff.h>
10 #include <linux/ethtool.h>
11 #include <linux/fsl/ntmp.h>
12 #include <linux/if_vlan.h>
13 #include <linux/phylink.h>
14 #include <linux/dim.h>
15 #include <net/xdp.h>
16 
17 #include "enetc_hw.h"
18 #include "enetc4_hw.h"
19 #include "enetc_mailbox.h"
20 
21 #define ENETC_MAC_MAXFRM_SIZE	9600
22 #define ENETC_MAX_MTU		(ENETC_MAC_MAXFRM_SIZE - \
23 				(ETH_FCS_LEN + ETH_HLEN + VLAN_HLEN))
24 
25 #define ENETC_CBD_DATA_MEM_ALIGN 64
26 
27 #define ENETC_MADDR_HASH_TBL_SZ	64
28 
29 enum enetc_mac_addr_type {UC, MC, MADDR_TYPE};
30 
31 struct enetc_mac_filter {
32 	union {
33 		char mac_addr[ETH_ALEN];
34 		DECLARE_BITMAP(mac_hash_table, ENETC_MADDR_HASH_TBL_SZ);
35 	};
36 	int mac_addr_cnt;
37 };
38 
39 struct enetc_tx_swbd {
40 	union {
41 		struct sk_buff *skb;
42 		struct xdp_frame *xdp_frame;
43 	};
44 	dma_addr_t dma;
45 	struct page *page;	/* valid only if is_xdp_tx */
46 	u16 page_offset;	/* valid only if is_xdp_tx */
47 	u16 len;
48 	enum dma_data_direction dir;
49 	u8 is_dma_page:1;
50 	u8 check_wb:1;
51 	u8 do_twostep_tstamp:1;
52 	u8 is_eof:1;
53 	u8 is_xdp_tx:1;
54 	u8 is_xdp_redirect:1;
55 	u8 qbv_en:1;
56 };
57 
58 struct enetc_skb_cb {
59 	u8 flag;
60 	bool udp;
61 	u16 correction_off;
62 	u16 origin_tstamp_off;
63 };
64 
65 #define ENETC_SKB_CB(skb) ((struct enetc_skb_cb *)((skb)->cb))
66 
67 struct enetc_lso_t {
68 	bool	ipv6;
69 	bool	tcp;
70 	u8	l3_hdr_len;
71 	u8	hdr_len; /* LSO header length */
72 	u8	l3_start;
73 	u16	lso_seg_size;
74 	int	total_len; /* total data length, not include LSO header */
75 };
76 
77 #define ENETC_LSO_MAX_DATA_LEN		SZ_256K
78 
79 #define ENETC_RX_MAXFRM_SIZE	ENETC_MAC_MAXFRM_SIZE
80 #define ENETC_RXB_TRUESIZE	(PAGE_SIZE >> 1)
81 #define ENETC_RXB_PAD		NET_SKB_PAD /* add extra space if needed */
82 #define ENETC_RXB_DMA_SIZE	\
83 	min(SKB_WITH_OVERHEAD(ENETC_RXB_TRUESIZE) - ENETC_RXB_PAD, 0xffff)
84 #define ENETC_RXB_DMA_SIZE_XDP	\
85 	min(SKB_WITH_OVERHEAD(ENETC_RXB_TRUESIZE) - XDP_PACKET_HEADROOM, 0xffff)
86 
87 struct enetc_rx_swbd {
88 	dma_addr_t dma;
89 	struct page *page;
90 	u16 page_offset;
91 	enum dma_data_direction dir;
92 	u16 len;
93 };
94 
95 /* ENETC overhead: optional extension BD + 1 BD gap */
96 #define ENETC_TXBDS_NEEDED(val)	((val) + 2)
97 /* For LS1028A, max # of chained Tx BDs is 15, including head and
98  * extension BD.
99  */
100 #define ENETC_MAX_SKB_FRAGS	13
101 /* For ENETC v4 and later versions, max # of chained Tx BDs is 63,
102  * including head and extension BD, but the range of MAX_SKB_FRAGS
103  * is 17 ~ 45, so set ENETC4_MAX_SKB_FRAGS to MAX_SKB_FRAGS.
104  */
105 #define ENETC4_MAX_SKB_FRAGS		MAX_SKB_FRAGS
106 #define ENETC_TXBDS_MAX_NEEDED(x)	ENETC_TXBDS_NEEDED((x) + 1)
107 
108 struct enetc_ring_stats {
109 	unsigned long packets;
110 	unsigned long bytes;
111 	unsigned long rx_alloc_errs;
112 	unsigned long xdp_drops;
113 	unsigned long xdp_tx;
114 	unsigned long xdp_tx_drops;
115 	unsigned long xdp_redirect;
116 	unsigned long xdp_redirect_failures;
117 	unsigned long recycles;
118 	unsigned long recycle_failures;
119 	unsigned long win_drop;
120 };
121 
122 struct enetc_xdp_data {
123 	struct xdp_rxq_info rxq;
124 	struct bpf_prog *prog;
125 	int xdp_tx_in_flight;
126 };
127 
128 #define ENETC_RX_RING_DEFAULT_SIZE	2048
129 #define ENETC_TX_RING_DEFAULT_SIZE	2048
130 #define ENETC_DEFAULT_TX_WORK		(ENETC_TX_RING_DEFAULT_SIZE / 2)
131 
132 struct enetc_bdr_resource {
133 	/* Input arguments saved for teardown */
134 	struct device *dev; /* for DMA mapping */
135 	size_t bd_count;
136 	size_t bd_size;
137 
138 	/* Resource proper */
139 	void *bd_base; /* points to Rx or Tx BD ring */
140 	dma_addr_t bd_dma_base;
141 	union {
142 		struct enetc_tx_swbd *tx_swbd;
143 		struct enetc_rx_swbd *rx_swbd;
144 	};
145 	char *tso_headers;
146 	dma_addr_t tso_headers_dma;
147 };
148 
149 struct enetc_bdr {
150 	struct device *dev; /* for DMA mapping */
151 	struct net_device *ndev;
152 	void *bd_base; /* points to Rx or Tx BD ring */
153 	union {
154 		void __iomem *tpir;
155 		void __iomem *rcir;
156 	};
157 	u16 index;
158 	u16 prio;
159 	int bd_count; /* # of BDs */
160 	int next_to_use;
161 	int next_to_clean;
162 	union {
163 		struct enetc_tx_swbd *tx_swbd;
164 		struct enetc_rx_swbd *rx_swbd;
165 	};
166 	union {
167 		void __iomem *tcir; /* Tx */
168 		int next_to_alloc; /* Rx */
169 	};
170 	void __iomem *idr; /* Interrupt Detect Register pointer */
171 
172 	int buffer_offset;
173 	struct enetc_xdp_data xdp;
174 
175 	struct enetc_ring_stats stats;
176 
177 	dma_addr_t bd_dma_base;
178 	u8 tsd_enable; /* Time specific departure */
179 	bool ext_en; /* enable h/w descriptor extensions */
180 
181 	/* DMA buffer for TSO headers */
182 	char *tso_headers;
183 	dma_addr_t tso_headers_dma;
184 } ____cacheline_aligned_in_smp;
185 
186 static inline void enetc_bdr_idx_inc(struct enetc_bdr *bdr, int *i)
187 {
188 	if (unlikely(++*i == bdr->bd_count))
189 		*i = 0;
190 }
191 
192 static inline int enetc_bd_unused(struct enetc_bdr *bdr)
193 {
194 	if (bdr->next_to_clean > bdr->next_to_use)
195 		return bdr->next_to_clean - bdr->next_to_use - 1;
196 
197 	return bdr->bd_count + bdr->next_to_clean - bdr->next_to_use - 1;
198 }
199 
200 static inline int enetc_swbd_unused(struct enetc_bdr *bdr)
201 {
202 	if (bdr->next_to_clean > bdr->next_to_alloc)
203 		return bdr->next_to_clean - bdr->next_to_alloc - 1;
204 
205 	return bdr->bd_count + bdr->next_to_clean - bdr->next_to_alloc - 1;
206 }
207 
208 /* Control BD ring */
209 #define ENETC_CBDR_DEFAULT_SIZE	64
210 struct enetc_cbdr {
211 	void *bd_base; /* points to Rx or Tx BD ring */
212 	void __iomem *pir;
213 	void __iomem *cir;
214 	void __iomem *mr; /* mode register */
215 
216 	int bd_count; /* # of BDs */
217 	int next_to_use;
218 	int next_to_clean;
219 
220 	dma_addr_t bd_dma_base;
221 	struct device *dma_dev;
222 };
223 
224 #define ENETC_TXBD(BDR, i) (&(((union enetc_tx_bd *)((BDR).bd_base))[i]))
225 
226 static inline union enetc_rx_bd *enetc_rxbd(struct enetc_bdr *rx_ring, int i)
227 {
228 	int hw_idx = i;
229 
230 	if (rx_ring->ext_en)
231 		hw_idx = 2 * i;
232 
233 	return &(((union enetc_rx_bd *)rx_ring->bd_base)[hw_idx]);
234 }
235 
236 static inline void enetc_rxbd_next(struct enetc_bdr *rx_ring,
237 				   union enetc_rx_bd **old_rxbd, int *old_index)
238 {
239 	union enetc_rx_bd *new_rxbd = *old_rxbd;
240 	int new_index = *old_index;
241 
242 	new_rxbd++;
243 
244 	if (rx_ring->ext_en)
245 		new_rxbd++;
246 
247 	if (unlikely(++new_index == rx_ring->bd_count)) {
248 		new_rxbd = rx_ring->bd_base;
249 		new_index = 0;
250 	}
251 
252 	*old_rxbd = new_rxbd;
253 	*old_index = new_index;
254 }
255 
256 static inline union enetc_rx_bd *enetc_rxbd_ext(union enetc_rx_bd *rxbd)
257 {
258 	return ++rxbd;
259 }
260 
261 #define ENETC_REV1	0x1
262 #define ENETC_REV4	0x4
263 
264 enum enetc_errata {
265 	ENETC_ERR_VLAN_ISOL	= BIT(0),
266 	ENETC_ERR_UCMCSWP	= BIT(1),
267 };
268 
269 #define ENETC_SI_F_PSFP BIT(0)
270 #define ENETC_SI_F_QBV  BIT(1)
271 #define ENETC_SI_F_QBU  BIT(2)
272 #define ENETC_SI_F_LSO	BIT(3)
273 #define ENETC_SI_F_PPM	BIT(4) /* pseudo MAC */
274 
275 struct enetc_drvdata {
276 	u32 pmac_offset; /* Only valid for PSI which supports 802.1Qbu */
277 	u8 tx_csum:1;
278 	u8 max_frags;
279 	u64 sysclk_freq;
280 	const struct ethtool_ops *eth_ops;
281 };
282 
283 struct enetc_platform_info {
284 	u16 revision;
285 	u16 dev_id;
286 	const struct enetc_drvdata *data;
287 };
288 
289 struct enetc_si;
290 
291 /*
292  * This structure defines the some common hooks for ENETC PSI and VSI.
293  * In addition, since VSI only uses the struct enetc_si as its private
294  * driver data, so this structure also define some hooks specifically
295  * for VSI. For VSI-specific hooks, the format is ‘vf_*()’.
296  */
297 struct enetc_si_ops {
298 	int (*get_rss_table)(struct enetc_si *si, u32 *table, int count);
299 	int (*set_rss_table)(struct enetc_si *si, const u32 *table, int count);
300 	int (*setup_cbdr)(struct enetc_si *si);
301 	void (*teardown_cbdr)(struct enetc_si *si);
302 };
303 
304 /* PCI IEP device data */
305 struct enetc_si {
306 	struct pci_dev *pdev;
307 	struct enetc_hw hw;
308 	enum enetc_errata errata;
309 
310 	struct net_device *ndev; /* back ref. */
311 
312 	union {
313 		struct enetc_cbdr cbd_ring; /* Only ENETC 1.0 */
314 		struct ntmp_user ntmp_user; /* ENETC 4.1 and later */
315 	};
316 
317 	int num_rx_rings; /* how many rings are available in the SI */
318 	int num_tx_rings;
319 	int num_fs_entries;
320 	int num_rss; /* number of RSS buckets */
321 	unsigned short pad;
322 	u16 revision;
323 	int hw_features;
324 	const struct enetc_drvdata *drvdata;
325 	const struct enetc_si_ops *ops;
326 
327 	struct workqueue_struct *workqueue;
328 	struct work_struct rx_mode_task;
329 	struct dentry *debugfs_root;
330 	struct enetc_msg_swbd msg; /* Only valid for VSI */
331 };
332 
333 #define ENETC_SI_ALIGN	32
334 
335 static inline bool is_enetc_rev1(struct enetc_si *si)
336 {
337 	return si->pdev->revision == ENETC_REV1;
338 }
339 
340 static inline void *enetc_si_priv(const struct enetc_si *si)
341 {
342 	return (char *)si + ALIGN(sizeof(struct enetc_si), ENETC_SI_ALIGN);
343 }
344 
345 static inline bool enetc_si_is_pf(struct enetc_si *si)
346 {
347 	return !!(si->hw.port);
348 }
349 
350 static inline int enetc_pf_to_port(struct pci_dev *pf_pdev)
351 {
352 	switch (pf_pdev->devfn) {
353 	case 0:
354 		return 0;
355 	case 1:
356 		return 1;
357 	case 2:
358 		return 2;
359 	case 6:
360 		return 3;
361 	default:
362 		return -1;
363 	}
364 }
365 
366 static inline bool enetc_is_pseudo_mac(struct enetc_si *si)
367 {
368 	return si->hw_features & ENETC_SI_F_PPM;
369 }
370 
371 #define ENETC_MAX_NUM_TXQS	8
372 #define ENETC_INT_NAME_MAX	(IFNAMSIZ + 8)
373 
374 struct enetc_int_vector {
375 	void __iomem *rbier;
376 	void __iomem *tbier_base;
377 	void __iomem *ricr1;
378 	unsigned long tx_rings_map;
379 	int count_tx_rings;
380 	u32 rx_ictt;
381 	u16 comp_cnt;
382 	bool rx_dim_en, rx_napi_work;
383 	struct napi_struct napi ____cacheline_aligned_in_smp;
384 	struct dim rx_dim ____cacheline_aligned_in_smp;
385 	char name[ENETC_INT_NAME_MAX];
386 
387 	struct enetc_bdr rx_ring;
388 	struct enetc_bdr tx_ring[] __counted_by(count_tx_rings);
389 } ____cacheline_aligned_in_smp;
390 
391 struct enetc_cls_rule {
392 	struct ethtool_rx_flow_spec fs;
393 	int used;
394 };
395 
396 #define ENETC_MAX_BDR_INT	6 /* fixed to max # of available cpus */
397 struct psfp_cap {
398 	u32 max_streamid;
399 	u32 max_psfp_filter;
400 	u32 max_psfp_gate;
401 	u32 max_psfp_gatelist;
402 	u32 max_psfp_meter;
403 };
404 
405 #define ENETC_F_TX_TSTAMP_MASK	0xff
406 enum enetc_active_offloads {
407 	/* 8 bits reserved for TX timestamp types (hwtstamp_tx_types) */
408 	ENETC_F_TX_TSTAMP		= BIT(0),
409 	ENETC_F_TX_ONESTEP_SYNC_TSTAMP	= BIT(1),
410 
411 	ENETC_F_RX_TSTAMP		= BIT(8),
412 	ENETC_F_QBV			= BIT(9),
413 	ENETC_F_QCI			= BIT(10),
414 	ENETC_F_QBU			= BIT(11),
415 	ENETC_F_TXCSUM			= BIT(12),
416 	ENETC_F_LSO			= BIT(13),
417 };
418 
419 enum enetc_flags_bit {
420 	ENETC_TX_ONESTEP_TSTAMP_IN_PROGRESS = 0,
421 	ENETC_TX_DOWN,
422 };
423 
424 /* interrupt coalescing modes */
425 enum enetc_ic_mode {
426 	/* one interrupt per frame */
427 	ENETC_IC_NONE = 0,
428 	/* activated when int coalescing time is set to a non-0 value */
429 	ENETC_IC_RX_MANUAL = BIT(0),
430 	ENETC_IC_TX_MANUAL = BIT(1),
431 	/* use dynamic interrupt moderation */
432 	ENETC_IC_RX_ADAPTIVE = BIT(2),
433 };
434 
435 #define ENETC_RXIC_PKTTHR	min_t(u32, 256, ENETC_RX_RING_DEFAULT_SIZE / 2)
436 #define ENETC_TXIC_PKTTHR	min_t(u32, 128, ENETC_TX_RING_DEFAULT_SIZE / 2)
437 
438 struct enetc_ndev_priv {
439 	struct net_device *ndev;
440 	struct device *dev; /* dma-mapping device */
441 	struct enetc_si *si;
442 
443 	int bdr_int_num; /* number of Rx/Tx ring interrupts */
444 	struct enetc_int_vector *int_vector[ENETC_MAX_BDR_INT];
445 	u16 num_rx_rings, num_tx_rings;
446 	u16 rx_bd_count, tx_bd_count;
447 
448 	u16 msg_enable;
449 
450 	u8 preemptible_tcs;
451 	u8 max_frags; /* The maximum number of BDs for fragments */
452 
453 	enum enetc_active_offloads active_offloads;
454 
455 	u32 speed; /* store speed for compare update pspeed */
456 
457 	struct enetc_bdr **xdp_tx_ring;
458 	struct enetc_bdr *tx_ring[16];
459 	struct enetc_bdr *rx_ring[16];
460 	const struct enetc_bdr_resource *tx_res;
461 	const struct enetc_bdr_resource *rx_res;
462 
463 	struct enetc_cls_rule *cls_rules;
464 
465 	struct psfp_cap psfp_cap;
466 
467 	/* Minimum number of TX queues required by the network stack */
468 	unsigned int min_num_stack_tx_queues;
469 
470 	struct phylink *phylink;
471 	int ic_mode;
472 	u32 tx_ictt;
473 
474 	struct bpf_prog *xdp_prog;
475 
476 	unsigned long flags;
477 
478 	struct work_struct	tx_onestep_tstamp;
479 	struct sk_buff_head	tx_skbs;
480 
481 	/* Serialize access to MAC Merge state between ethtool requests
482 	 * and link state updates
483 	 */
484 	struct mutex		mm_lock;
485 
486 	struct clk *ref_clk; /* RGMII/RMII reference clock */
487 	u64 sysclk_freq; /* NETC system clock frequency */
488 };
489 
490 #define ENETC_CBD(R, i)	(&(((struct enetc_cbd *)((R).bd_base))[i]))
491 
492 #define ENETC_CBDR_TIMEOUT	1000 /* usecs */
493 
494 /* SI common */
495 u32 enetc_port_mac_rd(struct enetc_si *si, u32 reg);
496 void enetc_port_mac_wr(struct enetc_si *si, u32 reg, u32 val);
497 int enetc_pci_probe(struct pci_dev *pdev, const char *name, int sizeof_priv);
498 void enetc_pci_remove(struct pci_dev *pdev);
499 int enetc_alloc_msix(struct enetc_ndev_priv *priv);
500 void enetc_free_msix(struct enetc_ndev_priv *priv);
501 void enetc_get_si_caps(struct enetc_si *si);
502 void enetc_init_si_rings_params(struct enetc_ndev_priv *priv);
503 int enetc_alloc_si_resources(struct enetc_ndev_priv *priv);
504 void enetc_free_si_resources(struct enetc_ndev_priv *priv);
505 int enetc_configure_si(struct enetc_ndev_priv *priv);
506 int enetc_get_driver_data(struct enetc_si *si);
507 void enetc_add_mac_addr_ht_filter(struct enetc_mac_filter *filter,
508 				  const unsigned char *addr);
509 void enetc_reset_mac_addr_filter(struct enetc_mac_filter *filter);
510 
511 int enetc_open(struct net_device *ndev);
512 int enetc_close(struct net_device *ndev);
513 void enetc_start(struct net_device *ndev);
514 void enetc_stop(struct net_device *ndev);
515 netdev_tx_t enetc_xmit(struct sk_buff *skb, struct net_device *ndev);
516 struct net_device_stats *enetc_get_stats(struct net_device *ndev);
517 void enetc_set_features(struct net_device *ndev, netdev_features_t features);
518 int enetc_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd);
519 int enetc_setup_tc_mqprio(struct net_device *ndev, void *type_data);
520 void enetc_reset_tc_mqprio(struct net_device *ndev);
521 int enetc_setup_bpf(struct net_device *ndev, struct netdev_bpf *bpf);
522 int enetc_xdp_xmit(struct net_device *ndev, int num_frames,
523 		   struct xdp_frame **frames, u32 flags);
524 
525 int enetc_hwtstamp_get(struct net_device *ndev,
526 		       struct kernel_hwtstamp_config *config);
527 int enetc_hwtstamp_set(struct net_device *ndev,
528 		       struct kernel_hwtstamp_config *config,
529 		       struct netlink_ext_ack *extack);
530 
531 /* ethtool */
532 extern const struct ethtool_ops enetc_pf_ethtool_ops;
533 extern const struct ethtool_ops enetc4_pf_ethtool_ops;
534 extern const struct ethtool_ops enetc_vf_ethtool_ops;
535 extern const struct ethtool_ops enetc4_ppm_ethtool_ops;
536 
537 void enetc_set_ethtool_ops(struct net_device *ndev);
538 void enetc_mm_link_state_update(struct enetc_ndev_priv *priv, bool link);
539 void enetc_mm_commit_preemptible_tcs(struct enetc_ndev_priv *priv);
540 
541 /* control buffer descriptor ring (CBDR) */
542 int enetc_setup_cbdr(struct enetc_si *si);
543 void enetc_teardown_cbdr(struct enetc_si *si);
544 int enetc4_setup_cbdr(struct enetc_si *si);
545 void enetc4_teardown_cbdr(struct enetc_si *si);
546 int enetc_set_mac_flt_entry(struct enetc_si *si, int index,
547 			    char *mac_addr, int si_map);
548 int enetc_clear_mac_flt_entry(struct enetc_si *si, int index);
549 int enetc_set_fs_entry(struct enetc_si *si, struct enetc_cmd_rfse *rfse,
550 		       int index);
551 void enetc_set_rss_key(struct enetc_si *si, const u8 *bytes);
552 int enetc_get_rss_table(struct enetc_si *si, u32 *table, int count);
553 int enetc_set_rss_table(struct enetc_si *si, const u32 *table, int count);
554 int enetc_send_cmd(struct enetc_si *si, struct enetc_cbd *cbd);
555 int enetc4_get_rss_table(struct enetc_si *si, u32 *table, int count);
556 int enetc4_set_rss_table(struct enetc_si *si, const u32 *table, int count);
557 
558 static inline void *enetc_cbd_alloc_data_mem(struct enetc_si *si,
559 					     struct enetc_cbd *cbd,
560 					     int size, dma_addr_t *dma,
561 					     void **data_align)
562 {
563 	struct enetc_cbdr *ring = &si->cbd_ring;
564 	dma_addr_t dma_align;
565 	void *data;
566 
567 	data = dma_alloc_coherent(ring->dma_dev,
568 				  size + ENETC_CBD_DATA_MEM_ALIGN,
569 				  dma, GFP_KERNEL);
570 	if (!data) {
571 		dev_err(ring->dma_dev, "CBD alloc data memory failed!\n");
572 		return NULL;
573 	}
574 
575 	dma_align = ALIGN(*dma, ENETC_CBD_DATA_MEM_ALIGN);
576 	*data_align = PTR_ALIGN(data, ENETC_CBD_DATA_MEM_ALIGN);
577 
578 	cbd->addr[0] = cpu_to_le32(lower_32_bits(dma_align));
579 	cbd->addr[1] = cpu_to_le32(upper_32_bits(dma_align));
580 	cbd->length = cpu_to_le16(size);
581 
582 	return data;
583 }
584 
585 static inline void enetc_cbd_free_data_mem(struct enetc_si *si, int size,
586 					   void *data, dma_addr_t *dma)
587 {
588 	struct enetc_cbdr *ring = &si->cbd_ring;
589 
590 	dma_free_coherent(ring->dma_dev, size + ENETC_CBD_DATA_MEM_ALIGN,
591 			  data, *dma);
592 }
593 
594 void enetc_reset_ptcmsdur(struct enetc_hw *hw);
595 void enetc_set_ptcmsdur(struct enetc_hw *hw, u32 *queue_max_sdu);
596 
597 static inline bool enetc_ptp_clock_is_enabled(struct enetc_si *si)
598 {
599 	if (is_enetc_rev1(si))
600 		return IS_ENABLED(CONFIG_FSL_ENETC_PTP_CLOCK);
601 
602 	return IS_ENABLED(CONFIG_PTP_NETC_V4_TIMER);
603 }
604 
605 #ifdef CONFIG_FSL_ENETC_QOS
606 int enetc_qos_query_caps(struct net_device *ndev, void *type_data);
607 int enetc_setup_tc_taprio(struct net_device *ndev, void *type_data);
608 void enetc_sched_speed_set(struct enetc_ndev_priv *priv, int speed);
609 int enetc_setup_tc_cbs(struct net_device *ndev, void *type_data);
610 int enetc_setup_tc_txtime(struct net_device *ndev, void *type_data);
611 int enetc_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
612 			    void *cb_priv);
613 int enetc_setup_tc_psfp(struct net_device *ndev, void *type_data);
614 int enetc_psfp_init(struct enetc_ndev_priv *priv);
615 int enetc_psfp_clean(struct enetc_ndev_priv *priv);
616 int enetc_set_psfp(struct net_device *ndev, bool en);
617 
618 static inline void enetc_get_max_cap(struct enetc_ndev_priv *priv)
619 {
620 	struct enetc_hw *hw = &priv->si->hw;
621 	u32 reg;
622 
623 	reg = enetc_port_rd(hw, ENETC_PSIDCAPR);
624 	priv->psfp_cap.max_streamid = reg & ENETC_PSIDCAPR_MSK;
625 	/* Port stream filter capability */
626 	reg = enetc_port_rd(hw, ENETC_PSFCAPR);
627 	priv->psfp_cap.max_psfp_filter = reg & ENETC_PSFCAPR_MSK;
628 	/* Port stream gate capability */
629 	reg = enetc_port_rd(hw, ENETC_PSGCAPR);
630 	priv->psfp_cap.max_psfp_gate = (reg & ENETC_PSGCAPR_SGIT_MSK);
631 	priv->psfp_cap.max_psfp_gatelist = (reg & ENETC_PSGCAPR_GCL_MSK) >> 16;
632 	/* Port flow meter capability */
633 	reg = enetc_port_rd(hw, ENETC_PFMCAPR);
634 	priv->psfp_cap.max_psfp_meter = reg & ENETC_PFMCAPR_MSK;
635 }
636 
637 static inline int enetc_psfp_enable(struct enetc_ndev_priv *priv)
638 {
639 	struct enetc_hw *hw = &priv->si->hw;
640 	int err;
641 
642 	enetc_get_max_cap(priv);
643 
644 	err = enetc_psfp_init(priv);
645 	if (err)
646 		return err;
647 
648 	enetc_wr(hw, ENETC_PPSFPMR, enetc_rd(hw, ENETC_PPSFPMR) |
649 		 ENETC_PPSFPMR_PSFPEN | ENETC_PPSFPMR_VS |
650 		 ENETC_PPSFPMR_PVC | ENETC_PPSFPMR_PVZC);
651 
652 	return 0;
653 }
654 
655 static inline int enetc_psfp_disable(struct enetc_ndev_priv *priv)
656 {
657 	struct enetc_hw *hw = &priv->si->hw;
658 	int err;
659 
660 	err = enetc_psfp_clean(priv);
661 	if (err)
662 		return err;
663 
664 	enetc_wr(hw, ENETC_PPSFPMR, enetc_rd(hw, ENETC_PPSFPMR) &
665 		 ~ENETC_PPSFPMR_PSFPEN & ~ENETC_PPSFPMR_VS &
666 		 ~ENETC_PPSFPMR_PVC & ~ENETC_PPSFPMR_PVZC);
667 
668 	memset(&priv->psfp_cap, 0, sizeof(struct psfp_cap));
669 
670 	return 0;
671 }
672 
673 #else
674 #define enetc_qos_query_caps(ndev, type_data) -EOPNOTSUPP
675 #define enetc_setup_tc_taprio(ndev, type_data) -EOPNOTSUPP
676 #define enetc_sched_speed_set(priv, speed) (void)0
677 #define enetc_setup_tc_cbs(ndev, type_data) -EOPNOTSUPP
678 #define enetc_setup_tc_txtime(ndev, type_data) -EOPNOTSUPP
679 #define enetc_setup_tc_psfp(ndev, type_data) -EOPNOTSUPP
680 #define enetc_setup_tc_block_cb NULL
681 
682 #define enetc_get_max_cap(p)		\
683 	memset(&((p)->psfp_cap), 0, sizeof(struct psfp_cap))
684 
685 static inline int enetc_psfp_enable(struct enetc_ndev_priv *priv)
686 {
687 	return 0;
688 }
689 
690 static inline int enetc_psfp_disable(struct enetc_ndev_priv *priv)
691 {
692 	return 0;
693 }
694 
695 static inline int enetc_set_psfp(struct net_device *ndev, bool en)
696 {
697 	return 0;
698 }
699 #endif
700