1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ 2 /* Copyright 2017-2019, 2025-2026 NXP */ 3 4 #include <linux/timer.h> 5 #include <linux/pci.h> 6 #include <linux/netdevice.h> 7 #include <linux/etherdevice.h> 8 #include <linux/dma-mapping.h> 9 #include <linux/skbuff.h> 10 #include <linux/ethtool.h> 11 #include <linux/fsl/ntmp.h> 12 #include <linux/if_vlan.h> 13 #include <linux/phylink.h> 14 #include <linux/dim.h> 15 #include <net/xdp.h> 16 17 #include "enetc_hw.h" 18 #include "enetc4_hw.h" 19 #include "enetc_mailbox.h" 20 21 #define ENETC_MAC_MAXFRM_SIZE 9600 22 #define ENETC_MAX_MTU (ENETC_MAC_MAXFRM_SIZE - \ 23 (ETH_FCS_LEN + ETH_HLEN + VLAN_HLEN)) 24 25 #define ENETC_CBD_DATA_MEM_ALIGN 64 26 27 #define ENETC_MADDR_HASH_TBL_SZ 64 28 #define ENETC_INT_NAME_MAX (IFNAMSIZ + 8) 29 30 enum enetc_mac_addr_type {UC, MC, MADDR_TYPE}; 31 32 struct enetc_mac_filter { 33 union { 34 char mac_addr[ETH_ALEN]; 35 DECLARE_BITMAP(mac_hash_table, ENETC_MADDR_HASH_TBL_SZ); 36 }; 37 int mac_addr_cnt; 38 }; 39 40 struct enetc_tx_swbd { 41 union { 42 struct sk_buff *skb; 43 struct xdp_frame *xdp_frame; 44 }; 45 dma_addr_t dma; 46 struct page *page; /* valid only if is_xdp_tx */ 47 u16 page_offset; /* valid only if is_xdp_tx */ 48 u16 len; 49 enum dma_data_direction dir; 50 u8 is_dma_page:1; 51 u8 check_wb:1; 52 u8 do_twostep_tstamp:1; 53 u8 is_eof:1; 54 u8 is_xdp_tx:1; 55 u8 is_xdp_redirect:1; 56 u8 qbv_en:1; 57 }; 58 59 struct enetc_skb_cb { 60 u8 flag; 61 bool udp; 62 u16 correction_off; 63 u16 origin_tstamp_off; 64 }; 65 66 #define ENETC_SKB_CB(skb) ((struct enetc_skb_cb *)((skb)->cb)) 67 68 struct enetc_lso_t { 69 bool ipv6; 70 bool tcp; 71 u8 l3_hdr_len; 72 u8 hdr_len; /* LSO header length */ 73 u8 l3_start; 74 u16 lso_seg_size; 75 int total_len; /* total data length, not include LSO header */ 76 }; 77 78 #define ENETC_LSO_MAX_DATA_LEN SZ_256K 79 80 #define ENETC_RX_MAXFRM_SIZE ENETC_MAC_MAXFRM_SIZE 81 #define ENETC_RXB_TRUESIZE (PAGE_SIZE >> 1) 82 #define ENETC_RXB_PAD NET_SKB_PAD /* add extra space if needed */ 83 #define ENETC_RXB_DMA_SIZE \ 84 min(SKB_WITH_OVERHEAD(ENETC_RXB_TRUESIZE) - ENETC_RXB_PAD, 0xffff) 85 #define ENETC_RXB_DMA_SIZE_XDP \ 86 min(SKB_WITH_OVERHEAD(ENETC_RXB_TRUESIZE) - XDP_PACKET_HEADROOM, 0xffff) 87 88 struct enetc_rx_swbd { 89 dma_addr_t dma; 90 struct page *page; 91 u16 page_offset; 92 enum dma_data_direction dir; 93 u16 len; 94 }; 95 96 /* ENETC overhead: optional extension BD + 1 BD gap */ 97 #define ENETC_TXBDS_NEEDED(val) ((val) + 2) 98 /* For LS1028A, max # of chained Tx BDs is 15, including head and 99 * extension BD. 100 */ 101 #define ENETC_MAX_SKB_FRAGS 13 102 /* For ENETC v4 and later versions, max # of chained Tx BDs is 63, 103 * including head and extension BD, but the range of MAX_SKB_FRAGS 104 * is 17 ~ 45, so set ENETC4_MAX_SKB_FRAGS to MAX_SKB_FRAGS. 105 */ 106 #define ENETC4_MAX_SKB_FRAGS MAX_SKB_FRAGS 107 #define ENETC_TXBDS_MAX_NEEDED(x) ENETC_TXBDS_NEEDED((x) + 1) 108 109 struct enetc_ring_stats { 110 unsigned long packets; 111 unsigned long bytes; 112 unsigned long rx_alloc_errs; 113 unsigned long xdp_drops; 114 unsigned long xdp_tx; 115 unsigned long xdp_tx_drops; 116 unsigned long xdp_redirect; 117 unsigned long xdp_redirect_failures; 118 unsigned long recycles; 119 unsigned long recycle_failures; 120 unsigned long win_drop; 121 }; 122 123 struct enetc_xdp_data { 124 struct xdp_rxq_info rxq; 125 struct bpf_prog *prog; 126 int xdp_tx_in_flight; 127 }; 128 129 #define ENETC_RX_RING_DEFAULT_SIZE 2048 130 #define ENETC_TX_RING_DEFAULT_SIZE 2048 131 #define ENETC_DEFAULT_TX_WORK (ENETC_TX_RING_DEFAULT_SIZE / 2) 132 133 struct enetc_bdr_resource { 134 /* Input arguments saved for teardown */ 135 struct device *dev; /* for DMA mapping */ 136 size_t bd_count; 137 size_t bd_size; 138 139 /* Resource proper */ 140 void *bd_base; /* points to Rx or Tx BD ring */ 141 dma_addr_t bd_dma_base; 142 union { 143 struct enetc_tx_swbd *tx_swbd; 144 struct enetc_rx_swbd *rx_swbd; 145 }; 146 char *tso_headers; 147 dma_addr_t tso_headers_dma; 148 }; 149 150 struct enetc_bdr { 151 struct device *dev; /* for DMA mapping */ 152 struct net_device *ndev; 153 void *bd_base; /* points to Rx or Tx BD ring */ 154 union { 155 void __iomem *tpir; 156 void __iomem *rcir; 157 }; 158 u16 index; 159 u16 prio; 160 int bd_count; /* # of BDs */ 161 int next_to_use; 162 int next_to_clean; 163 union { 164 struct enetc_tx_swbd *tx_swbd; 165 struct enetc_rx_swbd *rx_swbd; 166 }; 167 union { 168 void __iomem *tcir; /* Tx */ 169 int next_to_alloc; /* Rx */ 170 }; 171 void __iomem *idr; /* Interrupt Detect Register pointer */ 172 173 int buffer_offset; 174 struct enetc_xdp_data xdp; 175 176 struct enetc_ring_stats stats; 177 178 dma_addr_t bd_dma_base; 179 u8 tsd_enable; /* Time specific departure */ 180 bool ext_en; /* enable h/w descriptor extensions */ 181 182 /* DMA buffer for TSO headers */ 183 char *tso_headers; 184 dma_addr_t tso_headers_dma; 185 } ____cacheline_aligned_in_smp; 186 187 static inline void enetc_bdr_idx_inc(struct enetc_bdr *bdr, int *i) 188 { 189 if (unlikely(++*i == bdr->bd_count)) 190 *i = 0; 191 } 192 193 static inline int enetc_bd_unused(struct enetc_bdr *bdr) 194 { 195 if (bdr->next_to_clean > bdr->next_to_use) 196 return bdr->next_to_clean - bdr->next_to_use - 1; 197 198 return bdr->bd_count + bdr->next_to_clean - bdr->next_to_use - 1; 199 } 200 201 static inline int enetc_swbd_unused(struct enetc_bdr *bdr) 202 { 203 if (bdr->next_to_clean > bdr->next_to_alloc) 204 return bdr->next_to_clean - bdr->next_to_alloc - 1; 205 206 return bdr->bd_count + bdr->next_to_clean - bdr->next_to_alloc - 1; 207 } 208 209 /* Control BD ring */ 210 #define ENETC_CBDR_DEFAULT_SIZE 64 211 struct enetc_cbdr { 212 void *bd_base; /* points to Rx or Tx BD ring */ 213 void __iomem *pir; 214 void __iomem *cir; 215 void __iomem *mr; /* mode register */ 216 217 int bd_count; /* # of BDs */ 218 int next_to_use; 219 int next_to_clean; 220 221 dma_addr_t bd_dma_base; 222 struct device *dma_dev; 223 }; 224 225 #define ENETC_TXBD(BDR, i) (&(((union enetc_tx_bd *)((BDR).bd_base))[i])) 226 227 static inline union enetc_rx_bd *enetc_rxbd(struct enetc_bdr *rx_ring, int i) 228 { 229 int hw_idx = i; 230 231 if (rx_ring->ext_en) 232 hw_idx = 2 * i; 233 234 return &(((union enetc_rx_bd *)rx_ring->bd_base)[hw_idx]); 235 } 236 237 static inline void enetc_rxbd_next(struct enetc_bdr *rx_ring, 238 union enetc_rx_bd **old_rxbd, int *old_index) 239 { 240 union enetc_rx_bd *new_rxbd = *old_rxbd; 241 int new_index = *old_index; 242 243 new_rxbd++; 244 245 if (rx_ring->ext_en) 246 new_rxbd++; 247 248 if (unlikely(++new_index == rx_ring->bd_count)) { 249 new_rxbd = rx_ring->bd_base; 250 new_index = 0; 251 } 252 253 *old_rxbd = new_rxbd; 254 *old_index = new_index; 255 } 256 257 static inline union enetc_rx_bd *enetc_rxbd_ext(union enetc_rx_bd *rxbd) 258 { 259 return ++rxbd; 260 } 261 262 #define ENETC_REV1 0x1 263 #define ENETC_REV4 0x4 264 265 enum enetc_errata { 266 ENETC_ERR_VLAN_ISOL = BIT(0), 267 ENETC_ERR_UCMCSWP = BIT(1), 268 }; 269 270 #define ENETC_SI_F_PSFP BIT(0) 271 #define ENETC_SI_F_QBV BIT(1) 272 #define ENETC_SI_F_QBU BIT(2) 273 #define ENETC_SI_F_LSO BIT(3) 274 #define ENETC_SI_F_PPM BIT(4) /* pseudo MAC */ 275 276 struct enetc_drvdata { 277 u32 pmac_offset; /* Only valid for PSI which supports 802.1Qbu */ 278 u8 tx_csum:1; 279 u8 max_frags; 280 u64 sysclk_freq; 281 const struct ethtool_ops *eth_ops; 282 }; 283 284 struct enetc_platform_info { 285 u16 revision; 286 u16 dev_id; 287 const struct enetc_drvdata *data; 288 }; 289 290 struct enetc_si; 291 292 /* 293 * This structure defines the some common hooks for ENETC PSI and VSI. 294 * In addition, since VSI only uses the struct enetc_si as its private 295 * driver data, so this structure also define some hooks specifically 296 * for VSI. For VSI-specific hooks, the format is ‘vf_*()’. 297 */ 298 struct enetc_si_ops { 299 int (*get_rss_table)(struct enetc_si *si, u32 *table, int count); 300 int (*set_rss_table)(struct enetc_si *si, const u32 *table, int count); 301 int (*setup_cbdr)(struct enetc_si *si); 302 void (*teardown_cbdr)(struct enetc_si *si); 303 304 /* VSI-specific hooks */ 305 int (*vf_reg_link_status_notifier)(struct enetc_si *si); 306 int (*vf_unreg_link_status_notifier)(struct enetc_si *si); 307 }; 308 309 /* PCI IEP device data */ 310 struct enetc_si { 311 struct pci_dev *pdev; 312 struct enetc_hw hw; 313 enum enetc_errata errata; 314 315 struct net_device *ndev; /* back ref. */ 316 317 /* General-purpose lock serializing updates that must not race, 318 * e.g. read-modify-write of shared hardware registers and of 319 * selected priv->flags bits between the phylink link callbacks 320 * and the ring (re)configuration path. 321 */ 322 spinlock_t gen_lock; 323 324 union { 325 struct enetc_cbdr cbd_ring; /* Only ENETC 1.0 */ 326 struct ntmp_user ntmp_user; /* ENETC 4.1 and later */ 327 }; 328 329 int num_rx_rings; /* how many rings are available in the SI */ 330 int num_tx_rings; 331 int num_fs_entries; 332 int num_rss; /* number of RSS buckets */ 333 unsigned short pad; 334 u16 revision; 335 int hw_features; 336 const struct enetc_drvdata *drvdata; 337 const struct enetc_si_ops *ops; 338 339 struct dentry *debugfs_root; 340 struct enetc_msg_swbd msg; /* Only valid for VSI */ 341 struct workqueue_struct *workqueue; 342 struct work_struct msg_task; 343 char msg_int_name[ENETC_INT_NAME_MAX]; 344 345 struct enetc_mac_filter mac_filter[MADDR_TYPE]; 346 }; 347 348 #define ENETC_SI_ALIGN 32 349 350 static inline bool is_enetc_rev1(struct enetc_si *si) 351 { 352 return si->pdev->revision == ENETC_REV1; 353 } 354 355 static inline void *enetc_si_priv(const struct enetc_si *si) 356 { 357 return (char *)si + ALIGN(sizeof(struct enetc_si), ENETC_SI_ALIGN); 358 } 359 360 static inline bool enetc_si_is_pf(struct enetc_si *si) 361 { 362 return !!(si->hw.port); 363 } 364 365 static inline int enetc_pf_to_port(struct pci_dev *pf_pdev) 366 { 367 switch (pf_pdev->devfn) { 368 case 0: 369 return 0; 370 case 1: 371 return 1; 372 case 2: 373 return 2; 374 case 6: 375 return 3; 376 default: 377 return -1; 378 } 379 } 380 381 static inline bool enetc_is_pseudo_mac(struct enetc_si *si) 382 { 383 return si->hw_features & ENETC_SI_F_PPM; 384 } 385 386 #define ENETC_MAX_NUM_TXQS 8 387 388 struct enetc_int_vector { 389 void __iomem *rbier; 390 void __iomem *tbier_base; 391 void __iomem *ricr1; 392 unsigned long tx_rings_map; 393 int count_tx_rings; 394 u32 rx_ictt; 395 u16 comp_cnt; 396 bool rx_dim_en, rx_napi_work; 397 struct napi_struct napi ____cacheline_aligned_in_smp; 398 struct dim rx_dim ____cacheline_aligned_in_smp; 399 char name[ENETC_INT_NAME_MAX]; 400 401 struct enetc_bdr rx_ring; 402 struct enetc_bdr tx_ring[] __counted_by(count_tx_rings); 403 } ____cacheline_aligned_in_smp; 404 405 struct enetc_cls_rule { 406 struct ethtool_rx_flow_spec fs; 407 int used; 408 }; 409 410 #define ENETC_MAX_BDR_INT 6 /* fixed to max # of available cpus */ 411 struct psfp_cap { 412 u32 max_streamid; 413 u32 max_psfp_filter; 414 u32 max_psfp_gate; 415 u32 max_psfp_gatelist; 416 u32 max_psfp_meter; 417 }; 418 419 #define ENETC_F_TX_TSTAMP_MASK 0xff 420 enum enetc_active_offloads { 421 /* 8 bits reserved for TX timestamp types (hwtstamp_tx_types) */ 422 ENETC_F_TX_TSTAMP = BIT(0), 423 ENETC_F_TX_ONESTEP_SYNC_TSTAMP = BIT(1), 424 425 ENETC_F_RX_TSTAMP = BIT(8), 426 ENETC_F_QBV = BIT(9), 427 ENETC_F_QCI = BIT(10), 428 ENETC_F_QBU = BIT(11), 429 ENETC_F_TXCSUM = BIT(12), 430 ENETC_F_LSO = BIT(13), 431 }; 432 433 enum enetc_flags_bit { 434 ENETC_TX_ONESTEP_TSTAMP_IN_PROGRESS = 0, 435 ENETC_TX_DOWN, 436 ENETC_RXBDR_CM, 437 }; 438 439 /* interrupt coalescing modes */ 440 enum enetc_ic_mode { 441 /* one interrupt per frame */ 442 ENETC_IC_NONE = 0, 443 /* activated when int coalescing time is set to a non-0 value */ 444 ENETC_IC_RX_MANUAL = BIT(0), 445 ENETC_IC_TX_MANUAL = BIT(1), 446 /* use dynamic interrupt moderation */ 447 ENETC_IC_RX_ADAPTIVE = BIT(2), 448 }; 449 450 #define ENETC_RXIC_PKTTHR min_t(u32, 256, ENETC_RX_RING_DEFAULT_SIZE / 2) 451 #define ENETC_TXIC_PKTTHR min_t(u32, 128, ENETC_TX_RING_DEFAULT_SIZE / 2) 452 453 struct enetc_ndev_priv { 454 struct net_device *ndev; 455 struct device *dev; /* dma-mapping device */ 456 struct enetc_si *si; 457 458 int bdr_int_num; /* number of Rx/Tx ring interrupts */ 459 struct enetc_int_vector *int_vector[ENETC_MAX_BDR_INT]; 460 u16 num_rx_rings, num_tx_rings; 461 u16 rx_bd_count, tx_bd_count; 462 463 u16 msg_enable; 464 465 u8 preemptible_tcs; 466 u8 max_frags; /* The maximum number of BDs for fragments */ 467 468 enum enetc_active_offloads active_offloads; 469 470 u32 speed; /* store speed for compare update pspeed */ 471 472 struct enetc_bdr **xdp_tx_ring; 473 struct enetc_bdr *tx_ring[16]; 474 struct enetc_bdr *rx_ring[16]; 475 const struct enetc_bdr_resource *tx_res; 476 const struct enetc_bdr_resource *rx_res; 477 478 struct enetc_cls_rule *cls_rules; 479 480 struct psfp_cap psfp_cap; 481 482 /* Minimum number of TX queues required by the network stack */ 483 unsigned int min_num_stack_tx_queues; 484 485 struct phylink *phylink; 486 int ic_mode; 487 u32 tx_ictt; 488 489 struct bpf_prog *xdp_prog; 490 491 unsigned long flags; 492 493 struct work_struct tx_onestep_tstamp; 494 struct sk_buff_head tx_skbs; 495 496 /* Serialize access to MAC Merge state between ethtool requests 497 * and link state updates 498 */ 499 struct mutex mm_lock; 500 501 struct clk *ref_clk; /* RGMII/RMII reference clock */ 502 u64 sysclk_freq; /* NETC system clock frequency */ 503 }; 504 505 #define ENETC_CBD(R, i) (&(((struct enetc_cbd *)((R).bd_base))[i])) 506 507 #define ENETC_CBDR_TIMEOUT 1000 /* usecs */ 508 509 /* SI common */ 510 u32 enetc_port_mac_rd(struct enetc_si *si, u32 reg); 511 void enetc_port_mac_wr(struct enetc_si *si, u32 reg, u32 val); 512 int enetc_pci_probe(struct pci_dev *pdev, const char *name, int sizeof_priv); 513 void enetc_pci_remove(struct pci_dev *pdev); 514 int enetc_alloc_msix(struct enetc_ndev_priv *priv); 515 void enetc_free_msix(struct enetc_ndev_priv *priv); 516 void enetc_get_si_caps(struct enetc_si *si); 517 void enetc_init_si_rings_params(struct enetc_ndev_priv *priv); 518 int enetc_alloc_si_resources(struct enetc_ndev_priv *priv); 519 void enetc_free_si_resources(struct enetc_ndev_priv *priv); 520 int enetc_configure_si(struct enetc_ndev_priv *priv); 521 int enetc_get_driver_data(struct enetc_si *si); 522 void enetc_add_mac_addr_ht_filter(struct enetc_mac_filter *filter, 523 const unsigned char *addr); 524 void enetc_reset_mac_addr_filter(struct enetc_mac_filter *filter); 525 void enetc_set_congestion_mode(struct enetc_ndev_priv *priv, bool enable); 526 527 int enetc_open(struct net_device *ndev); 528 int enetc_close(struct net_device *ndev); 529 void enetc_start(struct net_device *ndev); 530 void enetc_stop(struct net_device *ndev); 531 netdev_tx_t enetc_xmit(struct sk_buff *skb, struct net_device *ndev); 532 struct net_device_stats *enetc_get_stats(struct net_device *ndev); 533 void enetc_set_features(struct net_device *ndev, netdev_features_t features); 534 int enetc_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd); 535 int enetc_setup_tc_mqprio(struct net_device *ndev, void *type_data); 536 void enetc_reset_tc_mqprio(struct net_device *ndev); 537 int enetc_setup_bpf(struct net_device *ndev, struct netdev_bpf *bpf); 538 int enetc_xdp_xmit(struct net_device *ndev, int num_frames, 539 struct xdp_frame **frames, u32 flags); 540 541 int enetc_hwtstamp_get(struct net_device *ndev, 542 struct kernel_hwtstamp_config *config); 543 int enetc_hwtstamp_set(struct net_device *ndev, 544 struct kernel_hwtstamp_config *config, 545 struct netlink_ext_ack *extack); 546 547 /* ethtool */ 548 extern const struct ethtool_ops enetc_pf_ethtool_ops; 549 extern const struct ethtool_ops enetc4_pf_ethtool_ops; 550 extern const struct ethtool_ops enetc_vf_ethtool_ops; 551 extern const struct ethtool_ops enetc4_ppm_ethtool_ops; 552 553 void enetc_set_ethtool_ops(struct net_device *ndev); 554 void enetc_mm_link_state_update(struct enetc_ndev_priv *priv, bool link); 555 void enetc_mm_commit_preemptible_tcs(struct enetc_ndev_priv *priv); 556 557 /* control buffer descriptor ring (CBDR) */ 558 int enetc_setup_cbdr(struct enetc_si *si); 559 void enetc_teardown_cbdr(struct enetc_si *si); 560 int enetc4_setup_cbdr(struct enetc_si *si); 561 void enetc4_teardown_cbdr(struct enetc_si *si); 562 int enetc_set_mac_flt_entry(struct enetc_si *si, int index, 563 char *mac_addr, int si_map); 564 int enetc_clear_mac_flt_entry(struct enetc_si *si, int index); 565 int enetc_set_fs_entry(struct enetc_si *si, struct enetc_cmd_rfse *rfse, 566 int index); 567 void enetc_set_rss_key(struct enetc_si *si, const u8 *bytes); 568 int enetc_get_rss_table(struct enetc_si *si, u32 *table, int count); 569 int enetc_set_rss_table(struct enetc_si *si, const u32 *table, int count); 570 int enetc_send_cmd(struct enetc_si *si, struct enetc_cbd *cbd); 571 int enetc4_get_rss_table(struct enetc_si *si, u32 *table, int count); 572 int enetc4_set_rss_table(struct enetc_si *si, const u32 *table, int count); 573 574 static inline void *enetc_cbd_alloc_data_mem(struct enetc_si *si, 575 struct enetc_cbd *cbd, 576 int size, dma_addr_t *dma, 577 void **data_align) 578 { 579 struct enetc_cbdr *ring = &si->cbd_ring; 580 dma_addr_t dma_align; 581 void *data; 582 583 data = dma_alloc_coherent(ring->dma_dev, 584 size + ENETC_CBD_DATA_MEM_ALIGN, 585 dma, GFP_KERNEL); 586 if (!data) { 587 dev_err(ring->dma_dev, "CBD alloc data memory failed!\n"); 588 return NULL; 589 } 590 591 dma_align = ALIGN(*dma, ENETC_CBD_DATA_MEM_ALIGN); 592 *data_align = PTR_ALIGN(data, ENETC_CBD_DATA_MEM_ALIGN); 593 594 cbd->addr[0] = cpu_to_le32(lower_32_bits(dma_align)); 595 cbd->addr[1] = cpu_to_le32(upper_32_bits(dma_align)); 596 cbd->length = cpu_to_le16(size); 597 598 return data; 599 } 600 601 static inline void enetc_cbd_free_data_mem(struct enetc_si *si, int size, 602 void *data, dma_addr_t *dma) 603 { 604 struct enetc_cbdr *ring = &si->cbd_ring; 605 606 dma_free_coherent(ring->dma_dev, size + ENETC_CBD_DATA_MEM_ALIGN, 607 data, *dma); 608 } 609 610 void enetc_reset_ptcmsdur(struct enetc_hw *hw); 611 void enetc_set_ptcmsdur(struct enetc_hw *hw, u32 *queue_max_sdu); 612 613 static inline bool enetc_ptp_clock_is_enabled(struct enetc_si *si) 614 { 615 if (is_enetc_rev1(si)) 616 return IS_ENABLED(CONFIG_FSL_ENETC_PTP_CLOCK); 617 618 return IS_ENABLED(CONFIG_PTP_NETC_V4_TIMER); 619 } 620 621 #ifdef CONFIG_FSL_ENETC_QOS 622 int enetc_qos_query_caps(struct net_device *ndev, void *type_data); 623 int enetc_setup_tc_taprio(struct net_device *ndev, void *type_data); 624 void enetc_sched_speed_set(struct enetc_ndev_priv *priv, int speed); 625 int enetc_setup_tc_cbs(struct net_device *ndev, void *type_data); 626 int enetc_setup_tc_txtime(struct net_device *ndev, void *type_data); 627 int enetc_setup_tc_block_cb(enum tc_setup_type type, void *type_data, 628 void *cb_priv); 629 int enetc_setup_tc_psfp(struct net_device *ndev, void *type_data); 630 int enetc_psfp_init(struct enetc_ndev_priv *priv); 631 int enetc_psfp_clean(struct enetc_ndev_priv *priv); 632 int enetc_set_psfp(struct net_device *ndev, bool en); 633 634 static inline void enetc_get_max_cap(struct enetc_ndev_priv *priv) 635 { 636 struct enetc_hw *hw = &priv->si->hw; 637 u32 reg; 638 639 reg = enetc_port_rd(hw, ENETC_PSIDCAPR); 640 priv->psfp_cap.max_streamid = reg & ENETC_PSIDCAPR_MSK; 641 /* Port stream filter capability */ 642 reg = enetc_port_rd(hw, ENETC_PSFCAPR); 643 priv->psfp_cap.max_psfp_filter = reg & ENETC_PSFCAPR_MSK; 644 /* Port stream gate capability */ 645 reg = enetc_port_rd(hw, ENETC_PSGCAPR); 646 priv->psfp_cap.max_psfp_gate = (reg & ENETC_PSGCAPR_SGIT_MSK); 647 priv->psfp_cap.max_psfp_gatelist = (reg & ENETC_PSGCAPR_GCL_MSK) >> 16; 648 /* Port flow meter capability */ 649 reg = enetc_port_rd(hw, ENETC_PFMCAPR); 650 priv->psfp_cap.max_psfp_meter = reg & ENETC_PFMCAPR_MSK; 651 } 652 653 static inline int enetc_psfp_enable(struct enetc_ndev_priv *priv) 654 { 655 struct enetc_hw *hw = &priv->si->hw; 656 int err; 657 658 enetc_get_max_cap(priv); 659 660 err = enetc_psfp_init(priv); 661 if (err) 662 return err; 663 664 enetc_wr(hw, ENETC_PPSFPMR, enetc_rd(hw, ENETC_PPSFPMR) | 665 ENETC_PPSFPMR_PSFPEN | ENETC_PPSFPMR_VS | 666 ENETC_PPSFPMR_PVC | ENETC_PPSFPMR_PVZC); 667 668 return 0; 669 } 670 671 static inline int enetc_psfp_disable(struct enetc_ndev_priv *priv) 672 { 673 struct enetc_hw *hw = &priv->si->hw; 674 int err; 675 676 err = enetc_psfp_clean(priv); 677 if (err) 678 return err; 679 680 enetc_wr(hw, ENETC_PPSFPMR, enetc_rd(hw, ENETC_PPSFPMR) & 681 ~ENETC_PPSFPMR_PSFPEN & ~ENETC_PPSFPMR_VS & 682 ~ENETC_PPSFPMR_PVC & ~ENETC_PPSFPMR_PVZC); 683 684 memset(&priv->psfp_cap, 0, sizeof(struct psfp_cap)); 685 686 return 0; 687 } 688 689 #else 690 #define enetc_qos_query_caps(ndev, type_data) -EOPNOTSUPP 691 #define enetc_setup_tc_taprio(ndev, type_data) -EOPNOTSUPP 692 #define enetc_sched_speed_set(priv, speed) (void)0 693 #define enetc_setup_tc_cbs(ndev, type_data) -EOPNOTSUPP 694 #define enetc_setup_tc_txtime(ndev, type_data) -EOPNOTSUPP 695 #define enetc_setup_tc_psfp(ndev, type_data) -EOPNOTSUPP 696 #define enetc_setup_tc_block_cb NULL 697 698 #define enetc_get_max_cap(p) \ 699 memset(&((p)->psfp_cap), 0, sizeof(struct psfp_cap)) 700 701 static inline int enetc_psfp_enable(struct enetc_ndev_priv *priv) 702 { 703 return 0; 704 } 705 706 static inline int enetc_psfp_disable(struct enetc_ndev_priv *priv) 707 { 708 return 0; 709 } 710 711 static inline int enetc_set_psfp(struct net_device *ndev, bool en) 712 { 713 return 0; 714 } 715 #endif 716