1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * PWM device driver for ST SoCs
4 *
5 * Copyright (C) 2013-2016 STMicroelectronics (R&D) Limited
6 *
7 * Author: Ajit Pal Singh <ajitpal.singh@st.com>
8 * Lee Jones <lee.jones@linaro.org>
9 */
10
11 #include <linux/clk.h>
12 #include <linux/interrupt.h>
13 #include <linux/math64.h>
14 #include <linux/mfd/syscon.h>
15 #include <linux/module.h>
16 #include <linux/of.h>
17 #include <linux/platform_device.h>
18 #include <linux/pwm.h>
19 #include <linux/regmap.h>
20 #include <linux/sched.h>
21 #include <linux/slab.h>
22 #include <linux/time.h>
23 #include <linux/wait.h>
24
25 #define PWM_OUT_VAL(x) (0x00 + (4 * (x))) /* Device's Duty Cycle register */
26 #define PWM_CPT_VAL(x) (0x10 + (4 * (x))) /* Capture value */
27 #define PWM_CPT_EDGE(x) (0x30 + (4 * (x))) /* Edge to capture on */
28
29 #define STI_PWM_CTRL 0x50 /* Control/Config register */
30 #define STI_INT_EN 0x54 /* Interrupt Enable/Disable register */
31 #define STI_INT_STA 0x58 /* Interrupt Status register */
32 #define PWM_INT_ACK 0x5c
33 #define PWM_PRESCALE_LOW_MASK 0x0f
34 #define PWM_PRESCALE_HIGH_MASK 0xf0
35 #define PWM_CPT_EDGE_MASK 0x03
36 #define PWM_INT_ACK_MASK 0x1ff
37
38 #define STI_MAX_CPT_DEVS 4
39 #define CPT_DC_MAX 0xff
40
41 /* Regfield IDs */
42 enum {
43 /* Bits in PWM_CTRL*/
44 PWMCLK_PRESCALE_LOW,
45 PWMCLK_PRESCALE_HIGH,
46 CPTCLK_PRESCALE,
47
48 PWM_OUT_EN,
49 PWM_CPT_EN,
50
51 PWM_CPT_INT_EN,
52 PWM_CPT_INT_STAT,
53
54 /* Keep last */
55 MAX_REGFIELDS
56 };
57
58 /*
59 * Each capture input can be programmed to detect rising-edge, falling-edge,
60 * either edge or neither egde.
61 */
62 enum sti_cpt_edge {
63 CPT_EDGE_DISABLED,
64 CPT_EDGE_RISING,
65 CPT_EDGE_FALLING,
66 CPT_EDGE_BOTH,
67 };
68
69 struct sti_cpt_ddata {
70 u32 snapshot[3];
71 unsigned int index;
72 struct mutex lock;
73 wait_queue_head_t wait;
74 };
75
76 struct sti_pwm_chip {
77 struct device *dev;
78 struct clk *pwm_clk;
79 struct clk *cpt_clk;
80 struct regmap *regmap;
81 unsigned int pwm_num_devs;
82 unsigned int cpt_num_devs;
83 unsigned int max_pwm_cnt;
84 unsigned int max_prescale;
85 struct sti_cpt_ddata *ddata;
86 struct regmap_field *prescale_low;
87 struct regmap_field *prescale_high;
88 struct regmap_field *pwm_out_en;
89 struct regmap_field *pwm_cpt_en;
90 struct regmap_field *pwm_cpt_int_en;
91 struct regmap_field *pwm_cpt_int_stat;
92 struct pwm_device *cur;
93 unsigned long configured;
94 unsigned int en_count;
95 void __iomem *mmio;
96 };
97
98 static const struct reg_field sti_pwm_regfields[MAX_REGFIELDS] = {
99 [PWMCLK_PRESCALE_LOW] = REG_FIELD(STI_PWM_CTRL, 0, 3),
100 [PWMCLK_PRESCALE_HIGH] = REG_FIELD(STI_PWM_CTRL, 11, 14),
101 [CPTCLK_PRESCALE] = REG_FIELD(STI_PWM_CTRL, 4, 8),
102 [PWM_OUT_EN] = REG_FIELD(STI_PWM_CTRL, 9, 9),
103 [PWM_CPT_EN] = REG_FIELD(STI_PWM_CTRL, 10, 10),
104 [PWM_CPT_INT_EN] = REG_FIELD(STI_INT_EN, 1, 4),
105 [PWM_CPT_INT_STAT] = REG_FIELD(STI_INT_STA, 1, 4),
106 };
107
to_sti_pwmchip(struct pwm_chip * chip)108 static inline struct sti_pwm_chip *to_sti_pwmchip(struct pwm_chip *chip)
109 {
110 return pwmchip_get_drvdata(chip);
111 }
112
113 /*
114 * Calculate the prescaler value corresponding to the period.
115 */
sti_pwm_get_prescale(struct sti_pwm_chip * pc,unsigned long period,unsigned int * prescale)116 static int sti_pwm_get_prescale(struct sti_pwm_chip *pc, unsigned long period,
117 unsigned int *prescale)
118 {
119 unsigned long clk_rate;
120 unsigned long value;
121 unsigned int ps;
122
123 clk_rate = clk_get_rate(pc->pwm_clk);
124 if (!clk_rate) {
125 dev_err(pc->dev, "failed to get clock rate\n");
126 return -EINVAL;
127 }
128
129 /*
130 * prescale = ((period_ns * clk_rate) / (10^9 * (max_pwm_cnt + 1)) - 1
131 */
132 value = NSEC_PER_SEC / clk_rate;
133 value *= pc->max_pwm_cnt + 1;
134
135 if (period % value)
136 return -EINVAL;
137
138 ps = period / value - 1;
139 if (ps > pc->max_prescale)
140 return -EINVAL;
141
142 *prescale = ps;
143
144 return 0;
145 }
146
147 /*
148 * For STiH4xx PWM IP, the PWM period is fixed to 256 local clock cycles. The
149 * only way to change the period (apart from changing the PWM input clock) is
150 * to change the PWM clock prescaler.
151 *
152 * The prescaler is of 8 bits, so 256 prescaler values and hence 256 possible
153 * period values are supported (for a particular clock rate). The requested
154 * period will be applied only if it matches one of these 256 values.
155 */
sti_pwm_config(struct pwm_chip * chip,struct pwm_device * pwm,int duty_ns,int period_ns)156 static int sti_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
157 int duty_ns, int period_ns)
158 {
159 struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
160 unsigned int ncfg, value, prescale = 0;
161 struct pwm_device *cur = pc->cur;
162 struct device *dev = pc->dev;
163 bool period_same = false;
164 int ret;
165
166 ncfg = hweight_long(pc->configured);
167 if (ncfg)
168 period_same = (period_ns == pwm_get_period(cur));
169
170 /*
171 * Allow configuration changes if one of the following conditions
172 * satisfy.
173 * 1. No devices have been configured.
174 * 2. Only one device has been configured and the new request is for
175 * the same device.
176 * 3. Only one device has been configured and the new request is for
177 * a new device and period of the new device is same as the current
178 * configured period.
179 * 4. More than one devices are configured and period of the new
180 * requestis the same as the current period.
181 */
182 if (!ncfg ||
183 ((ncfg == 1) && (pwm->hwpwm == cur->hwpwm)) ||
184 ((ncfg == 1) && (pwm->hwpwm != cur->hwpwm) && period_same) ||
185 ((ncfg > 1) && period_same)) {
186 /* Enable clock before writing to PWM registers. */
187 ret = clk_enable(pc->pwm_clk);
188 if (ret)
189 return ret;
190
191 ret = clk_enable(pc->cpt_clk);
192 if (ret)
193 return ret;
194
195 if (!period_same) {
196 ret = sti_pwm_get_prescale(pc, period_ns, &prescale);
197 if (ret)
198 goto clk_dis;
199
200 value = prescale & PWM_PRESCALE_LOW_MASK;
201
202 ret = regmap_field_write(pc->prescale_low, value);
203 if (ret)
204 goto clk_dis;
205
206 value = (prescale & PWM_PRESCALE_HIGH_MASK) >> 4;
207
208 ret = regmap_field_write(pc->prescale_high, value);
209 if (ret)
210 goto clk_dis;
211 }
212
213 /*
214 * When PWMVal == 0, PWM pulse = 1 local clock cycle.
215 * When PWMVal == max_pwm_count,
216 * PWM pulse = (max_pwm_count + 1) local cycles,
217 * that is continuous pulse: signal never goes low.
218 */
219 value = pc->max_pwm_cnt * duty_ns / period_ns;
220
221 ret = regmap_write(pc->regmap, PWM_OUT_VAL(pwm->hwpwm), value);
222 if (ret)
223 goto clk_dis;
224
225 ret = regmap_field_write(pc->pwm_cpt_int_en, 0);
226
227 set_bit(pwm->hwpwm, &pc->configured);
228 pc->cur = pwm;
229
230 dev_dbg(dev, "prescale:%u, period:%i, duty:%i, value:%u\n",
231 prescale, period_ns, duty_ns, value);
232 } else {
233 return -EINVAL;
234 }
235
236 clk_dis:
237 clk_disable(pc->pwm_clk);
238 clk_disable(pc->cpt_clk);
239 return ret;
240 }
241
sti_pwm_enable(struct pwm_chip * chip,struct pwm_device * pwm)242 static int sti_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
243 {
244 struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
245 struct device *dev = pc->dev;
246 int ret;
247
248 /*
249 * Since we have a common enable for all PWM devices, do not enable if
250 * already enabled.
251 */
252
253 if (!pc->en_count) {
254 ret = clk_enable(pc->pwm_clk);
255 if (ret)
256 return ret;
257
258 ret = clk_enable(pc->cpt_clk);
259 if (ret)
260 return ret;
261
262 ret = regmap_field_write(pc->pwm_out_en, 1);
263 if (ret) {
264 dev_err(dev, "failed to enable PWM device %u: %d\n",
265 pwm->hwpwm, ret);
266 return ret;
267 }
268 }
269
270 pc->en_count++;
271
272 return 0;
273 }
274
sti_pwm_disable(struct pwm_chip * chip,struct pwm_device * pwm)275 static void sti_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
276 {
277 struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
278
279 if (--pc->en_count)
280 return;
281
282 regmap_field_write(pc->pwm_out_en, 0);
283
284 clk_disable(pc->pwm_clk);
285 clk_disable(pc->cpt_clk);
286 }
287
sti_pwm_free(struct pwm_chip * chip,struct pwm_device * pwm)288 static void sti_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
289 {
290 struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
291
292 clear_bit(pwm->hwpwm, &pc->configured);
293 }
294
sti_pwm_capture(struct pwm_chip * chip,struct pwm_device * pwm,struct pwm_capture * result,unsigned long timeout)295 static int sti_pwm_capture(struct pwm_chip *chip, struct pwm_device *pwm,
296 struct pwm_capture *result, unsigned long timeout)
297 {
298 struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
299 struct sti_cpt_ddata *ddata = &pc->ddata[pwm->hwpwm];
300 struct device *dev = pc->dev;
301 unsigned int effective_ticks;
302 unsigned long long high, low;
303 int ret;
304
305 if (pwm->hwpwm >= pc->cpt_num_devs) {
306 dev_err(dev, "device %u is not valid\n", pwm->hwpwm);
307 return -EINVAL;
308 }
309
310 mutex_lock(&ddata->lock);
311 ddata->index = 0;
312
313 /* Prepare capture measurement */
314 regmap_write(pc->regmap, PWM_CPT_EDGE(pwm->hwpwm), CPT_EDGE_RISING);
315 regmap_field_write(pc->pwm_cpt_int_en, BIT(pwm->hwpwm));
316
317 /* Enable capture */
318 ret = regmap_field_write(pc->pwm_cpt_en, 1);
319 if (ret) {
320 dev_err(dev, "failed to enable PWM capture %u: %d\n",
321 pwm->hwpwm, ret);
322 goto out;
323 }
324
325 ret = wait_event_interruptible_timeout(ddata->wait, ddata->index > 1,
326 msecs_to_jiffies(timeout));
327
328 regmap_write(pc->regmap, PWM_CPT_EDGE(pwm->hwpwm), CPT_EDGE_DISABLED);
329
330 if (ret == -ERESTARTSYS)
331 goto out;
332
333 switch (ddata->index) {
334 case 0:
335 case 1:
336 /*
337 * Getting here could mean:
338 * - input signal is constant of less than 1 Hz
339 * - there is no input signal at all
340 *
341 * In such case the frequency is rounded down to 0
342 */
343 result->period = 0;
344 result->duty_cycle = 0;
345
346 break;
347
348 case 2:
349 /* We have everying we need */
350 high = ddata->snapshot[1] - ddata->snapshot[0];
351 low = ddata->snapshot[2] - ddata->snapshot[1];
352
353 effective_ticks = clk_get_rate(pc->cpt_clk);
354
355 result->period = (high + low) * NSEC_PER_SEC;
356 result->period /= effective_ticks;
357
358 result->duty_cycle = high * NSEC_PER_SEC;
359 result->duty_cycle /= effective_ticks;
360
361 break;
362
363 default:
364 dev_err(dev, "internal error\n");
365 break;
366 }
367
368 out:
369 /* Disable capture */
370 regmap_field_write(pc->pwm_cpt_en, 0);
371
372 mutex_unlock(&ddata->lock);
373 return ret;
374 }
375
sti_pwm_apply(struct pwm_chip * chip,struct pwm_device * pwm,const struct pwm_state * state)376 static int sti_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
377 const struct pwm_state *state)
378 {
379 struct sti_pwm_chip *pc = to_sti_pwmchip(chip);
380 struct device *dev = pc->dev;
381 int err;
382
383 if (pwm->hwpwm >= pc->pwm_num_devs) {
384 dev_err(dev, "device %u is not valid for pwm mode\n",
385 pwm->hwpwm);
386 return -EINVAL;
387 }
388
389 if (state->polarity != PWM_POLARITY_NORMAL)
390 return -EINVAL;
391
392 if (!state->enabled) {
393 if (pwm->state.enabled)
394 sti_pwm_disable(chip, pwm);
395
396 return 0;
397 }
398
399 err = sti_pwm_config(chip, pwm, state->duty_cycle, state->period);
400 if (err)
401 return err;
402
403 if (!pwm->state.enabled)
404 err = sti_pwm_enable(chip, pwm);
405
406 return err;
407 }
408
409 static const struct pwm_ops sti_pwm_ops = {
410 .capture = sti_pwm_capture,
411 .apply = sti_pwm_apply,
412 .free = sti_pwm_free,
413 };
414
sti_pwm_interrupt(int irq,void * data)415 static irqreturn_t sti_pwm_interrupt(int irq, void *data)
416 {
417 struct sti_pwm_chip *pc = data;
418 struct device *dev = pc->dev;
419 struct sti_cpt_ddata *ddata;
420 int devicenum;
421 unsigned int cpt_int_stat;
422 unsigned int reg;
423 int ret = IRQ_NONE;
424
425 ret = regmap_field_read(pc->pwm_cpt_int_stat, &cpt_int_stat);
426 if (ret)
427 return ret;
428
429 while (cpt_int_stat) {
430 devicenum = ffs(cpt_int_stat) - 1;
431
432 ddata = &pc->ddata[devicenum];
433
434 /*
435 * Capture input:
436 * _______ _______
437 * | | | |
438 * __| |_________________| |________
439 * ^0 ^1 ^2
440 *
441 * Capture start by the first available rising edge. When a
442 * capture event occurs, capture value (CPT_VALx) is stored,
443 * index incremented, capture edge changed.
444 *
445 * After the capture, if the index > 1, we have collected the
446 * necessary data so we signal the thread waiting for it and
447 * disable the capture by setting capture edge to none
448 */
449
450 regmap_read(pc->regmap,
451 PWM_CPT_VAL(devicenum),
452 &ddata->snapshot[ddata->index]);
453
454 switch (ddata->index) {
455 case 0:
456 case 1:
457 regmap_read(pc->regmap, PWM_CPT_EDGE(devicenum), ®);
458 reg ^= PWM_CPT_EDGE_MASK;
459 regmap_write(pc->regmap, PWM_CPT_EDGE(devicenum), reg);
460
461 ddata->index++;
462 break;
463
464 case 2:
465 regmap_write(pc->regmap,
466 PWM_CPT_EDGE(devicenum),
467 CPT_EDGE_DISABLED);
468 wake_up(&ddata->wait);
469 break;
470
471 default:
472 dev_err(dev, "Internal error\n");
473 }
474
475 cpt_int_stat &= ~BIT_MASK(devicenum);
476
477 ret = IRQ_HANDLED;
478 }
479
480 /* Just ACK everything */
481 regmap_write(pc->regmap, PWM_INT_ACK, PWM_INT_ACK_MASK);
482
483 return ret;
484 }
485
sti_pwm_probe_regmap(struct sti_pwm_chip * pc)486 static int sti_pwm_probe_regmap(struct sti_pwm_chip *pc)
487 {
488 struct device *dev = pc->dev;
489
490 pc->prescale_low = devm_regmap_field_alloc(dev, pc->regmap,
491 sti_pwm_regfields[PWMCLK_PRESCALE_LOW]);
492 if (IS_ERR(pc->prescale_low))
493 return PTR_ERR(pc->prescale_low);
494
495 pc->prescale_high = devm_regmap_field_alloc(dev, pc->regmap,
496 sti_pwm_regfields[PWMCLK_PRESCALE_HIGH]);
497 if (IS_ERR(pc->prescale_high))
498 return PTR_ERR(pc->prescale_high);
499
500 pc->pwm_out_en = devm_regmap_field_alloc(dev, pc->regmap,
501 sti_pwm_regfields[PWM_OUT_EN]);
502 if (IS_ERR(pc->pwm_out_en))
503 return PTR_ERR(pc->pwm_out_en);
504
505 pc->pwm_cpt_en = devm_regmap_field_alloc(dev, pc->regmap,
506 sti_pwm_regfields[PWM_CPT_EN]);
507 if (IS_ERR(pc->pwm_cpt_en))
508 return PTR_ERR(pc->pwm_cpt_en);
509
510 pc->pwm_cpt_int_en = devm_regmap_field_alloc(dev, pc->regmap,
511 sti_pwm_regfields[PWM_CPT_INT_EN]);
512 if (IS_ERR(pc->pwm_cpt_int_en))
513 return PTR_ERR(pc->pwm_cpt_int_en);
514
515 pc->pwm_cpt_int_stat = devm_regmap_field_alloc(dev, pc->regmap,
516 sti_pwm_regfields[PWM_CPT_INT_STAT]);
517 if (PTR_ERR_OR_ZERO(pc->pwm_cpt_int_stat))
518 return PTR_ERR(pc->pwm_cpt_int_stat);
519
520 return 0;
521 }
522
523 static const struct regmap_config sti_pwm_regmap_config = {
524 .reg_bits = 32,
525 .val_bits = 32,
526 .reg_stride = 4,
527 };
528
sti_pwm_probe(struct platform_device * pdev)529 static int sti_pwm_probe(struct platform_device *pdev)
530 {
531 struct device *dev = &pdev->dev;
532 struct device_node *np = dev->of_node;
533 u32 num_devs;
534 unsigned int pwm_num_devs = 0;
535 unsigned int cpt_num_devs = 0;
536 struct pwm_chip *chip;
537 struct sti_pwm_chip *pc;
538 unsigned int i;
539 int irq, ret;
540
541 ret = of_property_read_u32(np, "st,pwm-num-chan", &num_devs);
542 if (!ret)
543 pwm_num_devs = num_devs;
544
545 ret = of_property_read_u32(np, "st,capture-num-chan", &num_devs);
546 if (!ret)
547 cpt_num_devs = num_devs;
548
549 if (!pwm_num_devs && !cpt_num_devs)
550 return dev_err_probe(dev, -EINVAL, "No channels configured\n");
551
552 chip = devm_pwmchip_alloc(dev, max(pwm_num_devs, cpt_num_devs), sizeof(*pc));
553 if (IS_ERR(chip))
554 return PTR_ERR(chip);
555 pc = to_sti_pwmchip(chip);
556
557 pc->mmio = devm_platform_ioremap_resource(pdev, 0);
558 if (IS_ERR(pc->mmio))
559 return PTR_ERR(pc->mmio);
560
561 pc->regmap = devm_regmap_init_mmio(dev, pc->mmio,
562 &sti_pwm_regmap_config);
563 if (IS_ERR(pc->regmap))
564 return dev_err_probe(dev, PTR_ERR(pc->regmap),
565 "Failed to initialize regmap\n");
566
567 irq = platform_get_irq(pdev, 0);
568 if (irq < 0)
569 return irq;
570
571 ret = devm_request_irq(&pdev->dev, irq, sti_pwm_interrupt, 0,
572 pdev->name, pc);
573 if (ret < 0)
574 dev_err_probe(&pdev->dev, ret, "Failed to request IRQ\n");
575
576 /*
577 * Setup PWM data with default values: some values could be replaced
578 * with specific ones provided from Device Tree.
579 */
580 pc->max_prescale = 0xff;
581 pc->max_pwm_cnt = 255;
582 pc->pwm_num_devs = pwm_num_devs;
583 pc->cpt_num_devs = cpt_num_devs;
584
585 pc->dev = dev;
586 pc->en_count = 0;
587
588 ret = sti_pwm_probe_regmap(pc);
589 if (ret)
590 return dev_err_probe(dev, ret, "Failed to initialize regmap fields\n");
591
592 if (pwm_num_devs) {
593 pc->pwm_clk = devm_clk_get_prepared(dev, "pwm");
594 if (IS_ERR(pc->pwm_clk))
595 return dev_err_probe(dev, PTR_ERR(pc->pwm_clk),
596 "failed to get PWM clock\n");
597 }
598
599 if (cpt_num_devs) {
600 pc->cpt_clk = devm_clk_get_prepared(dev, "capture");
601 if (IS_ERR(pc->cpt_clk))
602 return dev_err_probe(dev, PTR_ERR(pc->cpt_clk),
603 "failed to get PWM capture clock\n");
604
605 pc->ddata = devm_kcalloc(dev, cpt_num_devs,
606 sizeof(*pc->ddata), GFP_KERNEL);
607 if (!pc->ddata)
608 return -ENOMEM;
609
610 for (i = 0; i < cpt_num_devs; i++) {
611 struct sti_cpt_ddata *ddata = &pc->ddata[i];
612
613 init_waitqueue_head(&ddata->wait);
614 mutex_init(&ddata->lock);
615 }
616 }
617
618 chip->ops = &sti_pwm_ops;
619
620 ret = devm_pwmchip_add(dev, chip);
621 if (ret)
622 return dev_err_probe(dev, ret, "Failed to register pwm chip\n");
623
624 return 0;
625 }
626
627 static const struct of_device_id sti_pwm_of_match[] = {
628 { .compatible = "st,sti-pwm", },
629 { /* sentinel */ }
630 };
631 MODULE_DEVICE_TABLE(of, sti_pwm_of_match);
632
633 static struct platform_driver sti_pwm_driver = {
634 .driver = {
635 .name = "sti-pwm",
636 .of_match_table = sti_pwm_of_match,
637 },
638 .probe = sti_pwm_probe,
639 };
640 module_platform_driver(sti_pwm_driver);
641
642 MODULE_AUTHOR("Ajit Pal Singh <ajitpal.singh@st.com>");
643 MODULE_DESCRIPTION("STMicroelectronics ST PWM driver");
644 MODULE_LICENSE("GPL");
645