1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * max31790.c - Part of lm_sensors, Linux kernel modules for hardware 4 * monitoring. 5 * 6 * (C) 2015 by Il Han <corone.il.han@gmail.com> 7 */ 8 9 #include <linux/err.h> 10 #include <linux/hwmon.h> 11 #include <linux/i2c.h> 12 #include <linux/init.h> 13 #include <linux/jiffies.h> 14 #include <linux/module.h> 15 #include <linux/slab.h> 16 17 /* MAX31790 registers */ 18 #define MAX31790_REG_GLOBAL_CONFIG 0x00 19 #define MAX31790_REG_FAN_CONFIG(ch) (0x02 + (ch)) 20 #define MAX31790_REG_FAN_DYNAMICS(ch) (0x08 + (ch)) 21 #define MAX31790_REG_FAN_FAULT_STATUS2 0x10 22 #define MAX31790_REG_FAN_FAULT_STATUS1 0x11 23 #define MAX31790_REG_TACH_COUNT(ch) (0x18 + (ch) * 2) 24 #define MAX31790_REG_PWM_DUTY_CYCLE(ch) (0x30 + (ch) * 2) 25 #define MAX31790_REG_PWMOUT(ch) (0x40 + (ch) * 2) 26 #define MAX31790_REG_TARGET_COUNT(ch) (0x50 + (ch) * 2) 27 28 /* Fan Config register bits */ 29 #define MAX31790_FAN_CFG_RPM_MODE 0x80 30 #define MAX31790_FAN_CFG_CTRL_MON 0x10 31 #define MAX31790_FAN_CFG_TACH_INPUT_EN 0x08 32 #define MAX31790_FAN_CFG_TACH_INPUT 0x01 33 34 /* Fan Dynamics register bits */ 35 #define MAX31790_FAN_DYN_SR_SHIFT 5 36 #define MAX31790_FAN_DYN_SR_MASK 0xE0 37 #define SR_FROM_REG(reg) (((reg) & MAX31790_FAN_DYN_SR_MASK) \ 38 >> MAX31790_FAN_DYN_SR_SHIFT) 39 40 #define FAN_RPM_MIN 120 41 #define FAN_RPM_MAX 7864320 42 43 #define FAN_COUNT_REG_MAX 0xffe0 44 45 #define RPM_FROM_REG(reg, sr) (((reg) >> 4) ? \ 46 ((60 * (sr) * 8192) / ((reg) >> 4)) : \ 47 FAN_RPM_MAX) 48 #define RPM_TO_REG(rpm, sr) ((60 * (sr) * 8192) / ((rpm) * 2)) 49 50 #define NR_CHANNEL 6 51 52 #define PWM_INPUT_SCALE 255 53 #define MAX31790_REG_PWMOUT_SCALE 511 54 55 /* 56 * Client data (each client gets its own) 57 */ 58 struct max31790_data { 59 struct i2c_client *client; 60 bool valid; /* zero until following fields are valid */ 61 unsigned long last_updated; /* in jiffies */ 62 63 /* register values */ 64 u8 fan_config[NR_CHANNEL]; 65 u8 fan_dynamics[NR_CHANNEL]; 66 u16 fault_status; 67 u16 tach[NR_CHANNEL * 2]; 68 u16 pwm[NR_CHANNEL]; 69 u16 target_count[NR_CHANNEL]; 70 }; 71 72 static struct max31790_data *max31790_update_device(struct device *dev) 73 { 74 struct max31790_data *data = dev_get_drvdata(dev); 75 struct i2c_client *client = data->client; 76 int i, rv; 77 78 if (time_after(jiffies, data->last_updated + HZ) || !data->valid) { 79 data->valid = false; 80 rv = i2c_smbus_read_byte_data(client, 81 MAX31790_REG_FAN_FAULT_STATUS1); 82 if (rv < 0) 83 return ERR_PTR(rv); 84 data->fault_status |= rv & 0x3F; 85 86 rv = i2c_smbus_read_byte_data(client, 87 MAX31790_REG_FAN_FAULT_STATUS2); 88 if (rv < 0) 89 return ERR_PTR(rv); 90 data->fault_status |= (rv & 0x3F) << 6; 91 92 for (i = 0; i < NR_CHANNEL; i++) { 93 rv = i2c_smbus_read_word_swapped(client, 94 MAX31790_REG_TACH_COUNT(i)); 95 if (rv < 0) 96 return ERR_PTR(rv); 97 data->tach[i] = rv; 98 99 if (data->fan_config[i] 100 & MAX31790_FAN_CFG_TACH_INPUT) { 101 rv = i2c_smbus_read_word_swapped(client, 102 MAX31790_REG_TACH_COUNT(NR_CHANNEL 103 + i)); 104 if (rv < 0) 105 return ERR_PTR(rv); 106 data->tach[NR_CHANNEL + i] = rv; 107 } else { 108 rv = i2c_smbus_read_word_swapped(client, 109 MAX31790_REG_PWM_DUTY_CYCLE(i)); 110 if (rv < 0) 111 return ERR_PTR(rv); 112 data->pwm[i] = rv; 113 114 rv = i2c_smbus_read_word_swapped(client, 115 MAX31790_REG_TARGET_COUNT(i)); 116 if (rv < 0) 117 return ERR_PTR(rv); 118 data->target_count[i] = rv; 119 } 120 } 121 122 data->last_updated = jiffies; 123 data->valid = true; 124 } 125 return data; 126 } 127 128 static const u8 tach_period[8] = { 1, 2, 4, 8, 16, 32, 32, 32 }; 129 130 static u8 get_tach_period(u8 fan_dynamics) 131 { 132 return tach_period[SR_FROM_REG(fan_dynamics)]; 133 } 134 135 static u8 bits_for_tach_period(int rpm) 136 { 137 u8 bits; 138 139 if (rpm < 500) 140 bits = 0x0; 141 else if (rpm < 1000) 142 bits = 0x1; 143 else if (rpm < 2000) 144 bits = 0x2; 145 else if (rpm < 4000) 146 bits = 0x3; 147 else if (rpm < 8000) 148 bits = 0x4; 149 else 150 bits = 0x5; 151 152 return bits; 153 } 154 155 static int max31790_read_fan(struct device *dev, u32 attr, int channel, 156 long *val) 157 { 158 struct max31790_data *data = max31790_update_device(dev); 159 int sr, rpm; 160 161 if (IS_ERR(data)) 162 return PTR_ERR(data); 163 164 switch (attr) { 165 case hwmon_fan_input: 166 sr = get_tach_period(data->fan_dynamics[channel % NR_CHANNEL]); 167 if (data->tach[channel] == FAN_COUNT_REG_MAX) 168 rpm = 0; 169 else 170 rpm = RPM_FROM_REG(data->tach[channel], sr); 171 *val = rpm; 172 return 0; 173 case hwmon_fan_target: 174 sr = get_tach_period(data->fan_dynamics[channel]); 175 rpm = RPM_FROM_REG(data->target_count[channel], sr); 176 *val = rpm; 177 return 0; 178 case hwmon_fan_fault: 179 *val = !!(data->fault_status & (1 << channel)); 180 data->fault_status &= ~(1 << channel); 181 /* 182 * If a fault bit is set, we need to write into one of the fan 183 * configuration registers to clear it. Note that this also 184 * clears the fault for the companion channel if enabled. 185 */ 186 if (*val) { 187 int reg = MAX31790_REG_TARGET_COUNT(channel % NR_CHANNEL); 188 189 return i2c_smbus_write_byte_data(data->client, reg, 190 data->target_count[channel % NR_CHANNEL] >> 8); 191 } 192 return 0; 193 case hwmon_fan_enable: 194 *val = !!(data->fan_config[channel] & MAX31790_FAN_CFG_TACH_INPUT_EN); 195 return 0; 196 default: 197 return -EOPNOTSUPP; 198 } 199 } 200 201 static int max31790_write_fan(struct device *dev, u32 attr, int channel, 202 long val) 203 { 204 struct max31790_data *data = dev_get_drvdata(dev); 205 struct i2c_client *client = data->client; 206 int target_count; 207 int err = 0; 208 u8 bits, fan_config; 209 int sr; 210 211 switch (attr) { 212 case hwmon_fan_target: 213 val = clamp_val(val, FAN_RPM_MIN, FAN_RPM_MAX); 214 bits = bits_for_tach_period(val); 215 data->fan_dynamics[channel] = 216 ((data->fan_dynamics[channel] & 217 ~MAX31790_FAN_DYN_SR_MASK) | 218 (bits << MAX31790_FAN_DYN_SR_SHIFT)); 219 err = i2c_smbus_write_byte_data(client, 220 MAX31790_REG_FAN_DYNAMICS(channel), 221 data->fan_dynamics[channel]); 222 if (err < 0) 223 break; 224 225 sr = get_tach_period(data->fan_dynamics[channel]); 226 target_count = RPM_TO_REG(val, sr); 227 target_count = clamp_val(target_count, 0x1, 0x7FF); 228 229 data->target_count[channel] = target_count << 5; 230 231 err = i2c_smbus_write_word_swapped(client, 232 MAX31790_REG_TARGET_COUNT(channel), 233 data->target_count[channel]); 234 break; 235 case hwmon_fan_enable: 236 fan_config = data->fan_config[channel]; 237 if (val == 0) { 238 fan_config &= ~MAX31790_FAN_CFG_TACH_INPUT_EN; 239 } else if (val == 1) { 240 fan_config |= MAX31790_FAN_CFG_TACH_INPUT_EN; 241 } else { 242 err = -EINVAL; 243 break; 244 } 245 if (fan_config != data->fan_config[channel]) { 246 err = i2c_smbus_write_byte_data(client, MAX31790_REG_FAN_CONFIG(channel), 247 fan_config); 248 if (!err) 249 data->fan_config[channel] = fan_config; 250 } 251 break; 252 default: 253 err = -EOPNOTSUPP; 254 break; 255 } 256 return err; 257 } 258 259 static umode_t max31790_fan_is_visible(const void *_data, u32 attr, int channel) 260 { 261 const struct max31790_data *data = _data; 262 u8 fan_config = data->fan_config[channel % NR_CHANNEL]; 263 264 switch (attr) { 265 case hwmon_fan_input: 266 case hwmon_fan_fault: 267 if (channel < NR_CHANNEL || 268 (fan_config & MAX31790_FAN_CFG_TACH_INPUT)) 269 return 0444; 270 return 0; 271 case hwmon_fan_target: 272 if (channel < NR_CHANNEL && 273 !(fan_config & MAX31790_FAN_CFG_TACH_INPUT)) 274 return 0644; 275 return 0; 276 case hwmon_fan_enable: 277 if (channel < NR_CHANNEL) 278 return 0644; 279 return 0; 280 default: 281 return 0; 282 } 283 } 284 285 static int max31790_read_pwm(struct device *dev, u32 attr, int channel, 286 long *val) 287 { 288 struct max31790_data *data = max31790_update_device(dev); 289 u8 fan_config; 290 291 if (IS_ERR(data)) 292 return PTR_ERR(data); 293 294 fan_config = data->fan_config[channel]; 295 296 switch (attr) { 297 case hwmon_pwm_input: 298 *val = data->pwm[channel] >> 8; 299 return 0; 300 case hwmon_pwm_enable: 301 if (fan_config & MAX31790_FAN_CFG_CTRL_MON) 302 *val = 0; 303 else if (fan_config & MAX31790_FAN_CFG_RPM_MODE) 304 *val = 2; 305 else 306 *val = 1; 307 return 0; 308 default: 309 return -EOPNOTSUPP; 310 } 311 } 312 313 static int max31790_write_pwm(struct device *dev, u32 attr, int channel, 314 long val) 315 { 316 struct max31790_data *data = dev_get_drvdata(dev); 317 struct i2c_client *client = data->client; 318 u8 fan_config; 319 int err = 0; 320 321 switch (attr) { 322 case hwmon_pwm_input: 323 if (val < 0 || val > 255) { 324 err = -EINVAL; 325 break; 326 } 327 328 val = DIV_ROUND_CLOSEST(val * MAX31790_REG_PWMOUT_SCALE, 329 PWM_INPUT_SCALE); 330 data->valid = false; 331 err = i2c_smbus_write_word_swapped(client, 332 MAX31790_REG_PWMOUT(channel), 333 val << 7); 334 break; 335 case hwmon_pwm_enable: 336 fan_config = data->fan_config[channel]; 337 if (val == 0) { 338 fan_config |= MAX31790_FAN_CFG_CTRL_MON; 339 /* 340 * Disable RPM mode; otherwise disabling fan speed 341 * monitoring is not possible. 342 */ 343 fan_config &= ~MAX31790_FAN_CFG_RPM_MODE; 344 } else if (val == 1) { 345 fan_config &= ~(MAX31790_FAN_CFG_CTRL_MON | MAX31790_FAN_CFG_RPM_MODE); 346 } else if (val == 2) { 347 fan_config &= ~MAX31790_FAN_CFG_CTRL_MON; 348 /* 349 * The chip sets MAX31790_FAN_CFG_TACH_INPUT_EN on its 350 * own if MAX31790_FAN_CFG_RPM_MODE is set. 351 * Do it here as well to reflect the actual register 352 * value in the cache. 353 */ 354 fan_config |= (MAX31790_FAN_CFG_RPM_MODE | MAX31790_FAN_CFG_TACH_INPUT_EN); 355 } else { 356 err = -EINVAL; 357 break; 358 } 359 if (fan_config != data->fan_config[channel]) { 360 err = i2c_smbus_write_byte_data(client, MAX31790_REG_FAN_CONFIG(channel), 361 fan_config); 362 if (!err) 363 data->fan_config[channel] = fan_config; 364 } 365 break; 366 default: 367 err = -EOPNOTSUPP; 368 break; 369 } 370 return err; 371 } 372 373 static umode_t max31790_pwm_is_visible(const void *_data, u32 attr, int channel) 374 { 375 const struct max31790_data *data = _data; 376 u8 fan_config = data->fan_config[channel]; 377 378 switch (attr) { 379 case hwmon_pwm_input: 380 case hwmon_pwm_enable: 381 if (!(fan_config & MAX31790_FAN_CFG_TACH_INPUT)) 382 return 0644; 383 return 0; 384 default: 385 return 0; 386 } 387 } 388 389 static int max31790_read(struct device *dev, enum hwmon_sensor_types type, 390 u32 attr, int channel, long *val) 391 { 392 switch (type) { 393 case hwmon_fan: 394 return max31790_read_fan(dev, attr, channel, val); 395 case hwmon_pwm: 396 return max31790_read_pwm(dev, attr, channel, val); 397 default: 398 return -EOPNOTSUPP; 399 } 400 } 401 402 static int max31790_write(struct device *dev, enum hwmon_sensor_types type, 403 u32 attr, int channel, long val) 404 { 405 switch (type) { 406 case hwmon_fan: 407 return max31790_write_fan(dev, attr, channel, val); 408 case hwmon_pwm: 409 return max31790_write_pwm(dev, attr, channel, val); 410 default: 411 return -EOPNOTSUPP; 412 } 413 } 414 415 static umode_t max31790_is_visible(const void *data, 416 enum hwmon_sensor_types type, 417 u32 attr, int channel) 418 { 419 switch (type) { 420 case hwmon_fan: 421 return max31790_fan_is_visible(data, attr, channel); 422 case hwmon_pwm: 423 return max31790_pwm_is_visible(data, attr, channel); 424 default: 425 return 0; 426 } 427 } 428 429 static const struct hwmon_channel_info * const max31790_info[] = { 430 HWMON_CHANNEL_INFO(fan, 431 HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT | HWMON_F_ENABLE, 432 HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT | HWMON_F_ENABLE, 433 HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT | HWMON_F_ENABLE, 434 HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT | HWMON_F_ENABLE, 435 HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT | HWMON_F_ENABLE, 436 HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_FAULT | HWMON_F_ENABLE, 437 HWMON_F_INPUT | HWMON_F_FAULT, 438 HWMON_F_INPUT | HWMON_F_FAULT, 439 HWMON_F_INPUT | HWMON_F_FAULT, 440 HWMON_F_INPUT | HWMON_F_FAULT, 441 HWMON_F_INPUT | HWMON_F_FAULT, 442 HWMON_F_INPUT | HWMON_F_FAULT), 443 HWMON_CHANNEL_INFO(pwm, 444 HWMON_PWM_INPUT | HWMON_PWM_ENABLE, 445 HWMON_PWM_INPUT | HWMON_PWM_ENABLE, 446 HWMON_PWM_INPUT | HWMON_PWM_ENABLE, 447 HWMON_PWM_INPUT | HWMON_PWM_ENABLE, 448 HWMON_PWM_INPUT | HWMON_PWM_ENABLE, 449 HWMON_PWM_INPUT | HWMON_PWM_ENABLE), 450 NULL 451 }; 452 453 static const struct hwmon_ops max31790_hwmon_ops = { 454 .is_visible = max31790_is_visible, 455 .read = max31790_read, 456 .write = max31790_write, 457 }; 458 459 static const struct hwmon_chip_info max31790_chip_info = { 460 .ops = &max31790_hwmon_ops, 461 .info = max31790_info, 462 }; 463 464 static int max31790_init_client(struct i2c_client *client, 465 struct max31790_data *data) 466 { 467 int i, rv; 468 469 for (i = 0; i < NR_CHANNEL; i++) { 470 rv = i2c_smbus_read_byte_data(client, 471 MAX31790_REG_FAN_CONFIG(i)); 472 if (rv < 0) 473 return rv; 474 data->fan_config[i] = rv; 475 476 rv = i2c_smbus_read_byte_data(client, 477 MAX31790_REG_FAN_DYNAMICS(i)); 478 if (rv < 0) 479 return rv; 480 data->fan_dynamics[i] = rv; 481 } 482 483 return 0; 484 } 485 486 static int max31790_probe(struct i2c_client *client) 487 { 488 struct i2c_adapter *adapter = client->adapter; 489 struct device *dev = &client->dev; 490 struct max31790_data *data; 491 struct device *hwmon_dev; 492 int err; 493 494 if (!i2c_check_functionality(adapter, 495 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA)) 496 return -ENODEV; 497 498 data = devm_kzalloc(dev, sizeof(struct max31790_data), GFP_KERNEL); 499 if (!data) 500 return -ENOMEM; 501 502 data->client = client; 503 504 /* 505 * Initialize the max31790 chip 506 */ 507 err = max31790_init_client(client, data); 508 if (err) 509 return err; 510 511 hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name, 512 data, 513 &max31790_chip_info, 514 NULL); 515 516 return PTR_ERR_OR_ZERO(hwmon_dev); 517 } 518 519 static const struct i2c_device_id max31790_id[] = { 520 { "max31790" }, 521 { } 522 }; 523 MODULE_DEVICE_TABLE(i2c, max31790_id); 524 525 static struct i2c_driver max31790_driver = { 526 .probe = max31790_probe, 527 .driver = { 528 .name = "max31790", 529 }, 530 .id_table = max31790_id, 531 }; 532 533 module_i2c_driver(max31790_driver); 534 535 MODULE_AUTHOR("Il Han <corone.il.han@gmail.com>"); 536 MODULE_DESCRIPTION("MAX31790 sensor driver"); 537 MODULE_LICENSE("GPL"); 538