xref: /linux/arch/m68k/68000/timers.c (revision 0ea5c948cb64bab5bc7a5516774eb8536f05aa0d)
1 /***************************************************************************/
2 
3 /*
4  *  timers.c - Generic hardware timer support.
5  *
6  *  Copyright (C) 1993 Hamish Macdonald
7  *  Copyright (C) 1999 D. Jeff Dionne
8  *  Copyright (C) 2001 Georges Menie, Ken Desmet
9  *
10  * This file is subject to the terms and conditions of the GNU General Public
11  * License.  See the file COPYING in the main directory of this archive
12  * for more details.
13  */
14 
15 /***************************************************************************/
16 
17 #include <linux/types.h>
18 #include <linux/kernel.h>
19 #include <linux/mm.h>
20 #include <linux/interrupt.h>
21 #include <linux/irq.h>
22 #include <linux/clocksource.h>
23 #include <linux/rtc.h>
24 #include <asm/setup.h>
25 #include <asm/machdep.h>
26 #include <asm/MC68VZ328.h>
27 
28 #include "m68328.h"
29 
30 /***************************************************************************/
31 
32 #if defined(CONFIG_DRAGEN2)
33 /* with a 33.16 MHz clock, this will give usec resolution to the time functions */
34 #define CLOCK_SOURCE	TCTL_CLKSOURCE_SYSCLK
35 #define CLOCK_PRE	7
36 #define TICKS_PER_JIFFY	41450
37 
38 #elif defined(CONFIG_XCOPILOT_BUGS)
39 /*
40  * The only thing I know is that CLK32 is not available on Xcopilot
41  * I have little idea about what frequency SYSCLK has on Xcopilot.
42  * The values for prescaler and compare registers were simply
43  * taken from the original source
44  */
45 #define CLOCK_SOURCE	TCTL_CLKSOURCE_SYSCLK
46 #define CLOCK_PRE	2
47 #define TICKS_PER_JIFFY	0xd7e4
48 
49 #else
50 /* default to using the 32Khz clock */
51 #define CLOCK_SOURCE	TCTL_CLKSOURCE_32KHZ
52 #define CLOCK_PRE	31
53 #define TICKS_PER_JIFFY	10
54 #endif
55 
56 static u32 m68328_tick_cnt;
57 
58 /***************************************************************************/
59 
hw_tick(int irq,void * dummy)60 static irqreturn_t hw_tick(int irq, void *dummy)
61 {
62 	/* Reset Timer1 */
63 	TSTAT &= 0;
64 
65 	m68328_tick_cnt += TICKS_PER_JIFFY;
66 	legacy_timer_tick(1);
67 	return IRQ_HANDLED;
68 }
69 
70 /***************************************************************************/
71 
m68328_read_clk(struct clocksource * cs)72 static u64 m68328_read_clk(struct clocksource *cs)
73 {
74 	unsigned long flags;
75 	u32 cycles;
76 
77 	local_irq_save(flags);
78 	cycles = m68328_tick_cnt + TCN;
79 	local_irq_restore(flags);
80 
81 	return cycles;
82 }
83 
84 /***************************************************************************/
85 
86 static struct clocksource m68328_clk = {
87 	.name	= "timer",
88 	.rating	= 250,
89 	.read	= m68328_read_clk,
90 	.mask	= CLOCKSOURCE_MASK(32),
91 	.flags	= CLOCK_SOURCE_IS_CONTINUOUS,
92 };
93 
94 /***************************************************************************/
95 
hw_timer_init(void)96 void hw_timer_init(void)
97 {
98 	int ret;
99 
100 	/* disable timer 1 */
101 	TCTL = 0;
102 
103 	/* set ISR */
104 	ret = request_irq(TMR_IRQ_NUM, hw_tick, IRQF_TIMER, "timer", NULL);
105 	if (ret) {
106 		pr_err("Failed to request irq %d (timer): %pe\n", TMR_IRQ_NUM,
107 		       ERR_PTR(ret));
108 	}
109 
110 	/* Restart mode, Enable int, Set clock source */
111 	TCTL = TCTL_OM | TCTL_IRQEN | CLOCK_SOURCE;
112 	TPRER = CLOCK_PRE;
113 	TCMP = TICKS_PER_JIFFY;
114 
115 	/* Enable timer 1 */
116 	TCTL |= TCTL_TEN;
117 	clocksource_register_hz(&m68328_clk, TICKS_PER_JIFFY*HZ);
118 }
119 
120 /***************************************************************************/
121 
m68328_hwclk(int set,struct rtc_time * t)122 int m68328_hwclk(int set, struct rtc_time *t)
123 {
124 	if (!set) {
125 		long now = RTCTIME;
126 		t->tm_year = 1;
127 		t->tm_mon = 0;
128 		t->tm_mday = 1;
129 		t->tm_hour = (now >> 24) % 24;
130 		t->tm_min = (now >> 16) % 60;
131 		t->tm_sec = now % 60;
132 	}
133 
134 	return 0;
135 }
136 
137 /***************************************************************************/
138