1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Atmel SMC (Static Memory Controller) helper functions.
4 *
5 * Copyright (C) 2017 Atmel
6 * Copyright (C) 2017 Free Electrons
7 *
8 * Author: Boris Brezillon <boris.brezillon@free-electrons.com>
9 */
10
11 #include <linux/bits.h>
12 #include <linux/err.h>
13 #include <linux/export.h>
14 #include <linux/of.h>
15 #include <linux/regmap.h>
16 #include <linux/string.h>
17
18 #include <linux/mfd/syscon/atmel-smc.h>
19
20 /**
21 * atmel_smc_cs_conf_init - initialize a SMC CS conf
22 * @conf: the SMC CS conf to initialize
23 *
24 * Set all fields to 0 so that one can start defining a new config.
25 */
atmel_smc_cs_conf_init(struct atmel_smc_cs_conf * conf)26 void atmel_smc_cs_conf_init(struct atmel_smc_cs_conf *conf)
27 {
28 memset(conf, 0, sizeof(*conf));
29 }
30 EXPORT_SYMBOL_GPL(atmel_smc_cs_conf_init);
31
32 /**
33 * atmel_smc_cs_encode_ncycles - encode a number of MCK clk cycles in the
34 * format expected by the SMC engine
35 * @ncycles: number of MCK clk cycles
36 * @msbpos: position of the MSB part of the timing field
37 * @msbwidth: width of the MSB part of the timing field
38 * @msbfactor: factor applied to the MSB
39 * @encodedval: param used to store the encoding result
40 *
41 * This function encodes the @ncycles value as described in the datasheet
42 * (section "SMC Setup/Pulse/Cycle/Timings Register"). This is a generic
43 * helper which called with different parameter depending on the encoding
44 * scheme.
45 *
46 * If the @ncycles value is too big to be encoded, -ERANGE is returned and
47 * the encodedval is contains the maximum val. Otherwise, 0 is returned.
48 */
atmel_smc_cs_encode_ncycles(unsigned int ncycles,unsigned int msbpos,unsigned int msbwidth,unsigned int msbfactor,unsigned int * encodedval)49 static int atmel_smc_cs_encode_ncycles(unsigned int ncycles,
50 unsigned int msbpos,
51 unsigned int msbwidth,
52 unsigned int msbfactor,
53 unsigned int *encodedval)
54 {
55 unsigned int lsbmask = GENMASK(msbpos - 1, 0);
56 unsigned int msbmask = GENMASK(msbwidth - 1, 0);
57 unsigned int msb, lsb;
58 int ret = 0;
59
60 msb = ncycles / msbfactor;
61 lsb = ncycles % msbfactor;
62
63 if (lsb > lsbmask) {
64 lsb = 0;
65 msb++;
66 }
67
68 /*
69 * Let's just put the maximum we can if the requested setting does
70 * not fit in the register field.
71 * We still return -ERANGE in case the caller cares.
72 */
73 if (msb > msbmask) {
74 msb = msbmask;
75 lsb = lsbmask;
76 ret = -ERANGE;
77 }
78
79 *encodedval = (msb << msbpos) | lsb;
80
81 return ret;
82 }
83
84 /**
85 * atmel_smc_cs_conf_set_timing - set the SMC CS conf Txx parameter to a
86 * specific value
87 * @conf: SMC CS conf descriptor
88 * @shift: the position of the Txx field in the TIMINGS register
89 * @ncycles: value (expressed in MCK clk cycles) to assign to this Txx
90 * parameter
91 *
92 * This function encodes the @ncycles value as described in the datasheet
93 * (section "SMC Timings Register"), and then stores the result in the
94 * @conf->timings field at @shift position.
95 *
96 * Returns -EINVAL if shift is invalid, -ERANGE if ncycles does not fit in
97 * the field, and 0 otherwise.
98 */
atmel_smc_cs_conf_set_timing(struct atmel_smc_cs_conf * conf,unsigned int shift,unsigned int ncycles)99 int atmel_smc_cs_conf_set_timing(struct atmel_smc_cs_conf *conf,
100 unsigned int shift, unsigned int ncycles)
101 {
102 unsigned int val;
103 int ret;
104
105 if (shift != ATMEL_HSMC_TIMINGS_TCLR_SHIFT &&
106 shift != ATMEL_HSMC_TIMINGS_TADL_SHIFT &&
107 shift != ATMEL_HSMC_TIMINGS_TAR_SHIFT &&
108 shift != ATMEL_HSMC_TIMINGS_TRR_SHIFT &&
109 shift != ATMEL_HSMC_TIMINGS_TWB_SHIFT)
110 return -EINVAL;
111
112 /*
113 * The formula described in atmel datasheets (section "HSMC Timings
114 * Register"):
115 *
116 * ncycles = (Txx[3] * 64) + Txx[2:0]
117 */
118 ret = atmel_smc_cs_encode_ncycles(ncycles, 3, 1, 64, &val);
119 conf->timings &= ~GENMASK(shift + 3, shift);
120 conf->timings |= val << shift;
121
122 return ret;
123 }
124 EXPORT_SYMBOL_GPL(atmel_smc_cs_conf_set_timing);
125
126 /**
127 * atmel_smc_cs_conf_set_setup - set the SMC CS conf xx_SETUP parameter to a
128 * specific value
129 * @conf: SMC CS conf descriptor
130 * @shift: the position of the xx_SETUP field in the SETUP register
131 * @ncycles: value (expressed in MCK clk cycles) to assign to this xx_SETUP
132 * parameter
133 *
134 * This function encodes the @ncycles value as described in the datasheet
135 * (section "SMC Setup Register"), and then stores the result in the
136 * @conf->setup field at @shift position.
137 *
138 * Returns -EINVAL if @shift is invalid, -ERANGE if @ncycles does not fit in
139 * the field, and 0 otherwise.
140 */
atmel_smc_cs_conf_set_setup(struct atmel_smc_cs_conf * conf,unsigned int shift,unsigned int ncycles)141 int atmel_smc_cs_conf_set_setup(struct atmel_smc_cs_conf *conf,
142 unsigned int shift, unsigned int ncycles)
143 {
144 unsigned int val;
145 int ret;
146
147 if (shift != ATMEL_SMC_NWE_SHIFT && shift != ATMEL_SMC_NCS_WR_SHIFT &&
148 shift != ATMEL_SMC_NRD_SHIFT && shift != ATMEL_SMC_NCS_RD_SHIFT)
149 return -EINVAL;
150
151 /*
152 * The formula described in atmel datasheets (section "SMC Setup
153 * Register"):
154 *
155 * ncycles = (128 * xx_SETUP[5]) + xx_SETUP[4:0]
156 */
157 ret = atmel_smc_cs_encode_ncycles(ncycles, 5, 1, 128, &val);
158 conf->setup &= ~GENMASK(shift + 7, shift);
159 conf->setup |= val << shift;
160
161 return ret;
162 }
163 EXPORT_SYMBOL_GPL(atmel_smc_cs_conf_set_setup);
164
165 /**
166 * atmel_smc_cs_conf_set_pulse - set the SMC CS conf xx_PULSE parameter to a
167 * specific value
168 * @conf: SMC CS conf descriptor
169 * @shift: the position of the xx_PULSE field in the PULSE register
170 * @ncycles: value (expressed in MCK clk cycles) to assign to this xx_PULSE
171 * parameter
172 *
173 * This function encodes the @ncycles value as described in the datasheet
174 * (section "SMC Pulse Register"), and then stores the result in the
175 * @conf->setup field at @shift position.
176 *
177 * Returns -EINVAL if @shift is invalid, -ERANGE if @ncycles does not fit in
178 * the field, and 0 otherwise.
179 */
atmel_smc_cs_conf_set_pulse(struct atmel_smc_cs_conf * conf,unsigned int shift,unsigned int ncycles)180 int atmel_smc_cs_conf_set_pulse(struct atmel_smc_cs_conf *conf,
181 unsigned int shift, unsigned int ncycles)
182 {
183 unsigned int val;
184 int ret;
185
186 if (shift != ATMEL_SMC_NWE_SHIFT && shift != ATMEL_SMC_NCS_WR_SHIFT &&
187 shift != ATMEL_SMC_NRD_SHIFT && shift != ATMEL_SMC_NCS_RD_SHIFT)
188 return -EINVAL;
189
190 /*
191 * The formula described in atmel datasheets (section "SMC Pulse
192 * Register"):
193 *
194 * ncycles = (256 * xx_PULSE[6]) + xx_PULSE[5:0]
195 */
196 ret = atmel_smc_cs_encode_ncycles(ncycles, 6, 1, 256, &val);
197 conf->pulse &= ~GENMASK(shift + 7, shift);
198 conf->pulse |= val << shift;
199
200 return ret;
201 }
202 EXPORT_SYMBOL_GPL(atmel_smc_cs_conf_set_pulse);
203
204 /**
205 * atmel_smc_cs_conf_set_cycle - set the SMC CS conf xx_CYCLE parameter to a
206 * specific value
207 * @conf: SMC CS conf descriptor
208 * @shift: the position of the xx_CYCLE field in the CYCLE register
209 * @ncycles: value (expressed in MCK clk cycles) to assign to this xx_CYCLE
210 * parameter
211 *
212 * This function encodes the @ncycles value as described in the datasheet
213 * (section "SMC Cycle Register"), and then stores the result in the
214 * @conf->setup field at @shift position.
215 *
216 * Returns -EINVAL if @shift is invalid, -ERANGE if @ncycles does not fit in
217 * the field, and 0 otherwise.
218 */
atmel_smc_cs_conf_set_cycle(struct atmel_smc_cs_conf * conf,unsigned int shift,unsigned int ncycles)219 int atmel_smc_cs_conf_set_cycle(struct atmel_smc_cs_conf *conf,
220 unsigned int shift, unsigned int ncycles)
221 {
222 unsigned int val;
223 int ret;
224
225 if (shift != ATMEL_SMC_NWE_SHIFT && shift != ATMEL_SMC_NRD_SHIFT)
226 return -EINVAL;
227
228 /*
229 * The formula described in atmel datasheets (section "SMC Cycle
230 * Register"):
231 *
232 * ncycles = (xx_CYCLE[8:7] * 256) + xx_CYCLE[6:0]
233 */
234 ret = atmel_smc_cs_encode_ncycles(ncycles, 7, 2, 256, &val);
235 conf->cycle &= ~GENMASK(shift + 15, shift);
236 conf->cycle |= val << shift;
237
238 return ret;
239 }
240 EXPORT_SYMBOL_GPL(atmel_smc_cs_conf_set_cycle);
241
242 /**
243 * atmel_smc_cs_conf_apply - apply an SMC CS conf
244 * @regmap: the SMC regmap
245 * @cs: the CS id
246 * @conf: the SMC CS conf to apply
247 *
248 * Applies an SMC CS configuration.
249 * Only valid on at91sam9 SoCs.
250 */
atmel_smc_cs_conf_apply(struct regmap * regmap,int cs,const struct atmel_smc_cs_conf * conf)251 void atmel_smc_cs_conf_apply(struct regmap *regmap, int cs,
252 const struct atmel_smc_cs_conf *conf)
253 {
254 regmap_write(regmap, ATMEL_SMC_SETUP(cs), conf->setup);
255 regmap_write(regmap, ATMEL_SMC_PULSE(cs), conf->pulse);
256 regmap_write(regmap, ATMEL_SMC_CYCLE(cs), conf->cycle);
257 regmap_write(regmap, ATMEL_SMC_MODE(cs), conf->mode);
258 }
259 EXPORT_SYMBOL_GPL(atmel_smc_cs_conf_apply);
260
261 /**
262 * atmel_hsmc_cs_conf_apply - apply an SMC CS conf
263 * @regmap: the HSMC regmap
264 * @layout: the layout of registers
265 * @cs: the CS id
266 * @conf: the SMC CS conf to apply
267 *
268 * Applies an SMC CS configuration.
269 * Only valid on post-sama5 SoCs.
270 */
atmel_hsmc_cs_conf_apply(struct regmap * regmap,const struct atmel_hsmc_reg_layout * layout,int cs,const struct atmel_smc_cs_conf * conf)271 void atmel_hsmc_cs_conf_apply(struct regmap *regmap,
272 const struct atmel_hsmc_reg_layout *layout,
273 int cs, const struct atmel_smc_cs_conf *conf)
274 {
275 regmap_write(regmap, ATMEL_HSMC_SETUP(layout, cs), conf->setup);
276 regmap_write(regmap, ATMEL_HSMC_PULSE(layout, cs), conf->pulse);
277 regmap_write(regmap, ATMEL_HSMC_CYCLE(layout, cs), conf->cycle);
278 regmap_write(regmap, ATMEL_HSMC_TIMINGS(layout, cs), conf->timings);
279 regmap_write(regmap, ATMEL_HSMC_MODE(layout, cs), conf->mode);
280 }
281 EXPORT_SYMBOL_GPL(atmel_hsmc_cs_conf_apply);
282
283 /**
284 * atmel_smc_cs_conf_get - retrieve the current SMC CS conf
285 * @regmap: the SMC regmap
286 * @cs: the CS id
287 * @conf: the SMC CS conf object to store the current conf
288 *
289 * Retrieve the SMC CS configuration.
290 * Only valid on at91sam9 SoCs.
291 */
atmel_smc_cs_conf_get(struct regmap * regmap,int cs,struct atmel_smc_cs_conf * conf)292 void atmel_smc_cs_conf_get(struct regmap *regmap, int cs,
293 struct atmel_smc_cs_conf *conf)
294 {
295 regmap_read(regmap, ATMEL_SMC_SETUP(cs), &conf->setup);
296 regmap_read(regmap, ATMEL_SMC_PULSE(cs), &conf->pulse);
297 regmap_read(regmap, ATMEL_SMC_CYCLE(cs), &conf->cycle);
298 regmap_read(regmap, ATMEL_SMC_MODE(cs), &conf->mode);
299 }
300 EXPORT_SYMBOL_GPL(atmel_smc_cs_conf_get);
301
302 /**
303 * atmel_hsmc_cs_conf_get - retrieve the current SMC CS conf
304 * @regmap: the HSMC regmap
305 * @layout: the layout of registers
306 * @cs: the CS id
307 * @conf: the SMC CS conf object to store the current conf
308 *
309 * Retrieve the SMC CS configuration.
310 * Only valid on post-sama5 SoCs.
311 */
atmel_hsmc_cs_conf_get(struct regmap * regmap,const struct atmel_hsmc_reg_layout * layout,int cs,struct atmel_smc_cs_conf * conf)312 void atmel_hsmc_cs_conf_get(struct regmap *regmap,
313 const struct atmel_hsmc_reg_layout *layout,
314 int cs, struct atmel_smc_cs_conf *conf)
315 {
316 regmap_read(regmap, ATMEL_HSMC_SETUP(layout, cs), &conf->setup);
317 regmap_read(regmap, ATMEL_HSMC_PULSE(layout, cs), &conf->pulse);
318 regmap_read(regmap, ATMEL_HSMC_CYCLE(layout, cs), &conf->cycle);
319 regmap_read(regmap, ATMEL_HSMC_TIMINGS(layout, cs), &conf->timings);
320 regmap_read(regmap, ATMEL_HSMC_MODE(layout, cs), &conf->mode);
321 }
322 EXPORT_SYMBOL_GPL(atmel_hsmc_cs_conf_get);
323
324 static const struct atmel_hsmc_reg_layout sama5d3_reg_layout = {
325 .timing_regs_offset = 0x600,
326 };
327
328 static const struct atmel_hsmc_reg_layout sama5d2_reg_layout = {
329 .timing_regs_offset = 0x700,
330 };
331
332 static const struct of_device_id atmel_smc_ids[] __maybe_unused = {
333 { .compatible = "atmel,at91sam9260-smc", .data = NULL },
334 { .compatible = "atmel,sama5d3-smc", .data = &sama5d3_reg_layout },
335 { .compatible = "atmel,sama5d2-smc", .data = &sama5d2_reg_layout },
336 { /* sentinel */ },
337 };
338
339 /**
340 * atmel_hsmc_get_reg_layout - retrieve the layout of HSMC registers
341 * @np: the HSMC regmap
342 *
343 * Retrieve the layout of HSMC registers.
344 *
345 * Returns NULL in case of SMC, a struct atmel_hsmc_reg_layout pointer
346 * in HSMC case, otherwise ERR_PTR(-EINVAL).
347 */
348 const struct atmel_hsmc_reg_layout *
atmel_hsmc_get_reg_layout(struct device_node * np)349 atmel_hsmc_get_reg_layout(struct device_node *np)
350 {
351 const struct of_device_id *match;
352
353 match = of_match_node(atmel_smc_ids, np);
354
355 return match ? match->data : ERR_PTR(-EINVAL);
356 }
357 EXPORT_SYMBOL_GPL(atmel_hsmc_get_reg_layout);
358