1 /*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2017-2025 Broadcom. All Rights Reserved. The term *
5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. *
6 * Copyright (C) 2004-2016 Emulex. All rights reserved. *
7 * EMULEX and SLI are trademarks of Emulex. *
8 * www.broadcom.com *
9 * Portions Copyright (C) 2004-2005 Christoph Hellwig *
10 * *
11 * This program is free software; you can redistribute it and/or *
12 * modify it under the terms of version 2 of the GNU General *
13 * Public License as published by the Free Software Foundation. *
14 * This program is distributed in the hope that it will be useful. *
15 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
16 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
17 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
18 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
19 * TO BE LEGALLY INVALID. See the GNU General Public License for *
20 * more details, a copy of which can be found in the file COPYING *
21 * included with this package. *
22 *******************************************************************/
23
24 #include <linux/blkdev.h>
25 #include <linux/delay.h>
26 #include <linux/dma-mapping.h>
27 #include <linux/idr.h>
28 #include <linux/interrupt.h>
29 #include <linux/module.h>
30 #include <linux/kthread.h>
31 #include <linux/pci.h>
32 #include <linux/spinlock.h>
33 #include <linux/sched/clock.h>
34 #include <linux/ctype.h>
35 #include <linux/slab.h>
36 #include <linux/firmware.h>
37 #include <linux/miscdevice.h>
38 #include <linux/percpu.h>
39 #include <linux/irq.h>
40 #include <linux/bitops.h>
41 #include <linux/crash_dump.h>
42 #include <linux/cpu.h>
43 #include <linux/cpuhotplug.h>
44
45 #include <scsi/scsi.h>
46 #include <scsi/scsi_device.h>
47 #include <scsi/scsi_host.h>
48 #include <scsi/scsi_transport_fc.h>
49 #include <scsi/scsi_tcq.h>
50 #include <scsi/fc/fc_fs.h>
51
52 #include "lpfc_hw4.h"
53 #include "lpfc_hw.h"
54 #include "lpfc_sli.h"
55 #include "lpfc_sli4.h"
56 #include "lpfc_nl.h"
57 #include "lpfc_disc.h"
58 #include "lpfc.h"
59 #include "lpfc_scsi.h"
60 #include "lpfc_nvme.h"
61 #include "lpfc_logmsg.h"
62 #include "lpfc_crtn.h"
63 #include "lpfc_vport.h"
64 #include "lpfc_version.h"
65 #include "lpfc_ids.h"
66
67 static enum cpuhp_state lpfc_cpuhp_state;
68 /* Used when mapping IRQ vectors in a driver centric manner */
69 static uint32_t lpfc_present_cpu;
70 static bool lpfc_pldv_detect;
71
72 static void __lpfc_cpuhp_remove(struct lpfc_hba *phba);
73 static void lpfc_cpuhp_remove(struct lpfc_hba *phba);
74 static void lpfc_cpuhp_add(struct lpfc_hba *phba);
75 static void lpfc_get_hba_model_desc(struct lpfc_hba *, uint8_t *, uint8_t *);
76 static int lpfc_post_rcv_buf(struct lpfc_hba *);
77 static int lpfc_sli4_queue_verify(struct lpfc_hba *);
78 static int lpfc_create_bootstrap_mbox(struct lpfc_hba *);
79 static int lpfc_setup_endian_order(struct lpfc_hba *);
80 static void lpfc_destroy_bootstrap_mbox(struct lpfc_hba *);
81 static void lpfc_free_els_sgl_list(struct lpfc_hba *);
82 static void lpfc_free_nvmet_sgl_list(struct lpfc_hba *);
83 static void lpfc_init_sgl_list(struct lpfc_hba *);
84 static int lpfc_init_active_sgl_array(struct lpfc_hba *);
85 static void lpfc_free_active_sgl(struct lpfc_hba *);
86 static int lpfc_hba_down_post_s3(struct lpfc_hba *phba);
87 static int lpfc_hba_down_post_s4(struct lpfc_hba *phba);
88 static int lpfc_sli4_cq_event_pool_create(struct lpfc_hba *);
89 static void lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *);
90 static void lpfc_sli4_cq_event_release_all(struct lpfc_hba *);
91 static void lpfc_sli4_disable_intr(struct lpfc_hba *);
92 static uint32_t lpfc_sli4_enable_intr(struct lpfc_hba *, uint32_t);
93 static void lpfc_sli4_oas_verify(struct lpfc_hba *phba);
94 static uint16_t lpfc_find_cpu_handle(struct lpfc_hba *, uint16_t, int);
95 static void lpfc_setup_bg(struct lpfc_hba *, struct Scsi_Host *);
96 static int lpfc_sli4_cgn_parm_chg_evt(struct lpfc_hba *);
97 static void lpfc_sli4_async_cmstat_evt(struct lpfc_hba *phba);
98 static void lpfc_sli4_prep_dev_for_reset(struct lpfc_hba *phba);
99
100 static struct scsi_transport_template *lpfc_transport_template = NULL;
101 static struct scsi_transport_template *lpfc_vport_transport_template = NULL;
102 static DEFINE_IDR(lpfc_hba_index);
103 #define LPFC_NVMET_BUF_POST 254
104 static int lpfc_vmid_res_alloc(struct lpfc_hba *phba, struct lpfc_vport *vport);
105 static void lpfc_cgn_update_tstamp(struct lpfc_hba *phba, struct lpfc_cgn_ts *ts);
106
107 /**
108 * lpfc_config_port_prep - Perform lpfc initialization prior to config port
109 * @phba: pointer to lpfc hba data structure.
110 *
111 * This routine will do LPFC initialization prior to issuing the CONFIG_PORT
112 * mailbox command. It retrieves the revision information from the HBA and
113 * collects the Vital Product Data (VPD) about the HBA for preparing the
114 * configuration of the HBA.
115 *
116 * Return codes:
117 * 0 - success.
118 * -ERESTART - requests the SLI layer to reset the HBA and try again.
119 * Any other value - indicates an error.
120 **/
121 int
lpfc_config_port_prep(struct lpfc_hba * phba)122 lpfc_config_port_prep(struct lpfc_hba *phba)
123 {
124 lpfc_vpd_t *vp = &phba->vpd;
125 int i = 0, rc;
126 LPFC_MBOXQ_t *pmb;
127 MAILBOX_t *mb;
128 char *lpfc_vpd_data = NULL;
129 uint16_t offset = 0;
130 static char licensed[56] =
131 "key unlock for use with gnu public licensed code only\0";
132 static int init_key = 1;
133
134 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
135 if (!pmb) {
136 phba->link_state = LPFC_HBA_ERROR;
137 return -ENOMEM;
138 }
139
140 mb = &pmb->u.mb;
141 phba->link_state = LPFC_INIT_MBX_CMDS;
142
143 if (lpfc_is_LC_HBA(phba->pcidev->device)) {
144 if (init_key) {
145 uint32_t *ptext = (uint32_t *) licensed;
146
147 for (i = 0; i < 56; i += sizeof (uint32_t), ptext++)
148 *ptext = cpu_to_be32(*ptext);
149 init_key = 0;
150 }
151
152 lpfc_read_nv(phba, pmb);
153 memset((char*)mb->un.varRDnvp.rsvd3, 0,
154 sizeof (mb->un.varRDnvp.rsvd3));
155 memcpy((char*)mb->un.varRDnvp.rsvd3, licensed,
156 sizeof (licensed));
157
158 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
159
160 if (rc != MBX_SUCCESS) {
161 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
162 "0324 Config Port initialization "
163 "error, mbxCmd x%x READ_NVPARM, "
164 "mbxStatus x%x\n",
165 mb->mbxCommand, mb->mbxStatus);
166 mempool_free(pmb, phba->mbox_mem_pool);
167 return -ERESTART;
168 }
169 memcpy(phba->wwnn, (char *)mb->un.varRDnvp.nodename,
170 sizeof(phba->wwnn));
171 memcpy(phba->wwpn, (char *)mb->un.varRDnvp.portname,
172 sizeof(phba->wwpn));
173 }
174
175 /*
176 * Clear all option bits except LPFC_SLI3_BG_ENABLED,
177 * which was already set in lpfc_get_cfgparam()
178 */
179 phba->sli3_options &= (uint32_t)LPFC_SLI3_BG_ENABLED;
180
181 /* Setup and issue mailbox READ REV command */
182 lpfc_read_rev(phba, pmb);
183 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
184 if (rc != MBX_SUCCESS) {
185 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
186 "0439 Adapter failed to init, mbxCmd x%x "
187 "READ_REV, mbxStatus x%x\n",
188 mb->mbxCommand, mb->mbxStatus);
189 mempool_free( pmb, phba->mbox_mem_pool);
190 return -ERESTART;
191 }
192
193
194 /*
195 * The value of rr must be 1 since the driver set the cv field to 1.
196 * This setting requires the FW to set all revision fields.
197 */
198 if (mb->un.varRdRev.rr == 0) {
199 vp->rev.rBit = 0;
200 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
201 "0440 Adapter failed to init, READ_REV has "
202 "missing revision information.\n");
203 mempool_free(pmb, phba->mbox_mem_pool);
204 return -ERESTART;
205 }
206
207 if (phba->sli_rev == 3 && !mb->un.varRdRev.v3rsp) {
208 mempool_free(pmb, phba->mbox_mem_pool);
209 return -EINVAL;
210 }
211
212 /* Save information as VPD data */
213 vp->rev.rBit = 1;
214 memcpy(&vp->sli3Feat, &mb->un.varRdRev.sli3Feat, sizeof(uint32_t));
215 vp->rev.sli1FwRev = mb->un.varRdRev.sli1FwRev;
216 memcpy(vp->rev.sli1FwName, (char*) mb->un.varRdRev.sli1FwName, 16);
217 vp->rev.sli2FwRev = mb->un.varRdRev.sli2FwRev;
218 memcpy(vp->rev.sli2FwName, (char *) mb->un.varRdRev.sli2FwName, 16);
219 vp->rev.biuRev = mb->un.varRdRev.biuRev;
220 vp->rev.smRev = mb->un.varRdRev.smRev;
221 vp->rev.smFwRev = mb->un.varRdRev.un.smFwRev;
222 vp->rev.endecRev = mb->un.varRdRev.endecRev;
223 vp->rev.fcphHigh = mb->un.varRdRev.fcphHigh;
224 vp->rev.fcphLow = mb->un.varRdRev.fcphLow;
225 vp->rev.feaLevelHigh = mb->un.varRdRev.feaLevelHigh;
226 vp->rev.feaLevelLow = mb->un.varRdRev.feaLevelLow;
227 vp->rev.postKernRev = mb->un.varRdRev.postKernRev;
228 vp->rev.opFwRev = mb->un.varRdRev.opFwRev;
229
230 /* If the sli feature level is less then 9, we must
231 * tear down all RPIs and VPIs on link down if NPIV
232 * is enabled.
233 */
234 if (vp->rev.feaLevelHigh < 9)
235 phba->sli3_options |= LPFC_SLI3_VPORT_TEARDOWN;
236
237 if (lpfc_is_LC_HBA(phba->pcidev->device))
238 memcpy(phba->RandomData, (char *)&mb->un.varWords[24],
239 sizeof (phba->RandomData));
240
241 /* Get adapter VPD information */
242 lpfc_vpd_data = kmalloc(DMP_VPD_SIZE, GFP_KERNEL);
243 if (!lpfc_vpd_data)
244 goto out_free_mbox;
245 do {
246 lpfc_dump_mem(phba, pmb, offset, DMP_REGION_VPD);
247 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
248
249 if (rc != MBX_SUCCESS) {
250 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
251 "0441 VPD not present on adapter, "
252 "mbxCmd x%x DUMP VPD, mbxStatus x%x\n",
253 mb->mbxCommand, mb->mbxStatus);
254 mb->un.varDmp.word_cnt = 0;
255 }
256 /* dump mem may return a zero when finished or we got a
257 * mailbox error, either way we are done.
258 */
259 if (mb->un.varDmp.word_cnt == 0)
260 break;
261
262 if (mb->un.varDmp.word_cnt > DMP_VPD_SIZE - offset)
263 mb->un.varDmp.word_cnt = DMP_VPD_SIZE - offset;
264 lpfc_sli_pcimem_bcopy(((uint8_t *)mb) + DMP_RSP_OFFSET,
265 lpfc_vpd_data + offset,
266 mb->un.varDmp.word_cnt);
267 offset += mb->un.varDmp.word_cnt;
268 } while (mb->un.varDmp.word_cnt && offset < DMP_VPD_SIZE);
269
270 lpfc_parse_vpd(phba, lpfc_vpd_data, offset);
271
272 kfree(lpfc_vpd_data);
273 out_free_mbox:
274 mempool_free(pmb, phba->mbox_mem_pool);
275 return 0;
276 }
277
278 /**
279 * lpfc_config_async_cmpl - Completion handler for config async event mbox cmd
280 * @phba: pointer to lpfc hba data structure.
281 * @pmboxq: pointer to the driver internal queue element for mailbox command.
282 *
283 * This is the completion handler for driver's configuring asynchronous event
284 * mailbox command to the device. If the mailbox command returns successfully,
285 * it will set internal async event support flag to 1; otherwise, it will
286 * set internal async event support flag to 0.
287 **/
288 static void
lpfc_config_async_cmpl(struct lpfc_hba * phba,LPFC_MBOXQ_t * pmboxq)289 lpfc_config_async_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
290 {
291 if (pmboxq->u.mb.mbxStatus == MBX_SUCCESS)
292 phba->temp_sensor_support = 1;
293 else
294 phba->temp_sensor_support = 0;
295 mempool_free(pmboxq, phba->mbox_mem_pool);
296 return;
297 }
298
299 /**
300 * lpfc_dump_wakeup_param_cmpl - dump memory mailbox command completion handler
301 * @phba: pointer to lpfc hba data structure.
302 * @pmboxq: pointer to the driver internal queue element for mailbox command.
303 *
304 * This is the completion handler for dump mailbox command for getting
305 * wake up parameters. When this command complete, the response contain
306 * Option rom version of the HBA. This function translate the version number
307 * into a human readable string and store it in OptionROMVersion.
308 **/
309 static void
lpfc_dump_wakeup_param_cmpl(struct lpfc_hba * phba,LPFC_MBOXQ_t * pmboxq)310 lpfc_dump_wakeup_param_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
311 {
312 struct prog_id *prg;
313 uint32_t prog_id_word;
314 char dist = ' ';
315 /* character array used for decoding dist type. */
316 char dist_char[] = "nabx";
317
318 if (pmboxq->u.mb.mbxStatus != MBX_SUCCESS) {
319 mempool_free(pmboxq, phba->mbox_mem_pool);
320 return;
321 }
322
323 prg = (struct prog_id *) &prog_id_word;
324
325 /* word 7 contain option rom version */
326 prog_id_word = pmboxq->u.mb.un.varWords[7];
327
328 /* Decode the Option rom version word to a readable string */
329 dist = dist_char[prg->dist];
330
331 if ((prg->dist == 3) && (prg->num == 0))
332 snprintf(phba->OptionROMVersion, 32, "%d.%d%d",
333 prg->ver, prg->rev, prg->lev);
334 else
335 snprintf(phba->OptionROMVersion, 32, "%d.%d%d%c%d",
336 prg->ver, prg->rev, prg->lev,
337 dist, prg->num);
338 mempool_free(pmboxq, phba->mbox_mem_pool);
339 return;
340 }
341
342 /**
343 * lpfc_update_vport_wwn - Updates the fc_nodename, fc_portname,
344 * @vport: pointer to lpfc vport data structure.
345 *
346 *
347 * Return codes
348 * None.
349 **/
350 void
lpfc_update_vport_wwn(struct lpfc_vport * vport)351 lpfc_update_vport_wwn(struct lpfc_vport *vport)
352 {
353 struct lpfc_hba *phba = vport->phba;
354
355 /*
356 * If the name is empty or there exists a soft name
357 * then copy the service params name, otherwise use the fc name
358 */
359 if (vport->fc_nodename.u.wwn[0] == 0)
360 memcpy(&vport->fc_nodename, &vport->fc_sparam.nodeName,
361 sizeof(struct lpfc_name));
362 else
363 memcpy(&vport->fc_sparam.nodeName, &vport->fc_nodename,
364 sizeof(struct lpfc_name));
365
366 /*
367 * If the port name has changed, then set the Param changes flag
368 * to unreg the login
369 */
370 if (vport->fc_portname.u.wwn[0] != 0 &&
371 memcmp(&vport->fc_portname, &vport->fc_sparam.portName,
372 sizeof(struct lpfc_name))) {
373 vport->vport_flag |= FAWWPN_PARAM_CHG;
374
375 if (phba->sli_rev == LPFC_SLI_REV4 &&
376 vport->port_type == LPFC_PHYSICAL_PORT &&
377 phba->sli4_hba.fawwpn_flag & LPFC_FAWWPN_FABRIC) {
378 if (!(phba->sli4_hba.fawwpn_flag & LPFC_FAWWPN_CONFIG))
379 phba->sli4_hba.fawwpn_flag &=
380 ~LPFC_FAWWPN_FABRIC;
381 lpfc_printf_log(phba, KERN_INFO,
382 LOG_SLI | LOG_DISCOVERY | LOG_ELS,
383 "2701 FA-PWWN change WWPN from %llx to "
384 "%llx: vflag x%x fawwpn_flag x%x\n",
385 wwn_to_u64(vport->fc_portname.u.wwn),
386 wwn_to_u64
387 (vport->fc_sparam.portName.u.wwn),
388 vport->vport_flag,
389 phba->sli4_hba.fawwpn_flag);
390 memcpy(&vport->fc_portname, &vport->fc_sparam.portName,
391 sizeof(struct lpfc_name));
392 }
393 }
394
395 if (vport->fc_portname.u.wwn[0] == 0)
396 memcpy(&vport->fc_portname, &vport->fc_sparam.portName,
397 sizeof(struct lpfc_name));
398 else
399 memcpy(&vport->fc_sparam.portName, &vport->fc_portname,
400 sizeof(struct lpfc_name));
401 }
402
403 /**
404 * lpfc_config_port_post - Perform lpfc initialization after config port
405 * @phba: pointer to lpfc hba data structure.
406 *
407 * This routine will do LPFC initialization after the CONFIG_PORT mailbox
408 * command call. It performs all internal resource and state setups on the
409 * port: post IOCB buffers, enable appropriate host interrupt attentions,
410 * ELS ring timers, etc.
411 *
412 * Return codes
413 * 0 - success.
414 * Any other value - error.
415 **/
416 int
lpfc_config_port_post(struct lpfc_hba * phba)417 lpfc_config_port_post(struct lpfc_hba *phba)
418 {
419 struct lpfc_vport *vport = phba->pport;
420 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
421 LPFC_MBOXQ_t *pmb;
422 MAILBOX_t *mb;
423 struct lpfc_dmabuf *mp;
424 struct lpfc_sli *psli = &phba->sli;
425 uint32_t status, timeout;
426 int i, j;
427 int rc;
428
429 spin_lock_irq(&phba->hbalock);
430 /*
431 * If the Config port completed correctly the HBA is not
432 * over heated any more.
433 */
434 if (phba->over_temp_state == HBA_OVER_TEMP)
435 phba->over_temp_state = HBA_NORMAL_TEMP;
436 spin_unlock_irq(&phba->hbalock);
437
438 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
439 if (!pmb) {
440 phba->link_state = LPFC_HBA_ERROR;
441 return -ENOMEM;
442 }
443 mb = &pmb->u.mb;
444
445 /* Get login parameters for NID. */
446 rc = lpfc_read_sparam(phba, pmb, 0);
447 if (rc) {
448 mempool_free(pmb, phba->mbox_mem_pool);
449 return -ENOMEM;
450 }
451
452 pmb->vport = vport;
453 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
454 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
455 "0448 Adapter failed init, mbxCmd x%x "
456 "READ_SPARM mbxStatus x%x\n",
457 mb->mbxCommand, mb->mbxStatus);
458 phba->link_state = LPFC_HBA_ERROR;
459 lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED);
460 return -EIO;
461 }
462
463 mp = pmb->ctx_buf;
464
465 /* This dmabuf was allocated by lpfc_read_sparam. The dmabuf is no
466 * longer needed. Prevent unintended ctx_buf access as the mbox is
467 * reused.
468 */
469 memcpy(&vport->fc_sparam, mp->virt, sizeof (struct serv_parm));
470 lpfc_mbuf_free(phba, mp->virt, mp->phys);
471 kfree(mp);
472 pmb->ctx_buf = NULL;
473 lpfc_update_vport_wwn(vport);
474
475 /* Update the fc_host data structures with new wwn. */
476 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
477 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
478 fc_host_max_npiv_vports(shost) = phba->max_vpi;
479
480 /* If no serial number in VPD data, use low 6 bytes of WWNN */
481 /* This should be consolidated into parse_vpd ? - mr */
482 if (phba->SerialNumber[0] == 0) {
483 uint8_t *outptr;
484
485 outptr = &vport->fc_nodename.u.s.IEEE[0];
486 for (i = 0; i < 12; i++) {
487 status = *outptr++;
488 j = ((status & 0xf0) >> 4);
489 if (j <= 9)
490 phba->SerialNumber[i] =
491 (char)((uint8_t) 0x30 + (uint8_t) j);
492 else
493 phba->SerialNumber[i] =
494 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
495 i++;
496 j = (status & 0xf);
497 if (j <= 9)
498 phba->SerialNumber[i] =
499 (char)((uint8_t) 0x30 + (uint8_t) j);
500 else
501 phba->SerialNumber[i] =
502 (char)((uint8_t) 0x61 + (uint8_t) (j - 10));
503 }
504 }
505
506 lpfc_read_config(phba, pmb);
507 pmb->vport = vport;
508 if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
509 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
510 "0453 Adapter failed to init, mbxCmd x%x "
511 "READ_CONFIG, mbxStatus x%x\n",
512 mb->mbxCommand, mb->mbxStatus);
513 phba->link_state = LPFC_HBA_ERROR;
514 mempool_free( pmb, phba->mbox_mem_pool);
515 return -EIO;
516 }
517
518 /* Check if the port is disabled */
519 lpfc_sli_read_link_ste(phba);
520
521 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
522 if (phba->cfg_hba_queue_depth > mb->un.varRdConfig.max_xri) {
523 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
524 "3359 HBA queue depth changed from %d to %d\n",
525 phba->cfg_hba_queue_depth,
526 mb->un.varRdConfig.max_xri);
527 phba->cfg_hba_queue_depth = mb->un.varRdConfig.max_xri;
528 }
529
530 phba->lmt = mb->un.varRdConfig.lmt;
531
532 /* Get the default values for Model Name and Description */
533 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
534
535 phba->link_state = LPFC_LINK_DOWN;
536
537 /* Only process IOCBs on ELS ring till hba_state is READY */
538 if (psli->sli3_ring[LPFC_EXTRA_RING].sli.sli3.cmdringaddr)
539 psli->sli3_ring[LPFC_EXTRA_RING].flag |= LPFC_STOP_IOCB_EVENT;
540 if (psli->sli3_ring[LPFC_FCP_RING].sli.sli3.cmdringaddr)
541 psli->sli3_ring[LPFC_FCP_RING].flag |= LPFC_STOP_IOCB_EVENT;
542
543 /* Post receive buffers for desired rings */
544 if (phba->sli_rev != 3)
545 lpfc_post_rcv_buf(phba);
546
547 /*
548 * Configure HBA MSI-X attention conditions to messages if MSI-X mode
549 */
550 if (phba->intr_type == MSIX) {
551 rc = lpfc_config_msi(phba, pmb);
552 if (rc) {
553 mempool_free(pmb, phba->mbox_mem_pool);
554 return -EIO;
555 }
556 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
557 if (rc != MBX_SUCCESS) {
558 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
559 "0352 Config MSI mailbox command "
560 "failed, mbxCmd x%x, mbxStatus x%x\n",
561 pmb->u.mb.mbxCommand,
562 pmb->u.mb.mbxStatus);
563 mempool_free(pmb, phba->mbox_mem_pool);
564 return -EIO;
565 }
566 }
567
568 spin_lock_irq(&phba->hbalock);
569 /* Initialize ERATT handling flag */
570 clear_bit(HBA_ERATT_HANDLED, &phba->hba_flag);
571
572 /* Enable appropriate host interrupts */
573 if (lpfc_readl(phba->HCregaddr, &status)) {
574 spin_unlock_irq(&phba->hbalock);
575 return -EIO;
576 }
577 status |= HC_MBINT_ENA | HC_ERINT_ENA | HC_LAINT_ENA;
578 if (psli->num_rings > 0)
579 status |= HC_R0INT_ENA;
580 if (psli->num_rings > 1)
581 status |= HC_R1INT_ENA;
582 if (psli->num_rings > 2)
583 status |= HC_R2INT_ENA;
584 if (psli->num_rings > 3)
585 status |= HC_R3INT_ENA;
586
587 if ((phba->cfg_poll & ENABLE_FCP_RING_POLLING) &&
588 (phba->cfg_poll & DISABLE_FCP_RING_INT))
589 status &= ~(HC_R0INT_ENA);
590
591 writel(status, phba->HCregaddr);
592 readl(phba->HCregaddr); /* flush */
593 spin_unlock_irq(&phba->hbalock);
594
595 /* Set up ring-0 (ELS) timer */
596 timeout = phba->fc_ratov * 2;
597 mod_timer(&vport->els_tmofunc,
598 jiffies + secs_to_jiffies(timeout));
599 /* Set up heart beat (HB) timer */
600 mod_timer(&phba->hb_tmofunc,
601 jiffies + secs_to_jiffies(LPFC_HB_MBOX_INTERVAL));
602 clear_bit(HBA_HBEAT_INP, &phba->hba_flag);
603 clear_bit(HBA_HBEAT_TMO, &phba->hba_flag);
604 phba->last_completion_time = jiffies;
605 /* Set up error attention (ERATT) polling timer */
606 mod_timer(&phba->eratt_poll,
607 jiffies + secs_to_jiffies(phba->eratt_poll_interval));
608
609 if (test_bit(LINK_DISABLED, &phba->hba_flag)) {
610 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
611 "2598 Adapter Link is disabled.\n");
612 lpfc_down_link(phba, pmb);
613 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
614 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
615 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
616 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
617 "2599 Adapter failed to issue DOWN_LINK"
618 " mbox command rc 0x%x\n", rc);
619
620 mempool_free(pmb, phba->mbox_mem_pool);
621 return -EIO;
622 }
623 } else if (phba->cfg_suppress_link_up == LPFC_INITIALIZE_LINK) {
624 mempool_free(pmb, phba->mbox_mem_pool);
625 rc = phba->lpfc_hba_init_link(phba, MBX_NOWAIT);
626 if (rc)
627 return rc;
628 }
629 /* MBOX buffer will be freed in mbox compl */
630 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
631 if (!pmb) {
632 phba->link_state = LPFC_HBA_ERROR;
633 return -ENOMEM;
634 }
635
636 lpfc_config_async(phba, pmb, LPFC_ELS_RING);
637 pmb->mbox_cmpl = lpfc_config_async_cmpl;
638 pmb->vport = phba->pport;
639 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
640
641 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
642 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
643 "0456 Adapter failed to issue "
644 "ASYNCEVT_ENABLE mbox status x%x\n",
645 rc);
646 mempool_free(pmb, phba->mbox_mem_pool);
647 }
648
649 /* Get Option rom version */
650 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
651 if (!pmb) {
652 phba->link_state = LPFC_HBA_ERROR;
653 return -ENOMEM;
654 }
655
656 lpfc_dump_wakeup_param(phba, pmb);
657 pmb->mbox_cmpl = lpfc_dump_wakeup_param_cmpl;
658 pmb->vport = phba->pport;
659 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
660
661 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
662 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
663 "0435 Adapter failed "
664 "to get Option ROM version status x%x\n", rc);
665 mempool_free(pmb, phba->mbox_mem_pool);
666 }
667
668 return 0;
669 }
670
671 /**
672 * lpfc_sli4_refresh_params - update driver copy of params.
673 * @phba: Pointer to HBA context object.
674 *
675 * This is called to refresh driver copy of dynamic fields from the
676 * common_get_sli4_parameters descriptor.
677 **/
678 int
lpfc_sli4_refresh_params(struct lpfc_hba * phba)679 lpfc_sli4_refresh_params(struct lpfc_hba *phba)
680 {
681 LPFC_MBOXQ_t *mboxq;
682 struct lpfc_mqe *mqe;
683 struct lpfc_sli4_parameters *mbx_sli4_parameters;
684 int length, rc;
685
686 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
687 if (!mboxq)
688 return -ENOMEM;
689
690 mqe = &mboxq->u.mqe;
691 /* Read the port's SLI4 Config Parameters */
692 length = (sizeof(struct lpfc_mbx_get_sli4_parameters) -
693 sizeof(struct lpfc_sli4_cfg_mhdr));
694 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
695 LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS,
696 length, LPFC_SLI4_MBX_EMBED);
697
698 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
699 if (unlikely(rc)) {
700 mempool_free(mboxq, phba->mbox_mem_pool);
701 return rc;
702 }
703 mbx_sli4_parameters = &mqe->un.get_sli4_parameters.sli4_parameters;
704 phba->sli4_hba.pc_sli4_params.mi_cap =
705 bf_get(cfg_mi_ver, mbx_sli4_parameters);
706
707 /* Are we forcing MI off via module parameter? */
708 if (phba->cfg_enable_mi)
709 phba->sli4_hba.pc_sli4_params.mi_ver =
710 bf_get(cfg_mi_ver, mbx_sli4_parameters);
711 else
712 phba->sli4_hba.pc_sli4_params.mi_ver = 0;
713
714 phba->sli4_hba.pc_sli4_params.cmf =
715 bf_get(cfg_cmf, mbx_sli4_parameters);
716 phba->sli4_hba.pc_sli4_params.pls =
717 bf_get(cfg_pvl, mbx_sli4_parameters);
718
719 mempool_free(mboxq, phba->mbox_mem_pool);
720 return rc;
721 }
722
723 /**
724 * lpfc_hba_init_link - Initialize the FC link
725 * @phba: pointer to lpfc hba data structure.
726 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
727 *
728 * This routine will issue the INIT_LINK mailbox command call.
729 * It is available to other drivers through the lpfc_hba data
730 * structure for use as a delayed link up mechanism with the
731 * module parameter lpfc_suppress_link_up.
732 *
733 * Return code
734 * 0 - success
735 * Any other value - error
736 **/
737 static int
lpfc_hba_init_link(struct lpfc_hba * phba,uint32_t flag)738 lpfc_hba_init_link(struct lpfc_hba *phba, uint32_t flag)
739 {
740 return lpfc_hba_init_link_fc_topology(phba, phba->cfg_topology, flag);
741 }
742
743 /**
744 * lpfc_hba_init_link_fc_topology - Initialize FC link with desired topology
745 * @phba: pointer to lpfc hba data structure.
746 * @fc_topology: desired fc topology.
747 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
748 *
749 * This routine will issue the INIT_LINK mailbox command call.
750 * It is available to other drivers through the lpfc_hba data
751 * structure for use as a delayed link up mechanism with the
752 * module parameter lpfc_suppress_link_up.
753 *
754 * Return code
755 * 0 - success
756 * Any other value - error
757 **/
758 int
lpfc_hba_init_link_fc_topology(struct lpfc_hba * phba,uint32_t fc_topology,uint32_t flag)759 lpfc_hba_init_link_fc_topology(struct lpfc_hba *phba, uint32_t fc_topology,
760 uint32_t flag)
761 {
762 struct lpfc_vport *vport = phba->pport;
763 LPFC_MBOXQ_t *pmb;
764 MAILBOX_t *mb;
765 int rc;
766
767 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
768 if (!pmb) {
769 phba->link_state = LPFC_HBA_ERROR;
770 return -ENOMEM;
771 }
772 mb = &pmb->u.mb;
773 pmb->vport = vport;
774
775 if ((phba->cfg_link_speed > LPFC_USER_LINK_SPEED_MAX) ||
776 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_1G) &&
777 !(phba->lmt & LMT_1Gb)) ||
778 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_2G) &&
779 !(phba->lmt & LMT_2Gb)) ||
780 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_4G) &&
781 !(phba->lmt & LMT_4Gb)) ||
782 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_8G) &&
783 !(phba->lmt & LMT_8Gb)) ||
784 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_10G) &&
785 !(phba->lmt & LMT_10Gb)) ||
786 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_16G) &&
787 !(phba->lmt & LMT_16Gb)) ||
788 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_32G) &&
789 !(phba->lmt & LMT_32Gb)) ||
790 ((phba->cfg_link_speed == LPFC_USER_LINK_SPEED_64G) &&
791 !(phba->lmt & LMT_64Gb))) {
792 /* Reset link speed to auto */
793 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
794 "1302 Invalid speed for this board:%d "
795 "Reset link speed to auto.\n",
796 phba->cfg_link_speed);
797 phba->cfg_link_speed = LPFC_USER_LINK_SPEED_AUTO;
798 }
799 lpfc_init_link(phba, pmb, fc_topology, phba->cfg_link_speed);
800 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
801 if (phba->sli_rev < LPFC_SLI_REV4)
802 lpfc_set_loopback_flag(phba);
803 rc = lpfc_sli_issue_mbox(phba, pmb, flag);
804 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) {
805 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
806 "0498 Adapter failed to init, mbxCmd x%x "
807 "INIT_LINK, mbxStatus x%x\n",
808 mb->mbxCommand, mb->mbxStatus);
809 if (phba->sli_rev <= LPFC_SLI_REV3) {
810 /* Clear all interrupt enable conditions */
811 writel(0, phba->HCregaddr);
812 readl(phba->HCregaddr); /* flush */
813 /* Clear all pending interrupts */
814 writel(0xffffffff, phba->HAregaddr);
815 readl(phba->HAregaddr); /* flush */
816 }
817 phba->link_state = LPFC_HBA_ERROR;
818 if (rc != MBX_BUSY || flag == MBX_POLL)
819 mempool_free(pmb, phba->mbox_mem_pool);
820 return -EIO;
821 }
822 phba->cfg_suppress_link_up = LPFC_INITIALIZE_LINK;
823 if (flag == MBX_POLL)
824 mempool_free(pmb, phba->mbox_mem_pool);
825
826 return 0;
827 }
828
829 /**
830 * lpfc_hba_down_link - this routine downs the FC link
831 * @phba: pointer to lpfc hba data structure.
832 * @flag: mailbox command issue mode - either MBX_POLL or MBX_NOWAIT
833 *
834 * This routine will issue the DOWN_LINK mailbox command call.
835 * It is available to other drivers through the lpfc_hba data
836 * structure for use to stop the link.
837 *
838 * Return code
839 * 0 - success
840 * Any other value - error
841 **/
842 static int
lpfc_hba_down_link(struct lpfc_hba * phba,uint32_t flag)843 lpfc_hba_down_link(struct lpfc_hba *phba, uint32_t flag)
844 {
845 LPFC_MBOXQ_t *pmb;
846 int rc;
847
848 pmb = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
849 if (!pmb) {
850 phba->link_state = LPFC_HBA_ERROR;
851 return -ENOMEM;
852 }
853
854 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
855 "0491 Adapter Link is disabled.\n");
856 lpfc_down_link(phba, pmb);
857 pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
858 rc = lpfc_sli_issue_mbox(phba, pmb, flag);
859 if ((rc != MBX_SUCCESS) && (rc != MBX_BUSY)) {
860 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
861 "2522 Adapter failed to issue DOWN_LINK"
862 " mbox command rc 0x%x\n", rc);
863
864 mempool_free(pmb, phba->mbox_mem_pool);
865 return -EIO;
866 }
867 if (flag == MBX_POLL)
868 mempool_free(pmb, phba->mbox_mem_pool);
869
870 return 0;
871 }
872
873 /**
874 * lpfc_hba_down_prep - Perform lpfc uninitialization prior to HBA reset
875 * @phba: pointer to lpfc HBA data structure.
876 *
877 * This routine will do LPFC uninitialization before the HBA is reset when
878 * bringing down the SLI Layer.
879 *
880 * Return codes
881 * 0 - success.
882 * Any other value - error.
883 **/
884 int
lpfc_hba_down_prep(struct lpfc_hba * phba)885 lpfc_hba_down_prep(struct lpfc_hba *phba)
886 {
887 struct lpfc_vport **vports;
888 int i;
889
890 if (phba->sli_rev <= LPFC_SLI_REV3) {
891 /* Disable interrupts */
892 writel(0, phba->HCregaddr);
893 readl(phba->HCregaddr); /* flush */
894 }
895
896 if (test_bit(FC_UNLOADING, &phba->pport->load_flag))
897 lpfc_cleanup_discovery_resources(phba->pport);
898 else {
899 vports = lpfc_create_vport_work_array(phba);
900 if (vports != NULL)
901 for (i = 0; i <= phba->max_vports &&
902 vports[i] != NULL; i++)
903 lpfc_cleanup_discovery_resources(vports[i]);
904 lpfc_destroy_vport_work_array(phba, vports);
905 }
906 return 0;
907 }
908
909 /**
910 * lpfc_sli4_free_sp_events - Cleanup sp_queue_events to free
911 * rspiocb which got deferred
912 *
913 * @phba: pointer to lpfc HBA data structure.
914 *
915 * This routine will cleanup completed slow path events after HBA is reset
916 * when bringing down the SLI Layer.
917 *
918 *
919 * Return codes
920 * void.
921 **/
922 static void
lpfc_sli4_free_sp_events(struct lpfc_hba * phba)923 lpfc_sli4_free_sp_events(struct lpfc_hba *phba)
924 {
925 struct lpfc_iocbq *rspiocbq;
926 struct hbq_dmabuf *dmabuf;
927 struct lpfc_cq_event *cq_event;
928
929 clear_bit(HBA_SP_QUEUE_EVT, &phba->hba_flag);
930
931 while (!list_empty(&phba->sli4_hba.sp_queue_event)) {
932 /* Get the response iocb from the head of work queue */
933 spin_lock_irq(&phba->hbalock);
934 list_remove_head(&phba->sli4_hba.sp_queue_event,
935 cq_event, struct lpfc_cq_event, list);
936 spin_unlock_irq(&phba->hbalock);
937
938 switch (bf_get(lpfc_wcqe_c_code, &cq_event->cqe.wcqe_cmpl)) {
939 case CQE_CODE_COMPL_WQE:
940 rspiocbq = container_of(cq_event, struct lpfc_iocbq,
941 cq_event);
942 lpfc_sli_release_iocbq(phba, rspiocbq);
943 break;
944 case CQE_CODE_RECEIVE:
945 case CQE_CODE_RECEIVE_V1:
946 dmabuf = container_of(cq_event, struct hbq_dmabuf,
947 cq_event);
948 lpfc_in_buf_free(phba, &dmabuf->dbuf);
949 }
950 }
951 }
952
953 /**
954 * lpfc_hba_free_post_buf - Perform lpfc uninitialization after HBA reset
955 * @phba: pointer to lpfc HBA data structure.
956 *
957 * This routine will cleanup posted ELS buffers after the HBA is reset
958 * when bringing down the SLI Layer.
959 *
960 *
961 * Return codes
962 * void.
963 **/
964 static void
lpfc_hba_free_post_buf(struct lpfc_hba * phba)965 lpfc_hba_free_post_buf(struct lpfc_hba *phba)
966 {
967 struct lpfc_sli *psli = &phba->sli;
968 struct lpfc_sli_ring *pring;
969 struct lpfc_dmabuf *mp, *next_mp;
970 LIST_HEAD(buflist);
971 int count;
972
973 if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED)
974 lpfc_sli_hbqbuf_free_all(phba);
975 else {
976 /* Cleanup preposted buffers on the ELS ring */
977 pring = &psli->sli3_ring[LPFC_ELS_RING];
978 spin_lock_irq(&phba->hbalock);
979 list_splice_init(&pring->postbufq, &buflist);
980 spin_unlock_irq(&phba->hbalock);
981
982 count = 0;
983 list_for_each_entry_safe(mp, next_mp, &buflist, list) {
984 list_del(&mp->list);
985 count++;
986 lpfc_mbuf_free(phba, mp->virt, mp->phys);
987 kfree(mp);
988 }
989
990 spin_lock_irq(&phba->hbalock);
991 pring->postbufq_cnt -= count;
992 spin_unlock_irq(&phba->hbalock);
993 }
994 }
995
996 /**
997 * lpfc_hba_clean_txcmplq - Perform lpfc uninitialization after HBA reset
998 * @phba: pointer to lpfc HBA data structure.
999 *
1000 * This routine will cleanup the txcmplq after the HBA is reset when bringing
1001 * down the SLI Layer.
1002 *
1003 * Return codes
1004 * void
1005 **/
1006 static void
lpfc_hba_clean_txcmplq(struct lpfc_hba * phba)1007 lpfc_hba_clean_txcmplq(struct lpfc_hba *phba)
1008 {
1009 struct lpfc_sli *psli = &phba->sli;
1010 struct lpfc_queue *qp = NULL;
1011 struct lpfc_sli_ring *pring;
1012 LIST_HEAD(completions);
1013 int i;
1014 struct lpfc_iocbq *piocb, *next_iocb;
1015
1016 if (phba->sli_rev != LPFC_SLI_REV4) {
1017 for (i = 0; i < psli->num_rings; i++) {
1018 pring = &psli->sli3_ring[i];
1019 spin_lock_irq(&phba->hbalock);
1020 /* At this point in time the HBA is either reset or DOA
1021 * Nothing should be on txcmplq as it will
1022 * NEVER complete.
1023 */
1024 list_splice_init(&pring->txcmplq, &completions);
1025 pring->txcmplq_cnt = 0;
1026 spin_unlock_irq(&phba->hbalock);
1027
1028 lpfc_sli_abort_iocb_ring(phba, pring);
1029 }
1030 /* Cancel all the IOCBs from the completions list */
1031 lpfc_sli_cancel_iocbs(phba, &completions,
1032 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED);
1033 return;
1034 }
1035 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
1036 pring = qp->pring;
1037 if (!pring)
1038 continue;
1039 spin_lock_irq(&pring->ring_lock);
1040 list_for_each_entry_safe(piocb, next_iocb,
1041 &pring->txcmplq, list)
1042 piocb->cmd_flag &= ~LPFC_IO_ON_TXCMPLQ;
1043 list_splice_init(&pring->txcmplq, &completions);
1044 pring->txcmplq_cnt = 0;
1045 spin_unlock_irq(&pring->ring_lock);
1046 lpfc_sli_abort_iocb_ring(phba, pring);
1047 }
1048 /* Cancel all the IOCBs from the completions list */
1049 lpfc_sli_cancel_iocbs(phba, &completions,
1050 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED);
1051 }
1052
1053 /**
1054 * lpfc_hba_down_post_s3 - Perform lpfc uninitialization after HBA reset
1055 * @phba: pointer to lpfc HBA data structure.
1056 *
1057 * This routine will do uninitialization after the HBA is reset when bring
1058 * down the SLI Layer.
1059 *
1060 * Return codes
1061 * 0 - success.
1062 * Any other value - error.
1063 **/
1064 static int
lpfc_hba_down_post_s3(struct lpfc_hba * phba)1065 lpfc_hba_down_post_s3(struct lpfc_hba *phba)
1066 {
1067 lpfc_hba_free_post_buf(phba);
1068 lpfc_hba_clean_txcmplq(phba);
1069 return 0;
1070 }
1071
1072 /**
1073 * lpfc_hba_down_post_s4 - Perform lpfc uninitialization after HBA reset
1074 * @phba: pointer to lpfc HBA data structure.
1075 *
1076 * This routine will do uninitialization after the HBA is reset when bring
1077 * down the SLI Layer.
1078 *
1079 * Return codes
1080 * 0 - success.
1081 * Any other value - error.
1082 **/
1083 static int
lpfc_hba_down_post_s4(struct lpfc_hba * phba)1084 lpfc_hba_down_post_s4(struct lpfc_hba *phba)
1085 {
1086 struct lpfc_io_buf *psb, *psb_next;
1087 struct lpfc_async_xchg_ctx *ctxp, *ctxp_next;
1088 struct lpfc_sli4_hdw_queue *qp;
1089 LIST_HEAD(aborts);
1090 LIST_HEAD(nvme_aborts);
1091 LIST_HEAD(nvmet_aborts);
1092 struct lpfc_sglq *sglq_entry = NULL;
1093 int cnt, idx;
1094
1095
1096 lpfc_sli_hbqbuf_free_all(phba);
1097 lpfc_hba_clean_txcmplq(phba);
1098
1099 /* At this point in time the HBA is either reset or DOA. Either
1100 * way, nothing should be on lpfc_abts_els_sgl_list, it needs to be
1101 * on the lpfc_els_sgl_list so that it can either be freed if the
1102 * driver is unloading or reposted if the driver is restarting
1103 * the port.
1104 */
1105
1106 /* sgl_list_lock required because worker thread uses this
1107 * list.
1108 */
1109 spin_lock_irq(&phba->sli4_hba.sgl_list_lock);
1110 list_for_each_entry(sglq_entry,
1111 &phba->sli4_hba.lpfc_abts_els_sgl_list, list)
1112 sglq_entry->state = SGL_FREED;
1113
1114 list_splice_init(&phba->sli4_hba.lpfc_abts_els_sgl_list,
1115 &phba->sli4_hba.lpfc_els_sgl_list);
1116
1117
1118 spin_unlock_irq(&phba->sli4_hba.sgl_list_lock);
1119
1120 /* abts_xxxx_buf_list_lock required because worker thread uses this
1121 * list.
1122 */
1123 spin_lock_irq(&phba->hbalock);
1124 cnt = 0;
1125 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
1126 qp = &phba->sli4_hba.hdwq[idx];
1127
1128 spin_lock(&qp->abts_io_buf_list_lock);
1129 list_splice_init(&qp->lpfc_abts_io_buf_list,
1130 &aborts);
1131
1132 list_for_each_entry_safe(psb, psb_next, &aborts, list) {
1133 psb->pCmd = NULL;
1134 psb->status = IOSTAT_SUCCESS;
1135 cnt++;
1136 }
1137 spin_lock(&qp->io_buf_list_put_lock);
1138 list_splice_init(&aborts, &qp->lpfc_io_buf_list_put);
1139 qp->put_io_bufs += qp->abts_scsi_io_bufs;
1140 qp->put_io_bufs += qp->abts_nvme_io_bufs;
1141 qp->abts_scsi_io_bufs = 0;
1142 qp->abts_nvme_io_bufs = 0;
1143 spin_unlock(&qp->io_buf_list_put_lock);
1144 spin_unlock(&qp->abts_io_buf_list_lock);
1145 }
1146 spin_unlock_irq(&phba->hbalock);
1147
1148 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
1149 spin_lock_irq(&phba->sli4_hba.abts_nvmet_buf_list_lock);
1150 list_splice_init(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list,
1151 &nvmet_aborts);
1152 spin_unlock_irq(&phba->sli4_hba.abts_nvmet_buf_list_lock);
1153 list_for_each_entry_safe(ctxp, ctxp_next, &nvmet_aborts, list) {
1154 ctxp->flag &= ~(LPFC_NVME_XBUSY | LPFC_NVME_ABORT_OP);
1155 lpfc_nvmet_ctxbuf_post(phba, ctxp->ctxbuf);
1156 }
1157 }
1158
1159 lpfc_sli4_free_sp_events(phba);
1160 return cnt;
1161 }
1162
1163 /**
1164 * lpfc_hba_down_post - Wrapper func for hba down post routine
1165 * @phba: pointer to lpfc HBA data structure.
1166 *
1167 * This routine wraps the actual SLI3 or SLI4 routine for performing
1168 * uninitialization after the HBA is reset when bring down the SLI Layer.
1169 *
1170 * Return codes
1171 * 0 - success.
1172 * Any other value - error.
1173 **/
1174 int
lpfc_hba_down_post(struct lpfc_hba * phba)1175 lpfc_hba_down_post(struct lpfc_hba *phba)
1176 {
1177 return (*phba->lpfc_hba_down_post)(phba);
1178 }
1179
1180 /**
1181 * lpfc_hb_timeout - The HBA-timer timeout handler
1182 * @t: timer context used to obtain the pointer to lpfc hba data structure.
1183 *
1184 * This is the HBA-timer timeout handler registered to the lpfc driver. When
1185 * this timer fires, a HBA timeout event shall be posted to the lpfc driver
1186 * work-port-events bitmap and the worker thread is notified. This timeout
1187 * event will be used by the worker thread to invoke the actual timeout
1188 * handler routine, lpfc_hb_timeout_handler. Any periodical operations will
1189 * be performed in the timeout handler and the HBA timeout event bit shall
1190 * be cleared by the worker thread after it has taken the event bitmap out.
1191 **/
1192 static void
lpfc_hb_timeout(struct timer_list * t)1193 lpfc_hb_timeout(struct timer_list *t)
1194 {
1195 struct lpfc_hba *phba;
1196 uint32_t tmo_posted;
1197 unsigned long iflag;
1198
1199 phba = timer_container_of(phba, t, hb_tmofunc);
1200
1201 /* Check for heart beat timeout conditions */
1202 spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
1203 tmo_posted = phba->pport->work_port_events & WORKER_HB_TMO;
1204 if (!tmo_posted)
1205 phba->pport->work_port_events |= WORKER_HB_TMO;
1206 spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
1207
1208 /* Tell the worker thread there is work to do */
1209 if (!tmo_posted)
1210 lpfc_worker_wake_up(phba);
1211 return;
1212 }
1213
1214 /**
1215 * lpfc_rrq_timeout - The RRQ-timer timeout handler
1216 * @t: timer context used to obtain the pointer to lpfc hba data structure.
1217 *
1218 * This is the RRQ-timer timeout handler registered to the lpfc driver. When
1219 * this timer fires, a RRQ timeout event shall be posted to the lpfc driver
1220 * work-port-events bitmap and the worker thread is notified. This timeout
1221 * event will be used by the worker thread to invoke the actual timeout
1222 * handler routine, lpfc_rrq_handler. Any periodical operations will
1223 * be performed in the timeout handler and the RRQ timeout event bit shall
1224 * be cleared by the worker thread after it has taken the event bitmap out.
1225 **/
1226 static void
lpfc_rrq_timeout(struct timer_list * t)1227 lpfc_rrq_timeout(struct timer_list *t)
1228 {
1229 struct lpfc_hba *phba;
1230
1231 phba = timer_container_of(phba, t, rrq_tmr);
1232 if (test_bit(FC_UNLOADING, &phba->pport->load_flag)) {
1233 clear_bit(HBA_RRQ_ACTIVE, &phba->hba_flag);
1234 return;
1235 }
1236
1237 set_bit(HBA_RRQ_ACTIVE, &phba->hba_flag);
1238 lpfc_worker_wake_up(phba);
1239 }
1240
1241 /**
1242 * lpfc_hb_mbox_cmpl - The lpfc heart-beat mailbox command callback function
1243 * @phba: pointer to lpfc hba data structure.
1244 * @pmboxq: pointer to the driver internal queue element for mailbox command.
1245 *
1246 * This is the callback function to the lpfc heart-beat mailbox command.
1247 * If configured, the lpfc driver issues the heart-beat mailbox command to
1248 * the HBA every LPFC_HB_MBOX_INTERVAL (current 5) seconds. At the time the
1249 * heart-beat mailbox command is issued, the driver shall set up heart-beat
1250 * timeout timer to LPFC_HB_MBOX_TIMEOUT (current 30) seconds and marks
1251 * heart-beat outstanding state. Once the mailbox command comes back and
1252 * no error conditions detected, the heart-beat mailbox command timer is
1253 * reset to LPFC_HB_MBOX_INTERVAL seconds and the heart-beat outstanding
1254 * state is cleared for the next heart-beat. If the timer expired with the
1255 * heart-beat outstanding state set, the driver will put the HBA offline.
1256 **/
1257 static void
lpfc_hb_mbox_cmpl(struct lpfc_hba * phba,LPFC_MBOXQ_t * pmboxq)1258 lpfc_hb_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
1259 {
1260 clear_bit(HBA_HBEAT_INP, &phba->hba_flag);
1261 clear_bit(HBA_HBEAT_TMO, &phba->hba_flag);
1262
1263 /* Check and reset heart-beat timer if necessary */
1264 mempool_free(pmboxq, phba->mbox_mem_pool);
1265 if (!test_bit(FC_OFFLINE_MODE, &phba->pport->fc_flag) &&
1266 !(phba->link_state == LPFC_HBA_ERROR) &&
1267 !test_bit(FC_UNLOADING, &phba->pport->load_flag))
1268 mod_timer(&phba->hb_tmofunc,
1269 jiffies +
1270 secs_to_jiffies(LPFC_HB_MBOX_INTERVAL));
1271 return;
1272 }
1273
1274 /*
1275 * lpfc_idle_stat_delay_work - idle_stat tracking
1276 *
1277 * This routine tracks per-eq idle_stat and determines polling decisions.
1278 *
1279 * Return codes:
1280 * None
1281 **/
1282 static void
lpfc_idle_stat_delay_work(struct work_struct * work)1283 lpfc_idle_stat_delay_work(struct work_struct *work)
1284 {
1285 struct lpfc_hba *phba = container_of(to_delayed_work(work),
1286 struct lpfc_hba,
1287 idle_stat_delay_work);
1288 struct lpfc_queue *eq;
1289 struct lpfc_sli4_hdw_queue *hdwq;
1290 struct lpfc_idle_stat *idle_stat;
1291 u32 i, idle_percent;
1292 u64 wall, wall_idle, diff_wall, diff_idle, busy_time;
1293
1294 if (test_bit(FC_UNLOADING, &phba->pport->load_flag))
1295 return;
1296
1297 if (phba->link_state == LPFC_HBA_ERROR ||
1298 test_bit(FC_OFFLINE_MODE, &phba->pport->fc_flag) ||
1299 phba->cmf_active_mode != LPFC_CFG_OFF)
1300 goto requeue;
1301
1302 for_each_present_cpu(i) {
1303 hdwq = &phba->sli4_hba.hdwq[phba->sli4_hba.cpu_map[i].hdwq];
1304 eq = hdwq->hba_eq;
1305
1306 /* Skip if we've already handled this eq's primary CPU */
1307 if (eq->chann != i)
1308 continue;
1309
1310 idle_stat = &phba->sli4_hba.idle_stat[i];
1311
1312 /* get_cpu_idle_time returns values as running counters. Thus,
1313 * to know the amount for this period, the prior counter values
1314 * need to be subtracted from the current counter values.
1315 * From there, the idle time stat can be calculated as a
1316 * percentage of 100 - the sum of the other consumption times.
1317 */
1318 wall_idle = get_cpu_idle_time(i, &wall, 1);
1319 diff_idle = wall_idle - idle_stat->prev_idle;
1320 diff_wall = wall - idle_stat->prev_wall;
1321
1322 if (diff_wall <= diff_idle)
1323 busy_time = 0;
1324 else
1325 busy_time = diff_wall - diff_idle;
1326
1327 idle_percent = div64_u64(100 * busy_time, diff_wall);
1328 idle_percent = 100 - idle_percent;
1329
1330 if (idle_percent < 15)
1331 eq->poll_mode = LPFC_QUEUE_WORK;
1332 else
1333 eq->poll_mode = LPFC_THREADED_IRQ;
1334
1335 idle_stat->prev_idle = wall_idle;
1336 idle_stat->prev_wall = wall;
1337 }
1338
1339 requeue:
1340 schedule_delayed_work(&phba->idle_stat_delay_work,
1341 msecs_to_jiffies(LPFC_IDLE_STAT_DELAY));
1342 }
1343
1344 static void
lpfc_hb_eq_delay_work(struct work_struct * work)1345 lpfc_hb_eq_delay_work(struct work_struct *work)
1346 {
1347 struct lpfc_hba *phba = container_of(to_delayed_work(work),
1348 struct lpfc_hba, eq_delay_work);
1349 struct lpfc_eq_intr_info *eqi, *eqi_new;
1350 struct lpfc_queue *eq, *eq_next;
1351 unsigned char *ena_delay = NULL;
1352 uint32_t usdelay;
1353 int i;
1354
1355 if (!phba->cfg_auto_imax ||
1356 test_bit(FC_UNLOADING, &phba->pport->load_flag))
1357 return;
1358
1359 if (phba->link_state == LPFC_HBA_ERROR ||
1360 test_bit(FC_OFFLINE_MODE, &phba->pport->fc_flag))
1361 goto requeue;
1362
1363 ena_delay = kcalloc(phba->sli4_hba.num_possible_cpu, sizeof(*ena_delay),
1364 GFP_KERNEL);
1365 if (!ena_delay)
1366 goto requeue;
1367
1368 for (i = 0; i < phba->cfg_irq_chann; i++) {
1369 /* Get the EQ corresponding to the IRQ vector */
1370 eq = phba->sli4_hba.hba_eq_hdl[i].eq;
1371 if (!eq)
1372 continue;
1373 if (eq->q_mode || eq->q_flag & HBA_EQ_DELAY_CHK) {
1374 eq->q_flag &= ~HBA_EQ_DELAY_CHK;
1375 ena_delay[eq->last_cpu] = 1;
1376 }
1377 }
1378
1379 for_each_present_cpu(i) {
1380 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, i);
1381 if (ena_delay[i]) {
1382 usdelay = (eqi->icnt >> 10) * LPFC_EQ_DELAY_STEP;
1383 if (usdelay > LPFC_MAX_AUTO_EQ_DELAY)
1384 usdelay = LPFC_MAX_AUTO_EQ_DELAY;
1385 } else {
1386 usdelay = 0;
1387 }
1388
1389 eqi->icnt = 0;
1390
1391 list_for_each_entry_safe(eq, eq_next, &eqi->list, cpu_list) {
1392 if (unlikely(eq->last_cpu != i)) {
1393 eqi_new = per_cpu_ptr(phba->sli4_hba.eq_info,
1394 eq->last_cpu);
1395 list_move_tail(&eq->cpu_list, &eqi_new->list);
1396 continue;
1397 }
1398 if (usdelay != eq->q_mode)
1399 lpfc_modify_hba_eq_delay(phba, eq->hdwq, 1,
1400 usdelay);
1401 }
1402 }
1403
1404 kfree(ena_delay);
1405
1406 requeue:
1407 queue_delayed_work(phba->wq, &phba->eq_delay_work,
1408 msecs_to_jiffies(LPFC_EQ_DELAY_MSECS));
1409 }
1410
1411 /**
1412 * lpfc_hb_mxp_handler - Multi-XRI pools handler to adjust XRI distribution
1413 * @phba: pointer to lpfc hba data structure.
1414 *
1415 * For each heartbeat, this routine does some heuristic methods to adjust
1416 * XRI distribution. The goal is to fully utilize free XRIs.
1417 **/
lpfc_hb_mxp_handler(struct lpfc_hba * phba)1418 static void lpfc_hb_mxp_handler(struct lpfc_hba *phba)
1419 {
1420 u32 i;
1421 u32 hwq_count;
1422
1423 hwq_count = phba->cfg_hdw_queue;
1424 for (i = 0; i < hwq_count; i++) {
1425 /* Adjust XRIs in private pool */
1426 lpfc_adjust_pvt_pool_count(phba, i);
1427
1428 /* Adjust high watermark */
1429 lpfc_adjust_high_watermark(phba, i);
1430
1431 #ifdef LPFC_MXP_STAT
1432 /* Snapshot pbl, pvt and busy count */
1433 lpfc_snapshot_mxp(phba, i);
1434 #endif
1435 }
1436 }
1437
1438 /**
1439 * lpfc_issue_hb_mbox - Issues heart-beat mailbox command
1440 * @phba: pointer to lpfc hba data structure.
1441 *
1442 * If a HB mbox is not already in progrees, this routine will allocate
1443 * a LPFC_MBOXQ_t, populate it with a MBX_HEARTBEAT (0x31) command,
1444 * and issue it. The HBA_HBEAT_INP flag means the command is in progress.
1445 **/
1446 int
lpfc_issue_hb_mbox(struct lpfc_hba * phba)1447 lpfc_issue_hb_mbox(struct lpfc_hba *phba)
1448 {
1449 LPFC_MBOXQ_t *pmboxq;
1450 int retval;
1451
1452 /* Is a Heartbeat mbox already in progress */
1453 if (test_bit(HBA_HBEAT_INP, &phba->hba_flag))
1454 return 0;
1455
1456 pmboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
1457 if (!pmboxq)
1458 return -ENOMEM;
1459
1460 lpfc_heart_beat(phba, pmboxq);
1461 pmboxq->mbox_cmpl = lpfc_hb_mbox_cmpl;
1462 pmboxq->vport = phba->pport;
1463 retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
1464
1465 if (retval != MBX_BUSY && retval != MBX_SUCCESS) {
1466 mempool_free(pmboxq, phba->mbox_mem_pool);
1467 return -ENXIO;
1468 }
1469 set_bit(HBA_HBEAT_INP, &phba->hba_flag);
1470
1471 return 0;
1472 }
1473
1474 /**
1475 * lpfc_issue_hb_tmo - Signals heartbeat timer to issue mbox command
1476 * @phba: pointer to lpfc hba data structure.
1477 *
1478 * The heartbeat timer (every 5 sec) will fire. If the HBA_HBEAT_TMO
1479 * flag is set, it will force a MBX_HEARTBEAT mbox command, regardless
1480 * of the value of lpfc_enable_hba_heartbeat.
1481 * If lpfc_enable_hba_heartbeat is set, the timeout routine will always
1482 * try to issue a MBX_HEARTBEAT mbox command.
1483 **/
1484 void
lpfc_issue_hb_tmo(struct lpfc_hba * phba)1485 lpfc_issue_hb_tmo(struct lpfc_hba *phba)
1486 {
1487 if (phba->cfg_enable_hba_heartbeat)
1488 return;
1489 set_bit(HBA_HBEAT_TMO, &phba->hba_flag);
1490 }
1491
1492 /**
1493 * lpfc_hb_timeout_handler - The HBA-timer timeout handler
1494 * @phba: pointer to lpfc hba data structure.
1495 *
1496 * This is the actual HBA-timer timeout handler to be invoked by the worker
1497 * thread whenever the HBA timer fired and HBA-timeout event posted. This
1498 * handler performs any periodic operations needed for the device. If such
1499 * periodic event has already been attended to either in the interrupt handler
1500 * or by processing slow-ring or fast-ring events within the HBA-timer
1501 * timeout window (LPFC_HB_MBOX_INTERVAL), this handler just simply resets
1502 * the timer for the next timeout period. If lpfc heart-beat mailbox command
1503 * is configured and there is no heart-beat mailbox command outstanding, a
1504 * heart-beat mailbox is issued and timer set properly. Otherwise, if there
1505 * has been a heart-beat mailbox command outstanding, the HBA shall be put
1506 * to offline.
1507 **/
1508 void
lpfc_hb_timeout_handler(struct lpfc_hba * phba)1509 lpfc_hb_timeout_handler(struct lpfc_hba *phba)
1510 {
1511 struct lpfc_vport **vports;
1512 struct lpfc_dmabuf *buf_ptr;
1513 int retval = 0;
1514 int i, tmo;
1515 struct lpfc_sli *psli = &phba->sli;
1516 LIST_HEAD(completions);
1517
1518 if (phba->cfg_xri_rebalancing) {
1519 /* Multi-XRI pools handler */
1520 lpfc_hb_mxp_handler(phba);
1521 }
1522
1523 vports = lpfc_create_vport_work_array(phba);
1524 if (vports != NULL)
1525 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
1526 lpfc_rcv_seq_check_edtov(vports[i]);
1527 lpfc_fdmi_change_check(vports[i]);
1528 }
1529 lpfc_destroy_vport_work_array(phba, vports);
1530
1531 if (phba->link_state == LPFC_HBA_ERROR ||
1532 test_bit(FC_UNLOADING, &phba->pport->load_flag) ||
1533 test_bit(FC_OFFLINE_MODE, &phba->pport->fc_flag))
1534 return;
1535
1536 if (phba->elsbuf_cnt &&
1537 (phba->elsbuf_cnt == phba->elsbuf_prev_cnt)) {
1538 spin_lock_irq(&phba->hbalock);
1539 list_splice_init(&phba->elsbuf, &completions);
1540 phba->elsbuf_cnt = 0;
1541 phba->elsbuf_prev_cnt = 0;
1542 spin_unlock_irq(&phba->hbalock);
1543
1544 while (!list_empty(&completions)) {
1545 list_remove_head(&completions, buf_ptr,
1546 struct lpfc_dmabuf, list);
1547 lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
1548 kfree(buf_ptr);
1549 }
1550 }
1551 phba->elsbuf_prev_cnt = phba->elsbuf_cnt;
1552
1553 /* If there is no heart beat outstanding, issue a heartbeat command */
1554 if (phba->cfg_enable_hba_heartbeat) {
1555 /* If IOs are completing, no need to issue a MBX_HEARTBEAT */
1556 spin_lock_irq(&phba->pport->work_port_lock);
1557 if (time_after(phba->last_completion_time +
1558 secs_to_jiffies(LPFC_HB_MBOX_INTERVAL),
1559 jiffies)) {
1560 spin_unlock_irq(&phba->pport->work_port_lock);
1561 if (test_bit(HBA_HBEAT_INP, &phba->hba_flag))
1562 tmo = (1000 * LPFC_HB_MBOX_TIMEOUT);
1563 else
1564 tmo = (1000 * LPFC_HB_MBOX_INTERVAL);
1565 goto out;
1566 }
1567 spin_unlock_irq(&phba->pport->work_port_lock);
1568
1569 /* Check if a MBX_HEARTBEAT is already in progress */
1570 if (test_bit(HBA_HBEAT_INP, &phba->hba_flag)) {
1571 /*
1572 * If heart beat timeout called with HBA_HBEAT_INP set
1573 * we need to give the hb mailbox cmd a chance to
1574 * complete or TMO.
1575 */
1576 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
1577 "0459 Adapter heartbeat still outstanding: "
1578 "last compl time was %d ms.\n",
1579 jiffies_to_msecs(jiffies
1580 - phba->last_completion_time));
1581 tmo = (1000 * LPFC_HB_MBOX_TIMEOUT);
1582 } else {
1583 if ((!(psli->sli_flag & LPFC_SLI_MBOX_ACTIVE)) &&
1584 (list_empty(&psli->mboxq))) {
1585
1586 retval = lpfc_issue_hb_mbox(phba);
1587 if (retval) {
1588 tmo = (1000 * LPFC_HB_MBOX_INTERVAL);
1589 goto out;
1590 }
1591 phba->skipped_hb = 0;
1592 } else if (time_before_eq(phba->last_completion_time,
1593 phba->skipped_hb)) {
1594 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
1595 "2857 Last completion time not "
1596 " updated in %d ms\n",
1597 jiffies_to_msecs(jiffies
1598 - phba->last_completion_time));
1599 } else
1600 phba->skipped_hb = jiffies;
1601
1602 tmo = (1000 * LPFC_HB_MBOX_TIMEOUT);
1603 goto out;
1604 }
1605 } else {
1606 /* Check to see if we want to force a MBX_HEARTBEAT */
1607 if (test_bit(HBA_HBEAT_TMO, &phba->hba_flag)) {
1608 retval = lpfc_issue_hb_mbox(phba);
1609 if (retval)
1610 tmo = (1000 * LPFC_HB_MBOX_INTERVAL);
1611 else
1612 tmo = (1000 * LPFC_HB_MBOX_TIMEOUT);
1613 goto out;
1614 }
1615 tmo = (1000 * LPFC_HB_MBOX_INTERVAL);
1616 }
1617 out:
1618 mod_timer(&phba->hb_tmofunc, jiffies + msecs_to_jiffies(tmo));
1619 }
1620
1621 /**
1622 * lpfc_offline_eratt - Bring lpfc offline on hardware error attention
1623 * @phba: pointer to lpfc hba data structure.
1624 *
1625 * This routine is called to bring the HBA offline when HBA hardware error
1626 * other than Port Error 6 has been detected.
1627 **/
1628 static void
lpfc_offline_eratt(struct lpfc_hba * phba)1629 lpfc_offline_eratt(struct lpfc_hba *phba)
1630 {
1631 struct lpfc_sli *psli = &phba->sli;
1632
1633 spin_lock_irq(&phba->hbalock);
1634 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
1635 spin_unlock_irq(&phba->hbalock);
1636 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
1637
1638 lpfc_offline(phba);
1639 lpfc_reset_barrier(phba);
1640 spin_lock_irq(&phba->hbalock);
1641 lpfc_sli_brdreset(phba);
1642 spin_unlock_irq(&phba->hbalock);
1643 lpfc_hba_down_post(phba);
1644 lpfc_sli_brdready(phba, HS_MBRDY);
1645 lpfc_unblock_mgmt_io(phba);
1646 phba->link_state = LPFC_HBA_ERROR;
1647 return;
1648 }
1649
1650 /**
1651 * lpfc_sli4_offline_eratt - Bring lpfc offline on SLI4 hardware error attention
1652 * @phba: pointer to lpfc hba data structure.
1653 *
1654 * This routine is called to bring a SLI4 HBA offline when HBA hardware error
1655 * other than Port Error 6 has been detected.
1656 **/
1657 void
lpfc_sli4_offline_eratt(struct lpfc_hba * phba)1658 lpfc_sli4_offline_eratt(struct lpfc_hba *phba)
1659 {
1660 spin_lock_irq(&phba->hbalock);
1661 if (phba->link_state == LPFC_HBA_ERROR &&
1662 test_bit(HBA_PCI_ERR, &phba->bit_flags)) {
1663 spin_unlock_irq(&phba->hbalock);
1664 return;
1665 }
1666 phba->link_state = LPFC_HBA_ERROR;
1667 spin_unlock_irq(&phba->hbalock);
1668
1669 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
1670 lpfc_sli_flush_io_rings(phba);
1671 lpfc_offline(phba);
1672 lpfc_hba_down_post(phba);
1673 lpfc_unblock_mgmt_io(phba);
1674 }
1675
1676 /**
1677 * lpfc_handle_deferred_eratt - The HBA hardware deferred error handler
1678 * @phba: pointer to lpfc hba data structure.
1679 *
1680 * This routine is invoked to handle the deferred HBA hardware error
1681 * conditions. This type of error is indicated by HBA by setting ER1
1682 * and another ER bit in the host status register. The driver will
1683 * wait until the ER1 bit clears before handling the error condition.
1684 **/
1685 static void
lpfc_handle_deferred_eratt(struct lpfc_hba * phba)1686 lpfc_handle_deferred_eratt(struct lpfc_hba *phba)
1687 {
1688 uint32_t old_host_status = phba->work_hs;
1689 struct lpfc_sli *psli = &phba->sli;
1690
1691 /* If the pci channel is offline, ignore possible errors,
1692 * since we cannot communicate with the pci card anyway.
1693 */
1694 if (pci_channel_offline(phba->pcidev)) {
1695 clear_bit(DEFER_ERATT, &phba->hba_flag);
1696 return;
1697 }
1698
1699 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
1700 "0479 Deferred Adapter Hardware Error "
1701 "Data: x%x x%x x%x\n",
1702 phba->work_hs, phba->work_status[0],
1703 phba->work_status[1]);
1704
1705 spin_lock_irq(&phba->hbalock);
1706 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
1707 spin_unlock_irq(&phba->hbalock);
1708
1709
1710 /*
1711 * Firmware stops when it triggred erratt. That could cause the I/Os
1712 * dropped by the firmware. Error iocb (I/O) on txcmplq and let the
1713 * SCSI layer retry it after re-establishing link.
1714 */
1715 lpfc_sli_abort_fcp_rings(phba);
1716
1717 /*
1718 * There was a firmware error. Take the hba offline and then
1719 * attempt to restart it.
1720 */
1721 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
1722 lpfc_offline(phba);
1723
1724 /* Wait for the ER1 bit to clear.*/
1725 while (phba->work_hs & HS_FFER1) {
1726 msleep(100);
1727 if (lpfc_readl(phba->HSregaddr, &phba->work_hs)) {
1728 phba->work_hs = UNPLUG_ERR ;
1729 break;
1730 }
1731 /* If driver is unloading let the worker thread continue */
1732 if (test_bit(FC_UNLOADING, &phba->pport->load_flag)) {
1733 phba->work_hs = 0;
1734 break;
1735 }
1736 }
1737
1738 /*
1739 * This is to ptrotect against a race condition in which
1740 * first write to the host attention register clear the
1741 * host status register.
1742 */
1743 if (!phba->work_hs && !test_bit(FC_UNLOADING, &phba->pport->load_flag))
1744 phba->work_hs = old_host_status & ~HS_FFER1;
1745
1746 clear_bit(DEFER_ERATT, &phba->hba_flag);
1747 phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
1748 phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
1749 }
1750
1751 static void
lpfc_board_errevt_to_mgmt(struct lpfc_hba * phba)1752 lpfc_board_errevt_to_mgmt(struct lpfc_hba *phba)
1753 {
1754 struct lpfc_board_event_header board_event;
1755 struct Scsi_Host *shost;
1756
1757 board_event.event_type = FC_REG_BOARD_EVENT;
1758 board_event.subcategory = LPFC_EVENT_PORTINTERR;
1759 shost = lpfc_shost_from_vport(phba->pport);
1760 fc_host_post_vendor_event(shost, fc_get_event_number(),
1761 sizeof(board_event),
1762 (char *) &board_event,
1763 LPFC_NL_VENDOR_ID);
1764 }
1765
1766 /**
1767 * lpfc_handle_eratt_s3 - The SLI3 HBA hardware error handler
1768 * @phba: pointer to lpfc hba data structure.
1769 *
1770 * This routine is invoked to handle the following HBA hardware error
1771 * conditions:
1772 * 1 - HBA error attention interrupt
1773 * 2 - DMA ring index out of range
1774 * 3 - Mailbox command came back as unknown
1775 **/
1776 static void
lpfc_handle_eratt_s3(struct lpfc_hba * phba)1777 lpfc_handle_eratt_s3(struct lpfc_hba *phba)
1778 {
1779 struct lpfc_vport *vport = phba->pport;
1780 struct lpfc_sli *psli = &phba->sli;
1781 uint32_t event_data;
1782 unsigned long temperature;
1783 struct temp_event temp_event_data;
1784 struct Scsi_Host *shost;
1785
1786 /* If the pci channel is offline, ignore possible errors,
1787 * since we cannot communicate with the pci card anyway.
1788 */
1789 if (pci_channel_offline(phba->pcidev)) {
1790 clear_bit(DEFER_ERATT, &phba->hba_flag);
1791 return;
1792 }
1793
1794 /* If resets are disabled then leave the HBA alone and return */
1795 if (!phba->cfg_enable_hba_reset)
1796 return;
1797
1798 /* Send an internal error event to mgmt application */
1799 lpfc_board_errevt_to_mgmt(phba);
1800
1801 if (test_bit(DEFER_ERATT, &phba->hba_flag))
1802 lpfc_handle_deferred_eratt(phba);
1803
1804 if ((phba->work_hs & HS_FFER6) || (phba->work_hs & HS_FFER8)) {
1805 if (phba->work_hs & HS_FFER6)
1806 /* Re-establishing Link */
1807 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
1808 "1301 Re-establishing Link "
1809 "Data: x%x x%x x%x\n",
1810 phba->work_hs, phba->work_status[0],
1811 phba->work_status[1]);
1812 if (phba->work_hs & HS_FFER8)
1813 /* Device Zeroization */
1814 lpfc_printf_log(phba, KERN_INFO, LOG_LINK_EVENT,
1815 "2861 Host Authentication device "
1816 "zeroization Data:x%x x%x x%x\n",
1817 phba->work_hs, phba->work_status[0],
1818 phba->work_status[1]);
1819
1820 spin_lock_irq(&phba->hbalock);
1821 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
1822 spin_unlock_irq(&phba->hbalock);
1823
1824 /*
1825 * Firmware stops when it triggled erratt with HS_FFER6.
1826 * That could cause the I/Os dropped by the firmware.
1827 * Error iocb (I/O) on txcmplq and let the SCSI layer
1828 * retry it after re-establishing link.
1829 */
1830 lpfc_sli_abort_fcp_rings(phba);
1831
1832 /*
1833 * There was a firmware error. Take the hba offline and then
1834 * attempt to restart it.
1835 */
1836 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
1837 lpfc_offline(phba);
1838 lpfc_sli_brdrestart(phba);
1839 if (lpfc_online(phba) == 0) { /* Initialize the HBA */
1840 lpfc_unblock_mgmt_io(phba);
1841 return;
1842 }
1843 lpfc_unblock_mgmt_io(phba);
1844 } else if (phba->work_hs & HS_CRIT_TEMP) {
1845 temperature = readl(phba->MBslimaddr + TEMPERATURE_OFFSET);
1846 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
1847 temp_event_data.event_code = LPFC_CRIT_TEMP;
1848 temp_event_data.data = (uint32_t)temperature;
1849
1850 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
1851 "0406 Adapter maximum temperature exceeded "
1852 "(%ld), taking this port offline "
1853 "Data: x%x x%x x%x\n",
1854 temperature, phba->work_hs,
1855 phba->work_status[0], phba->work_status[1]);
1856
1857 shost = lpfc_shost_from_vport(phba->pport);
1858 fc_host_post_vendor_event(shost, fc_get_event_number(),
1859 sizeof(temp_event_data),
1860 (char *) &temp_event_data,
1861 SCSI_NL_VID_TYPE_PCI
1862 | PCI_VENDOR_ID_EMULEX);
1863
1864 spin_lock_irq(&phba->hbalock);
1865 phba->over_temp_state = HBA_OVER_TEMP;
1866 spin_unlock_irq(&phba->hbalock);
1867 lpfc_offline_eratt(phba);
1868
1869 } else {
1870 /* The if clause above forces this code path when the status
1871 * failure is a value other than FFER6. Do not call the offline
1872 * twice. This is the adapter hardware error path.
1873 */
1874 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
1875 "0457 Adapter Hardware Error "
1876 "Data: x%x x%x x%x\n",
1877 phba->work_hs,
1878 phba->work_status[0], phba->work_status[1]);
1879
1880 event_data = FC_REG_DUMP_EVENT;
1881 shost = lpfc_shost_from_vport(vport);
1882 fc_host_post_vendor_event(shost, fc_get_event_number(),
1883 sizeof(event_data), (char *) &event_data,
1884 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
1885
1886 lpfc_offline_eratt(phba);
1887 }
1888 return;
1889 }
1890
1891 /**
1892 * lpfc_sli4_port_sta_fn_reset - The SLI4 function reset due to port status reg
1893 * @phba: pointer to lpfc hba data structure.
1894 * @mbx_action: flag for mailbox shutdown action.
1895 * @en_rn_msg: send reset/port recovery message.
1896 * This routine is invoked to perform an SLI4 port PCI function reset in
1897 * response to port status register polling attention. It waits for port
1898 * status register (ERR, RDY, RN) bits before proceeding with function reset.
1899 * During this process, interrupt vectors are freed and later requested
1900 * for handling possible port resource change.
1901 **/
1902 static int
lpfc_sli4_port_sta_fn_reset(struct lpfc_hba * phba,int mbx_action,bool en_rn_msg)1903 lpfc_sli4_port_sta_fn_reset(struct lpfc_hba *phba, int mbx_action,
1904 bool en_rn_msg)
1905 {
1906 int rc;
1907 uint32_t intr_mode;
1908 LPFC_MBOXQ_t *mboxq;
1909
1910 /* Notifying the transport that the targets are going offline. */
1911 lpfc_scsi_dev_block(phba);
1912
1913 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) >=
1914 LPFC_SLI_INTF_IF_TYPE_2) {
1915 /*
1916 * On error status condition, driver need to wait for port
1917 * ready before performing reset.
1918 */
1919 rc = lpfc_sli4_pdev_status_reg_wait(phba);
1920 if (rc)
1921 return rc;
1922 }
1923
1924 /* need reset: attempt for port recovery */
1925 if (en_rn_msg)
1926 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
1927 "2887 Reset Needed: Attempting Port "
1928 "Recovery...\n");
1929
1930 /* If we are no wait, the HBA has been reset and is not
1931 * functional, thus we should clear
1932 * (LPFC_SLI_ACTIVE | LPFC_SLI_MBOX_ACTIVE) flags.
1933 */
1934 if (mbx_action == LPFC_MBX_NO_WAIT) {
1935 spin_lock_irq(&phba->hbalock);
1936 phba->sli.sli_flag &= ~LPFC_SLI_ACTIVE;
1937 if (phba->sli.mbox_active) {
1938 mboxq = phba->sli.mbox_active;
1939 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED;
1940 __lpfc_mbox_cmpl_put(phba, mboxq);
1941 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
1942 phba->sli.mbox_active = NULL;
1943 }
1944 spin_unlock_irq(&phba->hbalock);
1945 }
1946
1947 lpfc_offline_prep(phba, mbx_action);
1948 lpfc_sli_flush_io_rings(phba);
1949 lpfc_nvmels_flush_cmd(phba);
1950 lpfc_offline(phba);
1951 /* release interrupt for possible resource change */
1952 lpfc_sli4_disable_intr(phba);
1953 rc = lpfc_sli_brdrestart(phba);
1954 if (rc) {
1955 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
1956 "6309 Failed to restart board\n");
1957 return rc;
1958 }
1959 /* request and enable interrupt */
1960 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
1961 if (intr_mode == LPFC_INTR_ERROR) {
1962 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
1963 "3175 Failed to enable interrupt\n");
1964 return -EIO;
1965 }
1966 phba->intr_mode = intr_mode;
1967 rc = lpfc_online(phba);
1968 if (rc == 0)
1969 lpfc_unblock_mgmt_io(phba);
1970
1971 return rc;
1972 }
1973
1974 /**
1975 * lpfc_handle_eratt_s4 - The SLI4 HBA hardware error handler
1976 * @phba: pointer to lpfc hba data structure.
1977 *
1978 * This routine is invoked to handle the SLI4 HBA hardware error attention
1979 * conditions.
1980 **/
1981 static void
lpfc_handle_eratt_s4(struct lpfc_hba * phba)1982 lpfc_handle_eratt_s4(struct lpfc_hba *phba)
1983 {
1984 struct lpfc_vport *vport = phba->pport;
1985 uint32_t event_data;
1986 struct Scsi_Host *shost;
1987 uint32_t if_type;
1988 struct lpfc_register portstat_reg = {0};
1989 uint32_t reg_err1, reg_err2;
1990 uint32_t uerrlo_reg, uemasklo_reg;
1991 uint32_t smphr_port_status = 0, pci_rd_rc1, pci_rd_rc2;
1992 bool en_rn_msg = true;
1993 struct temp_event temp_event_data;
1994 struct lpfc_register portsmphr_reg;
1995 int rc, i;
1996
1997 /* If the pci channel is offline, ignore possible errors, since
1998 * we cannot communicate with the pci card anyway.
1999 */
2000 if (pci_channel_offline(phba->pcidev)) {
2001 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2002 "3166 pci channel is offline\n");
2003 lpfc_sli_flush_io_rings(phba);
2004 return;
2005 }
2006
2007 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
2008 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
2009 switch (if_type) {
2010 case LPFC_SLI_INTF_IF_TYPE_0:
2011 pci_rd_rc1 = lpfc_readl(
2012 phba->sli4_hba.u.if_type0.UERRLOregaddr,
2013 &uerrlo_reg);
2014 pci_rd_rc2 = lpfc_readl(
2015 phba->sli4_hba.u.if_type0.UEMASKLOregaddr,
2016 &uemasklo_reg);
2017 /* consider PCI bus read error as pci_channel_offline */
2018 if (pci_rd_rc1 == -EIO && pci_rd_rc2 == -EIO)
2019 return;
2020 if (!test_bit(HBA_RECOVERABLE_UE, &phba->hba_flag)) {
2021 lpfc_sli4_offline_eratt(phba);
2022 return;
2023 }
2024 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2025 "7623 Checking UE recoverable");
2026
2027 for (i = 0; i < phba->sli4_hba.ue_to_sr / 1000; i++) {
2028 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
2029 &portsmphr_reg.word0))
2030 continue;
2031
2032 smphr_port_status = bf_get(lpfc_port_smphr_port_status,
2033 &portsmphr_reg);
2034 if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
2035 LPFC_PORT_SEM_UE_RECOVERABLE)
2036 break;
2037 /*Sleep for 1Sec, before checking SEMAPHORE */
2038 msleep(1000);
2039 }
2040
2041 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2042 "4827 smphr_port_status x%x : Waited %dSec",
2043 smphr_port_status, i);
2044
2045 /* Recoverable UE, reset the HBA device */
2046 if ((smphr_port_status & LPFC_PORT_SEM_MASK) ==
2047 LPFC_PORT_SEM_UE_RECOVERABLE) {
2048 for (i = 0; i < 20; i++) {
2049 msleep(1000);
2050 if (!lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
2051 &portsmphr_reg.word0) &&
2052 (LPFC_POST_STAGE_PORT_READY ==
2053 bf_get(lpfc_port_smphr_port_status,
2054 &portsmphr_reg))) {
2055 rc = lpfc_sli4_port_sta_fn_reset(phba,
2056 LPFC_MBX_NO_WAIT, en_rn_msg);
2057 if (rc == 0)
2058 return;
2059 lpfc_printf_log(phba, KERN_ERR,
2060 LOG_TRACE_EVENT,
2061 "4215 Failed to recover UE");
2062 break;
2063 }
2064 }
2065 }
2066 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2067 "7624 Firmware not ready: Failing UE recovery,"
2068 " waited %dSec", i);
2069 phba->link_state = LPFC_HBA_ERROR;
2070 break;
2071
2072 case LPFC_SLI_INTF_IF_TYPE_2:
2073 case LPFC_SLI_INTF_IF_TYPE_6:
2074 pci_rd_rc1 = lpfc_readl(
2075 phba->sli4_hba.u.if_type2.STATUSregaddr,
2076 &portstat_reg.word0);
2077 /* consider PCI bus read error as pci_channel_offline */
2078 if (pci_rd_rc1 == -EIO) {
2079 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2080 "3151 PCI bus read access failure: x%x\n",
2081 readl(phba->sli4_hba.u.if_type2.STATUSregaddr));
2082 lpfc_sli4_offline_eratt(phba);
2083 return;
2084 }
2085 reg_err1 = readl(phba->sli4_hba.u.if_type2.ERR1regaddr);
2086 reg_err2 = readl(phba->sli4_hba.u.if_type2.ERR2regaddr);
2087 if (bf_get(lpfc_sliport_status_oti, &portstat_reg)) {
2088 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2089 "2889 Port Overtemperature event, "
2090 "taking port offline Data: x%x x%x\n",
2091 reg_err1, reg_err2);
2092
2093 phba->sfp_alarm |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
2094 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
2095 temp_event_data.event_code = LPFC_CRIT_TEMP;
2096 temp_event_data.data = 0xFFFFFFFF;
2097
2098 shost = lpfc_shost_from_vport(phba->pport);
2099 fc_host_post_vendor_event(shost, fc_get_event_number(),
2100 sizeof(temp_event_data),
2101 (char *)&temp_event_data,
2102 SCSI_NL_VID_TYPE_PCI
2103 | PCI_VENDOR_ID_EMULEX);
2104
2105 spin_lock_irq(&phba->hbalock);
2106 phba->over_temp_state = HBA_OVER_TEMP;
2107 spin_unlock_irq(&phba->hbalock);
2108 lpfc_sli4_offline_eratt(phba);
2109 return;
2110 }
2111 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
2112 reg_err2 == SLIPORT_ERR2_REG_FW_RESTART) {
2113 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2114 "3143 Port Down: Firmware Update "
2115 "Detected\n");
2116 en_rn_msg = false;
2117 } else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
2118 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
2119 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
2120 "3144 Port Down: Debug Dump\n");
2121 else if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
2122 reg_err2 == SLIPORT_ERR2_REG_FUNC_PROVISON)
2123 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2124 "3145 Port Down: Provisioning\n");
2125
2126 /* If resets are disabled then leave the HBA alone and return */
2127 if (!phba->cfg_enable_hba_reset)
2128 return;
2129
2130 /* Check port status register for function reset */
2131 rc = lpfc_sli4_port_sta_fn_reset(phba, LPFC_MBX_NO_WAIT,
2132 en_rn_msg);
2133 if (rc == 0) {
2134 /* don't report event on forced debug dump */
2135 if (reg_err1 == SLIPORT_ERR1_REG_ERR_CODE_2 &&
2136 reg_err2 == SLIPORT_ERR2_REG_FORCED_DUMP)
2137 return;
2138 else
2139 break;
2140 }
2141 /* fall through for not able to recover */
2142 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2143 "3152 Unrecoverable error\n");
2144 lpfc_sli4_offline_eratt(phba);
2145 break;
2146 case LPFC_SLI_INTF_IF_TYPE_1:
2147 default:
2148 break;
2149 }
2150 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
2151 "3123 Report dump event to upper layer\n");
2152 /* Send an internal error event to mgmt application */
2153 lpfc_board_errevt_to_mgmt(phba);
2154
2155 event_data = FC_REG_DUMP_EVENT;
2156 shost = lpfc_shost_from_vport(vport);
2157 fc_host_post_vendor_event(shost, fc_get_event_number(),
2158 sizeof(event_data), (char *) &event_data,
2159 SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_EMULEX);
2160 }
2161
2162 /**
2163 * lpfc_handle_eratt - Wrapper func for handling hba error attention
2164 * @phba: pointer to lpfc HBA data structure.
2165 *
2166 * This routine wraps the actual SLI3 or SLI4 hba error attention handling
2167 * routine from the API jump table function pointer from the lpfc_hba struct.
2168 *
2169 * Return codes
2170 * 0 - success.
2171 * Any other value - error.
2172 **/
2173 void
lpfc_handle_eratt(struct lpfc_hba * phba)2174 lpfc_handle_eratt(struct lpfc_hba *phba)
2175 {
2176 (*phba->lpfc_handle_eratt)(phba);
2177 }
2178
2179 /**
2180 * lpfc_handle_latt - The HBA link event handler
2181 * @phba: pointer to lpfc hba data structure.
2182 *
2183 * This routine is invoked from the worker thread to handle a HBA host
2184 * attention link event. SLI3 only.
2185 **/
2186 void
lpfc_handle_latt(struct lpfc_hba * phba)2187 lpfc_handle_latt(struct lpfc_hba *phba)
2188 {
2189 struct lpfc_vport *vport = phba->pport;
2190 struct lpfc_sli *psli = &phba->sli;
2191 LPFC_MBOXQ_t *pmb;
2192 volatile uint32_t control;
2193 int rc = 0;
2194
2195 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
2196 if (!pmb) {
2197 rc = 1;
2198 goto lpfc_handle_latt_err_exit;
2199 }
2200
2201 rc = lpfc_mbox_rsrc_prep(phba, pmb);
2202 if (rc) {
2203 rc = 2;
2204 mempool_free(pmb, phba->mbox_mem_pool);
2205 goto lpfc_handle_latt_err_exit;
2206 }
2207
2208 /* Cleanup any outstanding ELS commands */
2209 lpfc_els_flush_all_cmd(phba);
2210 psli->slistat.link_event++;
2211 lpfc_read_topology(phba, pmb, pmb->ctx_buf);
2212 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
2213 pmb->vport = vport;
2214 /* Block ELS IOCBs until we have processed this mbox command */
2215 phba->sli.sli3_ring[LPFC_ELS_RING].flag |= LPFC_STOP_IOCB_EVENT;
2216 rc = lpfc_sli_issue_mbox (phba, pmb, MBX_NOWAIT);
2217 if (rc == MBX_NOT_FINISHED) {
2218 rc = 4;
2219 goto lpfc_handle_latt_free_mbuf;
2220 }
2221
2222 /* Clear Link Attention in HA REG */
2223 spin_lock_irq(&phba->hbalock);
2224 writel(HA_LATT, phba->HAregaddr);
2225 readl(phba->HAregaddr); /* flush */
2226 spin_unlock_irq(&phba->hbalock);
2227
2228 return;
2229
2230 lpfc_handle_latt_free_mbuf:
2231 phba->sli.sli3_ring[LPFC_ELS_RING].flag &= ~LPFC_STOP_IOCB_EVENT;
2232 lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED);
2233 lpfc_handle_latt_err_exit:
2234 /* Enable Link attention interrupts */
2235 spin_lock_irq(&phba->hbalock);
2236 psli->sli_flag |= LPFC_PROCESS_LA;
2237 control = readl(phba->HCregaddr);
2238 control |= HC_LAINT_ENA;
2239 writel(control, phba->HCregaddr);
2240 readl(phba->HCregaddr); /* flush */
2241
2242 /* Clear Link Attention in HA REG */
2243 writel(HA_LATT, phba->HAregaddr);
2244 readl(phba->HAregaddr); /* flush */
2245 spin_unlock_irq(&phba->hbalock);
2246 lpfc_linkdown(phba);
2247 phba->link_state = LPFC_HBA_ERROR;
2248
2249 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
2250 "0300 LATT: Cannot issue READ_LA: Data:%d\n", rc);
2251
2252 return;
2253 }
2254
2255 static void
lpfc_fill_vpd(struct lpfc_hba * phba,uint8_t * vpd,int length,int * pindex)2256 lpfc_fill_vpd(struct lpfc_hba *phba, uint8_t *vpd, int length, int *pindex)
2257 {
2258 int i, j;
2259
2260 while (length > 0) {
2261 /* Look for Serial Number */
2262 if ((vpd[*pindex] == 'S') && (vpd[*pindex + 1] == 'N')) {
2263 *pindex += 2;
2264 i = vpd[*pindex];
2265 *pindex += 1;
2266 j = 0;
2267 length -= (3+i);
2268 while (i--) {
2269 phba->SerialNumber[j++] = vpd[(*pindex)++];
2270 if (j == 31)
2271 break;
2272 }
2273 phba->SerialNumber[j] = 0;
2274 continue;
2275 } else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '1')) {
2276 phba->vpd_flag |= VPD_MODEL_DESC;
2277 *pindex += 2;
2278 i = vpd[*pindex];
2279 *pindex += 1;
2280 j = 0;
2281 length -= (3+i);
2282 while (i--) {
2283 phba->ModelDesc[j++] = vpd[(*pindex)++];
2284 if (j == 255)
2285 break;
2286 }
2287 phba->ModelDesc[j] = 0;
2288 continue;
2289 } else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '2')) {
2290 phba->vpd_flag |= VPD_MODEL_NAME;
2291 *pindex += 2;
2292 i = vpd[*pindex];
2293 *pindex += 1;
2294 j = 0;
2295 length -= (3+i);
2296 while (i--) {
2297 phba->ModelName[j++] = vpd[(*pindex)++];
2298 if (j == 79)
2299 break;
2300 }
2301 phba->ModelName[j] = 0;
2302 continue;
2303 } else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '3')) {
2304 phba->vpd_flag |= VPD_PROGRAM_TYPE;
2305 *pindex += 2;
2306 i = vpd[*pindex];
2307 *pindex += 1;
2308 j = 0;
2309 length -= (3+i);
2310 while (i--) {
2311 phba->ProgramType[j++] = vpd[(*pindex)++];
2312 if (j == 255)
2313 break;
2314 }
2315 phba->ProgramType[j] = 0;
2316 continue;
2317 } else if ((vpd[*pindex] == 'V') && (vpd[*pindex + 1] == '4')) {
2318 phba->vpd_flag |= VPD_PORT;
2319 *pindex += 2;
2320 i = vpd[*pindex];
2321 *pindex += 1;
2322 j = 0;
2323 length -= (3 + i);
2324 while (i--) {
2325 if ((phba->sli_rev == LPFC_SLI_REV4) &&
2326 (phba->sli4_hba.pport_name_sta ==
2327 LPFC_SLI4_PPNAME_GET)) {
2328 j++;
2329 (*pindex)++;
2330 } else
2331 phba->Port[j++] = vpd[(*pindex)++];
2332 if (j == 19)
2333 break;
2334 }
2335 if ((phba->sli_rev != LPFC_SLI_REV4) ||
2336 (phba->sli4_hba.pport_name_sta ==
2337 LPFC_SLI4_PPNAME_NON))
2338 phba->Port[j] = 0;
2339 continue;
2340 } else {
2341 *pindex += 2;
2342 i = vpd[*pindex];
2343 *pindex += 1;
2344 *pindex += i;
2345 length -= (3 + i);
2346 }
2347 }
2348 }
2349
2350 /**
2351 * lpfc_parse_vpd - Parse VPD (Vital Product Data)
2352 * @phba: pointer to lpfc hba data structure.
2353 * @vpd: pointer to the vital product data.
2354 * @len: length of the vital product data in bytes.
2355 *
2356 * This routine parses the Vital Product Data (VPD). The VPD is treated as
2357 * an array of characters. In this routine, the ModelName, ProgramType, and
2358 * ModelDesc, etc. fields of the phba data structure will be populated.
2359 *
2360 * Return codes
2361 * 0 - pointer to the VPD passed in is NULL
2362 * 1 - success
2363 **/
2364 int
lpfc_parse_vpd(struct lpfc_hba * phba,uint8_t * vpd,int len)2365 lpfc_parse_vpd(struct lpfc_hba *phba, uint8_t *vpd, int len)
2366 {
2367 uint8_t lenlo, lenhi;
2368 int Length;
2369 int i;
2370 int finished = 0;
2371 int index = 0;
2372
2373 if (!vpd)
2374 return 0;
2375
2376 /* Vital Product */
2377 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
2378 "0455 Vital Product Data: x%x x%x x%x x%x\n",
2379 (uint32_t) vpd[0], (uint32_t) vpd[1], (uint32_t) vpd[2],
2380 (uint32_t) vpd[3]);
2381 while (!finished && (index < (len - 4))) {
2382 switch (vpd[index]) {
2383 case 0x82:
2384 case 0x91:
2385 index += 1;
2386 lenlo = vpd[index];
2387 index += 1;
2388 lenhi = vpd[index];
2389 index += 1;
2390 i = ((((unsigned short)lenhi) << 8) + lenlo);
2391 index += i;
2392 break;
2393 case 0x90:
2394 index += 1;
2395 lenlo = vpd[index];
2396 index += 1;
2397 lenhi = vpd[index];
2398 index += 1;
2399 Length = ((((unsigned short)lenhi) << 8) + lenlo);
2400 if (Length > len - index)
2401 Length = len - index;
2402
2403 lpfc_fill_vpd(phba, vpd, Length, &index);
2404 finished = 0;
2405 break;
2406 case 0x78:
2407 finished = 1;
2408 break;
2409 default:
2410 index ++;
2411 break;
2412 }
2413 }
2414
2415 return(1);
2416 }
2417
2418 /**
2419 * lpfc_get_atto_model_desc - Retrieve ATTO HBA device model name and description
2420 * @phba: pointer to lpfc hba data structure.
2421 * @mdp: pointer to the data structure to hold the derived model name.
2422 * @descp: pointer to the data structure to hold the derived description.
2423 *
2424 * This routine retrieves HBA's description based on its registered PCI device
2425 * ID. The @descp passed into this function points to an array of 256 chars. It
2426 * shall be returned with the model name, maximum speed, and the host bus type.
2427 * The @mdp passed into this function points to an array of 80 chars. When the
2428 * function returns, the @mdp will be filled with the model name.
2429 **/
2430 static void
lpfc_get_atto_model_desc(struct lpfc_hba * phba,uint8_t * mdp,uint8_t * descp)2431 lpfc_get_atto_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp)
2432 {
2433 uint16_t sub_dev_id = phba->pcidev->subsystem_device;
2434 char *model = "<Unknown>";
2435 int tbolt = 0;
2436
2437 switch (sub_dev_id) {
2438 case PCI_DEVICE_ID_CLRY_161E:
2439 model = "161E";
2440 break;
2441 case PCI_DEVICE_ID_CLRY_162E:
2442 model = "162E";
2443 break;
2444 case PCI_DEVICE_ID_CLRY_164E:
2445 model = "164E";
2446 break;
2447 case PCI_DEVICE_ID_CLRY_161P:
2448 model = "161P";
2449 break;
2450 case PCI_DEVICE_ID_CLRY_162P:
2451 model = "162P";
2452 break;
2453 case PCI_DEVICE_ID_CLRY_164P:
2454 model = "164P";
2455 break;
2456 case PCI_DEVICE_ID_CLRY_321E:
2457 model = "321E";
2458 break;
2459 case PCI_DEVICE_ID_CLRY_322E:
2460 model = "322E";
2461 break;
2462 case PCI_DEVICE_ID_CLRY_324E:
2463 model = "324E";
2464 break;
2465 case PCI_DEVICE_ID_CLRY_321P:
2466 model = "321P";
2467 break;
2468 case PCI_DEVICE_ID_CLRY_322P:
2469 model = "322P";
2470 break;
2471 case PCI_DEVICE_ID_CLRY_324P:
2472 model = "324P";
2473 break;
2474 case PCI_DEVICE_ID_TLFC_2XX2:
2475 model = "2XX2";
2476 tbolt = 1;
2477 break;
2478 case PCI_DEVICE_ID_TLFC_3162:
2479 model = "3162";
2480 tbolt = 1;
2481 break;
2482 case PCI_DEVICE_ID_TLFC_3322:
2483 model = "3322";
2484 tbolt = 1;
2485 break;
2486 default:
2487 model = "Unknown";
2488 break;
2489 }
2490
2491 if (mdp && mdp[0] == '\0')
2492 snprintf(mdp, 79, "%s", model);
2493
2494 if (descp && descp[0] == '\0')
2495 snprintf(descp, 255,
2496 "ATTO %s%s, Fibre Channel Adapter Initiator, Port %s",
2497 (tbolt) ? "ThunderLink FC " : "Celerity FC-",
2498 model,
2499 phba->Port);
2500 }
2501
2502 /**
2503 * lpfc_get_hba_model_desc - Retrieve HBA device model name and description
2504 * @phba: pointer to lpfc hba data structure.
2505 * @mdp: pointer to the data structure to hold the derived model name.
2506 * @descp: pointer to the data structure to hold the derived description.
2507 *
2508 * This routine retrieves HBA's description based on its registered PCI device
2509 * ID. The @descp passed into this function points to an array of 256 chars. It
2510 * shall be returned with the model name, maximum speed, and the host bus type.
2511 * The @mdp passed into this function points to an array of 80 chars. When the
2512 * function returns, the @mdp will be filled with the model name.
2513 **/
2514 static void
lpfc_get_hba_model_desc(struct lpfc_hba * phba,uint8_t * mdp,uint8_t * descp)2515 lpfc_get_hba_model_desc(struct lpfc_hba *phba, uint8_t *mdp, uint8_t *descp)
2516 {
2517 lpfc_vpd_t *vp;
2518 uint16_t dev_id = phba->pcidev->device;
2519 int max_speed;
2520 int GE = 0;
2521 int oneConnect = 0; /* default is not a oneConnect */
2522 struct {
2523 char *name;
2524 char *bus;
2525 char *function;
2526 } m = {"<Unknown>", "", ""};
2527
2528 if (mdp && mdp[0] != '\0'
2529 && descp && descp[0] != '\0')
2530 return;
2531
2532 if (phba->pcidev->vendor == PCI_VENDOR_ID_ATTO) {
2533 lpfc_get_atto_model_desc(phba, mdp, descp);
2534 return;
2535 }
2536
2537 if (phba->lmt & LMT_64Gb)
2538 max_speed = 64;
2539 else if (phba->lmt & LMT_32Gb)
2540 max_speed = 32;
2541 else if (phba->lmt & LMT_16Gb)
2542 max_speed = 16;
2543 else if (phba->lmt & LMT_10Gb)
2544 max_speed = 10;
2545 else if (phba->lmt & LMT_8Gb)
2546 max_speed = 8;
2547 else if (phba->lmt & LMT_4Gb)
2548 max_speed = 4;
2549 else if (phba->lmt & LMT_2Gb)
2550 max_speed = 2;
2551 else if (phba->lmt & LMT_1Gb)
2552 max_speed = 1;
2553 else
2554 max_speed = 0;
2555
2556 vp = &phba->vpd;
2557
2558 switch (dev_id) {
2559 case PCI_DEVICE_ID_FIREFLY:
2560 m = (typeof(m)){"LP6000", "PCI",
2561 "Obsolete, Unsupported Fibre Channel Adapter"};
2562 break;
2563 case PCI_DEVICE_ID_SUPERFLY:
2564 if (vp->rev.biuRev >= 1 && vp->rev.biuRev <= 3)
2565 m = (typeof(m)){"LP7000", "PCI", ""};
2566 else
2567 m = (typeof(m)){"LP7000E", "PCI", ""};
2568 m.function = "Obsolete, Unsupported Fibre Channel Adapter";
2569 break;
2570 case PCI_DEVICE_ID_DRAGONFLY:
2571 m = (typeof(m)){"LP8000", "PCI",
2572 "Obsolete, Unsupported Fibre Channel Adapter"};
2573 break;
2574 case PCI_DEVICE_ID_CENTAUR:
2575 if (FC_JEDEC_ID(vp->rev.biuRev) == CENTAUR_2G_JEDEC_ID)
2576 m = (typeof(m)){"LP9002", "PCI", ""};
2577 else
2578 m = (typeof(m)){"LP9000", "PCI", ""};
2579 m.function = "Obsolete, Unsupported Fibre Channel Adapter";
2580 break;
2581 case PCI_DEVICE_ID_RFLY:
2582 m = (typeof(m)){"LP952", "PCI",
2583 "Obsolete, Unsupported Fibre Channel Adapter"};
2584 break;
2585 case PCI_DEVICE_ID_PEGASUS:
2586 m = (typeof(m)){"LP9802", "PCI-X",
2587 "Obsolete, Unsupported Fibre Channel Adapter"};
2588 break;
2589 case PCI_DEVICE_ID_THOR:
2590 m = (typeof(m)){"LP10000", "PCI-X",
2591 "Obsolete, Unsupported Fibre Channel Adapter"};
2592 break;
2593 case PCI_DEVICE_ID_VIPER:
2594 m = (typeof(m)){"LPX1000", "PCI-X",
2595 "Obsolete, Unsupported Fibre Channel Adapter"};
2596 break;
2597 case PCI_DEVICE_ID_PFLY:
2598 m = (typeof(m)){"LP982", "PCI-X",
2599 "Obsolete, Unsupported Fibre Channel Adapter"};
2600 break;
2601 case PCI_DEVICE_ID_TFLY:
2602 m = (typeof(m)){"LP1050", "PCI-X",
2603 "Obsolete, Unsupported Fibre Channel Adapter"};
2604 break;
2605 case PCI_DEVICE_ID_HELIOS:
2606 m = (typeof(m)){"LP11000", "PCI-X2",
2607 "Obsolete, Unsupported Fibre Channel Adapter"};
2608 break;
2609 case PCI_DEVICE_ID_HELIOS_SCSP:
2610 m = (typeof(m)){"LP11000-SP", "PCI-X2",
2611 "Obsolete, Unsupported Fibre Channel Adapter"};
2612 break;
2613 case PCI_DEVICE_ID_HELIOS_DCSP:
2614 m = (typeof(m)){"LP11002-SP", "PCI-X2",
2615 "Obsolete, Unsupported Fibre Channel Adapter"};
2616 break;
2617 case PCI_DEVICE_ID_NEPTUNE:
2618 m = (typeof(m)){"LPe1000", "PCIe",
2619 "Obsolete, Unsupported Fibre Channel Adapter"};
2620 break;
2621 case PCI_DEVICE_ID_NEPTUNE_SCSP:
2622 m = (typeof(m)){"LPe1000-SP", "PCIe",
2623 "Obsolete, Unsupported Fibre Channel Adapter"};
2624 break;
2625 case PCI_DEVICE_ID_NEPTUNE_DCSP:
2626 m = (typeof(m)){"LPe1002-SP", "PCIe",
2627 "Obsolete, Unsupported Fibre Channel Adapter"};
2628 break;
2629 case PCI_DEVICE_ID_BMID:
2630 m = (typeof(m)){"LP1150", "PCI-X2",
2631 "Obsolete, Unsupported Fibre Channel Adapter"};
2632 break;
2633 case PCI_DEVICE_ID_BSMB:
2634 m = (typeof(m)){"LP111", "PCI-X2",
2635 "Obsolete, Unsupported Fibre Channel Adapter"};
2636 break;
2637 case PCI_DEVICE_ID_ZEPHYR:
2638 m = (typeof(m)){"LPe11000", "PCIe",
2639 "Obsolete, Unsupported Fibre Channel Adapter"};
2640 break;
2641 case PCI_DEVICE_ID_ZEPHYR_SCSP:
2642 m = (typeof(m)){"LPe11000", "PCIe",
2643 "Obsolete, Unsupported Fibre Channel Adapter"};
2644 break;
2645 case PCI_DEVICE_ID_ZEPHYR_DCSP:
2646 m = (typeof(m)){"LP2105", "PCIe",
2647 "Obsolete, Unsupported FCoE Adapter"};
2648 GE = 1;
2649 break;
2650 case PCI_DEVICE_ID_ZMID:
2651 m = (typeof(m)){"LPe1150", "PCIe",
2652 "Obsolete, Unsupported Fibre Channel Adapter"};
2653 break;
2654 case PCI_DEVICE_ID_ZSMB:
2655 m = (typeof(m)){"LPe111", "PCIe",
2656 "Obsolete, Unsupported Fibre Channel Adapter"};
2657 break;
2658 case PCI_DEVICE_ID_LP101:
2659 m = (typeof(m)){"LP101", "PCI-X",
2660 "Obsolete, Unsupported Fibre Channel Adapter"};
2661 break;
2662 case PCI_DEVICE_ID_LP10000S:
2663 m = (typeof(m)){"LP10000-S", "PCI",
2664 "Obsolete, Unsupported Fibre Channel Adapter"};
2665 break;
2666 case PCI_DEVICE_ID_LP11000S:
2667 m = (typeof(m)){"LP11000-S", "PCI-X2",
2668 "Obsolete, Unsupported Fibre Channel Adapter"};
2669 break;
2670 case PCI_DEVICE_ID_LPE11000S:
2671 m = (typeof(m)){"LPe11000-S", "PCIe",
2672 "Obsolete, Unsupported Fibre Channel Adapter"};
2673 break;
2674 case PCI_DEVICE_ID_SAT:
2675 m = (typeof(m)){"LPe12000", "PCIe",
2676 "Obsolete, Unsupported Fibre Channel Adapter"};
2677 break;
2678 case PCI_DEVICE_ID_SAT_MID:
2679 m = (typeof(m)){"LPe1250", "PCIe",
2680 "Obsolete, Unsupported Fibre Channel Adapter"};
2681 break;
2682 case PCI_DEVICE_ID_SAT_SMB:
2683 m = (typeof(m)){"LPe121", "PCIe",
2684 "Obsolete, Unsupported Fibre Channel Adapter"};
2685 break;
2686 case PCI_DEVICE_ID_SAT_DCSP:
2687 m = (typeof(m)){"LPe12002-SP", "PCIe",
2688 "Obsolete, Unsupported Fibre Channel Adapter"};
2689 break;
2690 case PCI_DEVICE_ID_SAT_SCSP:
2691 m = (typeof(m)){"LPe12000-SP", "PCIe",
2692 "Obsolete, Unsupported Fibre Channel Adapter"};
2693 break;
2694 case PCI_DEVICE_ID_SAT_S:
2695 m = (typeof(m)){"LPe12000-S", "PCIe",
2696 "Obsolete, Unsupported Fibre Channel Adapter"};
2697 break;
2698 case PCI_DEVICE_ID_PROTEUS_VF:
2699 m = (typeof(m)){"LPev12000", "PCIe IOV",
2700 "Obsolete, Unsupported Fibre Channel Adapter"};
2701 break;
2702 case PCI_DEVICE_ID_PROTEUS_PF:
2703 m = (typeof(m)){"LPev12000", "PCIe IOV",
2704 "Obsolete, Unsupported Fibre Channel Adapter"};
2705 break;
2706 case PCI_DEVICE_ID_PROTEUS_S:
2707 m = (typeof(m)){"LPemv12002-S", "PCIe IOV",
2708 "Obsolete, Unsupported Fibre Channel Adapter"};
2709 break;
2710 case PCI_DEVICE_ID_TIGERSHARK:
2711 oneConnect = 1;
2712 m = (typeof(m)){"OCe10100", "PCIe",
2713 "Obsolete, Unsupported FCoE Adapter"};
2714 break;
2715 case PCI_DEVICE_ID_TOMCAT:
2716 oneConnect = 1;
2717 m = (typeof(m)){"OCe11100", "PCIe",
2718 "Obsolete, Unsupported FCoE Adapter"};
2719 break;
2720 case PCI_DEVICE_ID_FALCON:
2721 m = (typeof(m)){"LPSe12002-ML1-E", "PCIe",
2722 "Obsolete, Unsupported Fibre Channel Adapter"};
2723 break;
2724 case PCI_DEVICE_ID_BALIUS:
2725 m = (typeof(m)){"LPVe12002", "PCIe Shared I/O",
2726 "Obsolete, Unsupported Fibre Channel Adapter"};
2727 break;
2728 case PCI_DEVICE_ID_LANCER_FC:
2729 m = (typeof(m)){"LPe16000", "PCIe",
2730 "Obsolete, Unsupported Fibre Channel Adapter"};
2731 break;
2732 case PCI_DEVICE_ID_LANCER_FC_VF:
2733 m = (typeof(m)){"LPe16000", "PCIe",
2734 "Obsolete, Unsupported Fibre Channel Adapter"};
2735 break;
2736 case PCI_DEVICE_ID_LANCER_FCOE:
2737 oneConnect = 1;
2738 m = (typeof(m)){"OCe15100", "PCIe",
2739 "Obsolete, Unsupported FCoE Adapter"};
2740 break;
2741 case PCI_DEVICE_ID_LANCER_FCOE_VF:
2742 oneConnect = 1;
2743 m = (typeof(m)){"OCe15100", "PCIe",
2744 "Obsolete, Unsupported FCoE Adapter"};
2745 break;
2746 case PCI_DEVICE_ID_LANCER_G6_FC:
2747 m = (typeof(m)){"LPe32000", "PCIe", "Fibre Channel Adapter"};
2748 break;
2749 case PCI_DEVICE_ID_LANCER_G7_FC:
2750 m = (typeof(m)){"LPe36000", "PCIe", "Fibre Channel Adapter"};
2751 break;
2752 case PCI_DEVICE_ID_LANCER_G7P_FC:
2753 m = (typeof(m)){"LPe38000", "PCIe", "Fibre Channel Adapter"};
2754 break;
2755 case PCI_DEVICE_ID_SKYHAWK:
2756 case PCI_DEVICE_ID_SKYHAWK_VF:
2757 oneConnect = 1;
2758 m = (typeof(m)){"OCe14000", "PCIe",
2759 "Obsolete, Unsupported FCoE Adapter"};
2760 break;
2761 default:
2762 m = (typeof(m)){"Unknown", "", ""};
2763 break;
2764 }
2765
2766 if (mdp && mdp[0] == '\0')
2767 snprintf(mdp, 79,"%s", m.name);
2768 /*
2769 * oneConnect hba requires special processing, they are all initiators
2770 * and we put the port number on the end
2771 */
2772 if (descp && descp[0] == '\0') {
2773 if (oneConnect)
2774 snprintf(descp, 255,
2775 "Emulex OneConnect %s, %s Initiator %s",
2776 m.name, m.function,
2777 phba->Port);
2778 else if (max_speed == 0)
2779 snprintf(descp, 255,
2780 "Emulex %s %s %s",
2781 m.name, m.bus, m.function);
2782 else
2783 snprintf(descp, 255,
2784 "Emulex %s %d%s %s %s",
2785 m.name, max_speed, (GE) ? "GE" : "Gb",
2786 m.bus, m.function);
2787 }
2788 }
2789
2790 /**
2791 * lpfc_sli3_post_buffer - Post IOCB(s) with DMA buffer descriptor(s) to a IOCB ring
2792 * @phba: pointer to lpfc hba data structure.
2793 * @pring: pointer to a IOCB ring.
2794 * @cnt: the number of IOCBs to be posted to the IOCB ring.
2795 *
2796 * This routine posts a given number of IOCBs with the associated DMA buffer
2797 * descriptors specified by the cnt argument to the given IOCB ring.
2798 *
2799 * Return codes
2800 * The number of IOCBs NOT able to be posted to the IOCB ring.
2801 **/
2802 int
lpfc_sli3_post_buffer(struct lpfc_hba * phba,struct lpfc_sli_ring * pring,int cnt)2803 lpfc_sli3_post_buffer(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, int cnt)
2804 {
2805 IOCB_t *icmd;
2806 struct lpfc_iocbq *iocb;
2807 struct lpfc_dmabuf *mp1, *mp2;
2808
2809 cnt += pring->missbufcnt;
2810
2811 /* While there are buffers to post */
2812 while (cnt > 0) {
2813 /* Allocate buffer for command iocb */
2814 iocb = lpfc_sli_get_iocbq(phba);
2815 if (iocb == NULL) {
2816 pring->missbufcnt = cnt;
2817 return cnt;
2818 }
2819 icmd = &iocb->iocb;
2820
2821 /* 2 buffers can be posted per command */
2822 /* Allocate buffer to post */
2823 mp1 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
2824 if (mp1)
2825 mp1->virt = lpfc_mbuf_alloc(phba, MEM_PRI, &mp1->phys);
2826 if (!mp1 || !mp1->virt) {
2827 kfree(mp1);
2828 lpfc_sli_release_iocbq(phba, iocb);
2829 pring->missbufcnt = cnt;
2830 return cnt;
2831 }
2832
2833 INIT_LIST_HEAD(&mp1->list);
2834 /* Allocate buffer to post */
2835 if (cnt > 1) {
2836 mp2 = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL);
2837 if (mp2)
2838 mp2->virt = lpfc_mbuf_alloc(phba, MEM_PRI,
2839 &mp2->phys);
2840 if (!mp2 || !mp2->virt) {
2841 kfree(mp2);
2842 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
2843 kfree(mp1);
2844 lpfc_sli_release_iocbq(phba, iocb);
2845 pring->missbufcnt = cnt;
2846 return cnt;
2847 }
2848
2849 INIT_LIST_HEAD(&mp2->list);
2850 } else {
2851 mp2 = NULL;
2852 }
2853
2854 icmd->un.cont64[0].addrHigh = putPaddrHigh(mp1->phys);
2855 icmd->un.cont64[0].addrLow = putPaddrLow(mp1->phys);
2856 icmd->un.cont64[0].tus.f.bdeSize = FCELSSIZE;
2857 icmd->ulpBdeCount = 1;
2858 cnt--;
2859 if (mp2) {
2860 icmd->un.cont64[1].addrHigh = putPaddrHigh(mp2->phys);
2861 icmd->un.cont64[1].addrLow = putPaddrLow(mp2->phys);
2862 icmd->un.cont64[1].tus.f.bdeSize = FCELSSIZE;
2863 cnt--;
2864 icmd->ulpBdeCount = 2;
2865 }
2866
2867 icmd->ulpCommand = CMD_QUE_RING_BUF64_CN;
2868 icmd->ulpLe = 1;
2869
2870 if (lpfc_sli_issue_iocb(phba, pring->ringno, iocb, 0) ==
2871 IOCB_ERROR) {
2872 lpfc_mbuf_free(phba, mp1->virt, mp1->phys);
2873 kfree(mp1);
2874 cnt++;
2875 if (mp2) {
2876 lpfc_mbuf_free(phba, mp2->virt, mp2->phys);
2877 kfree(mp2);
2878 cnt++;
2879 }
2880 lpfc_sli_release_iocbq(phba, iocb);
2881 pring->missbufcnt = cnt;
2882 return cnt;
2883 }
2884 lpfc_sli_ringpostbuf_put(phba, pring, mp1);
2885 if (mp2)
2886 lpfc_sli_ringpostbuf_put(phba, pring, mp2);
2887 }
2888 pring->missbufcnt = 0;
2889 return 0;
2890 }
2891
2892 /**
2893 * lpfc_post_rcv_buf - Post the initial receive IOCB buffers to ELS ring
2894 * @phba: pointer to lpfc hba data structure.
2895 *
2896 * This routine posts initial receive IOCB buffers to the ELS ring. The
2897 * current number of initial IOCB buffers specified by LPFC_BUF_RING0 is
2898 * set to 64 IOCBs. SLI3 only.
2899 *
2900 * Return codes
2901 * 0 - success (currently always success)
2902 **/
2903 static int
lpfc_post_rcv_buf(struct lpfc_hba * phba)2904 lpfc_post_rcv_buf(struct lpfc_hba *phba)
2905 {
2906 struct lpfc_sli *psli = &phba->sli;
2907
2908 /* Ring 0, ELS / CT buffers */
2909 lpfc_sli3_post_buffer(phba, &psli->sli3_ring[LPFC_ELS_RING], LPFC_BUF_RING0);
2910 /* Ring 2 - FCP no buffers needed */
2911
2912 return 0;
2913 }
2914
2915 #define S(N,V) (((V)<<(N))|((V)>>(32-(N))))
2916
2917 /**
2918 * lpfc_sha_init - Set up initial array of hash table entries
2919 * @HashResultPointer: pointer to an array as hash table.
2920 *
2921 * This routine sets up the initial values to the array of hash table entries
2922 * for the LC HBAs.
2923 **/
2924 static void
lpfc_sha_init(uint32_t * HashResultPointer)2925 lpfc_sha_init(uint32_t * HashResultPointer)
2926 {
2927 HashResultPointer[0] = 0x67452301;
2928 HashResultPointer[1] = 0xEFCDAB89;
2929 HashResultPointer[2] = 0x98BADCFE;
2930 HashResultPointer[3] = 0x10325476;
2931 HashResultPointer[4] = 0xC3D2E1F0;
2932 }
2933
2934 /**
2935 * lpfc_sha_iterate - Iterate initial hash table with the working hash table
2936 * @HashResultPointer: pointer to an initial/result hash table.
2937 * @HashWorkingPointer: pointer to an working hash table.
2938 *
2939 * This routine iterates an initial hash table pointed by @HashResultPointer
2940 * with the values from the working hash table pointeed by @HashWorkingPointer.
2941 * The results are putting back to the initial hash table, returned through
2942 * the @HashResultPointer as the result hash table.
2943 **/
2944 static void
lpfc_sha_iterate(uint32_t * HashResultPointer,uint32_t * HashWorkingPointer)2945 lpfc_sha_iterate(uint32_t * HashResultPointer, uint32_t * HashWorkingPointer)
2946 {
2947 int t;
2948 uint32_t TEMP;
2949 uint32_t A, B, C, D, E;
2950 t = 16;
2951 do {
2952 HashWorkingPointer[t] =
2953 S(1,
2954 HashWorkingPointer[t - 3] ^ HashWorkingPointer[t -
2955 8] ^
2956 HashWorkingPointer[t - 14] ^ HashWorkingPointer[t - 16]);
2957 } while (++t <= 79);
2958 t = 0;
2959 A = HashResultPointer[0];
2960 B = HashResultPointer[1];
2961 C = HashResultPointer[2];
2962 D = HashResultPointer[3];
2963 E = HashResultPointer[4];
2964
2965 do {
2966 if (t < 20) {
2967 TEMP = ((B & C) | ((~B) & D)) + 0x5A827999;
2968 } else if (t < 40) {
2969 TEMP = (B ^ C ^ D) + 0x6ED9EBA1;
2970 } else if (t < 60) {
2971 TEMP = ((B & C) | (B & D) | (C & D)) + 0x8F1BBCDC;
2972 } else {
2973 TEMP = (B ^ C ^ D) + 0xCA62C1D6;
2974 }
2975 TEMP += S(5, A) + E + HashWorkingPointer[t];
2976 E = D;
2977 D = C;
2978 C = S(30, B);
2979 B = A;
2980 A = TEMP;
2981 } while (++t <= 79);
2982
2983 HashResultPointer[0] += A;
2984 HashResultPointer[1] += B;
2985 HashResultPointer[2] += C;
2986 HashResultPointer[3] += D;
2987 HashResultPointer[4] += E;
2988
2989 }
2990
2991 /**
2992 * lpfc_challenge_key - Create challenge key based on WWPN of the HBA
2993 * @RandomChallenge: pointer to the entry of host challenge random number array.
2994 * @HashWorking: pointer to the entry of the working hash array.
2995 *
2996 * This routine calculates the working hash array referred by @HashWorking
2997 * from the challenge random numbers associated with the host, referred by
2998 * @RandomChallenge. The result is put into the entry of the working hash
2999 * array and returned by reference through @HashWorking.
3000 **/
3001 static void
lpfc_challenge_key(uint32_t * RandomChallenge,uint32_t * HashWorking)3002 lpfc_challenge_key(uint32_t * RandomChallenge, uint32_t * HashWorking)
3003 {
3004 *HashWorking = (*RandomChallenge ^ *HashWorking);
3005 }
3006
3007 /**
3008 * lpfc_hba_init - Perform special handling for LC HBA initialization
3009 * @phba: pointer to lpfc hba data structure.
3010 * @hbainit: pointer to an array of unsigned 32-bit integers.
3011 *
3012 * This routine performs the special handling for LC HBA initialization.
3013 **/
3014 void
lpfc_hba_init(struct lpfc_hba * phba,uint32_t * hbainit)3015 lpfc_hba_init(struct lpfc_hba *phba, uint32_t *hbainit)
3016 {
3017 int t;
3018 uint32_t *HashWorking;
3019 uint32_t *pwwnn = (uint32_t *) phba->wwnn;
3020
3021 HashWorking = kcalloc(80, sizeof(uint32_t), GFP_KERNEL);
3022 if (!HashWorking)
3023 return;
3024
3025 HashWorking[0] = HashWorking[78] = *pwwnn++;
3026 HashWorking[1] = HashWorking[79] = *pwwnn;
3027
3028 for (t = 0; t < 7; t++)
3029 lpfc_challenge_key(phba->RandomData + t, HashWorking + t);
3030
3031 lpfc_sha_init(hbainit);
3032 lpfc_sha_iterate(hbainit, HashWorking);
3033 kfree(HashWorking);
3034 }
3035
3036 /**
3037 * lpfc_cleanup - Performs vport cleanups before deleting a vport
3038 * @vport: pointer to a virtual N_Port data structure.
3039 *
3040 * This routine performs the necessary cleanups before deleting the @vport.
3041 * It invokes the discovery state machine to perform necessary state
3042 * transitions and to release the ndlps associated with the @vport. Note,
3043 * the physical port is treated as @vport 0.
3044 **/
3045 void
lpfc_cleanup(struct lpfc_vport * vport)3046 lpfc_cleanup(struct lpfc_vport *vport)
3047 {
3048 struct lpfc_hba *phba = vport->phba;
3049 struct lpfc_nodelist *ndlp, *next_ndlp;
3050 int i = 0;
3051
3052 if (phba->link_state > LPFC_LINK_DOWN)
3053 lpfc_port_link_failure(vport);
3054
3055 /* Clean up VMID resources */
3056 if (lpfc_is_vmid_enabled(phba))
3057 lpfc_vmid_vport_cleanup(vport);
3058
3059 list_for_each_entry_safe(ndlp, next_ndlp, &vport->fc_nodes, nlp_listp) {
3060 /* Fabric Ports not in UNMAPPED state are cleaned up in the
3061 * DEVICE_RM event.
3062 */
3063 if (ndlp->nlp_type & NLP_FABRIC &&
3064 ndlp->nlp_state == NLP_STE_UNMAPPED_NODE)
3065 lpfc_disc_state_machine(vport, ndlp, NULL,
3066 NLP_EVT_DEVICE_RECOVERY);
3067
3068 if (!(ndlp->fc4_xpt_flags & (NVME_XPT_REGD|SCSI_XPT_REGD)))
3069 lpfc_disc_state_machine(vport, ndlp, NULL,
3070 NLP_EVT_DEVICE_RM);
3071 }
3072
3073 /* This is a special case flush to return all
3074 * IOs before entering this loop. There are
3075 * two points in the code where a flush is
3076 * avoided if the FC_UNLOADING flag is set.
3077 * one is in the multipool destroy,
3078 * (this prevents a crash) and the other is
3079 * in the nvme abort handler, ( also prevents
3080 * a crash). Both of these exceptions are
3081 * cases where the slot is still accessible.
3082 * The flush here is only when the pci slot
3083 * is offline.
3084 */
3085 if (test_bit(FC_UNLOADING, &vport->load_flag) &&
3086 pci_channel_offline(phba->pcidev))
3087 lpfc_sli_flush_io_rings(vport->phba);
3088
3089 /* At this point, ALL ndlp's should be gone
3090 * because of the previous NLP_EVT_DEVICE_RM.
3091 * Lets wait for this to happen, if needed.
3092 */
3093 while (!list_empty(&vport->fc_nodes)) {
3094 if (i++ > 3000) {
3095 lpfc_printf_vlog(vport, KERN_ERR,
3096 LOG_TRACE_EVENT,
3097 "0233 Nodelist not empty\n");
3098 list_for_each_entry_safe(ndlp, next_ndlp,
3099 &vport->fc_nodes, nlp_listp) {
3100 lpfc_printf_vlog(ndlp->vport, KERN_ERR,
3101 LOG_DISCOVERY,
3102 "0282 did:x%x ndlp:x%px "
3103 "refcnt:%d xflags x%x "
3104 "nflag x%lx\n",
3105 ndlp->nlp_DID, (void *)ndlp,
3106 kref_read(&ndlp->kref),
3107 ndlp->fc4_xpt_flags,
3108 ndlp->nlp_flag);
3109 }
3110 break;
3111 }
3112
3113 /* Wait for any activity on ndlps to settle */
3114 msleep(10);
3115 }
3116 lpfc_cleanup_vports_rrqs(vport, NULL);
3117 }
3118
3119 /**
3120 * lpfc_stop_vport_timers - Stop all the timers associated with a vport
3121 * @vport: pointer to a virtual N_Port data structure.
3122 *
3123 * This routine stops all the timers associated with a @vport. This function
3124 * is invoked before disabling or deleting a @vport. Note that the physical
3125 * port is treated as @vport 0.
3126 **/
3127 void
lpfc_stop_vport_timers(struct lpfc_vport * vport)3128 lpfc_stop_vport_timers(struct lpfc_vport *vport)
3129 {
3130 timer_delete_sync(&vport->els_tmofunc);
3131 timer_delete_sync(&vport->delayed_disc_tmo);
3132 lpfc_can_disctmo(vport);
3133 return;
3134 }
3135
3136 /**
3137 * __lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
3138 * @phba: pointer to lpfc hba data structure.
3139 *
3140 * This routine stops the SLI4 FCF rediscover wait timer if it's on. The
3141 * caller of this routine should already hold the host lock.
3142 **/
3143 void
__lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba * phba)3144 __lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
3145 {
3146 /* Clear pending FCF rediscovery wait flag */
3147 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
3148
3149 /* Now, try to stop the timer */
3150 timer_delete(&phba->fcf.redisc_wait);
3151 }
3152
3153 /**
3154 * lpfc_sli4_stop_fcf_redisc_wait_timer - Stop FCF rediscovery wait timer
3155 * @phba: pointer to lpfc hba data structure.
3156 *
3157 * This routine stops the SLI4 FCF rediscover wait timer if it's on. It
3158 * checks whether the FCF rediscovery wait timer is pending with the host
3159 * lock held before proceeding with disabling the timer and clearing the
3160 * wait timer pendig flag.
3161 **/
3162 void
lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba * phba)3163 lpfc_sli4_stop_fcf_redisc_wait_timer(struct lpfc_hba *phba)
3164 {
3165 spin_lock_irq(&phba->hbalock);
3166 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
3167 /* FCF rediscovery timer already fired or stopped */
3168 spin_unlock_irq(&phba->hbalock);
3169 return;
3170 }
3171 __lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
3172 /* Clear failover in progress flags */
3173 phba->fcf.fcf_flag &= ~(FCF_DEAD_DISC | FCF_ACVL_DISC);
3174 spin_unlock_irq(&phba->hbalock);
3175 }
3176
3177 /**
3178 * lpfc_cmf_stop - Stop CMF processing
3179 * @phba: pointer to lpfc hba data structure.
3180 *
3181 * This is called when the link goes down or if CMF mode is turned OFF.
3182 * It is also called when going offline or unloaded just before the
3183 * congestion info buffer is unregistered.
3184 **/
3185 void
lpfc_cmf_stop(struct lpfc_hba * phba)3186 lpfc_cmf_stop(struct lpfc_hba *phba)
3187 {
3188 int cpu;
3189 struct lpfc_cgn_stat *cgs;
3190
3191 /* We only do something if CMF is enabled */
3192 if (!phba->sli4_hba.pc_sli4_params.cmf)
3193 return;
3194
3195 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
3196 "6221 Stop CMF / Cancel Timer\n");
3197
3198 /* Cancel the CMF timer */
3199 hrtimer_cancel(&phba->cmf_stats_timer);
3200 hrtimer_cancel(&phba->cmf_timer);
3201
3202 /* Zero CMF counters */
3203 atomic_set(&phba->cmf_busy, 0);
3204 for_each_present_cpu(cpu) {
3205 cgs = per_cpu_ptr(phba->cmf_stat, cpu);
3206 atomic64_set(&cgs->total_bytes, 0);
3207 atomic64_set(&cgs->rcv_bytes, 0);
3208 atomic_set(&cgs->rx_io_cnt, 0);
3209 atomic64_set(&cgs->rx_latency, 0);
3210 }
3211 atomic_set(&phba->cmf_bw_wait, 0);
3212
3213 /* Resume any blocked IO - Queue unblock on workqueue */
3214 queue_work(phba->wq, &phba->unblock_request_work);
3215 }
3216
3217 static inline uint64_t
lpfc_get_max_line_rate(struct lpfc_hba * phba)3218 lpfc_get_max_line_rate(struct lpfc_hba *phba)
3219 {
3220 uint64_t rate = lpfc_sli_port_speed_get(phba);
3221
3222 return ((((unsigned long)rate) * 1024 * 1024) / 10);
3223 }
3224
3225 void
lpfc_cmf_signal_init(struct lpfc_hba * phba)3226 lpfc_cmf_signal_init(struct lpfc_hba *phba)
3227 {
3228 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
3229 "6223 Signal CMF init\n");
3230
3231 /* Use the new fc_linkspeed to recalculate */
3232 phba->cmf_interval_rate = LPFC_CMF_INTERVAL;
3233 phba->cmf_max_line_rate = lpfc_get_max_line_rate(phba);
3234 phba->cmf_link_byte_count = div_u64(phba->cmf_max_line_rate *
3235 phba->cmf_interval_rate, 1000);
3236 phba->cmf_max_bytes_per_interval = phba->cmf_link_byte_count;
3237
3238 /* This is a signal to firmware to sync up CMF BW with link speed */
3239 lpfc_issue_cmf_sync_wqe(phba, 0, 0);
3240 }
3241
3242 /**
3243 * lpfc_cmf_start - Start CMF processing
3244 * @phba: pointer to lpfc hba data structure.
3245 *
3246 * This is called when the link comes up or if CMF mode is turned OFF
3247 * to Monitor or Managed.
3248 **/
3249 void
lpfc_cmf_start(struct lpfc_hba * phba)3250 lpfc_cmf_start(struct lpfc_hba *phba)
3251 {
3252 struct lpfc_cgn_stat *cgs;
3253 int cpu;
3254
3255 /* We only do something if CMF is enabled */
3256 if (!phba->sli4_hba.pc_sli4_params.cmf ||
3257 phba->cmf_active_mode == LPFC_CFG_OFF)
3258 return;
3259
3260 /* Reinitialize congestion buffer info */
3261 lpfc_init_congestion_buf(phba);
3262
3263 atomic_set(&phba->cgn_fabric_warn_cnt, 0);
3264 atomic_set(&phba->cgn_fabric_alarm_cnt, 0);
3265 atomic_set(&phba->cgn_sync_alarm_cnt, 0);
3266 atomic_set(&phba->cgn_sync_warn_cnt, 0);
3267
3268 atomic_set(&phba->cmf_busy, 0);
3269 for_each_present_cpu(cpu) {
3270 cgs = per_cpu_ptr(phba->cmf_stat, cpu);
3271 atomic64_set(&cgs->total_bytes, 0);
3272 atomic64_set(&cgs->rcv_bytes, 0);
3273 atomic_set(&cgs->rx_io_cnt, 0);
3274 atomic64_set(&cgs->rx_latency, 0);
3275 }
3276 phba->cmf_latency.tv_sec = 0;
3277 phba->cmf_latency.tv_nsec = 0;
3278
3279 lpfc_cmf_signal_init(phba);
3280
3281 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
3282 "6222 Start CMF / Timer\n");
3283
3284 phba->cmf_timer_cnt = 0;
3285 hrtimer_start(&phba->cmf_timer,
3286 ktime_set(0, LPFC_CMF_INTERVAL * NSEC_PER_MSEC),
3287 HRTIMER_MODE_REL);
3288 hrtimer_start(&phba->cmf_stats_timer,
3289 ktime_set(0, LPFC_SEC_MIN * NSEC_PER_SEC),
3290 HRTIMER_MODE_REL);
3291 /* Setup for latency check in IO cmpl routines */
3292 ktime_get_real_ts64(&phba->cmf_latency);
3293
3294 atomic_set(&phba->cmf_bw_wait, 0);
3295 atomic_set(&phba->cmf_stop_io, 0);
3296 }
3297
3298 /**
3299 * lpfc_stop_hba_timers - Stop all the timers associated with an HBA
3300 * @phba: pointer to lpfc hba data structure.
3301 *
3302 * This routine stops all the timers associated with a HBA. This function is
3303 * invoked before either putting a HBA offline or unloading the driver.
3304 **/
3305 void
lpfc_stop_hba_timers(struct lpfc_hba * phba)3306 lpfc_stop_hba_timers(struct lpfc_hba *phba)
3307 {
3308 if (phba->pport)
3309 lpfc_stop_vport_timers(phba->pport);
3310 cancel_delayed_work_sync(&phba->eq_delay_work);
3311 cancel_delayed_work_sync(&phba->idle_stat_delay_work);
3312 timer_delete_sync(&phba->sli.mbox_tmo);
3313 timer_delete_sync(&phba->fabric_block_timer);
3314 timer_delete_sync(&phba->eratt_poll);
3315 timer_delete_sync(&phba->hb_tmofunc);
3316 if (phba->sli_rev == LPFC_SLI_REV4) {
3317 timer_delete_sync(&phba->rrq_tmr);
3318 clear_bit(HBA_RRQ_ACTIVE, &phba->hba_flag);
3319 }
3320 clear_bit(HBA_HBEAT_INP, &phba->hba_flag);
3321 clear_bit(HBA_HBEAT_TMO, &phba->hba_flag);
3322
3323 switch (phba->pci_dev_grp) {
3324 case LPFC_PCI_DEV_LP:
3325 /* Stop any LightPulse device specific driver timers */
3326 timer_delete_sync(&phba->fcp_poll_timer);
3327 break;
3328 case LPFC_PCI_DEV_OC:
3329 /* Stop any OneConnect device specific driver timers */
3330 lpfc_sli4_stop_fcf_redisc_wait_timer(phba);
3331 break;
3332 default:
3333 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
3334 "0297 Invalid device group (x%x)\n",
3335 phba->pci_dev_grp);
3336 break;
3337 }
3338 return;
3339 }
3340
3341 /**
3342 * lpfc_block_mgmt_io - Mark a HBA's management interface as blocked
3343 * @phba: pointer to lpfc hba data structure.
3344 * @mbx_action: flag for mailbox no wait action.
3345 *
3346 * This routine marks a HBA's management interface as blocked. Once the HBA's
3347 * management interface is marked as blocked, all the user space access to
3348 * the HBA, whether they are from sysfs interface or libdfc interface will
3349 * all be blocked. The HBA is set to block the management interface when the
3350 * driver prepares the HBA interface for online or offline.
3351 **/
3352 static void
lpfc_block_mgmt_io(struct lpfc_hba * phba,int mbx_action)3353 lpfc_block_mgmt_io(struct lpfc_hba *phba, int mbx_action)
3354 {
3355 unsigned long iflag;
3356 uint8_t actcmd = MBX_HEARTBEAT;
3357 unsigned long timeout;
3358
3359 spin_lock_irqsave(&phba->hbalock, iflag);
3360 phba->sli.sli_flag |= LPFC_BLOCK_MGMT_IO;
3361 spin_unlock_irqrestore(&phba->hbalock, iflag);
3362 if (mbx_action == LPFC_MBX_NO_WAIT)
3363 return;
3364 timeout = secs_to_jiffies(LPFC_MBOX_TMO) + jiffies;
3365 spin_lock_irqsave(&phba->hbalock, iflag);
3366 if (phba->sli.mbox_active) {
3367 actcmd = phba->sli.mbox_active->u.mb.mbxCommand;
3368 /* Determine how long we might wait for the active mailbox
3369 * command to be gracefully completed by firmware.
3370 */
3371 timeout = secs_to_jiffies(lpfc_mbox_tmo_val(phba,
3372 phba->sli.mbox_active)) + jiffies;
3373 }
3374 spin_unlock_irqrestore(&phba->hbalock, iflag);
3375
3376 /* Wait for the outstnading mailbox command to complete */
3377 while (phba->sli.mbox_active) {
3378 /* Check active mailbox complete status every 2ms */
3379 msleep(2);
3380 if (time_after(jiffies, timeout)) {
3381 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
3382 "2813 Mgmt IO is Blocked %x "
3383 "- mbox cmd %x still active\n",
3384 phba->sli.sli_flag, actcmd);
3385 break;
3386 }
3387 }
3388 }
3389
3390 /**
3391 * lpfc_sli4_node_rpi_restore - Recover assigned RPIs for active nodes.
3392 * @phba: pointer to lpfc hba data structure.
3393 *
3394 * Allocate RPIs for all active remote nodes. This is needed whenever
3395 * an SLI4 adapter is reset and the driver is not unloading. Its purpose
3396 * is to fixup the temporary rpi assignments.
3397 **/
3398 void
lpfc_sli4_node_rpi_restore(struct lpfc_hba * phba)3399 lpfc_sli4_node_rpi_restore(struct lpfc_hba *phba)
3400 {
3401 struct lpfc_nodelist *ndlp, *next_ndlp;
3402 struct lpfc_vport **vports;
3403 int i, rpi;
3404
3405 if (phba->sli_rev != LPFC_SLI_REV4)
3406 return;
3407
3408 vports = lpfc_create_vport_work_array(phba);
3409 if (!vports)
3410 return;
3411
3412 for (i = 0; i <= phba->max_vports && vports[i]; i++) {
3413 if (test_bit(FC_UNLOADING, &vports[i]->load_flag))
3414 continue;
3415
3416 list_for_each_entry_safe(ndlp, next_ndlp,
3417 &vports[i]->fc_nodes,
3418 nlp_listp) {
3419 rpi = lpfc_sli4_alloc_rpi(phba);
3420 if (rpi == LPFC_RPI_ALLOC_ERROR) {
3421 lpfc_printf_vlog(ndlp->vport, KERN_INFO,
3422 LOG_NODE | LOG_DISCOVERY,
3423 "0099 RPI alloc error for "
3424 "ndlp x%px DID:x%06x "
3425 "flg:x%lx\n",
3426 ndlp, ndlp->nlp_DID,
3427 ndlp->nlp_flag);
3428 continue;
3429 }
3430 ndlp->nlp_rpi = rpi;
3431 lpfc_printf_vlog(ndlp->vport, KERN_INFO,
3432 LOG_NODE | LOG_DISCOVERY,
3433 "0009 Assign RPI x%x to ndlp x%px "
3434 "DID:x%06x flg:x%lx\n",
3435 ndlp->nlp_rpi, ndlp, ndlp->nlp_DID,
3436 ndlp->nlp_flag);
3437 }
3438 }
3439 lpfc_destroy_vport_work_array(phba, vports);
3440 }
3441
3442 /**
3443 * lpfc_create_expedite_pool - create expedite pool
3444 * @phba: pointer to lpfc hba data structure.
3445 *
3446 * This routine moves a batch of XRIs from lpfc_io_buf_list_put of HWQ 0
3447 * to expedite pool. Mark them as expedite.
3448 **/
lpfc_create_expedite_pool(struct lpfc_hba * phba)3449 static void lpfc_create_expedite_pool(struct lpfc_hba *phba)
3450 {
3451 struct lpfc_sli4_hdw_queue *qp;
3452 struct lpfc_io_buf *lpfc_ncmd;
3453 struct lpfc_io_buf *lpfc_ncmd_next;
3454 struct lpfc_epd_pool *epd_pool;
3455 unsigned long iflag;
3456
3457 epd_pool = &phba->epd_pool;
3458 qp = &phba->sli4_hba.hdwq[0];
3459
3460 spin_lock_init(&epd_pool->lock);
3461 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag);
3462 spin_lock(&epd_pool->lock);
3463 INIT_LIST_HEAD(&epd_pool->list);
3464 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3465 &qp->lpfc_io_buf_list_put, list) {
3466 list_move_tail(&lpfc_ncmd->list, &epd_pool->list);
3467 lpfc_ncmd->expedite = true;
3468 qp->put_io_bufs--;
3469 epd_pool->count++;
3470 if (epd_pool->count >= XRI_BATCH)
3471 break;
3472 }
3473 spin_unlock(&epd_pool->lock);
3474 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag);
3475 }
3476
3477 /**
3478 * lpfc_destroy_expedite_pool - destroy expedite pool
3479 * @phba: pointer to lpfc hba data structure.
3480 *
3481 * This routine returns XRIs from expedite pool to lpfc_io_buf_list_put
3482 * of HWQ 0. Clear the mark.
3483 **/
lpfc_destroy_expedite_pool(struct lpfc_hba * phba)3484 static void lpfc_destroy_expedite_pool(struct lpfc_hba *phba)
3485 {
3486 struct lpfc_sli4_hdw_queue *qp;
3487 struct lpfc_io_buf *lpfc_ncmd;
3488 struct lpfc_io_buf *lpfc_ncmd_next;
3489 struct lpfc_epd_pool *epd_pool;
3490 unsigned long iflag;
3491
3492 epd_pool = &phba->epd_pool;
3493 qp = &phba->sli4_hba.hdwq[0];
3494
3495 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag);
3496 spin_lock(&epd_pool->lock);
3497 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3498 &epd_pool->list, list) {
3499 list_move_tail(&lpfc_ncmd->list,
3500 &qp->lpfc_io_buf_list_put);
3501 lpfc_ncmd->flags = false;
3502 qp->put_io_bufs++;
3503 epd_pool->count--;
3504 }
3505 spin_unlock(&epd_pool->lock);
3506 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag);
3507 }
3508
3509 /**
3510 * lpfc_create_multixri_pools - create multi-XRI pools
3511 * @phba: pointer to lpfc hba data structure.
3512 *
3513 * This routine initialize public, private per HWQ. Then, move XRIs from
3514 * lpfc_io_buf_list_put to public pool. High and low watermark are also
3515 * Initialized.
3516 **/
lpfc_create_multixri_pools(struct lpfc_hba * phba)3517 void lpfc_create_multixri_pools(struct lpfc_hba *phba)
3518 {
3519 u32 i, j;
3520 u32 hwq_count;
3521 u32 count_per_hwq;
3522 struct lpfc_io_buf *lpfc_ncmd;
3523 struct lpfc_io_buf *lpfc_ncmd_next;
3524 unsigned long iflag;
3525 struct lpfc_sli4_hdw_queue *qp;
3526 struct lpfc_multixri_pool *multixri_pool;
3527 struct lpfc_pbl_pool *pbl_pool;
3528 struct lpfc_pvt_pool *pvt_pool;
3529
3530 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
3531 "1234 num_hdw_queue=%d num_present_cpu=%d common_xri_cnt=%d\n",
3532 phba->cfg_hdw_queue, phba->sli4_hba.num_present_cpu,
3533 phba->sli4_hba.io_xri_cnt);
3534
3535 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
3536 lpfc_create_expedite_pool(phba);
3537
3538 hwq_count = phba->cfg_hdw_queue;
3539 count_per_hwq = phba->sli4_hba.io_xri_cnt / hwq_count;
3540
3541 for (i = 0; i < hwq_count; i++) {
3542 multixri_pool = kzalloc(sizeof(*multixri_pool), GFP_KERNEL);
3543
3544 if (!multixri_pool) {
3545 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
3546 "1238 Failed to allocate memory for "
3547 "multixri_pool\n");
3548
3549 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
3550 lpfc_destroy_expedite_pool(phba);
3551
3552 j = 0;
3553 while (j < i) {
3554 qp = &phba->sli4_hba.hdwq[j];
3555 kfree(qp->p_multixri_pool);
3556 j++;
3557 }
3558 phba->cfg_xri_rebalancing = 0;
3559 return;
3560 }
3561
3562 qp = &phba->sli4_hba.hdwq[i];
3563 qp->p_multixri_pool = multixri_pool;
3564
3565 multixri_pool->xri_limit = count_per_hwq;
3566 multixri_pool->rrb_next_hwqid = i;
3567
3568 /* Deal with public free xri pool */
3569 pbl_pool = &multixri_pool->pbl_pool;
3570 spin_lock_init(&pbl_pool->lock);
3571 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag);
3572 spin_lock(&pbl_pool->lock);
3573 INIT_LIST_HEAD(&pbl_pool->list);
3574 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3575 &qp->lpfc_io_buf_list_put, list) {
3576 list_move_tail(&lpfc_ncmd->list, &pbl_pool->list);
3577 qp->put_io_bufs--;
3578 pbl_pool->count++;
3579 }
3580 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
3581 "1235 Moved %d buffers from PUT list over to pbl_pool[%d]\n",
3582 pbl_pool->count, i);
3583 spin_unlock(&pbl_pool->lock);
3584 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag);
3585
3586 /* Deal with private free xri pool */
3587 pvt_pool = &multixri_pool->pvt_pool;
3588 pvt_pool->high_watermark = multixri_pool->xri_limit / 2;
3589 pvt_pool->low_watermark = XRI_BATCH;
3590 spin_lock_init(&pvt_pool->lock);
3591 spin_lock_irqsave(&pvt_pool->lock, iflag);
3592 INIT_LIST_HEAD(&pvt_pool->list);
3593 pvt_pool->count = 0;
3594 spin_unlock_irqrestore(&pvt_pool->lock, iflag);
3595 }
3596 }
3597
3598 /**
3599 * lpfc_destroy_multixri_pools - destroy multi-XRI pools
3600 * @phba: pointer to lpfc hba data structure.
3601 *
3602 * This routine returns XRIs from public/private to lpfc_io_buf_list_put.
3603 **/
lpfc_destroy_multixri_pools(struct lpfc_hba * phba)3604 static void lpfc_destroy_multixri_pools(struct lpfc_hba *phba)
3605 {
3606 u32 i;
3607 u32 hwq_count;
3608 struct lpfc_io_buf *lpfc_ncmd;
3609 struct lpfc_io_buf *lpfc_ncmd_next;
3610 unsigned long iflag;
3611 struct lpfc_sli4_hdw_queue *qp;
3612 struct lpfc_multixri_pool *multixri_pool;
3613 struct lpfc_pbl_pool *pbl_pool;
3614 struct lpfc_pvt_pool *pvt_pool;
3615
3616 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
3617 lpfc_destroy_expedite_pool(phba);
3618
3619 if (!test_bit(FC_UNLOADING, &phba->pport->load_flag))
3620 lpfc_sli_flush_io_rings(phba);
3621
3622 hwq_count = phba->cfg_hdw_queue;
3623
3624 for (i = 0; i < hwq_count; i++) {
3625 qp = &phba->sli4_hba.hdwq[i];
3626 multixri_pool = qp->p_multixri_pool;
3627 if (!multixri_pool)
3628 continue;
3629
3630 qp->p_multixri_pool = NULL;
3631
3632 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflag);
3633
3634 /* Deal with public free xri pool */
3635 pbl_pool = &multixri_pool->pbl_pool;
3636 spin_lock(&pbl_pool->lock);
3637
3638 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
3639 "1236 Moving %d buffers from pbl_pool[%d] TO PUT list\n",
3640 pbl_pool->count, i);
3641
3642 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3643 &pbl_pool->list, list) {
3644 list_move_tail(&lpfc_ncmd->list,
3645 &qp->lpfc_io_buf_list_put);
3646 qp->put_io_bufs++;
3647 pbl_pool->count--;
3648 }
3649
3650 INIT_LIST_HEAD(&pbl_pool->list);
3651 pbl_pool->count = 0;
3652
3653 spin_unlock(&pbl_pool->lock);
3654
3655 /* Deal with private free xri pool */
3656 pvt_pool = &multixri_pool->pvt_pool;
3657 spin_lock(&pvt_pool->lock);
3658
3659 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
3660 "1237 Moving %d buffers from pvt_pool[%d] TO PUT list\n",
3661 pvt_pool->count, i);
3662
3663 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
3664 &pvt_pool->list, list) {
3665 list_move_tail(&lpfc_ncmd->list,
3666 &qp->lpfc_io_buf_list_put);
3667 qp->put_io_bufs++;
3668 pvt_pool->count--;
3669 }
3670
3671 INIT_LIST_HEAD(&pvt_pool->list);
3672 pvt_pool->count = 0;
3673
3674 spin_unlock(&pvt_pool->lock);
3675 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, iflag);
3676
3677 kfree(multixri_pool);
3678 }
3679 }
3680
3681 /**
3682 * lpfc_online - Initialize and bring a HBA online
3683 * @phba: pointer to lpfc hba data structure.
3684 *
3685 * This routine initializes the HBA and brings a HBA online. During this
3686 * process, the management interface is blocked to prevent user space access
3687 * to the HBA interfering with the driver initialization.
3688 *
3689 * Return codes
3690 * 0 - successful
3691 * 1 - failed
3692 **/
3693 int
lpfc_online(struct lpfc_hba * phba)3694 lpfc_online(struct lpfc_hba *phba)
3695 {
3696 struct lpfc_vport *vport;
3697 struct lpfc_vport **vports;
3698 int i, error = 0;
3699 bool vpis_cleared = false;
3700
3701 if (!phba)
3702 return 0;
3703 vport = phba->pport;
3704
3705 if (!test_bit(FC_OFFLINE_MODE, &vport->fc_flag))
3706 return 0;
3707
3708 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
3709 "0458 Bring Adapter online\n");
3710
3711 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
3712
3713 if (phba->sli_rev == LPFC_SLI_REV4) {
3714 if (lpfc_sli4_hba_setup(phba)) { /* Initialize SLI4 HBA */
3715 lpfc_unblock_mgmt_io(phba);
3716 return 1;
3717 }
3718 spin_lock_irq(&phba->hbalock);
3719 if (!phba->sli4_hba.max_cfg_param.vpi_used)
3720 vpis_cleared = true;
3721 spin_unlock_irq(&phba->hbalock);
3722
3723 /* Reestablish the local initiator port.
3724 * The offline process destroyed the previous lport.
3725 */
3726 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME &&
3727 !phba->nvmet_support) {
3728 error = lpfc_nvme_create_localport(phba->pport);
3729 if (error)
3730 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
3731 "6132 NVME restore reg failed "
3732 "on nvmei error x%x\n", error);
3733 }
3734 } else {
3735 lpfc_sli_queue_init(phba);
3736 if (lpfc_sli_hba_setup(phba)) { /* Initialize SLI2/SLI3 HBA */
3737 lpfc_unblock_mgmt_io(phba);
3738 return 1;
3739 }
3740 }
3741
3742 vports = lpfc_create_vport_work_array(phba);
3743 if (vports != NULL) {
3744 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
3745 clear_bit(FC_OFFLINE_MODE, &vports[i]->fc_flag);
3746 if (phba->sli3_options & LPFC_SLI3_NPIV_ENABLED)
3747 set_bit(FC_VPORT_NEEDS_REG_VPI,
3748 &vports[i]->fc_flag);
3749 if (phba->sli_rev == LPFC_SLI_REV4) {
3750 set_bit(FC_VPORT_NEEDS_INIT_VPI,
3751 &vports[i]->fc_flag);
3752 if ((vpis_cleared) &&
3753 (vports[i]->port_type !=
3754 LPFC_PHYSICAL_PORT))
3755 vports[i]->vpi = 0;
3756 }
3757 }
3758 }
3759 lpfc_destroy_vport_work_array(phba, vports);
3760
3761 if (phba->cfg_xri_rebalancing)
3762 lpfc_create_multixri_pools(phba);
3763
3764 lpfc_cpuhp_add(phba);
3765
3766 lpfc_unblock_mgmt_io(phba);
3767 return 0;
3768 }
3769
3770 /**
3771 * lpfc_unblock_mgmt_io - Mark a HBA's management interface to be not blocked
3772 * @phba: pointer to lpfc hba data structure.
3773 *
3774 * This routine marks a HBA's management interface as not blocked. Once the
3775 * HBA's management interface is marked as not blocked, all the user space
3776 * access to the HBA, whether they are from sysfs interface or libdfc
3777 * interface will be allowed. The HBA is set to block the management interface
3778 * when the driver prepares the HBA interface for online or offline and then
3779 * set to unblock the management interface afterwards.
3780 **/
3781 void
lpfc_unblock_mgmt_io(struct lpfc_hba * phba)3782 lpfc_unblock_mgmt_io(struct lpfc_hba * phba)
3783 {
3784 unsigned long iflag;
3785
3786 spin_lock_irqsave(&phba->hbalock, iflag);
3787 phba->sli.sli_flag &= ~LPFC_BLOCK_MGMT_IO;
3788 spin_unlock_irqrestore(&phba->hbalock, iflag);
3789 }
3790
3791 /**
3792 * lpfc_offline_prep - Prepare a HBA to be brought offline
3793 * @phba: pointer to lpfc hba data structure.
3794 * @mbx_action: flag for mailbox shutdown action.
3795 *
3796 * This routine is invoked to prepare a HBA to be brought offline. It performs
3797 * unregistration login to all the nodes on all vports and flushes the mailbox
3798 * queue to make it ready to be brought offline.
3799 **/
3800 void
lpfc_offline_prep(struct lpfc_hba * phba,int mbx_action)3801 lpfc_offline_prep(struct lpfc_hba *phba, int mbx_action)
3802 {
3803 struct lpfc_vport *vport = phba->pport;
3804 struct lpfc_nodelist *ndlp, *next_ndlp;
3805 struct lpfc_vport **vports;
3806 struct Scsi_Host *shost;
3807 int i;
3808 int offline;
3809 bool hba_pci_err;
3810
3811 if (test_bit(FC_OFFLINE_MODE, &vport->fc_flag))
3812 return;
3813
3814 lpfc_block_mgmt_io(phba, mbx_action);
3815
3816 lpfc_linkdown(phba);
3817
3818 offline = pci_channel_offline(phba->pcidev);
3819 hba_pci_err = test_bit(HBA_PCI_ERR, &phba->bit_flags);
3820
3821 /* Issue an unreg_login to all nodes on all vports */
3822 vports = lpfc_create_vport_work_array(phba);
3823 if (vports != NULL) {
3824 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
3825 if (test_bit(FC_UNLOADING, &vports[i]->load_flag))
3826 continue;
3827 shost = lpfc_shost_from_vport(vports[i]);
3828 spin_lock_irq(shost->host_lock);
3829 vports[i]->vpi_state &= ~LPFC_VPI_REGISTERED;
3830 spin_unlock_irq(shost->host_lock);
3831 set_bit(FC_VPORT_NEEDS_REG_VPI, &vports[i]->fc_flag);
3832 clear_bit(FC_VFI_REGISTERED, &vports[i]->fc_flag);
3833
3834 list_for_each_entry_safe(ndlp, next_ndlp,
3835 &vports[i]->fc_nodes,
3836 nlp_listp) {
3837
3838 clear_bit(NLP_NPR_ADISC, &ndlp->nlp_flag);
3839 if (offline || hba_pci_err) {
3840 clear_bit(NLP_UNREG_INP,
3841 &ndlp->nlp_flag);
3842 clear_bit(NLP_RPI_REGISTERED,
3843 &ndlp->nlp_flag);
3844 }
3845
3846 if (ndlp->nlp_type & NLP_FABRIC) {
3847 lpfc_disc_state_machine(vports[i], ndlp,
3848 NULL, NLP_EVT_DEVICE_RECOVERY);
3849
3850 /* Don't remove the node unless the node
3851 * has been unregistered with the
3852 * transport, and we're not in recovery
3853 * before dev_loss_tmo triggered.
3854 * Otherwise, let dev_loss take care of
3855 * the node.
3856 */
3857 if (!test_bit(NLP_IN_RECOV_POST_DEV_LOSS,
3858 &ndlp->save_flags) &&
3859 !(ndlp->fc4_xpt_flags &
3860 (NVME_XPT_REGD | SCSI_XPT_REGD)))
3861 lpfc_disc_state_machine
3862 (vports[i], ndlp,
3863 NULL,
3864 NLP_EVT_DEVICE_RM);
3865 }
3866 }
3867 }
3868 }
3869 lpfc_destroy_vport_work_array(phba, vports);
3870
3871 lpfc_sli_mbox_sys_shutdown(phba, mbx_action);
3872
3873 if (phba->wq)
3874 flush_workqueue(phba->wq);
3875 }
3876
3877 /**
3878 * lpfc_offline - Bring a HBA offline
3879 * @phba: pointer to lpfc hba data structure.
3880 *
3881 * This routine actually brings a HBA offline. It stops all the timers
3882 * associated with the HBA, brings down the SLI layer, and eventually
3883 * marks the HBA as in offline state for the upper layer protocol.
3884 **/
3885 void
lpfc_offline(struct lpfc_hba * phba)3886 lpfc_offline(struct lpfc_hba *phba)
3887 {
3888 struct Scsi_Host *shost;
3889 struct lpfc_vport **vports;
3890 int i;
3891
3892 if (test_bit(FC_OFFLINE_MODE, &phba->pport->fc_flag))
3893 return;
3894
3895 /* stop port and all timers associated with this hba */
3896 lpfc_stop_port(phba);
3897
3898 /* Tear down the local and target port registrations. The
3899 * nvme transports need to cleanup.
3900 */
3901 lpfc_nvmet_destroy_targetport(phba);
3902 lpfc_nvme_destroy_localport(phba->pport);
3903
3904 vports = lpfc_create_vport_work_array(phba);
3905 if (vports != NULL)
3906 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
3907 lpfc_stop_vport_timers(vports[i]);
3908 lpfc_destroy_vport_work_array(phba, vports);
3909 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
3910 "0460 Bring Adapter offline\n");
3911 /* Bring down the SLI Layer and cleanup. The HBA is offline
3912 now. */
3913 lpfc_sli_hba_down(phba);
3914 spin_lock_irq(&phba->hbalock);
3915 phba->work_ha = 0;
3916 spin_unlock_irq(&phba->hbalock);
3917 vports = lpfc_create_vport_work_array(phba);
3918 if (vports != NULL)
3919 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
3920 shost = lpfc_shost_from_vport(vports[i]);
3921 spin_lock_irq(shost->host_lock);
3922 vports[i]->work_port_events = 0;
3923 spin_unlock_irq(shost->host_lock);
3924 set_bit(FC_OFFLINE_MODE, &vports[i]->fc_flag);
3925 }
3926 lpfc_destroy_vport_work_array(phba, vports);
3927 /* If OFFLINE flag is clear (i.e. unloading), cpuhp removal is handled
3928 * in hba_unset
3929 */
3930 if (test_bit(FC_OFFLINE_MODE, &phba->pport->fc_flag))
3931 __lpfc_cpuhp_remove(phba);
3932
3933 if (phba->cfg_xri_rebalancing)
3934 lpfc_destroy_multixri_pools(phba);
3935 }
3936
3937 /**
3938 * lpfc_scsi_free - Free all the SCSI buffers and IOCBs from driver lists
3939 * @phba: pointer to lpfc hba data structure.
3940 *
3941 * This routine is to free all the SCSI buffers and IOCBs from the driver
3942 * list back to kernel. It is called from lpfc_pci_remove_one to free
3943 * the internal resources before the device is removed from the system.
3944 **/
3945 static void
lpfc_scsi_free(struct lpfc_hba * phba)3946 lpfc_scsi_free(struct lpfc_hba *phba)
3947 {
3948 struct lpfc_io_buf *sb, *sb_next;
3949
3950 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
3951 return;
3952
3953 spin_lock_irq(&phba->hbalock);
3954
3955 /* Release all the lpfc_scsi_bufs maintained by this host. */
3956
3957 spin_lock(&phba->scsi_buf_list_put_lock);
3958 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_put,
3959 list) {
3960 list_del(&sb->list);
3961 dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
3962 sb->dma_handle);
3963 kfree(sb);
3964 phba->total_scsi_bufs--;
3965 }
3966 spin_unlock(&phba->scsi_buf_list_put_lock);
3967
3968 spin_lock(&phba->scsi_buf_list_get_lock);
3969 list_for_each_entry_safe(sb, sb_next, &phba->lpfc_scsi_buf_list_get,
3970 list) {
3971 list_del(&sb->list);
3972 dma_pool_free(phba->lpfc_sg_dma_buf_pool, sb->data,
3973 sb->dma_handle);
3974 kfree(sb);
3975 phba->total_scsi_bufs--;
3976 }
3977 spin_unlock(&phba->scsi_buf_list_get_lock);
3978 spin_unlock_irq(&phba->hbalock);
3979 }
3980
3981 /**
3982 * lpfc_io_free - Free all the IO buffers and IOCBs from driver lists
3983 * @phba: pointer to lpfc hba data structure.
3984 *
3985 * This routine is to free all the IO buffers and IOCBs from the driver
3986 * list back to kernel. It is called from lpfc_pci_remove_one to free
3987 * the internal resources before the device is removed from the system.
3988 **/
3989 void
lpfc_io_free(struct lpfc_hba * phba)3990 lpfc_io_free(struct lpfc_hba *phba)
3991 {
3992 struct lpfc_io_buf *lpfc_ncmd, *lpfc_ncmd_next;
3993 struct lpfc_sli4_hdw_queue *qp;
3994 int idx;
3995
3996 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
3997 qp = &phba->sli4_hba.hdwq[idx];
3998 /* Release all the lpfc_nvme_bufs maintained by this host. */
3999 spin_lock(&qp->io_buf_list_put_lock);
4000 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
4001 &qp->lpfc_io_buf_list_put,
4002 list) {
4003 list_del(&lpfc_ncmd->list);
4004 qp->put_io_bufs--;
4005 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
4006 lpfc_ncmd->data, lpfc_ncmd->dma_handle);
4007 if (phba->cfg_xpsgl && !phba->nvmet_support)
4008 lpfc_put_sgl_per_hdwq(phba, lpfc_ncmd);
4009 lpfc_put_cmd_rsp_buf_per_hdwq(phba, lpfc_ncmd);
4010 kfree(lpfc_ncmd);
4011 qp->total_io_bufs--;
4012 }
4013 spin_unlock(&qp->io_buf_list_put_lock);
4014
4015 spin_lock(&qp->io_buf_list_get_lock);
4016 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
4017 &qp->lpfc_io_buf_list_get,
4018 list) {
4019 list_del(&lpfc_ncmd->list);
4020 qp->get_io_bufs--;
4021 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
4022 lpfc_ncmd->data, lpfc_ncmd->dma_handle);
4023 if (phba->cfg_xpsgl && !phba->nvmet_support)
4024 lpfc_put_sgl_per_hdwq(phba, lpfc_ncmd);
4025 lpfc_put_cmd_rsp_buf_per_hdwq(phba, lpfc_ncmd);
4026 kfree(lpfc_ncmd);
4027 qp->total_io_bufs--;
4028 }
4029 spin_unlock(&qp->io_buf_list_get_lock);
4030 }
4031 }
4032
4033 /**
4034 * lpfc_sli4_els_sgl_update - update ELS xri-sgl sizing and mapping
4035 * @phba: pointer to lpfc hba data structure.
4036 *
4037 * This routine first calculates the sizes of the current els and allocated
4038 * scsi sgl lists, and then goes through all sgls to updates the physical
4039 * XRIs assigned due to port function reset. During port initialization, the
4040 * current els and allocated scsi sgl lists are 0s.
4041 *
4042 * Return codes
4043 * 0 - successful (for now, it always returns 0)
4044 **/
4045 int
lpfc_sli4_els_sgl_update(struct lpfc_hba * phba)4046 lpfc_sli4_els_sgl_update(struct lpfc_hba *phba)
4047 {
4048 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;
4049 uint16_t i, lxri, xri_cnt, els_xri_cnt;
4050 LIST_HEAD(els_sgl_list);
4051 int rc;
4052
4053 /*
4054 * update on pci function's els xri-sgl list
4055 */
4056 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
4057
4058 if (els_xri_cnt > phba->sli4_hba.els_xri_cnt) {
4059 /* els xri-sgl expanded */
4060 xri_cnt = els_xri_cnt - phba->sli4_hba.els_xri_cnt;
4061 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4062 "3157 ELS xri-sgl count increased from "
4063 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
4064 els_xri_cnt);
4065 /* allocate the additional els sgls */
4066 for (i = 0; i < xri_cnt; i++) {
4067 sglq_entry = kzalloc(sizeof(struct lpfc_sglq),
4068 GFP_KERNEL);
4069 if (sglq_entry == NULL) {
4070 lpfc_printf_log(phba, KERN_ERR,
4071 LOG_TRACE_EVENT,
4072 "2562 Failure to allocate an "
4073 "ELS sgl entry:%d\n", i);
4074 rc = -ENOMEM;
4075 goto out_free_mem;
4076 }
4077 sglq_entry->buff_type = GEN_BUFF_TYPE;
4078 sglq_entry->virt = lpfc_mbuf_alloc(phba, 0,
4079 &sglq_entry->phys);
4080 if (sglq_entry->virt == NULL) {
4081 kfree(sglq_entry);
4082 lpfc_printf_log(phba, KERN_ERR,
4083 LOG_TRACE_EVENT,
4084 "2563 Failure to allocate an "
4085 "ELS mbuf:%d\n", i);
4086 rc = -ENOMEM;
4087 goto out_free_mem;
4088 }
4089 sglq_entry->sgl = sglq_entry->virt;
4090 memset(sglq_entry->sgl, 0, LPFC_BPL_SIZE);
4091 sglq_entry->state = SGL_FREED;
4092 list_add_tail(&sglq_entry->list, &els_sgl_list);
4093 }
4094 spin_lock_irq(&phba->sli4_hba.sgl_list_lock);
4095 list_splice_init(&els_sgl_list,
4096 &phba->sli4_hba.lpfc_els_sgl_list);
4097 spin_unlock_irq(&phba->sli4_hba.sgl_list_lock);
4098 } else if (els_xri_cnt < phba->sli4_hba.els_xri_cnt) {
4099 /* els xri-sgl shrinked */
4100 xri_cnt = phba->sli4_hba.els_xri_cnt - els_xri_cnt;
4101 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4102 "3158 ELS xri-sgl count decreased from "
4103 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
4104 els_xri_cnt);
4105 spin_lock_irq(&phba->sli4_hba.sgl_list_lock);
4106 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list,
4107 &els_sgl_list);
4108 /* release extra els sgls from list */
4109 for (i = 0; i < xri_cnt; i++) {
4110 list_remove_head(&els_sgl_list,
4111 sglq_entry, struct lpfc_sglq, list);
4112 if (sglq_entry) {
4113 __lpfc_mbuf_free(phba, sglq_entry->virt,
4114 sglq_entry->phys);
4115 kfree(sglq_entry);
4116 }
4117 }
4118 list_splice_init(&els_sgl_list,
4119 &phba->sli4_hba.lpfc_els_sgl_list);
4120 spin_unlock_irq(&phba->sli4_hba.sgl_list_lock);
4121 } else
4122 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4123 "3163 ELS xri-sgl count unchanged: %d\n",
4124 els_xri_cnt);
4125 phba->sli4_hba.els_xri_cnt = els_xri_cnt;
4126
4127 /* update xris to els sgls on the list */
4128 sglq_entry = NULL;
4129 sglq_entry_next = NULL;
4130 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
4131 &phba->sli4_hba.lpfc_els_sgl_list, list) {
4132 lxri = lpfc_sli4_next_xritag(phba);
4133 if (lxri == NO_XRI) {
4134 lpfc_printf_log(phba, KERN_ERR,
4135 LOG_TRACE_EVENT,
4136 "2400 Failed to allocate xri for "
4137 "ELS sgl\n");
4138 rc = -ENOMEM;
4139 goto out_free_mem;
4140 }
4141 sglq_entry->sli4_lxritag = lxri;
4142 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
4143 }
4144 return 0;
4145
4146 out_free_mem:
4147 lpfc_free_els_sgl_list(phba);
4148 return rc;
4149 }
4150
4151 /**
4152 * lpfc_sli4_nvmet_sgl_update - update xri-sgl sizing and mapping
4153 * @phba: pointer to lpfc hba data structure.
4154 *
4155 * This routine first calculates the sizes of the current els and allocated
4156 * scsi sgl lists, and then goes through all sgls to updates the physical
4157 * XRIs assigned due to port function reset. During port initialization, the
4158 * current els and allocated scsi sgl lists are 0s.
4159 *
4160 * Return codes
4161 * 0 - successful (for now, it always returns 0)
4162 **/
4163 int
lpfc_sli4_nvmet_sgl_update(struct lpfc_hba * phba)4164 lpfc_sli4_nvmet_sgl_update(struct lpfc_hba *phba)
4165 {
4166 struct lpfc_sglq *sglq_entry = NULL, *sglq_entry_next = NULL;
4167 uint16_t i, lxri, xri_cnt, els_xri_cnt;
4168 uint16_t nvmet_xri_cnt;
4169 LIST_HEAD(nvmet_sgl_list);
4170 int rc;
4171
4172 /*
4173 * update on pci function's nvmet xri-sgl list
4174 */
4175 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
4176
4177 /* For NVMET, ALL remaining XRIs are dedicated for IO processing */
4178 nvmet_xri_cnt = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
4179 if (nvmet_xri_cnt > phba->sli4_hba.nvmet_xri_cnt) {
4180 /* els xri-sgl expanded */
4181 xri_cnt = nvmet_xri_cnt - phba->sli4_hba.nvmet_xri_cnt;
4182 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4183 "6302 NVMET xri-sgl cnt grew from %d to %d\n",
4184 phba->sli4_hba.nvmet_xri_cnt, nvmet_xri_cnt);
4185 /* allocate the additional nvmet sgls */
4186 for (i = 0; i < xri_cnt; i++) {
4187 sglq_entry = kzalloc(sizeof(struct lpfc_sglq),
4188 GFP_KERNEL);
4189 if (sglq_entry == NULL) {
4190 lpfc_printf_log(phba, KERN_ERR,
4191 LOG_TRACE_EVENT,
4192 "6303 Failure to allocate an "
4193 "NVMET sgl entry:%d\n", i);
4194 rc = -ENOMEM;
4195 goto out_free_mem;
4196 }
4197 sglq_entry->buff_type = NVMET_BUFF_TYPE;
4198 sglq_entry->virt = lpfc_nvmet_buf_alloc(phba, 0,
4199 &sglq_entry->phys);
4200 if (sglq_entry->virt == NULL) {
4201 kfree(sglq_entry);
4202 lpfc_printf_log(phba, KERN_ERR,
4203 LOG_TRACE_EVENT,
4204 "6304 Failure to allocate an "
4205 "NVMET buf:%d\n", i);
4206 rc = -ENOMEM;
4207 goto out_free_mem;
4208 }
4209 sglq_entry->sgl = sglq_entry->virt;
4210 memset(sglq_entry->sgl, 0,
4211 phba->cfg_sg_dma_buf_size);
4212 sglq_entry->state = SGL_FREED;
4213 list_add_tail(&sglq_entry->list, &nvmet_sgl_list);
4214 }
4215 spin_lock_irq(&phba->hbalock);
4216 spin_lock(&phba->sli4_hba.sgl_list_lock);
4217 list_splice_init(&nvmet_sgl_list,
4218 &phba->sli4_hba.lpfc_nvmet_sgl_list);
4219 spin_unlock(&phba->sli4_hba.sgl_list_lock);
4220 spin_unlock_irq(&phba->hbalock);
4221 } else if (nvmet_xri_cnt < phba->sli4_hba.nvmet_xri_cnt) {
4222 /* nvmet xri-sgl shrunk */
4223 xri_cnt = phba->sli4_hba.nvmet_xri_cnt - nvmet_xri_cnt;
4224 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4225 "6305 NVMET xri-sgl count decreased from "
4226 "%d to %d\n", phba->sli4_hba.nvmet_xri_cnt,
4227 nvmet_xri_cnt);
4228 spin_lock_irq(&phba->hbalock);
4229 spin_lock(&phba->sli4_hba.sgl_list_lock);
4230 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list,
4231 &nvmet_sgl_list);
4232 /* release extra nvmet sgls from list */
4233 for (i = 0; i < xri_cnt; i++) {
4234 list_remove_head(&nvmet_sgl_list,
4235 sglq_entry, struct lpfc_sglq, list);
4236 if (sglq_entry) {
4237 lpfc_nvmet_buf_free(phba, sglq_entry->virt,
4238 sglq_entry->phys);
4239 kfree(sglq_entry);
4240 }
4241 }
4242 list_splice_init(&nvmet_sgl_list,
4243 &phba->sli4_hba.lpfc_nvmet_sgl_list);
4244 spin_unlock(&phba->sli4_hba.sgl_list_lock);
4245 spin_unlock_irq(&phba->hbalock);
4246 } else
4247 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4248 "6306 NVMET xri-sgl count unchanged: %d\n",
4249 nvmet_xri_cnt);
4250 phba->sli4_hba.nvmet_xri_cnt = nvmet_xri_cnt;
4251
4252 /* update xris to nvmet sgls on the list */
4253 sglq_entry = NULL;
4254 sglq_entry_next = NULL;
4255 list_for_each_entry_safe(sglq_entry, sglq_entry_next,
4256 &phba->sli4_hba.lpfc_nvmet_sgl_list, list) {
4257 lxri = lpfc_sli4_next_xritag(phba);
4258 if (lxri == NO_XRI) {
4259 lpfc_printf_log(phba, KERN_ERR,
4260 LOG_TRACE_EVENT,
4261 "6307 Failed to allocate xri for "
4262 "NVMET sgl\n");
4263 rc = -ENOMEM;
4264 goto out_free_mem;
4265 }
4266 sglq_entry->sli4_lxritag = lxri;
4267 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
4268 }
4269 return 0;
4270
4271 out_free_mem:
4272 lpfc_free_nvmet_sgl_list(phba);
4273 return rc;
4274 }
4275
4276 int
lpfc_io_buf_flush(struct lpfc_hba * phba,struct list_head * cbuf)4277 lpfc_io_buf_flush(struct lpfc_hba *phba, struct list_head *cbuf)
4278 {
4279 LIST_HEAD(blist);
4280 struct lpfc_sli4_hdw_queue *qp;
4281 struct lpfc_io_buf *lpfc_cmd;
4282 struct lpfc_io_buf *iobufp, *prev_iobufp;
4283 int idx, cnt, xri, inserted;
4284
4285 cnt = 0;
4286 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
4287 qp = &phba->sli4_hba.hdwq[idx];
4288 spin_lock_irq(&qp->io_buf_list_get_lock);
4289 spin_lock(&qp->io_buf_list_put_lock);
4290
4291 /* Take everything off the get and put lists */
4292 list_splice_init(&qp->lpfc_io_buf_list_get, &blist);
4293 list_splice(&qp->lpfc_io_buf_list_put, &blist);
4294 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_get);
4295 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_put);
4296 cnt += qp->get_io_bufs + qp->put_io_bufs;
4297 qp->get_io_bufs = 0;
4298 qp->put_io_bufs = 0;
4299 qp->total_io_bufs = 0;
4300 spin_unlock(&qp->io_buf_list_put_lock);
4301 spin_unlock_irq(&qp->io_buf_list_get_lock);
4302 }
4303
4304 /*
4305 * Take IO buffers off blist and put on cbuf sorted by XRI.
4306 * This is because POST_SGL takes a sequential range of XRIs
4307 * to post to the firmware.
4308 */
4309 for (idx = 0; idx < cnt; idx++) {
4310 list_remove_head(&blist, lpfc_cmd, struct lpfc_io_buf, list);
4311 if (!lpfc_cmd)
4312 return cnt;
4313 if (idx == 0) {
4314 list_add_tail(&lpfc_cmd->list, cbuf);
4315 continue;
4316 }
4317 xri = lpfc_cmd->cur_iocbq.sli4_xritag;
4318 inserted = 0;
4319 prev_iobufp = NULL;
4320 list_for_each_entry(iobufp, cbuf, list) {
4321 if (xri < iobufp->cur_iocbq.sli4_xritag) {
4322 if (prev_iobufp)
4323 list_add(&lpfc_cmd->list,
4324 &prev_iobufp->list);
4325 else
4326 list_add(&lpfc_cmd->list, cbuf);
4327 inserted = 1;
4328 break;
4329 }
4330 prev_iobufp = iobufp;
4331 }
4332 if (!inserted)
4333 list_add_tail(&lpfc_cmd->list, cbuf);
4334 }
4335 return cnt;
4336 }
4337
4338 int
lpfc_io_buf_replenish(struct lpfc_hba * phba,struct list_head * cbuf)4339 lpfc_io_buf_replenish(struct lpfc_hba *phba, struct list_head *cbuf)
4340 {
4341 struct lpfc_sli4_hdw_queue *qp;
4342 struct lpfc_io_buf *lpfc_cmd;
4343 int idx, cnt;
4344 unsigned long iflags;
4345
4346 qp = phba->sli4_hba.hdwq;
4347 cnt = 0;
4348 while (!list_empty(cbuf)) {
4349 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
4350 list_remove_head(cbuf, lpfc_cmd,
4351 struct lpfc_io_buf, list);
4352 if (!lpfc_cmd)
4353 return cnt;
4354 cnt++;
4355 qp = &phba->sli4_hba.hdwq[idx];
4356 lpfc_cmd->hdwq_no = idx;
4357 lpfc_cmd->hdwq = qp;
4358 lpfc_cmd->cur_iocbq.cmd_cmpl = NULL;
4359 spin_lock_irqsave(&qp->io_buf_list_put_lock, iflags);
4360 list_add_tail(&lpfc_cmd->list,
4361 &qp->lpfc_io_buf_list_put);
4362 qp->put_io_bufs++;
4363 qp->total_io_bufs++;
4364 spin_unlock_irqrestore(&qp->io_buf_list_put_lock,
4365 iflags);
4366 }
4367 }
4368 return cnt;
4369 }
4370
4371 /**
4372 * lpfc_sli4_io_sgl_update - update xri-sgl sizing and mapping
4373 * @phba: pointer to lpfc hba data structure.
4374 *
4375 * This routine first calculates the sizes of the current els and allocated
4376 * scsi sgl lists, and then goes through all sgls to updates the physical
4377 * XRIs assigned due to port function reset. During port initialization, the
4378 * current els and allocated scsi sgl lists are 0s.
4379 *
4380 * Return codes
4381 * 0 - successful (for now, it always returns 0)
4382 **/
4383 int
lpfc_sli4_io_sgl_update(struct lpfc_hba * phba)4384 lpfc_sli4_io_sgl_update(struct lpfc_hba *phba)
4385 {
4386 struct lpfc_io_buf *lpfc_ncmd = NULL, *lpfc_ncmd_next = NULL;
4387 uint16_t i, lxri, els_xri_cnt;
4388 uint16_t io_xri_cnt, io_xri_max;
4389 LIST_HEAD(io_sgl_list);
4390 int rc, cnt;
4391
4392 /*
4393 * update on pci function's allocated nvme xri-sgl list
4394 */
4395
4396 /* maximum number of xris available for nvme buffers */
4397 els_xri_cnt = lpfc_sli4_get_els_iocb_cnt(phba);
4398 io_xri_max = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
4399 phba->sli4_hba.io_xri_max = io_xri_max;
4400
4401 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
4402 "6074 Current allocated XRI sgl count:%d, "
4403 "maximum XRI count:%d els_xri_cnt:%d\n\n",
4404 phba->sli4_hba.io_xri_cnt,
4405 phba->sli4_hba.io_xri_max,
4406 els_xri_cnt);
4407
4408 cnt = lpfc_io_buf_flush(phba, &io_sgl_list);
4409
4410 if (phba->sli4_hba.io_xri_cnt > phba->sli4_hba.io_xri_max) {
4411 /* max nvme xri shrunk below the allocated nvme buffers */
4412 io_xri_cnt = phba->sli4_hba.io_xri_cnt -
4413 phba->sli4_hba.io_xri_max;
4414 /* release the extra allocated nvme buffers */
4415 for (i = 0; i < io_xri_cnt; i++) {
4416 list_remove_head(&io_sgl_list, lpfc_ncmd,
4417 struct lpfc_io_buf, list);
4418 if (lpfc_ncmd) {
4419 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
4420 lpfc_ncmd->data,
4421 lpfc_ncmd->dma_handle);
4422 kfree(lpfc_ncmd);
4423 }
4424 }
4425 phba->sli4_hba.io_xri_cnt -= io_xri_cnt;
4426 }
4427
4428 /* update xris associated to remaining allocated nvme buffers */
4429 lpfc_ncmd = NULL;
4430 lpfc_ncmd_next = NULL;
4431 phba->sli4_hba.io_xri_cnt = cnt;
4432 list_for_each_entry_safe(lpfc_ncmd, lpfc_ncmd_next,
4433 &io_sgl_list, list) {
4434 lxri = lpfc_sli4_next_xritag(phba);
4435 if (lxri == NO_XRI) {
4436 lpfc_printf_log(phba, KERN_ERR,
4437 LOG_TRACE_EVENT,
4438 "6075 Failed to allocate xri for "
4439 "nvme buffer\n");
4440 rc = -ENOMEM;
4441 goto out_free_mem;
4442 }
4443 lpfc_ncmd->cur_iocbq.sli4_lxritag = lxri;
4444 lpfc_ncmd->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri];
4445 }
4446 cnt = lpfc_io_buf_replenish(phba, &io_sgl_list);
4447 return 0;
4448
4449 out_free_mem:
4450 lpfc_io_free(phba);
4451 return rc;
4452 }
4453
4454 /**
4455 * lpfc_new_io_buf - IO buffer allocator for HBA with SLI4 IF spec
4456 * @phba: Pointer to lpfc hba data structure.
4457 * @num_to_alloc: The requested number of buffers to allocate.
4458 *
4459 * This routine allocates nvme buffers for device with SLI-4 interface spec,
4460 * the nvme buffer contains all the necessary information needed to initiate
4461 * an I/O. After allocating up to @num_to_allocate IO buffers and put
4462 * them on a list, it post them to the port by using SGL block post.
4463 *
4464 * Return codes:
4465 * int - number of IO buffers that were allocated and posted.
4466 * 0 = failure, less than num_to_alloc is a partial failure.
4467 **/
4468 int
lpfc_new_io_buf(struct lpfc_hba * phba,int num_to_alloc)4469 lpfc_new_io_buf(struct lpfc_hba *phba, int num_to_alloc)
4470 {
4471 struct lpfc_io_buf *lpfc_ncmd;
4472 struct lpfc_iocbq *pwqeq;
4473 uint16_t iotag, lxri = 0;
4474 int bcnt, num_posted;
4475 LIST_HEAD(prep_nblist);
4476 LIST_HEAD(post_nblist);
4477 LIST_HEAD(nvme_nblist);
4478
4479 phba->sli4_hba.io_xri_cnt = 0;
4480 for (bcnt = 0; bcnt < num_to_alloc; bcnt++) {
4481 lpfc_ncmd = kzalloc(sizeof(*lpfc_ncmd), GFP_KERNEL);
4482 if (!lpfc_ncmd)
4483 break;
4484 /*
4485 * Get memory from the pci pool to map the virt space to
4486 * pci bus space for an I/O. The DMA buffer includes the
4487 * number of SGE's necessary to support the sg_tablesize.
4488 */
4489 lpfc_ncmd->data = dma_pool_zalloc(phba->lpfc_sg_dma_buf_pool,
4490 GFP_KERNEL,
4491 &lpfc_ncmd->dma_handle);
4492 if (!lpfc_ncmd->data) {
4493 kfree(lpfc_ncmd);
4494 break;
4495 }
4496
4497 if (phba->cfg_xpsgl && !phba->nvmet_support) {
4498 INIT_LIST_HEAD(&lpfc_ncmd->dma_sgl_xtra_list);
4499 } else {
4500 /*
4501 * 4K Page alignment is CRITICAL to BlockGuard, double
4502 * check to be sure.
4503 */
4504 if ((phba->sli3_options & LPFC_SLI3_BG_ENABLED) &&
4505 (((unsigned long)(lpfc_ncmd->data) &
4506 (unsigned long)(SLI4_PAGE_SIZE - 1)) != 0)) {
4507 lpfc_printf_log(phba, KERN_ERR,
4508 LOG_TRACE_EVENT,
4509 "3369 Memory alignment err: "
4510 "addr=%lx\n",
4511 (unsigned long)lpfc_ncmd->data);
4512 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
4513 lpfc_ncmd->data,
4514 lpfc_ncmd->dma_handle);
4515 kfree(lpfc_ncmd);
4516 break;
4517 }
4518 }
4519
4520 INIT_LIST_HEAD(&lpfc_ncmd->dma_cmd_rsp_list);
4521
4522 lxri = lpfc_sli4_next_xritag(phba);
4523 if (lxri == NO_XRI) {
4524 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
4525 lpfc_ncmd->data, lpfc_ncmd->dma_handle);
4526 kfree(lpfc_ncmd);
4527 break;
4528 }
4529 pwqeq = &lpfc_ncmd->cur_iocbq;
4530
4531 /* Allocate iotag for lpfc_ncmd->cur_iocbq. */
4532 iotag = lpfc_sli_next_iotag(phba, pwqeq);
4533 if (iotag == 0) {
4534 dma_pool_free(phba->lpfc_sg_dma_buf_pool,
4535 lpfc_ncmd->data, lpfc_ncmd->dma_handle);
4536 kfree(lpfc_ncmd);
4537 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
4538 "6121 Failed to allocate IOTAG for"
4539 " XRI:0x%x\n", lxri);
4540 lpfc_sli4_free_xri(phba, lxri);
4541 break;
4542 }
4543 pwqeq->sli4_lxritag = lxri;
4544 pwqeq->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
4545
4546 /* Initialize local short-hand pointers. */
4547 lpfc_ncmd->dma_sgl = lpfc_ncmd->data;
4548 lpfc_ncmd->dma_phys_sgl = lpfc_ncmd->dma_handle;
4549 lpfc_ncmd->cur_iocbq.io_buf = lpfc_ncmd;
4550 spin_lock_init(&lpfc_ncmd->buf_lock);
4551
4552 /* add the nvme buffer to a post list */
4553 list_add_tail(&lpfc_ncmd->list, &post_nblist);
4554 phba->sli4_hba.io_xri_cnt++;
4555 }
4556 lpfc_printf_log(phba, KERN_INFO, LOG_NVME,
4557 "6114 Allocate %d out of %d requested new NVME "
4558 "buffers of size x%zu bytes\n", bcnt, num_to_alloc,
4559 sizeof(*lpfc_ncmd));
4560
4561
4562 /* post the list of nvme buffer sgls to port if available */
4563 if (!list_empty(&post_nblist))
4564 num_posted = lpfc_sli4_post_io_sgl_list(
4565 phba, &post_nblist, bcnt);
4566 else
4567 num_posted = 0;
4568
4569 return num_posted;
4570 }
4571
4572 static uint64_t
lpfc_get_wwpn(struct lpfc_hba * phba)4573 lpfc_get_wwpn(struct lpfc_hba *phba)
4574 {
4575 uint64_t wwn;
4576 int rc;
4577 LPFC_MBOXQ_t *mboxq;
4578 MAILBOX_t *mb;
4579
4580 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
4581 GFP_KERNEL);
4582 if (!mboxq)
4583 return (uint64_t)-1;
4584
4585 /* First get WWN of HBA instance */
4586 lpfc_read_nv(phba, mboxq);
4587 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
4588 if (rc != MBX_SUCCESS) {
4589 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
4590 "6019 Mailbox failed , mbxCmd x%x "
4591 "READ_NV, mbxStatus x%x\n",
4592 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
4593 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
4594 mempool_free(mboxq, phba->mbox_mem_pool);
4595 return (uint64_t) -1;
4596 }
4597 mb = &mboxq->u.mb;
4598 memcpy(&wwn, (char *)mb->un.varRDnvp.portname, sizeof(uint64_t));
4599 /* wwn is WWPN of HBA instance */
4600 mempool_free(mboxq, phba->mbox_mem_pool);
4601 if (phba->sli_rev == LPFC_SLI_REV4)
4602 return be64_to_cpu(wwn);
4603 else
4604 return rol64(wwn, 32);
4605 }
4606
lpfc_get_sg_tablesize(struct lpfc_hba * phba)4607 static unsigned short lpfc_get_sg_tablesize(struct lpfc_hba *phba)
4608 {
4609 if (phba->sli_rev == LPFC_SLI_REV4)
4610 if (phba->cfg_xpsgl && !phba->nvmet_support)
4611 return LPFC_MAX_SG_TABLESIZE;
4612 else
4613 return phba->cfg_scsi_seg_cnt;
4614 else
4615 return phba->cfg_sg_seg_cnt;
4616 }
4617
4618 /**
4619 * lpfc_vmid_res_alloc - Allocates resources for VMID
4620 * @phba: pointer to lpfc hba data structure.
4621 * @vport: pointer to vport data structure
4622 *
4623 * This routine allocated the resources needed for the VMID.
4624 *
4625 * Return codes
4626 * 0 on Success
4627 * Non-0 on Failure
4628 */
4629 static int
lpfc_vmid_res_alloc(struct lpfc_hba * phba,struct lpfc_vport * vport)4630 lpfc_vmid_res_alloc(struct lpfc_hba *phba, struct lpfc_vport *vport)
4631 {
4632 /* VMID feature is supported only on SLI4 */
4633 if (phba->sli_rev == LPFC_SLI_REV3) {
4634 phba->cfg_vmid_app_header = 0;
4635 phba->cfg_vmid_priority_tagging = 0;
4636 }
4637
4638 if (lpfc_is_vmid_enabled(phba)) {
4639 vport->vmid =
4640 kcalloc(phba->cfg_max_vmid, sizeof(struct lpfc_vmid),
4641 GFP_KERNEL);
4642 if (!vport->vmid)
4643 return -ENOMEM;
4644
4645 rwlock_init(&vport->vmid_lock);
4646
4647 /* Set the VMID parameters for the vport */
4648 vport->vmid_priority_tagging = phba->cfg_vmid_priority_tagging;
4649 vport->vmid_inactivity_timeout =
4650 phba->cfg_vmid_inactivity_timeout;
4651 vport->max_vmid = phba->cfg_max_vmid;
4652 vport->cur_vmid_cnt = 0;
4653
4654 vport->vmid_priority_range = bitmap_zalloc
4655 (LPFC_VMID_MAX_PRIORITY_RANGE, GFP_KERNEL);
4656
4657 if (!vport->vmid_priority_range) {
4658 kfree(vport->vmid);
4659 return -ENOMEM;
4660 }
4661
4662 hash_init(vport->hash_table);
4663 }
4664 return 0;
4665 }
4666
4667 /**
4668 * lpfc_create_port - Create an FC port
4669 * @phba: pointer to lpfc hba data structure.
4670 * @instance: a unique integer ID to this FC port.
4671 * @dev: pointer to the device data structure.
4672 *
4673 * This routine creates a FC port for the upper layer protocol. The FC port
4674 * can be created on top of either a physical port or a virtual port provided
4675 * by the HBA. This routine also allocates a SCSI host data structure (shost)
4676 * and associates the FC port created before adding the shost into the SCSI
4677 * layer.
4678 *
4679 * Return codes
4680 * @vport - pointer to the virtual N_Port data structure.
4681 * NULL - port create failed.
4682 **/
4683 struct lpfc_vport *
lpfc_create_port(struct lpfc_hba * phba,int instance,struct device * dev)4684 lpfc_create_port(struct lpfc_hba *phba, int instance, struct device *dev)
4685 {
4686 struct lpfc_vport *vport;
4687 struct Scsi_Host *shost = NULL;
4688 struct scsi_host_template *template;
4689 int error = 0;
4690 int i;
4691 uint64_t wwn;
4692 bool use_no_reset_hba = false;
4693 int rc;
4694 u8 if_type;
4695
4696 if (lpfc_no_hba_reset_cnt) {
4697 if (phba->sli_rev < LPFC_SLI_REV4 &&
4698 dev == &phba->pcidev->dev) {
4699 /* Reset the port first */
4700 lpfc_sli_brdrestart(phba);
4701 rc = lpfc_sli_chipset_init(phba);
4702 if (rc)
4703 return NULL;
4704 }
4705 wwn = lpfc_get_wwpn(phba);
4706 }
4707
4708 for (i = 0; i < lpfc_no_hba_reset_cnt; i++) {
4709 if (wwn == lpfc_no_hba_reset[i]) {
4710 lpfc_printf_log(phba, KERN_ERR,
4711 LOG_TRACE_EVENT,
4712 "6020 Setting use_no_reset port=%llx\n",
4713 wwn);
4714 use_no_reset_hba = true;
4715 break;
4716 }
4717 }
4718
4719 /* Seed template for SCSI host registration */
4720 if (dev == &phba->pcidev->dev) {
4721 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
4722 /* Seed physical port template */
4723 template = &lpfc_template;
4724
4725 if (use_no_reset_hba)
4726 /* template is for a no reset SCSI Host */
4727 template->eh_host_reset_handler = NULL;
4728
4729 /* Seed updated value of sg_tablesize */
4730 template->sg_tablesize = lpfc_get_sg_tablesize(phba);
4731 } else {
4732 /* NVMET is for physical port only */
4733 template = &lpfc_template_nvme;
4734 }
4735 } else {
4736 /* Seed vport template */
4737 template = &lpfc_vport_template;
4738
4739 /* Seed updated value of sg_tablesize */
4740 template->sg_tablesize = lpfc_get_sg_tablesize(phba);
4741 }
4742
4743 shost = scsi_host_alloc(template, sizeof(struct lpfc_vport));
4744 if (!shost)
4745 goto out;
4746
4747 vport = (struct lpfc_vport *) shost->hostdata;
4748 vport->phba = phba;
4749 set_bit(FC_LOADING, &vport->load_flag);
4750 set_bit(FC_VPORT_NEEDS_REG_VPI, &vport->fc_flag);
4751 vport->fc_rscn_flush = 0;
4752 atomic_set(&vport->fc_plogi_cnt, 0);
4753 atomic_set(&vport->fc_adisc_cnt, 0);
4754 atomic_set(&vport->fc_reglogin_cnt, 0);
4755 atomic_set(&vport->fc_prli_cnt, 0);
4756 atomic_set(&vport->fc_unmap_cnt, 0);
4757 atomic_set(&vport->fc_map_cnt, 0);
4758 atomic_set(&vport->fc_npr_cnt, 0);
4759 atomic_set(&vport->fc_unused_cnt, 0);
4760 lpfc_get_vport_cfgparam(vport);
4761
4762 /* Adjust value in vport */
4763 vport->cfg_enable_fc4_type = phba->cfg_enable_fc4_type;
4764
4765 shost->unique_id = instance;
4766 shost->max_id = LPFC_MAX_TARGET;
4767 shost->max_lun = vport->cfg_max_luns;
4768 shost->this_id = -1;
4769
4770 /* Set max_cmd_len applicable to ASIC support */
4771 if (phba->sli_rev == LPFC_SLI_REV4) {
4772 if_type = bf_get(lpfc_sli_intf_if_type,
4773 &phba->sli4_hba.sli_intf);
4774 switch (if_type) {
4775 case LPFC_SLI_INTF_IF_TYPE_2:
4776 fallthrough;
4777 case LPFC_SLI_INTF_IF_TYPE_6:
4778 shost->max_cmd_len = LPFC_FCP_CDB_LEN_32;
4779 break;
4780 default:
4781 shost->max_cmd_len = LPFC_FCP_CDB_LEN;
4782 break;
4783 }
4784 } else {
4785 shost->max_cmd_len = LPFC_FCP_CDB_LEN;
4786 }
4787
4788 if (phba->sli_rev == LPFC_SLI_REV4) {
4789 if (!phba->cfg_fcp_mq_threshold ||
4790 phba->cfg_fcp_mq_threshold > phba->cfg_hdw_queue)
4791 phba->cfg_fcp_mq_threshold = phba->cfg_hdw_queue;
4792
4793 shost->nr_hw_queues = min_t(int, 2 * num_possible_nodes(),
4794 phba->cfg_fcp_mq_threshold);
4795
4796 shost->dma_boundary =
4797 phba->sli4_hba.pc_sli4_params.sge_supp_len-1;
4798 } else
4799 /* SLI-3 has a limited number of hardware queues (3),
4800 * thus there is only one for FCP processing.
4801 */
4802 shost->nr_hw_queues = 1;
4803
4804 /*
4805 * Set initial can_queue value since 0 is no longer supported and
4806 * scsi_add_host will fail. This will be adjusted later based on the
4807 * max xri value determined in hba setup.
4808 */
4809 shost->can_queue = phba->cfg_hba_queue_depth - 10;
4810 if (dev != &phba->pcidev->dev) {
4811 shost->transportt = lpfc_vport_transport_template;
4812 vport->port_type = LPFC_NPIV_PORT;
4813 } else {
4814 shost->transportt = lpfc_transport_template;
4815 vport->port_type = LPFC_PHYSICAL_PORT;
4816 }
4817
4818 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
4819 "9081 CreatePort TMPLATE type %x TBLsize %d "
4820 "SEGcnt %d/%d\n",
4821 vport->port_type, shost->sg_tablesize,
4822 phba->cfg_scsi_seg_cnt, phba->cfg_sg_seg_cnt);
4823
4824 /* Allocate the resources for VMID */
4825 rc = lpfc_vmid_res_alloc(phba, vport);
4826
4827 if (rc)
4828 goto out_put_shost;
4829
4830 /* Initialize all internally managed lists. */
4831 INIT_LIST_HEAD(&vport->fc_nodes);
4832 spin_lock_init(&vport->fc_nodes_list_lock);
4833 INIT_LIST_HEAD(&vport->rcv_buffer_list);
4834 spin_lock_init(&vport->work_port_lock);
4835
4836 timer_setup(&vport->fc_disctmo, lpfc_disc_timeout, 0);
4837
4838 timer_setup(&vport->els_tmofunc, lpfc_els_timeout, 0);
4839
4840 timer_setup(&vport->delayed_disc_tmo, lpfc_delayed_disc_tmo, 0);
4841
4842 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED)
4843 lpfc_setup_bg(phba, shost);
4844
4845 error = scsi_add_host_with_dma(shost, dev, &phba->pcidev->dev);
4846 if (error)
4847 goto out_free_vmid;
4848
4849 spin_lock_irq(&phba->port_list_lock);
4850 list_add_tail(&vport->listentry, &phba->port_list);
4851 spin_unlock_irq(&phba->port_list_lock);
4852 return vport;
4853
4854 out_free_vmid:
4855 kfree(vport->vmid);
4856 bitmap_free(vport->vmid_priority_range);
4857 out_put_shost:
4858 scsi_host_put(shost);
4859 out:
4860 return NULL;
4861 }
4862
4863 /**
4864 * destroy_port - destroy an FC port
4865 * @vport: pointer to an lpfc virtual N_Port data structure.
4866 *
4867 * This routine destroys a FC port from the upper layer protocol. All the
4868 * resources associated with the port are released.
4869 **/
4870 void
destroy_port(struct lpfc_vport * vport)4871 destroy_port(struct lpfc_vport *vport)
4872 {
4873 struct Scsi_Host *shost = lpfc_shost_from_vport(vport);
4874 struct lpfc_hba *phba = vport->phba;
4875
4876 lpfc_debugfs_terminate(vport);
4877 fc_remove_host(shost);
4878 scsi_remove_host(shost);
4879
4880 spin_lock_irq(&phba->port_list_lock);
4881 list_del_init(&vport->listentry);
4882 spin_unlock_irq(&phba->port_list_lock);
4883
4884 lpfc_cleanup(vport);
4885 return;
4886 }
4887
4888 /**
4889 * lpfc_get_instance - Get a unique integer ID
4890 *
4891 * This routine allocates a unique integer ID from lpfc_hba_index pool. It
4892 * uses the kernel idr facility to perform the task.
4893 *
4894 * Return codes:
4895 * instance - a unique integer ID allocated as the new instance.
4896 * -1 - lpfc get instance failed.
4897 **/
4898 int
lpfc_get_instance(void)4899 lpfc_get_instance(void)
4900 {
4901 int ret;
4902
4903 ret = idr_alloc(&lpfc_hba_index, NULL, 0, 0, GFP_KERNEL);
4904 return ret < 0 ? -1 : ret;
4905 }
4906
4907 /**
4908 * lpfc_scan_finished - method for SCSI layer to detect whether scan is done
4909 * @shost: pointer to SCSI host data structure.
4910 * @time: elapsed time of the scan in jiffies.
4911 *
4912 * This routine is called by the SCSI layer with a SCSI host to determine
4913 * whether the scan host is finished.
4914 *
4915 * Note: there is no scan_start function as adapter initialization will have
4916 * asynchronously kicked off the link initialization.
4917 *
4918 * Return codes
4919 * 0 - SCSI host scan is not over yet.
4920 * 1 - SCSI host scan is over.
4921 **/
lpfc_scan_finished(struct Scsi_Host * shost,unsigned long time)4922 int lpfc_scan_finished(struct Scsi_Host *shost, unsigned long time)
4923 {
4924 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
4925 struct lpfc_hba *phba = vport->phba;
4926 int stat = 0;
4927
4928 spin_lock_irq(shost->host_lock);
4929
4930 if (test_bit(FC_UNLOADING, &vport->load_flag)) {
4931 stat = 1;
4932 goto finished;
4933 }
4934 if (time >= secs_to_jiffies(30)) {
4935 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
4936 "0461 Scanning longer than 30 "
4937 "seconds. Continuing initialization\n");
4938 stat = 1;
4939 goto finished;
4940 }
4941 if (time >= secs_to_jiffies(15) &&
4942 phba->link_state <= LPFC_LINK_DOWN) {
4943 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
4944 "0465 Link down longer than 15 "
4945 "seconds. Continuing initialization\n");
4946 stat = 1;
4947 goto finished;
4948 }
4949
4950 if (vport->port_state != LPFC_VPORT_READY)
4951 goto finished;
4952 if (vport->num_disc_nodes || vport->fc_prli_sent)
4953 goto finished;
4954 if (!atomic_read(&vport->fc_map_cnt) &&
4955 time < secs_to_jiffies(2))
4956 goto finished;
4957 if ((phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) != 0)
4958 goto finished;
4959
4960 stat = 1;
4961
4962 finished:
4963 spin_unlock_irq(shost->host_lock);
4964 return stat;
4965 }
4966
lpfc_host_supported_speeds_set(struct Scsi_Host * shost)4967 static void lpfc_host_supported_speeds_set(struct Scsi_Host *shost)
4968 {
4969 struct lpfc_vport *vport = (struct lpfc_vport *)shost->hostdata;
4970 struct lpfc_hba *phba = vport->phba;
4971
4972 fc_host_supported_speeds(shost) = 0;
4973 /*
4974 * Avoid reporting supported link speed for FCoE as it can't be
4975 * controlled via FCoE.
4976 */
4977 if (test_bit(HBA_FCOE_MODE, &phba->hba_flag))
4978 return;
4979
4980 if (phba->lmt & LMT_256Gb)
4981 fc_host_supported_speeds(shost) |= FC_PORTSPEED_256GBIT;
4982 if (phba->lmt & LMT_128Gb)
4983 fc_host_supported_speeds(shost) |= FC_PORTSPEED_128GBIT;
4984 if (phba->lmt & LMT_64Gb)
4985 fc_host_supported_speeds(shost) |= FC_PORTSPEED_64GBIT;
4986 if (phba->lmt & LMT_32Gb)
4987 fc_host_supported_speeds(shost) |= FC_PORTSPEED_32GBIT;
4988 if (phba->lmt & LMT_16Gb)
4989 fc_host_supported_speeds(shost) |= FC_PORTSPEED_16GBIT;
4990 if (phba->lmt & LMT_10Gb)
4991 fc_host_supported_speeds(shost) |= FC_PORTSPEED_10GBIT;
4992 if (phba->lmt & LMT_8Gb)
4993 fc_host_supported_speeds(shost) |= FC_PORTSPEED_8GBIT;
4994 if (phba->lmt & LMT_4Gb)
4995 fc_host_supported_speeds(shost) |= FC_PORTSPEED_4GBIT;
4996 if (phba->lmt & LMT_2Gb)
4997 fc_host_supported_speeds(shost) |= FC_PORTSPEED_2GBIT;
4998 if (phba->lmt & LMT_1Gb)
4999 fc_host_supported_speeds(shost) |= FC_PORTSPEED_1GBIT;
5000 }
5001
5002 /**
5003 * lpfc_host_attrib_init - Initialize SCSI host attributes on a FC port
5004 * @shost: pointer to SCSI host data structure.
5005 *
5006 * This routine initializes a given SCSI host attributes on a FC port. The
5007 * SCSI host can be either on top of a physical port or a virtual port.
5008 **/
lpfc_host_attrib_init(struct Scsi_Host * shost)5009 void lpfc_host_attrib_init(struct Scsi_Host *shost)
5010 {
5011 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
5012 struct lpfc_hba *phba = vport->phba;
5013 /*
5014 * Set fixed host attributes. Must done after lpfc_sli_hba_setup().
5015 */
5016
5017 fc_host_node_name(shost) = wwn_to_u64(vport->fc_nodename.u.wwn);
5018 fc_host_port_name(shost) = wwn_to_u64(vport->fc_portname.u.wwn);
5019 fc_host_supported_classes(shost) = FC_COS_CLASS3;
5020
5021 memset(fc_host_supported_fc4s(shost), 0,
5022 sizeof(fc_host_supported_fc4s(shost)));
5023 fc_host_supported_fc4s(shost)[2] = 1;
5024 fc_host_supported_fc4s(shost)[7] = 1;
5025
5026 lpfc_vport_symbolic_node_name(vport, fc_host_symbolic_name(shost),
5027 sizeof fc_host_symbolic_name(shost));
5028
5029 lpfc_host_supported_speeds_set(shost);
5030
5031 fc_host_maxframe_size(shost) =
5032 (((uint32_t) vport->fc_sparam.cmn.bbRcvSizeMsb & 0x0F) << 8) |
5033 (uint32_t) vport->fc_sparam.cmn.bbRcvSizeLsb;
5034
5035 fc_host_dev_loss_tmo(shost) = vport->cfg_devloss_tmo;
5036
5037 /* This value is also unchanging */
5038 memset(fc_host_active_fc4s(shost), 0,
5039 sizeof(fc_host_active_fc4s(shost)));
5040 fc_host_active_fc4s(shost)[2] = 1;
5041 fc_host_active_fc4s(shost)[7] = 1;
5042
5043 fc_host_max_npiv_vports(shost) = phba->max_vpi;
5044 clear_bit(FC_LOADING, &vport->load_flag);
5045 }
5046
5047 /**
5048 * lpfc_stop_port_s3 - Stop SLI3 device port
5049 * @phba: pointer to lpfc hba data structure.
5050 *
5051 * This routine is invoked to stop an SLI3 device port, it stops the device
5052 * from generating interrupts and stops the device driver's timers for the
5053 * device.
5054 **/
5055 static void
lpfc_stop_port_s3(struct lpfc_hba * phba)5056 lpfc_stop_port_s3(struct lpfc_hba *phba)
5057 {
5058 /* Clear all interrupt enable conditions */
5059 writel(0, phba->HCregaddr);
5060 readl(phba->HCregaddr); /* flush */
5061 /* Clear all pending interrupts */
5062 writel(0xffffffff, phba->HAregaddr);
5063 readl(phba->HAregaddr); /* flush */
5064
5065 /* Reset some HBA SLI setup states */
5066 lpfc_stop_hba_timers(phba);
5067 phba->pport->work_port_events = 0;
5068 }
5069
5070 /**
5071 * lpfc_stop_port_s4 - Stop SLI4 device port
5072 * @phba: pointer to lpfc hba data structure.
5073 *
5074 * This routine is invoked to stop an SLI4 device port, it stops the device
5075 * from generating interrupts and stops the device driver's timers for the
5076 * device.
5077 **/
5078 static void
lpfc_stop_port_s4(struct lpfc_hba * phba)5079 lpfc_stop_port_s4(struct lpfc_hba *phba)
5080 {
5081 /* Reset some HBA SLI4 setup states */
5082 lpfc_stop_hba_timers(phba);
5083 if (phba->pport)
5084 phba->pport->work_port_events = 0;
5085 phba->sli4_hba.intr_enable = 0;
5086 }
5087
5088 /**
5089 * lpfc_stop_port - Wrapper function for stopping hba port
5090 * @phba: Pointer to HBA context object.
5091 *
5092 * This routine wraps the actual SLI3 or SLI4 hba stop port routine from
5093 * the API jump table function pointer from the lpfc_hba struct.
5094 **/
5095 void
lpfc_stop_port(struct lpfc_hba * phba)5096 lpfc_stop_port(struct lpfc_hba *phba)
5097 {
5098 phba->lpfc_stop_port(phba);
5099
5100 if (phba->wq)
5101 flush_workqueue(phba->wq);
5102 }
5103
5104 /**
5105 * lpfc_fcf_redisc_wait_start_timer - Start fcf rediscover wait timer
5106 * @phba: Pointer to hba for which this call is being executed.
5107 *
5108 * This routine starts the timer waiting for the FCF rediscovery to complete.
5109 **/
5110 void
lpfc_fcf_redisc_wait_start_timer(struct lpfc_hba * phba)5111 lpfc_fcf_redisc_wait_start_timer(struct lpfc_hba *phba)
5112 {
5113 unsigned long fcf_redisc_wait_tmo =
5114 (jiffies + msecs_to_jiffies(LPFC_FCF_REDISCOVER_WAIT_TMO));
5115 /* Start fcf rediscovery wait period timer */
5116 mod_timer(&phba->fcf.redisc_wait, fcf_redisc_wait_tmo);
5117 spin_lock_irq(&phba->hbalock);
5118 /* Allow action to new fcf asynchronous event */
5119 phba->fcf.fcf_flag &= ~(FCF_AVAILABLE | FCF_SCAN_DONE);
5120 /* Mark the FCF rediscovery pending state */
5121 phba->fcf.fcf_flag |= FCF_REDISC_PEND;
5122 spin_unlock_irq(&phba->hbalock);
5123 }
5124
5125 /**
5126 * lpfc_sli4_fcf_redisc_wait_tmo - FCF table rediscover wait timeout
5127 * @t: Timer context used to obtain the pointer to lpfc hba data structure.
5128 *
5129 * This routine is invoked when waiting for FCF table rediscover has been
5130 * timed out. If new FCF record(s) has (have) been discovered during the
5131 * wait period, a new FCF event shall be added to the FCOE async event
5132 * list, and then worker thread shall be waked up for processing from the
5133 * worker thread context.
5134 **/
5135 static void
lpfc_sli4_fcf_redisc_wait_tmo(struct timer_list * t)5136 lpfc_sli4_fcf_redisc_wait_tmo(struct timer_list *t)
5137 {
5138 struct lpfc_hba *phba = timer_container_of(phba, t, fcf.redisc_wait);
5139
5140 /* Don't send FCF rediscovery event if timer cancelled */
5141 spin_lock_irq(&phba->hbalock);
5142 if (!(phba->fcf.fcf_flag & FCF_REDISC_PEND)) {
5143 spin_unlock_irq(&phba->hbalock);
5144 return;
5145 }
5146 /* Clear FCF rediscovery timer pending flag */
5147 phba->fcf.fcf_flag &= ~FCF_REDISC_PEND;
5148 /* FCF rediscovery event to worker thread */
5149 phba->fcf.fcf_flag |= FCF_REDISC_EVT;
5150 spin_unlock_irq(&phba->hbalock);
5151 lpfc_printf_log(phba, KERN_INFO, LOG_FIP,
5152 "2776 FCF rediscover quiescent timer expired\n");
5153 /* wake up worker thread */
5154 lpfc_worker_wake_up(phba);
5155 }
5156
5157 /**
5158 * lpfc_vmid_poll - VMID timeout detection
5159 * @t: Timer context used to obtain the pointer to lpfc hba data structure.
5160 *
5161 * This routine is invoked when there is no I/O on by a VM for the specified
5162 * amount of time. When this situation is detected, the VMID has to be
5163 * deregistered from the switch and all the local resources freed. The VMID
5164 * will be reassigned to the VM once the I/O begins.
5165 **/
5166 static void
lpfc_vmid_poll(struct timer_list * t)5167 lpfc_vmid_poll(struct timer_list *t)
5168 {
5169 struct lpfc_hba *phba = timer_container_of(phba, t,
5170 inactive_vmid_poll);
5171 u32 wake_up = 0;
5172
5173 /* check if there is a need to issue QFPA */
5174 if (phba->pport->vmid_priority_tagging) {
5175 wake_up = 1;
5176 phba->pport->work_port_events |= WORKER_CHECK_VMID_ISSUE_QFPA;
5177 }
5178
5179 /* Is the vmid inactivity timer enabled */
5180 if (phba->pport->vmid_inactivity_timeout ||
5181 test_bit(FC_DEREGISTER_ALL_APP_ID, &phba->pport->load_flag)) {
5182 wake_up = 1;
5183 phba->pport->work_port_events |= WORKER_CHECK_INACTIVE_VMID;
5184 }
5185
5186 if (wake_up)
5187 lpfc_worker_wake_up(phba);
5188
5189 /* restart the timer for the next iteration */
5190 mod_timer(&phba->inactive_vmid_poll,
5191 jiffies + secs_to_jiffies(LPFC_VMID_TIMER));
5192 }
5193
5194 /**
5195 * lpfc_sli4_parse_latt_fault - Parse sli4 link-attention link fault code
5196 * @phba: pointer to lpfc hba data structure.
5197 * @acqe_link: pointer to the async link completion queue entry.
5198 *
5199 * This routine is to parse the SLI4 link-attention link fault code.
5200 **/
5201 static void
lpfc_sli4_parse_latt_fault(struct lpfc_hba * phba,struct lpfc_acqe_link * acqe_link)5202 lpfc_sli4_parse_latt_fault(struct lpfc_hba *phba,
5203 struct lpfc_acqe_link *acqe_link)
5204 {
5205 switch (bf_get(lpfc_acqe_fc_la_att_type, acqe_link)) {
5206 case LPFC_FC_LA_TYPE_LINK_DOWN:
5207 case LPFC_FC_LA_TYPE_TRUNKING_EVENT:
5208 case LPFC_FC_LA_TYPE_ACTIVATE_FAIL:
5209 case LPFC_FC_LA_TYPE_LINK_RESET_PRTCL_EVT:
5210 break;
5211 default:
5212 switch (bf_get(lpfc_acqe_link_fault, acqe_link)) {
5213 case LPFC_ASYNC_LINK_FAULT_NONE:
5214 case LPFC_ASYNC_LINK_FAULT_LOCAL:
5215 case LPFC_ASYNC_LINK_FAULT_REMOTE:
5216 case LPFC_ASYNC_LINK_FAULT_LR_LRR:
5217 break;
5218 default:
5219 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
5220 "0398 Unknown link fault code: x%x\n",
5221 bf_get(lpfc_acqe_link_fault, acqe_link));
5222 break;
5223 }
5224 break;
5225 }
5226 }
5227
5228 /**
5229 * lpfc_sli4_parse_latt_type - Parse sli4 link attention type
5230 * @phba: pointer to lpfc hba data structure.
5231 * @acqe_link: pointer to the async link completion queue entry.
5232 *
5233 * This routine is to parse the SLI4 link attention type and translate it
5234 * into the base driver's link attention type coding.
5235 *
5236 * Return: Link attention type in terms of base driver's coding.
5237 **/
5238 static uint8_t
lpfc_sli4_parse_latt_type(struct lpfc_hba * phba,struct lpfc_acqe_link * acqe_link)5239 lpfc_sli4_parse_latt_type(struct lpfc_hba *phba,
5240 struct lpfc_acqe_link *acqe_link)
5241 {
5242 uint8_t att_type;
5243
5244 switch (bf_get(lpfc_acqe_link_status, acqe_link)) {
5245 case LPFC_ASYNC_LINK_STATUS_DOWN:
5246 case LPFC_ASYNC_LINK_STATUS_LOGICAL_DOWN:
5247 att_type = LPFC_ATT_LINK_DOWN;
5248 break;
5249 case LPFC_ASYNC_LINK_STATUS_UP:
5250 /* Ignore physical link up events - wait for logical link up */
5251 att_type = LPFC_ATT_RESERVED;
5252 break;
5253 case LPFC_ASYNC_LINK_STATUS_LOGICAL_UP:
5254 att_type = LPFC_ATT_LINK_UP;
5255 break;
5256 default:
5257 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
5258 "0399 Invalid link attention type: x%x\n",
5259 bf_get(lpfc_acqe_link_status, acqe_link));
5260 att_type = LPFC_ATT_RESERVED;
5261 break;
5262 }
5263 return att_type;
5264 }
5265
5266 /**
5267 * lpfc_sli_port_speed_get - Get sli3 link speed code to link speed
5268 * @phba: pointer to lpfc hba data structure.
5269 *
5270 * This routine is to get an SLI3 FC port's link speed in Mbps.
5271 *
5272 * Return: link speed in terms of Mbps.
5273 **/
5274 uint32_t
lpfc_sli_port_speed_get(struct lpfc_hba * phba)5275 lpfc_sli_port_speed_get(struct lpfc_hba *phba)
5276 {
5277 uint32_t link_speed;
5278
5279 if (!lpfc_is_link_up(phba))
5280 return 0;
5281
5282 if (phba->sli_rev <= LPFC_SLI_REV3) {
5283 switch (phba->fc_linkspeed) {
5284 case LPFC_LINK_SPEED_1GHZ:
5285 link_speed = 1000;
5286 break;
5287 case LPFC_LINK_SPEED_2GHZ:
5288 link_speed = 2000;
5289 break;
5290 case LPFC_LINK_SPEED_4GHZ:
5291 link_speed = 4000;
5292 break;
5293 case LPFC_LINK_SPEED_8GHZ:
5294 link_speed = 8000;
5295 break;
5296 case LPFC_LINK_SPEED_10GHZ:
5297 link_speed = 10000;
5298 break;
5299 case LPFC_LINK_SPEED_16GHZ:
5300 link_speed = 16000;
5301 break;
5302 default:
5303 link_speed = 0;
5304 }
5305 } else {
5306 if (phba->sli4_hba.link_state.logical_speed)
5307 link_speed =
5308 phba->sli4_hba.link_state.logical_speed;
5309 else
5310 link_speed = phba->sli4_hba.link_state.speed;
5311 }
5312 return link_speed;
5313 }
5314
5315 /**
5316 * lpfc_sli4_port_speed_parse - Parse async evt link speed code to link speed
5317 * @phba: pointer to lpfc hba data structure.
5318 * @evt_code: asynchronous event code.
5319 * @speed_code: asynchronous event link speed code.
5320 *
5321 * This routine is to parse the giving SLI4 async event link speed code into
5322 * value of Mbps for the link speed.
5323 *
5324 * Return: link speed in terms of Mbps.
5325 **/
5326 static uint32_t
lpfc_sli4_port_speed_parse(struct lpfc_hba * phba,uint32_t evt_code,uint8_t speed_code)5327 lpfc_sli4_port_speed_parse(struct lpfc_hba *phba, uint32_t evt_code,
5328 uint8_t speed_code)
5329 {
5330 uint32_t port_speed;
5331
5332 switch (evt_code) {
5333 case LPFC_TRAILER_CODE_LINK:
5334 switch (speed_code) {
5335 case LPFC_ASYNC_LINK_SPEED_ZERO:
5336 port_speed = 0;
5337 break;
5338 case LPFC_ASYNC_LINK_SPEED_10MBPS:
5339 port_speed = 10;
5340 break;
5341 case LPFC_ASYNC_LINK_SPEED_100MBPS:
5342 port_speed = 100;
5343 break;
5344 case LPFC_ASYNC_LINK_SPEED_1GBPS:
5345 port_speed = 1000;
5346 break;
5347 case LPFC_ASYNC_LINK_SPEED_10GBPS:
5348 port_speed = 10000;
5349 break;
5350 case LPFC_ASYNC_LINK_SPEED_20GBPS:
5351 port_speed = 20000;
5352 break;
5353 case LPFC_ASYNC_LINK_SPEED_25GBPS:
5354 port_speed = 25000;
5355 break;
5356 case LPFC_ASYNC_LINK_SPEED_40GBPS:
5357 port_speed = 40000;
5358 break;
5359 case LPFC_ASYNC_LINK_SPEED_100GBPS:
5360 port_speed = 100000;
5361 break;
5362 default:
5363 port_speed = 0;
5364 }
5365 break;
5366 case LPFC_TRAILER_CODE_FC:
5367 switch (speed_code) {
5368 case LPFC_FC_LA_SPEED_UNKNOWN:
5369 port_speed = 0;
5370 break;
5371 case LPFC_FC_LA_SPEED_1G:
5372 port_speed = 1000;
5373 break;
5374 case LPFC_FC_LA_SPEED_2G:
5375 port_speed = 2000;
5376 break;
5377 case LPFC_FC_LA_SPEED_4G:
5378 port_speed = 4000;
5379 break;
5380 case LPFC_FC_LA_SPEED_8G:
5381 port_speed = 8000;
5382 break;
5383 case LPFC_FC_LA_SPEED_10G:
5384 port_speed = 10000;
5385 break;
5386 case LPFC_FC_LA_SPEED_16G:
5387 port_speed = 16000;
5388 break;
5389 case LPFC_FC_LA_SPEED_32G:
5390 port_speed = 32000;
5391 break;
5392 case LPFC_FC_LA_SPEED_64G:
5393 port_speed = 64000;
5394 break;
5395 case LPFC_FC_LA_SPEED_128G:
5396 port_speed = 128000;
5397 break;
5398 case LPFC_FC_LA_SPEED_256G:
5399 port_speed = 256000;
5400 break;
5401 default:
5402 port_speed = 0;
5403 }
5404 break;
5405 default:
5406 port_speed = 0;
5407 }
5408 return port_speed;
5409 }
5410
5411 /**
5412 * lpfc_sli4_async_link_evt - Process the asynchronous FCoE link event
5413 * @phba: pointer to lpfc hba data structure.
5414 * @acqe_link: pointer to the async link completion queue entry.
5415 *
5416 * This routine is to handle the SLI4 asynchronous FCoE link event.
5417 **/
5418 static void
lpfc_sli4_async_link_evt(struct lpfc_hba * phba,struct lpfc_acqe_link * acqe_link)5419 lpfc_sli4_async_link_evt(struct lpfc_hba *phba,
5420 struct lpfc_acqe_link *acqe_link)
5421 {
5422 LPFC_MBOXQ_t *pmb;
5423 MAILBOX_t *mb;
5424 struct lpfc_mbx_read_top *la;
5425 uint8_t att_type;
5426 int rc;
5427
5428 att_type = lpfc_sli4_parse_latt_type(phba, acqe_link);
5429 if (att_type != LPFC_ATT_LINK_DOWN && att_type != LPFC_ATT_LINK_UP)
5430 return;
5431 phba->fcoe_eventtag = acqe_link->event_tag;
5432 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
5433 if (!pmb) {
5434 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
5435 "0395 The mboxq allocation failed\n");
5436 return;
5437 }
5438
5439 rc = lpfc_mbox_rsrc_prep(phba, pmb);
5440 if (rc) {
5441 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
5442 "0396 mailbox allocation failed\n");
5443 goto out_free_pmb;
5444 }
5445
5446 /* Cleanup any outstanding ELS commands */
5447 lpfc_els_flush_all_cmd(phba);
5448
5449 /* Block ELS IOCBs until we have done process link event */
5450 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
5451
5452 /* Update link event statistics */
5453 phba->sli.slistat.link_event++;
5454
5455 /* Create lpfc_handle_latt mailbox command from link ACQE */
5456 lpfc_read_topology(phba, pmb, pmb->ctx_buf);
5457 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
5458 pmb->vport = phba->pport;
5459
5460 /* Keep the link status for extra SLI4 state machine reference */
5461 phba->sli4_hba.link_state.speed =
5462 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_LINK,
5463 bf_get(lpfc_acqe_link_speed, acqe_link));
5464 phba->sli4_hba.link_state.duplex =
5465 bf_get(lpfc_acqe_link_duplex, acqe_link);
5466 phba->sli4_hba.link_state.status =
5467 bf_get(lpfc_acqe_link_status, acqe_link);
5468 phba->sli4_hba.link_state.type =
5469 bf_get(lpfc_acqe_link_type, acqe_link);
5470 phba->sli4_hba.link_state.number =
5471 bf_get(lpfc_acqe_link_number, acqe_link);
5472 phba->sli4_hba.link_state.fault =
5473 bf_get(lpfc_acqe_link_fault, acqe_link);
5474 phba->sli4_hba.link_state.logical_speed =
5475 bf_get(lpfc_acqe_logical_link_speed, acqe_link) * 10;
5476
5477 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
5478 "2900 Async FC/FCoE Link event - Speed:%dGBit "
5479 "duplex:x%x LA Type:x%x Port Type:%d Port Number:%d "
5480 "Logical speed:%dMbps Fault:%d\n",
5481 phba->sli4_hba.link_state.speed,
5482 phba->sli4_hba.link_state.topology,
5483 phba->sli4_hba.link_state.status,
5484 phba->sli4_hba.link_state.type,
5485 phba->sli4_hba.link_state.number,
5486 phba->sli4_hba.link_state.logical_speed,
5487 phba->sli4_hba.link_state.fault);
5488 /*
5489 * For FC Mode: issue the READ_TOPOLOGY mailbox command to fetch
5490 * topology info. Note: Optional for non FC-AL ports.
5491 */
5492 if (!test_bit(HBA_FCOE_MODE, &phba->hba_flag)) {
5493 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
5494 if (rc == MBX_NOT_FINISHED)
5495 goto out_free_pmb;
5496 return;
5497 }
5498 /*
5499 * For FCoE Mode: fill in all the topology information we need and call
5500 * the READ_TOPOLOGY completion routine to continue without actually
5501 * sending the READ_TOPOLOGY mailbox command to the port.
5502 */
5503 /* Initialize completion status */
5504 mb = &pmb->u.mb;
5505 mb->mbxStatus = MBX_SUCCESS;
5506
5507 /* Parse port fault information field */
5508 lpfc_sli4_parse_latt_fault(phba, acqe_link);
5509
5510 /* Parse and translate link attention fields */
5511 la = (struct lpfc_mbx_read_top *) &pmb->u.mb.un.varReadTop;
5512 la->eventTag = acqe_link->event_tag;
5513 bf_set(lpfc_mbx_read_top_att_type, la, att_type);
5514 bf_set(lpfc_mbx_read_top_link_spd, la,
5515 (bf_get(lpfc_acqe_link_speed, acqe_link)));
5516
5517 /* Fake the following irrelevant fields */
5518 bf_set(lpfc_mbx_read_top_topology, la, LPFC_TOPOLOGY_PT_PT);
5519 bf_set(lpfc_mbx_read_top_alpa_granted, la, 0);
5520 bf_set(lpfc_mbx_read_top_il, la, 0);
5521 bf_set(lpfc_mbx_read_top_pb, la, 0);
5522 bf_set(lpfc_mbx_read_top_fa, la, 0);
5523 bf_set(lpfc_mbx_read_top_mm, la, 0);
5524
5525 /* Invoke the lpfc_handle_latt mailbox command callback function */
5526 lpfc_mbx_cmpl_read_topology(phba, pmb);
5527
5528 return;
5529
5530 out_free_pmb:
5531 lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED);
5532 }
5533
5534 /**
5535 * lpfc_async_link_speed_to_read_top - Parse async evt link speed code to read
5536 * topology.
5537 * @phba: pointer to lpfc hba data structure.
5538 * @speed_code: asynchronous event link speed code.
5539 *
5540 * This routine is to parse the giving SLI4 async event link speed code into
5541 * value of Read topology link speed.
5542 *
5543 * Return: link speed in terms of Read topology.
5544 **/
5545 static uint8_t
lpfc_async_link_speed_to_read_top(struct lpfc_hba * phba,uint8_t speed_code)5546 lpfc_async_link_speed_to_read_top(struct lpfc_hba *phba, uint8_t speed_code)
5547 {
5548 uint8_t port_speed;
5549
5550 switch (speed_code) {
5551 case LPFC_FC_LA_SPEED_1G:
5552 port_speed = LPFC_LINK_SPEED_1GHZ;
5553 break;
5554 case LPFC_FC_LA_SPEED_2G:
5555 port_speed = LPFC_LINK_SPEED_2GHZ;
5556 break;
5557 case LPFC_FC_LA_SPEED_4G:
5558 port_speed = LPFC_LINK_SPEED_4GHZ;
5559 break;
5560 case LPFC_FC_LA_SPEED_8G:
5561 port_speed = LPFC_LINK_SPEED_8GHZ;
5562 break;
5563 case LPFC_FC_LA_SPEED_16G:
5564 port_speed = LPFC_LINK_SPEED_16GHZ;
5565 break;
5566 case LPFC_FC_LA_SPEED_32G:
5567 port_speed = LPFC_LINK_SPEED_32GHZ;
5568 break;
5569 case LPFC_FC_LA_SPEED_64G:
5570 port_speed = LPFC_LINK_SPEED_64GHZ;
5571 break;
5572 case LPFC_FC_LA_SPEED_128G:
5573 port_speed = LPFC_LINK_SPEED_128GHZ;
5574 break;
5575 case LPFC_FC_LA_SPEED_256G:
5576 port_speed = LPFC_LINK_SPEED_256GHZ;
5577 break;
5578 default:
5579 port_speed = 0;
5580 break;
5581 }
5582
5583 return port_speed;
5584 }
5585
5586 void
lpfc_cgn_dump_rxmonitor(struct lpfc_hba * phba)5587 lpfc_cgn_dump_rxmonitor(struct lpfc_hba *phba)
5588 {
5589 if (!phba->rx_monitor) {
5590 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
5591 "4411 Rx Monitor Info is empty.\n");
5592 } else {
5593 lpfc_rx_monitor_report(phba, phba->rx_monitor, NULL, 0,
5594 LPFC_MAX_RXMONITOR_DUMP);
5595 }
5596 }
5597
5598 /**
5599 * lpfc_cgn_update_stat - Save data into congestion stats buffer
5600 * @phba: pointer to lpfc hba data structure.
5601 * @dtag: FPIN descriptor received
5602 *
5603 * Increment the FPIN received counter/time when it happens.
5604 */
5605 void
lpfc_cgn_update_stat(struct lpfc_hba * phba,uint32_t dtag)5606 lpfc_cgn_update_stat(struct lpfc_hba *phba, uint32_t dtag)
5607 {
5608 struct lpfc_cgn_info *cp;
5609 u32 value;
5610
5611 /* Make sure we have a congestion info buffer */
5612 if (!phba->cgn_i)
5613 return;
5614 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt;
5615
5616 /* Update congestion statistics */
5617 switch (dtag) {
5618 case ELS_DTAG_LNK_INTEGRITY:
5619 le32_add_cpu(&cp->link_integ_notification, 1);
5620 lpfc_cgn_update_tstamp(phba, &cp->stat_lnk);
5621 break;
5622 case ELS_DTAG_DELIVERY:
5623 le32_add_cpu(&cp->delivery_notification, 1);
5624 lpfc_cgn_update_tstamp(phba, &cp->stat_delivery);
5625 break;
5626 case ELS_DTAG_PEER_CONGEST:
5627 le32_add_cpu(&cp->cgn_peer_notification, 1);
5628 lpfc_cgn_update_tstamp(phba, &cp->stat_peer);
5629 break;
5630 case ELS_DTAG_CONGESTION:
5631 le32_add_cpu(&cp->cgn_notification, 1);
5632 lpfc_cgn_update_tstamp(phba, &cp->stat_fpin);
5633 }
5634 if (phba->cgn_fpin_frequency &&
5635 phba->cgn_fpin_frequency != LPFC_FPIN_INIT_FREQ) {
5636 value = LPFC_CGN_TIMER_TO_MIN / phba->cgn_fpin_frequency;
5637 cp->cgn_stat_npm = value;
5638 }
5639
5640 value = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ,
5641 LPFC_CGN_CRC32_SEED);
5642 cp->cgn_info_crc = cpu_to_le32(value);
5643 }
5644
5645 /**
5646 * lpfc_cgn_update_tstamp - Update cmf timestamp
5647 * @phba: pointer to lpfc hba data structure.
5648 * @ts: structure to write the timestamp to.
5649 */
5650 void
lpfc_cgn_update_tstamp(struct lpfc_hba * phba,struct lpfc_cgn_ts * ts)5651 lpfc_cgn_update_tstamp(struct lpfc_hba *phba, struct lpfc_cgn_ts *ts)
5652 {
5653 struct timespec64 cur_time;
5654 struct tm tm_val;
5655
5656 ktime_get_real_ts64(&cur_time);
5657 time64_to_tm(cur_time.tv_sec, 0, &tm_val);
5658
5659 ts->month = tm_val.tm_mon + 1;
5660 ts->day = tm_val.tm_mday;
5661 ts->year = tm_val.tm_year - 100;
5662 ts->hour = tm_val.tm_hour;
5663 ts->minute = tm_val.tm_min;
5664 ts->second = tm_val.tm_sec;
5665
5666 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
5667 "2646 Updated CMF timestamp : "
5668 "%u/%u/%u %u:%u:%u\n",
5669 ts->day, ts->month,
5670 ts->year, ts->hour,
5671 ts->minute, ts->second);
5672 }
5673
5674 /**
5675 * lpfc_cmf_stats_timer - Save data into registered congestion buffer
5676 * @timer: Timer cookie to access lpfc private data
5677 *
5678 * Save the congestion event data every minute.
5679 * On the hour collapse all the minute data into hour data. Every day
5680 * collapse all the hour data into daily data. Separate driver
5681 * and fabrc congestion event counters that will be saved out
5682 * to the registered congestion buffer every minute.
5683 */
5684 static enum hrtimer_restart
lpfc_cmf_stats_timer(struct hrtimer * timer)5685 lpfc_cmf_stats_timer(struct hrtimer *timer)
5686 {
5687 struct lpfc_hba *phba;
5688 struct lpfc_cgn_info *cp;
5689 uint32_t i, index;
5690 uint16_t value, mvalue;
5691 uint64_t bps;
5692 uint32_t mbps;
5693 uint32_t dvalue, wvalue, lvalue, avalue;
5694 uint64_t latsum;
5695 __le16 *ptr;
5696 __le32 *lptr;
5697 __le16 *mptr;
5698
5699 phba = container_of(timer, struct lpfc_hba, cmf_stats_timer);
5700 /* Make sure we have a congestion info buffer */
5701 if (!phba->cgn_i)
5702 return HRTIMER_NORESTART;
5703 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt;
5704
5705 phba->cgn_evt_timestamp = jiffies +
5706 msecs_to_jiffies(LPFC_CGN_TIMER_TO_MIN);
5707 phba->cgn_evt_minute++;
5708
5709 /* We should get to this point in the routine on 1 minute intervals */
5710 lpfc_cgn_update_tstamp(phba, &cp->base_time);
5711
5712 if (phba->cgn_fpin_frequency &&
5713 phba->cgn_fpin_frequency != LPFC_FPIN_INIT_FREQ) {
5714 value = LPFC_CGN_TIMER_TO_MIN / phba->cgn_fpin_frequency;
5715 cp->cgn_stat_npm = value;
5716 }
5717
5718 /* Read and clear the latency counters for this minute */
5719 lvalue = atomic_read(&phba->cgn_latency_evt_cnt);
5720 latsum = atomic64_read(&phba->cgn_latency_evt);
5721 atomic_set(&phba->cgn_latency_evt_cnt, 0);
5722 atomic64_set(&phba->cgn_latency_evt, 0);
5723
5724 /* We need to store MB/sec bandwidth in the congestion information.
5725 * block_cnt is count of 512 byte blocks for the entire minute,
5726 * bps will get bytes per sec before finally converting to MB/sec.
5727 */
5728 bps = div_u64(phba->rx_block_cnt, LPFC_SEC_MIN) * 512;
5729 phba->rx_block_cnt = 0;
5730 mvalue = bps / (1024 * 1024); /* convert to MB/sec */
5731
5732 /* Every minute */
5733 /* cgn parameters */
5734 cp->cgn_info_mode = phba->cgn_p.cgn_param_mode;
5735 cp->cgn_info_level0 = phba->cgn_p.cgn_param_level0;
5736 cp->cgn_info_level1 = phba->cgn_p.cgn_param_level1;
5737 cp->cgn_info_level2 = phba->cgn_p.cgn_param_level2;
5738
5739 /* Fill in default LUN qdepth */
5740 value = (uint16_t)(phba->pport->cfg_lun_queue_depth);
5741 cp->cgn_lunq = cpu_to_le16(value);
5742
5743 /* Record congestion buffer info - every minute
5744 * cgn_driver_evt_cnt (Driver events)
5745 * cgn_fabric_warn_cnt (Congestion Warnings)
5746 * cgn_latency_evt_cnt / cgn_latency_evt (IO Latency)
5747 * cgn_fabric_alarm_cnt (Congestion Alarms)
5748 */
5749 index = ++cp->cgn_index_minute;
5750 if (cp->cgn_index_minute == LPFC_MIN_HOUR) {
5751 cp->cgn_index_minute = 0;
5752 index = 0;
5753 }
5754
5755 /* Get the number of driver events in this sample and reset counter */
5756 dvalue = atomic_read(&phba->cgn_driver_evt_cnt);
5757 atomic_set(&phba->cgn_driver_evt_cnt, 0);
5758
5759 /* Get the number of warning events - FPIN and Signal for this minute */
5760 wvalue = 0;
5761 if ((phba->cgn_reg_fpin & LPFC_CGN_FPIN_WARN) ||
5762 phba->cgn_reg_signal == EDC_CG_SIG_WARN_ONLY ||
5763 phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM)
5764 wvalue = atomic_read(&phba->cgn_fabric_warn_cnt);
5765 atomic_set(&phba->cgn_fabric_warn_cnt, 0);
5766
5767 /* Get the number of alarm events - FPIN and Signal for this minute */
5768 avalue = 0;
5769 if ((phba->cgn_reg_fpin & LPFC_CGN_FPIN_ALARM) ||
5770 phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM)
5771 avalue = atomic_read(&phba->cgn_fabric_alarm_cnt);
5772 atomic_set(&phba->cgn_fabric_alarm_cnt, 0);
5773
5774 /* Collect the driver, warning, alarm and latency counts for this
5775 * minute into the driver congestion buffer.
5776 */
5777 ptr = &cp->cgn_drvr_min[index];
5778 value = (uint16_t)dvalue;
5779 *ptr = cpu_to_le16(value);
5780
5781 ptr = &cp->cgn_warn_min[index];
5782 value = (uint16_t)wvalue;
5783 *ptr = cpu_to_le16(value);
5784
5785 ptr = &cp->cgn_alarm_min[index];
5786 value = (uint16_t)avalue;
5787 *ptr = cpu_to_le16(value);
5788
5789 lptr = &cp->cgn_latency_min[index];
5790 if (lvalue) {
5791 lvalue = (uint32_t)div_u64(latsum, lvalue);
5792 *lptr = cpu_to_le32(lvalue);
5793 } else {
5794 *lptr = 0;
5795 }
5796
5797 /* Collect the bandwidth value into the driver's congesion buffer. */
5798 mptr = &cp->cgn_bw_min[index];
5799 *mptr = cpu_to_le16(mvalue);
5800
5801 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
5802 "2418 Congestion Info - minute (%d): %d %d %d %d %d\n",
5803 index, dvalue, wvalue, *lptr, mvalue, avalue);
5804
5805 /* Every hour */
5806 if ((phba->cgn_evt_minute % LPFC_MIN_HOUR) == 0) {
5807 /* Record congestion buffer info - every hour
5808 * Collapse all minutes into an hour
5809 */
5810 index = ++cp->cgn_index_hour;
5811 if (cp->cgn_index_hour == LPFC_HOUR_DAY) {
5812 cp->cgn_index_hour = 0;
5813 index = 0;
5814 }
5815
5816 dvalue = 0;
5817 wvalue = 0;
5818 lvalue = 0;
5819 avalue = 0;
5820 mvalue = 0;
5821 mbps = 0;
5822 for (i = 0; i < LPFC_MIN_HOUR; i++) {
5823 dvalue += le16_to_cpu(cp->cgn_drvr_min[i]);
5824 wvalue += le16_to_cpu(cp->cgn_warn_min[i]);
5825 lvalue += le32_to_cpu(cp->cgn_latency_min[i]);
5826 mbps += le16_to_cpu(cp->cgn_bw_min[i]);
5827 avalue += le16_to_cpu(cp->cgn_alarm_min[i]);
5828 }
5829 if (lvalue) /* Avg of latency averages */
5830 lvalue /= LPFC_MIN_HOUR;
5831 if (mbps) /* Avg of Bandwidth averages */
5832 mvalue = mbps / LPFC_MIN_HOUR;
5833
5834 lptr = &cp->cgn_drvr_hr[index];
5835 *lptr = cpu_to_le32(dvalue);
5836 lptr = &cp->cgn_warn_hr[index];
5837 *lptr = cpu_to_le32(wvalue);
5838 lptr = &cp->cgn_latency_hr[index];
5839 *lptr = cpu_to_le32(lvalue);
5840 mptr = &cp->cgn_bw_hr[index];
5841 *mptr = cpu_to_le16(mvalue);
5842 lptr = &cp->cgn_alarm_hr[index];
5843 *lptr = cpu_to_le32(avalue);
5844
5845 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
5846 "2419 Congestion Info - hour "
5847 "(%d): %d %d %d %d %d\n",
5848 index, dvalue, wvalue, lvalue, mvalue, avalue);
5849 }
5850
5851 /* Every day */
5852 if ((phba->cgn_evt_minute % LPFC_MIN_DAY) == 0) {
5853 /* Record congestion buffer info - every hour
5854 * Collapse all hours into a day. Rotate days
5855 * after LPFC_MAX_CGN_DAYS.
5856 */
5857 index = ++cp->cgn_index_day;
5858 if (cp->cgn_index_day == LPFC_MAX_CGN_DAYS) {
5859 cp->cgn_index_day = 0;
5860 index = 0;
5861 }
5862
5863 dvalue = 0;
5864 wvalue = 0;
5865 lvalue = 0;
5866 mvalue = 0;
5867 mbps = 0;
5868 avalue = 0;
5869 for (i = 0; i < LPFC_HOUR_DAY; i++) {
5870 dvalue += le32_to_cpu(cp->cgn_drvr_hr[i]);
5871 wvalue += le32_to_cpu(cp->cgn_warn_hr[i]);
5872 lvalue += le32_to_cpu(cp->cgn_latency_hr[i]);
5873 mbps += le16_to_cpu(cp->cgn_bw_hr[i]);
5874 avalue += le32_to_cpu(cp->cgn_alarm_hr[i]);
5875 }
5876 if (lvalue) /* Avg of latency averages */
5877 lvalue /= LPFC_HOUR_DAY;
5878 if (mbps) /* Avg of Bandwidth averages */
5879 mvalue = mbps / LPFC_HOUR_DAY;
5880
5881 lptr = &cp->cgn_drvr_day[index];
5882 *lptr = cpu_to_le32(dvalue);
5883 lptr = &cp->cgn_warn_day[index];
5884 *lptr = cpu_to_le32(wvalue);
5885 lptr = &cp->cgn_latency_day[index];
5886 *lptr = cpu_to_le32(lvalue);
5887 mptr = &cp->cgn_bw_day[index];
5888 *mptr = cpu_to_le16(mvalue);
5889 lptr = &cp->cgn_alarm_day[index];
5890 *lptr = cpu_to_le32(avalue);
5891
5892 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
5893 "2420 Congestion Info - daily (%d): "
5894 "%d %d %d %d %d\n",
5895 index, dvalue, wvalue, lvalue, mvalue, avalue);
5896 }
5897
5898 /* Use the frequency found in the last rcv'ed FPIN */
5899 value = phba->cgn_fpin_frequency;
5900 cp->cgn_warn_freq = cpu_to_le16(value);
5901 cp->cgn_alarm_freq = cpu_to_le16(value);
5902
5903 lvalue = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ,
5904 LPFC_CGN_CRC32_SEED);
5905 cp->cgn_info_crc = cpu_to_le32(lvalue);
5906
5907 hrtimer_forward_now(timer, ktime_set(0, LPFC_SEC_MIN * NSEC_PER_SEC));
5908
5909 return HRTIMER_RESTART;
5910 }
5911
5912 /**
5913 * lpfc_calc_cmf_latency - latency from start of rxate timer interval
5914 * @phba: The Hba for which this call is being executed.
5915 *
5916 * The routine calculates the latency from the beginning of the CMF timer
5917 * interval to the current point in time. It is called from IO completion
5918 * when we exceed our Bandwidth limitation for the time interval.
5919 */
5920 uint32_t
lpfc_calc_cmf_latency(struct lpfc_hba * phba)5921 lpfc_calc_cmf_latency(struct lpfc_hba *phba)
5922 {
5923 struct timespec64 cmpl_time;
5924 uint32_t msec = 0;
5925
5926 ktime_get_real_ts64(&cmpl_time);
5927
5928 /* This routine works on a ms granularity so sec and usec are
5929 * converted accordingly.
5930 */
5931 if (cmpl_time.tv_sec == phba->cmf_latency.tv_sec) {
5932 msec = (cmpl_time.tv_nsec - phba->cmf_latency.tv_nsec) /
5933 NSEC_PER_MSEC;
5934 } else {
5935 if (cmpl_time.tv_nsec >= phba->cmf_latency.tv_nsec) {
5936 msec = (cmpl_time.tv_sec -
5937 phba->cmf_latency.tv_sec) * MSEC_PER_SEC;
5938 msec += ((cmpl_time.tv_nsec -
5939 phba->cmf_latency.tv_nsec) / NSEC_PER_MSEC);
5940 } else {
5941 msec = (cmpl_time.tv_sec - phba->cmf_latency.tv_sec -
5942 1) * MSEC_PER_SEC;
5943 msec += (((NSEC_PER_SEC - phba->cmf_latency.tv_nsec) +
5944 cmpl_time.tv_nsec) / NSEC_PER_MSEC);
5945 }
5946 }
5947 return msec;
5948 }
5949
5950 /**
5951 * lpfc_cmf_timer - This is the timer function for one congestion
5952 * rate interval.
5953 * @timer: Pointer to the high resolution timer that expired
5954 */
5955 static enum hrtimer_restart
lpfc_cmf_timer(struct hrtimer * timer)5956 lpfc_cmf_timer(struct hrtimer *timer)
5957 {
5958 struct lpfc_hba *phba = container_of(timer, struct lpfc_hba,
5959 cmf_timer);
5960 struct rx_info_entry entry;
5961 uint32_t io_cnt;
5962 uint32_t busy, max_read;
5963 uint64_t total, rcv, lat, mbpi, extra, cnt;
5964 int timer_interval = LPFC_CMF_INTERVAL;
5965 uint32_t ms;
5966 struct lpfc_cgn_stat *cgs;
5967 int cpu;
5968
5969 /* Only restart the timer if congestion mgmt is on */
5970 if (phba->cmf_active_mode == LPFC_CFG_OFF ||
5971 !phba->cmf_latency.tv_sec) {
5972 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
5973 "6224 CMF timer exit: %d %lld\n",
5974 phba->cmf_active_mode,
5975 (uint64_t)phba->cmf_latency.tv_sec);
5976 return HRTIMER_NORESTART;
5977 }
5978
5979 /* If pport is not ready yet, just exit and wait for
5980 * the next timer cycle to hit.
5981 */
5982 if (!phba->pport)
5983 goto skip;
5984
5985 /* Do not block SCSI IO while in the timer routine since
5986 * total_bytes will be cleared
5987 */
5988 atomic_set(&phba->cmf_stop_io, 1);
5989
5990 /* First we need to calculate the actual ms between
5991 * the last timer interrupt and this one. We ask for
5992 * LPFC_CMF_INTERVAL, however the actual time may
5993 * vary depending on system overhead.
5994 */
5995 ms = lpfc_calc_cmf_latency(phba);
5996
5997
5998 /* Immediately after we calculate the time since the last
5999 * timer interrupt, set the start time for the next
6000 * interrupt
6001 */
6002 ktime_get_real_ts64(&phba->cmf_latency);
6003
6004 phba->cmf_link_byte_count =
6005 div_u64(phba->cmf_max_line_rate * LPFC_CMF_INTERVAL, 1000);
6006
6007 /* Collect all the stats from the prior timer interval */
6008 total = 0;
6009 io_cnt = 0;
6010 lat = 0;
6011 rcv = 0;
6012 for_each_present_cpu(cpu) {
6013 cgs = per_cpu_ptr(phba->cmf_stat, cpu);
6014 total += atomic64_xchg(&cgs->total_bytes, 0);
6015 io_cnt += atomic_xchg(&cgs->rx_io_cnt, 0);
6016 lat += atomic64_xchg(&cgs->rx_latency, 0);
6017 rcv += atomic64_xchg(&cgs->rcv_bytes, 0);
6018 }
6019
6020 /* Before we issue another CMF_SYNC_WQE, retrieve the BW
6021 * returned from the last CMF_SYNC_WQE issued, from
6022 * cmf_last_sync_bw. This will be the target BW for
6023 * this next timer interval.
6024 */
6025 if (phba->cmf_active_mode == LPFC_CFG_MANAGED &&
6026 phba->link_state != LPFC_LINK_DOWN &&
6027 test_bit(HBA_SETUP, &phba->hba_flag)) {
6028 mbpi = phba->cmf_last_sync_bw;
6029 phba->cmf_last_sync_bw = 0;
6030 extra = 0;
6031
6032 /* Calculate any extra bytes needed to account for the
6033 * timer accuracy. If we are less than LPFC_CMF_INTERVAL
6034 * calculate the adjustment needed for total to reflect
6035 * a full LPFC_CMF_INTERVAL.
6036 */
6037 if (ms && ms < LPFC_CMF_INTERVAL) {
6038 cnt = div_u64(total, ms); /* bytes per ms */
6039 cnt *= LPFC_CMF_INTERVAL; /* what total should be */
6040 extra = cnt - total;
6041 }
6042 lpfc_issue_cmf_sync_wqe(phba, LPFC_CMF_INTERVAL, total + extra);
6043 } else {
6044 /* For Monitor mode or link down we want mbpi
6045 * to be the full link speed
6046 */
6047 mbpi = phba->cmf_link_byte_count;
6048 extra = 0;
6049 }
6050 phba->cmf_timer_cnt++;
6051
6052 if (io_cnt) {
6053 /* Update congestion info buffer latency in us */
6054 atomic_add(io_cnt, &phba->cgn_latency_evt_cnt);
6055 atomic64_add(lat, &phba->cgn_latency_evt);
6056 }
6057 busy = atomic_xchg(&phba->cmf_busy, 0);
6058 max_read = atomic_xchg(&phba->rx_max_read_cnt, 0);
6059
6060 /* Calculate MBPI for the next timer interval */
6061 if (mbpi) {
6062 if (mbpi > phba->cmf_link_byte_count ||
6063 phba->cmf_active_mode == LPFC_CFG_MONITOR)
6064 mbpi = phba->cmf_link_byte_count;
6065
6066 /* Change max_bytes_per_interval to what the prior
6067 * CMF_SYNC_WQE cmpl indicated.
6068 */
6069 if (mbpi != phba->cmf_max_bytes_per_interval)
6070 phba->cmf_max_bytes_per_interval = mbpi;
6071 }
6072
6073 /* Save rxmonitor information for debug */
6074 if (phba->rx_monitor) {
6075 entry.total_bytes = total;
6076 entry.cmf_bytes = total + extra;
6077 entry.rcv_bytes = rcv;
6078 entry.cmf_busy = busy;
6079 entry.cmf_info = phba->cmf_active_info;
6080 if (io_cnt) {
6081 entry.avg_io_latency = div_u64(lat, io_cnt);
6082 entry.avg_io_size = div_u64(rcv, io_cnt);
6083 } else {
6084 entry.avg_io_latency = 0;
6085 entry.avg_io_size = 0;
6086 }
6087 entry.max_read_cnt = max_read;
6088 entry.io_cnt = io_cnt;
6089 entry.max_bytes_per_interval = mbpi;
6090 if (phba->cmf_active_mode == LPFC_CFG_MANAGED)
6091 entry.timer_utilization = phba->cmf_last_ts;
6092 else
6093 entry.timer_utilization = ms;
6094 entry.timer_interval = ms;
6095 phba->cmf_last_ts = 0;
6096
6097 lpfc_rx_monitor_record(phba->rx_monitor, &entry);
6098 }
6099
6100 if (phba->cmf_active_mode == LPFC_CFG_MONITOR) {
6101 /* If Monitor mode, check if we are oversubscribed
6102 * against the full line rate.
6103 */
6104 if (mbpi && total > mbpi)
6105 atomic_inc(&phba->cgn_driver_evt_cnt);
6106 }
6107 phba->rx_block_cnt += div_u64(rcv, 512); /* save 512 byte block cnt */
6108
6109 /* Since total_bytes has already been zero'ed, its okay to unblock
6110 * after max_bytes_per_interval is setup.
6111 */
6112 if (atomic_xchg(&phba->cmf_bw_wait, 0))
6113 queue_work(phba->wq, &phba->unblock_request_work);
6114
6115 /* SCSI IO is now unblocked */
6116 atomic_set(&phba->cmf_stop_io, 0);
6117
6118 skip:
6119 hrtimer_forward_now(timer,
6120 ktime_set(0, timer_interval * NSEC_PER_MSEC));
6121 return HRTIMER_RESTART;
6122 }
6123
6124 #define trunk_link_status(__idx)\
6125 bf_get(lpfc_acqe_fc_la_trunk_config_port##__idx, acqe_fc) ?\
6126 ((phba->trunk_link.link##__idx.state == LPFC_LINK_UP) ?\
6127 "Link up" : "Link down") : "NA"
6128 /* Did port __idx reported an error */
6129 #define trunk_port_fault(__idx)\
6130 bf_get(lpfc_acqe_fc_la_trunk_config_port##__idx, acqe_fc) ?\
6131 (port_fault & (1 << __idx) ? "YES" : "NO") : "NA"
6132
6133 static void
lpfc_update_trunk_link_status(struct lpfc_hba * phba,struct lpfc_acqe_fc_la * acqe_fc)6134 lpfc_update_trunk_link_status(struct lpfc_hba *phba,
6135 struct lpfc_acqe_fc_la *acqe_fc)
6136 {
6137 uint8_t port_fault = bf_get(lpfc_acqe_fc_la_trunk_linkmask, acqe_fc);
6138 uint8_t err = bf_get(lpfc_acqe_fc_la_trunk_fault, acqe_fc);
6139 u8 cnt = 0;
6140
6141 phba->sli4_hba.link_state.speed =
6142 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC,
6143 bf_get(lpfc_acqe_fc_la_speed, acqe_fc));
6144
6145 phba->sli4_hba.link_state.logical_speed =
6146 bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10;
6147 /* We got FC link speed, convert to fc_linkspeed (READ_TOPOLOGY) */
6148 phba->fc_linkspeed =
6149 lpfc_async_link_speed_to_read_top(
6150 phba,
6151 bf_get(lpfc_acqe_fc_la_speed, acqe_fc));
6152
6153 if (bf_get(lpfc_acqe_fc_la_trunk_config_port0, acqe_fc)) {
6154 phba->trunk_link.link0.state =
6155 bf_get(lpfc_acqe_fc_la_trunk_link_status_port0, acqe_fc)
6156 ? LPFC_LINK_UP : LPFC_LINK_DOWN;
6157 phba->trunk_link.link0.fault = port_fault & 0x1 ? err : 0;
6158 cnt++;
6159 }
6160 if (bf_get(lpfc_acqe_fc_la_trunk_config_port1, acqe_fc)) {
6161 phba->trunk_link.link1.state =
6162 bf_get(lpfc_acqe_fc_la_trunk_link_status_port1, acqe_fc)
6163 ? LPFC_LINK_UP : LPFC_LINK_DOWN;
6164 phba->trunk_link.link1.fault = port_fault & 0x2 ? err : 0;
6165 cnt++;
6166 }
6167 if (bf_get(lpfc_acqe_fc_la_trunk_config_port2, acqe_fc)) {
6168 phba->trunk_link.link2.state =
6169 bf_get(lpfc_acqe_fc_la_trunk_link_status_port2, acqe_fc)
6170 ? LPFC_LINK_UP : LPFC_LINK_DOWN;
6171 phba->trunk_link.link2.fault = port_fault & 0x4 ? err : 0;
6172 cnt++;
6173 }
6174 if (bf_get(lpfc_acqe_fc_la_trunk_config_port3, acqe_fc)) {
6175 phba->trunk_link.link3.state =
6176 bf_get(lpfc_acqe_fc_la_trunk_link_status_port3, acqe_fc)
6177 ? LPFC_LINK_UP : LPFC_LINK_DOWN;
6178 phba->trunk_link.link3.fault = port_fault & 0x8 ? err : 0;
6179 cnt++;
6180 }
6181
6182 if (cnt)
6183 phba->trunk_link.phy_lnk_speed =
6184 phba->sli4_hba.link_state.logical_speed / (cnt * 1000);
6185 else
6186 phba->trunk_link.phy_lnk_speed = LPFC_LINK_SPEED_UNKNOWN;
6187
6188 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6189 "2910 Async FC Trunking Event - Speed:%d\n"
6190 "\tLogical speed:%d "
6191 "port0: %s port1: %s port2: %s port3: %s\n",
6192 phba->sli4_hba.link_state.speed,
6193 phba->sli4_hba.link_state.logical_speed,
6194 trunk_link_status(0), trunk_link_status(1),
6195 trunk_link_status(2), trunk_link_status(3));
6196
6197 if (phba->cmf_active_mode != LPFC_CFG_OFF)
6198 lpfc_cmf_signal_init(phba);
6199
6200 if (port_fault)
6201 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6202 "3202 trunk error:0x%x (%s) seen on port0:%s "
6203 /*
6204 * SLI-4: We have only 0xA error codes
6205 * defined as of now. print an appropriate
6206 * message in case driver needs to be updated.
6207 */
6208 "port1:%s port2:%s port3:%s\n", err, err > 0xA ?
6209 "UNDEFINED. update driver." : trunk_errmsg[err],
6210 trunk_port_fault(0), trunk_port_fault(1),
6211 trunk_port_fault(2), trunk_port_fault(3));
6212 }
6213
6214
6215 /**
6216 * lpfc_sli4_async_fc_evt - Process the asynchronous FC link event
6217 * @phba: pointer to lpfc hba data structure.
6218 * @acqe_fc: pointer to the async fc completion queue entry.
6219 *
6220 * This routine is to handle the SLI4 asynchronous FC event. It will simply log
6221 * that the event was received and then issue a read_topology mailbox command so
6222 * that the rest of the driver will treat it the same as SLI3.
6223 **/
6224 static void
lpfc_sli4_async_fc_evt(struct lpfc_hba * phba,struct lpfc_acqe_fc_la * acqe_fc)6225 lpfc_sli4_async_fc_evt(struct lpfc_hba *phba, struct lpfc_acqe_fc_la *acqe_fc)
6226 {
6227 LPFC_MBOXQ_t *pmb;
6228 MAILBOX_t *mb;
6229 struct lpfc_mbx_read_top *la;
6230 char *log_level;
6231 int rc;
6232
6233 if (bf_get(lpfc_trailer_type, acqe_fc) !=
6234 LPFC_FC_LA_EVENT_TYPE_FC_LINK) {
6235 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6236 "2895 Non FC link Event detected.(%d)\n",
6237 bf_get(lpfc_trailer_type, acqe_fc));
6238 return;
6239 }
6240
6241 if (bf_get(lpfc_acqe_fc_la_att_type, acqe_fc) ==
6242 LPFC_FC_LA_TYPE_TRUNKING_EVENT) {
6243 lpfc_update_trunk_link_status(phba, acqe_fc);
6244 return;
6245 }
6246
6247 /* Keep the link status for extra SLI4 state machine reference */
6248 phba->sli4_hba.link_state.speed =
6249 lpfc_sli4_port_speed_parse(phba, LPFC_TRAILER_CODE_FC,
6250 bf_get(lpfc_acqe_fc_la_speed, acqe_fc));
6251 phba->sli4_hba.link_state.duplex = LPFC_ASYNC_LINK_DUPLEX_FULL;
6252 phba->sli4_hba.link_state.topology =
6253 bf_get(lpfc_acqe_fc_la_topology, acqe_fc);
6254 phba->sli4_hba.link_state.status =
6255 bf_get(lpfc_acqe_fc_la_att_type, acqe_fc);
6256 phba->sli4_hba.link_state.type =
6257 bf_get(lpfc_acqe_fc_la_port_type, acqe_fc);
6258 phba->sli4_hba.link_state.number =
6259 bf_get(lpfc_acqe_fc_la_port_number, acqe_fc);
6260 phba->sli4_hba.link_state.fault =
6261 bf_get(lpfc_acqe_link_fault, acqe_fc);
6262 phba->sli4_hba.link_state.link_status =
6263 bf_get(lpfc_acqe_fc_la_link_status, acqe_fc);
6264
6265 /*
6266 * Only select attention types need logical speed modification to what
6267 * was previously set.
6268 */
6269 if (phba->sli4_hba.link_state.status >= LPFC_FC_LA_TYPE_LINK_UP &&
6270 phba->sli4_hba.link_state.status < LPFC_FC_LA_TYPE_ACTIVATE_FAIL) {
6271 if (bf_get(lpfc_acqe_fc_la_att_type, acqe_fc) ==
6272 LPFC_FC_LA_TYPE_LINK_DOWN)
6273 phba->sli4_hba.link_state.logical_speed = 0;
6274 else if (!phba->sli4_hba.conf_trunk)
6275 phba->sli4_hba.link_state.logical_speed =
6276 bf_get(lpfc_acqe_fc_la_llink_spd, acqe_fc) * 10;
6277 }
6278
6279 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
6280 "2896 Async FC event - Speed:%dGBaud Topology:x%x "
6281 "LA Type:x%x Port Type:%d Port Number:%d Logical speed:"
6282 "%dMbps Fault:x%x Link Status:x%x\n",
6283 phba->sli4_hba.link_state.speed,
6284 phba->sli4_hba.link_state.topology,
6285 phba->sli4_hba.link_state.status,
6286 phba->sli4_hba.link_state.type,
6287 phba->sli4_hba.link_state.number,
6288 phba->sli4_hba.link_state.logical_speed,
6289 phba->sli4_hba.link_state.fault,
6290 phba->sli4_hba.link_state.link_status);
6291
6292 /*
6293 * The following attention types are informational only, providing
6294 * further details about link status. Overwrite the value of
6295 * link_state.status appropriately. No further action is required.
6296 */
6297 if (phba->sli4_hba.link_state.status >= LPFC_FC_LA_TYPE_ACTIVATE_FAIL) {
6298 switch (phba->sli4_hba.link_state.status) {
6299 case LPFC_FC_LA_TYPE_ACTIVATE_FAIL:
6300 log_level = KERN_WARNING;
6301 phba->sli4_hba.link_state.status =
6302 LPFC_FC_LA_TYPE_LINK_DOWN;
6303 break;
6304 case LPFC_FC_LA_TYPE_LINK_RESET_PRTCL_EVT:
6305 /*
6306 * During bb credit recovery establishment, receiving
6307 * this attention type is normal. Link Up attention
6308 * type is expected to occur before this informational
6309 * attention type so keep the Link Up status.
6310 */
6311 log_level = KERN_INFO;
6312 phba->sli4_hba.link_state.status =
6313 LPFC_FC_LA_TYPE_LINK_UP;
6314 break;
6315 default:
6316 log_level = KERN_INFO;
6317 break;
6318 }
6319 lpfc_log_msg(phba, log_level, LOG_SLI,
6320 "2992 Async FC event - Informational Link "
6321 "Attention Type x%x\n",
6322 bf_get(lpfc_acqe_fc_la_att_type, acqe_fc));
6323 return;
6324 }
6325
6326 pmb = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
6327 if (!pmb) {
6328 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6329 "2897 The mboxq allocation failed\n");
6330 return;
6331 }
6332 rc = lpfc_mbox_rsrc_prep(phba, pmb);
6333 if (rc) {
6334 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6335 "2898 The mboxq prep failed\n");
6336 goto out_free_pmb;
6337 }
6338
6339 /* Cleanup any outstanding ELS commands */
6340 lpfc_els_flush_all_cmd(phba);
6341
6342 /* Block ELS IOCBs until we have done process link event */
6343 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
6344
6345 /* Update link event statistics */
6346 phba->sli.slistat.link_event++;
6347
6348 /* Create lpfc_handle_latt mailbox command from link ACQE */
6349 lpfc_read_topology(phba, pmb, pmb->ctx_buf);
6350 pmb->mbox_cmpl = lpfc_mbx_cmpl_read_topology;
6351 pmb->vport = phba->pport;
6352
6353 if (phba->sli4_hba.link_state.status != LPFC_FC_LA_TYPE_LINK_UP) {
6354 phba->link_flag &= ~(LS_MDS_LINK_DOWN | LS_MDS_LOOPBACK);
6355
6356 switch (phba->sli4_hba.link_state.status) {
6357 case LPFC_FC_LA_TYPE_MDS_LINK_DOWN:
6358 phba->link_flag |= LS_MDS_LINK_DOWN;
6359 break;
6360 case LPFC_FC_LA_TYPE_MDS_LOOPBACK:
6361 phba->link_flag |= LS_MDS_LOOPBACK;
6362 break;
6363 default:
6364 break;
6365 }
6366
6367 /* Initialize completion status */
6368 mb = &pmb->u.mb;
6369 mb->mbxStatus = MBX_SUCCESS;
6370
6371 /* Parse port fault information field */
6372 lpfc_sli4_parse_latt_fault(phba, (void *)acqe_fc);
6373
6374 /* Parse and translate link attention fields */
6375 la = (struct lpfc_mbx_read_top *)&pmb->u.mb.un.varReadTop;
6376 la->eventTag = acqe_fc->event_tag;
6377
6378 if (phba->sli4_hba.link_state.status ==
6379 LPFC_FC_LA_TYPE_UNEXP_WWPN) {
6380 bf_set(lpfc_mbx_read_top_att_type, la,
6381 LPFC_FC_LA_TYPE_UNEXP_WWPN);
6382 } else {
6383 bf_set(lpfc_mbx_read_top_att_type, la,
6384 LPFC_FC_LA_TYPE_LINK_DOWN);
6385 }
6386 /* Invoke the mailbox command callback function */
6387 lpfc_mbx_cmpl_read_topology(phba, pmb);
6388
6389 return;
6390 }
6391
6392 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
6393 if (rc == MBX_NOT_FINISHED)
6394 goto out_free_pmb;
6395 return;
6396
6397 out_free_pmb:
6398 lpfc_mbox_rsrc_cleanup(phba, pmb, MBOX_THD_UNLOCKED);
6399 }
6400
6401 /**
6402 * lpfc_sli4_async_sli_evt - Process the asynchronous SLI link event
6403 * @phba: pointer to lpfc hba data structure.
6404 * @acqe_sli: pointer to the async SLI completion queue entry.
6405 *
6406 * This routine is to handle the SLI4 asynchronous SLI events.
6407 **/
6408 static void
lpfc_sli4_async_sli_evt(struct lpfc_hba * phba,struct lpfc_acqe_sli * acqe_sli)6409 lpfc_sli4_async_sli_evt(struct lpfc_hba *phba, struct lpfc_acqe_sli *acqe_sli)
6410 {
6411 char port_name;
6412 char message[128];
6413 uint8_t status;
6414 uint8_t evt_type;
6415 uint8_t operational = 0;
6416 struct temp_event temp_event_data;
6417 struct lpfc_acqe_misconfigured_event *misconfigured;
6418 struct lpfc_acqe_cgn_signal *cgn_signal;
6419 struct Scsi_Host *shost;
6420 struct lpfc_vport **vports;
6421 int rc, i, cnt;
6422
6423 evt_type = bf_get(lpfc_trailer_type, acqe_sli);
6424
6425 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
6426 "2901 Async SLI event - Type:%d, Event Data: x%08x "
6427 "x%08x x%08x x%08x\n", evt_type,
6428 acqe_sli->event_data1, acqe_sli->event_data2,
6429 acqe_sli->event_data3, acqe_sli->trailer);
6430
6431 port_name = phba->Port[0];
6432 if (port_name == 0x00)
6433 port_name = '?'; /* get port name is empty */
6434
6435 switch (evt_type) {
6436 case LPFC_SLI_EVENT_TYPE_OVER_TEMP:
6437 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
6438 temp_event_data.event_code = LPFC_THRESHOLD_TEMP;
6439 temp_event_data.data = (uint32_t)acqe_sli->event_data1;
6440
6441 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
6442 "3190 Over Temperature:%d Celsius- Port Name %c\n",
6443 acqe_sli->event_data1, port_name);
6444
6445 phba->sfp_warning |= LPFC_TRANSGRESSION_HIGH_TEMPERATURE;
6446 shost = lpfc_shost_from_vport(phba->pport);
6447 fc_host_post_vendor_event(shost, fc_get_event_number(),
6448 sizeof(temp_event_data),
6449 (char *)&temp_event_data,
6450 SCSI_NL_VID_TYPE_PCI
6451 | PCI_VENDOR_ID_EMULEX);
6452 break;
6453 case LPFC_SLI_EVENT_TYPE_NORM_TEMP:
6454 temp_event_data.event_type = FC_REG_TEMPERATURE_EVENT;
6455 temp_event_data.event_code = LPFC_NORMAL_TEMP;
6456 temp_event_data.data = (uint32_t)acqe_sli->event_data1;
6457
6458 lpfc_printf_log(phba, KERN_INFO, LOG_SLI | LOG_LDS_EVENT,
6459 "3191 Normal Temperature:%d Celsius - Port Name %c\n",
6460 acqe_sli->event_data1, port_name);
6461
6462 shost = lpfc_shost_from_vport(phba->pport);
6463 fc_host_post_vendor_event(shost, fc_get_event_number(),
6464 sizeof(temp_event_data),
6465 (char *)&temp_event_data,
6466 SCSI_NL_VID_TYPE_PCI
6467 | PCI_VENDOR_ID_EMULEX);
6468 break;
6469 case LPFC_SLI_EVENT_TYPE_MISCONFIGURED:
6470 misconfigured = (struct lpfc_acqe_misconfigured_event *)
6471 &acqe_sli->event_data1;
6472
6473 /* fetch the status for this port */
6474 switch (phba->sli4_hba.lnk_info.lnk_no) {
6475 case LPFC_LINK_NUMBER_0:
6476 status = bf_get(lpfc_sli_misconfigured_port0_state,
6477 &misconfigured->theEvent);
6478 operational = bf_get(lpfc_sli_misconfigured_port0_op,
6479 &misconfigured->theEvent);
6480 break;
6481 case LPFC_LINK_NUMBER_1:
6482 status = bf_get(lpfc_sli_misconfigured_port1_state,
6483 &misconfigured->theEvent);
6484 operational = bf_get(lpfc_sli_misconfigured_port1_op,
6485 &misconfigured->theEvent);
6486 break;
6487 case LPFC_LINK_NUMBER_2:
6488 status = bf_get(lpfc_sli_misconfigured_port2_state,
6489 &misconfigured->theEvent);
6490 operational = bf_get(lpfc_sli_misconfigured_port2_op,
6491 &misconfigured->theEvent);
6492 break;
6493 case LPFC_LINK_NUMBER_3:
6494 status = bf_get(lpfc_sli_misconfigured_port3_state,
6495 &misconfigured->theEvent);
6496 operational = bf_get(lpfc_sli_misconfigured_port3_op,
6497 &misconfigured->theEvent);
6498 break;
6499 default:
6500 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6501 "3296 "
6502 "LPFC_SLI_EVENT_TYPE_MISCONFIGURED "
6503 "event: Invalid link %d",
6504 phba->sli4_hba.lnk_info.lnk_no);
6505 return;
6506 }
6507
6508 /* Skip if optic state unchanged */
6509 if (phba->sli4_hba.lnk_info.optic_state == status)
6510 return;
6511
6512 switch (status) {
6513 case LPFC_SLI_EVENT_STATUS_VALID:
6514 sprintf(message, "Physical Link is functional");
6515 break;
6516 case LPFC_SLI_EVENT_STATUS_NOT_PRESENT:
6517 sprintf(message, "Optics faulted/incorrectly "
6518 "installed/not installed - Reseat optics, "
6519 "if issue not resolved, replace.");
6520 break;
6521 case LPFC_SLI_EVENT_STATUS_WRONG_TYPE:
6522 sprintf(message,
6523 "Optics of two types installed - Remove one "
6524 "optic or install matching pair of optics.");
6525 break;
6526 case LPFC_SLI_EVENT_STATUS_UNSUPPORTED:
6527 sprintf(message, "Incompatible optics - Replace with "
6528 "compatible optics for card to function.");
6529 break;
6530 case LPFC_SLI_EVENT_STATUS_UNQUALIFIED:
6531 sprintf(message, "Unqualified optics - Replace with "
6532 "Avago optics for Warranty and Technical "
6533 "Support - Link is%s operational",
6534 (operational) ? " not" : "");
6535 break;
6536 case LPFC_SLI_EVENT_STATUS_UNCERTIFIED:
6537 sprintf(message, "Uncertified optics - Replace with "
6538 "Avago-certified optics to enable link "
6539 "operation - Link is%s operational",
6540 (operational) ? " not" : "");
6541 break;
6542 default:
6543 /* firmware is reporting a status we don't know about */
6544 sprintf(message, "Unknown event status x%02x", status);
6545 break;
6546 }
6547
6548 /* Issue READ_CONFIG mbox command to refresh supported speeds */
6549 rc = lpfc_sli4_read_config(phba);
6550 if (rc) {
6551 phba->lmt = 0;
6552 lpfc_printf_log(phba, KERN_ERR,
6553 LOG_TRACE_EVENT,
6554 "3194 Unable to retrieve supported "
6555 "speeds, rc = 0x%x\n", rc);
6556 }
6557 rc = lpfc_sli4_refresh_params(phba);
6558 if (rc) {
6559 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6560 "3174 Unable to update pls support, "
6561 "rc x%x\n", rc);
6562 }
6563 vports = lpfc_create_vport_work_array(phba);
6564 if (vports != NULL) {
6565 for (i = 0; i <= phba->max_vports && vports[i] != NULL;
6566 i++) {
6567 shost = lpfc_shost_from_vport(vports[i]);
6568 lpfc_host_supported_speeds_set(shost);
6569 }
6570 }
6571 lpfc_destroy_vport_work_array(phba, vports);
6572
6573 phba->sli4_hba.lnk_info.optic_state = status;
6574 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
6575 "3176 Port Name %c %s\n", port_name, message);
6576 break;
6577 case LPFC_SLI_EVENT_TYPE_REMOTE_DPORT:
6578 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
6579 "3192 Remote DPort Test Initiated - "
6580 "Event Data1:x%08x Event Data2: x%08x\n",
6581 acqe_sli->event_data1, acqe_sli->event_data2);
6582 break;
6583 case LPFC_SLI_EVENT_TYPE_PORT_PARAMS_CHG:
6584 /* Call FW to obtain active parms */
6585 lpfc_sli4_cgn_parm_chg_evt(phba);
6586 break;
6587 case LPFC_SLI_EVENT_TYPE_MISCONF_FAWWN:
6588 /* Misconfigured WWN. Reports that the SLI Port is configured
6589 * to use FA-WWN, but the attached device doesn’t support it.
6590 * Event Data1 - N.A, Event Data2 - N.A
6591 * This event only happens on the physical port.
6592 */
6593 lpfc_log_msg(phba, KERN_WARNING, LOG_SLI | LOG_DISCOVERY,
6594 "2699 Misconfigured FA-PWWN - Attached device "
6595 "does not support FA-PWWN\n");
6596 phba->sli4_hba.fawwpn_flag &= ~LPFC_FAWWPN_FABRIC;
6597 memset(phba->pport->fc_portname.u.wwn, 0,
6598 sizeof(struct lpfc_name));
6599 break;
6600 case LPFC_SLI_EVENT_TYPE_EEPROM_FAILURE:
6601 /* EEPROM failure. No driver action is required */
6602 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
6603 "2518 EEPROM failure - "
6604 "Event Data1: x%08x Event Data2: x%08x\n",
6605 acqe_sli->event_data1, acqe_sli->event_data2);
6606 break;
6607 case LPFC_SLI_EVENT_TYPE_CGN_SIGNAL:
6608 if (phba->cmf_active_mode == LPFC_CFG_OFF)
6609 break;
6610 cgn_signal = (struct lpfc_acqe_cgn_signal *)
6611 &acqe_sli->event_data1;
6612 phba->cgn_acqe_cnt++;
6613
6614 cnt = bf_get(lpfc_warn_acqe, cgn_signal);
6615 atomic64_add(cnt, &phba->cgn_acqe_stat.warn);
6616 atomic64_add(cgn_signal->alarm_cnt, &phba->cgn_acqe_stat.alarm);
6617
6618 /* no threshold for CMF, even 1 signal will trigger an event */
6619
6620 /* Alarm overrides warning, so check that first */
6621 if (cgn_signal->alarm_cnt) {
6622 if (phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM) {
6623 /* Keep track of alarm cnt for CMF_SYNC_WQE */
6624 atomic_add(cgn_signal->alarm_cnt,
6625 &phba->cgn_sync_alarm_cnt);
6626 }
6627 } else if (cnt) {
6628 /* signal action needs to be taken */
6629 if (phba->cgn_reg_signal == EDC_CG_SIG_WARN_ONLY ||
6630 phba->cgn_reg_signal == EDC_CG_SIG_WARN_ALARM) {
6631 /* Keep track of warning cnt for CMF_SYNC_WQE */
6632 atomic_add(cnt, &phba->cgn_sync_warn_cnt);
6633 }
6634 }
6635 break;
6636 case LPFC_SLI_EVENT_TYPE_RD_SIGNAL:
6637 /* May be accompanied by a temperature event */
6638 lpfc_printf_log(phba, KERN_INFO,
6639 LOG_SLI | LOG_LINK_EVENT | LOG_LDS_EVENT,
6640 "2902 Remote Degrade Signaling: x%08x x%08x "
6641 "x%08x\n",
6642 acqe_sli->event_data1, acqe_sli->event_data2,
6643 acqe_sli->event_data3);
6644 break;
6645 case LPFC_SLI_EVENT_TYPE_RESET_CM_STATS:
6646 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
6647 "2905 Reset CM statistics\n");
6648 lpfc_sli4_async_cmstat_evt(phba);
6649 break;
6650 default:
6651 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
6652 "3193 Unrecognized SLI event, type: 0x%x",
6653 evt_type);
6654 break;
6655 }
6656 }
6657
6658 /**
6659 * lpfc_sli4_perform_vport_cvl - Perform clear virtual link on a vport
6660 * @vport: pointer to vport data structure.
6661 *
6662 * This routine is to perform Clear Virtual Link (CVL) on a vport in
6663 * response to a CVL event.
6664 *
6665 * Return the pointer to the ndlp with the vport if successful, otherwise
6666 * return NULL.
6667 **/
6668 static struct lpfc_nodelist *
lpfc_sli4_perform_vport_cvl(struct lpfc_vport * vport)6669 lpfc_sli4_perform_vport_cvl(struct lpfc_vport *vport)
6670 {
6671 struct lpfc_nodelist *ndlp;
6672 struct Scsi_Host *shost;
6673 struct lpfc_hba *phba;
6674
6675 if (!vport)
6676 return NULL;
6677 phba = vport->phba;
6678 if (!phba)
6679 return NULL;
6680 ndlp = lpfc_findnode_did(vport, Fabric_DID);
6681 if (!ndlp) {
6682 /* Cannot find existing Fabric ndlp, so allocate a new one */
6683 ndlp = lpfc_nlp_init(vport, Fabric_DID);
6684 if (!ndlp)
6685 return NULL;
6686 /* Set the node type */
6687 ndlp->nlp_type |= NLP_FABRIC;
6688 /* Put ndlp onto node list */
6689 lpfc_enqueue_node(vport, ndlp);
6690 }
6691 if ((phba->pport->port_state < LPFC_FLOGI) &&
6692 (phba->pport->port_state != LPFC_VPORT_FAILED))
6693 return NULL;
6694 /* If virtual link is not yet instantiated ignore CVL */
6695 if ((vport != phba->pport) && (vport->port_state < LPFC_FDISC)
6696 && (vport->port_state != LPFC_VPORT_FAILED))
6697 return NULL;
6698 shost = lpfc_shost_from_vport(vport);
6699 if (!shost)
6700 return NULL;
6701 lpfc_linkdown_port(vport);
6702 lpfc_cleanup_pending_mbox(vport);
6703 set_bit(FC_VPORT_CVL_RCVD, &vport->fc_flag);
6704
6705 return ndlp;
6706 }
6707
6708 /**
6709 * lpfc_sli4_perform_all_vport_cvl - Perform clear virtual link on all vports
6710 * @phba: pointer to lpfc hba data structure.
6711 *
6712 * This routine is to perform Clear Virtual Link (CVL) on all vports in
6713 * response to a FCF dead event.
6714 **/
6715 static void
lpfc_sli4_perform_all_vport_cvl(struct lpfc_hba * phba)6716 lpfc_sli4_perform_all_vport_cvl(struct lpfc_hba *phba)
6717 {
6718 struct lpfc_vport **vports;
6719 int i;
6720
6721 vports = lpfc_create_vport_work_array(phba);
6722 if (vports)
6723 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++)
6724 lpfc_sli4_perform_vport_cvl(vports[i]);
6725 lpfc_destroy_vport_work_array(phba, vports);
6726 }
6727
6728 /**
6729 * lpfc_sli4_async_fip_evt - Process the asynchronous FCoE FIP event
6730 * @phba: pointer to lpfc hba data structure.
6731 * @acqe_fip: pointer to the async fcoe completion queue entry.
6732 *
6733 * This routine is to handle the SLI4 asynchronous fcoe event.
6734 **/
6735 static void
lpfc_sli4_async_fip_evt(struct lpfc_hba * phba,struct lpfc_acqe_fip * acqe_fip)6736 lpfc_sli4_async_fip_evt(struct lpfc_hba *phba,
6737 struct lpfc_acqe_fip *acqe_fip)
6738 {
6739 uint8_t event_type = bf_get(lpfc_trailer_type, acqe_fip);
6740 int rc;
6741 struct lpfc_vport *vport;
6742 struct lpfc_nodelist *ndlp;
6743 int active_vlink_present;
6744 struct lpfc_vport **vports;
6745 int i;
6746
6747 phba->fc_eventTag = acqe_fip->event_tag;
6748 phba->fcoe_eventtag = acqe_fip->event_tag;
6749 switch (event_type) {
6750 case LPFC_FIP_EVENT_TYPE_NEW_FCF:
6751 case LPFC_FIP_EVENT_TYPE_FCF_PARAM_MOD:
6752 if (event_type == LPFC_FIP_EVENT_TYPE_NEW_FCF)
6753 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6754 "2546 New FCF event, evt_tag:x%x, "
6755 "index:x%x\n",
6756 acqe_fip->event_tag,
6757 acqe_fip->index);
6758 else
6759 lpfc_printf_log(phba, KERN_WARNING, LOG_FIP |
6760 LOG_DISCOVERY,
6761 "2788 FCF param modified event, "
6762 "evt_tag:x%x, index:x%x\n",
6763 acqe_fip->event_tag,
6764 acqe_fip->index);
6765 if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
6766 /*
6767 * During period of FCF discovery, read the FCF
6768 * table record indexed by the event to update
6769 * FCF roundrobin failover eligible FCF bmask.
6770 */
6771 lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
6772 LOG_DISCOVERY,
6773 "2779 Read FCF (x%x) for updating "
6774 "roundrobin FCF failover bmask\n",
6775 acqe_fip->index);
6776 rc = lpfc_sli4_read_fcf_rec(phba, acqe_fip->index);
6777 }
6778
6779 /* If the FCF discovery is in progress, do nothing. */
6780 if (test_bit(FCF_TS_INPROG, &phba->hba_flag))
6781 break;
6782 spin_lock_irq(&phba->hbalock);
6783 /* If fast FCF failover rescan event is pending, do nothing */
6784 if (phba->fcf.fcf_flag & (FCF_REDISC_EVT | FCF_REDISC_PEND)) {
6785 spin_unlock_irq(&phba->hbalock);
6786 break;
6787 }
6788
6789 /* If the FCF has been in discovered state, do nothing. */
6790 if (phba->fcf.fcf_flag & FCF_SCAN_DONE) {
6791 spin_unlock_irq(&phba->hbalock);
6792 break;
6793 }
6794 spin_unlock_irq(&phba->hbalock);
6795
6796 /* Otherwise, scan the entire FCF table and re-discover SAN */
6797 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
6798 "2770 Start FCF table scan per async FCF "
6799 "event, evt_tag:x%x, index:x%x\n",
6800 acqe_fip->event_tag, acqe_fip->index);
6801 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba,
6802 LPFC_FCOE_FCF_GET_FIRST);
6803 if (rc)
6804 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6805 "2547 Issue FCF scan read FCF mailbox "
6806 "command failed (x%x)\n", rc);
6807 break;
6808
6809 case LPFC_FIP_EVENT_TYPE_FCF_TABLE_FULL:
6810 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6811 "2548 FCF Table full count 0x%x tag 0x%x\n",
6812 bf_get(lpfc_acqe_fip_fcf_count, acqe_fip),
6813 acqe_fip->event_tag);
6814 break;
6815
6816 case LPFC_FIP_EVENT_TYPE_FCF_DEAD:
6817 phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
6818 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6819 "2549 FCF (x%x) disconnected from network, "
6820 "tag:x%x\n", acqe_fip->index,
6821 acqe_fip->event_tag);
6822 /*
6823 * If we are in the middle of FCF failover process, clear
6824 * the corresponding FCF bit in the roundrobin bitmap.
6825 */
6826 spin_lock_irq(&phba->hbalock);
6827 if ((phba->fcf.fcf_flag & FCF_DISCOVERY) &&
6828 (phba->fcf.current_rec.fcf_indx != acqe_fip->index)) {
6829 spin_unlock_irq(&phba->hbalock);
6830 /* Update FLOGI FCF failover eligible FCF bmask */
6831 lpfc_sli4_fcf_rr_index_clear(phba, acqe_fip->index);
6832 break;
6833 }
6834 spin_unlock_irq(&phba->hbalock);
6835
6836 /* If the event is not for currently used fcf do nothing */
6837 if (phba->fcf.current_rec.fcf_indx != acqe_fip->index)
6838 break;
6839
6840 /*
6841 * Otherwise, request the port to rediscover the entire FCF
6842 * table for a fast recovery from case that the current FCF
6843 * is no longer valid as we are not in the middle of FCF
6844 * failover process already.
6845 */
6846 spin_lock_irq(&phba->hbalock);
6847 /* Mark the fast failover process in progress */
6848 phba->fcf.fcf_flag |= FCF_DEAD_DISC;
6849 spin_unlock_irq(&phba->hbalock);
6850
6851 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
6852 "2771 Start FCF fast failover process due to "
6853 "FCF DEAD event: evt_tag:x%x, fcf_index:x%x "
6854 "\n", acqe_fip->event_tag, acqe_fip->index);
6855 rc = lpfc_sli4_redisc_fcf_table(phba);
6856 if (rc) {
6857 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
6858 LOG_TRACE_EVENT,
6859 "2772 Issue FCF rediscover mailbox "
6860 "command failed, fail through to FCF "
6861 "dead event\n");
6862 spin_lock_irq(&phba->hbalock);
6863 phba->fcf.fcf_flag &= ~FCF_DEAD_DISC;
6864 spin_unlock_irq(&phba->hbalock);
6865 /*
6866 * Last resort will fail over by treating this
6867 * as a link down to FCF registration.
6868 */
6869 lpfc_sli4_fcf_dead_failthrough(phba);
6870 } else {
6871 /* Reset FCF roundrobin bmask for new discovery */
6872 lpfc_sli4_clear_fcf_rr_bmask(phba);
6873 /*
6874 * Handling fast FCF failover to a DEAD FCF event is
6875 * considered equalivant to receiving CVL to all vports.
6876 */
6877 lpfc_sli4_perform_all_vport_cvl(phba);
6878 }
6879 break;
6880 case LPFC_FIP_EVENT_TYPE_CVL:
6881 phba->fcoe_cvl_eventtag = acqe_fip->event_tag;
6882 lpfc_printf_log(phba, KERN_ERR,
6883 LOG_TRACE_EVENT,
6884 "2718 Clear Virtual Link Received for VPI 0x%x"
6885 " tag 0x%x\n", acqe_fip->index, acqe_fip->event_tag);
6886
6887 vport = lpfc_find_vport_by_vpid(phba,
6888 acqe_fip->index);
6889 ndlp = lpfc_sli4_perform_vport_cvl(vport);
6890 if (!ndlp)
6891 break;
6892 active_vlink_present = 0;
6893
6894 vports = lpfc_create_vport_work_array(phba);
6895 if (vports) {
6896 for (i = 0; i <= phba->max_vports && vports[i] != NULL;
6897 i++) {
6898 if (!test_bit(FC_VPORT_CVL_RCVD,
6899 &vports[i]->fc_flag) &&
6900 vports[i]->port_state > LPFC_FDISC) {
6901 active_vlink_present = 1;
6902 break;
6903 }
6904 }
6905 lpfc_destroy_vport_work_array(phba, vports);
6906 }
6907
6908 /*
6909 * Don't re-instantiate if vport is marked for deletion.
6910 * If we are here first then vport_delete is going to wait
6911 * for discovery to complete.
6912 */
6913 if (!test_bit(FC_UNLOADING, &vport->load_flag) &&
6914 active_vlink_present) {
6915 /*
6916 * If there are other active VLinks present,
6917 * re-instantiate the Vlink using FDISC.
6918 */
6919 mod_timer(&ndlp->nlp_delayfunc,
6920 jiffies + secs_to_jiffies(1));
6921 set_bit(NLP_DELAY_TMO, &ndlp->nlp_flag);
6922 ndlp->nlp_last_elscmd = ELS_CMD_FDISC;
6923 vport->port_state = LPFC_FDISC;
6924 } else {
6925 /*
6926 * Otherwise, we request port to rediscover
6927 * the entire FCF table for a fast recovery
6928 * from possible case that the current FCF
6929 * is no longer valid if we are not already
6930 * in the FCF failover process.
6931 */
6932 spin_lock_irq(&phba->hbalock);
6933 if (phba->fcf.fcf_flag & FCF_DISCOVERY) {
6934 spin_unlock_irq(&phba->hbalock);
6935 break;
6936 }
6937 /* Mark the fast failover process in progress */
6938 phba->fcf.fcf_flag |= FCF_ACVL_DISC;
6939 spin_unlock_irq(&phba->hbalock);
6940 lpfc_printf_log(phba, KERN_INFO, LOG_FIP |
6941 LOG_DISCOVERY,
6942 "2773 Start FCF failover per CVL, "
6943 "evt_tag:x%x\n", acqe_fip->event_tag);
6944 rc = lpfc_sli4_redisc_fcf_table(phba);
6945 if (rc) {
6946 lpfc_printf_log(phba, KERN_ERR, LOG_FIP |
6947 LOG_TRACE_EVENT,
6948 "2774 Issue FCF rediscover "
6949 "mailbox command failed, "
6950 "through to CVL event\n");
6951 spin_lock_irq(&phba->hbalock);
6952 phba->fcf.fcf_flag &= ~FCF_ACVL_DISC;
6953 spin_unlock_irq(&phba->hbalock);
6954 /*
6955 * Last resort will be re-try on the
6956 * the current registered FCF entry.
6957 */
6958 lpfc_retry_pport_discovery(phba);
6959 } else
6960 /*
6961 * Reset FCF roundrobin bmask for new
6962 * discovery.
6963 */
6964 lpfc_sli4_clear_fcf_rr_bmask(phba);
6965 }
6966 break;
6967 default:
6968 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6969 "0288 Unknown FCoE event type 0x%x event tag "
6970 "0x%x\n", event_type, acqe_fip->event_tag);
6971 break;
6972 }
6973 }
6974
6975 /**
6976 * lpfc_sli4_async_dcbx_evt - Process the asynchronous dcbx event
6977 * @phba: pointer to lpfc hba data structure.
6978 * @acqe_dcbx: pointer to the async dcbx completion queue entry.
6979 *
6980 * This routine is to handle the SLI4 asynchronous dcbx event.
6981 **/
6982 static void
lpfc_sli4_async_dcbx_evt(struct lpfc_hba * phba,struct lpfc_acqe_dcbx * acqe_dcbx)6983 lpfc_sli4_async_dcbx_evt(struct lpfc_hba *phba,
6984 struct lpfc_acqe_dcbx *acqe_dcbx)
6985 {
6986 phba->fc_eventTag = acqe_dcbx->event_tag;
6987 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
6988 "0290 The SLI4 DCBX asynchronous event is not "
6989 "handled yet\n");
6990 }
6991
6992 /**
6993 * lpfc_sli4_async_grp5_evt - Process the asynchronous group5 event
6994 * @phba: pointer to lpfc hba data structure.
6995 * @acqe_grp5: pointer to the async grp5 completion queue entry.
6996 *
6997 * This routine is to handle the SLI4 asynchronous grp5 event. A grp5 event
6998 * is an asynchronous notified of a logical link speed change. The Port
6999 * reports the logical link speed in units of 10Mbps.
7000 **/
7001 static void
lpfc_sli4_async_grp5_evt(struct lpfc_hba * phba,struct lpfc_acqe_grp5 * acqe_grp5)7002 lpfc_sli4_async_grp5_evt(struct lpfc_hba *phba,
7003 struct lpfc_acqe_grp5 *acqe_grp5)
7004 {
7005 uint16_t prev_ll_spd;
7006
7007 phba->fc_eventTag = acqe_grp5->event_tag;
7008 phba->fcoe_eventtag = acqe_grp5->event_tag;
7009 prev_ll_spd = phba->sli4_hba.link_state.logical_speed;
7010 phba->sli4_hba.link_state.logical_speed =
7011 (bf_get(lpfc_acqe_grp5_llink_spd, acqe_grp5)) * 10;
7012 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
7013 "2789 GRP5 Async Event: Updating logical link speed "
7014 "from %dMbps to %dMbps\n", prev_ll_spd,
7015 phba->sli4_hba.link_state.logical_speed);
7016 }
7017
7018 /**
7019 * lpfc_sli4_async_cmstat_evt - Process the asynchronous cmstat event
7020 * @phba: pointer to lpfc hba data structure.
7021 *
7022 * This routine is to handle the SLI4 asynchronous cmstat event. A cmstat event
7023 * is an asynchronous notification of a request to reset CM stats.
7024 **/
7025 static void
lpfc_sli4_async_cmstat_evt(struct lpfc_hba * phba)7026 lpfc_sli4_async_cmstat_evt(struct lpfc_hba *phba)
7027 {
7028 if (!phba->cgn_i)
7029 return;
7030 lpfc_init_congestion_stat(phba);
7031 }
7032
7033 /**
7034 * lpfc_cgn_params_val - Validate FW congestion parameters.
7035 * @phba: pointer to lpfc hba data structure.
7036 * @p_cfg_param: pointer to FW provided congestion parameters.
7037 *
7038 * This routine validates the congestion parameters passed
7039 * by the FW to the driver via an ACQE event.
7040 **/
7041 static void
lpfc_cgn_params_val(struct lpfc_hba * phba,struct lpfc_cgn_param * p_cfg_param)7042 lpfc_cgn_params_val(struct lpfc_hba *phba, struct lpfc_cgn_param *p_cfg_param)
7043 {
7044 spin_lock_irq(&phba->hbalock);
7045
7046 if (!lpfc_rangecheck(p_cfg_param->cgn_param_mode, LPFC_CFG_OFF,
7047 LPFC_CFG_MONITOR)) {
7048 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT,
7049 "6225 CMF mode param out of range: %d\n",
7050 p_cfg_param->cgn_param_mode);
7051 p_cfg_param->cgn_param_mode = LPFC_CFG_OFF;
7052 }
7053
7054 spin_unlock_irq(&phba->hbalock);
7055 }
7056
7057 static const char * const lpfc_cmf_mode_to_str[] = {
7058 "OFF",
7059 "MANAGED",
7060 "MONITOR",
7061 };
7062
7063 /**
7064 * lpfc_cgn_params_parse - Process a FW cong parm change event
7065 * @phba: pointer to lpfc hba data structure.
7066 * @p_cgn_param: pointer to a data buffer with the FW cong params.
7067 * @len: the size of pdata in bytes.
7068 *
7069 * This routine validates the congestion management buffer signature
7070 * from the FW, validates the contents and makes corrections for
7071 * valid, in-range values. If the signature magic is correct and
7072 * after parameter validation, the contents are copied to the driver's
7073 * @phba structure. If the magic is incorrect, an error message is
7074 * logged.
7075 **/
7076 static void
lpfc_cgn_params_parse(struct lpfc_hba * phba,struct lpfc_cgn_param * p_cgn_param,uint32_t len)7077 lpfc_cgn_params_parse(struct lpfc_hba *phba,
7078 struct lpfc_cgn_param *p_cgn_param, uint32_t len)
7079 {
7080 struct lpfc_cgn_info *cp;
7081 uint32_t crc, oldmode;
7082 char acr_string[4] = {0};
7083
7084 /* Make sure the FW has encoded the correct magic number to
7085 * validate the congestion parameter in FW memory.
7086 */
7087 if (p_cgn_param->cgn_param_magic == LPFC_CFG_PARAM_MAGIC_NUM) {
7088 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT | LOG_INIT,
7089 "4668 FW cgn parm buffer data: "
7090 "magic 0x%x version %d mode %d "
7091 "level0 %d level1 %d "
7092 "level2 %d byte13 %d "
7093 "byte14 %d byte15 %d "
7094 "byte11 %d byte12 %d activeMode %d\n",
7095 p_cgn_param->cgn_param_magic,
7096 p_cgn_param->cgn_param_version,
7097 p_cgn_param->cgn_param_mode,
7098 p_cgn_param->cgn_param_level0,
7099 p_cgn_param->cgn_param_level1,
7100 p_cgn_param->cgn_param_level2,
7101 p_cgn_param->byte13,
7102 p_cgn_param->byte14,
7103 p_cgn_param->byte15,
7104 p_cgn_param->byte11,
7105 p_cgn_param->byte12,
7106 phba->cmf_active_mode);
7107
7108 oldmode = phba->cmf_active_mode;
7109
7110 /* Any parameters out of range are corrected to defaults
7111 * by this routine. No need to fail.
7112 */
7113 lpfc_cgn_params_val(phba, p_cgn_param);
7114
7115 /* Parameters are verified, move them into driver storage */
7116 spin_lock_irq(&phba->hbalock);
7117 memcpy(&phba->cgn_p, p_cgn_param,
7118 sizeof(struct lpfc_cgn_param));
7119
7120 /* Update parameters in congestion info buffer now */
7121 if (phba->cgn_i) {
7122 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt;
7123 cp->cgn_info_mode = phba->cgn_p.cgn_param_mode;
7124 cp->cgn_info_level0 = phba->cgn_p.cgn_param_level0;
7125 cp->cgn_info_level1 = phba->cgn_p.cgn_param_level1;
7126 cp->cgn_info_level2 = phba->cgn_p.cgn_param_level2;
7127 crc = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ,
7128 LPFC_CGN_CRC32_SEED);
7129 cp->cgn_info_crc = cpu_to_le32(crc);
7130 }
7131 spin_unlock_irq(&phba->hbalock);
7132
7133 phba->cmf_active_mode = phba->cgn_p.cgn_param_mode;
7134
7135 switch (oldmode) {
7136 case LPFC_CFG_OFF:
7137 if (phba->cgn_p.cgn_param_mode != LPFC_CFG_OFF) {
7138 /* Turning CMF on */
7139 lpfc_cmf_start(phba);
7140
7141 if (phba->link_state >= LPFC_LINK_UP) {
7142 phba->cgn_reg_fpin =
7143 phba->cgn_init_reg_fpin;
7144 phba->cgn_reg_signal =
7145 phba->cgn_init_reg_signal;
7146 lpfc_issue_els_edc(phba->pport, 0);
7147 }
7148 }
7149 break;
7150 case LPFC_CFG_MANAGED:
7151 switch (phba->cgn_p.cgn_param_mode) {
7152 case LPFC_CFG_OFF:
7153 /* Turning CMF off */
7154 lpfc_cmf_stop(phba);
7155 if (phba->link_state >= LPFC_LINK_UP)
7156 lpfc_issue_els_edc(phba->pport, 0);
7157 break;
7158 case LPFC_CFG_MONITOR:
7159 phba->cmf_max_bytes_per_interval =
7160 phba->cmf_link_byte_count;
7161
7162 /* Resume blocked IO - unblock on workqueue */
7163 queue_work(phba->wq,
7164 &phba->unblock_request_work);
7165 break;
7166 }
7167 break;
7168 case LPFC_CFG_MONITOR:
7169 switch (phba->cgn_p.cgn_param_mode) {
7170 case LPFC_CFG_OFF:
7171 /* Turning CMF off */
7172 lpfc_cmf_stop(phba);
7173 if (phba->link_state >= LPFC_LINK_UP)
7174 lpfc_issue_els_edc(phba->pport, 0);
7175 break;
7176 case LPFC_CFG_MANAGED:
7177 lpfc_cmf_signal_init(phba);
7178 break;
7179 }
7180 break;
7181 }
7182 if (oldmode != LPFC_CFG_OFF ||
7183 oldmode != phba->cgn_p.cgn_param_mode) {
7184 if (phba->cgn_p.cgn_param_mode == LPFC_CFG_MANAGED)
7185 scnprintf(acr_string, sizeof(acr_string), "%u",
7186 phba->cgn_p.cgn_param_level0);
7187 else
7188 scnprintf(acr_string, sizeof(acr_string), "NA");
7189
7190 dev_info(&phba->pcidev->dev, "%d: "
7191 "4663 CMF: Mode %s acr %s\n",
7192 phba->brd_no,
7193 lpfc_cmf_mode_to_str
7194 [phba->cgn_p.cgn_param_mode],
7195 acr_string);
7196 }
7197 } else {
7198 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT,
7199 "4669 FW cgn parm buf wrong magic 0x%x "
7200 "version %d\n", p_cgn_param->cgn_param_magic,
7201 p_cgn_param->cgn_param_version);
7202 }
7203 }
7204
7205 /**
7206 * lpfc_sli4_cgn_params_read - Read and Validate FW congestion parameters.
7207 * @phba: pointer to lpfc hba data structure.
7208 *
7209 * This routine issues a read_object mailbox command to
7210 * get the congestion management parameters from the FW
7211 * parses it and updates the driver maintained values.
7212 *
7213 * Returns
7214 * 0 if the object was empty
7215 * -Eval if an error was encountered
7216 * Count if bytes were read from object
7217 **/
7218 int
lpfc_sli4_cgn_params_read(struct lpfc_hba * phba)7219 lpfc_sli4_cgn_params_read(struct lpfc_hba *phba)
7220 {
7221 int ret = 0;
7222 struct lpfc_cgn_param *p_cgn_param = NULL;
7223 u32 *pdata = NULL;
7224 u32 len = 0;
7225
7226 /* Find out if the FW has a new set of congestion parameters. */
7227 len = sizeof(struct lpfc_cgn_param);
7228 pdata = kzalloc(len, GFP_KERNEL);
7229 if (!pdata)
7230 return -ENOMEM;
7231 ret = lpfc_read_object(phba, (char *)LPFC_PORT_CFG_NAME,
7232 pdata, len);
7233
7234 /* 0 means no data. A negative means error. A positive means
7235 * bytes were copied.
7236 */
7237 if (!ret) {
7238 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT,
7239 "4670 CGN RD OBJ returns no data\n");
7240 goto rd_obj_err;
7241 } else if (ret < 0) {
7242 /* Some error. Just exit and return it to the caller.*/
7243 goto rd_obj_err;
7244 }
7245
7246 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT | LOG_INIT,
7247 "6234 READ CGN PARAMS Successful %d\n", len);
7248
7249 /* Parse data pointer over len and update the phba congestion
7250 * parameters with values passed back. The receive rate values
7251 * may have been altered in FW, but take no action here.
7252 */
7253 p_cgn_param = (struct lpfc_cgn_param *)pdata;
7254 lpfc_cgn_params_parse(phba, p_cgn_param, len);
7255
7256 rd_obj_err:
7257 kfree(pdata);
7258 return ret;
7259 }
7260
7261 /**
7262 * lpfc_sli4_cgn_parm_chg_evt - Process a FW congestion param change event
7263 * @phba: pointer to lpfc hba data structure.
7264 *
7265 * The FW generated Async ACQE SLI event calls this routine when
7266 * the event type is an SLI Internal Port Event and the Event Code
7267 * indicates a change to the FW maintained congestion parameters.
7268 *
7269 * This routine executes a Read_Object mailbox call to obtain the
7270 * current congestion parameters maintained in FW and corrects
7271 * the driver's active congestion parameters.
7272 *
7273 * The acqe event is not passed because there is no further data
7274 * required.
7275 *
7276 * Returns nonzero error if event processing encountered an error.
7277 * Zero otherwise for success.
7278 **/
7279 static int
lpfc_sli4_cgn_parm_chg_evt(struct lpfc_hba * phba)7280 lpfc_sli4_cgn_parm_chg_evt(struct lpfc_hba *phba)
7281 {
7282 int ret = 0;
7283
7284 if (!phba->sli4_hba.pc_sli4_params.cmf) {
7285 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT,
7286 "4664 Cgn Evt when E2E off. Drop event\n");
7287 return -EACCES;
7288 }
7289
7290 /* If the event is claiming an empty object, it's ok. A write
7291 * could have cleared it. Only error is a negative return
7292 * status.
7293 */
7294 ret = lpfc_sli4_cgn_params_read(phba);
7295 if (ret < 0) {
7296 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT,
7297 "4667 Error reading Cgn Params (%d)\n",
7298 ret);
7299 } else if (!ret) {
7300 lpfc_printf_log(phba, KERN_ERR, LOG_CGN_MGMT | LOG_INIT,
7301 "4673 CGN Event empty object.\n");
7302 }
7303 return ret;
7304 }
7305
7306 /**
7307 * lpfc_sli4_async_event_proc - Process all the pending asynchronous event
7308 * @phba: pointer to lpfc hba data structure.
7309 *
7310 * This routine is invoked by the worker thread to process all the pending
7311 * SLI4 asynchronous events.
7312 **/
lpfc_sli4_async_event_proc(struct lpfc_hba * phba)7313 void lpfc_sli4_async_event_proc(struct lpfc_hba *phba)
7314 {
7315 struct lpfc_cq_event *cq_event;
7316 unsigned long iflags;
7317
7318 /* First, declare the async event has been handled */
7319 clear_bit(ASYNC_EVENT, &phba->hba_flag);
7320
7321 /* Now, handle all the async events */
7322 spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags);
7323 while (!list_empty(&phba->sli4_hba.sp_asynce_work_queue)) {
7324 list_remove_head(&phba->sli4_hba.sp_asynce_work_queue,
7325 cq_event, struct lpfc_cq_event, list);
7326 spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock,
7327 iflags);
7328
7329 /* Process the asynchronous event */
7330 switch (bf_get(lpfc_trailer_code, &cq_event->cqe.mcqe_cmpl)) {
7331 case LPFC_TRAILER_CODE_LINK:
7332 lpfc_sli4_async_link_evt(phba,
7333 &cq_event->cqe.acqe_link);
7334 break;
7335 case LPFC_TRAILER_CODE_FCOE:
7336 lpfc_sli4_async_fip_evt(phba, &cq_event->cqe.acqe_fip);
7337 break;
7338 case LPFC_TRAILER_CODE_DCBX:
7339 lpfc_sli4_async_dcbx_evt(phba,
7340 &cq_event->cqe.acqe_dcbx);
7341 break;
7342 case LPFC_TRAILER_CODE_GRP5:
7343 lpfc_sli4_async_grp5_evt(phba,
7344 &cq_event->cqe.acqe_grp5);
7345 break;
7346 case LPFC_TRAILER_CODE_FC:
7347 lpfc_sli4_async_fc_evt(phba, &cq_event->cqe.acqe_fc);
7348 break;
7349 case LPFC_TRAILER_CODE_SLI:
7350 lpfc_sli4_async_sli_evt(phba, &cq_event->cqe.acqe_sli);
7351 break;
7352 default:
7353 lpfc_printf_log(phba, KERN_ERR,
7354 LOG_TRACE_EVENT,
7355 "1804 Invalid asynchronous event code: "
7356 "x%x\n", bf_get(lpfc_trailer_code,
7357 &cq_event->cqe.mcqe_cmpl));
7358 break;
7359 }
7360
7361 /* Free the completion event processed to the free pool */
7362 lpfc_sli4_cq_event_release(phba, cq_event);
7363 spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags);
7364 }
7365 spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock, iflags);
7366 }
7367
7368 /**
7369 * lpfc_sli4_fcf_redisc_event_proc - Process fcf table rediscovery event
7370 * @phba: pointer to lpfc hba data structure.
7371 *
7372 * This routine is invoked by the worker thread to process FCF table
7373 * rediscovery pending completion event.
7374 **/
lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba * phba)7375 void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *phba)
7376 {
7377 int rc;
7378
7379 spin_lock_irq(&phba->hbalock);
7380 /* Clear FCF rediscovery timeout event */
7381 phba->fcf.fcf_flag &= ~FCF_REDISC_EVT;
7382 /* Clear driver fast failover FCF record flag */
7383 phba->fcf.failover_rec.flag = 0;
7384 /* Set state for FCF fast failover */
7385 phba->fcf.fcf_flag |= FCF_REDISC_FOV;
7386 spin_unlock_irq(&phba->hbalock);
7387
7388 /* Scan FCF table from the first entry to re-discover SAN */
7389 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY,
7390 "2777 Start post-quiescent FCF table scan\n");
7391 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba, LPFC_FCOE_FCF_GET_FIRST);
7392 if (rc)
7393 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
7394 "2747 Issue FCF scan read FCF mailbox "
7395 "command failed 0x%x\n", rc);
7396 }
7397
7398 /**
7399 * lpfc_api_table_setup - Set up per hba pci-device group func api jump table
7400 * @phba: pointer to lpfc hba data structure.
7401 * @dev_grp: The HBA PCI-Device group number.
7402 *
7403 * This routine is invoked to set up the per HBA PCI-Device group function
7404 * API jump table entries.
7405 *
7406 * Return: 0 if success, otherwise -ENODEV
7407 **/
7408 int
lpfc_api_table_setup(struct lpfc_hba * phba,uint8_t dev_grp)7409 lpfc_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
7410 {
7411 int rc;
7412
7413 /* Set up lpfc PCI-device group */
7414 phba->pci_dev_grp = dev_grp;
7415
7416 /* The LPFC_PCI_DEV_OC uses SLI4 */
7417 if (dev_grp == LPFC_PCI_DEV_OC)
7418 phba->sli_rev = LPFC_SLI_REV4;
7419
7420 /* Set up device INIT API function jump table */
7421 rc = lpfc_init_api_table_setup(phba, dev_grp);
7422 if (rc)
7423 return -ENODEV;
7424 /* Set up SCSI API function jump table */
7425 rc = lpfc_scsi_api_table_setup(phba, dev_grp);
7426 if (rc)
7427 return -ENODEV;
7428 /* Set up SLI API function jump table */
7429 rc = lpfc_sli_api_table_setup(phba, dev_grp);
7430 if (rc)
7431 return -ENODEV;
7432 /* Set up MBOX API function jump table */
7433 rc = lpfc_mbox_api_table_setup(phba, dev_grp);
7434 if (rc)
7435 return -ENODEV;
7436
7437 return 0;
7438 }
7439
7440 /**
7441 * lpfc_log_intr_mode - Log the active interrupt mode
7442 * @phba: pointer to lpfc hba data structure.
7443 * @intr_mode: active interrupt mode adopted.
7444 *
7445 * This routine it invoked to log the currently used active interrupt mode
7446 * to the device.
7447 **/
lpfc_log_intr_mode(struct lpfc_hba * phba,uint32_t intr_mode)7448 static void lpfc_log_intr_mode(struct lpfc_hba *phba, uint32_t intr_mode)
7449 {
7450 switch (intr_mode) {
7451 case 0:
7452 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7453 "0470 Enable INTx interrupt mode.\n");
7454 break;
7455 case 1:
7456 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7457 "0481 Enabled MSI interrupt mode.\n");
7458 break;
7459 case 2:
7460 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7461 "0480 Enabled MSI-X interrupt mode.\n");
7462 break;
7463 default:
7464 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
7465 "0482 Illegal interrupt mode.\n");
7466 break;
7467 }
7468 return;
7469 }
7470
7471 /**
7472 * lpfc_enable_pci_dev - Enable a generic PCI device.
7473 * @phba: pointer to lpfc hba data structure.
7474 *
7475 * This routine is invoked to enable the PCI device that is common to all
7476 * PCI devices.
7477 *
7478 * Return codes
7479 * 0 - successful
7480 * other values - error
7481 **/
7482 static int
lpfc_enable_pci_dev(struct lpfc_hba * phba)7483 lpfc_enable_pci_dev(struct lpfc_hba *phba)
7484 {
7485 struct pci_dev *pdev;
7486
7487 /* Obtain PCI device reference */
7488 if (!phba->pcidev)
7489 goto out_error;
7490 else
7491 pdev = phba->pcidev;
7492 /* Enable PCI device */
7493 if (pci_enable_device_mem(pdev))
7494 goto out_error;
7495 /* Request PCI resource for the device */
7496 if (pci_request_mem_regions(pdev, LPFC_DRIVER_NAME))
7497 goto out_disable_device;
7498 /* Set up device as PCI master and save state for EEH */
7499 pci_set_master(pdev);
7500 pci_try_set_mwi(pdev);
7501 pci_save_state(pdev);
7502
7503 /* PCIe EEH recovery on powerpc platforms needs fundamental reset */
7504 if (pci_is_pcie(pdev))
7505 pdev->needs_freset = 1;
7506
7507 return 0;
7508
7509 out_disable_device:
7510 pci_disable_device(pdev);
7511 out_error:
7512 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
7513 "1401 Failed to enable pci device\n");
7514 return -ENODEV;
7515 }
7516
7517 /**
7518 * lpfc_disable_pci_dev - Disable a generic PCI device.
7519 * @phba: pointer to lpfc hba data structure.
7520 *
7521 * This routine is invoked to disable the PCI device that is common to all
7522 * PCI devices.
7523 **/
7524 static void
lpfc_disable_pci_dev(struct lpfc_hba * phba)7525 lpfc_disable_pci_dev(struct lpfc_hba *phba)
7526 {
7527 struct pci_dev *pdev;
7528
7529 /* Obtain PCI device reference */
7530 if (!phba->pcidev)
7531 return;
7532 else
7533 pdev = phba->pcidev;
7534 /* Release PCI resource and disable PCI device */
7535 pci_release_mem_regions(pdev);
7536 pci_disable_device(pdev);
7537
7538 return;
7539 }
7540
7541 /**
7542 * lpfc_reset_hba - Reset a hba
7543 * @phba: pointer to lpfc hba data structure.
7544 *
7545 * This routine is invoked to reset a hba device. It brings the HBA
7546 * offline, performs a board restart, and then brings the board back
7547 * online. The lpfc_offline calls lpfc_sli_hba_down which will clean up
7548 * on outstanding mailbox commands.
7549 **/
7550 void
lpfc_reset_hba(struct lpfc_hba * phba)7551 lpfc_reset_hba(struct lpfc_hba *phba)
7552 {
7553 int rc = 0;
7554
7555 /* If resets are disabled then set error state and return. */
7556 if (!phba->cfg_enable_hba_reset) {
7557 phba->link_state = LPFC_HBA_ERROR;
7558 return;
7559 }
7560
7561 /* If not LPFC_SLI_ACTIVE, force all IO to be flushed */
7562 if (phba->sli.sli_flag & LPFC_SLI_ACTIVE) {
7563 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
7564 } else {
7565 if (test_bit(MBX_TMO_ERR, &phba->bit_flags)) {
7566 /* Perform a PCI function reset to start from clean */
7567 rc = lpfc_pci_function_reset(phba);
7568 lpfc_els_flush_all_cmd(phba);
7569 }
7570 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
7571 lpfc_sli_flush_io_rings(phba);
7572 }
7573 lpfc_offline(phba);
7574 clear_bit(MBX_TMO_ERR, &phba->bit_flags);
7575 if (unlikely(rc)) {
7576 lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
7577 "8888 PCI function reset failed rc %x\n",
7578 rc);
7579 } else {
7580 lpfc_sli_brdrestart(phba);
7581 lpfc_online(phba);
7582 lpfc_unblock_mgmt_io(phba);
7583 }
7584 }
7585
7586 /**
7587 * lpfc_sli_sriov_nr_virtfn_get - Get the number of sr-iov virtual functions
7588 * @phba: pointer to lpfc hba data structure.
7589 *
7590 * This function enables the PCI SR-IOV virtual functions to a physical
7591 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to
7592 * enable the number of virtual functions to the physical function. As
7593 * not all devices support SR-IOV, the return code from the pci_enable_sriov()
7594 * API call does not considered as an error condition for most of the device.
7595 **/
7596 uint16_t
lpfc_sli_sriov_nr_virtfn_get(struct lpfc_hba * phba)7597 lpfc_sli_sriov_nr_virtfn_get(struct lpfc_hba *phba)
7598 {
7599 struct pci_dev *pdev = phba->pcidev;
7600 uint16_t nr_virtfn;
7601 int pos;
7602
7603 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
7604 if (pos == 0)
7605 return 0;
7606
7607 pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF, &nr_virtfn);
7608 return nr_virtfn;
7609 }
7610
7611 /**
7612 * lpfc_sli_probe_sriov_nr_virtfn - Enable a number of sr-iov virtual functions
7613 * @phba: pointer to lpfc hba data structure.
7614 * @nr_vfn: number of virtual functions to be enabled.
7615 *
7616 * This function enables the PCI SR-IOV virtual functions to a physical
7617 * function. It invokes the PCI SR-IOV api with the @nr_vfn provided to
7618 * enable the number of virtual functions to the physical function. As
7619 * not all devices support SR-IOV, the return code from the pci_enable_sriov()
7620 * API call does not considered as an error condition for most of the device.
7621 **/
7622 int
lpfc_sli_probe_sriov_nr_virtfn(struct lpfc_hba * phba,int nr_vfn)7623 lpfc_sli_probe_sriov_nr_virtfn(struct lpfc_hba *phba, int nr_vfn)
7624 {
7625 struct pci_dev *pdev = phba->pcidev;
7626 uint16_t max_nr_vfn;
7627 int rc;
7628
7629 max_nr_vfn = lpfc_sli_sriov_nr_virtfn_get(phba);
7630 if (nr_vfn > max_nr_vfn) {
7631 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
7632 "3057 Requested vfs (%d) greater than "
7633 "supported vfs (%d)", nr_vfn, max_nr_vfn);
7634 return -EINVAL;
7635 }
7636
7637 rc = pci_enable_sriov(pdev, nr_vfn);
7638 if (rc) {
7639 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
7640 "2806 Failed to enable sriov on this device "
7641 "with vfn number nr_vf:%d, rc:%d\n",
7642 nr_vfn, rc);
7643 } else
7644 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
7645 "2807 Successful enable sriov on this device "
7646 "with vfn number nr_vf:%d\n", nr_vfn);
7647 return rc;
7648 }
7649
7650 static void
lpfc_unblock_requests_work(struct work_struct * work)7651 lpfc_unblock_requests_work(struct work_struct *work)
7652 {
7653 struct lpfc_hba *phba = container_of(work, struct lpfc_hba,
7654 unblock_request_work);
7655
7656 lpfc_unblock_requests(phba);
7657 }
7658
7659 /**
7660 * lpfc_setup_driver_resource_phase1 - Phase1 etup driver internal resources.
7661 * @phba: pointer to lpfc hba data structure.
7662 *
7663 * This routine is invoked to set up the driver internal resources before the
7664 * device specific resource setup to support the HBA device it attached to.
7665 *
7666 * Return codes
7667 * 0 - successful
7668 * other values - error
7669 **/
7670 static int
lpfc_setup_driver_resource_phase1(struct lpfc_hba * phba)7671 lpfc_setup_driver_resource_phase1(struct lpfc_hba *phba)
7672 {
7673 struct lpfc_sli *psli = &phba->sli;
7674
7675 /*
7676 * Driver resources common to all SLI revisions
7677 */
7678 atomic_set(&phba->fast_event_count, 0);
7679 atomic_set(&phba->dbg_log_idx, 0);
7680 atomic_set(&phba->dbg_log_cnt, 0);
7681 atomic_set(&phba->dbg_log_dmping, 0);
7682 spin_lock_init(&phba->hbalock);
7683
7684 /* Initialize port_list spinlock */
7685 spin_lock_init(&phba->port_list_lock);
7686 INIT_LIST_HEAD(&phba->port_list);
7687
7688 INIT_LIST_HEAD(&phba->work_list);
7689
7690 /* Initialize the wait queue head for the kernel thread */
7691 init_waitqueue_head(&phba->work_waitq);
7692
7693 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
7694 "1403 Protocols supported %s %s %s\n",
7695 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) ?
7696 "SCSI" : " "),
7697 ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) ?
7698 "NVME" : " "),
7699 (phba->nvmet_support ? "NVMET" : " "));
7700
7701 /* ras_fwlog state */
7702 spin_lock_init(&phba->ras_fwlog_lock);
7703
7704 /* Initialize the IO buffer list used by driver for SLI3 SCSI */
7705 spin_lock_init(&phba->scsi_buf_list_get_lock);
7706 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_get);
7707 spin_lock_init(&phba->scsi_buf_list_put_lock);
7708 INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list_put);
7709
7710 /* Initialize the fabric iocb list */
7711 INIT_LIST_HEAD(&phba->fabric_iocb_list);
7712
7713 /* Initialize list to save ELS buffers */
7714 INIT_LIST_HEAD(&phba->elsbuf);
7715
7716 /* Initialize FCF connection rec list */
7717 INIT_LIST_HEAD(&phba->fcf_conn_rec_list);
7718
7719 /* Initialize OAS configuration list */
7720 spin_lock_init(&phba->devicelock);
7721 INIT_LIST_HEAD(&phba->luns);
7722
7723 /* MBOX heartbeat timer */
7724 timer_setup(&psli->mbox_tmo, lpfc_mbox_timeout, 0);
7725 /* Fabric block timer */
7726 timer_setup(&phba->fabric_block_timer, lpfc_fabric_block_timeout, 0);
7727 /* EA polling mode timer */
7728 timer_setup(&phba->eratt_poll, lpfc_poll_eratt, 0);
7729 /* Heartbeat timer */
7730 timer_setup(&phba->hb_tmofunc, lpfc_hb_timeout, 0);
7731
7732 INIT_DELAYED_WORK(&phba->eq_delay_work, lpfc_hb_eq_delay_work);
7733
7734 INIT_DELAYED_WORK(&phba->idle_stat_delay_work,
7735 lpfc_idle_stat_delay_work);
7736 INIT_WORK(&phba->unblock_request_work, lpfc_unblock_requests_work);
7737 return 0;
7738 }
7739
7740 /**
7741 * lpfc_sli_driver_resource_setup - Setup driver internal resources for SLI3 dev
7742 * @phba: pointer to lpfc hba data structure.
7743 *
7744 * This routine is invoked to set up the driver internal resources specific to
7745 * support the SLI-3 HBA device it attached to.
7746 *
7747 * Return codes
7748 * 0 - successful
7749 * other values - error
7750 **/
7751 static int
lpfc_sli_driver_resource_setup(struct lpfc_hba * phba)7752 lpfc_sli_driver_resource_setup(struct lpfc_hba *phba)
7753 {
7754 int rc, entry_sz;
7755
7756 /*
7757 * Initialize timers used by driver
7758 */
7759
7760 /* FCP polling mode timer */
7761 timer_setup(&phba->fcp_poll_timer, lpfc_poll_timeout, 0);
7762
7763 /* Host attention work mask setup */
7764 phba->work_ha_mask = (HA_ERATT | HA_MBATT | HA_LATT);
7765 phba->work_ha_mask |= (HA_RXMASK << (LPFC_ELS_RING * 4));
7766
7767 /* Get all the module params for configuring this host */
7768 lpfc_get_cfgparam(phba);
7769 /* Set up phase-1 common device driver resources */
7770
7771 rc = lpfc_setup_driver_resource_phase1(phba);
7772 if (rc)
7773 return -ENODEV;
7774
7775 if (!phba->sli.sli3_ring)
7776 phba->sli.sli3_ring = kcalloc(LPFC_SLI3_MAX_RING,
7777 sizeof(struct lpfc_sli_ring),
7778 GFP_KERNEL);
7779 if (!phba->sli.sli3_ring)
7780 return -ENOMEM;
7781
7782 /*
7783 * Since lpfc_sg_seg_cnt is module parameter, the sg_dma_buf_size
7784 * used to create the sg_dma_buf_pool must be dynamically calculated.
7785 */
7786
7787 if (phba->sli_rev == LPFC_SLI_REV4)
7788 entry_sz = sizeof(struct sli4_sge);
7789 else
7790 entry_sz = sizeof(struct ulp_bde64);
7791
7792 /* There are going to be 2 reserved BDEs: 1 FCP cmnd + 1 FCP rsp */
7793 if (phba->cfg_enable_bg) {
7794 /*
7795 * The scsi_buf for a T10-DIF I/O will hold the FCP cmnd,
7796 * the FCP rsp, and a BDE for each. Sice we have no control
7797 * over how many protection data segments the SCSI Layer
7798 * will hand us (ie: there could be one for every block
7799 * in the IO), we just allocate enough BDEs to accomidate
7800 * our max amount and we need to limit lpfc_sg_seg_cnt to
7801 * minimize the risk of running out.
7802 */
7803 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
7804 sizeof(struct fcp_rsp) +
7805 (LPFC_MAX_SG_SEG_CNT * entry_sz);
7806
7807 if (phba->cfg_sg_seg_cnt > LPFC_MAX_SG_SEG_CNT_DIF)
7808 phba->cfg_sg_seg_cnt = LPFC_MAX_SG_SEG_CNT_DIF;
7809
7810 /* Total BDEs in BPL for scsi_sg_list and scsi_sg_prot_list */
7811 phba->cfg_total_seg_cnt = LPFC_MAX_SG_SEG_CNT;
7812 } else {
7813 /*
7814 * The scsi_buf for a regular I/O will hold the FCP cmnd,
7815 * the FCP rsp, a BDE for each, and a BDE for up to
7816 * cfg_sg_seg_cnt data segments.
7817 */
7818 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) +
7819 sizeof(struct fcp_rsp) +
7820 ((phba->cfg_sg_seg_cnt + 2) * entry_sz);
7821
7822 /* Total BDEs in BPL for scsi_sg_list */
7823 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + 2;
7824 }
7825
7826 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
7827 "9088 INIT sg_tablesize:%d dmabuf_size:%d total_bde:%d\n",
7828 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
7829 phba->cfg_total_seg_cnt);
7830
7831 phba->max_vpi = LPFC_MAX_VPI;
7832 /* This will be set to correct value after config_port mbox */
7833 phba->max_vports = 0;
7834
7835 /*
7836 * Initialize the SLI Layer to run with lpfc HBAs.
7837 */
7838 lpfc_sli_setup(phba);
7839 lpfc_sli_queue_init(phba);
7840
7841 /* Allocate device driver memory */
7842 if (lpfc_mem_alloc(phba, BPL_ALIGN_SZ))
7843 return -ENOMEM;
7844
7845 phba->lpfc_sg_dma_buf_pool =
7846 dma_pool_create("lpfc_sg_dma_buf_pool",
7847 &phba->pcidev->dev, phba->cfg_sg_dma_buf_size,
7848 BPL_ALIGN_SZ, 0);
7849
7850 if (!phba->lpfc_sg_dma_buf_pool)
7851 goto fail_free_mem;
7852
7853 phba->lpfc_cmd_rsp_buf_pool =
7854 dma_pool_create("lpfc_cmd_rsp_buf_pool",
7855 &phba->pcidev->dev,
7856 sizeof(struct fcp_cmnd) +
7857 sizeof(struct fcp_rsp),
7858 BPL_ALIGN_SZ, 0);
7859
7860 if (!phba->lpfc_cmd_rsp_buf_pool)
7861 goto fail_free_dma_buf_pool;
7862
7863 /*
7864 * Enable sr-iov virtual functions if supported and configured
7865 * through the module parameter.
7866 */
7867 if (phba->cfg_sriov_nr_virtfn > 0) {
7868 rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
7869 phba->cfg_sriov_nr_virtfn);
7870 if (rc) {
7871 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
7872 "2808 Requested number of SR-IOV "
7873 "virtual functions (%d) is not "
7874 "supported\n",
7875 phba->cfg_sriov_nr_virtfn);
7876 phba->cfg_sriov_nr_virtfn = 0;
7877 }
7878 }
7879
7880 return 0;
7881
7882 fail_free_dma_buf_pool:
7883 dma_pool_destroy(phba->lpfc_sg_dma_buf_pool);
7884 phba->lpfc_sg_dma_buf_pool = NULL;
7885 fail_free_mem:
7886 lpfc_mem_free(phba);
7887 return -ENOMEM;
7888 }
7889
7890 /**
7891 * lpfc_sli_driver_resource_unset - Unset drvr internal resources for SLI3 dev
7892 * @phba: pointer to lpfc hba data structure.
7893 *
7894 * This routine is invoked to unset the driver internal resources set up
7895 * specific for supporting the SLI-3 HBA device it attached to.
7896 **/
7897 static void
lpfc_sli_driver_resource_unset(struct lpfc_hba * phba)7898 lpfc_sli_driver_resource_unset(struct lpfc_hba *phba)
7899 {
7900 /* Free device driver memory allocated */
7901 lpfc_mem_free_all(phba);
7902
7903 return;
7904 }
7905
7906 /**
7907 * lpfc_sli4_driver_resource_setup - Setup drvr internal resources for SLI4 dev
7908 * @phba: pointer to lpfc hba data structure.
7909 *
7910 * This routine is invoked to set up the driver internal resources specific to
7911 * support the SLI-4 HBA device it attached to.
7912 *
7913 * Return codes
7914 * 0 - successful
7915 * other values - error
7916 **/
7917 static int
lpfc_sli4_driver_resource_setup(struct lpfc_hba * phba)7918 lpfc_sli4_driver_resource_setup(struct lpfc_hba *phba)
7919 {
7920 LPFC_MBOXQ_t *mboxq;
7921 MAILBOX_t *mb;
7922 int rc, i, max_buf_size;
7923 int longs;
7924 int extra;
7925 uint64_t wwn;
7926
7927 phba->sli4_hba.num_present_cpu = lpfc_present_cpu;
7928 phba->sli4_hba.num_possible_cpu = cpumask_last(cpu_possible_mask) + 1;
7929 phba->sli4_hba.curr_disp_cpu = 0;
7930
7931 /* Get all the module params for configuring this host */
7932 lpfc_get_cfgparam(phba);
7933
7934 /* Set up phase-1 common device driver resources */
7935 rc = lpfc_setup_driver_resource_phase1(phba);
7936 if (rc)
7937 return -ENODEV;
7938
7939 /* Before proceed, wait for POST done and device ready */
7940 rc = lpfc_sli4_post_status_check(phba);
7941 if (rc)
7942 return -ENODEV;
7943
7944 /* Allocate all driver workqueues here */
7945
7946 /* The lpfc_wq workqueue for deferred irq use */
7947 phba->wq = alloc_workqueue("lpfc_wq", WQ_MEM_RECLAIM | WQ_PERCPU, 0);
7948 if (!phba->wq)
7949 return -ENOMEM;
7950
7951 /*
7952 * Initialize timers used by driver
7953 */
7954
7955 timer_setup(&phba->rrq_tmr, lpfc_rrq_timeout, 0);
7956
7957 /* FCF rediscover timer */
7958 timer_setup(&phba->fcf.redisc_wait, lpfc_sli4_fcf_redisc_wait_tmo, 0);
7959
7960 /* CMF congestion timer */
7961 hrtimer_setup(&phba->cmf_timer, lpfc_cmf_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
7962 /* CMF 1 minute stats collection timer */
7963 hrtimer_setup(&phba->cmf_stats_timer, lpfc_cmf_stats_timer, CLOCK_MONOTONIC,
7964 HRTIMER_MODE_REL);
7965
7966 /*
7967 * Control structure for handling external multi-buffer mailbox
7968 * command pass-through.
7969 */
7970 memset((uint8_t *)&phba->mbox_ext_buf_ctx, 0,
7971 sizeof(struct lpfc_mbox_ext_buf_ctx));
7972 INIT_LIST_HEAD(&phba->mbox_ext_buf_ctx.ext_dmabuf_list);
7973
7974 phba->max_vpi = LPFC_MAX_VPI;
7975
7976 /* This will be set to correct value after the read_config mbox */
7977 phba->max_vports = 0;
7978
7979 /* Program the default value of vlan_id and fc_map */
7980 phba->valid_vlan = 0;
7981 phba->fc_map[0] = LPFC_FCOE_FCF_MAP0;
7982 phba->fc_map[1] = LPFC_FCOE_FCF_MAP1;
7983 phba->fc_map[2] = LPFC_FCOE_FCF_MAP2;
7984
7985 /*
7986 * For SLI4, instead of using ring 0 (LPFC_FCP_RING) for FCP commands
7987 * we will associate a new ring, for each EQ/CQ/WQ tuple.
7988 * The WQ create will allocate the ring.
7989 */
7990
7991 /* Initialize buffer queue management fields */
7992 INIT_LIST_HEAD(&phba->hbqs[LPFC_ELS_HBQ].hbq_buffer_list);
7993 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_sli4_rb_alloc;
7994 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_sli4_rb_free;
7995
7996 /* for VMID idle timeout if VMID is enabled */
7997 if (lpfc_is_vmid_enabled(phba))
7998 timer_setup(&phba->inactive_vmid_poll, lpfc_vmid_poll, 0);
7999
8000 /*
8001 * Initialize the SLI Layer to run with lpfc SLI4 HBAs.
8002 */
8003 /* Initialize the Abort buffer list used by driver */
8004 spin_lock_init(&phba->sli4_hba.abts_io_buf_list_lock);
8005 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_io_buf_list);
8006
8007 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
8008 /* Initialize the Abort nvme buffer list used by driver */
8009 spin_lock_init(&phba->sli4_hba.abts_nvmet_buf_list_lock);
8010 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
8011 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_io_wait_list);
8012 spin_lock_init(&phba->sli4_hba.t_active_list_lock);
8013 INIT_LIST_HEAD(&phba->sli4_hba.t_active_ctx_list);
8014 }
8015
8016 /* This abort list used by worker thread */
8017 spin_lock_init(&phba->sli4_hba.sgl_list_lock);
8018 spin_lock_init(&phba->sli4_hba.nvmet_io_wait_lock);
8019 spin_lock_init(&phba->sli4_hba.asynce_list_lock);
8020 spin_lock_init(&phba->sli4_hba.els_xri_abrt_list_lock);
8021
8022 /*
8023 * Initialize driver internal slow-path work queues
8024 */
8025
8026 /* Driver internel slow-path CQ Event pool */
8027 INIT_LIST_HEAD(&phba->sli4_hba.sp_cqe_event_pool);
8028 /* Response IOCB work queue list */
8029 INIT_LIST_HEAD(&phba->sli4_hba.sp_queue_event);
8030 /* Asynchronous event CQ Event work queue list */
8031 INIT_LIST_HEAD(&phba->sli4_hba.sp_asynce_work_queue);
8032 /* Slow-path XRI aborted CQ Event work queue list */
8033 INIT_LIST_HEAD(&phba->sli4_hba.sp_els_xri_aborted_work_queue);
8034 /* Receive queue CQ Event work queue list */
8035 INIT_LIST_HEAD(&phba->sli4_hba.sp_unsol_work_queue);
8036
8037 /* Initialize extent block lists. */
8038 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_blk_list);
8039 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_xri_blk_list);
8040 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_vfi_blk_list);
8041 INIT_LIST_HEAD(&phba->lpfc_vpi_blk_list);
8042
8043 /* Initialize mboxq lists. If the early init routines fail
8044 * these lists need to be correctly initialized.
8045 */
8046 INIT_LIST_HEAD(&phba->sli.mboxq);
8047 INIT_LIST_HEAD(&phba->sli.mboxq_cmpl);
8048
8049 /* initialize optic_state to 0xFF */
8050 phba->sli4_hba.lnk_info.optic_state = 0xff;
8051
8052 /* Allocate device driver memory */
8053 rc = lpfc_mem_alloc(phba, SGL_ALIGN_SZ);
8054 if (rc)
8055 goto out_destroy_workqueue;
8056
8057 /* IF Type 2 ports get initialized now. */
8058 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) >=
8059 LPFC_SLI_INTF_IF_TYPE_2) {
8060 rc = lpfc_pci_function_reset(phba);
8061 if (unlikely(rc)) {
8062 rc = -ENODEV;
8063 goto out_free_mem;
8064 }
8065 phba->temp_sensor_support = 1;
8066 }
8067
8068 /* Create the bootstrap mailbox command */
8069 rc = lpfc_create_bootstrap_mbox(phba);
8070 if (unlikely(rc))
8071 goto out_free_mem;
8072
8073 /* Set up the host's endian order with the device. */
8074 rc = lpfc_setup_endian_order(phba);
8075 if (unlikely(rc))
8076 goto out_free_bsmbx;
8077
8078 /* Set up the hba's configuration parameters. */
8079 rc = lpfc_sli4_read_config(phba);
8080 if (unlikely(rc))
8081 goto out_free_bsmbx;
8082
8083 if (phba->sli4_hba.fawwpn_flag & LPFC_FAWWPN_CONFIG) {
8084 /* Right now the link is down, if FA-PWWN is configured the
8085 * firmware will try FLOGI before the driver gets a link up.
8086 * If it fails, the driver should get a MISCONFIGURED async
8087 * event which will clear this flag. The only notification
8088 * the driver gets is if it fails, if it succeeds there is no
8089 * notification given. Assume success.
8090 */
8091 phba->sli4_hba.fawwpn_flag |= LPFC_FAWWPN_FABRIC;
8092 }
8093
8094 rc = lpfc_mem_alloc_active_rrq_pool_s4(phba);
8095 if (unlikely(rc))
8096 goto out_free_bsmbx;
8097
8098 /* IF Type 0 ports get initialized now. */
8099 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
8100 LPFC_SLI_INTF_IF_TYPE_0) {
8101 rc = lpfc_pci_function_reset(phba);
8102 if (unlikely(rc))
8103 goto out_free_bsmbx;
8104 }
8105
8106 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
8107 GFP_KERNEL);
8108 if (!mboxq) {
8109 rc = -ENOMEM;
8110 goto out_free_bsmbx;
8111 }
8112
8113 /* Check for NVMET being configured */
8114 phba->nvmet_support = 0;
8115 if (lpfc_enable_nvmet_cnt) {
8116
8117 /* First get WWN of HBA instance */
8118 lpfc_read_nv(phba, mboxq);
8119 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
8120 if (rc != MBX_SUCCESS) {
8121 lpfc_printf_log(phba, KERN_ERR,
8122 LOG_TRACE_EVENT,
8123 "6016 Mailbox failed , mbxCmd x%x "
8124 "READ_NV, mbxStatus x%x\n",
8125 bf_get(lpfc_mqe_command, &mboxq->u.mqe),
8126 bf_get(lpfc_mqe_status, &mboxq->u.mqe));
8127 mempool_free(mboxq, phba->mbox_mem_pool);
8128 rc = -EIO;
8129 goto out_free_bsmbx;
8130 }
8131 mb = &mboxq->u.mb;
8132 memcpy(&wwn, (char *)mb->un.varRDnvp.nodename,
8133 sizeof(uint64_t));
8134 wwn = cpu_to_be64(wwn);
8135 phba->sli4_hba.wwnn.u.name = wwn;
8136 memcpy(&wwn, (char *)mb->un.varRDnvp.portname,
8137 sizeof(uint64_t));
8138 /* wwn is WWPN of HBA instance */
8139 wwn = cpu_to_be64(wwn);
8140 phba->sli4_hba.wwpn.u.name = wwn;
8141
8142 /* Check to see if it matches any module parameter */
8143 for (i = 0; i < lpfc_enable_nvmet_cnt; i++) {
8144 if (wwn == lpfc_enable_nvmet[i]) {
8145 #if (IS_ENABLED(CONFIG_NVME_TARGET_FC))
8146 if (lpfc_nvmet_mem_alloc(phba))
8147 break;
8148
8149 phba->nvmet_support = 1; /* a match */
8150
8151 lpfc_printf_log(phba, KERN_ERR,
8152 LOG_TRACE_EVENT,
8153 "6017 NVME Target %016llx\n",
8154 wwn);
8155 #else
8156 lpfc_printf_log(phba, KERN_ERR,
8157 LOG_TRACE_EVENT,
8158 "6021 Can't enable NVME Target."
8159 " NVME_TARGET_FC infrastructure"
8160 " is not in kernel\n");
8161 #endif
8162 /* Not supported for NVMET */
8163 phba->cfg_xri_rebalancing = 0;
8164 if (phba->irq_chann_mode == NHT_MODE) {
8165 phba->cfg_irq_chann =
8166 phba->sli4_hba.num_present_cpu;
8167 phba->cfg_hdw_queue =
8168 phba->sli4_hba.num_present_cpu;
8169 phba->irq_chann_mode = NORMAL_MODE;
8170 }
8171 break;
8172 }
8173 }
8174 }
8175
8176 lpfc_nvme_mod_param_dep(phba);
8177
8178 /*
8179 * Get sli4 parameters that override parameters from Port capabilities.
8180 * If this call fails, it isn't critical unless the SLI4 parameters come
8181 * back in conflict.
8182 */
8183 rc = lpfc_get_sli4_parameters(phba, mboxq);
8184 if (rc) {
8185 lpfc_log_msg(phba, KERN_WARNING, LOG_INIT,
8186 "2999 Could not get SLI4 parameters\n");
8187 rc = -EIO;
8188 mempool_free(mboxq, phba->mbox_mem_pool);
8189 goto out_free_bsmbx;
8190 }
8191
8192 /*
8193 * 1 for cmd, 1 for rsp, NVME adds an extra one
8194 * for boundary conditions in its max_sgl_segment template.
8195 */
8196 extra = 2;
8197 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
8198 extra++;
8199
8200 /*
8201 * It doesn't matter what family our adapter is in, we are
8202 * limited to 2 Pages, 512 SGEs, for our SGL.
8203 * There are going to be 2 reserved SGEs: 1 FCP cmnd + 1 FCP rsp
8204 */
8205 max_buf_size = (2 * SLI4_PAGE_SIZE);
8206
8207 /*
8208 * Since lpfc_sg_seg_cnt is module param, the sg_dma_buf_size
8209 * used to create the sg_dma_buf_pool must be calculated.
8210 */
8211 if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) {
8212 /* Both cfg_enable_bg and cfg_external_dif code paths */
8213
8214 /*
8215 * The scsi_buf for a T10-DIF I/O holds the FCP cmnd,
8216 * the FCP rsp, and a SGE. Sice we have no control
8217 * over how many protection segments the SCSI Layer
8218 * will hand us (ie: there could be one for every block
8219 * in the IO), just allocate enough SGEs to accomidate
8220 * our max amount and we need to limit lpfc_sg_seg_cnt
8221 * to minimize the risk of running out.
8222 */
8223 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd32) +
8224 sizeof(struct fcp_rsp) + max_buf_size;
8225
8226 /* Total SGEs for scsi_sg_list and scsi_sg_prot_list */
8227 phba->cfg_total_seg_cnt = LPFC_MAX_SGL_SEG_CNT;
8228
8229 /*
8230 * If supporting DIF, reduce the seg count for scsi to
8231 * allow room for the DIF sges.
8232 */
8233 if (phba->cfg_enable_bg &&
8234 phba->cfg_sg_seg_cnt > LPFC_MAX_BG_SLI4_SEG_CNT_DIF)
8235 phba->cfg_scsi_seg_cnt = LPFC_MAX_BG_SLI4_SEG_CNT_DIF;
8236 else
8237 phba->cfg_scsi_seg_cnt = phba->cfg_sg_seg_cnt;
8238
8239 } else {
8240 /*
8241 * The scsi_buf for a regular I/O holds the FCP cmnd,
8242 * the FCP rsp, a SGE for each, and a SGE for up to
8243 * cfg_sg_seg_cnt data segments.
8244 */
8245 phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd32) +
8246 sizeof(struct fcp_rsp) +
8247 ((phba->cfg_sg_seg_cnt + extra) *
8248 sizeof(struct sli4_sge));
8249
8250 /* Total SGEs for scsi_sg_list */
8251 phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + extra;
8252 phba->cfg_scsi_seg_cnt = phba->cfg_sg_seg_cnt;
8253
8254 /*
8255 * NOTE: if (phba->cfg_sg_seg_cnt + extra) <= 256 we only
8256 * need to post 1 page for the SGL.
8257 */
8258 }
8259
8260 if (phba->cfg_xpsgl && !phba->nvmet_support)
8261 phba->cfg_sg_dma_buf_size = LPFC_DEFAULT_XPSGL_SIZE;
8262 else if (phba->cfg_sg_dma_buf_size <= LPFC_MIN_SG_SLI4_BUF_SZ)
8263 phba->cfg_sg_dma_buf_size = LPFC_MIN_SG_SLI4_BUF_SZ;
8264 else
8265 phba->cfg_sg_dma_buf_size =
8266 SLI4_PAGE_ALIGN(phba->cfg_sg_dma_buf_size);
8267
8268 phba->border_sge_num = phba->cfg_sg_dma_buf_size /
8269 sizeof(struct sli4_sge);
8270
8271 /* Limit to LPFC_MAX_NVME_SEG_CNT for NVME. */
8272 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
8273 if (phba->cfg_sg_seg_cnt > LPFC_MAX_NVME_SEG_CNT) {
8274 lpfc_printf_log(phba, KERN_INFO, LOG_NVME | LOG_INIT,
8275 "6300 Reducing NVME sg segment "
8276 "cnt to %d\n",
8277 LPFC_MAX_NVME_SEG_CNT);
8278 phba->cfg_nvme_seg_cnt = LPFC_MAX_NVME_SEG_CNT;
8279 } else
8280 phba->cfg_nvme_seg_cnt = phba->cfg_sg_seg_cnt;
8281 }
8282
8283 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP,
8284 "9087 sg_seg_cnt:%d dmabuf_size:%d "
8285 "total:%d scsi:%d nvme:%d\n",
8286 phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size,
8287 phba->cfg_total_seg_cnt, phba->cfg_scsi_seg_cnt,
8288 phba->cfg_nvme_seg_cnt);
8289
8290 i = min(phba->cfg_sg_dma_buf_size, SLI4_PAGE_SIZE);
8291
8292 phba->lpfc_sg_dma_buf_pool =
8293 dma_pool_create("lpfc_sg_dma_buf_pool",
8294 &phba->pcidev->dev,
8295 phba->cfg_sg_dma_buf_size,
8296 i, 0);
8297 if (!phba->lpfc_sg_dma_buf_pool) {
8298 rc = -ENOMEM;
8299 goto out_free_bsmbx;
8300 }
8301
8302 phba->lpfc_cmd_rsp_buf_pool =
8303 dma_pool_create("lpfc_cmd_rsp_buf_pool",
8304 &phba->pcidev->dev,
8305 sizeof(struct fcp_cmnd32) +
8306 sizeof(struct fcp_rsp),
8307 i, 0);
8308 if (!phba->lpfc_cmd_rsp_buf_pool) {
8309 rc = -ENOMEM;
8310 goto out_free_sg_dma_buf;
8311 }
8312
8313 mempool_free(mboxq, phba->mbox_mem_pool);
8314
8315 /* Verify OAS is supported */
8316 lpfc_sli4_oas_verify(phba);
8317
8318 /* Verify RAS support on adapter */
8319 lpfc_sli4_ras_init(phba);
8320
8321 /* Verify all the SLI4 queues */
8322 rc = lpfc_sli4_queue_verify(phba);
8323 if (rc)
8324 goto out_free_cmd_rsp_buf;
8325
8326 /* Create driver internal CQE event pool */
8327 rc = lpfc_sli4_cq_event_pool_create(phba);
8328 if (rc)
8329 goto out_free_cmd_rsp_buf;
8330
8331 /* Initialize sgl lists per host */
8332 lpfc_init_sgl_list(phba);
8333
8334 /* Allocate and initialize active sgl array */
8335 rc = lpfc_init_active_sgl_array(phba);
8336 if (rc) {
8337 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8338 "1430 Failed to initialize sgl list.\n");
8339 goto out_destroy_cq_event_pool;
8340 }
8341 rc = lpfc_sli4_init_rpi_hdrs(phba);
8342 if (rc) {
8343 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8344 "1432 Failed to initialize rpi headers.\n");
8345 goto out_free_active_sgl;
8346 }
8347
8348 /* Allocate eligible FCF bmask memory for FCF roundrobin failover */
8349 longs = (LPFC_SLI4_FCF_TBL_INDX_MAX + BITS_PER_LONG - 1)/BITS_PER_LONG;
8350 phba->fcf.fcf_rr_bmask = kcalloc(longs, sizeof(unsigned long),
8351 GFP_KERNEL);
8352 if (!phba->fcf.fcf_rr_bmask) {
8353 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8354 "2759 Failed allocate memory for FCF round "
8355 "robin failover bmask\n");
8356 rc = -ENOMEM;
8357 goto out_remove_rpi_hdrs;
8358 }
8359
8360 phba->sli4_hba.hba_eq_hdl = kcalloc(phba->cfg_irq_chann,
8361 sizeof(struct lpfc_hba_eq_hdl),
8362 GFP_KERNEL);
8363 if (!phba->sli4_hba.hba_eq_hdl) {
8364 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8365 "2572 Failed allocate memory for "
8366 "fast-path per-EQ handle array\n");
8367 rc = -ENOMEM;
8368 goto out_free_fcf_rr_bmask;
8369 }
8370
8371 phba->sli4_hba.cpu_map = kcalloc(phba->sli4_hba.num_possible_cpu,
8372 sizeof(struct lpfc_vector_map_info),
8373 GFP_KERNEL);
8374 if (!phba->sli4_hba.cpu_map) {
8375 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8376 "3327 Failed allocate memory for msi-x "
8377 "interrupt vector mapping\n");
8378 rc = -ENOMEM;
8379 goto out_free_hba_eq_hdl;
8380 }
8381
8382 phba->sli4_hba.eq_info = alloc_percpu(struct lpfc_eq_intr_info);
8383 if (!phba->sli4_hba.eq_info) {
8384 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8385 "3321 Failed allocation for per_cpu stats\n");
8386 rc = -ENOMEM;
8387 goto out_free_hba_cpu_map;
8388 }
8389
8390 phba->sli4_hba.idle_stat = kcalloc(phba->sli4_hba.num_possible_cpu,
8391 sizeof(*phba->sli4_hba.idle_stat),
8392 GFP_KERNEL);
8393 if (!phba->sli4_hba.idle_stat) {
8394 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8395 "3390 Failed allocation for idle_stat\n");
8396 rc = -ENOMEM;
8397 goto out_free_hba_eq_info;
8398 }
8399
8400 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
8401 phba->sli4_hba.c_stat = alloc_percpu(struct lpfc_hdwq_stat);
8402 if (!phba->sli4_hba.c_stat) {
8403 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8404 "3332 Failed allocating per cpu hdwq stats\n");
8405 rc = -ENOMEM;
8406 goto out_free_hba_idle_stat;
8407 }
8408 #endif
8409
8410 phba->cmf_stat = alloc_percpu(struct lpfc_cgn_stat);
8411 if (!phba->cmf_stat) {
8412 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8413 "3331 Failed allocating per cpu cgn stats\n");
8414 rc = -ENOMEM;
8415 goto out_free_hba_hdwq_info;
8416 }
8417
8418 /*
8419 * Enable sr-iov virtual functions if supported and configured
8420 * through the module parameter.
8421 */
8422 if (phba->cfg_sriov_nr_virtfn > 0) {
8423 rc = lpfc_sli_probe_sriov_nr_virtfn(phba,
8424 phba->cfg_sriov_nr_virtfn);
8425 if (rc) {
8426 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
8427 "3020 Requested number of SR-IOV "
8428 "virtual functions (%d) is not "
8429 "supported\n",
8430 phba->cfg_sriov_nr_virtfn);
8431 phba->cfg_sriov_nr_virtfn = 0;
8432 }
8433 }
8434
8435 return 0;
8436
8437 out_free_hba_hdwq_info:
8438 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
8439 free_percpu(phba->sli4_hba.c_stat);
8440 out_free_hba_idle_stat:
8441 #endif
8442 kfree(phba->sli4_hba.idle_stat);
8443 out_free_hba_eq_info:
8444 free_percpu(phba->sli4_hba.eq_info);
8445 out_free_hba_cpu_map:
8446 kfree(phba->sli4_hba.cpu_map);
8447 out_free_hba_eq_hdl:
8448 kfree(phba->sli4_hba.hba_eq_hdl);
8449 out_free_fcf_rr_bmask:
8450 kfree(phba->fcf.fcf_rr_bmask);
8451 out_remove_rpi_hdrs:
8452 lpfc_sli4_remove_rpi_hdrs(phba);
8453 out_free_active_sgl:
8454 lpfc_free_active_sgl(phba);
8455 out_destroy_cq_event_pool:
8456 lpfc_sli4_cq_event_pool_destroy(phba);
8457 out_free_cmd_rsp_buf:
8458 dma_pool_destroy(phba->lpfc_cmd_rsp_buf_pool);
8459 phba->lpfc_cmd_rsp_buf_pool = NULL;
8460 out_free_sg_dma_buf:
8461 dma_pool_destroy(phba->lpfc_sg_dma_buf_pool);
8462 phba->lpfc_sg_dma_buf_pool = NULL;
8463 out_free_bsmbx:
8464 lpfc_destroy_bootstrap_mbox(phba);
8465 out_free_mem:
8466 lpfc_mem_free(phba);
8467 out_destroy_workqueue:
8468 destroy_workqueue(phba->wq);
8469 phba->wq = NULL;
8470 return rc;
8471 }
8472
8473 /**
8474 * lpfc_sli4_driver_resource_unset - Unset drvr internal resources for SLI4 dev
8475 * @phba: pointer to lpfc hba data structure.
8476 *
8477 * This routine is invoked to unset the driver internal resources set up
8478 * specific for supporting the SLI-4 HBA device it attached to.
8479 **/
8480 static void
lpfc_sli4_driver_resource_unset(struct lpfc_hba * phba)8481 lpfc_sli4_driver_resource_unset(struct lpfc_hba *phba)
8482 {
8483 struct lpfc_fcf_conn_entry *conn_entry, *next_conn_entry;
8484
8485 free_percpu(phba->sli4_hba.eq_info);
8486 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
8487 free_percpu(phba->sli4_hba.c_stat);
8488 #endif
8489 free_percpu(phba->cmf_stat);
8490 kfree(phba->sli4_hba.idle_stat);
8491
8492 /* Free memory allocated for msi-x interrupt vector to CPU mapping */
8493 kfree(phba->sli4_hba.cpu_map);
8494 phba->sli4_hba.num_possible_cpu = 0;
8495 phba->sli4_hba.num_present_cpu = 0;
8496 phba->sli4_hba.curr_disp_cpu = 0;
8497 cpumask_clear(&phba->sli4_hba.irq_aff_mask);
8498
8499 /* Free memory allocated for fast-path work queue handles */
8500 kfree(phba->sli4_hba.hba_eq_hdl);
8501
8502 /* Free the allocated rpi headers. */
8503 lpfc_sli4_remove_rpi_hdrs(phba);
8504 lpfc_sli4_remove_rpis(phba);
8505
8506 /* Free eligible FCF index bmask */
8507 kfree(phba->fcf.fcf_rr_bmask);
8508
8509 /* Free the ELS sgl list */
8510 lpfc_free_active_sgl(phba);
8511 lpfc_free_els_sgl_list(phba);
8512 lpfc_free_nvmet_sgl_list(phba);
8513
8514 /* Free the completion queue EQ event pool */
8515 lpfc_sli4_cq_event_release_all(phba);
8516 lpfc_sli4_cq_event_pool_destroy(phba);
8517
8518 /* Release resource identifiers. */
8519 lpfc_sli4_dealloc_resource_identifiers(phba);
8520
8521 /* Free the bsmbx region. */
8522 lpfc_destroy_bootstrap_mbox(phba);
8523
8524 /* Free the SLI Layer memory with SLI4 HBAs */
8525 lpfc_mem_free_all(phba);
8526
8527 /* Free the current connect table */
8528 list_for_each_entry_safe(conn_entry, next_conn_entry,
8529 &phba->fcf_conn_rec_list, list) {
8530 list_del_init(&conn_entry->list);
8531 kfree(conn_entry);
8532 }
8533
8534 return;
8535 }
8536
8537 /**
8538 * lpfc_init_api_table_setup - Set up init api function jump table
8539 * @phba: The hba struct for which this call is being executed.
8540 * @dev_grp: The HBA PCI-Device group number.
8541 *
8542 * This routine sets up the device INIT interface API function jump table
8543 * in @phba struct.
8544 *
8545 * Returns: 0 - success, -ENODEV - failure.
8546 **/
8547 int
lpfc_init_api_table_setup(struct lpfc_hba * phba,uint8_t dev_grp)8548 lpfc_init_api_table_setup(struct lpfc_hba *phba, uint8_t dev_grp)
8549 {
8550 phba->lpfc_hba_init_link = lpfc_hba_init_link;
8551 phba->lpfc_hba_down_link = lpfc_hba_down_link;
8552 phba->lpfc_selective_reset = lpfc_selective_reset;
8553 switch (dev_grp) {
8554 case LPFC_PCI_DEV_LP:
8555 phba->lpfc_hba_down_post = lpfc_hba_down_post_s3;
8556 phba->lpfc_handle_eratt = lpfc_handle_eratt_s3;
8557 phba->lpfc_stop_port = lpfc_stop_port_s3;
8558 break;
8559 case LPFC_PCI_DEV_OC:
8560 phba->lpfc_hba_down_post = lpfc_hba_down_post_s4;
8561 phba->lpfc_handle_eratt = lpfc_handle_eratt_s4;
8562 phba->lpfc_stop_port = lpfc_stop_port_s4;
8563 break;
8564 default:
8565 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
8566 "1431 Invalid HBA PCI-device group: 0x%x\n",
8567 dev_grp);
8568 return -ENODEV;
8569 }
8570 return 0;
8571 }
8572
8573 /**
8574 * lpfc_setup_driver_resource_phase2 - Phase2 setup driver internal resources.
8575 * @phba: pointer to lpfc hba data structure.
8576 *
8577 * This routine is invoked to set up the driver internal resources after the
8578 * device specific resource setup to support the HBA device it attached to.
8579 *
8580 * Return codes
8581 * 0 - successful
8582 * other values - error
8583 **/
8584 static int
lpfc_setup_driver_resource_phase2(struct lpfc_hba * phba)8585 lpfc_setup_driver_resource_phase2(struct lpfc_hba *phba)
8586 {
8587 int error;
8588
8589 /* Startup the kernel thread for this host adapter. */
8590 phba->worker_thread = kthread_run(lpfc_do_work, phba,
8591 "lpfc_worker_%d", phba->brd_no);
8592 if (IS_ERR(phba->worker_thread)) {
8593 error = PTR_ERR(phba->worker_thread);
8594 return error;
8595 }
8596
8597 return 0;
8598 }
8599
8600 /**
8601 * lpfc_unset_driver_resource_phase2 - Phase2 unset driver internal resources.
8602 * @phba: pointer to lpfc hba data structure.
8603 *
8604 * This routine is invoked to unset the driver internal resources set up after
8605 * the device specific resource setup for supporting the HBA device it
8606 * attached to.
8607 **/
8608 static void
lpfc_unset_driver_resource_phase2(struct lpfc_hba * phba)8609 lpfc_unset_driver_resource_phase2(struct lpfc_hba *phba)
8610 {
8611 if (phba->wq) {
8612 destroy_workqueue(phba->wq);
8613 phba->wq = NULL;
8614 }
8615
8616 /* Stop kernel worker thread */
8617 if (phba->worker_thread)
8618 kthread_stop(phba->worker_thread);
8619 }
8620
8621 /**
8622 * lpfc_free_iocb_list - Free iocb list.
8623 * @phba: pointer to lpfc hba data structure.
8624 *
8625 * This routine is invoked to free the driver's IOCB list and memory.
8626 **/
8627 void
lpfc_free_iocb_list(struct lpfc_hba * phba)8628 lpfc_free_iocb_list(struct lpfc_hba *phba)
8629 {
8630 struct lpfc_iocbq *iocbq_entry = NULL, *iocbq_next = NULL;
8631
8632 spin_lock_irq(&phba->hbalock);
8633 list_for_each_entry_safe(iocbq_entry, iocbq_next,
8634 &phba->lpfc_iocb_list, list) {
8635 list_del(&iocbq_entry->list);
8636 kfree(iocbq_entry);
8637 phba->total_iocbq_bufs--;
8638 }
8639 spin_unlock_irq(&phba->hbalock);
8640
8641 return;
8642 }
8643
8644 /**
8645 * lpfc_init_iocb_list - Allocate and initialize iocb list.
8646 * @phba: pointer to lpfc hba data structure.
8647 * @iocb_count: number of requested iocbs
8648 *
8649 * This routine is invoked to allocate and initizlize the driver's IOCB
8650 * list and set up the IOCB tag array accordingly.
8651 *
8652 * Return codes
8653 * 0 - successful
8654 * other values - error
8655 **/
8656 int
lpfc_init_iocb_list(struct lpfc_hba * phba,int iocb_count)8657 lpfc_init_iocb_list(struct lpfc_hba *phba, int iocb_count)
8658 {
8659 struct lpfc_iocbq *iocbq_entry = NULL;
8660 uint16_t iotag;
8661 int i;
8662
8663 /* Initialize and populate the iocb list per host. */
8664 INIT_LIST_HEAD(&phba->lpfc_iocb_list);
8665 for (i = 0; i < iocb_count; i++) {
8666 iocbq_entry = kzalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL);
8667 if (iocbq_entry == NULL) {
8668 printk(KERN_ERR "%s: only allocated %d iocbs of "
8669 "expected %d count. Unloading driver.\n",
8670 __func__, i, iocb_count);
8671 goto out_free_iocbq;
8672 }
8673
8674 iotag = lpfc_sli_next_iotag(phba, iocbq_entry);
8675 if (iotag == 0) {
8676 kfree(iocbq_entry);
8677 printk(KERN_ERR "%s: failed to allocate IOTAG. "
8678 "Unloading driver.\n", __func__);
8679 goto out_free_iocbq;
8680 }
8681 iocbq_entry->sli4_lxritag = NO_XRI;
8682 iocbq_entry->sli4_xritag = NO_XRI;
8683
8684 spin_lock_irq(&phba->hbalock);
8685 list_add(&iocbq_entry->list, &phba->lpfc_iocb_list);
8686 phba->total_iocbq_bufs++;
8687 spin_unlock_irq(&phba->hbalock);
8688 }
8689
8690 return 0;
8691
8692 out_free_iocbq:
8693 lpfc_free_iocb_list(phba);
8694
8695 return -ENOMEM;
8696 }
8697
8698 /**
8699 * lpfc_free_sgl_list - Free a given sgl list.
8700 * @phba: pointer to lpfc hba data structure.
8701 * @sglq_list: pointer to the head of sgl list.
8702 *
8703 * This routine is invoked to free a give sgl list and memory.
8704 **/
8705 void
lpfc_free_sgl_list(struct lpfc_hba * phba,struct list_head * sglq_list)8706 lpfc_free_sgl_list(struct lpfc_hba *phba, struct list_head *sglq_list)
8707 {
8708 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
8709
8710 list_for_each_entry_safe(sglq_entry, sglq_next, sglq_list, list) {
8711 list_del(&sglq_entry->list);
8712 lpfc_mbuf_free(phba, sglq_entry->virt, sglq_entry->phys);
8713 kfree(sglq_entry);
8714 }
8715 }
8716
8717 /**
8718 * lpfc_free_els_sgl_list - Free els sgl list.
8719 * @phba: pointer to lpfc hba data structure.
8720 *
8721 * This routine is invoked to free the driver's els sgl list and memory.
8722 **/
8723 static void
lpfc_free_els_sgl_list(struct lpfc_hba * phba)8724 lpfc_free_els_sgl_list(struct lpfc_hba *phba)
8725 {
8726 LIST_HEAD(sglq_list);
8727
8728 /* Retrieve all els sgls from driver list */
8729 spin_lock_irq(&phba->sli4_hba.sgl_list_lock);
8730 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list, &sglq_list);
8731 spin_unlock_irq(&phba->sli4_hba.sgl_list_lock);
8732
8733 /* Now free the sgl list */
8734 lpfc_free_sgl_list(phba, &sglq_list);
8735 }
8736
8737 /**
8738 * lpfc_free_nvmet_sgl_list - Free nvmet sgl list.
8739 * @phba: pointer to lpfc hba data structure.
8740 *
8741 * This routine is invoked to free the driver's nvmet sgl list and memory.
8742 **/
8743 static void
lpfc_free_nvmet_sgl_list(struct lpfc_hba * phba)8744 lpfc_free_nvmet_sgl_list(struct lpfc_hba *phba)
8745 {
8746 struct lpfc_sglq *sglq_entry = NULL, *sglq_next = NULL;
8747 LIST_HEAD(sglq_list);
8748
8749 /* Retrieve all nvmet sgls from driver list */
8750 spin_lock_irq(&phba->hbalock);
8751 spin_lock(&phba->sli4_hba.sgl_list_lock);
8752 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list, &sglq_list);
8753 spin_unlock(&phba->sli4_hba.sgl_list_lock);
8754 spin_unlock_irq(&phba->hbalock);
8755
8756 /* Now free the sgl list */
8757 list_for_each_entry_safe(sglq_entry, sglq_next, &sglq_list, list) {
8758 list_del(&sglq_entry->list);
8759 lpfc_nvmet_buf_free(phba, sglq_entry->virt, sglq_entry->phys);
8760 kfree(sglq_entry);
8761 }
8762
8763 /* Update the nvmet_xri_cnt to reflect no current sgls.
8764 * The next initialization cycle sets the count and allocates
8765 * the sgls over again.
8766 */
8767 phba->sli4_hba.nvmet_xri_cnt = 0;
8768 }
8769
8770 /**
8771 * lpfc_init_active_sgl_array - Allocate the buf to track active ELS XRIs.
8772 * @phba: pointer to lpfc hba data structure.
8773 *
8774 * This routine is invoked to allocate the driver's active sgl memory.
8775 * This array will hold the sglq_entry's for active IOs.
8776 **/
8777 static int
lpfc_init_active_sgl_array(struct lpfc_hba * phba)8778 lpfc_init_active_sgl_array(struct lpfc_hba *phba)
8779 {
8780 int size;
8781 size = sizeof(struct lpfc_sglq *);
8782 size *= phba->sli4_hba.max_cfg_param.max_xri;
8783
8784 phba->sli4_hba.lpfc_sglq_active_list =
8785 kzalloc(size, GFP_KERNEL);
8786 if (!phba->sli4_hba.lpfc_sglq_active_list)
8787 return -ENOMEM;
8788 return 0;
8789 }
8790
8791 /**
8792 * lpfc_free_active_sgl - Free the buf that tracks active ELS XRIs.
8793 * @phba: pointer to lpfc hba data structure.
8794 *
8795 * This routine is invoked to walk through the array of active sglq entries
8796 * and free all of the resources.
8797 * This is just a place holder for now.
8798 **/
8799 static void
lpfc_free_active_sgl(struct lpfc_hba * phba)8800 lpfc_free_active_sgl(struct lpfc_hba *phba)
8801 {
8802 kfree(phba->sli4_hba.lpfc_sglq_active_list);
8803 }
8804
8805 /**
8806 * lpfc_init_sgl_list - Allocate and initialize sgl list.
8807 * @phba: pointer to lpfc hba data structure.
8808 *
8809 * This routine is invoked to allocate and initizlize the driver's sgl
8810 * list and set up the sgl xritag tag array accordingly.
8811 *
8812 **/
8813 static void
lpfc_init_sgl_list(struct lpfc_hba * phba)8814 lpfc_init_sgl_list(struct lpfc_hba *phba)
8815 {
8816 /* Initialize and populate the sglq list per host/VF. */
8817 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_els_sgl_list);
8818 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_els_sgl_list);
8819 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_sgl_list);
8820 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
8821
8822 /* els xri-sgl book keeping */
8823 phba->sli4_hba.els_xri_cnt = 0;
8824
8825 /* nvme xri-buffer book keeping */
8826 phba->sli4_hba.io_xri_cnt = 0;
8827 }
8828
8829 /**
8830 * lpfc_sli4_init_rpi_hdrs - Post the rpi header memory region to the port
8831 * @phba: pointer to lpfc hba data structure.
8832 *
8833 * This routine is invoked to post rpi header templates to the
8834 * port for those SLI4 ports that do not support extents. This routine
8835 * posts a PAGE_SIZE memory region to the port to hold up to
8836 * PAGE_SIZE modulo 64 rpi context headers. This is an initialization routine
8837 * and should be called only when interrupts are disabled.
8838 *
8839 * Return codes
8840 * 0 - successful
8841 * -ERROR - otherwise.
8842 **/
8843 int
lpfc_sli4_init_rpi_hdrs(struct lpfc_hba * phba)8844 lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *phba)
8845 {
8846 int rc = 0;
8847 struct lpfc_rpi_hdr *rpi_hdr;
8848
8849 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_hdr_list);
8850 if (!phba->sli4_hba.rpi_hdrs_in_use)
8851 return rc;
8852 if (phba->sli4_hba.extents_in_use)
8853 return -EIO;
8854
8855 rpi_hdr = lpfc_sli4_create_rpi_hdr(phba);
8856 if (!rpi_hdr) {
8857 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
8858 "0391 Error during rpi post operation\n");
8859 lpfc_sli4_remove_rpis(phba);
8860 rc = -ENODEV;
8861 }
8862
8863 return rc;
8864 }
8865
8866 /**
8867 * lpfc_sli4_create_rpi_hdr - Allocate an rpi header memory region
8868 * @phba: pointer to lpfc hba data structure.
8869 *
8870 * This routine is invoked to allocate a single 4KB memory region to
8871 * support rpis and stores them in the phba. This single region
8872 * provides support for up to 64 rpis. The region is used globally
8873 * by the device.
8874 *
8875 * Returns:
8876 * A valid rpi hdr on success.
8877 * A NULL pointer on any failure.
8878 **/
8879 struct lpfc_rpi_hdr *
lpfc_sli4_create_rpi_hdr(struct lpfc_hba * phba)8880 lpfc_sli4_create_rpi_hdr(struct lpfc_hba *phba)
8881 {
8882 uint16_t rpi_limit, curr_rpi_range;
8883 struct lpfc_dmabuf *dmabuf;
8884 struct lpfc_rpi_hdr *rpi_hdr;
8885
8886 /*
8887 * If the SLI4 port supports extents, posting the rpi header isn't
8888 * required. Set the expected maximum count and let the actual value
8889 * get set when extents are fully allocated.
8890 */
8891 if (!phba->sli4_hba.rpi_hdrs_in_use)
8892 return NULL;
8893 if (phba->sli4_hba.extents_in_use)
8894 return NULL;
8895
8896 /* The limit on the logical index is just the max_rpi count. */
8897 rpi_limit = phba->sli4_hba.max_cfg_param.max_rpi;
8898
8899 spin_lock_irq(&phba->hbalock);
8900 /*
8901 * Establish the starting RPI in this header block. The starting
8902 * rpi is normalized to a zero base because the physical rpi is
8903 * port based.
8904 */
8905 curr_rpi_range = phba->sli4_hba.next_rpi;
8906 spin_unlock_irq(&phba->hbalock);
8907
8908 /* Reached full RPI range */
8909 if (curr_rpi_range == rpi_limit)
8910 return NULL;
8911
8912 /*
8913 * First allocate the protocol header region for the port. The
8914 * port expects a 4KB DMA-mapped memory region that is 4K aligned.
8915 */
8916 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
8917 if (!dmabuf)
8918 return NULL;
8919
8920 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev,
8921 LPFC_HDR_TEMPLATE_SIZE,
8922 &dmabuf->phys, GFP_KERNEL);
8923 if (!dmabuf->virt) {
8924 rpi_hdr = NULL;
8925 goto err_free_dmabuf;
8926 }
8927
8928 if (!IS_ALIGNED(dmabuf->phys, LPFC_HDR_TEMPLATE_SIZE)) {
8929 rpi_hdr = NULL;
8930 goto err_free_coherent;
8931 }
8932
8933 /* Save the rpi header data for cleanup later. */
8934 rpi_hdr = kzalloc(sizeof(struct lpfc_rpi_hdr), GFP_KERNEL);
8935 if (!rpi_hdr)
8936 goto err_free_coherent;
8937
8938 rpi_hdr->dmabuf = dmabuf;
8939 rpi_hdr->len = LPFC_HDR_TEMPLATE_SIZE;
8940 rpi_hdr->page_count = 1;
8941 spin_lock_irq(&phba->hbalock);
8942
8943 /* The rpi_hdr stores the logical index only. */
8944 rpi_hdr->start_rpi = curr_rpi_range;
8945 rpi_hdr->next_rpi = phba->sli4_hba.next_rpi + LPFC_RPI_HDR_COUNT;
8946 list_add_tail(&rpi_hdr->list, &phba->sli4_hba.lpfc_rpi_hdr_list);
8947
8948 spin_unlock_irq(&phba->hbalock);
8949 return rpi_hdr;
8950
8951 err_free_coherent:
8952 dma_free_coherent(&phba->pcidev->dev, LPFC_HDR_TEMPLATE_SIZE,
8953 dmabuf->virt, dmabuf->phys);
8954 err_free_dmabuf:
8955 kfree(dmabuf);
8956 return NULL;
8957 }
8958
8959 /**
8960 * lpfc_sli4_remove_rpi_hdrs - Remove all rpi header memory regions
8961 * @phba: pointer to lpfc hba data structure.
8962 *
8963 * This routine is invoked to remove all memory resources allocated
8964 * to support rpis for SLI4 ports not supporting extents. This routine
8965 * presumes the caller has released all rpis consumed by fabric or port
8966 * logins and is prepared to have the header pages removed.
8967 **/
8968 void
lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba * phba)8969 lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *phba)
8970 {
8971 struct lpfc_rpi_hdr *rpi_hdr, *next_rpi_hdr;
8972
8973 if (!phba->sli4_hba.rpi_hdrs_in_use)
8974 goto exit;
8975
8976 list_for_each_entry_safe(rpi_hdr, next_rpi_hdr,
8977 &phba->sli4_hba.lpfc_rpi_hdr_list, list) {
8978 list_del(&rpi_hdr->list);
8979 dma_free_coherent(&phba->pcidev->dev, rpi_hdr->len,
8980 rpi_hdr->dmabuf->virt, rpi_hdr->dmabuf->phys);
8981 kfree(rpi_hdr->dmabuf);
8982 kfree(rpi_hdr);
8983 }
8984 exit:
8985 /* There are no rpis available to the port now. */
8986 phba->sli4_hba.next_rpi = 0;
8987 }
8988
8989 /**
8990 * lpfc_hba_alloc - Allocate driver hba data structure for a device.
8991 * @pdev: pointer to pci device data structure.
8992 *
8993 * This routine is invoked to allocate the driver hba data structure for an
8994 * HBA device. If the allocation is successful, the phba reference to the
8995 * PCI device data structure is set.
8996 *
8997 * Return codes
8998 * pointer to @phba - successful
8999 * NULL - error
9000 **/
9001 static struct lpfc_hba *
lpfc_hba_alloc(struct pci_dev * pdev)9002 lpfc_hba_alloc(struct pci_dev *pdev)
9003 {
9004 struct lpfc_hba *phba;
9005
9006 /* Allocate memory for HBA structure */
9007 phba = kzalloc(sizeof(struct lpfc_hba), GFP_KERNEL);
9008 if (!phba) {
9009 dev_err(&pdev->dev, "failed to allocate hba struct\n");
9010 return NULL;
9011 }
9012
9013 /* Set reference to PCI device in HBA structure */
9014 phba->pcidev = pdev;
9015
9016 /* Assign an unused board number */
9017 phba->brd_no = lpfc_get_instance();
9018 if (phba->brd_no < 0) {
9019 kfree(phba);
9020 return NULL;
9021 }
9022 phba->eratt_poll_interval = LPFC_ERATT_POLL_INTERVAL;
9023
9024 spin_lock_init(&phba->ct_ev_lock);
9025 INIT_LIST_HEAD(&phba->ct_ev_waiters);
9026
9027 return phba;
9028 }
9029
9030 /**
9031 * lpfc_hba_free - Free driver hba data structure with a device.
9032 * @phba: pointer to lpfc hba data structure.
9033 *
9034 * This routine is invoked to free the driver hba data structure with an
9035 * HBA device.
9036 **/
9037 static void
lpfc_hba_free(struct lpfc_hba * phba)9038 lpfc_hba_free(struct lpfc_hba *phba)
9039 {
9040 if (phba->sli_rev == LPFC_SLI_REV4)
9041 kfree(phba->sli4_hba.hdwq);
9042
9043 /* Release the driver assigned board number */
9044 idr_remove(&lpfc_hba_index, phba->brd_no);
9045
9046 /* Free memory allocated with sli3 rings */
9047 kfree(phba->sli.sli3_ring);
9048 phba->sli.sli3_ring = NULL;
9049
9050 kfree(phba);
9051 return;
9052 }
9053
9054 /**
9055 * lpfc_setup_fdmi_mask - Setup initial FDMI mask for HBA and Port attributes
9056 * @vport: pointer to lpfc vport data structure.
9057 *
9058 * This routine is will setup initial FDMI attribute masks for
9059 * FDMI2 or SmartSAN depending on module parameters. The driver will attempt
9060 * to get these attributes first before falling back, the attribute
9061 * fallback hierarchy is SmartSAN -> FDMI2 -> FMDI1
9062 **/
9063 void
lpfc_setup_fdmi_mask(struct lpfc_vport * vport)9064 lpfc_setup_fdmi_mask(struct lpfc_vport *vport)
9065 {
9066 struct lpfc_hba *phba = vport->phba;
9067
9068 set_bit(FC_ALLOW_FDMI, &vport->load_flag);
9069 if (phba->cfg_enable_SmartSAN ||
9070 phba->cfg_fdmi_on == LPFC_FDMI_SUPPORT) {
9071 /* Setup appropriate attribute masks */
9072 vport->fdmi_hba_mask = LPFC_FDMI2_HBA_ATTR;
9073 if (phba->cfg_enable_SmartSAN)
9074 vport->fdmi_port_mask = LPFC_FDMI2_SMART_ATTR;
9075 else
9076 vport->fdmi_port_mask = LPFC_FDMI2_PORT_ATTR;
9077 }
9078
9079 lpfc_printf_vlog(vport, KERN_INFO, LOG_DISCOVERY,
9080 "6077 Setup FDMI mask: hba x%x port x%x\n",
9081 vport->fdmi_hba_mask, vport->fdmi_port_mask);
9082 }
9083
9084 /**
9085 * lpfc_create_shost - Create hba physical port with associated scsi host.
9086 * @phba: pointer to lpfc hba data structure.
9087 *
9088 * This routine is invoked to create HBA physical port and associate a SCSI
9089 * host with it.
9090 *
9091 * Return codes
9092 * 0 - successful
9093 * other values - error
9094 **/
9095 static int
lpfc_create_shost(struct lpfc_hba * phba)9096 lpfc_create_shost(struct lpfc_hba *phba)
9097 {
9098 struct lpfc_vport *vport;
9099 struct Scsi_Host *shost;
9100
9101 /* Initialize HBA FC structure */
9102 phba->fc_edtov = FF_DEF_EDTOV;
9103 phba->fc_ratov = FF_DEF_RATOV;
9104 phba->fc_altov = FF_DEF_ALTOV;
9105 phba->fc_arbtov = FF_DEF_ARBTOV;
9106
9107 atomic_set(&phba->sdev_cnt, 0);
9108 vport = lpfc_create_port(phba, phba->brd_no, &phba->pcidev->dev);
9109 if (!vport)
9110 return -ENODEV;
9111
9112 shost = lpfc_shost_from_vport(vport);
9113 phba->pport = vport;
9114
9115 if (phba->nvmet_support) {
9116 /* Only 1 vport (pport) will support NVME target */
9117 phba->targetport = NULL;
9118 phba->cfg_enable_fc4_type = LPFC_ENABLE_NVME;
9119 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME_DISC,
9120 "6076 NVME Target Found\n");
9121 }
9122
9123 lpfc_debugfs_initialize(vport);
9124 /* Put reference to SCSI host to driver's device private data */
9125 pci_set_drvdata(phba->pcidev, shost);
9126
9127 lpfc_setup_fdmi_mask(vport);
9128
9129 /*
9130 * At this point we are fully registered with PSA. In addition,
9131 * any initial discovery should be completed.
9132 */
9133 return 0;
9134 }
9135
9136 /**
9137 * lpfc_destroy_shost - Destroy hba physical port with associated scsi host.
9138 * @phba: pointer to lpfc hba data structure.
9139 *
9140 * This routine is invoked to destroy HBA physical port and the associated
9141 * SCSI host.
9142 **/
9143 static void
lpfc_destroy_shost(struct lpfc_hba * phba)9144 lpfc_destroy_shost(struct lpfc_hba *phba)
9145 {
9146 struct lpfc_vport *vport = phba->pport;
9147
9148 /* Destroy physical port that associated with the SCSI host */
9149 destroy_port(vport);
9150
9151 return;
9152 }
9153
9154 /**
9155 * lpfc_setup_bg - Setup Block guard structures and debug areas.
9156 * @phba: pointer to lpfc hba data structure.
9157 * @shost: the shost to be used to detect Block guard settings.
9158 *
9159 * This routine sets up the local Block guard protocol settings for @shost.
9160 * This routine also allocates memory for debugging bg buffers.
9161 **/
9162 static void
lpfc_setup_bg(struct lpfc_hba * phba,struct Scsi_Host * shost)9163 lpfc_setup_bg(struct lpfc_hba *phba, struct Scsi_Host *shost)
9164 {
9165 uint32_t old_mask;
9166 uint32_t old_guard;
9167
9168 if (phba->cfg_prot_mask && phba->cfg_prot_guard) {
9169 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9170 "1478 Registering BlockGuard with the "
9171 "SCSI layer\n");
9172
9173 old_mask = phba->cfg_prot_mask;
9174 old_guard = phba->cfg_prot_guard;
9175
9176 /* Only allow supported values */
9177 phba->cfg_prot_mask &= (SHOST_DIF_TYPE1_PROTECTION |
9178 SHOST_DIX_TYPE0_PROTECTION |
9179 SHOST_DIX_TYPE1_PROTECTION);
9180 phba->cfg_prot_guard &= (SHOST_DIX_GUARD_IP |
9181 SHOST_DIX_GUARD_CRC);
9182
9183 /* DIF Type 1 protection for profiles AST1/C1 is end to end */
9184 if (phba->cfg_prot_mask == SHOST_DIX_TYPE1_PROTECTION)
9185 phba->cfg_prot_mask |= SHOST_DIF_TYPE1_PROTECTION;
9186
9187 if (phba->cfg_prot_mask && phba->cfg_prot_guard) {
9188 if ((old_mask != phba->cfg_prot_mask) ||
9189 (old_guard != phba->cfg_prot_guard))
9190 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
9191 "1475 Registering BlockGuard with the "
9192 "SCSI layer: mask %d guard %d\n",
9193 phba->cfg_prot_mask,
9194 phba->cfg_prot_guard);
9195
9196 scsi_host_set_prot(shost, phba->cfg_prot_mask);
9197 scsi_host_set_guard(shost, phba->cfg_prot_guard);
9198 } else
9199 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
9200 "1479 Not Registering BlockGuard with the SCSI "
9201 "layer, Bad protection parameters: %d %d\n",
9202 old_mask, old_guard);
9203 }
9204 }
9205
9206 /**
9207 * lpfc_post_init_setup - Perform necessary device post initialization setup.
9208 * @phba: pointer to lpfc hba data structure.
9209 *
9210 * This routine is invoked to perform all the necessary post initialization
9211 * setup for the device.
9212 **/
9213 static void
lpfc_post_init_setup(struct lpfc_hba * phba)9214 lpfc_post_init_setup(struct lpfc_hba *phba)
9215 {
9216 struct Scsi_Host *shost;
9217 struct lpfc_adapter_event_header adapter_event;
9218
9219 /* Get the default values for Model Name and Description */
9220 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
9221
9222 /*
9223 * hba setup may have changed the hba_queue_depth so we need to
9224 * adjust the value of can_queue.
9225 */
9226 shost = pci_get_drvdata(phba->pcidev);
9227 shost->can_queue = phba->cfg_hba_queue_depth - 10;
9228
9229 lpfc_host_attrib_init(shost);
9230
9231 if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
9232 spin_lock_irq(shost->host_lock);
9233 lpfc_poll_start_timer(phba);
9234 spin_unlock_irq(shost->host_lock);
9235 }
9236
9237 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9238 "0428 Perform SCSI scan\n");
9239 /* Send board arrival event to upper layer */
9240 adapter_event.event_type = FC_REG_ADAPTER_EVENT;
9241 adapter_event.subcategory = LPFC_EVENT_ARRIVAL;
9242 fc_host_post_vendor_event(shost, fc_get_event_number(),
9243 sizeof(adapter_event),
9244 (char *) &adapter_event,
9245 LPFC_NL_VENDOR_ID);
9246 return;
9247 }
9248
9249 /**
9250 * lpfc_sli_pci_mem_setup - Setup SLI3 HBA PCI memory space.
9251 * @phba: pointer to lpfc hba data structure.
9252 *
9253 * This routine is invoked to set up the PCI device memory space for device
9254 * with SLI-3 interface spec.
9255 *
9256 * Return codes
9257 * 0 - successful
9258 * other values - error
9259 **/
9260 static int
lpfc_sli_pci_mem_setup(struct lpfc_hba * phba)9261 lpfc_sli_pci_mem_setup(struct lpfc_hba *phba)
9262 {
9263 struct pci_dev *pdev = phba->pcidev;
9264 unsigned long bar0map_len, bar2map_len;
9265 int i, hbq_count;
9266 void *ptr;
9267 int error;
9268
9269 if (!pdev)
9270 return -ENODEV;
9271
9272 /* Set the device DMA mask size */
9273 error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
9274 if (error)
9275 error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
9276 if (error)
9277 return error;
9278 error = -ENODEV;
9279
9280 /* Get the bus address of Bar0 and Bar2 and the number of bytes
9281 * required by each mapping.
9282 */
9283 phba->pci_bar0_map = pci_resource_start(pdev, 0);
9284 bar0map_len = pci_resource_len(pdev, 0);
9285
9286 phba->pci_bar2_map = pci_resource_start(pdev, 2);
9287 bar2map_len = pci_resource_len(pdev, 2);
9288
9289 /* Map HBA SLIM to a kernel virtual address. */
9290 phba->slim_memmap_p = ioremap(phba->pci_bar0_map, bar0map_len);
9291 if (!phba->slim_memmap_p) {
9292 dev_printk(KERN_ERR, &pdev->dev,
9293 "ioremap failed for SLIM memory.\n");
9294 goto out;
9295 }
9296
9297 /* Map HBA Control Registers to a kernel virtual address. */
9298 phba->ctrl_regs_memmap_p = ioremap(phba->pci_bar2_map, bar2map_len);
9299 if (!phba->ctrl_regs_memmap_p) {
9300 dev_printk(KERN_ERR, &pdev->dev,
9301 "ioremap failed for HBA control registers.\n");
9302 goto out_iounmap_slim;
9303 }
9304
9305 /* Allocate memory for SLI-2 structures */
9306 phba->slim2p.virt = dma_alloc_coherent(&pdev->dev, SLI2_SLIM_SIZE,
9307 &phba->slim2p.phys, GFP_KERNEL);
9308 if (!phba->slim2p.virt)
9309 goto out_iounmap;
9310
9311 phba->mbox = phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, mbx);
9312 phba->mbox_ext = (phba->slim2p.virt +
9313 offsetof(struct lpfc_sli2_slim, mbx_ext_words));
9314 phba->pcb = (phba->slim2p.virt + offsetof(struct lpfc_sli2_slim, pcb));
9315 phba->IOCBs = (phba->slim2p.virt +
9316 offsetof(struct lpfc_sli2_slim, IOCBs));
9317
9318 phba->hbqslimp.virt = dma_alloc_coherent(&pdev->dev,
9319 lpfc_sli_hbq_size(),
9320 &phba->hbqslimp.phys,
9321 GFP_KERNEL);
9322 if (!phba->hbqslimp.virt)
9323 goto out_free_slim;
9324
9325 hbq_count = lpfc_sli_hbq_count();
9326 ptr = phba->hbqslimp.virt;
9327 for (i = 0; i < hbq_count; ++i) {
9328 phba->hbqs[i].hbq_virt = ptr;
9329 INIT_LIST_HEAD(&phba->hbqs[i].hbq_buffer_list);
9330 ptr += (lpfc_hbq_defs[i]->entry_count *
9331 sizeof(struct lpfc_hbq_entry));
9332 }
9333 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_els_hbq_alloc;
9334 phba->hbqs[LPFC_ELS_HBQ].hbq_free_buffer = lpfc_els_hbq_free;
9335
9336 memset(phba->hbqslimp.virt, 0, lpfc_sli_hbq_size());
9337
9338 phba->MBslimaddr = phba->slim_memmap_p;
9339 phba->HAregaddr = phba->ctrl_regs_memmap_p + HA_REG_OFFSET;
9340 phba->CAregaddr = phba->ctrl_regs_memmap_p + CA_REG_OFFSET;
9341 phba->HSregaddr = phba->ctrl_regs_memmap_p + HS_REG_OFFSET;
9342 phba->HCregaddr = phba->ctrl_regs_memmap_p + HC_REG_OFFSET;
9343
9344 return 0;
9345
9346 out_free_slim:
9347 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
9348 phba->slim2p.virt, phba->slim2p.phys);
9349 out_iounmap:
9350 iounmap(phba->ctrl_regs_memmap_p);
9351 out_iounmap_slim:
9352 iounmap(phba->slim_memmap_p);
9353 out:
9354 return error;
9355 }
9356
9357 /**
9358 * lpfc_sli_pci_mem_unset - Unset SLI3 HBA PCI memory space.
9359 * @phba: pointer to lpfc hba data structure.
9360 *
9361 * This routine is invoked to unset the PCI device memory space for device
9362 * with SLI-3 interface spec.
9363 **/
9364 static void
lpfc_sli_pci_mem_unset(struct lpfc_hba * phba)9365 lpfc_sli_pci_mem_unset(struct lpfc_hba *phba)
9366 {
9367 struct pci_dev *pdev;
9368
9369 /* Obtain PCI device reference */
9370 if (!phba->pcidev)
9371 return;
9372 else
9373 pdev = phba->pcidev;
9374
9375 /* Free coherent DMA memory allocated */
9376 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
9377 phba->hbqslimp.virt, phba->hbqslimp.phys);
9378 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
9379 phba->slim2p.virt, phba->slim2p.phys);
9380
9381 /* I/O memory unmap */
9382 iounmap(phba->ctrl_regs_memmap_p);
9383 iounmap(phba->slim_memmap_p);
9384
9385 return;
9386 }
9387
9388 /**
9389 * lpfc_sli4_post_status_check - Wait for SLI4 POST done and check status
9390 * @phba: pointer to lpfc hba data structure.
9391 *
9392 * This routine is invoked to wait for SLI4 device Power On Self Test (POST)
9393 * done and check status.
9394 *
9395 * Return 0 if successful, otherwise -ENODEV.
9396 **/
9397 int
lpfc_sli4_post_status_check(struct lpfc_hba * phba)9398 lpfc_sli4_post_status_check(struct lpfc_hba *phba)
9399 {
9400 struct lpfc_register portsmphr_reg, uerrlo_reg, uerrhi_reg;
9401 struct lpfc_register reg_data;
9402 int i, port_error = 0;
9403 uint32_t if_type;
9404
9405 memset(&portsmphr_reg, 0, sizeof(portsmphr_reg));
9406 memset(®_data, 0, sizeof(reg_data));
9407 if (!phba->sli4_hba.PSMPHRregaddr)
9408 return -ENODEV;
9409
9410 /* Wait up to 30 seconds for the SLI Port POST done and ready */
9411 for (i = 0; i < 3000; i++) {
9412 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
9413 &portsmphr_reg.word0) ||
9414 (bf_get(lpfc_port_smphr_perr, &portsmphr_reg))) {
9415 /* Port has a fatal POST error, break out */
9416 port_error = -ENODEV;
9417 break;
9418 }
9419 if (LPFC_POST_STAGE_PORT_READY ==
9420 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg))
9421 break;
9422 msleep(10);
9423 }
9424
9425 /*
9426 * If there was a port error during POST, then don't proceed with
9427 * other register reads as the data may not be valid. Just exit.
9428 */
9429 if (port_error) {
9430 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
9431 "1408 Port Failed POST - portsmphr=0x%x, "
9432 "perr=x%x, sfi=x%x, nip=x%x, ipc=x%x, scr1=x%x, "
9433 "scr2=x%x, hscratch=x%x, pstatus=x%x\n",
9434 portsmphr_reg.word0,
9435 bf_get(lpfc_port_smphr_perr, &portsmphr_reg),
9436 bf_get(lpfc_port_smphr_sfi, &portsmphr_reg),
9437 bf_get(lpfc_port_smphr_nip, &portsmphr_reg),
9438 bf_get(lpfc_port_smphr_ipc, &portsmphr_reg),
9439 bf_get(lpfc_port_smphr_scr1, &portsmphr_reg),
9440 bf_get(lpfc_port_smphr_scr2, &portsmphr_reg),
9441 bf_get(lpfc_port_smphr_host_scratch, &portsmphr_reg),
9442 bf_get(lpfc_port_smphr_port_status, &portsmphr_reg));
9443 } else {
9444 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
9445 "2534 Device Info: SLIFamily=0x%x, "
9446 "SLIRev=0x%x, IFType=0x%x, SLIHint_1=0x%x, "
9447 "SLIHint_2=0x%x, FT=0x%x\n",
9448 bf_get(lpfc_sli_intf_sli_family,
9449 &phba->sli4_hba.sli_intf),
9450 bf_get(lpfc_sli_intf_slirev,
9451 &phba->sli4_hba.sli_intf),
9452 bf_get(lpfc_sli_intf_if_type,
9453 &phba->sli4_hba.sli_intf),
9454 bf_get(lpfc_sli_intf_sli_hint1,
9455 &phba->sli4_hba.sli_intf),
9456 bf_get(lpfc_sli_intf_sli_hint2,
9457 &phba->sli4_hba.sli_intf),
9458 bf_get(lpfc_sli_intf_func_type,
9459 &phba->sli4_hba.sli_intf));
9460 /*
9461 * Check for other Port errors during the initialization
9462 * process. Fail the load if the port did not come up
9463 * correctly.
9464 */
9465 if_type = bf_get(lpfc_sli_intf_if_type,
9466 &phba->sli4_hba.sli_intf);
9467 switch (if_type) {
9468 case LPFC_SLI_INTF_IF_TYPE_0:
9469 phba->sli4_hba.ue_mask_lo =
9470 readl(phba->sli4_hba.u.if_type0.UEMASKLOregaddr);
9471 phba->sli4_hba.ue_mask_hi =
9472 readl(phba->sli4_hba.u.if_type0.UEMASKHIregaddr);
9473 uerrlo_reg.word0 =
9474 readl(phba->sli4_hba.u.if_type0.UERRLOregaddr);
9475 uerrhi_reg.word0 =
9476 readl(phba->sli4_hba.u.if_type0.UERRHIregaddr);
9477 if ((~phba->sli4_hba.ue_mask_lo & uerrlo_reg.word0) ||
9478 (~phba->sli4_hba.ue_mask_hi & uerrhi_reg.word0)) {
9479 lpfc_printf_log(phba, KERN_ERR,
9480 LOG_TRACE_EVENT,
9481 "1422 Unrecoverable Error "
9482 "Detected during POST "
9483 "uerr_lo_reg=0x%x, "
9484 "uerr_hi_reg=0x%x, "
9485 "ue_mask_lo_reg=0x%x, "
9486 "ue_mask_hi_reg=0x%x\n",
9487 uerrlo_reg.word0,
9488 uerrhi_reg.word0,
9489 phba->sli4_hba.ue_mask_lo,
9490 phba->sli4_hba.ue_mask_hi);
9491 port_error = -ENODEV;
9492 }
9493 break;
9494 case LPFC_SLI_INTF_IF_TYPE_2:
9495 case LPFC_SLI_INTF_IF_TYPE_6:
9496 /* Final checks. The port status should be clean. */
9497 if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr,
9498 ®_data.word0) ||
9499 lpfc_sli4_unrecoverable_port(®_data)) {
9500 phba->work_status[0] =
9501 readl(phba->sli4_hba.u.if_type2.
9502 ERR1regaddr);
9503 phba->work_status[1] =
9504 readl(phba->sli4_hba.u.if_type2.
9505 ERR2regaddr);
9506 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
9507 "2888 Unrecoverable port error "
9508 "following POST: port status reg "
9509 "0x%x, port_smphr reg 0x%x, "
9510 "error 1=0x%x, error 2=0x%x\n",
9511 reg_data.word0,
9512 portsmphr_reg.word0,
9513 phba->work_status[0],
9514 phba->work_status[1]);
9515 port_error = -ENODEV;
9516 break;
9517 }
9518
9519 if (lpfc_pldv_detect &&
9520 bf_get(lpfc_sli_intf_sli_family,
9521 &phba->sli4_hba.sli_intf) ==
9522 LPFC_SLI_INTF_FAMILY_G6)
9523 pci_write_config_byte(phba->pcidev,
9524 LPFC_SLI_INTF, CFG_PLD);
9525 break;
9526 case LPFC_SLI_INTF_IF_TYPE_1:
9527 default:
9528 break;
9529 }
9530 }
9531 return port_error;
9532 }
9533
9534 /**
9535 * lpfc_sli4_bar0_register_memmap - Set up SLI4 BAR0 register memory map.
9536 * @phba: pointer to lpfc hba data structure.
9537 * @if_type: The SLI4 interface type getting configured.
9538 *
9539 * This routine is invoked to set up SLI4 BAR0 PCI config space register
9540 * memory map.
9541 **/
9542 static void
lpfc_sli4_bar0_register_memmap(struct lpfc_hba * phba,uint32_t if_type)9543 lpfc_sli4_bar0_register_memmap(struct lpfc_hba *phba, uint32_t if_type)
9544 {
9545 switch (if_type) {
9546 case LPFC_SLI_INTF_IF_TYPE_0:
9547 phba->sli4_hba.u.if_type0.UERRLOregaddr =
9548 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_LO;
9549 phba->sli4_hba.u.if_type0.UERRHIregaddr =
9550 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_HI;
9551 phba->sli4_hba.u.if_type0.UEMASKLOregaddr =
9552 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_LO;
9553 phba->sli4_hba.u.if_type0.UEMASKHIregaddr =
9554 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_HI;
9555 phba->sli4_hba.SLIINTFregaddr =
9556 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
9557 break;
9558 case LPFC_SLI_INTF_IF_TYPE_2:
9559 phba->sli4_hba.u.if_type2.EQDregaddr =
9560 phba->sli4_hba.conf_regs_memmap_p +
9561 LPFC_CTL_PORT_EQ_DELAY_OFFSET;
9562 phba->sli4_hba.u.if_type2.ERR1regaddr =
9563 phba->sli4_hba.conf_regs_memmap_p +
9564 LPFC_CTL_PORT_ER1_OFFSET;
9565 phba->sli4_hba.u.if_type2.ERR2regaddr =
9566 phba->sli4_hba.conf_regs_memmap_p +
9567 LPFC_CTL_PORT_ER2_OFFSET;
9568 phba->sli4_hba.u.if_type2.CTRLregaddr =
9569 phba->sli4_hba.conf_regs_memmap_p +
9570 LPFC_CTL_PORT_CTL_OFFSET;
9571 phba->sli4_hba.u.if_type2.STATUSregaddr =
9572 phba->sli4_hba.conf_regs_memmap_p +
9573 LPFC_CTL_PORT_STA_OFFSET;
9574 phba->sli4_hba.SLIINTFregaddr =
9575 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
9576 phba->sli4_hba.PSMPHRregaddr =
9577 phba->sli4_hba.conf_regs_memmap_p +
9578 LPFC_CTL_PORT_SEM_OFFSET;
9579 phba->sli4_hba.RQDBregaddr =
9580 phba->sli4_hba.conf_regs_memmap_p +
9581 LPFC_ULP0_RQ_DOORBELL;
9582 phba->sli4_hba.WQDBregaddr =
9583 phba->sli4_hba.conf_regs_memmap_p +
9584 LPFC_ULP0_WQ_DOORBELL;
9585 phba->sli4_hba.CQDBregaddr =
9586 phba->sli4_hba.conf_regs_memmap_p + LPFC_EQCQ_DOORBELL;
9587 phba->sli4_hba.EQDBregaddr = phba->sli4_hba.CQDBregaddr;
9588 phba->sli4_hba.MQDBregaddr =
9589 phba->sli4_hba.conf_regs_memmap_p + LPFC_MQ_DOORBELL;
9590 phba->sli4_hba.BMBXregaddr =
9591 phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX;
9592 break;
9593 case LPFC_SLI_INTF_IF_TYPE_6:
9594 phba->sli4_hba.u.if_type2.EQDregaddr =
9595 phba->sli4_hba.conf_regs_memmap_p +
9596 LPFC_CTL_PORT_EQ_DELAY_OFFSET;
9597 phba->sli4_hba.u.if_type2.ERR1regaddr =
9598 phba->sli4_hba.conf_regs_memmap_p +
9599 LPFC_CTL_PORT_ER1_OFFSET;
9600 phba->sli4_hba.u.if_type2.ERR2regaddr =
9601 phba->sli4_hba.conf_regs_memmap_p +
9602 LPFC_CTL_PORT_ER2_OFFSET;
9603 phba->sli4_hba.u.if_type2.CTRLregaddr =
9604 phba->sli4_hba.conf_regs_memmap_p +
9605 LPFC_CTL_PORT_CTL_OFFSET;
9606 phba->sli4_hba.u.if_type2.STATUSregaddr =
9607 phba->sli4_hba.conf_regs_memmap_p +
9608 LPFC_CTL_PORT_STA_OFFSET;
9609 phba->sli4_hba.PSMPHRregaddr =
9610 phba->sli4_hba.conf_regs_memmap_p +
9611 LPFC_CTL_PORT_SEM_OFFSET;
9612 phba->sli4_hba.BMBXregaddr =
9613 phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX;
9614 break;
9615 case LPFC_SLI_INTF_IF_TYPE_1:
9616 default:
9617 dev_printk(KERN_ERR, &phba->pcidev->dev,
9618 "FATAL - unsupported SLI4 interface type - %d\n",
9619 if_type);
9620 break;
9621 }
9622 }
9623
9624 /**
9625 * lpfc_sli4_bar1_register_memmap - Set up SLI4 BAR1 register memory map.
9626 * @phba: pointer to lpfc hba data structure.
9627 * @if_type: sli if type to operate on.
9628 *
9629 * This routine is invoked to set up SLI4 BAR1 register memory map.
9630 **/
9631 static void
lpfc_sli4_bar1_register_memmap(struct lpfc_hba * phba,uint32_t if_type)9632 lpfc_sli4_bar1_register_memmap(struct lpfc_hba *phba, uint32_t if_type)
9633 {
9634 switch (if_type) {
9635 case LPFC_SLI_INTF_IF_TYPE_0:
9636 phba->sli4_hba.PSMPHRregaddr =
9637 phba->sli4_hba.ctrl_regs_memmap_p +
9638 LPFC_SLIPORT_IF0_SMPHR;
9639 phba->sli4_hba.ISRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
9640 LPFC_HST_ISR0;
9641 phba->sli4_hba.IMRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
9642 LPFC_HST_IMR0;
9643 phba->sli4_hba.ISCRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
9644 LPFC_HST_ISCR0;
9645 break;
9646 case LPFC_SLI_INTF_IF_TYPE_6:
9647 phba->sli4_hba.RQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
9648 LPFC_IF6_RQ_DOORBELL;
9649 phba->sli4_hba.WQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
9650 LPFC_IF6_WQ_DOORBELL;
9651 phba->sli4_hba.CQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
9652 LPFC_IF6_CQ_DOORBELL;
9653 phba->sli4_hba.EQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
9654 LPFC_IF6_EQ_DOORBELL;
9655 phba->sli4_hba.MQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
9656 LPFC_IF6_MQ_DOORBELL;
9657 break;
9658 case LPFC_SLI_INTF_IF_TYPE_2:
9659 case LPFC_SLI_INTF_IF_TYPE_1:
9660 default:
9661 dev_err(&phba->pcidev->dev,
9662 "FATAL - unsupported SLI4 interface type - %d\n",
9663 if_type);
9664 break;
9665 }
9666 }
9667
9668 /**
9669 * lpfc_sli4_bar2_register_memmap - Set up SLI4 BAR2 register memory map.
9670 * @phba: pointer to lpfc hba data structure.
9671 * @vf: virtual function number
9672 *
9673 * This routine is invoked to set up SLI4 BAR2 doorbell register memory map
9674 * based on the given viftual function number, @vf.
9675 *
9676 * Return 0 if successful, otherwise -ENODEV.
9677 **/
9678 static int
lpfc_sli4_bar2_register_memmap(struct lpfc_hba * phba,uint32_t vf)9679 lpfc_sli4_bar2_register_memmap(struct lpfc_hba *phba, uint32_t vf)
9680 {
9681 if (vf > LPFC_VIR_FUNC_MAX)
9682 return -ENODEV;
9683
9684 phba->sli4_hba.RQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
9685 vf * LPFC_VFR_PAGE_SIZE +
9686 LPFC_ULP0_RQ_DOORBELL);
9687 phba->sli4_hba.WQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
9688 vf * LPFC_VFR_PAGE_SIZE +
9689 LPFC_ULP0_WQ_DOORBELL);
9690 phba->sli4_hba.CQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
9691 vf * LPFC_VFR_PAGE_SIZE +
9692 LPFC_EQCQ_DOORBELL);
9693 phba->sli4_hba.EQDBregaddr = phba->sli4_hba.CQDBregaddr;
9694 phba->sli4_hba.MQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
9695 vf * LPFC_VFR_PAGE_SIZE + LPFC_MQ_DOORBELL);
9696 phba->sli4_hba.BMBXregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
9697 vf * LPFC_VFR_PAGE_SIZE + LPFC_BMBX);
9698 return 0;
9699 }
9700
9701 /**
9702 * lpfc_create_bootstrap_mbox - Create the bootstrap mailbox
9703 * @phba: pointer to lpfc hba data structure.
9704 *
9705 * This routine is invoked to create the bootstrap mailbox
9706 * region consistent with the SLI-4 interface spec. This
9707 * routine allocates all memory necessary to communicate
9708 * mailbox commands to the port and sets up all alignment
9709 * needs. No locks are expected to be held when calling
9710 * this routine.
9711 *
9712 * Return codes
9713 * 0 - successful
9714 * -ENOMEM - could not allocated memory.
9715 **/
9716 static int
lpfc_create_bootstrap_mbox(struct lpfc_hba * phba)9717 lpfc_create_bootstrap_mbox(struct lpfc_hba *phba)
9718 {
9719 uint32_t bmbx_size;
9720 struct lpfc_dmabuf *dmabuf;
9721 struct dma_address *dma_address;
9722 uint32_t pa_addr;
9723 uint64_t phys_addr;
9724
9725 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf), GFP_KERNEL);
9726 if (!dmabuf)
9727 return -ENOMEM;
9728
9729 /*
9730 * The bootstrap mailbox region is comprised of 2 parts
9731 * plus an alignment restriction of 16 bytes.
9732 */
9733 bmbx_size = sizeof(struct lpfc_bmbx_create) + (LPFC_ALIGN_16_BYTE - 1);
9734 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev, bmbx_size,
9735 &dmabuf->phys, GFP_KERNEL);
9736 if (!dmabuf->virt) {
9737 kfree(dmabuf);
9738 return -ENOMEM;
9739 }
9740
9741 /*
9742 * Initialize the bootstrap mailbox pointers now so that the register
9743 * operations are simple later. The mailbox dma address is required
9744 * to be 16-byte aligned. Also align the virtual memory as each
9745 * maibox is copied into the bmbx mailbox region before issuing the
9746 * command to the port.
9747 */
9748 phba->sli4_hba.bmbx.dmabuf = dmabuf;
9749 phba->sli4_hba.bmbx.bmbx_size = bmbx_size;
9750
9751 phba->sli4_hba.bmbx.avirt = PTR_ALIGN(dmabuf->virt,
9752 LPFC_ALIGN_16_BYTE);
9753 phba->sli4_hba.bmbx.aphys = ALIGN(dmabuf->phys,
9754 LPFC_ALIGN_16_BYTE);
9755
9756 /*
9757 * Set the high and low physical addresses now. The SLI4 alignment
9758 * requirement is 16 bytes and the mailbox is posted to the port
9759 * as two 30-bit addresses. The other data is a bit marking whether
9760 * the 30-bit address is the high or low address.
9761 * Upcast bmbx aphys to 64bits so shift instruction compiles
9762 * clean on 32 bit machines.
9763 */
9764 dma_address = &phba->sli4_hba.bmbx.dma_address;
9765 phys_addr = (uint64_t)phba->sli4_hba.bmbx.aphys;
9766 pa_addr = (uint32_t) ((phys_addr >> 34) & 0x3fffffff);
9767 dma_address->addr_hi = (uint32_t) ((pa_addr << 2) |
9768 LPFC_BMBX_BIT1_ADDR_HI);
9769
9770 pa_addr = (uint32_t) ((phba->sli4_hba.bmbx.aphys >> 4) & 0x3fffffff);
9771 dma_address->addr_lo = (uint32_t) ((pa_addr << 2) |
9772 LPFC_BMBX_BIT1_ADDR_LO);
9773 return 0;
9774 }
9775
9776 /**
9777 * lpfc_destroy_bootstrap_mbox - Destroy all bootstrap mailbox resources
9778 * @phba: pointer to lpfc hba data structure.
9779 *
9780 * This routine is invoked to teardown the bootstrap mailbox
9781 * region and release all host resources. This routine requires
9782 * the caller to ensure all mailbox commands recovered, no
9783 * additional mailbox comands are sent, and interrupts are disabled
9784 * before calling this routine.
9785 *
9786 **/
9787 static void
lpfc_destroy_bootstrap_mbox(struct lpfc_hba * phba)9788 lpfc_destroy_bootstrap_mbox(struct lpfc_hba *phba)
9789 {
9790 dma_free_coherent(&phba->pcidev->dev,
9791 phba->sli4_hba.bmbx.bmbx_size,
9792 phba->sli4_hba.bmbx.dmabuf->virt,
9793 phba->sli4_hba.bmbx.dmabuf->phys);
9794
9795 kfree(phba->sli4_hba.bmbx.dmabuf);
9796 memset(&phba->sli4_hba.bmbx, 0, sizeof(struct lpfc_bmbx));
9797 }
9798
9799 static const char * const lpfc_topo_to_str[] = {
9800 "Loop then P2P",
9801 "Loopback",
9802 "P2P Only",
9803 "Unsupported",
9804 "Loop Only",
9805 "Unsupported",
9806 "P2P then Loop",
9807 };
9808
9809 #define LINK_FLAGS_DEF 0x0
9810 #define LINK_FLAGS_P2P 0x1
9811 #define LINK_FLAGS_LOOP 0x2
9812 /**
9813 * lpfc_map_topology - Map the topology read from READ_CONFIG
9814 * @phba: pointer to lpfc hba data structure.
9815 * @rd_config: pointer to read config data
9816 *
9817 * This routine is invoked to map the topology values as read
9818 * from the read config mailbox command. If the persistent
9819 * topology feature is supported, the firmware will provide the
9820 * saved topology information to be used in INIT_LINK
9821 **/
9822 static void
lpfc_map_topology(struct lpfc_hba * phba,struct lpfc_mbx_read_config * rd_config)9823 lpfc_map_topology(struct lpfc_hba *phba, struct lpfc_mbx_read_config *rd_config)
9824 {
9825 u8 ptv, tf, pt;
9826
9827 ptv = bf_get(lpfc_mbx_rd_conf_ptv, rd_config);
9828 tf = bf_get(lpfc_mbx_rd_conf_tf, rd_config);
9829 pt = bf_get(lpfc_mbx_rd_conf_pt, rd_config);
9830
9831 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
9832 "2027 Read Config Data : ptv:0x%x, tf:0x%x pt:0x%x",
9833 ptv, tf, pt);
9834 if (!ptv) {
9835 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
9836 "2019 FW does not support persistent topology "
9837 "Using driver parameter defined value [%s]",
9838 lpfc_topo_to_str[phba->cfg_topology]);
9839 return;
9840 }
9841 /* FW supports persistent topology - override module parameter value */
9842 set_bit(HBA_PERSISTENT_TOPO, &phba->hba_flag);
9843
9844 /* if ASIC_GEN_NUM >= 0xC) */
9845 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
9846 LPFC_SLI_INTF_IF_TYPE_6) ||
9847 (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) ==
9848 LPFC_SLI_INTF_FAMILY_G6)) {
9849 if (!tf)
9850 phba->cfg_topology = ((pt == LINK_FLAGS_LOOP)
9851 ? FLAGS_TOPOLOGY_MODE_LOOP
9852 : FLAGS_TOPOLOGY_MODE_PT_PT);
9853 else
9854 clear_bit(HBA_PERSISTENT_TOPO, &phba->hba_flag);
9855 } else { /* G5 */
9856 if (tf)
9857 /* If topology failover set - pt is '0' or '1' */
9858 phba->cfg_topology = (pt ? FLAGS_TOPOLOGY_MODE_PT_LOOP :
9859 FLAGS_TOPOLOGY_MODE_LOOP_PT);
9860 else
9861 phba->cfg_topology = ((pt == LINK_FLAGS_P2P)
9862 ? FLAGS_TOPOLOGY_MODE_PT_PT
9863 : FLAGS_TOPOLOGY_MODE_LOOP);
9864 }
9865 if (test_bit(HBA_PERSISTENT_TOPO, &phba->hba_flag))
9866 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
9867 "2020 Using persistent topology value [%s]",
9868 lpfc_topo_to_str[phba->cfg_topology]);
9869 else
9870 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
9871 "2021 Invalid topology values from FW "
9872 "Using driver parameter defined value [%s]",
9873 lpfc_topo_to_str[phba->cfg_topology]);
9874 }
9875
9876 /**
9877 * lpfc_sli4_read_config - Get the config parameters.
9878 * @phba: pointer to lpfc hba data structure.
9879 *
9880 * This routine is invoked to read the configuration parameters from the HBA.
9881 * The configuration parameters are used to set the base and maximum values
9882 * for RPI's XRI's VPI's VFI's and FCFIs. These values also affect the resource
9883 * allocation for the port.
9884 *
9885 * Return codes
9886 * 0 - successful
9887 * -ENOMEM - No available memory
9888 * -EIO - The mailbox failed to complete successfully.
9889 **/
9890 int
lpfc_sli4_read_config(struct lpfc_hba * phba)9891 lpfc_sli4_read_config(struct lpfc_hba *phba)
9892 {
9893 LPFC_MBOXQ_t *pmb;
9894 struct lpfc_mbx_read_config *rd_config;
9895 union lpfc_sli4_cfg_shdr *shdr;
9896 uint32_t shdr_status, shdr_add_status;
9897 struct lpfc_mbx_get_func_cfg *get_func_cfg;
9898 struct lpfc_rsrc_desc_fcfcoe *desc;
9899 char *pdesc_0;
9900 uint16_t forced_link_speed;
9901 uint32_t if_type, qmin, fawwpn;
9902 int length, i, rc = 0, rc2;
9903
9904 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
9905 if (!pmb) {
9906 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
9907 "2011 Unable to allocate memory for issuing "
9908 "SLI_CONFIG_SPECIAL mailbox command\n");
9909 return -ENOMEM;
9910 }
9911
9912 lpfc_read_config(phba, pmb);
9913
9914 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
9915 if (rc != MBX_SUCCESS) {
9916 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
9917 "2012 Mailbox failed , mbxCmd x%x "
9918 "READ_CONFIG, mbxStatus x%x\n",
9919 bf_get(lpfc_mqe_command, &pmb->u.mqe),
9920 bf_get(lpfc_mqe_status, &pmb->u.mqe));
9921 rc = -EIO;
9922 } else {
9923 rd_config = &pmb->u.mqe.un.rd_config;
9924 if (bf_get(lpfc_mbx_rd_conf_lnk_ldv, rd_config)) {
9925 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_VAL;
9926 phba->sli4_hba.lnk_info.lnk_tp =
9927 bf_get(lpfc_mbx_rd_conf_lnk_type, rd_config);
9928 phba->sli4_hba.lnk_info.lnk_no =
9929 bf_get(lpfc_mbx_rd_conf_lnk_numb, rd_config);
9930 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
9931 "3081 lnk_type:%d, lnk_numb:%d\n",
9932 phba->sli4_hba.lnk_info.lnk_tp,
9933 phba->sli4_hba.lnk_info.lnk_no);
9934 } else
9935 lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
9936 "3082 Mailbox (x%x) returned ldv:x0\n",
9937 bf_get(lpfc_mqe_command, &pmb->u.mqe));
9938 if (bf_get(lpfc_mbx_rd_conf_bbscn_def, rd_config)) {
9939 phba->bbcredit_support = 1;
9940 phba->sli4_hba.bbscn_params.word0 = rd_config->word8;
9941 }
9942
9943 fawwpn = bf_get(lpfc_mbx_rd_conf_fawwpn, rd_config);
9944
9945 if (fawwpn) {
9946 lpfc_printf_log(phba, KERN_INFO,
9947 LOG_INIT | LOG_DISCOVERY,
9948 "2702 READ_CONFIG: FA-PWWN is "
9949 "configured on\n");
9950 phba->sli4_hba.fawwpn_flag |= LPFC_FAWWPN_CONFIG;
9951 } else {
9952 /* Clear FW configured flag, preserve driver flag */
9953 phba->sli4_hba.fawwpn_flag &= ~LPFC_FAWWPN_CONFIG;
9954 }
9955
9956 phba->sli4_hba.conf_trunk =
9957 bf_get(lpfc_mbx_rd_conf_trunk, rd_config);
9958 phba->sli4_hba.extents_in_use =
9959 bf_get(lpfc_mbx_rd_conf_extnts_inuse, rd_config);
9960
9961 phba->sli4_hba.max_cfg_param.max_xri =
9962 bf_get(lpfc_mbx_rd_conf_xri_count, rd_config);
9963 /* Reduce resource usage in kdump environment */
9964 if (is_kdump_kernel() &&
9965 phba->sli4_hba.max_cfg_param.max_xri > 512)
9966 phba->sli4_hba.max_cfg_param.max_xri = 512;
9967 phba->sli4_hba.max_cfg_param.xri_base =
9968 bf_get(lpfc_mbx_rd_conf_xri_base, rd_config);
9969 phba->sli4_hba.max_cfg_param.max_vpi =
9970 bf_get(lpfc_mbx_rd_conf_vpi_count, rd_config);
9971 /* Limit the max we support */
9972 if (phba->sli4_hba.max_cfg_param.max_vpi > LPFC_MAX_VPORTS)
9973 phba->sli4_hba.max_cfg_param.max_vpi = LPFC_MAX_VPORTS;
9974 phba->sli4_hba.max_cfg_param.vpi_base =
9975 bf_get(lpfc_mbx_rd_conf_vpi_base, rd_config);
9976 phba->sli4_hba.max_cfg_param.max_rpi =
9977 bf_get(lpfc_mbx_rd_conf_rpi_count, rd_config);
9978 phba->sli4_hba.max_cfg_param.rpi_base =
9979 bf_get(lpfc_mbx_rd_conf_rpi_base, rd_config);
9980 phba->sli4_hba.max_cfg_param.max_vfi =
9981 bf_get(lpfc_mbx_rd_conf_vfi_count, rd_config);
9982 phba->sli4_hba.max_cfg_param.vfi_base =
9983 bf_get(lpfc_mbx_rd_conf_vfi_base, rd_config);
9984 phba->sli4_hba.max_cfg_param.max_fcfi =
9985 bf_get(lpfc_mbx_rd_conf_fcfi_count, rd_config);
9986 phba->sli4_hba.max_cfg_param.max_eq =
9987 bf_get(lpfc_mbx_rd_conf_eq_count, rd_config);
9988 phba->sli4_hba.max_cfg_param.max_rq =
9989 bf_get(lpfc_mbx_rd_conf_rq_count, rd_config);
9990 phba->sli4_hba.max_cfg_param.max_wq =
9991 bf_get(lpfc_mbx_rd_conf_wq_count, rd_config);
9992 phba->sli4_hba.max_cfg_param.max_cq =
9993 bf_get(lpfc_mbx_rd_conf_cq_count, rd_config);
9994 phba->lmt = bf_get(lpfc_mbx_rd_conf_lmt, rd_config);
9995 phba->sli4_hba.next_xri = phba->sli4_hba.max_cfg_param.xri_base;
9996 phba->vpi_base = phba->sli4_hba.max_cfg_param.vpi_base;
9997 phba->vfi_base = phba->sli4_hba.max_cfg_param.vfi_base;
9998 phba->max_vpi = (phba->sli4_hba.max_cfg_param.max_vpi > 0) ?
9999 (phba->sli4_hba.max_cfg_param.max_vpi - 1) : 0;
10000 phba->max_vports = phba->max_vpi;
10001
10002 /* Next decide on FPIN or Signal E2E CGN support
10003 * For congestion alarms and warnings valid combination are:
10004 * 1. FPIN alarms / FPIN warnings
10005 * 2. Signal alarms / Signal warnings
10006 * 3. FPIN alarms / Signal warnings
10007 * 4. Signal alarms / FPIN warnings
10008 *
10009 * Initialize the adapter frequency to 100 mSecs
10010 */
10011 phba->cgn_reg_fpin = LPFC_CGN_FPIN_BOTH;
10012 phba->cgn_reg_signal = EDC_CG_SIG_NOTSUPPORTED;
10013 phba->cgn_sig_freq = lpfc_fabric_cgn_frequency;
10014
10015 if (lpfc_use_cgn_signal) {
10016 if (bf_get(lpfc_mbx_rd_conf_wcs, rd_config)) {
10017 phba->cgn_reg_signal = EDC_CG_SIG_WARN_ONLY;
10018 phba->cgn_reg_fpin &= ~LPFC_CGN_FPIN_WARN;
10019 }
10020 if (bf_get(lpfc_mbx_rd_conf_acs, rd_config)) {
10021 /* MUST support both alarm and warning
10022 * because EDC does not support alarm alone.
10023 */
10024 if (phba->cgn_reg_signal !=
10025 EDC_CG_SIG_WARN_ONLY) {
10026 /* Must support both or none */
10027 phba->cgn_reg_fpin = LPFC_CGN_FPIN_BOTH;
10028 phba->cgn_reg_signal =
10029 EDC_CG_SIG_NOTSUPPORTED;
10030 } else {
10031 phba->cgn_reg_signal =
10032 EDC_CG_SIG_WARN_ALARM;
10033 phba->cgn_reg_fpin =
10034 LPFC_CGN_FPIN_NONE;
10035 }
10036 }
10037 }
10038
10039 /* Set the congestion initial signal and fpin values. */
10040 phba->cgn_init_reg_fpin = phba->cgn_reg_fpin;
10041 phba->cgn_init_reg_signal = phba->cgn_reg_signal;
10042
10043 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
10044 "6446 READ_CONFIG reg_sig x%x reg_fpin:x%x\n",
10045 phba->cgn_reg_signal, phba->cgn_reg_fpin);
10046
10047 lpfc_map_topology(phba, rd_config);
10048 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
10049 "2003 cfg params Extents? %d "
10050 "XRI(B:%d M:%d), "
10051 "VPI(B:%d M:%d) "
10052 "VFI(B:%d M:%d) "
10053 "RPI(B:%d M:%d) "
10054 "FCFI:%d EQ:%d CQ:%d WQ:%d RQ:%d lmt:x%x\n",
10055 phba->sli4_hba.extents_in_use,
10056 phba->sli4_hba.max_cfg_param.xri_base,
10057 phba->sli4_hba.max_cfg_param.max_xri,
10058 phba->sli4_hba.max_cfg_param.vpi_base,
10059 phba->sli4_hba.max_cfg_param.max_vpi,
10060 phba->sli4_hba.max_cfg_param.vfi_base,
10061 phba->sli4_hba.max_cfg_param.max_vfi,
10062 phba->sli4_hba.max_cfg_param.rpi_base,
10063 phba->sli4_hba.max_cfg_param.max_rpi,
10064 phba->sli4_hba.max_cfg_param.max_fcfi,
10065 phba->sli4_hba.max_cfg_param.max_eq,
10066 phba->sli4_hba.max_cfg_param.max_cq,
10067 phba->sli4_hba.max_cfg_param.max_wq,
10068 phba->sli4_hba.max_cfg_param.max_rq,
10069 phba->lmt);
10070
10071 /*
10072 * Calculate queue resources based on how
10073 * many WQ/CQ/EQs are available.
10074 */
10075 qmin = phba->sli4_hba.max_cfg_param.max_wq;
10076 if (phba->sli4_hba.max_cfg_param.max_cq < qmin)
10077 qmin = phba->sli4_hba.max_cfg_param.max_cq;
10078 /*
10079 * Reserve 4 (ELS, NVME LS, MBOX, plus one extra) and
10080 * the remainder can be used for NVME / FCP.
10081 */
10082 qmin -= 4;
10083 if (phba->sli4_hba.max_cfg_param.max_eq < qmin)
10084 qmin = phba->sli4_hba.max_cfg_param.max_eq;
10085
10086 /* Check to see if there is enough for default cfg */
10087 if ((phba->cfg_irq_chann > qmin) ||
10088 (phba->cfg_hdw_queue > qmin)) {
10089 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10090 "2005 Reducing Queues - "
10091 "FW resource limitation: "
10092 "WQ %d CQ %d EQ %d: min %d: "
10093 "IRQ %d HDWQ %d\n",
10094 phba->sli4_hba.max_cfg_param.max_wq,
10095 phba->sli4_hba.max_cfg_param.max_cq,
10096 phba->sli4_hba.max_cfg_param.max_eq,
10097 qmin, phba->cfg_irq_chann,
10098 phba->cfg_hdw_queue);
10099
10100 if (phba->cfg_irq_chann > qmin)
10101 phba->cfg_irq_chann = qmin;
10102 if (phba->cfg_hdw_queue > qmin)
10103 phba->cfg_hdw_queue = qmin;
10104 }
10105 }
10106
10107 if (rc)
10108 goto read_cfg_out;
10109
10110 /* Update link speed if forced link speed is supported */
10111 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
10112 if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) {
10113 forced_link_speed =
10114 bf_get(lpfc_mbx_rd_conf_link_speed, rd_config);
10115 if (forced_link_speed) {
10116 set_bit(HBA_FORCED_LINK_SPEED, &phba->hba_flag);
10117
10118 switch (forced_link_speed) {
10119 case LINK_SPEED_1G:
10120 phba->cfg_link_speed =
10121 LPFC_USER_LINK_SPEED_1G;
10122 break;
10123 case LINK_SPEED_2G:
10124 phba->cfg_link_speed =
10125 LPFC_USER_LINK_SPEED_2G;
10126 break;
10127 case LINK_SPEED_4G:
10128 phba->cfg_link_speed =
10129 LPFC_USER_LINK_SPEED_4G;
10130 break;
10131 case LINK_SPEED_8G:
10132 phba->cfg_link_speed =
10133 LPFC_USER_LINK_SPEED_8G;
10134 break;
10135 case LINK_SPEED_10G:
10136 phba->cfg_link_speed =
10137 LPFC_USER_LINK_SPEED_10G;
10138 break;
10139 case LINK_SPEED_16G:
10140 phba->cfg_link_speed =
10141 LPFC_USER_LINK_SPEED_16G;
10142 break;
10143 case LINK_SPEED_32G:
10144 phba->cfg_link_speed =
10145 LPFC_USER_LINK_SPEED_32G;
10146 break;
10147 case LINK_SPEED_64G:
10148 phba->cfg_link_speed =
10149 LPFC_USER_LINK_SPEED_64G;
10150 break;
10151 case 0xffff:
10152 phba->cfg_link_speed =
10153 LPFC_USER_LINK_SPEED_AUTO;
10154 break;
10155 default:
10156 lpfc_printf_log(phba, KERN_ERR,
10157 LOG_TRACE_EVENT,
10158 "0047 Unrecognized link "
10159 "speed : %d\n",
10160 forced_link_speed);
10161 phba->cfg_link_speed =
10162 LPFC_USER_LINK_SPEED_AUTO;
10163 }
10164 }
10165 }
10166
10167 /* Reset the DFT_HBA_Q_DEPTH to the max xri */
10168 length = phba->sli4_hba.max_cfg_param.max_xri -
10169 lpfc_sli4_get_els_iocb_cnt(phba);
10170 if (phba->cfg_hba_queue_depth > length) {
10171 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
10172 "3361 HBA queue depth changed from %d to %d\n",
10173 phba->cfg_hba_queue_depth, length);
10174 phba->cfg_hba_queue_depth = length;
10175 }
10176
10177 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) <
10178 LPFC_SLI_INTF_IF_TYPE_2)
10179 goto read_cfg_out;
10180
10181 /* get the pf# and vf# for SLI4 if_type 2 port */
10182 length = (sizeof(struct lpfc_mbx_get_func_cfg) -
10183 sizeof(struct lpfc_sli4_cfg_mhdr));
10184 lpfc_sli4_config(phba, pmb, LPFC_MBOX_SUBSYSTEM_COMMON,
10185 LPFC_MBOX_OPCODE_GET_FUNCTION_CONFIG,
10186 length, LPFC_SLI4_MBX_EMBED);
10187
10188 rc2 = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
10189 shdr = (union lpfc_sli4_cfg_shdr *)
10190 &pmb->u.mqe.un.sli4_config.header.cfg_shdr;
10191 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
10192 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
10193 if (rc2 || shdr_status || shdr_add_status) {
10194 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10195 "3026 Mailbox failed , mbxCmd x%x "
10196 "GET_FUNCTION_CONFIG, mbxStatus x%x\n",
10197 bf_get(lpfc_mqe_command, &pmb->u.mqe),
10198 bf_get(lpfc_mqe_status, &pmb->u.mqe));
10199 goto read_cfg_out;
10200 }
10201
10202 /* search for fc_fcoe resrouce descriptor */
10203 get_func_cfg = &pmb->u.mqe.un.get_func_cfg;
10204
10205 pdesc_0 = (char *)&get_func_cfg->func_cfg.desc[0];
10206 desc = (struct lpfc_rsrc_desc_fcfcoe *)pdesc_0;
10207 length = bf_get(lpfc_rsrc_desc_fcfcoe_length, desc);
10208 if (length == LPFC_RSRC_DESC_TYPE_FCFCOE_V0_RSVD)
10209 length = LPFC_RSRC_DESC_TYPE_FCFCOE_V0_LENGTH;
10210 else if (length != LPFC_RSRC_DESC_TYPE_FCFCOE_V1_LENGTH)
10211 goto read_cfg_out;
10212
10213 for (i = 0; i < LPFC_RSRC_DESC_MAX_NUM; i++) {
10214 desc = (struct lpfc_rsrc_desc_fcfcoe *)(pdesc_0 + length * i);
10215 if (LPFC_RSRC_DESC_TYPE_FCFCOE ==
10216 bf_get(lpfc_rsrc_desc_fcfcoe_type, desc)) {
10217 phba->sli4_hba.iov.pf_number =
10218 bf_get(lpfc_rsrc_desc_fcfcoe_pfnum, desc);
10219 phba->sli4_hba.iov.vf_number =
10220 bf_get(lpfc_rsrc_desc_fcfcoe_vfnum, desc);
10221 break;
10222 }
10223 }
10224
10225 if (i < LPFC_RSRC_DESC_MAX_NUM)
10226 lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
10227 "3027 GET_FUNCTION_CONFIG: pf_number:%d, "
10228 "vf_number:%d\n", phba->sli4_hba.iov.pf_number,
10229 phba->sli4_hba.iov.vf_number);
10230 else
10231 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10232 "3028 GET_FUNCTION_CONFIG: failed to find "
10233 "Resource Descriptor:x%x\n",
10234 LPFC_RSRC_DESC_TYPE_FCFCOE);
10235
10236 read_cfg_out:
10237 mempool_free(pmb, phba->mbox_mem_pool);
10238 return rc;
10239 }
10240
10241 /**
10242 * lpfc_setup_endian_order - Write endian order to an SLI4 if_type 0 port.
10243 * @phba: pointer to lpfc hba data structure.
10244 *
10245 * This routine is invoked to setup the port-side endian order when
10246 * the port if_type is 0. This routine has no function for other
10247 * if_types.
10248 *
10249 * Return codes
10250 * 0 - successful
10251 * -ENOMEM - No available memory
10252 * -EIO - The mailbox failed to complete successfully.
10253 **/
10254 static int
lpfc_setup_endian_order(struct lpfc_hba * phba)10255 lpfc_setup_endian_order(struct lpfc_hba *phba)
10256 {
10257 LPFC_MBOXQ_t *mboxq;
10258 uint32_t if_type, rc = 0;
10259 uint32_t endian_mb_data[2] = {HOST_ENDIAN_LOW_WORD0,
10260 HOST_ENDIAN_HIGH_WORD1};
10261
10262 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
10263 switch (if_type) {
10264 case LPFC_SLI_INTF_IF_TYPE_0:
10265 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
10266 GFP_KERNEL);
10267 if (!mboxq) {
10268 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10269 "0492 Unable to allocate memory for "
10270 "issuing SLI_CONFIG_SPECIAL mailbox "
10271 "command\n");
10272 return -ENOMEM;
10273 }
10274
10275 /*
10276 * The SLI4_CONFIG_SPECIAL mailbox command requires the first
10277 * two words to contain special data values and no other data.
10278 */
10279 memset(mboxq, 0, sizeof(LPFC_MBOXQ_t));
10280 memcpy(&mboxq->u.mqe, &endian_mb_data, sizeof(endian_mb_data));
10281 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
10282 if (rc != MBX_SUCCESS) {
10283 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10284 "0493 SLI_CONFIG_SPECIAL mailbox "
10285 "failed with status x%x\n",
10286 rc);
10287 rc = -EIO;
10288 }
10289 mempool_free(mboxq, phba->mbox_mem_pool);
10290 break;
10291 case LPFC_SLI_INTF_IF_TYPE_6:
10292 case LPFC_SLI_INTF_IF_TYPE_2:
10293 case LPFC_SLI_INTF_IF_TYPE_1:
10294 default:
10295 break;
10296 }
10297 return rc;
10298 }
10299
10300 /**
10301 * lpfc_sli4_queue_verify - Verify and update EQ counts
10302 * @phba: pointer to lpfc hba data structure.
10303 *
10304 * This routine is invoked to check the user settable queue counts for EQs.
10305 * After this routine is called the counts will be set to valid values that
10306 * adhere to the constraints of the system's interrupt vectors and the port's
10307 * queue resources.
10308 *
10309 * Return codes
10310 * 0 - successful
10311 * -ENOMEM - No available memory
10312 **/
10313 static int
lpfc_sli4_queue_verify(struct lpfc_hba * phba)10314 lpfc_sli4_queue_verify(struct lpfc_hba *phba)
10315 {
10316 /*
10317 * Sanity check for configured queue parameters against the run-time
10318 * device parameters
10319 */
10320
10321 if (phba->nvmet_support) {
10322 if (phba->cfg_hdw_queue < phba->cfg_nvmet_mrq)
10323 phba->cfg_nvmet_mrq = phba->cfg_hdw_queue;
10324 if (phba->cfg_nvmet_mrq > LPFC_NVMET_MRQ_MAX)
10325 phba->cfg_nvmet_mrq = LPFC_NVMET_MRQ_MAX;
10326 }
10327
10328 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
10329 "2574 IO channels: hdwQ %d IRQ %d MRQ: %d\n",
10330 phba->cfg_hdw_queue, phba->cfg_irq_chann,
10331 phba->cfg_nvmet_mrq);
10332
10333 /* Get EQ depth from module parameter, fake the default for now */
10334 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
10335 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
10336
10337 /* Get CQ depth from module parameter, fake the default for now */
10338 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
10339 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
10340 return 0;
10341 }
10342
10343 static int
lpfc_alloc_io_wq_cq(struct lpfc_hba * phba,int idx)10344 lpfc_alloc_io_wq_cq(struct lpfc_hba *phba, int idx)
10345 {
10346 struct lpfc_queue *qdesc;
10347 u32 wqesize;
10348 int cpu;
10349
10350 cpu = lpfc_find_cpu_handle(phba, idx, LPFC_FIND_BY_HDWQ);
10351 /* Create Fast Path IO CQs */
10352 if (phba->enab_exp_wqcq_pages)
10353 /* Increase the CQ size when WQEs contain an embedded cdb */
10354 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE,
10355 phba->sli4_hba.cq_esize,
10356 LPFC_CQE_EXP_COUNT, cpu);
10357
10358 else
10359 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10360 phba->sli4_hba.cq_esize,
10361 phba->sli4_hba.cq_ecount, cpu);
10362 if (!qdesc) {
10363 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10364 "0499 Failed allocate fast-path IO CQ (%d)\n",
10365 idx);
10366 return 1;
10367 }
10368 qdesc->qe_valid = 1;
10369 qdesc->hdwq = idx;
10370 qdesc->chann = cpu;
10371 phba->sli4_hba.hdwq[idx].io_cq = qdesc;
10372
10373 /* Create Fast Path IO WQs */
10374 if (phba->enab_exp_wqcq_pages) {
10375 /* Increase the WQ size when WQEs contain an embedded cdb */
10376 wqesize = (phba->fcp_embed_io) ?
10377 LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize;
10378 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE,
10379 wqesize,
10380 LPFC_WQE_EXP_COUNT, cpu);
10381 } else
10382 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10383 phba->sli4_hba.wq_esize,
10384 phba->sli4_hba.wq_ecount, cpu);
10385
10386 if (!qdesc) {
10387 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10388 "0503 Failed allocate fast-path IO WQ (%d)\n",
10389 idx);
10390 return 1;
10391 }
10392 qdesc->hdwq = idx;
10393 qdesc->chann = cpu;
10394 phba->sli4_hba.hdwq[idx].io_wq = qdesc;
10395 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
10396 return 0;
10397 }
10398
10399 /**
10400 * lpfc_sli4_queue_create - Create all the SLI4 queues
10401 * @phba: pointer to lpfc hba data structure.
10402 *
10403 * This routine is invoked to allocate all the SLI4 queues for the FCoE HBA
10404 * operation. For each SLI4 queue type, the parameters such as queue entry
10405 * count (queue depth) shall be taken from the module parameter. For now,
10406 * we just use some constant number as place holder.
10407 *
10408 * Return codes
10409 * 0 - successful
10410 * -ENOMEM - No availble memory
10411 * -EIO - The mailbox failed to complete successfully.
10412 **/
10413 int
lpfc_sli4_queue_create(struct lpfc_hba * phba)10414 lpfc_sli4_queue_create(struct lpfc_hba *phba)
10415 {
10416 struct lpfc_queue *qdesc;
10417 int idx, cpu, eqcpu;
10418 struct lpfc_sli4_hdw_queue *qp;
10419 struct lpfc_vector_map_info *cpup;
10420 struct lpfc_vector_map_info *eqcpup;
10421 struct lpfc_eq_intr_info *eqi;
10422 u32 wqesize;
10423
10424 /*
10425 * Create HBA Record arrays.
10426 * Both NVME and FCP will share that same vectors / EQs
10427 */
10428 phba->sli4_hba.mq_esize = LPFC_MQE_SIZE;
10429 phba->sli4_hba.mq_ecount = LPFC_MQE_DEF_COUNT;
10430 phba->sli4_hba.wq_esize = LPFC_WQE_SIZE;
10431 phba->sli4_hba.wq_ecount = LPFC_WQE_DEF_COUNT;
10432 phba->sli4_hba.rq_esize = LPFC_RQE_SIZE;
10433 phba->sli4_hba.rq_ecount = LPFC_RQE_DEF_COUNT;
10434 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
10435 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
10436 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
10437 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
10438
10439 if (!phba->sli4_hba.hdwq) {
10440 phba->sli4_hba.hdwq = kcalloc(
10441 phba->cfg_hdw_queue, sizeof(struct lpfc_sli4_hdw_queue),
10442 GFP_KERNEL);
10443 if (!phba->sli4_hba.hdwq) {
10444 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10445 "6427 Failed allocate memory for "
10446 "fast-path Hardware Queue array\n");
10447 goto out_error;
10448 }
10449 /* Prepare hardware queues to take IO buffers */
10450 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
10451 qp = &phba->sli4_hba.hdwq[idx];
10452 spin_lock_init(&qp->io_buf_list_get_lock);
10453 spin_lock_init(&qp->io_buf_list_put_lock);
10454 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_get);
10455 INIT_LIST_HEAD(&qp->lpfc_io_buf_list_put);
10456 qp->get_io_bufs = 0;
10457 qp->put_io_bufs = 0;
10458 qp->total_io_bufs = 0;
10459 spin_lock_init(&qp->abts_io_buf_list_lock);
10460 INIT_LIST_HEAD(&qp->lpfc_abts_io_buf_list);
10461 qp->abts_scsi_io_bufs = 0;
10462 qp->abts_nvme_io_bufs = 0;
10463 INIT_LIST_HEAD(&qp->sgl_list);
10464 INIT_LIST_HEAD(&qp->cmd_rsp_buf_list);
10465 spin_lock_init(&qp->hdwq_lock);
10466 }
10467 }
10468
10469 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
10470 if (phba->nvmet_support) {
10471 phba->sli4_hba.nvmet_cqset = kcalloc(
10472 phba->cfg_nvmet_mrq,
10473 sizeof(struct lpfc_queue *),
10474 GFP_KERNEL);
10475 if (!phba->sli4_hba.nvmet_cqset) {
10476 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10477 "3121 Fail allocate memory for "
10478 "fast-path CQ set array\n");
10479 goto out_error;
10480 }
10481 phba->sli4_hba.nvmet_mrq_hdr = kcalloc(
10482 phba->cfg_nvmet_mrq,
10483 sizeof(struct lpfc_queue *),
10484 GFP_KERNEL);
10485 if (!phba->sli4_hba.nvmet_mrq_hdr) {
10486 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10487 "3122 Fail allocate memory for "
10488 "fast-path RQ set hdr array\n");
10489 goto out_error;
10490 }
10491 phba->sli4_hba.nvmet_mrq_data = kcalloc(
10492 phba->cfg_nvmet_mrq,
10493 sizeof(struct lpfc_queue *),
10494 GFP_KERNEL);
10495 if (!phba->sli4_hba.nvmet_mrq_data) {
10496 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10497 "3124 Fail allocate memory for "
10498 "fast-path RQ set data array\n");
10499 goto out_error;
10500 }
10501 }
10502 }
10503
10504 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
10505
10506 /* Create HBA Event Queues (EQs) */
10507 for_each_present_cpu(cpu) {
10508 /* We only want to create 1 EQ per vector, even though
10509 * multiple CPUs might be using that vector. so only
10510 * selects the CPUs that are LPFC_CPU_FIRST_IRQ.
10511 */
10512 cpup = &phba->sli4_hba.cpu_map[cpu];
10513 if (!(cpup->flag & LPFC_CPU_FIRST_IRQ))
10514 continue;
10515
10516 /* Get a ptr to the Hardware Queue associated with this CPU */
10517 qp = &phba->sli4_hba.hdwq[cpup->hdwq];
10518
10519 /* Allocate an EQ */
10520 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10521 phba->sli4_hba.eq_esize,
10522 phba->sli4_hba.eq_ecount, cpu);
10523 if (!qdesc) {
10524 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10525 "0497 Failed allocate EQ (%d)\n",
10526 cpup->hdwq);
10527 goto out_error;
10528 }
10529 qdesc->qe_valid = 1;
10530 qdesc->hdwq = cpup->hdwq;
10531 qdesc->chann = cpu; /* First CPU this EQ is affinitized to */
10532 qdesc->last_cpu = qdesc->chann;
10533
10534 /* Save the allocated EQ in the Hardware Queue */
10535 qp->hba_eq = qdesc;
10536
10537 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, qdesc->last_cpu);
10538 list_add(&qdesc->cpu_list, &eqi->list);
10539 }
10540
10541 /* Now we need to populate the other Hardware Queues, that share
10542 * an IRQ vector, with the associated EQ ptr.
10543 */
10544 for_each_present_cpu(cpu) {
10545 cpup = &phba->sli4_hba.cpu_map[cpu];
10546
10547 /* Check for EQ already allocated in previous loop */
10548 if (cpup->flag & LPFC_CPU_FIRST_IRQ)
10549 continue;
10550
10551 /* Check for multiple CPUs per hdwq */
10552 qp = &phba->sli4_hba.hdwq[cpup->hdwq];
10553 if (qp->hba_eq)
10554 continue;
10555
10556 /* We need to share an EQ for this hdwq */
10557 eqcpu = lpfc_find_cpu_handle(phba, cpup->eq, LPFC_FIND_BY_EQ);
10558 eqcpup = &phba->sli4_hba.cpu_map[eqcpu];
10559 qp->hba_eq = phba->sli4_hba.hdwq[eqcpup->hdwq].hba_eq;
10560 }
10561
10562 /* Allocate IO Path SLI4 CQ/WQs */
10563 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
10564 if (lpfc_alloc_io_wq_cq(phba, idx))
10565 goto out_error;
10566 }
10567
10568 if (phba->nvmet_support) {
10569 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) {
10570 cpu = lpfc_find_cpu_handle(phba, idx,
10571 LPFC_FIND_BY_HDWQ);
10572 qdesc = lpfc_sli4_queue_alloc(phba,
10573 LPFC_DEFAULT_PAGE_SIZE,
10574 phba->sli4_hba.cq_esize,
10575 phba->sli4_hba.cq_ecount,
10576 cpu);
10577 if (!qdesc) {
10578 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10579 "3142 Failed allocate NVME "
10580 "CQ Set (%d)\n", idx);
10581 goto out_error;
10582 }
10583 qdesc->qe_valid = 1;
10584 qdesc->hdwq = idx;
10585 qdesc->chann = cpu;
10586 phba->sli4_hba.nvmet_cqset[idx] = qdesc;
10587 }
10588 }
10589
10590 /*
10591 * Create Slow Path Completion Queues (CQs)
10592 */
10593
10594 cpu = lpfc_find_cpu_handle(phba, 0, LPFC_FIND_BY_EQ);
10595 /* Create slow-path Mailbox Command Complete Queue */
10596 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10597 phba->sli4_hba.cq_esize,
10598 phba->sli4_hba.cq_ecount, cpu);
10599 if (!qdesc) {
10600 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10601 "0500 Failed allocate slow-path mailbox CQ\n");
10602 goto out_error;
10603 }
10604 qdesc->qe_valid = 1;
10605 phba->sli4_hba.mbx_cq = qdesc;
10606
10607 /* Create slow-path ELS Complete Queue */
10608 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10609 phba->sli4_hba.cq_esize,
10610 phba->sli4_hba.cq_ecount, cpu);
10611 if (!qdesc) {
10612 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10613 "0501 Failed allocate slow-path ELS CQ\n");
10614 goto out_error;
10615 }
10616 qdesc->qe_valid = 1;
10617 qdesc->chann = cpu;
10618 phba->sli4_hba.els_cq = qdesc;
10619
10620
10621 /*
10622 * Create Slow Path Work Queues (WQs)
10623 */
10624
10625 /* Create Mailbox Command Queue */
10626
10627 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10628 phba->sli4_hba.mq_esize,
10629 phba->sli4_hba.mq_ecount, cpu);
10630 if (!qdesc) {
10631 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10632 "0505 Failed allocate slow-path MQ\n");
10633 goto out_error;
10634 }
10635 qdesc->chann = cpu;
10636 phba->sli4_hba.mbx_wq = qdesc;
10637
10638 /*
10639 * Create ELS Work Queues
10640 */
10641
10642 /*
10643 * Create slow-path ELS Work Queue.
10644 * Increase the ELS WQ size when WQEs contain an embedded cdb
10645 */
10646 wqesize = (phba->fcp_embed_io) ?
10647 LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize;
10648
10649 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10650 wqesize,
10651 phba->sli4_hba.wq_ecount, cpu);
10652 if (!qdesc) {
10653 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10654 "0504 Failed allocate slow-path ELS WQ\n");
10655 goto out_error;
10656 }
10657 qdesc->chann = cpu;
10658 phba->sli4_hba.els_wq = qdesc;
10659 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
10660
10661 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
10662 /* Create NVME LS Complete Queue */
10663 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10664 phba->sli4_hba.cq_esize,
10665 phba->sli4_hba.cq_ecount, cpu);
10666 if (!qdesc) {
10667 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10668 "6079 Failed allocate NVME LS CQ\n");
10669 goto out_error;
10670 }
10671 qdesc->chann = cpu;
10672 qdesc->qe_valid = 1;
10673 phba->sli4_hba.nvmels_cq = qdesc;
10674
10675 /* Create NVME LS Work Queue */
10676 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10677 phba->sli4_hba.wq_esize,
10678 phba->sli4_hba.wq_ecount, cpu);
10679 if (!qdesc) {
10680 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10681 "6080 Failed allocate NVME LS WQ\n");
10682 goto out_error;
10683 }
10684 qdesc->chann = cpu;
10685 phba->sli4_hba.nvmels_wq = qdesc;
10686 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
10687 }
10688
10689 /*
10690 * Create Receive Queue (RQ)
10691 */
10692
10693 /* Create Receive Queue for header */
10694 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10695 phba->sli4_hba.rq_esize,
10696 phba->sli4_hba.rq_ecount, cpu);
10697 if (!qdesc) {
10698 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10699 "0506 Failed allocate receive HRQ\n");
10700 goto out_error;
10701 }
10702 phba->sli4_hba.hdr_rq = qdesc;
10703
10704 /* Create Receive Queue for data */
10705 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_DEFAULT_PAGE_SIZE,
10706 phba->sli4_hba.rq_esize,
10707 phba->sli4_hba.rq_ecount, cpu);
10708 if (!qdesc) {
10709 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10710 "0507 Failed allocate receive DRQ\n");
10711 goto out_error;
10712 }
10713 phba->sli4_hba.dat_rq = qdesc;
10714
10715 if ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) &&
10716 phba->nvmet_support) {
10717 for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) {
10718 cpu = lpfc_find_cpu_handle(phba, idx,
10719 LPFC_FIND_BY_HDWQ);
10720 /* Create NVMET Receive Queue for header */
10721 qdesc = lpfc_sli4_queue_alloc(phba,
10722 LPFC_DEFAULT_PAGE_SIZE,
10723 phba->sli4_hba.rq_esize,
10724 LPFC_NVMET_RQE_DEF_COUNT,
10725 cpu);
10726 if (!qdesc) {
10727 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10728 "3146 Failed allocate "
10729 "receive HRQ\n");
10730 goto out_error;
10731 }
10732 qdesc->hdwq = idx;
10733 phba->sli4_hba.nvmet_mrq_hdr[idx] = qdesc;
10734
10735 /* Only needed for header of RQ pair */
10736 qdesc->rqbp = kzalloc_node(sizeof(*qdesc->rqbp),
10737 GFP_KERNEL,
10738 cpu_to_node(cpu));
10739 if (qdesc->rqbp == NULL) {
10740 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10741 "6131 Failed allocate "
10742 "Header RQBP\n");
10743 goto out_error;
10744 }
10745
10746 /* Put list in known state in case driver load fails. */
10747 INIT_LIST_HEAD(&qdesc->rqbp->rqb_buffer_list);
10748
10749 /* Create NVMET Receive Queue for data */
10750 qdesc = lpfc_sli4_queue_alloc(phba,
10751 LPFC_DEFAULT_PAGE_SIZE,
10752 phba->sli4_hba.rq_esize,
10753 LPFC_NVMET_RQE_DEF_COUNT,
10754 cpu);
10755 if (!qdesc) {
10756 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10757 "3156 Failed allocate "
10758 "receive DRQ\n");
10759 goto out_error;
10760 }
10761 qdesc->hdwq = idx;
10762 phba->sli4_hba.nvmet_mrq_data[idx] = qdesc;
10763 }
10764 }
10765
10766 /* Clear NVME stats */
10767 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
10768 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
10769 memset(&phba->sli4_hba.hdwq[idx].nvme_cstat, 0,
10770 sizeof(phba->sli4_hba.hdwq[idx].nvme_cstat));
10771 }
10772 }
10773
10774 /* Clear SCSI stats */
10775 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) {
10776 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
10777 memset(&phba->sli4_hba.hdwq[idx].scsi_cstat, 0,
10778 sizeof(phba->sli4_hba.hdwq[idx].scsi_cstat));
10779 }
10780 }
10781
10782 return 0;
10783
10784 out_error:
10785 lpfc_sli4_queue_destroy(phba);
10786 return -ENOMEM;
10787 }
10788
10789 static inline void
__lpfc_sli4_release_queue(struct lpfc_queue ** qp)10790 __lpfc_sli4_release_queue(struct lpfc_queue **qp)
10791 {
10792 if (*qp != NULL) {
10793 lpfc_sli4_queue_free(*qp);
10794 *qp = NULL;
10795 }
10796 }
10797
10798 static inline void
lpfc_sli4_release_queues(struct lpfc_queue *** qs,int max)10799 lpfc_sli4_release_queues(struct lpfc_queue ***qs, int max)
10800 {
10801 int idx;
10802
10803 if (*qs == NULL)
10804 return;
10805
10806 for (idx = 0; idx < max; idx++)
10807 __lpfc_sli4_release_queue(&(*qs)[idx]);
10808
10809 kfree(*qs);
10810 *qs = NULL;
10811 }
10812
10813 static inline void
lpfc_sli4_release_hdwq(struct lpfc_hba * phba)10814 lpfc_sli4_release_hdwq(struct lpfc_hba *phba)
10815 {
10816 struct lpfc_sli4_hdw_queue *hdwq;
10817 struct lpfc_queue *eq;
10818 uint32_t idx;
10819
10820 hdwq = phba->sli4_hba.hdwq;
10821
10822 /* Loop thru all Hardware Queues */
10823 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
10824 /* Free the CQ/WQ corresponding to the Hardware Queue */
10825 lpfc_sli4_queue_free(hdwq[idx].io_cq);
10826 lpfc_sli4_queue_free(hdwq[idx].io_wq);
10827 hdwq[idx].hba_eq = NULL;
10828 hdwq[idx].io_cq = NULL;
10829 hdwq[idx].io_wq = NULL;
10830 if (phba->cfg_xpsgl && !phba->nvmet_support)
10831 lpfc_free_sgl_per_hdwq(phba, &hdwq[idx]);
10832 lpfc_free_cmd_rsp_buf_per_hdwq(phba, &hdwq[idx]);
10833 }
10834 /* Loop thru all IRQ vectors */
10835 for (idx = 0; idx < phba->cfg_irq_chann; idx++) {
10836 /* Free the EQ corresponding to the IRQ vector */
10837 eq = phba->sli4_hba.hba_eq_hdl[idx].eq;
10838 lpfc_sli4_queue_free(eq);
10839 phba->sli4_hba.hba_eq_hdl[idx].eq = NULL;
10840 }
10841 }
10842
10843 /**
10844 * lpfc_sli4_queue_destroy - Destroy all the SLI4 queues
10845 * @phba: pointer to lpfc hba data structure.
10846 *
10847 * This routine is invoked to release all the SLI4 queues with the FCoE HBA
10848 * operation.
10849 *
10850 * Return codes
10851 * 0 - successful
10852 * -ENOMEM - No available memory
10853 * -EIO - The mailbox failed to complete successfully.
10854 **/
10855 void
lpfc_sli4_queue_destroy(struct lpfc_hba * phba)10856 lpfc_sli4_queue_destroy(struct lpfc_hba *phba)
10857 {
10858 /*
10859 * Set FREE_INIT before beginning to free the queues.
10860 * Wait until the users of queues to acknowledge to
10861 * release queues by clearing FREE_WAIT.
10862 */
10863 spin_lock_irq(&phba->hbalock);
10864 phba->sli.sli_flag |= LPFC_QUEUE_FREE_INIT;
10865 while (phba->sli.sli_flag & LPFC_QUEUE_FREE_WAIT) {
10866 spin_unlock_irq(&phba->hbalock);
10867 msleep(20);
10868 spin_lock_irq(&phba->hbalock);
10869 }
10870 spin_unlock_irq(&phba->hbalock);
10871
10872 lpfc_sli4_cleanup_poll_list(phba);
10873
10874 /* Release HBA eqs */
10875 if (phba->sli4_hba.hdwq)
10876 lpfc_sli4_release_hdwq(phba);
10877
10878 if (phba->nvmet_support) {
10879 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_cqset,
10880 phba->cfg_nvmet_mrq);
10881
10882 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_hdr,
10883 phba->cfg_nvmet_mrq);
10884 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_data,
10885 phba->cfg_nvmet_mrq);
10886 }
10887
10888 /* Release mailbox command work queue */
10889 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_wq);
10890
10891 /* Release ELS work queue */
10892 __lpfc_sli4_release_queue(&phba->sli4_hba.els_wq);
10893
10894 /* Release ELS work queue */
10895 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_wq);
10896
10897 /* Release unsolicited receive queue */
10898 __lpfc_sli4_release_queue(&phba->sli4_hba.hdr_rq);
10899 __lpfc_sli4_release_queue(&phba->sli4_hba.dat_rq);
10900
10901 /* Release ELS complete queue */
10902 __lpfc_sli4_release_queue(&phba->sli4_hba.els_cq);
10903
10904 /* Release NVME LS complete queue */
10905 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_cq);
10906
10907 /* Release mailbox command complete queue */
10908 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_cq);
10909
10910 /* Everything on this list has been freed */
10911 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
10912
10913 /* Done with freeing the queues */
10914 spin_lock_irq(&phba->hbalock);
10915 phba->sli.sli_flag &= ~LPFC_QUEUE_FREE_INIT;
10916 spin_unlock_irq(&phba->hbalock);
10917 }
10918
10919 int
lpfc_free_rq_buffer(struct lpfc_hba * phba,struct lpfc_queue * rq)10920 lpfc_free_rq_buffer(struct lpfc_hba *phba, struct lpfc_queue *rq)
10921 {
10922 struct lpfc_rqb *rqbp;
10923 struct lpfc_dmabuf *h_buf;
10924 struct rqb_dmabuf *rqb_buffer;
10925
10926 rqbp = rq->rqbp;
10927 while (!list_empty(&rqbp->rqb_buffer_list)) {
10928 list_remove_head(&rqbp->rqb_buffer_list, h_buf,
10929 struct lpfc_dmabuf, list);
10930
10931 rqb_buffer = container_of(h_buf, struct rqb_dmabuf, hbuf);
10932 (rqbp->rqb_free_buffer)(phba, rqb_buffer);
10933 rqbp->buffer_count--;
10934 }
10935 return 1;
10936 }
10937
10938 static int
lpfc_create_wq_cq(struct lpfc_hba * phba,struct lpfc_queue * eq,struct lpfc_queue * cq,struct lpfc_queue * wq,uint16_t * cq_map,int qidx,uint32_t qtype)10939 lpfc_create_wq_cq(struct lpfc_hba *phba, struct lpfc_queue *eq,
10940 struct lpfc_queue *cq, struct lpfc_queue *wq, uint16_t *cq_map,
10941 int qidx, uint32_t qtype)
10942 {
10943 struct lpfc_sli_ring *pring;
10944 int rc;
10945
10946 if (!eq || !cq || !wq) {
10947 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10948 "6085 Fast-path %s (%d) not allocated\n",
10949 ((eq) ? ((cq) ? "WQ" : "CQ") : "EQ"), qidx);
10950 return -ENOMEM;
10951 }
10952
10953 /* create the Cq first */
10954 rc = lpfc_cq_create(phba, cq, eq,
10955 (qtype == LPFC_MBOX) ? LPFC_MCQ : LPFC_WCQ, qtype);
10956 if (rc) {
10957 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10958 "6086 Failed setup of CQ (%d), rc = 0x%x\n",
10959 qidx, (uint32_t)rc);
10960 return rc;
10961 }
10962
10963 if (qtype != LPFC_MBOX) {
10964 /* Setup cq_map for fast lookup */
10965 if (cq_map)
10966 *cq_map = cq->queue_id;
10967
10968 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10969 "6087 CQ setup: cq[%d]-id=%d, parent eq[%d]-id=%d\n",
10970 qidx, cq->queue_id, qidx, eq->queue_id);
10971
10972 /* create the wq */
10973 rc = lpfc_wq_create(phba, wq, cq, qtype);
10974 if (rc) {
10975 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10976 "4618 Fail setup fastpath WQ (%d), rc = 0x%x\n",
10977 qidx, (uint32_t)rc);
10978 /* no need to tear down cq - caller will do so */
10979 return rc;
10980 }
10981
10982 /* Bind this CQ/WQ to the NVME ring */
10983 pring = wq->pring;
10984 pring->sli.sli4.wqp = (void *)wq;
10985 cq->pring = pring;
10986
10987 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
10988 "2593 WQ setup: wq[%d]-id=%d assoc=%d, cq[%d]-id=%d\n",
10989 qidx, wq->queue_id, wq->assoc_qid, qidx, cq->queue_id);
10990 } else {
10991 rc = lpfc_mq_create(phba, wq, cq, LPFC_MBOX);
10992 if (rc) {
10993 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
10994 "0539 Failed setup of slow-path MQ: "
10995 "rc = 0x%x\n", rc);
10996 /* no need to tear down cq - caller will do so */
10997 return rc;
10998 }
10999
11000 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11001 "2589 MBX MQ setup: wq-id=%d, parent cq-id=%d\n",
11002 phba->sli4_hba.mbx_wq->queue_id,
11003 phba->sli4_hba.mbx_cq->queue_id);
11004 }
11005
11006 return 0;
11007 }
11008
11009 /**
11010 * lpfc_setup_cq_lookup - Setup the CQ lookup table
11011 * @phba: pointer to lpfc hba data structure.
11012 *
11013 * This routine will populate the cq_lookup table by all
11014 * available CQ queue_id's.
11015 **/
11016 static void
lpfc_setup_cq_lookup(struct lpfc_hba * phba)11017 lpfc_setup_cq_lookup(struct lpfc_hba *phba)
11018 {
11019 struct lpfc_queue *eq, *childq;
11020 int qidx;
11021
11022 memset(phba->sli4_hba.cq_lookup, 0,
11023 (sizeof(struct lpfc_queue *) * (phba->sli4_hba.cq_max + 1)));
11024 /* Loop thru all IRQ vectors */
11025 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) {
11026 /* Get the EQ corresponding to the IRQ vector */
11027 eq = phba->sli4_hba.hba_eq_hdl[qidx].eq;
11028 if (!eq)
11029 continue;
11030 /* Loop through all CQs associated with that EQ */
11031 list_for_each_entry(childq, &eq->child_list, list) {
11032 if (childq->queue_id > phba->sli4_hba.cq_max)
11033 continue;
11034 if (childq->subtype == LPFC_IO)
11035 phba->sli4_hba.cq_lookup[childq->queue_id] =
11036 childq;
11037 }
11038 }
11039 }
11040
11041 /**
11042 * lpfc_sli4_queue_setup - Set up all the SLI4 queues
11043 * @phba: pointer to lpfc hba data structure.
11044 *
11045 * This routine is invoked to set up all the SLI4 queues for the FCoE HBA
11046 * operation.
11047 *
11048 * Return codes
11049 * 0 - successful
11050 * -ENOMEM - No available memory
11051 * -EIO - The mailbox failed to complete successfully.
11052 **/
11053 int
lpfc_sli4_queue_setup(struct lpfc_hba * phba)11054 lpfc_sli4_queue_setup(struct lpfc_hba *phba)
11055 {
11056 uint32_t shdr_status, shdr_add_status;
11057 union lpfc_sli4_cfg_shdr *shdr;
11058 struct lpfc_vector_map_info *cpup;
11059 struct lpfc_sli4_hdw_queue *qp;
11060 LPFC_MBOXQ_t *mboxq;
11061 int qidx, cpu;
11062 uint32_t length, usdelay;
11063 int rc = -ENOMEM;
11064
11065 /* Check for dual-ULP support */
11066 mboxq = (LPFC_MBOXQ_t *)mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
11067 if (!mboxq) {
11068 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11069 "3249 Unable to allocate memory for "
11070 "QUERY_FW_CFG mailbox command\n");
11071 return -ENOMEM;
11072 }
11073 length = (sizeof(struct lpfc_mbx_query_fw_config) -
11074 sizeof(struct lpfc_sli4_cfg_mhdr));
11075 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
11076 LPFC_MBOX_OPCODE_QUERY_FW_CFG,
11077 length, LPFC_SLI4_MBX_EMBED);
11078
11079 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
11080
11081 shdr = (union lpfc_sli4_cfg_shdr *)
11082 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
11083 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
11084 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status, &shdr->response);
11085 if (shdr_status || shdr_add_status || rc) {
11086 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11087 "3250 QUERY_FW_CFG mailbox failed with status "
11088 "x%x add_status x%x, mbx status x%x\n",
11089 shdr_status, shdr_add_status, rc);
11090 mempool_free(mboxq, phba->mbox_mem_pool);
11091 rc = -ENXIO;
11092 goto out_error;
11093 }
11094
11095 phba->sli4_hba.fw_func_mode =
11096 mboxq->u.mqe.un.query_fw_cfg.rsp.function_mode;
11097 phba->sli4_hba.physical_port =
11098 mboxq->u.mqe.un.query_fw_cfg.rsp.physical_port;
11099 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11100 "3251 QUERY_FW_CFG: func_mode:x%x\n",
11101 phba->sli4_hba.fw_func_mode);
11102
11103 mempool_free(mboxq, phba->mbox_mem_pool);
11104
11105 /*
11106 * Set up HBA Event Queues (EQs)
11107 */
11108 qp = phba->sli4_hba.hdwq;
11109
11110 /* Set up HBA event queue */
11111 if (!qp) {
11112 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11113 "3147 Fast-path EQs not allocated\n");
11114 rc = -ENOMEM;
11115 goto out_error;
11116 }
11117
11118 /* Loop thru all IRQ vectors */
11119 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) {
11120 /* Create HBA Event Queues (EQs) in order */
11121 for_each_present_cpu(cpu) {
11122 cpup = &phba->sli4_hba.cpu_map[cpu];
11123
11124 /* Look for the CPU thats using that vector with
11125 * LPFC_CPU_FIRST_IRQ set.
11126 */
11127 if (!(cpup->flag & LPFC_CPU_FIRST_IRQ))
11128 continue;
11129 if (qidx != cpup->eq)
11130 continue;
11131
11132 /* Create an EQ for that vector */
11133 rc = lpfc_eq_create(phba, qp[cpup->hdwq].hba_eq,
11134 phba->cfg_fcp_imax);
11135 if (rc) {
11136 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11137 "0523 Failed setup of fast-path"
11138 " EQ (%d), rc = 0x%x\n",
11139 cpup->eq, (uint32_t)rc);
11140 goto out_destroy;
11141 }
11142
11143 /* Save the EQ for that vector in the hba_eq_hdl */
11144 phba->sli4_hba.hba_eq_hdl[cpup->eq].eq =
11145 qp[cpup->hdwq].hba_eq;
11146
11147 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11148 "2584 HBA EQ setup: queue[%d]-id=%d\n",
11149 cpup->eq,
11150 qp[cpup->hdwq].hba_eq->queue_id);
11151 }
11152 }
11153
11154 /* Loop thru all Hardware Queues */
11155 for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) {
11156 cpu = lpfc_find_cpu_handle(phba, qidx, LPFC_FIND_BY_HDWQ);
11157 cpup = &phba->sli4_hba.cpu_map[cpu];
11158
11159 /* Create the CQ/WQ corresponding to the Hardware Queue */
11160 rc = lpfc_create_wq_cq(phba,
11161 phba->sli4_hba.hdwq[cpup->hdwq].hba_eq,
11162 qp[qidx].io_cq,
11163 qp[qidx].io_wq,
11164 &phba->sli4_hba.hdwq[qidx].io_cq_map,
11165 qidx,
11166 LPFC_IO);
11167 if (rc) {
11168 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11169 "0535 Failed to setup fastpath "
11170 "IO WQ/CQ (%d), rc = 0x%x\n",
11171 qidx, (uint32_t)rc);
11172 goto out_destroy;
11173 }
11174 }
11175
11176 /*
11177 * Set up Slow Path Complete Queues (CQs)
11178 */
11179
11180 /* Set up slow-path MBOX CQ/MQ */
11181
11182 if (!phba->sli4_hba.mbx_cq || !phba->sli4_hba.mbx_wq) {
11183 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11184 "0528 %s not allocated\n",
11185 phba->sli4_hba.mbx_cq ?
11186 "Mailbox WQ" : "Mailbox CQ");
11187 rc = -ENOMEM;
11188 goto out_destroy;
11189 }
11190
11191 rc = lpfc_create_wq_cq(phba, qp[0].hba_eq,
11192 phba->sli4_hba.mbx_cq,
11193 phba->sli4_hba.mbx_wq,
11194 NULL, 0, LPFC_MBOX);
11195 if (rc) {
11196 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11197 "0529 Failed setup of mailbox WQ/CQ: rc = 0x%x\n",
11198 (uint32_t)rc);
11199 goto out_destroy;
11200 }
11201 if (phba->nvmet_support) {
11202 if (!phba->sli4_hba.nvmet_cqset) {
11203 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11204 "3165 Fast-path NVME CQ Set "
11205 "array not allocated\n");
11206 rc = -ENOMEM;
11207 goto out_destroy;
11208 }
11209 if (phba->cfg_nvmet_mrq > 1) {
11210 rc = lpfc_cq_create_set(phba,
11211 phba->sli4_hba.nvmet_cqset,
11212 qp,
11213 LPFC_WCQ, LPFC_NVMET);
11214 if (rc) {
11215 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11216 "3164 Failed setup of NVME CQ "
11217 "Set, rc = 0x%x\n",
11218 (uint32_t)rc);
11219 goto out_destroy;
11220 }
11221 } else {
11222 /* Set up NVMET Receive Complete Queue */
11223 rc = lpfc_cq_create(phba, phba->sli4_hba.nvmet_cqset[0],
11224 qp[0].hba_eq,
11225 LPFC_WCQ, LPFC_NVMET);
11226 if (rc) {
11227 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11228 "6089 Failed setup NVMET CQ: "
11229 "rc = 0x%x\n", (uint32_t)rc);
11230 goto out_destroy;
11231 }
11232 phba->sli4_hba.nvmet_cqset[0]->chann = 0;
11233
11234 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11235 "6090 NVMET CQ setup: cq-id=%d, "
11236 "parent eq-id=%d\n",
11237 phba->sli4_hba.nvmet_cqset[0]->queue_id,
11238 qp[0].hba_eq->queue_id);
11239 }
11240 }
11241
11242 /* Set up slow-path ELS WQ/CQ */
11243 if (!phba->sli4_hba.els_cq || !phba->sli4_hba.els_wq) {
11244 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11245 "0530 ELS %s not allocated\n",
11246 phba->sli4_hba.els_cq ? "WQ" : "CQ");
11247 rc = -ENOMEM;
11248 goto out_destroy;
11249 }
11250 rc = lpfc_create_wq_cq(phba, qp[0].hba_eq,
11251 phba->sli4_hba.els_cq,
11252 phba->sli4_hba.els_wq,
11253 NULL, 0, LPFC_ELS);
11254 if (rc) {
11255 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11256 "0525 Failed setup of ELS WQ/CQ: rc = 0x%x\n",
11257 (uint32_t)rc);
11258 goto out_destroy;
11259 }
11260 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11261 "2590 ELS WQ setup: wq-id=%d, parent cq-id=%d\n",
11262 phba->sli4_hba.els_wq->queue_id,
11263 phba->sli4_hba.els_cq->queue_id);
11264
11265 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
11266 /* Set up NVME LS Complete Queue */
11267 if (!phba->sli4_hba.nvmels_cq || !phba->sli4_hba.nvmels_wq) {
11268 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11269 "6091 LS %s not allocated\n",
11270 phba->sli4_hba.nvmels_cq ? "WQ" : "CQ");
11271 rc = -ENOMEM;
11272 goto out_destroy;
11273 }
11274 rc = lpfc_create_wq_cq(phba, qp[0].hba_eq,
11275 phba->sli4_hba.nvmels_cq,
11276 phba->sli4_hba.nvmels_wq,
11277 NULL, 0, LPFC_NVME_LS);
11278 if (rc) {
11279 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11280 "0526 Failed setup of NVVME LS WQ/CQ: "
11281 "rc = 0x%x\n", (uint32_t)rc);
11282 goto out_destroy;
11283 }
11284
11285 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11286 "6096 ELS WQ setup: wq-id=%d, "
11287 "parent cq-id=%d\n",
11288 phba->sli4_hba.nvmels_wq->queue_id,
11289 phba->sli4_hba.nvmels_cq->queue_id);
11290 }
11291
11292 /*
11293 * Create NVMET Receive Queue (RQ)
11294 */
11295 if (phba->nvmet_support) {
11296 if ((!phba->sli4_hba.nvmet_cqset) ||
11297 (!phba->sli4_hba.nvmet_mrq_hdr) ||
11298 (!phba->sli4_hba.nvmet_mrq_data)) {
11299 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11300 "6130 MRQ CQ Queues not "
11301 "allocated\n");
11302 rc = -ENOMEM;
11303 goto out_destroy;
11304 }
11305 if (phba->cfg_nvmet_mrq > 1) {
11306 rc = lpfc_mrq_create(phba,
11307 phba->sli4_hba.nvmet_mrq_hdr,
11308 phba->sli4_hba.nvmet_mrq_data,
11309 phba->sli4_hba.nvmet_cqset,
11310 LPFC_NVMET);
11311 if (rc) {
11312 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11313 "6098 Failed setup of NVMET "
11314 "MRQ: rc = 0x%x\n",
11315 (uint32_t)rc);
11316 goto out_destroy;
11317 }
11318
11319 } else {
11320 rc = lpfc_rq_create(phba,
11321 phba->sli4_hba.nvmet_mrq_hdr[0],
11322 phba->sli4_hba.nvmet_mrq_data[0],
11323 phba->sli4_hba.nvmet_cqset[0],
11324 LPFC_NVMET);
11325 if (rc) {
11326 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11327 "6057 Failed setup of NVMET "
11328 "Receive Queue: rc = 0x%x\n",
11329 (uint32_t)rc);
11330 goto out_destroy;
11331 }
11332
11333 lpfc_printf_log(
11334 phba, KERN_INFO, LOG_INIT,
11335 "6099 NVMET RQ setup: hdr-rq-id=%d, "
11336 "dat-rq-id=%d parent cq-id=%d\n",
11337 phba->sli4_hba.nvmet_mrq_hdr[0]->queue_id,
11338 phba->sli4_hba.nvmet_mrq_data[0]->queue_id,
11339 phba->sli4_hba.nvmet_cqset[0]->queue_id);
11340
11341 }
11342 }
11343
11344 if (!phba->sli4_hba.hdr_rq || !phba->sli4_hba.dat_rq) {
11345 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11346 "0540 Receive Queue not allocated\n");
11347 rc = -ENOMEM;
11348 goto out_destroy;
11349 }
11350
11351 rc = lpfc_rq_create(phba, phba->sli4_hba.hdr_rq, phba->sli4_hba.dat_rq,
11352 phba->sli4_hba.els_cq, LPFC_USOL);
11353 if (rc) {
11354 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11355 "0541 Failed setup of Receive Queue: "
11356 "rc = 0x%x\n", (uint32_t)rc);
11357 goto out_destroy;
11358 }
11359
11360 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
11361 "2592 USL RQ setup: hdr-rq-id=%d, dat-rq-id=%d "
11362 "parent cq-id=%d\n",
11363 phba->sli4_hba.hdr_rq->queue_id,
11364 phba->sli4_hba.dat_rq->queue_id,
11365 phba->sli4_hba.els_cq->queue_id);
11366
11367 if (phba->cfg_fcp_imax)
11368 usdelay = LPFC_SEC_TO_USEC / phba->cfg_fcp_imax;
11369 else
11370 usdelay = 0;
11371
11372 for (qidx = 0; qidx < phba->cfg_irq_chann;
11373 qidx += LPFC_MAX_EQ_DELAY_EQID_CNT)
11374 lpfc_modify_hba_eq_delay(phba, qidx, LPFC_MAX_EQ_DELAY_EQID_CNT,
11375 usdelay);
11376
11377 if (phba->sli4_hba.cq_max) {
11378 kfree(phba->sli4_hba.cq_lookup);
11379 phba->sli4_hba.cq_lookup = kcalloc((phba->sli4_hba.cq_max + 1),
11380 sizeof(struct lpfc_queue *), GFP_KERNEL);
11381 if (!phba->sli4_hba.cq_lookup) {
11382 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11383 "0549 Failed setup of CQ Lookup table: "
11384 "size 0x%x\n", phba->sli4_hba.cq_max);
11385 rc = -ENOMEM;
11386 goto out_destroy;
11387 }
11388 lpfc_setup_cq_lookup(phba);
11389 }
11390 return 0;
11391
11392 out_destroy:
11393 lpfc_sli4_queue_unset(phba);
11394 out_error:
11395 return rc;
11396 }
11397
11398 /**
11399 * lpfc_sli4_queue_unset - Unset all the SLI4 queues
11400 * @phba: pointer to lpfc hba data structure.
11401 *
11402 * This routine is invoked to unset all the SLI4 queues with the FCoE HBA
11403 * operation.
11404 *
11405 * Return codes
11406 * 0 - successful
11407 * -ENOMEM - No available memory
11408 * -EIO - The mailbox failed to complete successfully.
11409 **/
11410 void
lpfc_sli4_queue_unset(struct lpfc_hba * phba)11411 lpfc_sli4_queue_unset(struct lpfc_hba *phba)
11412 {
11413 struct lpfc_sli4_hdw_queue *qp;
11414 struct lpfc_queue *eq;
11415 int qidx;
11416
11417 /* Unset mailbox command work queue */
11418 if (phba->sli4_hba.mbx_wq)
11419 lpfc_mq_destroy(phba, phba->sli4_hba.mbx_wq);
11420
11421 /* Unset NVME LS work queue */
11422 if (phba->sli4_hba.nvmels_wq)
11423 lpfc_wq_destroy(phba, phba->sli4_hba.nvmels_wq);
11424
11425 /* Unset ELS work queue */
11426 if (phba->sli4_hba.els_wq)
11427 lpfc_wq_destroy(phba, phba->sli4_hba.els_wq);
11428
11429 /* Unset unsolicited receive queue */
11430 if (phba->sli4_hba.hdr_rq)
11431 lpfc_rq_destroy(phba, phba->sli4_hba.hdr_rq,
11432 phba->sli4_hba.dat_rq);
11433
11434 /* Unset mailbox command complete queue */
11435 if (phba->sli4_hba.mbx_cq)
11436 lpfc_cq_destroy(phba, phba->sli4_hba.mbx_cq);
11437
11438 /* Unset ELS complete queue */
11439 if (phba->sli4_hba.els_cq)
11440 lpfc_cq_destroy(phba, phba->sli4_hba.els_cq);
11441
11442 /* Unset NVME LS complete queue */
11443 if (phba->sli4_hba.nvmels_cq)
11444 lpfc_cq_destroy(phba, phba->sli4_hba.nvmels_cq);
11445
11446 if (phba->nvmet_support) {
11447 /* Unset NVMET MRQ queue */
11448 if (phba->sli4_hba.nvmet_mrq_hdr) {
11449 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++)
11450 lpfc_rq_destroy(
11451 phba,
11452 phba->sli4_hba.nvmet_mrq_hdr[qidx],
11453 phba->sli4_hba.nvmet_mrq_data[qidx]);
11454 }
11455
11456 /* Unset NVMET CQ Set complete queue */
11457 if (phba->sli4_hba.nvmet_cqset) {
11458 for (qidx = 0; qidx < phba->cfg_nvmet_mrq; qidx++)
11459 lpfc_cq_destroy(
11460 phba, phba->sli4_hba.nvmet_cqset[qidx]);
11461 }
11462 }
11463
11464 /* Unset fast-path SLI4 queues */
11465 if (phba->sli4_hba.hdwq) {
11466 /* Loop thru all Hardware Queues */
11467 for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) {
11468 /* Destroy the CQ/WQ corresponding to Hardware Queue */
11469 qp = &phba->sli4_hba.hdwq[qidx];
11470 lpfc_wq_destroy(phba, qp->io_wq);
11471 lpfc_cq_destroy(phba, qp->io_cq);
11472 }
11473 /* Loop thru all IRQ vectors */
11474 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) {
11475 /* Destroy the EQ corresponding to the IRQ vector */
11476 eq = phba->sli4_hba.hba_eq_hdl[qidx].eq;
11477 lpfc_eq_destroy(phba, eq);
11478 }
11479 }
11480
11481 kfree(phba->sli4_hba.cq_lookup);
11482 phba->sli4_hba.cq_lookup = NULL;
11483 phba->sli4_hba.cq_max = 0;
11484 }
11485
11486 /**
11487 * lpfc_sli4_cq_event_pool_create - Create completion-queue event free pool
11488 * @phba: pointer to lpfc hba data structure.
11489 *
11490 * This routine is invoked to allocate and set up a pool of completion queue
11491 * events. The body of the completion queue event is a completion queue entry
11492 * CQE. For now, this pool is used for the interrupt service routine to queue
11493 * the following HBA completion queue events for the worker thread to process:
11494 * - Mailbox asynchronous events
11495 * - Receive queue completion unsolicited events
11496 * Later, this can be used for all the slow-path events.
11497 *
11498 * Return codes
11499 * 0 - successful
11500 * -ENOMEM - No available memory
11501 **/
11502 static int
lpfc_sli4_cq_event_pool_create(struct lpfc_hba * phba)11503 lpfc_sli4_cq_event_pool_create(struct lpfc_hba *phba)
11504 {
11505 struct lpfc_cq_event *cq_event;
11506 int i;
11507
11508 for (i = 0; i < (4 * phba->sli4_hba.cq_ecount); i++) {
11509 cq_event = kmalloc(sizeof(struct lpfc_cq_event), GFP_KERNEL);
11510 if (!cq_event)
11511 goto out_pool_create_fail;
11512 list_add_tail(&cq_event->list,
11513 &phba->sli4_hba.sp_cqe_event_pool);
11514 }
11515 return 0;
11516
11517 out_pool_create_fail:
11518 lpfc_sli4_cq_event_pool_destroy(phba);
11519 return -ENOMEM;
11520 }
11521
11522 /**
11523 * lpfc_sli4_cq_event_pool_destroy - Free completion-queue event free pool
11524 * @phba: pointer to lpfc hba data structure.
11525 *
11526 * This routine is invoked to free the pool of completion queue events at
11527 * driver unload time. Note that, it is the responsibility of the driver
11528 * cleanup routine to free all the outstanding completion-queue events
11529 * allocated from this pool back into the pool before invoking this routine
11530 * to destroy the pool.
11531 **/
11532 static void
lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba * phba)11533 lpfc_sli4_cq_event_pool_destroy(struct lpfc_hba *phba)
11534 {
11535 struct lpfc_cq_event *cq_event, *next_cq_event;
11536
11537 list_for_each_entry_safe(cq_event, next_cq_event,
11538 &phba->sli4_hba.sp_cqe_event_pool, list) {
11539 list_del(&cq_event->list);
11540 kfree(cq_event);
11541 }
11542 }
11543
11544 /**
11545 * __lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool
11546 * @phba: pointer to lpfc hba data structure.
11547 *
11548 * This routine is the lock free version of the API invoked to allocate a
11549 * completion-queue event from the free pool.
11550 *
11551 * Return: Pointer to the newly allocated completion-queue event if successful
11552 * NULL otherwise.
11553 **/
11554 struct lpfc_cq_event *
__lpfc_sli4_cq_event_alloc(struct lpfc_hba * phba)11555 __lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
11556 {
11557 struct lpfc_cq_event *cq_event = NULL;
11558
11559 list_remove_head(&phba->sli4_hba.sp_cqe_event_pool, cq_event,
11560 struct lpfc_cq_event, list);
11561 return cq_event;
11562 }
11563
11564 /**
11565 * lpfc_sli4_cq_event_alloc - Allocate a completion-queue event from free pool
11566 * @phba: pointer to lpfc hba data structure.
11567 *
11568 * This routine is the lock version of the API invoked to allocate a
11569 * completion-queue event from the free pool.
11570 *
11571 * Return: Pointer to the newly allocated completion-queue event if successful
11572 * NULL otherwise.
11573 **/
11574 struct lpfc_cq_event *
lpfc_sli4_cq_event_alloc(struct lpfc_hba * phba)11575 lpfc_sli4_cq_event_alloc(struct lpfc_hba *phba)
11576 {
11577 struct lpfc_cq_event *cq_event;
11578 unsigned long iflags;
11579
11580 spin_lock_irqsave(&phba->hbalock, iflags);
11581 cq_event = __lpfc_sli4_cq_event_alloc(phba);
11582 spin_unlock_irqrestore(&phba->hbalock, iflags);
11583 return cq_event;
11584 }
11585
11586 /**
11587 * __lpfc_sli4_cq_event_release - Release a completion-queue event to free pool
11588 * @phba: pointer to lpfc hba data structure.
11589 * @cq_event: pointer to the completion queue event to be freed.
11590 *
11591 * This routine is the lock free version of the API invoked to release a
11592 * completion-queue event back into the free pool.
11593 **/
11594 void
__lpfc_sli4_cq_event_release(struct lpfc_hba * phba,struct lpfc_cq_event * cq_event)11595 __lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
11596 struct lpfc_cq_event *cq_event)
11597 {
11598 list_add_tail(&cq_event->list, &phba->sli4_hba.sp_cqe_event_pool);
11599 }
11600
11601 /**
11602 * lpfc_sli4_cq_event_release - Release a completion-queue event to free pool
11603 * @phba: pointer to lpfc hba data structure.
11604 * @cq_event: pointer to the completion queue event to be freed.
11605 *
11606 * This routine is the lock version of the API invoked to release a
11607 * completion-queue event back into the free pool.
11608 **/
11609 void
lpfc_sli4_cq_event_release(struct lpfc_hba * phba,struct lpfc_cq_event * cq_event)11610 lpfc_sli4_cq_event_release(struct lpfc_hba *phba,
11611 struct lpfc_cq_event *cq_event)
11612 {
11613 unsigned long iflags;
11614 spin_lock_irqsave(&phba->hbalock, iflags);
11615 __lpfc_sli4_cq_event_release(phba, cq_event);
11616 spin_unlock_irqrestore(&phba->hbalock, iflags);
11617 }
11618
11619 /**
11620 * lpfc_sli4_cq_event_release_all - Release all cq events to the free pool
11621 * @phba: pointer to lpfc hba data structure.
11622 *
11623 * This routine is to free all the pending completion-queue events to the
11624 * back into the free pool for device reset.
11625 **/
11626 static void
lpfc_sli4_cq_event_release_all(struct lpfc_hba * phba)11627 lpfc_sli4_cq_event_release_all(struct lpfc_hba *phba)
11628 {
11629 LIST_HEAD(cq_event_list);
11630 struct lpfc_cq_event *cq_event;
11631 unsigned long iflags;
11632
11633 /* Retrieve all the pending WCQEs from pending WCQE lists */
11634
11635 /* Pending ELS XRI abort events */
11636 spin_lock_irqsave(&phba->sli4_hba.els_xri_abrt_list_lock, iflags);
11637 list_splice_init(&phba->sli4_hba.sp_els_xri_aborted_work_queue,
11638 &cq_event_list);
11639 spin_unlock_irqrestore(&phba->sli4_hba.els_xri_abrt_list_lock, iflags);
11640
11641 /* Pending asynnc events */
11642 spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags);
11643 list_splice_init(&phba->sli4_hba.sp_asynce_work_queue,
11644 &cq_event_list);
11645 spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock, iflags);
11646
11647 while (!list_empty(&cq_event_list)) {
11648 list_remove_head(&cq_event_list, cq_event,
11649 struct lpfc_cq_event, list);
11650 lpfc_sli4_cq_event_release(phba, cq_event);
11651 }
11652 }
11653
11654 /**
11655 * lpfc_pci_function_reset - Reset pci function.
11656 * @phba: pointer to lpfc hba data structure.
11657 *
11658 * This routine is invoked to request a PCI function reset. It will destroys
11659 * all resources assigned to the PCI function which originates this request.
11660 *
11661 * Return codes
11662 * 0 - successful
11663 * -ENOMEM - No available memory
11664 * -EIO - The mailbox failed to complete successfully.
11665 **/
11666 int
lpfc_pci_function_reset(struct lpfc_hba * phba)11667 lpfc_pci_function_reset(struct lpfc_hba *phba)
11668 {
11669 LPFC_MBOXQ_t *mboxq;
11670 uint32_t rc = 0, if_type;
11671 uint32_t shdr_status, shdr_add_status;
11672 uint32_t rdy_chk;
11673 uint32_t port_reset = 0;
11674 union lpfc_sli4_cfg_shdr *shdr;
11675 struct lpfc_register reg_data;
11676 uint16_t devid;
11677
11678 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
11679 switch (if_type) {
11680 case LPFC_SLI_INTF_IF_TYPE_0:
11681 mboxq = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
11682 GFP_KERNEL);
11683 if (!mboxq) {
11684 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11685 "0494 Unable to allocate memory for "
11686 "issuing SLI_FUNCTION_RESET mailbox "
11687 "command\n");
11688 return -ENOMEM;
11689 }
11690
11691 /* Setup PCI function reset mailbox-ioctl command */
11692 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
11693 LPFC_MBOX_OPCODE_FUNCTION_RESET, 0,
11694 LPFC_SLI4_MBX_EMBED);
11695 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
11696 shdr = (union lpfc_sli4_cfg_shdr *)
11697 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
11698 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
11699 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
11700 &shdr->response);
11701 mempool_free(mboxq, phba->mbox_mem_pool);
11702 if (shdr_status || shdr_add_status || rc) {
11703 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11704 "0495 SLI_FUNCTION_RESET mailbox "
11705 "failed with status x%x add_status x%x,"
11706 " mbx status x%x\n",
11707 shdr_status, shdr_add_status, rc);
11708 rc = -ENXIO;
11709 }
11710 break;
11711 case LPFC_SLI_INTF_IF_TYPE_2:
11712 case LPFC_SLI_INTF_IF_TYPE_6:
11713 wait:
11714 /*
11715 * Poll the Port Status Register and wait for RDY for
11716 * up to 30 seconds. If the port doesn't respond, treat
11717 * it as an error.
11718 */
11719 for (rdy_chk = 0; rdy_chk < 1500; rdy_chk++) {
11720 if (lpfc_readl(phba->sli4_hba.u.if_type2.
11721 STATUSregaddr, ®_data.word0)) {
11722 rc = -ENODEV;
11723 goto out;
11724 }
11725 if (bf_get(lpfc_sliport_status_rdy, ®_data))
11726 break;
11727 msleep(20);
11728 }
11729
11730 if (!bf_get(lpfc_sliport_status_rdy, ®_data)) {
11731 phba->work_status[0] = readl(
11732 phba->sli4_hba.u.if_type2.ERR1regaddr);
11733 phba->work_status[1] = readl(
11734 phba->sli4_hba.u.if_type2.ERR2regaddr);
11735 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11736 "2890 Port not ready, port status reg "
11737 "0x%x error 1=0x%x, error 2=0x%x\n",
11738 reg_data.word0,
11739 phba->work_status[0],
11740 phba->work_status[1]);
11741 rc = -ENODEV;
11742 goto out;
11743 }
11744
11745 if (bf_get(lpfc_sliport_status_pldv, ®_data))
11746 lpfc_pldv_detect = true;
11747
11748 if (!port_reset) {
11749 /*
11750 * Reset the port now
11751 */
11752 reg_data.word0 = 0;
11753 bf_set(lpfc_sliport_ctrl_end, ®_data,
11754 LPFC_SLIPORT_LITTLE_ENDIAN);
11755 bf_set(lpfc_sliport_ctrl_ip, ®_data,
11756 LPFC_SLIPORT_INIT_PORT);
11757 writel(reg_data.word0, phba->sli4_hba.u.if_type2.
11758 CTRLregaddr);
11759 /* flush */
11760 pci_read_config_word(phba->pcidev,
11761 PCI_DEVICE_ID, &devid);
11762
11763 port_reset = 1;
11764 msleep(20);
11765 goto wait;
11766 } else if (bf_get(lpfc_sliport_status_rn, ®_data)) {
11767 rc = -ENODEV;
11768 goto out;
11769 }
11770 break;
11771
11772 case LPFC_SLI_INTF_IF_TYPE_1:
11773 default:
11774 break;
11775 }
11776
11777 out:
11778 /* Catch the not-ready port failure after a port reset. */
11779 if (rc) {
11780 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
11781 "3317 HBA not functional: IP Reset Failed "
11782 "try: echo fw_reset > board_mode\n");
11783 rc = -ENODEV;
11784 }
11785
11786 return rc;
11787 }
11788
11789 /**
11790 * lpfc_sli4_pci_mem_setup - Setup SLI4 HBA PCI memory space.
11791 * @phba: pointer to lpfc hba data structure.
11792 *
11793 * This routine is invoked to set up the PCI device memory space for device
11794 * with SLI-4 interface spec.
11795 *
11796 * Return codes
11797 * 0 - successful
11798 * other values - error
11799 **/
11800 static int
lpfc_sli4_pci_mem_setup(struct lpfc_hba * phba)11801 lpfc_sli4_pci_mem_setup(struct lpfc_hba *phba)
11802 {
11803 struct pci_dev *pdev = phba->pcidev;
11804 unsigned long bar0map_len, bar1map_len, bar2map_len;
11805 int error;
11806 uint32_t if_type;
11807
11808 if (!pdev)
11809 return -ENODEV;
11810
11811 /* Set the device DMA mask size */
11812 error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
11813 if (error)
11814 error = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
11815 if (error)
11816 return error;
11817
11818 /*
11819 * The BARs and register set definitions and offset locations are
11820 * dependent on the if_type.
11821 */
11822 if (pci_read_config_dword(pdev, LPFC_SLI_INTF,
11823 &phba->sli4_hba.sli_intf.word0)) {
11824 return -ENODEV;
11825 }
11826
11827 /* There is no SLI3 failback for SLI4 devices. */
11828 if (bf_get(lpfc_sli_intf_valid, &phba->sli4_hba.sli_intf) !=
11829 LPFC_SLI_INTF_VALID) {
11830 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
11831 "2894 SLI_INTF reg contents invalid "
11832 "sli_intf reg 0x%x\n",
11833 phba->sli4_hba.sli_intf.word0);
11834 return -ENODEV;
11835 }
11836
11837 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
11838 /*
11839 * Get the bus address of SLI4 device Bar regions and the
11840 * number of bytes required by each mapping. The mapping of the
11841 * particular PCI BARs regions is dependent on the type of
11842 * SLI4 device.
11843 */
11844 if (pci_resource_start(pdev, PCI_64BIT_BAR0)) {
11845 phba->pci_bar0_map = pci_resource_start(pdev, PCI_64BIT_BAR0);
11846 bar0map_len = pci_resource_len(pdev, PCI_64BIT_BAR0);
11847
11848 /*
11849 * Map SLI4 PCI Config Space Register base to a kernel virtual
11850 * addr
11851 */
11852 phba->sli4_hba.conf_regs_memmap_p =
11853 ioremap(phba->pci_bar0_map, bar0map_len);
11854 if (!phba->sli4_hba.conf_regs_memmap_p) {
11855 dev_printk(KERN_ERR, &pdev->dev,
11856 "ioremap failed for SLI4 PCI config "
11857 "registers.\n");
11858 return -ENODEV;
11859 }
11860 phba->pci_bar0_memmap_p = phba->sli4_hba.conf_regs_memmap_p;
11861 /* Set up BAR0 PCI config space register memory map */
11862 lpfc_sli4_bar0_register_memmap(phba, if_type);
11863 } else {
11864 phba->pci_bar0_map = pci_resource_start(pdev, 1);
11865 bar0map_len = pci_resource_len(pdev, 1);
11866 if (if_type >= LPFC_SLI_INTF_IF_TYPE_2) {
11867 dev_printk(KERN_ERR, &pdev->dev,
11868 "FATAL - No BAR0 mapping for SLI4, if_type 2\n");
11869 return -ENODEV;
11870 }
11871 phba->sli4_hba.conf_regs_memmap_p =
11872 ioremap(phba->pci_bar0_map, bar0map_len);
11873 if (!phba->sli4_hba.conf_regs_memmap_p) {
11874 dev_printk(KERN_ERR, &pdev->dev,
11875 "ioremap failed for SLI4 PCI config "
11876 "registers.\n");
11877 return -ENODEV;
11878 }
11879 lpfc_sli4_bar0_register_memmap(phba, if_type);
11880 }
11881
11882 if (if_type == LPFC_SLI_INTF_IF_TYPE_0) {
11883 if (pci_resource_start(pdev, PCI_64BIT_BAR2)) {
11884 /*
11885 * Map SLI4 if type 0 HBA Control Register base to a
11886 * kernel virtual address and setup the registers.
11887 */
11888 phba->pci_bar1_map = pci_resource_start(pdev,
11889 PCI_64BIT_BAR2);
11890 bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2);
11891 phba->sli4_hba.ctrl_regs_memmap_p =
11892 ioremap(phba->pci_bar1_map,
11893 bar1map_len);
11894 if (!phba->sli4_hba.ctrl_regs_memmap_p) {
11895 dev_err(&pdev->dev,
11896 "ioremap failed for SLI4 HBA "
11897 "control registers.\n");
11898 error = -ENOMEM;
11899 goto out_iounmap_conf;
11900 }
11901 phba->pci_bar2_memmap_p =
11902 phba->sli4_hba.ctrl_regs_memmap_p;
11903 lpfc_sli4_bar1_register_memmap(phba, if_type);
11904 } else {
11905 error = -ENOMEM;
11906 goto out_iounmap_conf;
11907 }
11908 }
11909
11910 if ((if_type == LPFC_SLI_INTF_IF_TYPE_6) &&
11911 (pci_resource_start(pdev, PCI_64BIT_BAR2))) {
11912 /*
11913 * Map SLI4 if type 6 HBA Doorbell Register base to a kernel
11914 * virtual address and setup the registers.
11915 */
11916 phba->pci_bar1_map = pci_resource_start(pdev, PCI_64BIT_BAR2);
11917 bar1map_len = pci_resource_len(pdev, PCI_64BIT_BAR2);
11918 phba->sli4_hba.drbl_regs_memmap_p =
11919 ioremap(phba->pci_bar1_map, bar1map_len);
11920 if (!phba->sli4_hba.drbl_regs_memmap_p) {
11921 dev_err(&pdev->dev,
11922 "ioremap failed for SLI4 HBA doorbell registers.\n");
11923 error = -ENOMEM;
11924 goto out_iounmap_conf;
11925 }
11926 phba->pci_bar2_memmap_p = phba->sli4_hba.drbl_regs_memmap_p;
11927 lpfc_sli4_bar1_register_memmap(phba, if_type);
11928 }
11929
11930 if (if_type == LPFC_SLI_INTF_IF_TYPE_0) {
11931 if (pci_resource_start(pdev, PCI_64BIT_BAR4)) {
11932 /*
11933 * Map SLI4 if type 0 HBA Doorbell Register base to
11934 * a kernel virtual address and setup the registers.
11935 */
11936 phba->pci_bar2_map = pci_resource_start(pdev,
11937 PCI_64BIT_BAR4);
11938 bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4);
11939 phba->sli4_hba.drbl_regs_memmap_p =
11940 ioremap(phba->pci_bar2_map,
11941 bar2map_len);
11942 if (!phba->sli4_hba.drbl_regs_memmap_p) {
11943 dev_err(&pdev->dev,
11944 "ioremap failed for SLI4 HBA"
11945 " doorbell registers.\n");
11946 error = -ENOMEM;
11947 goto out_iounmap_ctrl;
11948 }
11949 phba->pci_bar4_memmap_p =
11950 phba->sli4_hba.drbl_regs_memmap_p;
11951 error = lpfc_sli4_bar2_register_memmap(phba, LPFC_VF0);
11952 if (error)
11953 goto out_iounmap_all;
11954 } else {
11955 error = -ENOMEM;
11956 goto out_iounmap_ctrl;
11957 }
11958 }
11959
11960 if (if_type == LPFC_SLI_INTF_IF_TYPE_6 &&
11961 pci_resource_start(pdev, PCI_64BIT_BAR4)) {
11962 /*
11963 * Map SLI4 if type 6 HBA DPP Register base to a kernel
11964 * virtual address and setup the registers.
11965 */
11966 phba->pci_bar2_map = pci_resource_start(pdev, PCI_64BIT_BAR4);
11967 bar2map_len = pci_resource_len(pdev, PCI_64BIT_BAR4);
11968 phba->sli4_hba.dpp_regs_memmap_p =
11969 ioremap(phba->pci_bar2_map, bar2map_len);
11970 if (!phba->sli4_hba.dpp_regs_memmap_p) {
11971 dev_err(&pdev->dev,
11972 "ioremap failed for SLI4 HBA dpp registers.\n");
11973 error = -ENOMEM;
11974 goto out_iounmap_all;
11975 }
11976 phba->pci_bar4_memmap_p = phba->sli4_hba.dpp_regs_memmap_p;
11977 }
11978
11979 /* Set up the EQ/CQ register handeling functions now */
11980 switch (if_type) {
11981 case LPFC_SLI_INTF_IF_TYPE_0:
11982 case LPFC_SLI_INTF_IF_TYPE_2:
11983 phba->sli4_hba.sli4_eq_clr_intr = lpfc_sli4_eq_clr_intr;
11984 phba->sli4_hba.sli4_write_eq_db = lpfc_sli4_write_eq_db;
11985 phba->sli4_hba.sli4_write_cq_db = lpfc_sli4_write_cq_db;
11986 break;
11987 case LPFC_SLI_INTF_IF_TYPE_6:
11988 phba->sli4_hba.sli4_eq_clr_intr = lpfc_sli4_if6_eq_clr_intr;
11989 phba->sli4_hba.sli4_write_eq_db = lpfc_sli4_if6_write_eq_db;
11990 phba->sli4_hba.sli4_write_cq_db = lpfc_sli4_if6_write_cq_db;
11991 break;
11992 default:
11993 break;
11994 }
11995
11996 return 0;
11997
11998 out_iounmap_all:
11999 if (phba->sli4_hba.drbl_regs_memmap_p)
12000 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
12001 out_iounmap_ctrl:
12002 if (phba->sli4_hba.ctrl_regs_memmap_p)
12003 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
12004 out_iounmap_conf:
12005 iounmap(phba->sli4_hba.conf_regs_memmap_p);
12006
12007 return error;
12008 }
12009
12010 /**
12011 * lpfc_sli4_pci_mem_unset - Unset SLI4 HBA PCI memory space.
12012 * @phba: pointer to lpfc hba data structure.
12013 *
12014 * This routine is invoked to unset the PCI device memory space for device
12015 * with SLI-4 interface spec.
12016 **/
12017 static void
lpfc_sli4_pci_mem_unset(struct lpfc_hba * phba)12018 lpfc_sli4_pci_mem_unset(struct lpfc_hba *phba)
12019 {
12020 uint32_t if_type;
12021 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
12022
12023 switch (if_type) {
12024 case LPFC_SLI_INTF_IF_TYPE_0:
12025 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
12026 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
12027 iounmap(phba->sli4_hba.conf_regs_memmap_p);
12028 break;
12029 case LPFC_SLI_INTF_IF_TYPE_2:
12030 iounmap(phba->sli4_hba.conf_regs_memmap_p);
12031 break;
12032 case LPFC_SLI_INTF_IF_TYPE_6:
12033 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
12034 iounmap(phba->sli4_hba.conf_regs_memmap_p);
12035 if (phba->sli4_hba.dpp_regs_memmap_p)
12036 iounmap(phba->sli4_hba.dpp_regs_memmap_p);
12037 break;
12038 case LPFC_SLI_INTF_IF_TYPE_1:
12039 break;
12040 default:
12041 dev_printk(KERN_ERR, &phba->pcidev->dev,
12042 "FATAL - unsupported SLI4 interface type - %d\n",
12043 if_type);
12044 break;
12045 }
12046 }
12047
12048 /**
12049 * lpfc_sli_enable_msix - Enable MSI-X interrupt mode on SLI-3 device
12050 * @phba: pointer to lpfc hba data structure.
12051 *
12052 * This routine is invoked to enable the MSI-X interrupt vectors to device
12053 * with SLI-3 interface specs.
12054 *
12055 * Return codes
12056 * 0 - successful
12057 * other values - error
12058 **/
12059 static int
lpfc_sli_enable_msix(struct lpfc_hba * phba)12060 lpfc_sli_enable_msix(struct lpfc_hba *phba)
12061 {
12062 int rc;
12063 LPFC_MBOXQ_t *pmb;
12064
12065 /* Set up MSI-X multi-message vectors */
12066 rc = pci_alloc_irq_vectors(phba->pcidev,
12067 LPFC_MSIX_VECTORS, LPFC_MSIX_VECTORS, PCI_IRQ_MSIX);
12068 if (rc < 0) {
12069 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12070 "0420 PCI enable MSI-X failed (%d)\n", rc);
12071 goto vec_fail_out;
12072 }
12073
12074 /*
12075 * Assign MSI-X vectors to interrupt handlers
12076 */
12077
12078 /* vector-0 is associated to slow-path handler */
12079 rc = request_irq(pci_irq_vector(phba->pcidev, 0),
12080 &lpfc_sli_sp_intr_handler, 0,
12081 LPFC_SP_DRIVER_HANDLER_NAME, phba);
12082 if (rc) {
12083 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
12084 "0421 MSI-X slow-path request_irq failed "
12085 "(%d)\n", rc);
12086 goto msi_fail_out;
12087 }
12088
12089 /* vector-1 is associated to fast-path handler */
12090 rc = request_irq(pci_irq_vector(phba->pcidev, 1),
12091 &lpfc_sli_fp_intr_handler, 0,
12092 LPFC_FP_DRIVER_HANDLER_NAME, phba);
12093
12094 if (rc) {
12095 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
12096 "0429 MSI-X fast-path request_irq failed "
12097 "(%d)\n", rc);
12098 goto irq_fail_out;
12099 }
12100
12101 /*
12102 * Configure HBA MSI-X attention conditions to messages
12103 */
12104 pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
12105
12106 if (!pmb) {
12107 rc = -ENOMEM;
12108 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
12109 "0474 Unable to allocate memory for issuing "
12110 "MBOX_CONFIG_MSI command\n");
12111 goto mem_fail_out;
12112 }
12113 rc = lpfc_config_msi(phba, pmb);
12114 if (rc)
12115 goto mbx_fail_out;
12116 rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
12117 if (rc != MBX_SUCCESS) {
12118 lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX,
12119 "0351 Config MSI mailbox command failed, "
12120 "mbxCmd x%x, mbxStatus x%x\n",
12121 pmb->u.mb.mbxCommand, pmb->u.mb.mbxStatus);
12122 goto mbx_fail_out;
12123 }
12124
12125 /* Free memory allocated for mailbox command */
12126 mempool_free(pmb, phba->mbox_mem_pool);
12127 return rc;
12128
12129 mbx_fail_out:
12130 /* Free memory allocated for mailbox command */
12131 mempool_free(pmb, phba->mbox_mem_pool);
12132
12133 mem_fail_out:
12134 /* free the irq already requested */
12135 free_irq(pci_irq_vector(phba->pcidev, 1), phba);
12136
12137 irq_fail_out:
12138 /* free the irq already requested */
12139 free_irq(pci_irq_vector(phba->pcidev, 0), phba);
12140
12141 msi_fail_out:
12142 /* Unconfigure MSI-X capability structure */
12143 pci_free_irq_vectors(phba->pcidev);
12144
12145 vec_fail_out:
12146 return rc;
12147 }
12148
12149 /**
12150 * lpfc_sli_enable_msi - Enable MSI interrupt mode on SLI-3 device.
12151 * @phba: pointer to lpfc hba data structure.
12152 *
12153 * This routine is invoked to enable the MSI interrupt mode to device with
12154 * SLI-3 interface spec. The kernel function pci_enable_msi() is called to
12155 * enable the MSI vector. The device driver is responsible for calling the
12156 * request_irq() to register MSI vector with a interrupt the handler, which
12157 * is done in this function.
12158 *
12159 * Return codes
12160 * 0 - successful
12161 * other values - error
12162 */
12163 static int
lpfc_sli_enable_msi(struct lpfc_hba * phba)12164 lpfc_sli_enable_msi(struct lpfc_hba *phba)
12165 {
12166 int rc;
12167
12168 rc = pci_enable_msi(phba->pcidev);
12169 if (!rc)
12170 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12171 "0012 PCI enable MSI mode success.\n");
12172 else {
12173 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12174 "0471 PCI enable MSI mode failed (%d)\n", rc);
12175 return rc;
12176 }
12177
12178 rc = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
12179 0, LPFC_DRIVER_NAME, phba);
12180 if (rc) {
12181 pci_disable_msi(phba->pcidev);
12182 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
12183 "0478 MSI request_irq failed (%d)\n", rc);
12184 }
12185 return rc;
12186 }
12187
12188 /**
12189 * lpfc_sli_enable_intr - Enable device interrupt to SLI-3 device.
12190 * @phba: pointer to lpfc hba data structure.
12191 * @cfg_mode: Interrupt configuration mode (INTx, MSI or MSI-X).
12192 *
12193 * This routine is invoked to enable device interrupt and associate driver's
12194 * interrupt handler(s) to interrupt vector(s) to device with SLI-3 interface
12195 * spec. Depends on the interrupt mode configured to the driver, the driver
12196 * will try to fallback from the configured interrupt mode to an interrupt
12197 * mode which is supported by the platform, kernel, and device in the order
12198 * of:
12199 * MSI-X -> MSI -> IRQ.
12200 *
12201 * Return codes
12202 * 0 - successful
12203 * other values - error
12204 **/
12205 static uint32_t
lpfc_sli_enable_intr(struct lpfc_hba * phba,uint32_t cfg_mode)12206 lpfc_sli_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
12207 {
12208 uint32_t intr_mode = LPFC_INTR_ERROR;
12209 int retval;
12210
12211 /* Need to issue conf_port mbox cmd before conf_msi mbox cmd */
12212 retval = lpfc_sli_config_port(phba, LPFC_SLI_REV3);
12213 if (retval)
12214 return intr_mode;
12215 clear_bit(HBA_NEEDS_CFG_PORT, &phba->hba_flag);
12216
12217 if (cfg_mode == 2) {
12218 /* Now, try to enable MSI-X interrupt mode */
12219 retval = lpfc_sli_enable_msix(phba);
12220 if (!retval) {
12221 /* Indicate initialization to MSI-X mode */
12222 phba->intr_type = MSIX;
12223 intr_mode = 2;
12224 }
12225 }
12226
12227 /* Fallback to MSI if MSI-X initialization failed */
12228 if (cfg_mode >= 1 && phba->intr_type == NONE) {
12229 retval = lpfc_sli_enable_msi(phba);
12230 if (!retval) {
12231 /* Indicate initialization to MSI mode */
12232 phba->intr_type = MSI;
12233 intr_mode = 1;
12234 }
12235 }
12236
12237 /* Fallback to INTx if both MSI-X/MSI initalization failed */
12238 if (phba->intr_type == NONE) {
12239 retval = request_irq(phba->pcidev->irq, lpfc_sli_intr_handler,
12240 IRQF_SHARED, LPFC_DRIVER_NAME, phba);
12241 if (!retval) {
12242 /* Indicate initialization to INTx mode */
12243 phba->intr_type = INTx;
12244 intr_mode = 0;
12245 }
12246 }
12247 return intr_mode;
12248 }
12249
12250 /**
12251 * lpfc_sli_disable_intr - Disable device interrupt to SLI-3 device.
12252 * @phba: pointer to lpfc hba data structure.
12253 *
12254 * This routine is invoked to disable device interrupt and disassociate the
12255 * driver's interrupt handler(s) from interrupt vector(s) to device with
12256 * SLI-3 interface spec. Depending on the interrupt mode, the driver will
12257 * release the interrupt vector(s) for the message signaled interrupt.
12258 **/
12259 static void
lpfc_sli_disable_intr(struct lpfc_hba * phba)12260 lpfc_sli_disable_intr(struct lpfc_hba *phba)
12261 {
12262 int nr_irqs, i;
12263
12264 if (phba->intr_type == MSIX)
12265 nr_irqs = LPFC_MSIX_VECTORS;
12266 else
12267 nr_irqs = 1;
12268
12269 for (i = 0; i < nr_irqs; i++)
12270 free_irq(pci_irq_vector(phba->pcidev, i), phba);
12271 pci_free_irq_vectors(phba->pcidev);
12272
12273 /* Reset interrupt management states */
12274 phba->intr_type = NONE;
12275 phba->sli.slistat.sli_intr = 0;
12276 }
12277
12278 /**
12279 * lpfc_find_cpu_handle - Find the CPU that corresponds to the specified Queue
12280 * @phba: pointer to lpfc hba data structure.
12281 * @id: EQ vector index or Hardware Queue index
12282 * @match: LPFC_FIND_BY_EQ = match by EQ
12283 * LPFC_FIND_BY_HDWQ = match by Hardware Queue
12284 * Return the CPU that matches the selection criteria
12285 */
12286 static uint16_t
lpfc_find_cpu_handle(struct lpfc_hba * phba,uint16_t id,int match)12287 lpfc_find_cpu_handle(struct lpfc_hba *phba, uint16_t id, int match)
12288 {
12289 struct lpfc_vector_map_info *cpup;
12290 int cpu;
12291
12292 /* Loop through all CPUs */
12293 for_each_present_cpu(cpu) {
12294 cpup = &phba->sli4_hba.cpu_map[cpu];
12295
12296 /* If we are matching by EQ, there may be multiple CPUs using
12297 * using the same vector, so select the one with
12298 * LPFC_CPU_FIRST_IRQ set.
12299 */
12300 if ((match == LPFC_FIND_BY_EQ) &&
12301 (cpup->flag & LPFC_CPU_FIRST_IRQ) &&
12302 (cpup->eq == id))
12303 return cpu;
12304
12305 /* If matching by HDWQ, select the first CPU that matches */
12306 if ((match == LPFC_FIND_BY_HDWQ) && (cpup->hdwq == id))
12307 return cpu;
12308 }
12309 return 0;
12310 }
12311
12312 #ifdef CONFIG_X86
12313 /**
12314 * lpfc_find_hyper - Determine if the CPU map entry is hyper-threaded
12315 * @phba: pointer to lpfc hba data structure.
12316 * @cpu: CPU map index
12317 * @phys_id: CPU package physical id
12318 * @core_id: CPU core id
12319 */
12320 static int
lpfc_find_hyper(struct lpfc_hba * phba,int cpu,uint16_t phys_id,uint16_t core_id)12321 lpfc_find_hyper(struct lpfc_hba *phba, int cpu,
12322 uint16_t phys_id, uint16_t core_id)
12323 {
12324 struct lpfc_vector_map_info *cpup;
12325 int idx;
12326
12327 for_each_present_cpu(idx) {
12328 cpup = &phba->sli4_hba.cpu_map[idx];
12329 /* Does the cpup match the one we are looking for */
12330 if ((cpup->phys_id == phys_id) &&
12331 (cpup->core_id == core_id) &&
12332 (cpu != idx))
12333 return 1;
12334 }
12335 return 0;
12336 }
12337 #endif
12338
12339 /*
12340 * lpfc_assign_eq_map_info - Assigns eq for vector_map structure
12341 * @phba: pointer to lpfc hba data structure.
12342 * @eqidx: index for eq and irq vector
12343 * @flag: flags to set for vector_map structure
12344 * @cpu: cpu used to index vector_map structure
12345 *
12346 * The routine assigns eq info into vector_map structure
12347 */
12348 static inline void
lpfc_assign_eq_map_info(struct lpfc_hba * phba,uint16_t eqidx,uint16_t flag,unsigned int cpu)12349 lpfc_assign_eq_map_info(struct lpfc_hba *phba, uint16_t eqidx, uint16_t flag,
12350 unsigned int cpu)
12351 {
12352 struct lpfc_vector_map_info *cpup = &phba->sli4_hba.cpu_map[cpu];
12353 struct lpfc_hba_eq_hdl *eqhdl = lpfc_get_eq_hdl(eqidx);
12354
12355 cpup->eq = eqidx;
12356 cpup->flag |= flag;
12357
12358 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12359 "3336 Set Affinity: CPU %d irq %d eq %d flag x%x\n",
12360 cpu, eqhdl->irq, cpup->eq, cpup->flag);
12361 }
12362
12363 /**
12364 * lpfc_cpu_map_array_init - Initialize cpu_map structure
12365 * @phba: pointer to lpfc hba data structure.
12366 *
12367 * The routine initializes the cpu_map array structure
12368 */
12369 static void
lpfc_cpu_map_array_init(struct lpfc_hba * phba)12370 lpfc_cpu_map_array_init(struct lpfc_hba *phba)
12371 {
12372 struct lpfc_vector_map_info *cpup;
12373 struct lpfc_eq_intr_info *eqi;
12374 int cpu;
12375
12376 for_each_possible_cpu(cpu) {
12377 cpup = &phba->sli4_hba.cpu_map[cpu];
12378 cpup->phys_id = LPFC_VECTOR_MAP_EMPTY;
12379 cpup->core_id = LPFC_VECTOR_MAP_EMPTY;
12380 cpup->hdwq = LPFC_VECTOR_MAP_EMPTY;
12381 cpup->eq = LPFC_VECTOR_MAP_EMPTY;
12382 cpup->flag = 0;
12383 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, cpu);
12384 INIT_LIST_HEAD(&eqi->list);
12385 eqi->icnt = 0;
12386 }
12387 }
12388
12389 /**
12390 * lpfc_hba_eq_hdl_array_init - Initialize hba_eq_hdl structure
12391 * @phba: pointer to lpfc hba data structure.
12392 *
12393 * The routine initializes the hba_eq_hdl array structure
12394 */
12395 static void
lpfc_hba_eq_hdl_array_init(struct lpfc_hba * phba)12396 lpfc_hba_eq_hdl_array_init(struct lpfc_hba *phba)
12397 {
12398 struct lpfc_hba_eq_hdl *eqhdl;
12399 int i;
12400
12401 for (i = 0; i < phba->cfg_irq_chann; i++) {
12402 eqhdl = lpfc_get_eq_hdl(i);
12403 eqhdl->irq = LPFC_IRQ_EMPTY;
12404 eqhdl->phba = phba;
12405 }
12406 }
12407
12408 /**
12409 * lpfc_cpu_affinity_check - Check vector CPU affinity mappings
12410 * @phba: pointer to lpfc hba data structure.
12411 * @vectors: number of msix vectors allocated.
12412 *
12413 * The routine will figure out the CPU affinity assignment for every
12414 * MSI-X vector allocated for the HBA.
12415 * In addition, the CPU to IO channel mapping will be calculated
12416 * and the phba->sli4_hba.cpu_map array will reflect this.
12417 */
12418 static void
lpfc_cpu_affinity_check(struct lpfc_hba * phba,int vectors)12419 lpfc_cpu_affinity_check(struct lpfc_hba *phba, int vectors)
12420 {
12421 int i, cpu, idx, next_idx, new_cpu, start_cpu, first_cpu;
12422 int max_phys_id, min_phys_id;
12423 int max_core_id, min_core_id;
12424 struct lpfc_vector_map_info *cpup;
12425 struct lpfc_vector_map_info *new_cpup;
12426 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
12427 struct lpfc_hdwq_stat *c_stat;
12428 #endif
12429
12430 max_phys_id = 0;
12431 min_phys_id = LPFC_VECTOR_MAP_EMPTY;
12432 max_core_id = 0;
12433 min_core_id = LPFC_VECTOR_MAP_EMPTY;
12434
12435 /* Update CPU map with physical id and core id of each CPU */
12436 for_each_present_cpu(cpu) {
12437 cpup = &phba->sli4_hba.cpu_map[cpu];
12438 #ifdef CONFIG_X86
12439 cpup->phys_id = topology_physical_package_id(cpu);
12440 cpup->core_id = topology_core_id(cpu);
12441 if (lpfc_find_hyper(phba, cpu, cpup->phys_id, cpup->core_id))
12442 cpup->flag |= LPFC_CPU_MAP_HYPER;
12443 #else
12444 /* No distinction between CPUs for other platforms */
12445 cpup->phys_id = 0;
12446 cpup->core_id = cpu;
12447 #endif
12448
12449 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12450 "3328 CPU %d physid %d coreid %d flag x%x\n",
12451 cpu, cpup->phys_id, cpup->core_id, cpup->flag);
12452
12453 if (cpup->phys_id > max_phys_id)
12454 max_phys_id = cpup->phys_id;
12455 if (cpup->phys_id < min_phys_id)
12456 min_phys_id = cpup->phys_id;
12457
12458 if (cpup->core_id > max_core_id)
12459 max_core_id = cpup->core_id;
12460 if (cpup->core_id < min_core_id)
12461 min_core_id = cpup->core_id;
12462 }
12463
12464 /* After looking at each irq vector assigned to this pcidev, its
12465 * possible to see that not ALL CPUs have been accounted for.
12466 * Next we will set any unassigned (unaffinitized) cpu map
12467 * entries to a IRQ on the same phys_id.
12468 */
12469 first_cpu = cpumask_first(cpu_present_mask);
12470 start_cpu = first_cpu;
12471
12472 for_each_present_cpu(cpu) {
12473 cpup = &phba->sli4_hba.cpu_map[cpu];
12474
12475 /* Is this CPU entry unassigned */
12476 if (cpup->eq == LPFC_VECTOR_MAP_EMPTY) {
12477 /* Mark CPU as IRQ not assigned by the kernel */
12478 cpup->flag |= LPFC_CPU_MAP_UNASSIGN;
12479
12480 /* If so, find a new_cpup that is on the SAME
12481 * phys_id as cpup. start_cpu will start where we
12482 * left off so all unassigned entries don't get assgined
12483 * the IRQ of the first entry.
12484 */
12485 new_cpu = start_cpu;
12486 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) {
12487 new_cpup = &phba->sli4_hba.cpu_map[new_cpu];
12488 if (!(new_cpup->flag & LPFC_CPU_MAP_UNASSIGN) &&
12489 (new_cpup->eq != LPFC_VECTOR_MAP_EMPTY) &&
12490 (new_cpup->phys_id == cpup->phys_id))
12491 goto found_same;
12492 new_cpu = lpfc_next_present_cpu(new_cpu);
12493 }
12494 /* At this point, we leave the CPU as unassigned */
12495 continue;
12496 found_same:
12497 /* We found a matching phys_id, so copy the IRQ info */
12498 cpup->eq = new_cpup->eq;
12499
12500 /* Bump start_cpu to the next slot to minmize the
12501 * chance of having multiple unassigned CPU entries
12502 * selecting the same IRQ.
12503 */
12504 start_cpu = lpfc_next_present_cpu(new_cpu);
12505
12506 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12507 "3337 Set Affinity: CPU %d "
12508 "eq %d from peer cpu %d same "
12509 "phys_id (%d)\n",
12510 cpu, cpup->eq, new_cpu,
12511 cpup->phys_id);
12512 }
12513 }
12514
12515 /* Set any unassigned cpu map entries to a IRQ on any phys_id */
12516 start_cpu = first_cpu;
12517
12518 for_each_present_cpu(cpu) {
12519 cpup = &phba->sli4_hba.cpu_map[cpu];
12520
12521 /* Is this entry unassigned */
12522 if (cpup->eq == LPFC_VECTOR_MAP_EMPTY) {
12523 /* Mark it as IRQ not assigned by the kernel */
12524 cpup->flag |= LPFC_CPU_MAP_UNASSIGN;
12525
12526 /* If so, find a new_cpup thats on ANY phys_id
12527 * as the cpup. start_cpu will start where we
12528 * left off so all unassigned entries don't get
12529 * assigned the IRQ of the first entry.
12530 */
12531 new_cpu = start_cpu;
12532 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) {
12533 new_cpup = &phba->sli4_hba.cpu_map[new_cpu];
12534 if (!(new_cpup->flag & LPFC_CPU_MAP_UNASSIGN) &&
12535 (new_cpup->eq != LPFC_VECTOR_MAP_EMPTY))
12536 goto found_any;
12537 new_cpu = lpfc_next_present_cpu(new_cpu);
12538 }
12539 /* We should never leave an entry unassigned */
12540 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
12541 "3339 Set Affinity: CPU %d "
12542 "eq %d UNASSIGNED\n",
12543 cpup->hdwq, cpup->eq);
12544 continue;
12545 found_any:
12546 /* We found an available entry, copy the IRQ info */
12547 cpup->eq = new_cpup->eq;
12548
12549 /* Bump start_cpu to the next slot to minmize the
12550 * chance of having multiple unassigned CPU entries
12551 * selecting the same IRQ.
12552 */
12553 start_cpu = lpfc_next_present_cpu(new_cpu);
12554
12555 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12556 "3338 Set Affinity: CPU %d "
12557 "eq %d from peer cpu %d (%d/%d)\n",
12558 cpu, cpup->eq, new_cpu,
12559 new_cpup->phys_id, new_cpup->core_id);
12560 }
12561 }
12562
12563 /* Assign hdwq indices that are unique across all cpus in the map
12564 * that are also FIRST_CPUs.
12565 */
12566 idx = 0;
12567 for_each_present_cpu(cpu) {
12568 cpup = &phba->sli4_hba.cpu_map[cpu];
12569
12570 /* Only FIRST IRQs get a hdwq index assignment. */
12571 if (!(cpup->flag & LPFC_CPU_FIRST_IRQ))
12572 continue;
12573
12574 /* 1 to 1, the first LPFC_CPU_FIRST_IRQ cpus to a unique hdwq */
12575 cpup->hdwq = idx;
12576 idx++;
12577 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12578 "3333 Set Affinity: CPU %d (phys %d core %d): "
12579 "hdwq %d eq %d flg x%x\n",
12580 cpu, cpup->phys_id, cpup->core_id,
12581 cpup->hdwq, cpup->eq, cpup->flag);
12582 }
12583 /* Associate a hdwq with each cpu_map entry
12584 * This will be 1 to 1 - hdwq to cpu, unless there are less
12585 * hardware queues then CPUs. For that case we will just round-robin
12586 * the available hardware queues as they get assigned to CPUs.
12587 * The next_idx is the idx from the FIRST_CPU loop above to account
12588 * for irq_chann < hdwq. The idx is used for round-robin assignments
12589 * and needs to start at 0.
12590 */
12591 next_idx = idx;
12592 start_cpu = 0;
12593 idx = 0;
12594 for_each_present_cpu(cpu) {
12595 cpup = &phba->sli4_hba.cpu_map[cpu];
12596
12597 /* FIRST cpus are already mapped. */
12598 if (cpup->flag & LPFC_CPU_FIRST_IRQ)
12599 continue;
12600
12601 /* If the cfg_irq_chann < cfg_hdw_queue, set the hdwq
12602 * of the unassigned cpus to the next idx so that all
12603 * hdw queues are fully utilized.
12604 */
12605 if (next_idx < phba->cfg_hdw_queue) {
12606 cpup->hdwq = next_idx;
12607 next_idx++;
12608 continue;
12609 }
12610
12611 /* Not a First CPU and all hdw_queues are used. Reuse a
12612 * Hardware Queue for another CPU, so be smart about it
12613 * and pick one that has its IRQ/EQ mapped to the same phys_id
12614 * (CPU package) and core_id.
12615 */
12616 new_cpu = start_cpu;
12617 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) {
12618 new_cpup = &phba->sli4_hba.cpu_map[new_cpu];
12619 if (new_cpup->hdwq != LPFC_VECTOR_MAP_EMPTY &&
12620 new_cpup->phys_id == cpup->phys_id &&
12621 new_cpup->core_id == cpup->core_id) {
12622 goto found_hdwq;
12623 }
12624 new_cpu = lpfc_next_present_cpu(new_cpu);
12625 }
12626
12627 /* If we can't match both phys_id and core_id,
12628 * settle for just a phys_id match.
12629 */
12630 new_cpu = start_cpu;
12631 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) {
12632 new_cpup = &phba->sli4_hba.cpu_map[new_cpu];
12633 if (new_cpup->hdwq != LPFC_VECTOR_MAP_EMPTY &&
12634 new_cpup->phys_id == cpup->phys_id)
12635 goto found_hdwq;
12636 new_cpu = lpfc_next_present_cpu(new_cpu);
12637 }
12638
12639 /* Otherwise just round robin on cfg_hdw_queue */
12640 cpup->hdwq = idx % phba->cfg_hdw_queue;
12641 idx++;
12642 goto logit;
12643 found_hdwq:
12644 /* We found an available entry, copy the IRQ info */
12645 start_cpu = lpfc_next_present_cpu(new_cpu);
12646 cpup->hdwq = new_cpup->hdwq;
12647 logit:
12648 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12649 "3335 Set Affinity: CPU %d (phys %d core %d): "
12650 "hdwq %d eq %d flg x%x\n",
12651 cpu, cpup->phys_id, cpup->core_id,
12652 cpup->hdwq, cpup->eq, cpup->flag);
12653 }
12654
12655 /*
12656 * Initialize the cpu_map slots for not-present cpus in case
12657 * a cpu is hot-added. Perform a simple hdwq round robin assignment.
12658 */
12659 idx = 0;
12660 for_each_possible_cpu(cpu) {
12661 cpup = &phba->sli4_hba.cpu_map[cpu];
12662 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
12663 c_stat = per_cpu_ptr(phba->sli4_hba.c_stat, cpu);
12664 c_stat->hdwq_no = cpup->hdwq;
12665 #endif
12666 if (cpup->hdwq != LPFC_VECTOR_MAP_EMPTY)
12667 continue;
12668
12669 cpup->hdwq = idx++ % phba->cfg_hdw_queue;
12670 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS
12671 c_stat->hdwq_no = cpup->hdwq;
12672 #endif
12673 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
12674 "3340 Set Affinity: not present "
12675 "CPU %d hdwq %d\n",
12676 cpu, cpup->hdwq);
12677 }
12678
12679 /* The cpu_map array will be used later during initialization
12680 * when EQ / CQ / WQs are allocated and configured.
12681 */
12682 return;
12683 }
12684
12685 /**
12686 * lpfc_cpuhp_get_eq
12687 *
12688 * @phba: pointer to lpfc hba data structure.
12689 * @cpu: cpu going offline
12690 * @eqlist: eq list to append to
12691 */
12692 static int
lpfc_cpuhp_get_eq(struct lpfc_hba * phba,unsigned int cpu,struct list_head * eqlist)12693 lpfc_cpuhp_get_eq(struct lpfc_hba *phba, unsigned int cpu,
12694 struct list_head *eqlist)
12695 {
12696 const struct cpumask *maskp;
12697 struct lpfc_queue *eq;
12698 struct cpumask *tmp;
12699 u16 idx;
12700
12701 tmp = kzalloc(cpumask_size(), GFP_KERNEL);
12702 if (!tmp)
12703 return -ENOMEM;
12704
12705 for (idx = 0; idx < phba->cfg_irq_chann; idx++) {
12706 maskp = pci_irq_get_affinity(phba->pcidev, idx);
12707 if (!maskp)
12708 continue;
12709 /*
12710 * if irq is not affinitized to the cpu going
12711 * then we don't need to poll the eq attached
12712 * to it.
12713 */
12714 if (!cpumask_and(tmp, maskp, cpumask_of(cpu)))
12715 continue;
12716 /* get the cpus that are online and are affini-
12717 * tized to this irq vector. If the count is
12718 * more than 1 then cpuhp is not going to shut-
12719 * down this vector. Since this cpu has not
12720 * gone offline yet, we need >1.
12721 */
12722 cpumask_and(tmp, maskp, cpu_online_mask);
12723 if (cpumask_weight(tmp) > 1)
12724 continue;
12725
12726 /* Now that we have an irq to shutdown, get the eq
12727 * mapped to this irq. Note: multiple hdwq's in
12728 * the software can share an eq, but eventually
12729 * only eq will be mapped to this vector
12730 */
12731 eq = phba->sli4_hba.hba_eq_hdl[idx].eq;
12732 list_add(&eq->_poll_list, eqlist);
12733 }
12734 kfree(tmp);
12735 return 0;
12736 }
12737
__lpfc_cpuhp_remove(struct lpfc_hba * phba)12738 static void __lpfc_cpuhp_remove(struct lpfc_hba *phba)
12739 {
12740 if (phba->sli_rev != LPFC_SLI_REV4)
12741 return;
12742
12743 cpuhp_state_remove_instance_nocalls(lpfc_cpuhp_state,
12744 &phba->cpuhp);
12745 /*
12746 * unregistering the instance doesn't stop the polling
12747 * timer. Wait for the poll timer to retire.
12748 */
12749 synchronize_rcu();
12750 timer_delete_sync(&phba->cpuhp_poll_timer);
12751 }
12752
lpfc_cpuhp_remove(struct lpfc_hba * phba)12753 static void lpfc_cpuhp_remove(struct lpfc_hba *phba)
12754 {
12755 if (phba->pport &&
12756 test_bit(FC_OFFLINE_MODE, &phba->pport->fc_flag))
12757 return;
12758
12759 __lpfc_cpuhp_remove(phba);
12760 }
12761
lpfc_cpuhp_add(struct lpfc_hba * phba)12762 static void lpfc_cpuhp_add(struct lpfc_hba *phba)
12763 {
12764 if (phba->sli_rev != LPFC_SLI_REV4)
12765 return;
12766
12767 rcu_read_lock();
12768
12769 if (!list_empty(&phba->poll_list))
12770 mod_timer(&phba->cpuhp_poll_timer,
12771 jiffies + msecs_to_jiffies(LPFC_POLL_HB));
12772
12773 rcu_read_unlock();
12774
12775 cpuhp_state_add_instance_nocalls(lpfc_cpuhp_state,
12776 &phba->cpuhp);
12777 }
12778
__lpfc_cpuhp_checks(struct lpfc_hba * phba,int * retval)12779 static int __lpfc_cpuhp_checks(struct lpfc_hba *phba, int *retval)
12780 {
12781 if (test_bit(FC_UNLOADING, &phba->pport->load_flag)) {
12782 *retval = -EAGAIN;
12783 return true;
12784 }
12785
12786 if (phba->sli_rev != LPFC_SLI_REV4) {
12787 *retval = 0;
12788 return true;
12789 }
12790
12791 /* proceed with the hotplug */
12792 return false;
12793 }
12794
12795 /**
12796 * lpfc_irq_set_aff - set IRQ affinity
12797 * @eqhdl: EQ handle
12798 * @cpu: cpu to set affinity
12799 *
12800 **/
12801 static inline void
lpfc_irq_set_aff(struct lpfc_hba_eq_hdl * eqhdl,unsigned int cpu)12802 lpfc_irq_set_aff(struct lpfc_hba_eq_hdl *eqhdl, unsigned int cpu)
12803 {
12804 cpumask_clear(&eqhdl->aff_mask);
12805 cpumask_set_cpu(cpu, &eqhdl->aff_mask);
12806 irq_set_status_flags(eqhdl->irq, IRQ_NO_BALANCING);
12807 irq_set_affinity(eqhdl->irq, &eqhdl->aff_mask);
12808 }
12809
12810 /**
12811 * lpfc_irq_clear_aff - clear IRQ affinity
12812 * @eqhdl: EQ handle
12813 *
12814 **/
12815 static inline void
lpfc_irq_clear_aff(struct lpfc_hba_eq_hdl * eqhdl)12816 lpfc_irq_clear_aff(struct lpfc_hba_eq_hdl *eqhdl)
12817 {
12818 cpumask_clear(&eqhdl->aff_mask);
12819 irq_clear_status_flags(eqhdl->irq, IRQ_NO_BALANCING);
12820 }
12821
12822 /**
12823 * lpfc_irq_rebalance - rebalances IRQ affinity according to cpuhp event
12824 * @phba: pointer to HBA context object.
12825 * @cpu: cpu going offline/online
12826 * @offline: true, cpu is going offline. false, cpu is coming online.
12827 *
12828 * If cpu is going offline, we'll try our best effort to find the next
12829 * online cpu on the phba's original_mask and migrate all offlining IRQ
12830 * affinities.
12831 *
12832 * If cpu is coming online, reaffinitize the IRQ back to the onlining cpu.
12833 *
12834 * Note: Call only if NUMA or NHT mode is enabled, otherwise rely on
12835 * PCI_IRQ_AFFINITY to auto-manage IRQ affinity.
12836 *
12837 **/
12838 static void
lpfc_irq_rebalance(struct lpfc_hba * phba,unsigned int cpu,bool offline)12839 lpfc_irq_rebalance(struct lpfc_hba *phba, unsigned int cpu, bool offline)
12840 {
12841 struct lpfc_vector_map_info *cpup;
12842 struct cpumask *aff_mask;
12843 unsigned int cpu_select, cpu_next, idx;
12844 const struct cpumask *orig_mask;
12845
12846 if (phba->irq_chann_mode == NORMAL_MODE)
12847 return;
12848
12849 orig_mask = &phba->sli4_hba.irq_aff_mask;
12850
12851 if (!cpumask_test_cpu(cpu, orig_mask))
12852 return;
12853
12854 cpup = &phba->sli4_hba.cpu_map[cpu];
12855
12856 if (!(cpup->flag & LPFC_CPU_FIRST_IRQ))
12857 return;
12858
12859 if (offline) {
12860 /* Find next online CPU on original mask */
12861 cpu_next = cpumask_next_wrap(cpu, orig_mask);
12862 cpu_select = lpfc_next_online_cpu(orig_mask, cpu_next);
12863
12864 /* Found a valid CPU */
12865 if ((cpu_select < nr_cpu_ids) && (cpu_select != cpu)) {
12866 /* Go through each eqhdl and ensure offlining
12867 * cpu aff_mask is migrated
12868 */
12869 for (idx = 0; idx < phba->cfg_irq_chann; idx++) {
12870 aff_mask = lpfc_get_aff_mask(idx);
12871
12872 /* Migrate affinity */
12873 if (cpumask_test_cpu(cpu, aff_mask))
12874 lpfc_irq_set_aff(lpfc_get_eq_hdl(idx),
12875 cpu_select);
12876 }
12877 } else {
12878 /* Rely on irqbalance if no online CPUs left on NUMA */
12879 for (idx = 0; idx < phba->cfg_irq_chann; idx++)
12880 lpfc_irq_clear_aff(lpfc_get_eq_hdl(idx));
12881 }
12882 } else {
12883 /* Migrate affinity back to this CPU */
12884 lpfc_irq_set_aff(lpfc_get_eq_hdl(cpup->eq), cpu);
12885 }
12886 }
12887
lpfc_cpu_offline(unsigned int cpu,struct hlist_node * node)12888 static int lpfc_cpu_offline(unsigned int cpu, struct hlist_node *node)
12889 {
12890 struct lpfc_hba *phba = hlist_entry_safe(node, struct lpfc_hba, cpuhp);
12891 struct lpfc_queue *eq, *next;
12892 LIST_HEAD(eqlist);
12893 int retval;
12894
12895 if (!phba) {
12896 WARN_ONCE(!phba, "cpu: %u. phba:NULL", raw_smp_processor_id());
12897 return 0;
12898 }
12899
12900 if (__lpfc_cpuhp_checks(phba, &retval))
12901 return retval;
12902
12903 lpfc_irq_rebalance(phba, cpu, true);
12904
12905 retval = lpfc_cpuhp_get_eq(phba, cpu, &eqlist);
12906 if (retval)
12907 return retval;
12908
12909 /* start polling on these eq's */
12910 list_for_each_entry_safe(eq, next, &eqlist, _poll_list) {
12911 list_del_init(&eq->_poll_list);
12912 lpfc_sli4_start_polling(eq);
12913 }
12914
12915 return 0;
12916 }
12917
lpfc_cpu_online(unsigned int cpu,struct hlist_node * node)12918 static int lpfc_cpu_online(unsigned int cpu, struct hlist_node *node)
12919 {
12920 struct lpfc_hba *phba = hlist_entry_safe(node, struct lpfc_hba, cpuhp);
12921 struct lpfc_queue *eq, *next;
12922 unsigned int n;
12923 int retval;
12924
12925 if (!phba) {
12926 WARN_ONCE(!phba, "cpu: %u. phba:NULL", raw_smp_processor_id());
12927 return 0;
12928 }
12929
12930 if (__lpfc_cpuhp_checks(phba, &retval))
12931 return retval;
12932
12933 lpfc_irq_rebalance(phba, cpu, false);
12934
12935 list_for_each_entry_safe(eq, next, &phba->poll_list, _poll_list) {
12936 n = lpfc_find_cpu_handle(phba, eq->hdwq, LPFC_FIND_BY_HDWQ);
12937 if (n == cpu)
12938 lpfc_sli4_stop_polling(eq);
12939 }
12940
12941 return 0;
12942 }
12943
12944 /**
12945 * lpfc_sli4_enable_msix - Enable MSI-X interrupt mode to SLI-4 device
12946 * @phba: pointer to lpfc hba data structure.
12947 *
12948 * This routine is invoked to enable the MSI-X interrupt vectors to device
12949 * with SLI-4 interface spec. It also allocates MSI-X vectors and maps them
12950 * to cpus on the system.
12951 *
12952 * When cfg_irq_numa is enabled, the adapter will only allocate vectors for
12953 * the number of cpus on the same numa node as this adapter. The vectors are
12954 * allocated without requesting OS affinity mapping. A vector will be
12955 * allocated and assigned to each online and offline cpu. If the cpu is
12956 * online, then affinity will be set to that cpu. If the cpu is offline, then
12957 * affinity will be set to the nearest peer cpu within the numa node that is
12958 * online. If there are no online cpus within the numa node, affinity is not
12959 * assigned and the OS may do as it pleases. Note: cpu vector affinity mapping
12960 * is consistent with the way cpu online/offline is handled when cfg_irq_numa is
12961 * configured.
12962 *
12963 * If numa mode is not enabled and there is more than 1 vector allocated, then
12964 * the driver relies on the managed irq interface where the OS assigns vector to
12965 * cpu affinity. The driver will then use that affinity mapping to setup its
12966 * cpu mapping table.
12967 *
12968 * Return codes
12969 * 0 - successful
12970 * other values - error
12971 **/
12972 static int
lpfc_sli4_enable_msix(struct lpfc_hba * phba)12973 lpfc_sli4_enable_msix(struct lpfc_hba *phba)
12974 {
12975 int vectors, rc, index;
12976 char *name;
12977 const struct cpumask *aff_mask = NULL;
12978 unsigned int cpu = 0, cpu_cnt = 0, cpu_select = nr_cpu_ids;
12979 struct lpfc_vector_map_info *cpup;
12980 struct lpfc_hba_eq_hdl *eqhdl;
12981 const struct cpumask *maskp;
12982 unsigned int flags = PCI_IRQ_MSIX;
12983
12984 /* Set up MSI-X multi-message vectors */
12985 vectors = phba->cfg_irq_chann;
12986
12987 if (phba->irq_chann_mode != NORMAL_MODE)
12988 aff_mask = &phba->sli4_hba.irq_aff_mask;
12989
12990 if (aff_mask) {
12991 cpu_cnt = cpumask_weight(aff_mask);
12992 vectors = min(phba->cfg_irq_chann, cpu_cnt);
12993
12994 /* cpu: iterates over aff_mask including offline or online
12995 * cpu_select: iterates over online aff_mask to set affinity
12996 */
12997 cpu = cpumask_first(aff_mask);
12998 cpu_select = lpfc_next_online_cpu(aff_mask, cpu);
12999 } else {
13000 flags |= PCI_IRQ_AFFINITY;
13001 }
13002
13003 rc = pci_alloc_irq_vectors(phba->pcidev, 1, vectors, flags);
13004 if (rc < 0) {
13005 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
13006 "0484 PCI enable MSI-X failed (%d)\n", rc);
13007 goto vec_fail_out;
13008 }
13009 vectors = rc;
13010
13011 /* Assign MSI-X vectors to interrupt handlers */
13012 for (index = 0; index < vectors; index++) {
13013 eqhdl = lpfc_get_eq_hdl(index);
13014 name = eqhdl->handler_name;
13015 memset(name, 0, LPFC_SLI4_HANDLER_NAME_SZ);
13016 snprintf(name, LPFC_SLI4_HANDLER_NAME_SZ,
13017 LPFC_DRIVER_HANDLER_NAME"%d", index);
13018
13019 eqhdl->idx = index;
13020 rc = pci_irq_vector(phba->pcidev, index);
13021 if (rc < 0) {
13022 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
13023 "0489 MSI-X fast-path (%d) "
13024 "pci_irq_vec failed (%d)\n", index, rc);
13025 goto cfg_fail_out;
13026 }
13027 eqhdl->irq = rc;
13028
13029 rc = request_threaded_irq(eqhdl->irq,
13030 &lpfc_sli4_hba_intr_handler,
13031 &lpfc_sli4_hba_intr_handler_th,
13032 0, name, eqhdl);
13033 if (rc) {
13034 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
13035 "0486 MSI-X fast-path (%d) "
13036 "request_irq failed (%d)\n", index, rc);
13037 goto cfg_fail_out;
13038 }
13039
13040 if (aff_mask) {
13041 /* If found a neighboring online cpu, set affinity */
13042 if (cpu_select < nr_cpu_ids)
13043 lpfc_irq_set_aff(eqhdl, cpu_select);
13044
13045 /* Assign EQ to cpu_map */
13046 lpfc_assign_eq_map_info(phba, index,
13047 LPFC_CPU_FIRST_IRQ,
13048 cpu);
13049
13050 /* Iterate to next offline or online cpu in aff_mask */
13051 cpu = cpumask_next(cpu, aff_mask);
13052
13053 /* Find next online cpu in aff_mask to set affinity */
13054 cpu_select = lpfc_next_online_cpu(aff_mask, cpu);
13055 } else if (vectors == 1) {
13056 cpu = cpumask_first(cpu_present_mask);
13057 lpfc_assign_eq_map_info(phba, index, LPFC_CPU_FIRST_IRQ,
13058 cpu);
13059 } else {
13060 maskp = pci_irq_get_affinity(phba->pcidev, index);
13061
13062 /* Loop through all CPUs associated with vector index */
13063 for_each_cpu_and(cpu, maskp, cpu_present_mask) {
13064 cpup = &phba->sli4_hba.cpu_map[cpu];
13065
13066 /* If this is the first CPU thats assigned to
13067 * this vector, set LPFC_CPU_FIRST_IRQ.
13068 *
13069 * With certain platforms its possible that irq
13070 * vectors are affinitized to all the cpu's.
13071 * This can result in each cpu_map.eq to be set
13072 * to the last vector, resulting in overwrite
13073 * of all the previous cpu_map.eq. Ensure that
13074 * each vector receives a place in cpu_map.
13075 * Later call to lpfc_cpu_affinity_check will
13076 * ensure we are nicely balanced out.
13077 */
13078 if (cpup->eq != LPFC_VECTOR_MAP_EMPTY)
13079 continue;
13080 lpfc_assign_eq_map_info(phba, index,
13081 LPFC_CPU_FIRST_IRQ,
13082 cpu);
13083 break;
13084 }
13085 }
13086 }
13087
13088 if (vectors != phba->cfg_irq_chann) {
13089 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
13090 "3238 Reducing IO channels to match number of "
13091 "MSI-X vectors, requested %d got %d\n",
13092 phba->cfg_irq_chann, vectors);
13093 if (phba->cfg_irq_chann > vectors)
13094 phba->cfg_irq_chann = vectors;
13095 }
13096
13097 return rc;
13098
13099 cfg_fail_out:
13100 /* free the irq already requested */
13101 for (--index; index >= 0; index--) {
13102 eqhdl = lpfc_get_eq_hdl(index);
13103 lpfc_irq_clear_aff(eqhdl);
13104 free_irq(eqhdl->irq, eqhdl);
13105 }
13106
13107 /* Unconfigure MSI-X capability structure */
13108 pci_free_irq_vectors(phba->pcidev);
13109
13110 vec_fail_out:
13111 return rc;
13112 }
13113
13114 /**
13115 * lpfc_sli4_enable_msi - Enable MSI interrupt mode to SLI-4 device
13116 * @phba: pointer to lpfc hba data structure.
13117 *
13118 * This routine is invoked to enable the MSI interrupt mode to device with
13119 * SLI-4 interface spec. The kernel function pci_alloc_irq_vectors() is
13120 * called to enable the MSI vector. The device driver is responsible for
13121 * calling the request_irq() to register MSI vector with a interrupt the
13122 * handler, which is done in this function.
13123 *
13124 * Return codes
13125 * 0 - successful
13126 * other values - error
13127 **/
13128 static int
lpfc_sli4_enable_msi(struct lpfc_hba * phba)13129 lpfc_sli4_enable_msi(struct lpfc_hba *phba)
13130 {
13131 int rc, index;
13132 unsigned int cpu;
13133 struct lpfc_hba_eq_hdl *eqhdl;
13134
13135 rc = pci_alloc_irq_vectors(phba->pcidev, 1, 1,
13136 PCI_IRQ_MSI | PCI_IRQ_AFFINITY);
13137 if (rc > 0)
13138 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
13139 "0487 PCI enable MSI mode success.\n");
13140 else {
13141 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
13142 "0488 PCI enable MSI mode failed (%d)\n", rc);
13143 return rc ? rc : -1;
13144 }
13145
13146 rc = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
13147 0, LPFC_DRIVER_NAME, phba);
13148 if (rc) {
13149 pci_free_irq_vectors(phba->pcidev);
13150 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
13151 "0490 MSI request_irq failed (%d)\n", rc);
13152 return rc;
13153 }
13154
13155 eqhdl = lpfc_get_eq_hdl(0);
13156 rc = pci_irq_vector(phba->pcidev, 0);
13157 if (rc < 0) {
13158 free_irq(phba->pcidev->irq, phba);
13159 pci_free_irq_vectors(phba->pcidev);
13160 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
13161 "0496 MSI pci_irq_vec failed (%d)\n", rc);
13162 return rc;
13163 }
13164 eqhdl->irq = rc;
13165
13166 cpu = cpumask_first(cpu_present_mask);
13167 lpfc_assign_eq_map_info(phba, 0, LPFC_CPU_FIRST_IRQ, cpu);
13168
13169 for (index = 0; index < phba->cfg_irq_chann; index++) {
13170 eqhdl = lpfc_get_eq_hdl(index);
13171 eqhdl->idx = index;
13172 }
13173
13174 return 0;
13175 }
13176
13177 /**
13178 * lpfc_sli4_enable_intr - Enable device interrupt to SLI-4 device
13179 * @phba: pointer to lpfc hba data structure.
13180 * @cfg_mode: Interrupt configuration mode (INTx, MSI or MSI-X).
13181 *
13182 * This routine is invoked to enable device interrupt and associate driver's
13183 * interrupt handler(s) to interrupt vector(s) to device with SLI-4
13184 * interface spec. Depends on the interrupt mode configured to the driver,
13185 * the driver will try to fallback from the configured interrupt mode to an
13186 * interrupt mode which is supported by the platform, kernel, and device in
13187 * the order of:
13188 * MSI-X -> MSI -> IRQ.
13189 *
13190 * Return codes
13191 * Interrupt mode (2, 1, 0) - successful
13192 * LPFC_INTR_ERROR - error
13193 **/
13194 static uint32_t
lpfc_sli4_enable_intr(struct lpfc_hba * phba,uint32_t cfg_mode)13195 lpfc_sli4_enable_intr(struct lpfc_hba *phba, uint32_t cfg_mode)
13196 {
13197 uint32_t intr_mode = LPFC_INTR_ERROR;
13198 int retval, idx;
13199
13200 if (cfg_mode == 2) {
13201 /* Preparation before conf_msi mbox cmd */
13202 retval = 0;
13203 if (!retval) {
13204 /* Now, try to enable MSI-X interrupt mode */
13205 retval = lpfc_sli4_enable_msix(phba);
13206 if (!retval) {
13207 /* Indicate initialization to MSI-X mode */
13208 phba->intr_type = MSIX;
13209 intr_mode = 2;
13210 }
13211 }
13212 }
13213
13214 /* Fallback to MSI if MSI-X initialization failed */
13215 if (cfg_mode >= 1 && phba->intr_type == NONE) {
13216 retval = lpfc_sli4_enable_msi(phba);
13217 if (!retval) {
13218 /* Indicate initialization to MSI mode */
13219 phba->intr_type = MSI;
13220 intr_mode = 1;
13221 }
13222 }
13223
13224 /* Fallback to INTx if both MSI-X/MSI initalization failed */
13225 if (phba->intr_type == NONE) {
13226 retval = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler,
13227 IRQF_SHARED, LPFC_DRIVER_NAME, phba);
13228 if (!retval) {
13229 struct lpfc_hba_eq_hdl *eqhdl;
13230 unsigned int cpu;
13231
13232 /* Indicate initialization to INTx mode */
13233 phba->intr_type = INTx;
13234 intr_mode = 0;
13235
13236 eqhdl = lpfc_get_eq_hdl(0);
13237 retval = pci_irq_vector(phba->pcidev, 0);
13238 if (retval < 0) {
13239 free_irq(phba->pcidev->irq, phba);
13240 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT,
13241 "0502 INTR pci_irq_vec failed (%d)\n",
13242 retval);
13243 return LPFC_INTR_ERROR;
13244 }
13245 eqhdl->irq = retval;
13246
13247 cpu = cpumask_first(cpu_present_mask);
13248 lpfc_assign_eq_map_info(phba, 0, LPFC_CPU_FIRST_IRQ,
13249 cpu);
13250 for (idx = 0; idx < phba->cfg_irq_chann; idx++) {
13251 eqhdl = lpfc_get_eq_hdl(idx);
13252 eqhdl->idx = idx;
13253 }
13254 }
13255 }
13256 return intr_mode;
13257 }
13258
13259 /**
13260 * lpfc_sli4_disable_intr - Disable device interrupt to SLI-4 device
13261 * @phba: pointer to lpfc hba data structure.
13262 *
13263 * This routine is invoked to disable device interrupt and disassociate
13264 * the driver's interrupt handler(s) from interrupt vector(s) to device
13265 * with SLI-4 interface spec. Depending on the interrupt mode, the driver
13266 * will release the interrupt vector(s) for the message signaled interrupt.
13267 **/
13268 static void
lpfc_sli4_disable_intr(struct lpfc_hba * phba)13269 lpfc_sli4_disable_intr(struct lpfc_hba *phba)
13270 {
13271 /* Disable the currently initialized interrupt mode */
13272 if (phba->intr_type == MSIX) {
13273 int index;
13274 struct lpfc_hba_eq_hdl *eqhdl;
13275
13276 /* Free up MSI-X multi-message vectors */
13277 for (index = 0; index < phba->cfg_irq_chann; index++) {
13278 eqhdl = lpfc_get_eq_hdl(index);
13279 lpfc_irq_clear_aff(eqhdl);
13280 free_irq(eqhdl->irq, eqhdl);
13281 }
13282 } else {
13283 free_irq(phba->pcidev->irq, phba);
13284 }
13285
13286 pci_free_irq_vectors(phba->pcidev);
13287
13288 /* Reset interrupt management states */
13289 phba->intr_type = NONE;
13290 phba->sli.slistat.sli_intr = 0;
13291 }
13292
13293 /**
13294 * lpfc_unset_hba - Unset SLI3 hba device initialization
13295 * @phba: pointer to lpfc hba data structure.
13296 *
13297 * This routine is invoked to unset the HBA device initialization steps to
13298 * a device with SLI-3 interface spec.
13299 **/
13300 static void
lpfc_unset_hba(struct lpfc_hba * phba)13301 lpfc_unset_hba(struct lpfc_hba *phba)
13302 {
13303 set_bit(FC_UNLOADING, &phba->pport->load_flag);
13304
13305 kfree(phba->vpi_bmask);
13306 kfree(phba->vpi_ids);
13307
13308 lpfc_stop_hba_timers(phba);
13309
13310 phba->pport->work_port_events = 0;
13311
13312 lpfc_sli_hba_down(phba);
13313
13314 lpfc_sli_brdrestart(phba);
13315
13316 lpfc_sli_disable_intr(phba);
13317
13318 return;
13319 }
13320
13321 /**
13322 * lpfc_sli4_xri_exchange_busy_wait - Wait for device XRI exchange busy
13323 * @phba: Pointer to HBA context object.
13324 *
13325 * This function is called in the SLI4 code path to wait for completion
13326 * of device's XRIs exchange busy. It will check the XRI exchange busy
13327 * on outstanding FCP and ELS I/Os every 10ms for up to 10 seconds; after
13328 * that, it will check the XRI exchange busy on outstanding FCP and ELS
13329 * I/Os every 30 seconds, log error message, and wait forever. Only when
13330 * all XRI exchange busy complete, the driver unload shall proceed with
13331 * invoking the function reset ioctl mailbox command to the CNA and the
13332 * the rest of the driver unload resource release.
13333 **/
13334 static void
lpfc_sli4_xri_exchange_busy_wait(struct lpfc_hba * phba)13335 lpfc_sli4_xri_exchange_busy_wait(struct lpfc_hba *phba)
13336 {
13337 struct lpfc_sli4_hdw_queue *qp;
13338 int idx, ccnt;
13339 int wait_time = 0;
13340 int io_xri_cmpl = 1;
13341 int nvmet_xri_cmpl = 1;
13342 int els_xri_cmpl = list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
13343
13344 /* Driver just aborted IOs during the hba_unset process. Pause
13345 * here to give the HBA time to complete the IO and get entries
13346 * into the abts lists.
13347 */
13348 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1 * 5);
13349
13350 /* Wait for NVME pending IO to flush back to transport. */
13351 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
13352 lpfc_nvme_wait_for_io_drain(phba);
13353
13354 ccnt = 0;
13355 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
13356 qp = &phba->sli4_hba.hdwq[idx];
13357 io_xri_cmpl = list_empty(&qp->lpfc_abts_io_buf_list);
13358 if (!io_xri_cmpl) /* if list is NOT empty */
13359 ccnt++;
13360 }
13361 if (ccnt)
13362 io_xri_cmpl = 0;
13363
13364 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
13365 nvmet_xri_cmpl =
13366 list_empty(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
13367 }
13368
13369 while (!els_xri_cmpl || !io_xri_cmpl || !nvmet_xri_cmpl) {
13370 if (wait_time > LPFC_XRI_EXCH_BUSY_WAIT_TMO) {
13371 if (!nvmet_xri_cmpl)
13372 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
13373 "6424 NVMET XRI exchange busy "
13374 "wait time: %d seconds.\n",
13375 wait_time/1000);
13376 if (!io_xri_cmpl)
13377 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
13378 "6100 IO XRI exchange busy "
13379 "wait time: %d seconds.\n",
13380 wait_time/1000);
13381 if (!els_xri_cmpl)
13382 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
13383 "2878 ELS XRI exchange busy "
13384 "wait time: %d seconds.\n",
13385 wait_time/1000);
13386 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T2);
13387 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T2;
13388 } else {
13389 msleep(LPFC_XRI_EXCH_BUSY_WAIT_T1);
13390 wait_time += LPFC_XRI_EXCH_BUSY_WAIT_T1;
13391 }
13392
13393 ccnt = 0;
13394 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) {
13395 qp = &phba->sli4_hba.hdwq[idx];
13396 io_xri_cmpl = list_empty(
13397 &qp->lpfc_abts_io_buf_list);
13398 if (!io_xri_cmpl) /* if list is NOT empty */
13399 ccnt++;
13400 }
13401 if (ccnt)
13402 io_xri_cmpl = 0;
13403
13404 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
13405 nvmet_xri_cmpl = list_empty(
13406 &phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
13407 }
13408 els_xri_cmpl =
13409 list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
13410
13411 }
13412 }
13413
13414 /**
13415 * lpfc_sli4_hba_unset - Unset the fcoe hba
13416 * @phba: Pointer to HBA context object.
13417 *
13418 * This function is called in the SLI4 code path to reset the HBA's FCoE
13419 * function. The caller is not required to hold any lock. This routine
13420 * issues PCI function reset mailbox command to reset the FCoE function.
13421 * At the end of the function, it calls lpfc_hba_down_post function to
13422 * free any pending commands.
13423 **/
13424 static void
lpfc_sli4_hba_unset(struct lpfc_hba * phba)13425 lpfc_sli4_hba_unset(struct lpfc_hba *phba)
13426 {
13427 int wait_cnt = 0;
13428 LPFC_MBOXQ_t *mboxq;
13429 struct pci_dev *pdev = phba->pcidev;
13430
13431 lpfc_stop_hba_timers(phba);
13432 hrtimer_cancel(&phba->cmf_stats_timer);
13433 hrtimer_cancel(&phba->cmf_timer);
13434
13435 if (phba->pport)
13436 phba->sli4_hba.intr_enable = 0;
13437
13438 /*
13439 * Gracefully wait out the potential current outstanding asynchronous
13440 * mailbox command.
13441 */
13442
13443 /* First, block any pending async mailbox command from posted */
13444 spin_lock_irq(&phba->hbalock);
13445 phba->sli.sli_flag |= LPFC_SLI_ASYNC_MBX_BLK;
13446 spin_unlock_irq(&phba->hbalock);
13447 /* Now, trying to wait it out if we can */
13448 while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
13449 msleep(10);
13450 if (++wait_cnt > LPFC_ACTIVE_MBOX_WAIT_CNT)
13451 break;
13452 }
13453 /* Forcefully release the outstanding mailbox command if timed out */
13454 if (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) {
13455 spin_lock_irq(&phba->hbalock);
13456 mboxq = phba->sli.mbox_active;
13457 mboxq->u.mb.mbxStatus = MBX_NOT_FINISHED;
13458 __lpfc_mbox_cmpl_put(phba, mboxq);
13459 phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
13460 phba->sli.mbox_active = NULL;
13461 spin_unlock_irq(&phba->hbalock);
13462 }
13463
13464 /* Abort all iocbs associated with the hba */
13465 lpfc_sli_hba_iocb_abort(phba);
13466
13467 if (!pci_channel_offline(phba->pcidev))
13468 /* Wait for completion of device XRI exchange busy */
13469 lpfc_sli4_xri_exchange_busy_wait(phba);
13470
13471 /* per-phba callback de-registration for hotplug event */
13472 if (phba->pport)
13473 lpfc_cpuhp_remove(phba);
13474
13475 /* Disable PCI subsystem interrupt */
13476 lpfc_sli4_disable_intr(phba);
13477
13478 /* Disable SR-IOV if enabled */
13479 if (phba->cfg_sriov_nr_virtfn)
13480 pci_disable_sriov(pdev);
13481
13482 /* Stop kthread signal shall trigger work_done one more time */
13483 kthread_stop(phba->worker_thread);
13484
13485 /* Disable FW logging to host memory */
13486 lpfc_ras_stop_fwlog(phba);
13487
13488 lpfc_sli4_queue_unset(phba);
13489
13490 /* Reset SLI4 HBA FCoE function */
13491 lpfc_pci_function_reset(phba);
13492
13493 /* release all queue allocated resources. */
13494 lpfc_sli4_queue_destroy(phba);
13495
13496 /* Free RAS DMA memory */
13497 if (phba->ras_fwlog.ras_enabled)
13498 lpfc_sli4_ras_dma_free(phba);
13499
13500 /* Stop the SLI4 device port */
13501 if (phba->pport)
13502 phba->pport->work_port_events = 0;
13503 }
13504
13505 static uint32_t
lpfc_cgn_crc32(uint32_t crc,u8 byte)13506 lpfc_cgn_crc32(uint32_t crc, u8 byte)
13507 {
13508 uint32_t msb = 0;
13509 uint32_t bit;
13510
13511 for (bit = 0; bit < 8; bit++) {
13512 msb = (crc >> 31) & 1;
13513 crc <<= 1;
13514
13515 if (msb ^ (byte & 1)) {
13516 crc ^= LPFC_CGN_CRC32_MAGIC_NUMBER;
13517 crc |= 1;
13518 }
13519 byte >>= 1;
13520 }
13521 return crc;
13522 }
13523
13524 static uint32_t
lpfc_cgn_reverse_bits(uint32_t wd)13525 lpfc_cgn_reverse_bits(uint32_t wd)
13526 {
13527 uint32_t result = 0;
13528 uint32_t i;
13529
13530 for (i = 0; i < 32; i++) {
13531 result <<= 1;
13532 result |= (1 & (wd >> i));
13533 }
13534 return result;
13535 }
13536
13537 /*
13538 * The routine corresponds with the algorithm the HBA firmware
13539 * uses to validate the data integrity.
13540 */
13541 uint32_t
lpfc_cgn_calc_crc32(void * ptr,uint32_t byteLen,uint32_t crc)13542 lpfc_cgn_calc_crc32(void *ptr, uint32_t byteLen, uint32_t crc)
13543 {
13544 uint32_t i;
13545 uint32_t result;
13546 uint8_t *data = (uint8_t *)ptr;
13547
13548 for (i = 0; i < byteLen; ++i)
13549 crc = lpfc_cgn_crc32(crc, data[i]);
13550
13551 result = ~lpfc_cgn_reverse_bits(crc);
13552 return result;
13553 }
13554
13555 void
lpfc_init_congestion_buf(struct lpfc_hba * phba)13556 lpfc_init_congestion_buf(struct lpfc_hba *phba)
13557 {
13558 struct lpfc_cgn_info *cp;
13559 uint16_t size;
13560 uint32_t crc;
13561
13562 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
13563 "6235 INIT Congestion Buffer %p\n", phba->cgn_i);
13564
13565 if (!phba->cgn_i)
13566 return;
13567 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt;
13568
13569 atomic_set(&phba->cgn_fabric_warn_cnt, 0);
13570 atomic_set(&phba->cgn_fabric_alarm_cnt, 0);
13571 atomic_set(&phba->cgn_sync_alarm_cnt, 0);
13572 atomic_set(&phba->cgn_sync_warn_cnt, 0);
13573
13574 atomic_set(&phba->cgn_driver_evt_cnt, 0);
13575 atomic_set(&phba->cgn_latency_evt_cnt, 0);
13576 atomic64_set(&phba->cgn_latency_evt, 0);
13577 phba->cgn_evt_minute = 0;
13578
13579 memset(cp, 0xff, offsetof(struct lpfc_cgn_info, cgn_stat));
13580 cp->cgn_info_size = cpu_to_le16(LPFC_CGN_INFO_SZ);
13581 cp->cgn_info_version = LPFC_CGN_INFO_V4;
13582
13583 /* cgn parameters */
13584 cp->cgn_info_mode = phba->cgn_p.cgn_param_mode;
13585 cp->cgn_info_level0 = phba->cgn_p.cgn_param_level0;
13586 cp->cgn_info_level1 = phba->cgn_p.cgn_param_level1;
13587 cp->cgn_info_level2 = phba->cgn_p.cgn_param_level2;
13588
13589 lpfc_cgn_update_tstamp(phba, &cp->base_time);
13590
13591 /* Fill in default LUN qdepth */
13592 if (phba->pport) {
13593 size = (uint16_t)(phba->pport->cfg_lun_queue_depth);
13594 cp->cgn_lunq = cpu_to_le16(size);
13595 }
13596
13597 /* last used Index initialized to 0xff already */
13598
13599 cp->cgn_warn_freq = cpu_to_le16(LPFC_FPIN_INIT_FREQ);
13600 cp->cgn_alarm_freq = cpu_to_le16(LPFC_FPIN_INIT_FREQ);
13601 crc = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ, LPFC_CGN_CRC32_SEED);
13602 cp->cgn_info_crc = cpu_to_le32(crc);
13603
13604 phba->cgn_evt_timestamp = jiffies +
13605 msecs_to_jiffies(LPFC_CGN_TIMER_TO_MIN);
13606 }
13607
13608 void
lpfc_init_congestion_stat(struct lpfc_hba * phba)13609 lpfc_init_congestion_stat(struct lpfc_hba *phba)
13610 {
13611 struct lpfc_cgn_info *cp;
13612 uint32_t crc;
13613
13614 lpfc_printf_log(phba, KERN_INFO, LOG_CGN_MGMT,
13615 "6236 INIT Congestion Stat %p\n", phba->cgn_i);
13616
13617 if (!phba->cgn_i)
13618 return;
13619
13620 cp = (struct lpfc_cgn_info *)phba->cgn_i->virt;
13621 memset(&cp->cgn_stat, 0, sizeof(cp->cgn_stat));
13622
13623 lpfc_cgn_update_tstamp(phba, &cp->stat_start);
13624 crc = lpfc_cgn_calc_crc32(cp, LPFC_CGN_INFO_SZ, LPFC_CGN_CRC32_SEED);
13625 cp->cgn_info_crc = cpu_to_le32(crc);
13626 }
13627
13628 /**
13629 * __lpfc_reg_congestion_buf - register congestion info buffer with HBA
13630 * @phba: Pointer to hba context object.
13631 * @reg: flag to determine register or unregister.
13632 */
13633 static int
__lpfc_reg_congestion_buf(struct lpfc_hba * phba,int reg)13634 __lpfc_reg_congestion_buf(struct lpfc_hba *phba, int reg)
13635 {
13636 struct lpfc_mbx_reg_congestion_buf *reg_congestion_buf;
13637 union lpfc_sli4_cfg_shdr *shdr;
13638 uint32_t shdr_status, shdr_add_status;
13639 LPFC_MBOXQ_t *mboxq;
13640 int length, rc;
13641
13642 if (!phba->cgn_i)
13643 return -ENXIO;
13644
13645 mboxq = mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
13646 if (!mboxq) {
13647 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX,
13648 "2641 REG_CONGESTION_BUF mbox allocation fail: "
13649 "HBA state x%x reg %d\n",
13650 phba->pport->port_state, reg);
13651 return -ENOMEM;
13652 }
13653
13654 length = (sizeof(struct lpfc_mbx_reg_congestion_buf) -
13655 sizeof(struct lpfc_sli4_cfg_mhdr));
13656 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
13657 LPFC_MBOX_OPCODE_REG_CONGESTION_BUF, length,
13658 LPFC_SLI4_MBX_EMBED);
13659 reg_congestion_buf = &mboxq->u.mqe.un.reg_congestion_buf;
13660 bf_set(lpfc_mbx_reg_cgn_buf_type, reg_congestion_buf, 1);
13661 if (reg > 0)
13662 bf_set(lpfc_mbx_reg_cgn_buf_cnt, reg_congestion_buf, 1);
13663 else
13664 bf_set(lpfc_mbx_reg_cgn_buf_cnt, reg_congestion_buf, 0);
13665 reg_congestion_buf->length = sizeof(struct lpfc_cgn_info);
13666 reg_congestion_buf->addr_lo =
13667 putPaddrLow(phba->cgn_i->phys);
13668 reg_congestion_buf->addr_hi =
13669 putPaddrHigh(phba->cgn_i->phys);
13670
13671 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
13672 shdr = (union lpfc_sli4_cfg_shdr *)
13673 &mboxq->u.mqe.un.sli4_config.header.cfg_shdr;
13674 shdr_status = bf_get(lpfc_mbox_hdr_status, &shdr->response);
13675 shdr_add_status = bf_get(lpfc_mbox_hdr_add_status,
13676 &shdr->response);
13677 mempool_free(mboxq, phba->mbox_mem_pool);
13678 if (shdr_status || shdr_add_status || rc) {
13679 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
13680 "2642 REG_CONGESTION_BUF mailbox "
13681 "failed with status x%x add_status x%x,"
13682 " mbx status x%x reg %d\n",
13683 shdr_status, shdr_add_status, rc, reg);
13684 return -ENXIO;
13685 }
13686 return 0;
13687 }
13688
13689 int
lpfc_unreg_congestion_buf(struct lpfc_hba * phba)13690 lpfc_unreg_congestion_buf(struct lpfc_hba *phba)
13691 {
13692 lpfc_cmf_stop(phba);
13693 return __lpfc_reg_congestion_buf(phba, 0);
13694 }
13695
13696 int
lpfc_reg_congestion_buf(struct lpfc_hba * phba)13697 lpfc_reg_congestion_buf(struct lpfc_hba *phba)
13698 {
13699 return __lpfc_reg_congestion_buf(phba, 1);
13700 }
13701
13702 /**
13703 * lpfc_get_sli4_parameters - Get the SLI4 Config PARAMETERS.
13704 * @phba: Pointer to HBA context object.
13705 * @mboxq: Pointer to the mailboxq memory for the mailbox command response.
13706 *
13707 * This function is called in the SLI4 code path to read the port's
13708 * sli4 capabilities.
13709 *
13710 * This function may be be called from any context that can block-wait
13711 * for the completion. The expectation is that this routine is called
13712 * typically from probe_one or from the online routine.
13713 **/
13714 int
lpfc_get_sli4_parameters(struct lpfc_hba * phba,LPFC_MBOXQ_t * mboxq)13715 lpfc_get_sli4_parameters(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
13716 {
13717 int rc;
13718 struct lpfc_mqe *mqe = &mboxq->u.mqe;
13719 struct lpfc_pc_sli4_params *sli4_params;
13720 uint32_t mbox_tmo;
13721 int length;
13722 bool exp_wqcq_pages = true;
13723 struct lpfc_sli4_parameters *mbx_sli4_parameters;
13724
13725 /*
13726 * By default, the driver assumes the SLI4 port requires RPI
13727 * header postings. The SLI4_PARAM response will correct this
13728 * assumption.
13729 */
13730 phba->sli4_hba.rpi_hdrs_in_use = 1;
13731
13732 /* Read the port's SLI4 Config Parameters */
13733 length = (sizeof(struct lpfc_mbx_get_sli4_parameters) -
13734 sizeof(struct lpfc_sli4_cfg_mhdr));
13735 lpfc_sli4_config(phba, mboxq, LPFC_MBOX_SUBSYSTEM_COMMON,
13736 LPFC_MBOX_OPCODE_GET_SLI4_PARAMETERS,
13737 length, LPFC_SLI4_MBX_EMBED);
13738 if (!phba->sli4_hba.intr_enable)
13739 rc = lpfc_sli_issue_mbox(phba, mboxq, MBX_POLL);
13740 else {
13741 mbox_tmo = lpfc_mbox_tmo_val(phba, mboxq);
13742 rc = lpfc_sli_issue_mbox_wait(phba, mboxq, mbox_tmo);
13743 }
13744 if (unlikely(rc))
13745 return rc;
13746 sli4_params = &phba->sli4_hba.pc_sli4_params;
13747 mbx_sli4_parameters = &mqe->un.get_sli4_parameters.sli4_parameters;
13748 sli4_params->if_type = bf_get(cfg_if_type, mbx_sli4_parameters);
13749 sli4_params->sli_rev = bf_get(cfg_sli_rev, mbx_sli4_parameters);
13750 sli4_params->sli_family = bf_get(cfg_sli_family, mbx_sli4_parameters);
13751 sli4_params->featurelevel_1 = bf_get(cfg_sli_hint_1,
13752 mbx_sli4_parameters);
13753 sli4_params->featurelevel_2 = bf_get(cfg_sli_hint_2,
13754 mbx_sli4_parameters);
13755 if (bf_get(cfg_phwq, mbx_sli4_parameters))
13756 phba->sli3_options |= LPFC_SLI4_PHWQ_ENABLED;
13757 else
13758 phba->sli3_options &= ~LPFC_SLI4_PHWQ_ENABLED;
13759 sli4_params->sge_supp_len = mbx_sli4_parameters->sge_supp_len;
13760 sli4_params->loopbk_scope = bf_get(cfg_loopbk_scope,
13761 mbx_sli4_parameters);
13762 sli4_params->oas_supported = bf_get(cfg_oas, mbx_sli4_parameters);
13763 sli4_params->cqv = bf_get(cfg_cqv, mbx_sli4_parameters);
13764 sli4_params->mqv = bf_get(cfg_mqv, mbx_sli4_parameters);
13765 sli4_params->wqv = bf_get(cfg_wqv, mbx_sli4_parameters);
13766 sli4_params->rqv = bf_get(cfg_rqv, mbx_sli4_parameters);
13767 sli4_params->eqav = bf_get(cfg_eqav, mbx_sli4_parameters);
13768 sli4_params->cqav = bf_get(cfg_cqav, mbx_sli4_parameters);
13769 sli4_params->wqsize = bf_get(cfg_wqsize, mbx_sli4_parameters);
13770 sli4_params->bv1s = bf_get(cfg_bv1s, mbx_sli4_parameters);
13771 sli4_params->pls = bf_get(cfg_pvl, mbx_sli4_parameters);
13772 sli4_params->sgl_pages_max = bf_get(cfg_sgl_page_cnt,
13773 mbx_sli4_parameters);
13774 sli4_params->wqpcnt = bf_get(cfg_wqpcnt, mbx_sli4_parameters);
13775 sli4_params->sgl_pp_align = bf_get(cfg_sgl_pp_align,
13776 mbx_sli4_parameters);
13777 phba->sli4_hba.extents_in_use = bf_get(cfg_ext, mbx_sli4_parameters);
13778 phba->sli4_hba.rpi_hdrs_in_use = bf_get(cfg_hdrr, mbx_sli4_parameters);
13779 sli4_params->mi_cap = bf_get(cfg_mi_ver, mbx_sli4_parameters);
13780
13781 /* Check for Extended Pre-Registered SGL support */
13782 phba->cfg_xpsgl = bf_get(cfg_xpsgl, mbx_sli4_parameters);
13783
13784 /* Check for firmware nvme support */
13785 rc = (bf_get(cfg_nvme, mbx_sli4_parameters) &&
13786 bf_get(cfg_xib, mbx_sli4_parameters));
13787
13788 if (rc) {
13789 /* Save this to indicate the Firmware supports NVME */
13790 sli4_params->nvme = 1;
13791
13792 /* Firmware NVME support, check driver FC4 NVME support */
13793 if (phba->cfg_enable_fc4_type == LPFC_ENABLE_FCP) {
13794 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME,
13795 "6133 Disabling NVME support: "
13796 "FC4 type not supported: x%x\n",
13797 phba->cfg_enable_fc4_type);
13798 goto fcponly;
13799 }
13800 } else {
13801 /* No firmware NVME support, check driver FC4 NVME support */
13802 sli4_params->nvme = 0;
13803 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
13804 lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_NVME,
13805 "6101 Disabling NVME support: Not "
13806 "supported by firmware (%d %d) x%x\n",
13807 bf_get(cfg_nvme, mbx_sli4_parameters),
13808 bf_get(cfg_xib, mbx_sli4_parameters),
13809 phba->cfg_enable_fc4_type);
13810 fcponly:
13811 phba->nvmet_support = 0;
13812 phba->cfg_nvmet_mrq = 0;
13813 phba->cfg_nvme_seg_cnt = 0;
13814
13815 /* If no FC4 type support, move to just SCSI support */
13816 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP))
13817 return -ENODEV;
13818 phba->cfg_enable_fc4_type = LPFC_ENABLE_FCP;
13819 }
13820 }
13821
13822 /* If the NVME FC4 type is enabled, scale the sg_seg_cnt to
13823 * accommodate 512K and 1M IOs in a single nvme buf.
13824 */
13825 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)
13826 phba->cfg_sg_seg_cnt = LPFC_MAX_NVME_SEG_CNT;
13827
13828 /* Enable embedded Payload BDE if support is indicated */
13829 if (bf_get(cfg_pbde, mbx_sli4_parameters))
13830 phba->cfg_enable_pbde = 1;
13831 else
13832 phba->cfg_enable_pbde = 0;
13833
13834 /*
13835 * To support Suppress Response feature we must satisfy 3 conditions.
13836 * lpfc_suppress_rsp module parameter must be set (default).
13837 * In SLI4-Parameters Descriptor:
13838 * Extended Inline Buffers (XIB) must be supported.
13839 * Suppress Response IU Not Supported (SRIUNS) must NOT be supported
13840 * (double negative).
13841 */
13842 if (phba->cfg_suppress_rsp && bf_get(cfg_xib, mbx_sli4_parameters) &&
13843 !(bf_get(cfg_nosr, mbx_sli4_parameters)))
13844 phba->sli.sli_flag |= LPFC_SLI_SUPPRESS_RSP;
13845 else
13846 phba->cfg_suppress_rsp = 0;
13847
13848 if (bf_get(cfg_eqdr, mbx_sli4_parameters))
13849 phba->sli.sli_flag |= LPFC_SLI_USE_EQDR;
13850
13851 /* Make sure that sge_supp_len can be handled by the driver */
13852 if (sli4_params->sge_supp_len > LPFC_MAX_SGE_SIZE)
13853 sli4_params->sge_supp_len = LPFC_MAX_SGE_SIZE;
13854
13855 dma_set_max_seg_size(&phba->pcidev->dev, sli4_params->sge_supp_len);
13856
13857 /*
13858 * Check whether the adapter supports an embedded copy of the
13859 * FCP CMD IU within the WQE for FCP_Ixxx commands. In order
13860 * to use this option, 128-byte WQEs must be used.
13861 */
13862 if (bf_get(cfg_ext_embed_cb, mbx_sli4_parameters))
13863 phba->fcp_embed_io = 1;
13864 else
13865 phba->fcp_embed_io = 0;
13866
13867 lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_NVME,
13868 "6422 XIB %d PBDE %d: FCP %d NVME %d %d %d\n",
13869 bf_get(cfg_xib, mbx_sli4_parameters),
13870 phba->cfg_enable_pbde,
13871 phba->fcp_embed_io, sli4_params->nvme,
13872 phba->cfg_nvme_embed_cmd, phba->cfg_suppress_rsp);
13873
13874 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
13875 LPFC_SLI_INTF_IF_TYPE_2) &&
13876 (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) ==
13877 LPFC_SLI_INTF_FAMILY_LNCR_A0))
13878 exp_wqcq_pages = false;
13879
13880 if ((bf_get(cfg_cqpsize, mbx_sli4_parameters) & LPFC_CQ_16K_PAGE_SZ) &&
13881 (bf_get(cfg_wqpsize, mbx_sli4_parameters) & LPFC_WQ_16K_PAGE_SZ) &&
13882 exp_wqcq_pages &&
13883 (sli4_params->wqsize & LPFC_WQ_SZ128_SUPPORT))
13884 phba->enab_exp_wqcq_pages = 1;
13885 else
13886 phba->enab_exp_wqcq_pages = 0;
13887 /*
13888 * Check if the SLI port supports MDS Diagnostics
13889 */
13890 if (bf_get(cfg_mds_diags, mbx_sli4_parameters))
13891 phba->mds_diags_support = 1;
13892 else
13893 phba->mds_diags_support = 0;
13894
13895 /*
13896 * Check if the SLI port supports NSLER
13897 */
13898 if (bf_get(cfg_nsler, mbx_sli4_parameters))
13899 phba->nsler = 1;
13900 else
13901 phba->nsler = 0;
13902
13903 return 0;
13904 }
13905
13906 /**
13907 * lpfc_pci_probe_one_s3 - PCI probe func to reg SLI-3 device to PCI subsystem.
13908 * @pdev: pointer to PCI device
13909 * @pid: pointer to PCI device identifier
13910 *
13911 * This routine is to be called to attach a device with SLI-3 interface spec
13912 * to the PCI subsystem. When an Emulex HBA with SLI-3 interface spec is
13913 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific
13914 * information of the device and driver to see if the driver state that it can
13915 * support this kind of device. If the match is successful, the driver core
13916 * invokes this routine. If this routine determines it can claim the HBA, it
13917 * does all the initialization that it needs to do to handle the HBA properly.
13918 *
13919 * Return code
13920 * 0 - driver can claim the device
13921 * negative value - driver can not claim the device
13922 **/
13923 static int
lpfc_pci_probe_one_s3(struct pci_dev * pdev,const struct pci_device_id * pid)13924 lpfc_pci_probe_one_s3(struct pci_dev *pdev, const struct pci_device_id *pid)
13925 {
13926 struct lpfc_hba *phba;
13927 struct lpfc_vport *vport = NULL;
13928 struct Scsi_Host *shost = NULL;
13929 int error;
13930 uint32_t cfg_mode, intr_mode;
13931
13932 /* Allocate memory for HBA structure */
13933 phba = lpfc_hba_alloc(pdev);
13934 if (!phba)
13935 return -ENOMEM;
13936
13937 /* Perform generic PCI device enabling operation */
13938 error = lpfc_enable_pci_dev(phba);
13939 if (error)
13940 goto out_free_phba;
13941
13942 /* Set up SLI API function jump table for PCI-device group-0 HBAs */
13943 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_LP);
13944 if (error)
13945 goto out_disable_pci_dev;
13946
13947 /* Set up SLI-3 specific device PCI memory space */
13948 error = lpfc_sli_pci_mem_setup(phba);
13949 if (error) {
13950 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
13951 "1402 Failed to set up pci memory space.\n");
13952 goto out_disable_pci_dev;
13953 }
13954
13955 /* Set up SLI-3 specific device driver resources */
13956 error = lpfc_sli_driver_resource_setup(phba);
13957 if (error) {
13958 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
13959 "1404 Failed to set up driver resource.\n");
13960 goto out_unset_pci_mem_s3;
13961 }
13962
13963 /* Initialize and populate the iocb list per host */
13964
13965 error = lpfc_init_iocb_list(phba, LPFC_IOCB_LIST_CNT);
13966 if (error) {
13967 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
13968 "1405 Failed to initialize iocb list.\n");
13969 goto out_unset_driver_resource_s3;
13970 }
13971
13972 /* Set up common device driver resources */
13973 error = lpfc_setup_driver_resource_phase2(phba);
13974 if (error) {
13975 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
13976 "1406 Failed to set up driver resource.\n");
13977 goto out_free_iocb_list;
13978 }
13979
13980 /* Get the default values for Model Name and Description */
13981 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
13982
13983 /* Create SCSI host to the physical port */
13984 error = lpfc_create_shost(phba);
13985 if (error) {
13986 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
13987 "1407 Failed to create scsi host.\n");
13988 goto out_unset_driver_resource;
13989 }
13990
13991 /* Configure sysfs attributes */
13992 vport = phba->pport;
13993 error = lpfc_alloc_sysfs_attr(vport);
13994 if (error) {
13995 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
13996 "1476 Failed to allocate sysfs attr\n");
13997 goto out_destroy_shost;
13998 }
13999
14000 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */
14001 /* Now, trying to enable interrupt and bring up the device */
14002 cfg_mode = phba->cfg_use_msi;
14003 while (true) {
14004 /* Put device to a known state before enabling interrupt */
14005 lpfc_stop_port(phba);
14006 /* Configure and enable interrupt */
14007 intr_mode = lpfc_sli_enable_intr(phba, cfg_mode);
14008 if (intr_mode == LPFC_INTR_ERROR) {
14009 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14010 "0431 Failed to enable interrupt.\n");
14011 error = -ENODEV;
14012 goto out_free_sysfs_attr;
14013 }
14014 /* SLI-3 HBA setup */
14015 if (lpfc_sli_hba_setup(phba)) {
14016 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14017 "1477 Failed to set up hba\n");
14018 error = -ENODEV;
14019 goto out_remove_device;
14020 }
14021
14022 /* Wait 50ms for the interrupts of previous mailbox commands */
14023 msleep(50);
14024 /* Check active interrupts on message signaled interrupts */
14025 if (intr_mode == 0 ||
14026 phba->sli.slistat.sli_intr > LPFC_MSIX_VECTORS) {
14027 /* Log the current active interrupt mode */
14028 phba->intr_mode = intr_mode;
14029 lpfc_log_intr_mode(phba, intr_mode);
14030 break;
14031 } else {
14032 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
14033 "0447 Configure interrupt mode (%d) "
14034 "failed active interrupt test.\n",
14035 intr_mode);
14036 /* Disable the current interrupt mode */
14037 lpfc_sli_disable_intr(phba);
14038 /* Try next level of interrupt mode */
14039 cfg_mode = --intr_mode;
14040 }
14041 }
14042
14043 /* Perform post initialization setup */
14044 lpfc_post_init_setup(phba);
14045
14046 /* Check if there are static vports to be created. */
14047 lpfc_create_static_vport(phba);
14048
14049 return 0;
14050
14051 out_remove_device:
14052 lpfc_unset_hba(phba);
14053 out_free_sysfs_attr:
14054 lpfc_free_sysfs_attr(vport);
14055 out_destroy_shost:
14056 lpfc_destroy_shost(phba);
14057 out_unset_driver_resource:
14058 lpfc_unset_driver_resource_phase2(phba);
14059 out_free_iocb_list:
14060 lpfc_free_iocb_list(phba);
14061 out_unset_driver_resource_s3:
14062 lpfc_sli_driver_resource_unset(phba);
14063 out_unset_pci_mem_s3:
14064 lpfc_sli_pci_mem_unset(phba);
14065 out_disable_pci_dev:
14066 lpfc_disable_pci_dev(phba);
14067 if (shost)
14068 scsi_host_put(shost);
14069 out_free_phba:
14070 lpfc_hba_free(phba);
14071 return error;
14072 }
14073
14074 /**
14075 * lpfc_pci_remove_one_s3 - PCI func to unreg SLI-3 device from PCI subsystem.
14076 * @pdev: pointer to PCI device
14077 *
14078 * This routine is to be called to disattach a device with SLI-3 interface
14079 * spec from PCI subsystem. When an Emulex HBA with SLI-3 interface spec is
14080 * removed from PCI bus, it performs all the necessary cleanup for the HBA
14081 * device to be removed from the PCI subsystem properly.
14082 **/
14083 static void
lpfc_pci_remove_one_s3(struct pci_dev * pdev)14084 lpfc_pci_remove_one_s3(struct pci_dev *pdev)
14085 {
14086 struct Scsi_Host *shost = pci_get_drvdata(pdev);
14087 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
14088 struct lpfc_vport **vports;
14089 struct lpfc_hba *phba = vport->phba;
14090 int i;
14091
14092 set_bit(FC_UNLOADING, &vport->load_flag);
14093
14094 lpfc_free_sysfs_attr(vport);
14095
14096 /* Release all the vports against this physical port */
14097 vports = lpfc_create_vport_work_array(phba);
14098 if (vports != NULL)
14099 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
14100 if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
14101 continue;
14102 fc_vport_terminate(vports[i]->fc_vport);
14103 }
14104 lpfc_destroy_vport_work_array(phba, vports);
14105
14106 /* Remove FC host with the physical port */
14107 fc_remove_host(shost);
14108 scsi_remove_host(shost);
14109
14110 /* Clean up all nodes, mailboxes and IOs. */
14111 lpfc_cleanup(vport);
14112
14113 /*
14114 * Bring down the SLI Layer. This step disable all interrupts,
14115 * clears the rings, discards all mailbox commands, and resets
14116 * the HBA.
14117 */
14118
14119 /* HBA interrupt will be disabled after this call */
14120 lpfc_sli_hba_down(phba);
14121 /* Stop kthread signal shall trigger work_done one more time */
14122 kthread_stop(phba->worker_thread);
14123 /* Final cleanup of txcmplq and reset the HBA */
14124 lpfc_sli_brdrestart(phba);
14125
14126 kfree(phba->vpi_bmask);
14127 kfree(phba->vpi_ids);
14128
14129 lpfc_stop_hba_timers(phba);
14130 spin_lock_irq(&phba->port_list_lock);
14131 list_del_init(&vport->listentry);
14132 spin_unlock_irq(&phba->port_list_lock);
14133
14134 lpfc_debugfs_terminate(vport);
14135
14136 /* Disable SR-IOV if enabled */
14137 if (phba->cfg_sriov_nr_virtfn)
14138 pci_disable_sriov(pdev);
14139
14140 /* Disable interrupt */
14141 lpfc_sli_disable_intr(phba);
14142
14143 scsi_host_put(shost);
14144
14145 /*
14146 * Call scsi_free before mem_free since scsi bufs are released to their
14147 * corresponding pools here.
14148 */
14149 lpfc_scsi_free(phba);
14150 lpfc_free_iocb_list(phba);
14151
14152 lpfc_mem_free_all(phba);
14153
14154 dma_free_coherent(&pdev->dev, lpfc_sli_hbq_size(),
14155 phba->hbqslimp.virt, phba->hbqslimp.phys);
14156
14157 /* Free resources associated with SLI2 interface */
14158 dma_free_coherent(&pdev->dev, SLI2_SLIM_SIZE,
14159 phba->slim2p.virt, phba->slim2p.phys);
14160
14161 /* unmap adapter SLIM and Control Registers */
14162 iounmap(phba->ctrl_regs_memmap_p);
14163 iounmap(phba->slim_memmap_p);
14164
14165 lpfc_hba_free(phba);
14166
14167 pci_release_mem_regions(pdev);
14168 pci_disable_device(pdev);
14169 }
14170
14171 /**
14172 * lpfc_pci_suspend_one_s3 - PCI func to suspend SLI-3 device for power mgmnt
14173 * @dev_d: pointer to device
14174 *
14175 * This routine is to be called from the kernel's PCI subsystem to support
14176 * system Power Management (PM) to device with SLI-3 interface spec. When
14177 * PM invokes this method, it quiesces the device by stopping the driver's
14178 * worker thread for the device, turning off device's interrupt and DMA,
14179 * and bring the device offline. Note that as the driver implements the
14180 * minimum PM requirements to a power-aware driver's PM support for the
14181 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE)
14182 * to the suspend() method call will be treated as SUSPEND and the driver will
14183 * fully reinitialize its device during resume() method call, the driver will
14184 * set device to PCI_D3hot state in PCI config space instead of setting it
14185 * according to the @msg provided by the PM.
14186 *
14187 * Return code
14188 * 0 - driver suspended the device
14189 * Error otherwise
14190 **/
14191 static int __maybe_unused
lpfc_pci_suspend_one_s3(struct device * dev_d)14192 lpfc_pci_suspend_one_s3(struct device *dev_d)
14193 {
14194 struct Scsi_Host *shost = dev_get_drvdata(dev_d);
14195 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
14196
14197 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
14198 "0473 PCI device Power Management suspend.\n");
14199
14200 /* Bring down the device */
14201 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
14202 lpfc_offline(phba);
14203 kthread_stop(phba->worker_thread);
14204
14205 /* Disable interrupt from device */
14206 lpfc_sli_disable_intr(phba);
14207
14208 return 0;
14209 }
14210
14211 /**
14212 * lpfc_pci_resume_one_s3 - PCI func to resume SLI-3 device for power mgmnt
14213 * @dev_d: pointer to device
14214 *
14215 * This routine is to be called from the kernel's PCI subsystem to support
14216 * system Power Management (PM) to device with SLI-3 interface spec. When PM
14217 * invokes this method, it restores the device's PCI config space state and
14218 * fully reinitializes the device and brings it online. Note that as the
14219 * driver implements the minimum PM requirements to a power-aware driver's
14220 * PM for suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE,
14221 * FREEZE) to the suspend() method call will be treated as SUSPEND and the
14222 * driver will fully reinitialize its device during resume() method call,
14223 * the device will be set to PCI_D0 directly in PCI config space before
14224 * restoring the state.
14225 *
14226 * Return code
14227 * 0 - driver suspended the device
14228 * Error otherwise
14229 **/
14230 static int __maybe_unused
lpfc_pci_resume_one_s3(struct device * dev_d)14231 lpfc_pci_resume_one_s3(struct device *dev_d)
14232 {
14233 struct Scsi_Host *shost = dev_get_drvdata(dev_d);
14234 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
14235 uint32_t intr_mode;
14236 int error;
14237
14238 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
14239 "0452 PCI device Power Management resume.\n");
14240
14241 /* Startup the kernel thread for this host adapter. */
14242 phba->worker_thread = kthread_run(lpfc_do_work, phba,
14243 "lpfc_worker_%d", phba->brd_no);
14244 if (IS_ERR(phba->worker_thread)) {
14245 error = PTR_ERR(phba->worker_thread);
14246 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14247 "0434 PM resume failed to start worker "
14248 "thread: error=x%x.\n", error);
14249 return error;
14250 }
14251
14252 /* Init cpu_map array */
14253 lpfc_cpu_map_array_init(phba);
14254 /* Init hba_eq_hdl array */
14255 lpfc_hba_eq_hdl_array_init(phba);
14256 /* Configure and enable interrupt */
14257 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
14258 if (intr_mode == LPFC_INTR_ERROR) {
14259 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14260 "0430 PM resume Failed to enable interrupt\n");
14261 return -EIO;
14262 } else
14263 phba->intr_mode = intr_mode;
14264
14265 /* Restart HBA and bring it online */
14266 lpfc_sli_brdrestart(phba);
14267 lpfc_online(phba);
14268
14269 /* Log the current active interrupt mode */
14270 lpfc_log_intr_mode(phba, phba->intr_mode);
14271
14272 return 0;
14273 }
14274
14275 /**
14276 * lpfc_sli_prep_dev_for_recover - Prepare SLI3 device for pci slot recover
14277 * @phba: pointer to lpfc hba data structure.
14278 *
14279 * This routine is called to prepare the SLI3 device for PCI slot recover. It
14280 * aborts all the outstanding SCSI I/Os to the pci device.
14281 **/
14282 static void
lpfc_sli_prep_dev_for_recover(struct lpfc_hba * phba)14283 lpfc_sli_prep_dev_for_recover(struct lpfc_hba *phba)
14284 {
14285 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14286 "2723 PCI channel I/O abort preparing for recovery\n");
14287
14288 /*
14289 * There may be errored I/Os through HBA, abort all I/Os on txcmplq
14290 * and let the SCSI mid-layer to retry them to recover.
14291 */
14292 lpfc_sli_abort_fcp_rings(phba);
14293 }
14294
14295 /**
14296 * lpfc_sli_prep_dev_for_reset - Prepare SLI3 device for pci slot reset
14297 * @phba: pointer to lpfc hba data structure.
14298 *
14299 * This routine is called to prepare the SLI3 device for PCI slot reset. It
14300 * disables the device interrupt and pci device, and aborts the internal FCP
14301 * pending I/Os.
14302 **/
14303 static void
lpfc_sli_prep_dev_for_reset(struct lpfc_hba * phba)14304 lpfc_sli_prep_dev_for_reset(struct lpfc_hba *phba)
14305 {
14306 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14307 "2710 PCI channel disable preparing for reset\n");
14308
14309 /* Block any management I/Os to the device */
14310 lpfc_block_mgmt_io(phba, LPFC_MBX_WAIT);
14311
14312 /* Block all SCSI devices' I/Os on the host */
14313 lpfc_scsi_dev_block(phba);
14314
14315 /* Flush all driver's outstanding SCSI I/Os as we are to reset */
14316 lpfc_sli_flush_io_rings(phba);
14317
14318 /* stop all timers */
14319 lpfc_stop_hba_timers(phba);
14320
14321 /* Disable interrupt and pci device */
14322 lpfc_sli_disable_intr(phba);
14323 pci_disable_device(phba->pcidev);
14324 }
14325
14326 /**
14327 * lpfc_sli_prep_dev_for_perm_failure - Prepare SLI3 dev for pci slot disable
14328 * @phba: pointer to lpfc hba data structure.
14329 *
14330 * This routine is called to prepare the SLI3 device for PCI slot permanently
14331 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP
14332 * pending I/Os.
14333 **/
14334 static void
lpfc_sli_prep_dev_for_perm_failure(struct lpfc_hba * phba)14335 lpfc_sli_prep_dev_for_perm_failure(struct lpfc_hba *phba)
14336 {
14337 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14338 "2711 PCI channel permanent disable for failure\n");
14339 /* Block all SCSI devices' I/Os on the host */
14340 lpfc_scsi_dev_block(phba);
14341 lpfc_sli4_prep_dev_for_reset(phba);
14342
14343 /* stop all timers */
14344 lpfc_stop_hba_timers(phba);
14345
14346 /* Clean up all driver's outstanding SCSI I/Os */
14347 lpfc_sli_flush_io_rings(phba);
14348 }
14349
14350 /**
14351 * lpfc_io_error_detected_s3 - Method for handling SLI-3 device PCI I/O error
14352 * @pdev: pointer to PCI device.
14353 * @state: the current PCI connection state.
14354 *
14355 * This routine is called from the PCI subsystem for I/O error handling to
14356 * device with SLI-3 interface spec. This function is called by the PCI
14357 * subsystem after a PCI bus error affecting this device has been detected.
14358 * When this function is invoked, it will need to stop all the I/Os and
14359 * interrupt(s) to the device. Once that is done, it will return
14360 * PCI_ERS_RESULT_NEED_RESET for the PCI subsystem to perform proper recovery
14361 * as desired.
14362 *
14363 * Return codes
14364 * PCI_ERS_RESULT_CAN_RECOVER - can be recovered without reset
14365 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
14366 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
14367 **/
14368 static pci_ers_result_t
lpfc_io_error_detected_s3(struct pci_dev * pdev,pci_channel_state_t state)14369 lpfc_io_error_detected_s3(struct pci_dev *pdev, pci_channel_state_t state)
14370 {
14371 struct Scsi_Host *shost = pci_get_drvdata(pdev);
14372 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
14373
14374 switch (state) {
14375 case pci_channel_io_normal:
14376 /* Non-fatal error, prepare for recovery */
14377 lpfc_sli_prep_dev_for_recover(phba);
14378 return PCI_ERS_RESULT_CAN_RECOVER;
14379 case pci_channel_io_frozen:
14380 /* Fatal error, prepare for slot reset */
14381 lpfc_sli_prep_dev_for_reset(phba);
14382 return PCI_ERS_RESULT_NEED_RESET;
14383 case pci_channel_io_perm_failure:
14384 /* Permanent failure, prepare for device down */
14385 lpfc_sli_prep_dev_for_perm_failure(phba);
14386 return PCI_ERS_RESULT_DISCONNECT;
14387 default:
14388 /* Unknown state, prepare and request slot reset */
14389 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14390 "0472 Unknown PCI error state: x%x\n", state);
14391 lpfc_sli_prep_dev_for_reset(phba);
14392 return PCI_ERS_RESULT_NEED_RESET;
14393 }
14394 }
14395
14396 /**
14397 * lpfc_io_slot_reset_s3 - Method for restarting PCI SLI-3 device from scratch.
14398 * @pdev: pointer to PCI device.
14399 *
14400 * This routine is called from the PCI subsystem for error handling to
14401 * device with SLI-3 interface spec. This is called after PCI bus has been
14402 * reset to restart the PCI card from scratch, as if from a cold-boot.
14403 * During the PCI subsystem error recovery, after driver returns
14404 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error
14405 * recovery and then call this routine before calling the .resume method
14406 * to recover the device. This function will initialize the HBA device,
14407 * enable the interrupt, but it will just put the HBA to offline state
14408 * without passing any I/O traffic.
14409 *
14410 * Return codes
14411 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
14412 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
14413 */
14414 static pci_ers_result_t
lpfc_io_slot_reset_s3(struct pci_dev * pdev)14415 lpfc_io_slot_reset_s3(struct pci_dev *pdev)
14416 {
14417 struct Scsi_Host *shost = pci_get_drvdata(pdev);
14418 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
14419 struct lpfc_sli *psli = &phba->sli;
14420 uint32_t intr_mode;
14421
14422 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
14423 if (pci_enable_device_mem(pdev)) {
14424 printk(KERN_ERR "lpfc: Cannot re-enable "
14425 "PCI device after reset.\n");
14426 return PCI_ERS_RESULT_DISCONNECT;
14427 }
14428
14429 pci_restore_state(pdev);
14430
14431 if (pdev->is_busmaster)
14432 pci_set_master(pdev);
14433
14434 spin_lock_irq(&phba->hbalock);
14435 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
14436 spin_unlock_irq(&phba->hbalock);
14437
14438 /* Configure and enable interrupt */
14439 intr_mode = lpfc_sli_enable_intr(phba, phba->intr_mode);
14440 if (intr_mode == LPFC_INTR_ERROR) {
14441 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14442 "0427 Cannot re-enable interrupt after "
14443 "slot reset.\n");
14444 return PCI_ERS_RESULT_DISCONNECT;
14445 } else
14446 phba->intr_mode = intr_mode;
14447
14448 /* Take device offline, it will perform cleanup */
14449 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
14450 lpfc_offline(phba);
14451 lpfc_sli_brdrestart(phba);
14452
14453 /* Log the current active interrupt mode */
14454 lpfc_log_intr_mode(phba, phba->intr_mode);
14455
14456 return PCI_ERS_RESULT_RECOVERED;
14457 }
14458
14459 /**
14460 * lpfc_io_resume_s3 - Method for resuming PCI I/O operation on SLI-3 device.
14461 * @pdev: pointer to PCI device
14462 *
14463 * This routine is called from the PCI subsystem for error handling to device
14464 * with SLI-3 interface spec. It is called when kernel error recovery tells
14465 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus
14466 * error recovery. After this call, traffic can start to flow from this device
14467 * again.
14468 */
14469 static void
lpfc_io_resume_s3(struct pci_dev * pdev)14470 lpfc_io_resume_s3(struct pci_dev *pdev)
14471 {
14472 struct Scsi_Host *shost = pci_get_drvdata(pdev);
14473 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
14474
14475 /* Bring device online, it will be no-op for non-fatal error resume */
14476 lpfc_online(phba);
14477 }
14478
14479 /**
14480 * lpfc_sli4_get_els_iocb_cnt - Calculate the # of ELS IOCBs to reserve
14481 * @phba: pointer to lpfc hba data structure.
14482 *
14483 * returns the number of ELS/CT IOCBs to reserve
14484 **/
14485 int
lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba * phba)14486 lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *phba)
14487 {
14488 int max_xri = phba->sli4_hba.max_cfg_param.max_xri;
14489
14490 if (phba->sli_rev == LPFC_SLI_REV4) {
14491 if (max_xri <= 100)
14492 return 10;
14493 else if (max_xri <= 256)
14494 return 25;
14495 else if (max_xri <= 512)
14496 return 50;
14497 else if (max_xri <= 1024)
14498 return 100;
14499 else if (max_xri <= 1536)
14500 return 150;
14501 else if (max_xri <= 2048)
14502 return 200;
14503 else
14504 return 250;
14505 } else
14506 return 0;
14507 }
14508
14509 /**
14510 * lpfc_sli4_get_iocb_cnt - Calculate the # of total IOCBs to reserve
14511 * @phba: pointer to lpfc hba data structure.
14512 *
14513 * returns the number of ELS/CT + NVMET IOCBs to reserve
14514 **/
14515 int
lpfc_sli4_get_iocb_cnt(struct lpfc_hba * phba)14516 lpfc_sli4_get_iocb_cnt(struct lpfc_hba *phba)
14517 {
14518 int max_xri = lpfc_sli4_get_els_iocb_cnt(phba);
14519
14520 if (phba->nvmet_support)
14521 max_xri += LPFC_NVMET_BUF_POST;
14522 return max_xri;
14523 }
14524
14525
14526 static int
lpfc_log_write_firmware_error(struct lpfc_hba * phba,uint32_t offset,uint32_t magic_number,uint32_t ftype,uint32_t fid,uint32_t fsize,const struct firmware * fw)14527 lpfc_log_write_firmware_error(struct lpfc_hba *phba, uint32_t offset,
14528 uint32_t magic_number, uint32_t ftype, uint32_t fid, uint32_t fsize,
14529 const struct firmware *fw)
14530 {
14531 int rc;
14532 u8 sli_family;
14533
14534 sli_family = bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf);
14535 /* Three cases: (1) FW was not supported on the detected adapter.
14536 * (2) FW update has been locked out administratively.
14537 * (3) Some other error during FW update.
14538 * In each case, an unmaskable message is written to the console
14539 * for admin diagnosis.
14540 */
14541 if (offset == ADD_STATUS_FW_NOT_SUPPORTED ||
14542 (sli_family == LPFC_SLI_INTF_FAMILY_G6 &&
14543 magic_number != MAGIC_NUMBER_G6) ||
14544 (sli_family == LPFC_SLI_INTF_FAMILY_G7 &&
14545 magic_number != MAGIC_NUMBER_G7) ||
14546 (sli_family == LPFC_SLI_INTF_FAMILY_G7P &&
14547 magic_number != MAGIC_NUMBER_G7P)) {
14548 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14549 "3030 This firmware version is not supported on"
14550 " this HBA model. Device:%x Magic:%x Type:%x "
14551 "ID:%x Size %d %zd\n",
14552 phba->pcidev->device, magic_number, ftype, fid,
14553 fsize, fw->size);
14554 rc = -EINVAL;
14555 } else if (offset == ADD_STATUS_FW_DOWNLOAD_HW_DISABLED) {
14556 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14557 "3021 Firmware downloads have been prohibited "
14558 "by a system configuration setting on "
14559 "Device:%x Magic:%x Type:%x ID:%x Size %d "
14560 "%zd\n",
14561 phba->pcidev->device, magic_number, ftype, fid,
14562 fsize, fw->size);
14563 rc = -EACCES;
14564 } else {
14565 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14566 "3022 FW Download failed. Add Status x%x "
14567 "Device:%x Magic:%x Type:%x ID:%x Size %d "
14568 "%zd\n",
14569 offset, phba->pcidev->device, magic_number,
14570 ftype, fid, fsize, fw->size);
14571 rc = -EIO;
14572 }
14573 return rc;
14574 }
14575
14576 /**
14577 * lpfc_write_firmware - attempt to write a firmware image to the port
14578 * @fw: pointer to firmware image returned from request_firmware.
14579 * @context: pointer to firmware image returned from request_firmware.
14580 *
14581 **/
14582 static void
lpfc_write_firmware(const struct firmware * fw,void * context)14583 lpfc_write_firmware(const struct firmware *fw, void *context)
14584 {
14585 struct lpfc_hba *phba = (struct lpfc_hba *)context;
14586 char fwrev[FW_REV_STR_SIZE];
14587 struct lpfc_grp_hdr *image;
14588 struct list_head dma_buffer_list;
14589 int i, rc = 0;
14590 struct lpfc_dmabuf *dmabuf, *next;
14591 uint32_t offset = 0, temp_offset = 0;
14592 uint32_t magic_number, ftype, fid, fsize;
14593
14594 /* It can be null in no-wait mode, sanity check */
14595 if (!fw) {
14596 rc = -ENXIO;
14597 goto out;
14598 }
14599 image = (struct lpfc_grp_hdr *)fw->data;
14600
14601 magic_number = be32_to_cpu(image->magic_number);
14602 ftype = bf_get_be32(lpfc_grp_hdr_file_type, image);
14603 fid = bf_get_be32(lpfc_grp_hdr_id, image);
14604 fsize = be32_to_cpu(image->size);
14605
14606 INIT_LIST_HEAD(&dma_buffer_list);
14607 lpfc_decode_firmware_rev(phba, fwrev, 1);
14608 if (strncmp(fwrev, image->revision, strnlen(image->revision, 16))) {
14609 lpfc_log_msg(phba, KERN_NOTICE, LOG_INIT | LOG_SLI,
14610 "3023 Updating Firmware, Current Version:%s "
14611 "New Version:%s\n",
14612 fwrev, image->revision);
14613 for (i = 0; i < LPFC_MBX_WR_CONFIG_MAX_BDE; i++) {
14614 dmabuf = kzalloc(sizeof(struct lpfc_dmabuf),
14615 GFP_KERNEL);
14616 if (!dmabuf) {
14617 rc = -ENOMEM;
14618 goto release_out;
14619 }
14620 dmabuf->virt = dma_alloc_coherent(&phba->pcidev->dev,
14621 SLI4_PAGE_SIZE,
14622 &dmabuf->phys,
14623 GFP_KERNEL);
14624 if (!dmabuf->virt) {
14625 kfree(dmabuf);
14626 rc = -ENOMEM;
14627 goto release_out;
14628 }
14629 list_add_tail(&dmabuf->list, &dma_buffer_list);
14630 }
14631 while (offset < fw->size) {
14632 temp_offset = offset;
14633 list_for_each_entry(dmabuf, &dma_buffer_list, list) {
14634 if (temp_offset + SLI4_PAGE_SIZE > fw->size) {
14635 memcpy(dmabuf->virt,
14636 fw->data + temp_offset,
14637 fw->size - temp_offset);
14638 temp_offset = fw->size;
14639 break;
14640 }
14641 memcpy(dmabuf->virt, fw->data + temp_offset,
14642 SLI4_PAGE_SIZE);
14643 temp_offset += SLI4_PAGE_SIZE;
14644 }
14645 rc = lpfc_wr_object(phba, &dma_buffer_list,
14646 (fw->size - offset), &offset);
14647 if (rc) {
14648 rc = lpfc_log_write_firmware_error(phba, offset,
14649 magic_number,
14650 ftype,
14651 fid,
14652 fsize,
14653 fw);
14654 goto release_out;
14655 }
14656 }
14657 rc = offset;
14658 } else
14659 lpfc_log_msg(phba, KERN_NOTICE, LOG_INIT | LOG_SLI,
14660 "3029 Skipped Firmware update, Current "
14661 "Version:%s New Version:%s\n",
14662 fwrev, image->revision);
14663
14664 release_out:
14665 list_for_each_entry_safe(dmabuf, next, &dma_buffer_list, list) {
14666 list_del(&dmabuf->list);
14667 dma_free_coherent(&phba->pcidev->dev, SLI4_PAGE_SIZE,
14668 dmabuf->virt, dmabuf->phys);
14669 kfree(dmabuf);
14670 }
14671 release_firmware(fw);
14672 out:
14673 if (rc < 0)
14674 lpfc_log_msg(phba, KERN_ERR, LOG_INIT | LOG_SLI,
14675 "3062 Firmware update error, status %d.\n", rc);
14676 else
14677 lpfc_log_msg(phba, KERN_NOTICE, LOG_INIT | LOG_SLI,
14678 "3024 Firmware update success: size %d.\n", rc);
14679 }
14680
14681 /**
14682 * lpfc_sli4_request_firmware_update - Request linux generic firmware upgrade
14683 * @phba: pointer to lpfc hba data structure.
14684 * @fw_upgrade: which firmware to update.
14685 *
14686 * This routine is called to perform Linux generic firmware upgrade on device
14687 * that supports such feature.
14688 **/
14689 int
lpfc_sli4_request_firmware_update(struct lpfc_hba * phba,uint8_t fw_upgrade)14690 lpfc_sli4_request_firmware_update(struct lpfc_hba *phba, uint8_t fw_upgrade)
14691 {
14692 char file_name[ELX_FW_NAME_SIZE] = {0};
14693 int ret;
14694 const struct firmware *fw;
14695
14696 /* Only supported on SLI4 interface type 2 for now */
14697 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) <
14698 LPFC_SLI_INTF_IF_TYPE_2)
14699 return -EPERM;
14700
14701 scnprintf(file_name, sizeof(file_name), "%s.grp", phba->ModelName);
14702
14703 if (fw_upgrade == INT_FW_UPGRADE) {
14704 ret = request_firmware_nowait(THIS_MODULE, FW_ACTION_UEVENT,
14705 file_name, &phba->pcidev->dev,
14706 GFP_KERNEL, (void *)phba,
14707 lpfc_write_firmware);
14708 } else if (fw_upgrade == RUN_FW_UPGRADE) {
14709 ret = request_firmware(&fw, file_name, &phba->pcidev->dev);
14710 if (!ret)
14711 lpfc_write_firmware(fw, (void *)phba);
14712 } else {
14713 ret = -EINVAL;
14714 }
14715
14716 return ret;
14717 }
14718
14719 /**
14720 * lpfc_pci_probe_one_s4 - PCI probe func to reg SLI-4 device to PCI subsys
14721 * @pdev: pointer to PCI device
14722 * @pid: pointer to PCI device identifier
14723 *
14724 * This routine is called from the kernel's PCI subsystem to device with
14725 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is
14726 * presented on PCI bus, the kernel PCI subsystem looks at PCI device-specific
14727 * information of the device and driver to see if the driver state that it
14728 * can support this kind of device. If the match is successful, the driver
14729 * core invokes this routine. If this routine determines it can claim the HBA,
14730 * it does all the initialization that it needs to do to handle the HBA
14731 * properly.
14732 *
14733 * Return code
14734 * 0 - driver can claim the device
14735 * negative value - driver can not claim the device
14736 **/
14737 static int
lpfc_pci_probe_one_s4(struct pci_dev * pdev,const struct pci_device_id * pid)14738 lpfc_pci_probe_one_s4(struct pci_dev *pdev, const struct pci_device_id *pid)
14739 {
14740 struct lpfc_hba *phba;
14741 struct lpfc_vport *vport = NULL;
14742 struct Scsi_Host *shost = NULL;
14743 int error;
14744 uint32_t cfg_mode, intr_mode;
14745
14746 /* Allocate memory for HBA structure */
14747 phba = lpfc_hba_alloc(pdev);
14748 if (!phba)
14749 return -ENOMEM;
14750
14751 INIT_LIST_HEAD(&phba->poll_list);
14752
14753 /* Perform generic PCI device enabling operation */
14754 error = lpfc_enable_pci_dev(phba);
14755 if (error)
14756 goto out_free_phba;
14757
14758 /* Set up SLI API function jump table for PCI-device group-1 HBAs */
14759 error = lpfc_api_table_setup(phba, LPFC_PCI_DEV_OC);
14760 if (error)
14761 goto out_disable_pci_dev;
14762
14763 /* Set up SLI-4 specific device PCI memory space */
14764 error = lpfc_sli4_pci_mem_setup(phba);
14765 if (error) {
14766 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14767 "1410 Failed to set up pci memory space.\n");
14768 goto out_disable_pci_dev;
14769 }
14770
14771 /* Set up SLI-4 Specific device driver resources */
14772 error = lpfc_sli4_driver_resource_setup(phba);
14773 if (error) {
14774 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14775 "1412 Failed to set up driver resource.\n");
14776 goto out_unset_pci_mem_s4;
14777 }
14778
14779 spin_lock_init(&phba->rrq_list_lock);
14780 INIT_LIST_HEAD(&phba->active_rrq_list);
14781 INIT_LIST_HEAD(&phba->fcf.fcf_pri_list);
14782
14783 /* Set up common device driver resources */
14784 error = lpfc_setup_driver_resource_phase2(phba);
14785 if (error) {
14786 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14787 "1414 Failed to set up driver resource.\n");
14788 goto out_unset_driver_resource_s4;
14789 }
14790
14791 /* Get the default values for Model Name and Description */
14792 lpfc_get_hba_model_desc(phba, phba->ModelName, phba->ModelDesc);
14793
14794 /* Now, trying to enable interrupt and bring up the device */
14795 cfg_mode = phba->cfg_use_msi;
14796
14797 /* Put device to a known state before enabling interrupt */
14798 phba->pport = NULL;
14799 lpfc_stop_port(phba);
14800
14801 /* Init cpu_map array */
14802 lpfc_cpu_map_array_init(phba);
14803
14804 /* Init hba_eq_hdl array */
14805 lpfc_hba_eq_hdl_array_init(phba);
14806
14807 /* Configure and enable interrupt */
14808 intr_mode = lpfc_sli4_enable_intr(phba, cfg_mode);
14809 if (intr_mode == LPFC_INTR_ERROR) {
14810 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14811 "0426 Failed to enable interrupt.\n");
14812 error = -ENODEV;
14813 goto out_unset_driver_resource;
14814 }
14815 /* Default to single EQ for non-MSI-X */
14816 if (phba->intr_type != MSIX) {
14817 phba->cfg_irq_chann = 1;
14818 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
14819 if (phba->nvmet_support)
14820 phba->cfg_nvmet_mrq = 1;
14821 }
14822 }
14823 lpfc_cpu_affinity_check(phba, phba->cfg_irq_chann);
14824
14825 /* Create SCSI host to the physical port */
14826 error = lpfc_create_shost(phba);
14827 if (error) {
14828 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14829 "1415 Failed to create scsi host.\n");
14830 goto out_disable_intr;
14831 }
14832 vport = phba->pport;
14833 shost = lpfc_shost_from_vport(vport); /* save shost for error cleanup */
14834
14835 /* Configure sysfs attributes */
14836 error = lpfc_alloc_sysfs_attr(vport);
14837 if (error) {
14838 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
14839 "1416 Failed to allocate sysfs attr\n");
14840 goto out_destroy_shost;
14841 }
14842
14843 /* Set up SLI-4 HBA */
14844 if (lpfc_sli4_hba_setup(phba)) {
14845 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14846 "1421 Failed to set up hba\n");
14847 error = -ENODEV;
14848 goto out_free_sysfs_attr;
14849 }
14850
14851 /* Log the current active interrupt mode */
14852 phba->intr_mode = intr_mode;
14853 lpfc_log_intr_mode(phba, intr_mode);
14854
14855 /* Perform post initialization setup */
14856 lpfc_post_init_setup(phba);
14857
14858 /* NVME support in FW earlier in the driver load corrects the
14859 * FC4 type making a check for nvme_support unnecessary.
14860 */
14861 if (phba->nvmet_support == 0) {
14862 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) {
14863 /* Create NVME binding with nvme_fc_transport. This
14864 * ensures the vport is initialized. If the localport
14865 * create fails, it should not unload the driver to
14866 * support field issues.
14867 */
14868 error = lpfc_nvme_create_localport(vport);
14869 if (error) {
14870 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
14871 "6004 NVME registration "
14872 "failed, error x%x\n",
14873 error);
14874 }
14875 }
14876 }
14877
14878 /* check for firmware upgrade or downgrade */
14879 if (phba->cfg_request_firmware_upgrade)
14880 lpfc_sli4_request_firmware_update(phba, INT_FW_UPGRADE);
14881
14882 /* Check if there are static vports to be created. */
14883 lpfc_create_static_vport(phba);
14884
14885 timer_setup(&phba->cpuhp_poll_timer, lpfc_sli4_poll_hbtimer, 0);
14886 cpuhp_state_add_instance_nocalls(lpfc_cpuhp_state, &phba->cpuhp);
14887
14888 return 0;
14889
14890 out_free_sysfs_attr:
14891 lpfc_free_sysfs_attr(vport);
14892 out_destroy_shost:
14893 lpfc_destroy_shost(phba);
14894 out_disable_intr:
14895 lpfc_sli4_disable_intr(phba);
14896 out_unset_driver_resource:
14897 lpfc_unset_driver_resource_phase2(phba);
14898 out_unset_driver_resource_s4:
14899 lpfc_sli4_driver_resource_unset(phba);
14900 out_unset_pci_mem_s4:
14901 lpfc_sli4_pci_mem_unset(phba);
14902 out_disable_pci_dev:
14903 lpfc_disable_pci_dev(phba);
14904 if (shost)
14905 scsi_host_put(shost);
14906 out_free_phba:
14907 lpfc_hba_free(phba);
14908 return error;
14909 }
14910
14911 /**
14912 * lpfc_pci_remove_one_s4 - PCI func to unreg SLI-4 device from PCI subsystem
14913 * @pdev: pointer to PCI device
14914 *
14915 * This routine is called from the kernel's PCI subsystem to device with
14916 * SLI-4 interface spec. When an Emulex HBA with SLI-4 interface spec is
14917 * removed from PCI bus, it performs all the necessary cleanup for the HBA
14918 * device to be removed from the PCI subsystem properly.
14919 **/
14920 static void
lpfc_pci_remove_one_s4(struct pci_dev * pdev)14921 lpfc_pci_remove_one_s4(struct pci_dev *pdev)
14922 {
14923 struct Scsi_Host *shost = pci_get_drvdata(pdev);
14924 struct lpfc_vport *vport = (struct lpfc_vport *) shost->hostdata;
14925 struct lpfc_vport **vports;
14926 struct lpfc_hba *phba = vport->phba;
14927 int i;
14928
14929 /* Mark the device unloading flag */
14930 set_bit(FC_UNLOADING, &vport->load_flag);
14931 if (phba->cgn_i)
14932 lpfc_unreg_congestion_buf(phba);
14933
14934 lpfc_free_sysfs_attr(vport);
14935
14936 /* Release all the vports against this physical port */
14937 vports = lpfc_create_vport_work_array(phba);
14938 if (vports != NULL)
14939 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
14940 if (vports[i]->port_type == LPFC_PHYSICAL_PORT)
14941 continue;
14942 fc_vport_terminate(vports[i]->fc_vport);
14943 }
14944 lpfc_destroy_vport_work_array(phba, vports);
14945
14946 /* Remove FC host with the physical port */
14947 fc_remove_host(shost);
14948 scsi_remove_host(shost);
14949
14950 /* Perform ndlp cleanup on the physical port. The nvme and nvmet
14951 * localports are destroyed after to cleanup all transport memory.
14952 */
14953 lpfc_cleanup(vport);
14954 lpfc_nvmet_destroy_targetport(phba);
14955 lpfc_nvme_destroy_localport(vport);
14956
14957 /* De-allocate multi-XRI pools */
14958 if (phba->cfg_xri_rebalancing)
14959 lpfc_destroy_multixri_pools(phba);
14960
14961 /*
14962 * Bring down the SLI Layer. This step disables all interrupts,
14963 * clears the rings, discards all mailbox commands, and resets
14964 * the HBA FCoE function.
14965 */
14966 lpfc_debugfs_terminate(vport);
14967
14968 lpfc_stop_hba_timers(phba);
14969 spin_lock_irq(&phba->port_list_lock);
14970 list_del_init(&vport->listentry);
14971 spin_unlock_irq(&phba->port_list_lock);
14972
14973 /* Perform scsi free before driver resource_unset since scsi
14974 * buffers are released to their corresponding pools here.
14975 */
14976 lpfc_io_free(phba);
14977 lpfc_free_iocb_list(phba);
14978 lpfc_sli4_hba_unset(phba);
14979
14980 lpfc_unset_driver_resource_phase2(phba);
14981 lpfc_sli4_driver_resource_unset(phba);
14982
14983 /* Unmap adapter Control and Doorbell registers */
14984 lpfc_sli4_pci_mem_unset(phba);
14985
14986 /* Release PCI resources and disable device's PCI function */
14987 scsi_host_put(shost);
14988 lpfc_disable_pci_dev(phba);
14989
14990 /* Finally, free the driver's device data structure */
14991 lpfc_hba_free(phba);
14992
14993 return;
14994 }
14995
14996 /**
14997 * lpfc_pci_suspend_one_s4 - PCI func to suspend SLI-4 device for power mgmnt
14998 * @dev_d: pointer to device
14999 *
15000 * This routine is called from the kernel's PCI subsystem to support system
15001 * Power Management (PM) to device with SLI-4 interface spec. When PM invokes
15002 * this method, it quiesces the device by stopping the driver's worker
15003 * thread for the device, turning off device's interrupt and DMA, and bring
15004 * the device offline. Note that as the driver implements the minimum PM
15005 * requirements to a power-aware driver's PM support for suspend/resume -- all
15006 * the possible PM messages (SUSPEND, HIBERNATE, FREEZE) to the suspend()
15007 * method call will be treated as SUSPEND and the driver will fully
15008 * reinitialize its device during resume() method call, the driver will set
15009 * device to PCI_D3hot state in PCI config space instead of setting it
15010 * according to the @msg provided by the PM.
15011 *
15012 * Return code
15013 * 0 - driver suspended the device
15014 * Error otherwise
15015 **/
15016 static int __maybe_unused
lpfc_pci_suspend_one_s4(struct device * dev_d)15017 lpfc_pci_suspend_one_s4(struct device *dev_d)
15018 {
15019 struct Scsi_Host *shost = dev_get_drvdata(dev_d);
15020 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15021
15022 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
15023 "2843 PCI device Power Management suspend.\n");
15024
15025 /* Bring down the device */
15026 lpfc_offline_prep(phba, LPFC_MBX_WAIT);
15027 lpfc_offline(phba);
15028 kthread_stop(phba->worker_thread);
15029
15030 /* Disable interrupt from device */
15031 lpfc_sli4_disable_intr(phba);
15032 lpfc_sli4_queue_destroy(phba);
15033
15034 return 0;
15035 }
15036
15037 /**
15038 * lpfc_pci_resume_one_s4 - PCI func to resume SLI-4 device for power mgmnt
15039 * @dev_d: pointer to device
15040 *
15041 * This routine is called from the kernel's PCI subsystem to support system
15042 * Power Management (PM) to device with SLI-4 interface spac. When PM invokes
15043 * this method, it restores the device's PCI config space state and fully
15044 * reinitializes the device and brings it online. Note that as the driver
15045 * implements the minimum PM requirements to a power-aware driver's PM for
15046 * suspend/resume -- all the possible PM messages (SUSPEND, HIBERNATE, FREEZE)
15047 * to the suspend() method call will be treated as SUSPEND and the driver
15048 * will fully reinitialize its device during resume() method call, the device
15049 * will be set to PCI_D0 directly in PCI config space before restoring the
15050 * state.
15051 *
15052 * Return code
15053 * 0 - driver suspended the device
15054 * Error otherwise
15055 **/
15056 static int __maybe_unused
lpfc_pci_resume_one_s4(struct device * dev_d)15057 lpfc_pci_resume_one_s4(struct device *dev_d)
15058 {
15059 struct Scsi_Host *shost = dev_get_drvdata(dev_d);
15060 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15061 uint32_t intr_mode;
15062 int error;
15063
15064 lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
15065 "0292 PCI device Power Management resume.\n");
15066
15067 /* Startup the kernel thread for this host adapter. */
15068 phba->worker_thread = kthread_run(lpfc_do_work, phba,
15069 "lpfc_worker_%d", phba->brd_no);
15070 if (IS_ERR(phba->worker_thread)) {
15071 error = PTR_ERR(phba->worker_thread);
15072 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15073 "0293 PM resume failed to start worker "
15074 "thread: error=x%x.\n", error);
15075 return error;
15076 }
15077
15078 /* Configure and enable interrupt */
15079 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
15080 if (intr_mode == LPFC_INTR_ERROR) {
15081 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15082 "0294 PM resume Failed to enable interrupt\n");
15083 return -EIO;
15084 } else
15085 phba->intr_mode = intr_mode;
15086
15087 /* Restart HBA and bring it online */
15088 lpfc_sli_brdrestart(phba);
15089 lpfc_online(phba);
15090
15091 /* Log the current active interrupt mode */
15092 lpfc_log_intr_mode(phba, phba->intr_mode);
15093
15094 return 0;
15095 }
15096
15097 /**
15098 * lpfc_sli4_prep_dev_for_recover - Prepare SLI4 device for pci slot recover
15099 * @phba: pointer to lpfc hba data structure.
15100 *
15101 * This routine is called to prepare the SLI4 device for PCI slot recover. It
15102 * aborts all the outstanding SCSI I/Os to the pci device.
15103 **/
15104 static void
lpfc_sli4_prep_dev_for_recover(struct lpfc_hba * phba)15105 lpfc_sli4_prep_dev_for_recover(struct lpfc_hba *phba)
15106 {
15107 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15108 "2828 PCI channel I/O abort preparing for recovery\n");
15109 /*
15110 * There may be errored I/Os through HBA, abort all I/Os on txcmplq
15111 * and let the SCSI mid-layer to retry them to recover.
15112 */
15113 lpfc_sli_abort_fcp_rings(phba);
15114 }
15115
15116 /**
15117 * lpfc_sli4_prep_dev_for_reset - Prepare SLI4 device for pci slot reset
15118 * @phba: pointer to lpfc hba data structure.
15119 *
15120 * This routine is called to prepare the SLI4 device for PCI slot reset. It
15121 * disables the device interrupt and pci device, and aborts the internal FCP
15122 * pending I/Os.
15123 **/
15124 static void
lpfc_sli4_prep_dev_for_reset(struct lpfc_hba * phba)15125 lpfc_sli4_prep_dev_for_reset(struct lpfc_hba *phba)
15126 {
15127 int offline = pci_channel_offline(phba->pcidev);
15128
15129 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15130 "2826 PCI channel disable preparing for reset offline"
15131 " %d\n", offline);
15132
15133 /* Block any management I/Os to the device */
15134 lpfc_block_mgmt_io(phba, LPFC_MBX_NO_WAIT);
15135
15136
15137 /* HBA_PCI_ERR was set in io_error_detect */
15138 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT);
15139 /* Flush all driver's outstanding I/Os as we are to reset */
15140 lpfc_sli_flush_io_rings(phba);
15141 lpfc_offline(phba);
15142
15143 /* stop all timers */
15144 lpfc_stop_hba_timers(phba);
15145
15146 lpfc_sli4_queue_destroy(phba);
15147 /* Disable interrupt and pci device */
15148 lpfc_sli4_disable_intr(phba);
15149 pci_disable_device(phba->pcidev);
15150 }
15151
15152 /**
15153 * lpfc_sli4_prep_dev_for_perm_failure - Prepare SLI4 dev for pci slot disable
15154 * @phba: pointer to lpfc hba data structure.
15155 *
15156 * This routine is called to prepare the SLI4 device for PCI slot permanently
15157 * disabling. It blocks the SCSI transport layer traffic and flushes the FCP
15158 * pending I/Os.
15159 **/
15160 static void
lpfc_sli4_prep_dev_for_perm_failure(struct lpfc_hba * phba)15161 lpfc_sli4_prep_dev_for_perm_failure(struct lpfc_hba *phba)
15162 {
15163 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15164 "2827 PCI channel permanent disable for failure\n");
15165
15166 /* Block all SCSI devices' I/Os on the host */
15167 lpfc_scsi_dev_block(phba);
15168
15169 /* stop all timers */
15170 lpfc_stop_hba_timers(phba);
15171
15172 /* Clean up all driver's outstanding I/Os */
15173 lpfc_sli_flush_io_rings(phba);
15174 }
15175
15176 /**
15177 * lpfc_io_error_detected_s4 - Method for handling PCI I/O error to SLI-4 device
15178 * @pdev: pointer to PCI device.
15179 * @state: the current PCI connection state.
15180 *
15181 * This routine is called from the PCI subsystem for error handling to device
15182 * with SLI-4 interface spec. This function is called by the PCI subsystem
15183 * after a PCI bus error affecting this device has been detected. When this
15184 * function is invoked, it will need to stop all the I/Os and interrupt(s)
15185 * to the device. Once that is done, it will return PCI_ERS_RESULT_NEED_RESET
15186 * for the PCI subsystem to perform proper recovery as desired.
15187 *
15188 * Return codes
15189 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
15190 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
15191 **/
15192 static pci_ers_result_t
lpfc_io_error_detected_s4(struct pci_dev * pdev,pci_channel_state_t state)15193 lpfc_io_error_detected_s4(struct pci_dev *pdev, pci_channel_state_t state)
15194 {
15195 struct Scsi_Host *shost = pci_get_drvdata(pdev);
15196 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15197 bool hba_pci_err;
15198
15199 switch (state) {
15200 case pci_channel_io_normal:
15201 /* Non-fatal error, prepare for recovery */
15202 lpfc_sli4_prep_dev_for_recover(phba);
15203 return PCI_ERS_RESULT_CAN_RECOVER;
15204 case pci_channel_io_frozen:
15205 hba_pci_err = test_and_set_bit(HBA_PCI_ERR, &phba->bit_flags);
15206 /* Fatal error, prepare for slot reset */
15207 if (!hba_pci_err)
15208 lpfc_sli4_prep_dev_for_reset(phba);
15209 else
15210 lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
15211 "2832 Already handling PCI error "
15212 "state: x%x\n", state);
15213 return PCI_ERS_RESULT_NEED_RESET;
15214 case pci_channel_io_perm_failure:
15215 set_bit(HBA_PCI_ERR, &phba->bit_flags);
15216 /* Permanent failure, prepare for device down */
15217 lpfc_sli4_prep_dev_for_perm_failure(phba);
15218 return PCI_ERS_RESULT_DISCONNECT;
15219 default:
15220 hba_pci_err = test_and_set_bit(HBA_PCI_ERR, &phba->bit_flags);
15221 if (!hba_pci_err)
15222 lpfc_sli4_prep_dev_for_reset(phba);
15223 /* Unknown state, prepare and request slot reset */
15224 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15225 "2825 Unknown PCI error state: x%x\n", state);
15226 lpfc_sli4_prep_dev_for_reset(phba);
15227 return PCI_ERS_RESULT_NEED_RESET;
15228 }
15229 }
15230
15231 /**
15232 * lpfc_io_slot_reset_s4 - Method for restart PCI SLI-4 device from scratch
15233 * @pdev: pointer to PCI device.
15234 *
15235 * This routine is called from the PCI subsystem for error handling to device
15236 * with SLI-4 interface spec. It is called after PCI bus has been reset to
15237 * restart the PCI card from scratch, as if from a cold-boot. During the
15238 * PCI subsystem error recovery, after the driver returns
15239 * PCI_ERS_RESULT_NEED_RESET, the PCI subsystem will perform proper error
15240 * recovery and then call this routine before calling the .resume method to
15241 * recover the device. This function will initialize the HBA device, enable
15242 * the interrupt, but it will just put the HBA to offline state without
15243 * passing any I/O traffic.
15244 *
15245 * Return codes
15246 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
15247 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
15248 */
15249 static pci_ers_result_t
lpfc_io_slot_reset_s4(struct pci_dev * pdev)15250 lpfc_io_slot_reset_s4(struct pci_dev *pdev)
15251 {
15252 struct Scsi_Host *shost = pci_get_drvdata(pdev);
15253 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15254 struct lpfc_sli *psli = &phba->sli;
15255 uint32_t intr_mode;
15256 bool hba_pci_err;
15257
15258 dev_printk(KERN_INFO, &pdev->dev, "recovering from a slot reset.\n");
15259 if (pci_enable_device_mem(pdev)) {
15260 printk(KERN_ERR "lpfc: Cannot re-enable "
15261 "PCI device after reset.\n");
15262 return PCI_ERS_RESULT_DISCONNECT;
15263 }
15264
15265 pci_restore_state(pdev);
15266
15267 hba_pci_err = test_and_clear_bit(HBA_PCI_ERR, &phba->bit_flags);
15268 if (!hba_pci_err)
15269 dev_info(&pdev->dev,
15270 "hba_pci_err was not set, recovering slot reset.\n");
15271 /*
15272 * As the new kernel behavior of pci_restore_state() API call clears
15273 * device saved_state flag, need to save the restored state again.
15274 */
15275 pci_save_state(pdev);
15276
15277 if (pdev->is_busmaster)
15278 pci_set_master(pdev);
15279
15280 spin_lock_irq(&phba->hbalock);
15281 psli->sli_flag &= ~LPFC_SLI_ACTIVE;
15282 spin_unlock_irq(&phba->hbalock);
15283
15284 /* Init cpu_map array */
15285 lpfc_cpu_map_array_init(phba);
15286 /* Configure and enable interrupt */
15287 intr_mode = lpfc_sli4_enable_intr(phba, phba->intr_mode);
15288 if (intr_mode == LPFC_INTR_ERROR) {
15289 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15290 "2824 Cannot re-enable interrupt after "
15291 "slot reset.\n");
15292 return PCI_ERS_RESULT_DISCONNECT;
15293 } else
15294 phba->intr_mode = intr_mode;
15295 lpfc_cpu_affinity_check(phba, phba->cfg_irq_chann);
15296
15297 /* Log the current active interrupt mode */
15298 lpfc_log_intr_mode(phba, phba->intr_mode);
15299
15300 return PCI_ERS_RESULT_RECOVERED;
15301 }
15302
15303 /**
15304 * lpfc_io_resume_s4 - Method for resuming PCI I/O operation to SLI-4 device
15305 * @pdev: pointer to PCI device
15306 *
15307 * This routine is called from the PCI subsystem for error handling to device
15308 * with SLI-4 interface spec. It is called when kernel error recovery tells
15309 * the lpfc driver that it is ok to resume normal PCI operation after PCI bus
15310 * error recovery. After this call, traffic can start to flow from this device
15311 * again.
15312 **/
15313 static void
lpfc_io_resume_s4(struct pci_dev * pdev)15314 lpfc_io_resume_s4(struct pci_dev *pdev)
15315 {
15316 struct Scsi_Host *shost = pci_get_drvdata(pdev);
15317 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15318
15319 /*
15320 * In case of slot reset, as function reset is performed through
15321 * mailbox command which needs DMA to be enabled, this operation
15322 * has to be moved to the io resume phase. Taking device offline
15323 * will perform the necessary cleanup.
15324 */
15325 if (!(phba->sli.sli_flag & LPFC_SLI_ACTIVE)) {
15326 /* Perform device reset */
15327 lpfc_sli_brdrestart(phba);
15328 /* Bring the device back online */
15329 lpfc_online(phba);
15330 }
15331 }
15332
15333 /**
15334 * lpfc_pci_probe_one - lpfc PCI probe func to reg dev to PCI subsystem
15335 * @pdev: pointer to PCI device
15336 * @pid: pointer to PCI device identifier
15337 *
15338 * This routine is to be registered to the kernel's PCI subsystem. When an
15339 * Emulex HBA device is presented on PCI bus, the kernel PCI subsystem looks
15340 * at PCI device-specific information of the device and driver to see if the
15341 * driver state that it can support this kind of device. If the match is
15342 * successful, the driver core invokes this routine. This routine dispatches
15343 * the action to the proper SLI-3 or SLI-4 device probing routine, which will
15344 * do all the initialization that it needs to do to handle the HBA device
15345 * properly.
15346 *
15347 * Return code
15348 * 0 - driver can claim the device
15349 * negative value - driver can not claim the device
15350 **/
15351 static int
lpfc_pci_probe_one(struct pci_dev * pdev,const struct pci_device_id * pid)15352 lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid)
15353 {
15354 int rc;
15355 struct lpfc_sli_intf intf;
15356
15357 if (pci_read_config_dword(pdev, LPFC_SLI_INTF, &intf.word0))
15358 return -ENODEV;
15359
15360 if ((bf_get(lpfc_sli_intf_valid, &intf) == LPFC_SLI_INTF_VALID) &&
15361 (bf_get(lpfc_sli_intf_slirev, &intf) == LPFC_SLI_INTF_REV_SLI4))
15362 rc = lpfc_pci_probe_one_s4(pdev, pid);
15363 else
15364 rc = lpfc_pci_probe_one_s3(pdev, pid);
15365
15366 return rc;
15367 }
15368
15369 /**
15370 * lpfc_pci_remove_one - lpfc PCI func to unreg dev from PCI subsystem
15371 * @pdev: pointer to PCI device
15372 *
15373 * This routine is to be registered to the kernel's PCI subsystem. When an
15374 * Emulex HBA is removed from PCI bus, the driver core invokes this routine.
15375 * This routine dispatches the action to the proper SLI-3 or SLI-4 device
15376 * remove routine, which will perform all the necessary cleanup for the
15377 * device to be removed from the PCI subsystem properly.
15378 **/
15379 static void
lpfc_pci_remove_one(struct pci_dev * pdev)15380 lpfc_pci_remove_one(struct pci_dev *pdev)
15381 {
15382 struct Scsi_Host *shost = pci_get_drvdata(pdev);
15383 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15384
15385 switch (phba->pci_dev_grp) {
15386 case LPFC_PCI_DEV_LP:
15387 lpfc_pci_remove_one_s3(pdev);
15388 break;
15389 case LPFC_PCI_DEV_OC:
15390 lpfc_pci_remove_one_s4(pdev);
15391 break;
15392 default:
15393 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15394 "1424 Invalid PCI device group: 0x%x\n",
15395 phba->pci_dev_grp);
15396 break;
15397 }
15398 return;
15399 }
15400
15401 /**
15402 * lpfc_pci_suspend_one - lpfc PCI func to suspend dev for power management
15403 * @dev: pointer to device
15404 *
15405 * This routine is to be registered to the kernel's PCI subsystem to support
15406 * system Power Management (PM). When PM invokes this method, it dispatches
15407 * the action to the proper SLI-3 or SLI-4 device suspend routine, which will
15408 * suspend the device.
15409 *
15410 * Return code
15411 * 0 - driver suspended the device
15412 * Error otherwise
15413 **/
15414 static int __maybe_unused
lpfc_pci_suspend_one(struct device * dev)15415 lpfc_pci_suspend_one(struct device *dev)
15416 {
15417 struct Scsi_Host *shost = dev_get_drvdata(dev);
15418 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15419 int rc = -ENODEV;
15420
15421 switch (phba->pci_dev_grp) {
15422 case LPFC_PCI_DEV_LP:
15423 rc = lpfc_pci_suspend_one_s3(dev);
15424 break;
15425 case LPFC_PCI_DEV_OC:
15426 rc = lpfc_pci_suspend_one_s4(dev);
15427 break;
15428 default:
15429 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15430 "1425 Invalid PCI device group: 0x%x\n",
15431 phba->pci_dev_grp);
15432 break;
15433 }
15434 return rc;
15435 }
15436
15437 /**
15438 * lpfc_pci_resume_one - lpfc PCI func to resume dev for power management
15439 * @dev: pointer to device
15440 *
15441 * This routine is to be registered to the kernel's PCI subsystem to support
15442 * system Power Management (PM). When PM invokes this method, it dispatches
15443 * the action to the proper SLI-3 or SLI-4 device resume routine, which will
15444 * resume the device.
15445 *
15446 * Return code
15447 * 0 - driver suspended the device
15448 * Error otherwise
15449 **/
15450 static int __maybe_unused
lpfc_pci_resume_one(struct device * dev)15451 lpfc_pci_resume_one(struct device *dev)
15452 {
15453 struct Scsi_Host *shost = dev_get_drvdata(dev);
15454 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15455 int rc = -ENODEV;
15456
15457 switch (phba->pci_dev_grp) {
15458 case LPFC_PCI_DEV_LP:
15459 rc = lpfc_pci_resume_one_s3(dev);
15460 break;
15461 case LPFC_PCI_DEV_OC:
15462 rc = lpfc_pci_resume_one_s4(dev);
15463 break;
15464 default:
15465 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15466 "1426 Invalid PCI device group: 0x%x\n",
15467 phba->pci_dev_grp);
15468 break;
15469 }
15470 return rc;
15471 }
15472
15473 /**
15474 * lpfc_io_error_detected - lpfc method for handling PCI I/O error
15475 * @pdev: pointer to PCI device.
15476 * @state: the current PCI connection state.
15477 *
15478 * This routine is registered to the PCI subsystem for error handling. This
15479 * function is called by the PCI subsystem after a PCI bus error affecting
15480 * this device has been detected. When this routine is invoked, it dispatches
15481 * the action to the proper SLI-3 or SLI-4 device error detected handling
15482 * routine, which will perform the proper error detected operation.
15483 *
15484 * Return codes
15485 * PCI_ERS_RESULT_NEED_RESET - need to reset before recovery
15486 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
15487 **/
15488 static pci_ers_result_t
lpfc_io_error_detected(struct pci_dev * pdev,pci_channel_state_t state)15489 lpfc_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
15490 {
15491 struct Scsi_Host *shost = pci_get_drvdata(pdev);
15492 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15493 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
15494
15495 if (phba->link_state == LPFC_HBA_ERROR &&
15496 test_bit(HBA_IOQ_FLUSH, &phba->hba_flag))
15497 return PCI_ERS_RESULT_NEED_RESET;
15498
15499 switch (phba->pci_dev_grp) {
15500 case LPFC_PCI_DEV_LP:
15501 rc = lpfc_io_error_detected_s3(pdev, state);
15502 break;
15503 case LPFC_PCI_DEV_OC:
15504 rc = lpfc_io_error_detected_s4(pdev, state);
15505 break;
15506 default:
15507 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15508 "1427 Invalid PCI device group: 0x%x\n",
15509 phba->pci_dev_grp);
15510 break;
15511 }
15512 return rc;
15513 }
15514
15515 /**
15516 * lpfc_io_slot_reset - lpfc method for restart PCI dev from scratch
15517 * @pdev: pointer to PCI device.
15518 *
15519 * This routine is registered to the PCI subsystem for error handling. This
15520 * function is called after PCI bus has been reset to restart the PCI card
15521 * from scratch, as if from a cold-boot. When this routine is invoked, it
15522 * dispatches the action to the proper SLI-3 or SLI-4 device reset handling
15523 * routine, which will perform the proper device reset.
15524 *
15525 * Return codes
15526 * PCI_ERS_RESULT_RECOVERED - the device has been recovered
15527 * PCI_ERS_RESULT_DISCONNECT - device could not be recovered
15528 **/
15529 static pci_ers_result_t
lpfc_io_slot_reset(struct pci_dev * pdev)15530 lpfc_io_slot_reset(struct pci_dev *pdev)
15531 {
15532 struct Scsi_Host *shost = pci_get_drvdata(pdev);
15533 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15534 pci_ers_result_t rc = PCI_ERS_RESULT_DISCONNECT;
15535
15536 switch (phba->pci_dev_grp) {
15537 case LPFC_PCI_DEV_LP:
15538 rc = lpfc_io_slot_reset_s3(pdev);
15539 break;
15540 case LPFC_PCI_DEV_OC:
15541 rc = lpfc_io_slot_reset_s4(pdev);
15542 break;
15543 default:
15544 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15545 "1428 Invalid PCI device group: 0x%x\n",
15546 phba->pci_dev_grp);
15547 break;
15548 }
15549 return rc;
15550 }
15551
15552 /**
15553 * lpfc_io_resume - lpfc method for resuming PCI I/O operation
15554 * @pdev: pointer to PCI device
15555 *
15556 * This routine is registered to the PCI subsystem for error handling. It
15557 * is called when kernel error recovery tells the lpfc driver that it is
15558 * OK to resume normal PCI operation after PCI bus error recovery. When
15559 * this routine is invoked, it dispatches the action to the proper SLI-3
15560 * or SLI-4 device io_resume routine, which will resume the device operation.
15561 **/
15562 static void
lpfc_io_resume(struct pci_dev * pdev)15563 lpfc_io_resume(struct pci_dev *pdev)
15564 {
15565 struct Scsi_Host *shost = pci_get_drvdata(pdev);
15566 struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
15567
15568 switch (phba->pci_dev_grp) {
15569 case LPFC_PCI_DEV_LP:
15570 lpfc_io_resume_s3(pdev);
15571 break;
15572 case LPFC_PCI_DEV_OC:
15573 lpfc_io_resume_s4(pdev);
15574 break;
15575 default:
15576 lpfc_printf_log(phba, KERN_ERR, LOG_TRACE_EVENT,
15577 "1429 Invalid PCI device group: 0x%x\n",
15578 phba->pci_dev_grp);
15579 break;
15580 }
15581 return;
15582 }
15583
15584 /**
15585 * lpfc_sli4_oas_verify - Verify OAS is supported by this adapter
15586 * @phba: pointer to lpfc hba data structure.
15587 *
15588 * This routine checks to see if OAS is supported for this adapter. If
15589 * supported, the configure Flash Optimized Fabric flag is set. Otherwise,
15590 * the enable oas flag is cleared and the pool created for OAS device data
15591 * is destroyed.
15592 *
15593 **/
15594 static void
lpfc_sli4_oas_verify(struct lpfc_hba * phba)15595 lpfc_sli4_oas_verify(struct lpfc_hba *phba)
15596 {
15597
15598 if (!phba->cfg_EnableXLane)
15599 return;
15600
15601 if (phba->sli4_hba.pc_sli4_params.oas_supported) {
15602 phba->cfg_fof = 1;
15603 } else {
15604 phba->cfg_fof = 0;
15605 mempool_destroy(phba->device_data_mem_pool);
15606 phba->device_data_mem_pool = NULL;
15607 }
15608
15609 return;
15610 }
15611
15612 /**
15613 * lpfc_sli4_ras_init - Verify RAS-FW log is supported by this adapter
15614 * @phba: pointer to lpfc hba data structure.
15615 *
15616 * This routine checks to see if RAS is supported by the adapter. Check the
15617 * function through which RAS support enablement is to be done.
15618 **/
15619 void
lpfc_sli4_ras_init(struct lpfc_hba * phba)15620 lpfc_sli4_ras_init(struct lpfc_hba *phba)
15621 {
15622 /* if ASIC_GEN_NUM >= 0xC) */
15623 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
15624 LPFC_SLI_INTF_IF_TYPE_6) ||
15625 (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) ==
15626 LPFC_SLI_INTF_FAMILY_G6)) {
15627 phba->ras_fwlog.ras_hwsupport = true;
15628 if (phba->cfg_ras_fwlog_func == PCI_FUNC(phba->pcidev->devfn) &&
15629 phba->cfg_ras_fwlog_buffsize)
15630 phba->ras_fwlog.ras_enabled = true;
15631 else
15632 phba->ras_fwlog.ras_enabled = false;
15633 } else {
15634 phba->ras_fwlog.ras_hwsupport = false;
15635 }
15636 }
15637
15638
15639 MODULE_DEVICE_TABLE(pci, lpfc_id_table);
15640
15641 static const struct pci_error_handlers lpfc_err_handler = {
15642 .error_detected = lpfc_io_error_detected,
15643 .slot_reset = lpfc_io_slot_reset,
15644 .resume = lpfc_io_resume,
15645 };
15646
15647 static SIMPLE_DEV_PM_OPS(lpfc_pci_pm_ops_one,
15648 lpfc_pci_suspend_one,
15649 lpfc_pci_resume_one);
15650
15651 static struct pci_driver lpfc_driver = {
15652 .name = LPFC_DRIVER_NAME,
15653 .id_table = lpfc_id_table,
15654 .probe = lpfc_pci_probe_one,
15655 .remove = lpfc_pci_remove_one,
15656 .shutdown = lpfc_pci_remove_one,
15657 .driver.pm = &lpfc_pci_pm_ops_one,
15658 .err_handler = &lpfc_err_handler,
15659 };
15660
15661 static const struct file_operations lpfc_mgmt_fop = {
15662 .owner = THIS_MODULE,
15663 };
15664
15665 static struct miscdevice lpfc_mgmt_dev = {
15666 .minor = MISC_DYNAMIC_MINOR,
15667 .name = "lpfcmgmt",
15668 .fops = &lpfc_mgmt_fop,
15669 };
15670
15671 /**
15672 * lpfc_init - lpfc module initialization routine
15673 *
15674 * This routine is to be invoked when the lpfc module is loaded into the
15675 * kernel. The special kernel macro module_init() is used to indicate the
15676 * role of this routine to the kernel as lpfc module entry point.
15677 *
15678 * Return codes
15679 * 0 - successful
15680 * -ENOMEM - FC attach transport failed
15681 * all others - failed
15682 */
15683 static int __init
lpfc_init(void)15684 lpfc_init(void)
15685 {
15686 int error = 0;
15687
15688 pr_info(LPFC_MODULE_DESC "\n");
15689 pr_info(LPFC_COPYRIGHT "\n");
15690
15691 error = misc_register(&lpfc_mgmt_dev);
15692 if (error)
15693 printk(KERN_ERR "Could not register lpfcmgmt device, "
15694 "misc_register returned with status %d", error);
15695
15696 error = -ENOMEM;
15697 lpfc_transport_functions.vport_create = lpfc_vport_create;
15698 lpfc_transport_functions.vport_delete = lpfc_vport_delete;
15699 lpfc_transport_template =
15700 fc_attach_transport(&lpfc_transport_functions);
15701 if (lpfc_transport_template == NULL)
15702 goto unregister;
15703 lpfc_vport_transport_template =
15704 fc_attach_transport(&lpfc_vport_transport_functions);
15705 if (lpfc_vport_transport_template == NULL) {
15706 fc_release_transport(lpfc_transport_template);
15707 goto unregister;
15708 }
15709 lpfc_wqe_cmd_template();
15710 lpfc_nvmet_cmd_template();
15711
15712 /* Initialize in case vector mapping is needed */
15713 lpfc_present_cpu = num_present_cpus();
15714
15715 lpfc_pldv_detect = false;
15716
15717 error = cpuhp_setup_state_multi(CPUHP_AP_ONLINE_DYN,
15718 "lpfc/sli4:online",
15719 lpfc_cpu_online, lpfc_cpu_offline);
15720 if (error < 0)
15721 goto cpuhp_failure;
15722 lpfc_cpuhp_state = error;
15723
15724 error = pci_register_driver(&lpfc_driver);
15725 if (error)
15726 goto unwind;
15727
15728 return error;
15729
15730 unwind:
15731 cpuhp_remove_multi_state(lpfc_cpuhp_state);
15732 cpuhp_failure:
15733 fc_release_transport(lpfc_transport_template);
15734 fc_release_transport(lpfc_vport_transport_template);
15735 unregister:
15736 misc_deregister(&lpfc_mgmt_dev);
15737
15738 return error;
15739 }
15740
lpfc_dmp_dbg(struct lpfc_hba * phba)15741 void lpfc_dmp_dbg(struct lpfc_hba *phba)
15742 {
15743 unsigned int start_idx;
15744 unsigned int dbg_cnt;
15745 unsigned int temp_idx;
15746 int i;
15747 int j = 0;
15748 unsigned long rem_nsec;
15749
15750 if (atomic_cmpxchg(&phba->dbg_log_dmping, 0, 1) != 0)
15751 return;
15752
15753 start_idx = (unsigned int)atomic_read(&phba->dbg_log_idx) % DBG_LOG_SZ;
15754 dbg_cnt = (unsigned int)atomic_read(&phba->dbg_log_cnt);
15755 if (!dbg_cnt)
15756 goto out;
15757 temp_idx = start_idx;
15758 if (dbg_cnt >= DBG_LOG_SZ) {
15759 dbg_cnt = DBG_LOG_SZ;
15760 temp_idx -= 1;
15761 } else {
15762 if ((start_idx + dbg_cnt) > (DBG_LOG_SZ - 1)) {
15763 temp_idx = (start_idx + dbg_cnt) % DBG_LOG_SZ;
15764 } else {
15765 if (start_idx < dbg_cnt)
15766 start_idx = DBG_LOG_SZ - (dbg_cnt - start_idx);
15767 else
15768 start_idx -= dbg_cnt;
15769 }
15770 }
15771 dev_info(&phba->pcidev->dev, "start %d end %d cnt %d\n",
15772 start_idx, temp_idx, dbg_cnt);
15773
15774 for (i = 0; i < dbg_cnt; i++) {
15775 if ((start_idx + i) < DBG_LOG_SZ)
15776 temp_idx = (start_idx + i) % DBG_LOG_SZ;
15777 else
15778 temp_idx = j++;
15779 rem_nsec = do_div(phba->dbg_log[temp_idx].t_ns, NSEC_PER_SEC);
15780 dev_info(&phba->pcidev->dev, "%d: [%5lu.%06lu] %s",
15781 temp_idx,
15782 (unsigned long)phba->dbg_log[temp_idx].t_ns,
15783 rem_nsec / 1000,
15784 phba->dbg_log[temp_idx].log);
15785 }
15786 out:
15787 atomic_set(&phba->dbg_log_cnt, 0);
15788 atomic_set(&phba->dbg_log_dmping, 0);
15789 }
15790
15791 __printf(2, 3)
lpfc_dbg_print(struct lpfc_hba * phba,const char * fmt,...)15792 void lpfc_dbg_print(struct lpfc_hba *phba, const char *fmt, ...)
15793 {
15794 unsigned int idx;
15795 va_list args;
15796 int dbg_dmping = atomic_read(&phba->dbg_log_dmping);
15797 struct va_format vaf;
15798
15799
15800 va_start(args, fmt);
15801 if (unlikely(dbg_dmping)) {
15802 vaf.fmt = fmt;
15803 vaf.va = &args;
15804 dev_info(&phba->pcidev->dev, "%pV", &vaf);
15805 va_end(args);
15806 return;
15807 }
15808 idx = (unsigned int)atomic_fetch_add(1, &phba->dbg_log_idx) %
15809 DBG_LOG_SZ;
15810
15811 atomic_inc(&phba->dbg_log_cnt);
15812
15813 vscnprintf(phba->dbg_log[idx].log,
15814 sizeof(phba->dbg_log[idx].log), fmt, args);
15815 va_end(args);
15816
15817 phba->dbg_log[idx].t_ns = local_clock();
15818 }
15819
15820 /**
15821 * lpfc_exit - lpfc module removal routine
15822 *
15823 * This routine is invoked when the lpfc module is removed from the kernel.
15824 * The special kernel macro module_exit() is used to indicate the role of
15825 * this routine to the kernel as lpfc module exit point.
15826 */
15827 static void __exit
lpfc_exit(void)15828 lpfc_exit(void)
15829 {
15830 misc_deregister(&lpfc_mgmt_dev);
15831 pci_unregister_driver(&lpfc_driver);
15832 cpuhp_remove_multi_state(lpfc_cpuhp_state);
15833 fc_release_transport(lpfc_transport_template);
15834 fc_release_transport(lpfc_vport_transport_template);
15835 idr_destroy(&lpfc_hba_index);
15836 }
15837
15838 module_init(lpfc_init);
15839 module_exit(lpfc_exit);
15840 MODULE_LICENSE("GPL");
15841 MODULE_DESCRIPTION(LPFC_MODULE_DESC);
15842 MODULE_AUTHOR("Broadcom");
15843 MODULE_VERSION("0:" LPFC_DRIVER_VERSION);
15844