1 // SPDX-License-Identifier: GPL-2.0
2 //
3 // Driver for the Texas Instruments TAS2764 CODEC
4 // Copyright (C) 2020 Texas Instruments Inc.
5
6 #include <linux/module.h>
7 #include <linux/moduleparam.h>
8 #include <linux/err.h>
9 #include <linux/init.h>
10 #include <linux/delay.h>
11 #include <linux/hwmon.h>
12 #include <linux/pm.h>
13 #include <linux/i2c.h>
14 #include <linux/gpio/consumer.h>
15 #include <linux/regulator/consumer.h>
16 #include <linux/regmap.h>
17 #include <linux/of.h>
18 #include <linux/of_device.h>
19 #include <linux/slab.h>
20 #include <sound/soc.h>
21 #include <sound/pcm.h>
22 #include <sound/pcm_params.h>
23 #include <sound/initval.h>
24 #include <sound/tlv.h>
25
26 #include "tas2764.h"
27
28 enum tas2764_devid {
29 DEVID_TAS2764 = 0,
30 DEVID_SN012776 = 1
31 };
32
33 struct tas2764_priv {
34 struct snd_soc_component *component;
35 struct gpio_desc *reset_gpio;
36 struct gpio_desc *sdz_gpio;
37 struct regmap *regmap;
38 struct device *dev;
39 int irq;
40 enum tas2764_devid devid;
41
42 int v_sense_slot;
43 int i_sense_slot;
44
45 bool dac_powered;
46 bool unmuted;
47 };
48
49 #include "tas2764-quirks.h"
50
51 static const char *tas2764_int_ltch0_msgs[8] = {
52 "fault: over temperature", /* INT_LTCH0 & BIT(0) */
53 "fault: over current",
54 "fault: bad TDM clock",
55 "limiter active",
56 "fault: PVDD below limiter inflection point",
57 "fault: limiter max attenuation",
58 "fault: BOP infinite hold",
59 "fault: BOP mute", /* INT_LTCH0 & BIT(7) */
60 };
61
62 static const unsigned int tas2764_int_readout_regs[6] = {
63 TAS2764_INT_LTCH0,
64 TAS2764_INT_LTCH1,
65 TAS2764_INT_LTCH1_0,
66 TAS2764_INT_LTCH2,
67 TAS2764_INT_LTCH3,
68 TAS2764_INT_LTCH4,
69 };
70
tas2764_irq(int irq,void * data)71 static irqreturn_t tas2764_irq(int irq, void *data)
72 {
73 struct tas2764_priv *tas2764 = data;
74 u8 latched[6] = {0, 0, 0, 0, 0, 0};
75 int ret = IRQ_NONE;
76 int i;
77
78 for (i = 0; i < ARRAY_SIZE(latched); i++)
79 latched[i] = snd_soc_component_read(tas2764->component,
80 tas2764_int_readout_regs[i]);
81
82 for (i = 0; i < 8; i++) {
83 if (latched[0] & BIT(i)) {
84 dev_crit_ratelimited(tas2764->dev, "%s\n",
85 tas2764_int_ltch0_msgs[i]);
86 ret = IRQ_HANDLED;
87 }
88 }
89
90 if (latched[0]) {
91 dev_err_ratelimited(tas2764->dev, "other context to the fault: %02x,%02x,%02x,%02x,%02x",
92 latched[1], latched[2], latched[3], latched[4], latched[5]);
93 snd_soc_component_update_bits(tas2764->component,
94 TAS2764_INT_CLK_CFG,
95 TAS2764_INT_CLK_CFG_IRQZ_CLR,
96 TAS2764_INT_CLK_CFG_IRQZ_CLR);
97 }
98
99 return ret;
100 }
101
tas2764_reset(struct tas2764_priv * tas2764)102 static void tas2764_reset(struct tas2764_priv *tas2764)
103 {
104 if (tas2764->reset_gpio) {
105 gpiod_set_value_cansleep(tas2764->reset_gpio, 0);
106 msleep(20);
107 gpiod_set_value_cansleep(tas2764->reset_gpio, 1);
108 usleep_range(1000, 2000);
109 }
110
111 snd_soc_component_write(tas2764->component, TAS2764_SW_RST,
112 TAS2764_RST);
113 usleep_range(1000, 2000);
114 }
115
tas2764_update_pwr_ctrl(struct tas2764_priv * tas2764)116 static int tas2764_update_pwr_ctrl(struct tas2764_priv *tas2764)
117 {
118 struct snd_soc_component *component = tas2764->component;
119 unsigned int val;
120 int ret;
121
122 if (tas2764->dac_powered)
123 val = tas2764->unmuted ?
124 TAS2764_PWR_CTRL_ACTIVE : TAS2764_PWR_CTRL_MUTE;
125 else
126 val = TAS2764_PWR_CTRL_SHUTDOWN;
127
128 if (ENABLED_APPLE_QUIRKS & TAS2764_SHUTDOWN_DANCE)
129 return tas2764_do_quirky_pwr_ctrl_change(tas2764, val);
130
131 ret = snd_soc_component_update_bits(component, TAS2764_PWR_CTRL,
132 TAS2764_PWR_CTRL_MASK, val);
133 if (ret < 0)
134 return ret;
135
136 return 0;
137 }
138
139 #ifdef CONFIG_PM
tas2764_codec_suspend(struct snd_soc_component * component)140 static int tas2764_codec_suspend(struct snd_soc_component *component)
141 {
142 struct tas2764_priv *tas2764 = snd_soc_component_get_drvdata(component);
143 int ret;
144
145 ret = snd_soc_component_update_bits(component, TAS2764_PWR_CTRL,
146 TAS2764_PWR_CTRL_MASK,
147 TAS2764_PWR_CTRL_SHUTDOWN);
148
149 if (ret < 0)
150 return ret;
151
152 if (tas2764->sdz_gpio)
153 gpiod_set_value_cansleep(tas2764->sdz_gpio, 0);
154
155 regcache_cache_only(tas2764->regmap, true);
156 regcache_mark_dirty(tas2764->regmap);
157
158 usleep_range(6000, 7000);
159
160 return 0;
161 }
162
tas2764_codec_resume(struct snd_soc_component * component)163 static int tas2764_codec_resume(struct snd_soc_component *component)
164 {
165 struct tas2764_priv *tas2764 = snd_soc_component_get_drvdata(component);
166 int ret;
167
168 if (tas2764->sdz_gpio) {
169 gpiod_set_value_cansleep(tas2764->sdz_gpio, 1);
170 usleep_range(1000, 2000);
171 }
172
173 ret = tas2764_update_pwr_ctrl(tas2764);
174
175 if (ret < 0)
176 return ret;
177
178 regcache_cache_only(tas2764->regmap, false);
179
180 return regcache_sync(tas2764->regmap);
181 }
182 #else
183 #define tas2764_codec_suspend NULL
184 #define tas2764_codec_resume NULL
185 #endif
186
187 static const char * const tas2764_ASI1_src[] = {
188 "I2C offset", "Left", "Right", "LeftRightDiv2",
189 };
190
191 static SOC_ENUM_SINGLE_DECL(
192 tas2764_ASI1_src_enum, TAS2764_TDM_CFG2, TAS2764_TDM_CFG2_SCFG_SHIFT,
193 tas2764_ASI1_src);
194
195 static const struct snd_kcontrol_new tas2764_asi1_mux =
196 SOC_DAPM_ENUM("ASI1 Source", tas2764_ASI1_src_enum);
197
198 static const struct snd_kcontrol_new isense_switch =
199 SOC_DAPM_SINGLE("Switch", TAS2764_PWR_CTRL, TAS2764_ISENSE_POWER_EN, 1, 1);
200 static const struct snd_kcontrol_new vsense_switch =
201 SOC_DAPM_SINGLE("Switch", TAS2764_PWR_CTRL, TAS2764_VSENSE_POWER_EN, 1, 1);
202
203 static const struct snd_soc_dapm_widget tas2764_dapm_widgets[] = {
204 SND_SOC_DAPM_AIF_IN("ASI1", "ASI1 Playback", 0, SND_SOC_NOPM, 0, 0),
205 SND_SOC_DAPM_MUX("ASI1 Sel", SND_SOC_NOPM, 0, 0, &tas2764_asi1_mux),
206 SND_SOC_DAPM_SWITCH("ISENSE", TAS2764_PWR_CTRL, TAS2764_ISENSE_POWER_EN,
207 1, &isense_switch),
208 SND_SOC_DAPM_SWITCH("VSENSE", TAS2764_PWR_CTRL, TAS2764_VSENSE_POWER_EN,
209 1, &vsense_switch),
210 SND_SOC_DAPM_DAC("DAC", NULL, SND_SOC_NOPM, 0, 0),
211 SND_SOC_DAPM_OUTPUT("OUT"),
212 SND_SOC_DAPM_SIGGEN("VMON"),
213 SND_SOC_DAPM_SIGGEN("IMON")
214 };
215
216 static const struct snd_soc_dapm_route tas2764_audio_map[] = {
217 {"ASI1 Sel", "I2C offset", "ASI1"},
218 {"ASI1 Sel", "Left", "ASI1"},
219 {"ASI1 Sel", "Right", "ASI1"},
220 {"ASI1 Sel", "LeftRightDiv2", "ASI1"},
221 {"DAC", NULL, "ASI1 Sel"},
222 {"OUT", NULL, "DAC"},
223 {"ISENSE", "Switch", "IMON"},
224 {"VSENSE", "Switch", "VMON"},
225 };
226
tas2764_mute(struct snd_soc_dai * dai,int mute,int direction)227 static int tas2764_mute(struct snd_soc_dai *dai, int mute, int direction)
228 {
229 struct tas2764_priv *tas2764 =
230 snd_soc_component_get_drvdata(dai->component);
231 int ret;
232
233 if (!mute) {
234 tas2764->dac_powered = true;
235 ret = tas2764_update_pwr_ctrl(tas2764);
236 if (ret)
237 return ret;
238 }
239
240 tas2764->unmuted = !mute;
241 ret = tas2764_update_pwr_ctrl(tas2764);
242 if (ret)
243 return ret;
244
245 if (mute) {
246 /* Wait for ramp-down */
247 usleep_range(6000, 7000);
248
249 tas2764->dac_powered = false;
250 ret = tas2764_update_pwr_ctrl(tas2764);
251 if (ret)
252 return ret;
253
254 /* Wait a bit after shutdown */
255 usleep_range(2000, 3000);
256 }
257
258 return 0;
259 }
260
tas2764_set_bitwidth(struct tas2764_priv * tas2764,int bitwidth)261 static int tas2764_set_bitwidth(struct tas2764_priv *tas2764, int bitwidth)
262 {
263 struct snd_soc_component *component = tas2764->component;
264 int sense_en;
265 int val;
266 int ret;
267
268 switch (bitwidth) {
269 case SNDRV_PCM_FORMAT_S16_LE:
270 ret = snd_soc_component_update_bits(component,
271 TAS2764_TDM_CFG2,
272 TAS2764_TDM_CFG2_RXW_MASK,
273 TAS2764_TDM_CFG2_RXW_16BITS);
274 break;
275 case SNDRV_PCM_FORMAT_S24_LE:
276 ret = snd_soc_component_update_bits(component,
277 TAS2764_TDM_CFG2,
278 TAS2764_TDM_CFG2_RXW_MASK,
279 TAS2764_TDM_CFG2_RXW_24BITS);
280 break;
281 case SNDRV_PCM_FORMAT_S32_LE:
282 ret = snd_soc_component_update_bits(component,
283 TAS2764_TDM_CFG2,
284 TAS2764_TDM_CFG2_RXW_MASK,
285 TAS2764_TDM_CFG2_RXW_32BITS);
286 break;
287
288 default:
289 return -EINVAL;
290 }
291
292 if (ret < 0)
293 return ret;
294
295 val = snd_soc_component_read(tas2764->component, TAS2764_PWR_CTRL);
296 if (val < 0)
297 return val;
298
299 if (val & (1 << TAS2764_VSENSE_POWER_EN))
300 sense_en = 0;
301 else
302 sense_en = TAS2764_TDM_CFG5_VSNS_ENABLE;
303
304 ret = snd_soc_component_update_bits(tas2764->component, TAS2764_TDM_CFG5,
305 TAS2764_TDM_CFG5_VSNS_ENABLE,
306 sense_en);
307 if (ret < 0)
308 return ret;
309
310 if (val & (1 << TAS2764_ISENSE_POWER_EN))
311 sense_en = 0;
312 else
313 sense_en = TAS2764_TDM_CFG6_ISNS_ENABLE;
314
315 ret = snd_soc_component_update_bits(tas2764->component, TAS2764_TDM_CFG6,
316 TAS2764_TDM_CFG6_ISNS_ENABLE,
317 sense_en);
318 if (ret < 0)
319 return ret;
320
321 return 0;
322 }
323
tas2764_set_samplerate(struct tas2764_priv * tas2764,int samplerate)324 static int tas2764_set_samplerate(struct tas2764_priv *tas2764, int samplerate)
325 {
326 struct snd_soc_component *component = tas2764->component;
327 int ramp_rate_val;
328 int ret;
329
330 switch (samplerate) {
331 case 48000:
332 ramp_rate_val = TAS2764_TDM_CFG0_SMP_48KHZ |
333 TAS2764_TDM_CFG0_44_1_48KHZ;
334 break;
335 case 44100:
336 ramp_rate_val = TAS2764_TDM_CFG0_SMP_44_1KHZ |
337 TAS2764_TDM_CFG0_44_1_48KHZ;
338 break;
339 case 96000:
340 ramp_rate_val = TAS2764_TDM_CFG0_SMP_48KHZ |
341 TAS2764_TDM_CFG0_88_2_96KHZ;
342 break;
343 case 88200:
344 ramp_rate_val = TAS2764_TDM_CFG0_SMP_44_1KHZ |
345 TAS2764_TDM_CFG0_88_2_96KHZ;
346 break;
347 default:
348 return -EINVAL;
349 }
350
351 ret = snd_soc_component_update_bits(component, TAS2764_TDM_CFG0,
352 TAS2764_TDM_CFG0_SMP_MASK |
353 TAS2764_TDM_CFG0_MASK,
354 ramp_rate_val);
355 if (ret < 0)
356 return ret;
357
358 return 0;
359 }
360
tas2764_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)361 static int tas2764_hw_params(struct snd_pcm_substream *substream,
362 struct snd_pcm_hw_params *params,
363 struct snd_soc_dai *dai)
364 {
365 struct snd_soc_component *component = dai->component;
366 struct tas2764_priv *tas2764 = snd_soc_component_get_drvdata(component);
367 int ret;
368
369 ret = tas2764_set_bitwidth(tas2764, params_format(params));
370 if (ret < 0)
371 return ret;
372
373 return tas2764_set_samplerate(tas2764, params_rate(params));
374 }
375
tas2764_set_fmt(struct snd_soc_dai * dai,unsigned int fmt)376 static int tas2764_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
377 {
378 struct snd_soc_component *component = dai->component;
379 struct tas2764_priv *tas2764 = snd_soc_component_get_drvdata(component);
380 u8 tdm_rx_start_slot = 0, asi_cfg_0 = 0, asi_cfg_1 = 0, asi_cfg_4 = 0;
381 int ret;
382
383 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
384 case SND_SOC_DAIFMT_NB_IF:
385 asi_cfg_0 ^= TAS2764_TDM_CFG0_FRAME_START;
386 fallthrough;
387 case SND_SOC_DAIFMT_NB_NF:
388 asi_cfg_1 = TAS2764_TDM_CFG1_RX_RISING;
389 asi_cfg_4 = TAS2764_TDM_CFG4_TX_FALLING;
390 break;
391 case SND_SOC_DAIFMT_IB_IF:
392 asi_cfg_0 ^= TAS2764_TDM_CFG0_FRAME_START;
393 fallthrough;
394 case SND_SOC_DAIFMT_IB_NF:
395 asi_cfg_1 = TAS2764_TDM_CFG1_RX_FALLING;
396 asi_cfg_4 = TAS2764_TDM_CFG4_TX_RISING;
397 break;
398 }
399
400 ret = snd_soc_component_update_bits(component, TAS2764_TDM_CFG1,
401 TAS2764_TDM_CFG1_RX_MASK,
402 asi_cfg_1);
403 if (ret < 0)
404 return ret;
405
406 ret = snd_soc_component_update_bits(component, TAS2764_TDM_CFG4,
407 TAS2764_TDM_CFG4_TX_MASK,
408 asi_cfg_4);
409 if (ret < 0)
410 return ret;
411
412 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
413 case SND_SOC_DAIFMT_I2S:
414 asi_cfg_0 ^= TAS2764_TDM_CFG0_FRAME_START;
415 fallthrough;
416 case SND_SOC_DAIFMT_DSP_A:
417 tdm_rx_start_slot = 1;
418 break;
419 case SND_SOC_DAIFMT_DSP_B:
420 case SND_SOC_DAIFMT_LEFT_J:
421 tdm_rx_start_slot = 0;
422 break;
423 default:
424 dev_err(tas2764->dev,
425 "DAI Format is not found, fmt=0x%x\n", fmt);
426 return -EINVAL;
427 }
428
429 ret = snd_soc_component_update_bits(component, TAS2764_TDM_CFG0,
430 TAS2764_TDM_CFG0_FRAME_START,
431 asi_cfg_0);
432 if (ret < 0)
433 return ret;
434
435 ret = snd_soc_component_update_bits(component, TAS2764_TDM_CFG1,
436 TAS2764_TDM_CFG1_MASK,
437 (tdm_rx_start_slot << TAS2764_TDM_CFG1_51_SHIFT));
438 if (ret < 0)
439 return ret;
440
441 return 0;
442 }
443
tas2764_set_dai_tdm_slot(struct snd_soc_dai * dai,unsigned int tx_mask,unsigned int rx_mask,int slots,int slot_width)444 static int tas2764_set_dai_tdm_slot(struct snd_soc_dai *dai,
445 unsigned int tx_mask,
446 unsigned int rx_mask,
447 int slots, int slot_width)
448 {
449 struct snd_soc_component *component = dai->component;
450 struct tas2764_priv *tas2764 = snd_soc_component_get_drvdata(component);
451 int left_slot, right_slot;
452 int slots_cfg;
453 int slot_size;
454 int ret;
455
456 if (tx_mask == 0 || rx_mask != 0)
457 return -EINVAL;
458
459 left_slot = __ffs(tx_mask);
460 tx_mask &= ~(1 << left_slot);
461 if (tx_mask == 0) {
462 right_slot = left_slot;
463 } else {
464 right_slot = __ffs(tx_mask);
465 tx_mask &= ~(1 << right_slot);
466 }
467
468 if (tx_mask != 0 || left_slot >= slots || right_slot >= slots)
469 return -EINVAL;
470
471 slots_cfg = (right_slot << TAS2764_TDM_CFG3_RXS_SHIFT) | left_slot;
472
473 ret = snd_soc_component_write(component, TAS2764_TDM_CFG3, slots_cfg);
474 if (ret)
475 return ret;
476
477 switch (slot_width) {
478 case 16:
479 slot_size = TAS2764_TDM_CFG2_RXS_16BITS;
480 break;
481 case 24:
482 slot_size = TAS2764_TDM_CFG2_RXS_24BITS;
483 break;
484 case 32:
485 slot_size = TAS2764_TDM_CFG2_RXS_32BITS;
486 break;
487 default:
488 return -EINVAL;
489 }
490
491 ret = snd_soc_component_update_bits(component, TAS2764_TDM_CFG2,
492 TAS2764_TDM_CFG2_RXS_MASK,
493 slot_size);
494 if (ret < 0)
495 return ret;
496
497 ret = snd_soc_component_update_bits(component, TAS2764_TDM_CFG5,
498 TAS2764_TDM_CFG5_50_MASK,
499 tas2764->v_sense_slot);
500 if (ret < 0)
501 return ret;
502
503 ret = snd_soc_component_update_bits(component, TAS2764_TDM_CFG6,
504 TAS2764_TDM_CFG6_50_MASK,
505 tas2764->i_sense_slot);
506 if (ret < 0)
507 return ret;
508
509 return 0;
510 }
511
512 static const struct snd_soc_dai_ops tas2764_dai_ops = {
513 .mute_stream = tas2764_mute,
514 .hw_params = tas2764_hw_params,
515 .set_fmt = tas2764_set_fmt,
516 .set_tdm_slot = tas2764_set_dai_tdm_slot,
517 .no_capture_mute = 1,
518 };
519
520 #define TAS2764_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
521 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
522
523 #define TAS2764_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
524 SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_88200)
525
526 static struct snd_soc_dai_driver tas2764_dai_driver[] = {
527 {
528 .name = "tas2764 ASI1",
529 .id = 0,
530 .playback = {
531 .stream_name = "ASI1 Playback",
532 .channels_min = 1,
533 .channels_max = 2,
534 .rates = TAS2764_RATES,
535 .formats = TAS2764_FORMATS,
536 },
537 .capture = {
538 .stream_name = "ASI1 Capture",
539 .channels_min = 0,
540 .channels_max = 2,
541 .rates = TAS2764_RATES,
542 .formats = TAS2764_FORMATS,
543 },
544 .ops = &tas2764_dai_ops,
545 .symmetric_rate = 1,
546 },
547 };
548
549 static uint8_t sn012776_bop_presets[] = {
550 0x01, 0x32, 0x02, 0x22, 0x83, 0x2d, 0x80, 0x02, 0x06,
551 0x32, 0x46, 0x30, 0x02, 0x06, 0x38, 0x40, 0x30, 0x02,
552 0x06, 0x3e, 0x37, 0x30, 0xff, 0xe6
553 };
554
555 static const struct regmap_config tas2764_i2c_regmap;
556
tas2764_apply_init_quirks(struct tas2764_priv * tas2764)557 static int tas2764_apply_init_quirks(struct tas2764_priv *tas2764)
558 {
559 int ret, i;
560
561 for (i = 0; i < ARRAY_SIZE(tas2764_quirk_init_sequences); i++) {
562 const struct tas2764_quirk_init_sequence *init_seq =
563 &tas2764_quirk_init_sequences[i];
564
565 if (!init_seq->seq)
566 continue;
567
568 if (!(BIT(i) & ENABLED_APPLE_QUIRKS))
569 continue;
570
571 ret = regmap_multi_reg_write(tas2764->regmap, init_seq->seq,
572 init_seq->len);
573
574 if (ret < 0)
575 return ret;
576 }
577
578 return 0;
579 }
580
tas2764_read_die_temp(struct tas2764_priv * tas2764,long * result)581 static int tas2764_read_die_temp(struct tas2764_priv *tas2764, long *result)
582 {
583 int ret, reg;
584
585 ret = regmap_read(tas2764->regmap, TAS2764_TEMP, ®);
586 if (ret)
587 return ret;
588 /*
589 * As per datasheet, subtract 93 from raw value to get degrees
590 * Celsius. hwmon wants millidegrees.
591 *
592 * NOTE: The chip will initialise the TAS2764_TEMP register to
593 * 2.6 *C to avoid triggering temperature protection. Since the
594 * ADC is powered down during software shutdown, this value will
595 * persist until the chip is fully powered up (e.g. the PCM it's
596 * attached to is opened). The ADC will power down again when
597 * the chip is put back into software shutdown, with the last
598 * value sampled persisting in the ADC's register.
599 */
600 *result = (reg - 93) * 1000;
601 return 0;
602 }
603
tas2764_hwmon_is_visible(const void * data,enum hwmon_sensor_types type,u32 attr,int channel)604 static umode_t tas2764_hwmon_is_visible(const void *data,
605 enum hwmon_sensor_types type, u32 attr,
606 int channel)
607 {
608 if (type != hwmon_temp)
609 return 0;
610
611 switch (attr) {
612 case hwmon_temp_input:
613 return 0444;
614 default:
615 break;
616 }
617
618 return 0;
619 }
620
tas2764_hwmon_read(struct device * dev,enum hwmon_sensor_types type,u32 attr,int channel,long * val)621 static int tas2764_hwmon_read(struct device *dev,
622 enum hwmon_sensor_types type,
623 u32 attr, int channel, long *val)
624 {
625 struct tas2764_priv *tas2764 = dev_get_drvdata(dev);
626 int ret;
627
628 switch (attr) {
629 case hwmon_temp_input:
630 ret = tas2764_read_die_temp(tas2764, val);
631 break;
632 default:
633 ret = -EOPNOTSUPP;
634 break;
635 }
636
637 return ret;
638 }
639
640 static const struct hwmon_channel_info *const tas2764_hwmon_info[] = {
641 HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT),
642 NULL
643 };
644
645 static const struct hwmon_ops tas2764_hwmon_ops = {
646 .is_visible = tas2764_hwmon_is_visible,
647 .read = tas2764_hwmon_read,
648 };
649
650 static const struct hwmon_chip_info tas2764_hwmon_chip_info = {
651 .ops = &tas2764_hwmon_ops,
652 .info = tas2764_hwmon_info,
653 };
654
tas2764_codec_probe(struct snd_soc_component * component)655 static int tas2764_codec_probe(struct snd_soc_component *component)
656 {
657 struct tas2764_priv *tas2764 = snd_soc_component_get_drvdata(component);
658 int ret, i;
659
660 tas2764->component = component;
661
662 if (tas2764->sdz_gpio) {
663 gpiod_set_value_cansleep(tas2764->sdz_gpio, 1);
664 usleep_range(1000, 2000);
665 }
666
667 tas2764_reset(tas2764);
668 regmap_reinit_cache(tas2764->regmap, &tas2764_i2c_regmap);
669
670 if (tas2764->irq) {
671 ret = snd_soc_component_write(tas2764->component, TAS2764_INT_MASK0, 0x00);
672 if (ret < 0)
673 return ret;
674
675 ret = snd_soc_component_write(tas2764->component, TAS2764_INT_MASK1, 0xff);
676 if (ret < 0)
677 return ret;
678
679 ret = snd_soc_component_write(tas2764->component, TAS2764_INT_MASK2, 0xff);
680 if (ret < 0)
681 return ret;
682
683 ret = snd_soc_component_write(tas2764->component, TAS2764_INT_MASK3, 0xff);
684 if (ret < 0)
685 return ret;
686
687 ret = snd_soc_component_write(tas2764->component, TAS2764_INT_MASK4, 0xff);
688 if (ret < 0)
689 return ret;
690
691 ret = devm_request_threaded_irq(tas2764->dev, tas2764->irq, NULL, tas2764_irq,
692 IRQF_ONESHOT | IRQF_SHARED | IRQF_TRIGGER_LOW,
693 "tas2764", tas2764);
694 if (ret)
695 dev_warn(tas2764->dev, "failed to request IRQ: %d\n", ret);
696 }
697
698 ret = snd_soc_component_update_bits(tas2764->component, TAS2764_TDM_CFG5,
699 TAS2764_TDM_CFG5_VSNS_ENABLE, 0);
700 if (ret < 0)
701 return ret;
702
703 ret = snd_soc_component_update_bits(tas2764->component, TAS2764_TDM_CFG6,
704 TAS2764_TDM_CFG6_ISNS_ENABLE, 0);
705 if (ret < 0)
706 return ret;
707
708 switch (tas2764->devid) {
709 case DEVID_SN012776:
710 ret = snd_soc_component_update_bits(component, TAS2764_PWR_CTRL,
711 TAS2764_PWR_CTRL_BOP_SRC,
712 TAS2764_PWR_CTRL_BOP_SRC);
713 if (ret < 0)
714 return ret;
715
716 for (i = 0; i < ARRAY_SIZE(sn012776_bop_presets); i++) {
717 ret = snd_soc_component_write(component,
718 TAS2764_BOP_CFG0 + i,
719 sn012776_bop_presets[i]);
720
721 if (ret < 0)
722 return ret;
723 }
724
725 /* Apply all enabled Apple quirks */
726 ret = tas2764_apply_init_quirks(tas2764);
727
728 if (ret < 0)
729 return ret;
730
731 break;
732 default:
733 break;
734 }
735
736 return 0;
737 }
738
739 static DECLARE_TLV_DB_SCALE(tas2764_digital_tlv, 1100, 50, 0);
740 static DECLARE_TLV_DB_SCALE(tas2764_playback_volume, -10050, 50, 1);
741
742 static const char * const tas2764_hpf_texts[] = {
743 "Disabled", "2 Hz", "50 Hz", "100 Hz", "200 Hz",
744 "400 Hz", "800 Hz"
745 };
746
747 static SOC_ENUM_SINGLE_DECL(
748 tas2764_hpf_enum, TAS2764_DC_BLK0,
749 TAS2764_DC_BLK0_HPF_FREQ_PB_SHIFT, tas2764_hpf_texts);
750
751 static const char * const tas2764_oce_texts[] = {
752 "Disable", "Retry",
753 };
754
755 static SOC_ENUM_SINGLE_DECL(
756 tas2764_oce_enum, TAS2764_MISC_CFG1,
757 TAS2764_MISC_CFG1_OCE_RETRY_SHIFT, tas2764_oce_texts);
758
759 static const struct snd_kcontrol_new tas2764_snd_controls[] = {
760 SOC_SINGLE_TLV("Speaker Volume", TAS2764_DVC, 0,
761 TAS2764_DVC_MAX, 1, tas2764_playback_volume),
762 SOC_SINGLE_TLV("Amp Gain Volume", TAS2764_CHNL_0, 1, 0x14, 0,
763 tas2764_digital_tlv),
764 SOC_ENUM("HPF Corner Frequency", tas2764_hpf_enum),
765 SOC_ENUM("OCE Handling", tas2764_oce_enum),
766 };
767
768 static const struct snd_soc_component_driver soc_component_driver_tas2764 = {
769 .probe = tas2764_codec_probe,
770 .suspend = tas2764_codec_suspend,
771 .resume = tas2764_codec_resume,
772 .controls = tas2764_snd_controls,
773 .num_controls = ARRAY_SIZE(tas2764_snd_controls),
774 .dapm_widgets = tas2764_dapm_widgets,
775 .num_dapm_widgets = ARRAY_SIZE(tas2764_dapm_widgets),
776 .dapm_routes = tas2764_audio_map,
777 .num_dapm_routes = ARRAY_SIZE(tas2764_audio_map),
778 .idle_bias_on = 1,
779 .endianness = 1,
780 };
781
782 static const struct reg_default tas2764_reg_defaults[] = {
783 { TAS2764_PAGE, 0x00 },
784 { TAS2764_SW_RST, 0x00 },
785 { TAS2764_PWR_CTRL, 0x1a },
786 { TAS2764_DVC, 0x00 },
787 { TAS2764_CHNL_0, 0x28 },
788 { TAS2764_TDM_CFG0, 0x09 },
789 { TAS2764_TDM_CFG1, 0x02 },
790 { TAS2764_TDM_CFG2, 0x0a },
791 { TAS2764_TDM_CFG3, 0x10 },
792 { TAS2764_TDM_CFG5, 0x42 },
793 { TAS2764_INT_CLK_CFG, 0x19 },
794 };
795
796 static const struct regmap_range_cfg tas2764_regmap_ranges[] = {
797 {
798 .range_min = 0,
799 .range_max = 0xffff,
800 .selector_reg = TAS2764_PAGE,
801 .selector_mask = 0xff,
802 .selector_shift = 0,
803 .window_start = 0,
804 .window_len = 128,
805 },
806 };
807
tas2764_volatile_register(struct device * dev,unsigned int reg)808 static bool tas2764_volatile_register(struct device *dev, unsigned int reg)
809 {
810 switch (reg) {
811 case TAS2764_SW_RST:
812 case TAS2764_INT_LTCH0 ... TAS2764_INT_LTCH4:
813 case TAS2764_INT_CLK_CFG:
814 return true;
815 case TAS2764_REG(0xf0, 0x0) ... TAS2764_REG(0xff, 0x0):
816 /* TI's undocumented registers for the application of quirks */
817 return true;
818 default:
819 return false;
820 }
821 }
822
823 static const struct regmap_config tas2764_i2c_regmap = {
824 .reg_bits = 8,
825 .val_bits = 8,
826 .volatile_reg = tas2764_volatile_register,
827 .reg_defaults = tas2764_reg_defaults,
828 .num_reg_defaults = ARRAY_SIZE(tas2764_reg_defaults),
829 .cache_type = REGCACHE_RBTREE,
830 .ranges = tas2764_regmap_ranges,
831 .num_ranges = ARRAY_SIZE(tas2764_regmap_ranges),
832 .max_register = 0xffff,
833 };
834
tas2764_parse_dt(struct device * dev,struct tas2764_priv * tas2764)835 static int tas2764_parse_dt(struct device *dev, struct tas2764_priv *tas2764)
836 {
837 int ret = 0;
838
839 tas2764->reset_gpio = devm_gpiod_get_optional(tas2764->dev, "reset",
840 GPIOD_OUT_HIGH);
841 if (IS_ERR(tas2764->reset_gpio)) {
842 if (PTR_ERR(tas2764->reset_gpio) == -EPROBE_DEFER) {
843 tas2764->reset_gpio = NULL;
844 return -EPROBE_DEFER;
845 }
846 }
847
848 tas2764->sdz_gpio = devm_gpiod_get_optional(dev, "shutdown", GPIOD_OUT_HIGH);
849 if (IS_ERR(tas2764->sdz_gpio)) {
850 if (PTR_ERR(tas2764->sdz_gpio) == -EPROBE_DEFER)
851 return -EPROBE_DEFER;
852
853 tas2764->sdz_gpio = NULL;
854 }
855
856 ret = fwnode_property_read_u32(dev->fwnode, "ti,imon-slot-no",
857 &tas2764->i_sense_slot);
858 if (ret)
859 tas2764->i_sense_slot = 0;
860
861 ret = fwnode_property_read_u32(dev->fwnode, "ti,vmon-slot-no",
862 &tas2764->v_sense_slot);
863 if (ret)
864 tas2764->v_sense_slot = 2;
865
866 return 0;
867 }
868
tas2764_i2c_probe(struct i2c_client * client)869 static int tas2764_i2c_probe(struct i2c_client *client)
870 {
871 struct tas2764_priv *tas2764;
872 int result;
873
874 tas2764 = devm_kzalloc(&client->dev, sizeof(struct tas2764_priv),
875 GFP_KERNEL);
876 if (!tas2764)
877 return -ENOMEM;
878
879 tas2764->devid = (kernel_ulong_t)of_device_get_match_data(&client->dev);
880
881 tas2764->dev = &client->dev;
882 tas2764->irq = client->irq;
883 i2c_set_clientdata(client, tas2764);
884 dev_set_drvdata(&client->dev, tas2764);
885
886 tas2764->regmap = devm_regmap_init_i2c(client, &tas2764_i2c_regmap);
887 if (IS_ERR(tas2764->regmap)) {
888 result = PTR_ERR(tas2764->regmap);
889 dev_err(&client->dev, "Failed to allocate register map: %d\n",
890 result);
891 return result;
892 }
893
894 if (client->dev.of_node) {
895 result = tas2764_parse_dt(&client->dev, tas2764);
896 if (result) {
897 dev_err(tas2764->dev, "%s: Failed to parse devicetree\n",
898 __func__);
899 return result;
900 }
901 }
902
903 if (IS_REACHABLE(CONFIG_HWMON)) {
904 struct device *hwmon;
905
906 hwmon = devm_hwmon_device_register_with_info(&client->dev, "tas2764",
907 tas2764,
908 &tas2764_hwmon_chip_info,
909 NULL);
910 if (IS_ERR(hwmon)) {
911 return dev_err_probe(&client->dev, PTR_ERR(hwmon),
912 "Failed to register temp sensor\n");
913 }
914 }
915
916
917 return devm_snd_soc_register_component(tas2764->dev,
918 &soc_component_driver_tas2764,
919 tas2764_dai_driver,
920 ARRAY_SIZE(tas2764_dai_driver));
921 }
922
923 static const struct i2c_device_id tas2764_i2c_id[] = {
924 { "tas2764"},
925 { }
926 };
927 MODULE_DEVICE_TABLE(i2c, tas2764_i2c_id);
928
929 #if defined(CONFIG_OF)
930 static const struct of_device_id tas2764_of_match[] = {
931 { .compatible = "ti,tas2764", .data = (void *)DEVID_TAS2764 },
932 { .compatible = "ti,sn012776", .data = (void *)DEVID_SN012776 },
933 {},
934 };
935 MODULE_DEVICE_TABLE(of, tas2764_of_match);
936 #endif
937
938 static struct i2c_driver tas2764_i2c_driver = {
939 .driver = {
940 .name = "tas2764",
941 .of_match_table = of_match_ptr(tas2764_of_match),
942 },
943 .probe = tas2764_i2c_probe,
944 .id_table = tas2764_i2c_id,
945 };
946 module_i2c_driver(tas2764_i2c_driver);
947
948 MODULE_AUTHOR("Dan Murphy <dmurphy@ti.com>");
949 MODULE_DESCRIPTION("TAS2764 I2C Smart Amplifier driver");
950 MODULE_LICENSE("GPL v2");
951