1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* Copyright (C) 2018 Microchip Technology Inc. */ 3 4 #include <linux/module.h> 5 #include <linux/pci.h> 6 #include <linux/netdevice.h> 7 #include <linux/etherdevice.h> 8 #include <linux/crc32.h> 9 #include <linux/microchipphy.h> 10 #include <linux/net_tstamp.h> 11 #include <linux/of_mdio.h> 12 #include <linux/of_net.h> 13 #include <linux/phy.h> 14 #include <linux/phy_fixed.h> 15 #include <linux/rtnetlink.h> 16 #include <linux/iopoll.h> 17 #include <linux/crc16.h> 18 #include <linux/phylink.h> 19 #include "lan743x_main.h" 20 #include "lan743x_ethtool.h" 21 22 #define MMD_ACCESS_ADDRESS 0 23 #define MMD_ACCESS_WRITE 1 24 #define MMD_ACCESS_READ 2 25 #define MMD_ACCESS_READ_INC 3 26 #define PCS_POWER_STATE_DOWN 0x6 27 #define PCS_POWER_STATE_UP 0x4 28 29 #define RFE_RD_FIFO_TH_3_DWORDS 0x3 30 31 static bool pci11x1x_is_a0(struct lan743x_adapter *adapter) 32 { 33 u32 dev_rev = adapter->csr.id_rev & ID_REV_CHIP_REV_MASK_; 34 return dev_rev == ID_REV_CHIP_REV_PCI11X1X_A0_; 35 } 36 37 static void pci11x1x_strap_get_status(struct lan743x_adapter *adapter) 38 { 39 u32 fpga_rev; 40 u32 cfg_load; 41 u32 hw_cfg; 42 u32 strap; 43 int ret; 44 45 /* Timeout = 100 (i.e. 1 sec (10 msce * 100)) */ 46 ret = lan743x_hs_syslock_acquire(adapter, 100); 47 if (ret < 0) { 48 netif_err(adapter, drv, adapter->netdev, 49 "Sys Lock acquire failed ret:%d\n", ret); 50 return; 51 } 52 53 cfg_load = lan743x_csr_read(adapter, ETH_SYS_CONFIG_LOAD_STARTED_REG); 54 lan743x_hs_syslock_release(adapter); 55 hw_cfg = lan743x_csr_read(adapter, HW_CFG); 56 strap = lan743x_csr_read(adapter, STRAP_READ); 57 if ((pci11x1x_is_a0(adapter) && 58 (cfg_load & GEN_SYS_LOAD_STARTED_REG_ETH_ || 59 hw_cfg & HW_CFG_RST_PROTECT_)) || 60 (strap & STRAP_READ_USE_SGMII_EN_)) { 61 if (strap & STRAP_READ_SGMII_EN_) 62 adapter->is_sgmii_en = true; 63 else 64 adapter->is_sgmii_en = false; 65 } else { 66 fpga_rev = lan743x_csr_read(adapter, FPGA_REV); 67 if (fpga_rev) { 68 if (fpga_rev & FPGA_SGMII_OP) 69 adapter->is_sgmii_en = true; 70 else 71 adapter->is_sgmii_en = false; 72 } else { 73 adapter->is_sgmii_en = false; 74 } 75 } 76 netif_dbg(adapter, drv, adapter->netdev, 77 "SGMII I/F %sable\n", adapter->is_sgmii_en ? "En" : "Dis"); 78 } 79 80 static bool is_pci11x1x_chip(struct lan743x_adapter *adapter) 81 { 82 struct lan743x_csr *csr = &adapter->csr; 83 u32 id_rev = csr->id_rev; 84 85 if (((id_rev & 0xFFFF0000) == ID_REV_ID_A011_) || 86 ((id_rev & 0xFFFF0000) == ID_REV_ID_A041_)) { 87 return true; 88 } 89 return false; 90 } 91 92 static void lan743x_pci_cleanup(struct lan743x_adapter *adapter) 93 { 94 pci_release_selected_regions(adapter->pdev, 95 pci_select_bars(adapter->pdev, 96 IORESOURCE_MEM)); 97 pci_disable_device(adapter->pdev); 98 } 99 100 static int lan743x_pci_init(struct lan743x_adapter *adapter, 101 struct pci_dev *pdev) 102 { 103 unsigned long bars = 0; 104 int ret; 105 106 adapter->pdev = pdev; 107 ret = pci_enable_device_mem(pdev); 108 if (ret) 109 goto return_error; 110 111 dev_dbg(&adapter->pdev->dev, 112 "PCI: Vendor ID = 0x%04X, Device ID = 0x%04X\n", 113 pdev->vendor, pdev->device); 114 bars = pci_select_bars(pdev, IORESOURCE_MEM); 115 if (!test_bit(0, &bars)) 116 goto disable_device; 117 118 ret = pci_request_selected_regions(pdev, bars, DRIVER_NAME); 119 if (ret) 120 goto disable_device; 121 122 pci_set_master(pdev); 123 return 0; 124 125 disable_device: 126 pci_disable_device(adapter->pdev); 127 128 return_error: 129 return ret; 130 } 131 132 u32 lan743x_csr_read(struct lan743x_adapter *adapter, int offset) 133 { 134 return ioread32(&adapter->csr.csr_address[offset]); 135 } 136 137 void lan743x_csr_write(struct lan743x_adapter *adapter, int offset, 138 u32 data) 139 { 140 iowrite32(data, &adapter->csr.csr_address[offset]); 141 } 142 143 #define LAN743X_CSR_READ_OP(offset) lan743x_csr_read(adapter, offset) 144 145 static int lan743x_csr_light_reset(struct lan743x_adapter *adapter) 146 { 147 u32 data; 148 149 data = lan743x_csr_read(adapter, HW_CFG); 150 data |= HW_CFG_LRST_; 151 lan743x_csr_write(adapter, HW_CFG, data); 152 153 return readx_poll_timeout(LAN743X_CSR_READ_OP, HW_CFG, data, 154 !(data & HW_CFG_LRST_), 100000, 10000000); 155 } 156 157 static int lan743x_csr_wait_for_bit_atomic(struct lan743x_adapter *adapter, 158 int offset, u32 bit_mask, 159 int target_value, int udelay_min, 160 int udelay_max, int count) 161 { 162 u32 data; 163 164 return readx_poll_timeout_atomic(LAN743X_CSR_READ_OP, offset, data, 165 target_value == !!(data & bit_mask), 166 udelay_max, udelay_min * count); 167 } 168 169 static int lan743x_csr_wait_for_bit(struct lan743x_adapter *adapter, 170 int offset, u32 bit_mask, 171 int target_value, int usleep_min, 172 int usleep_max, int count) 173 { 174 u32 data; 175 176 return readx_poll_timeout(LAN743X_CSR_READ_OP, offset, data, 177 target_value == !!(data & bit_mask), 178 usleep_max, usleep_min * count); 179 } 180 181 static int lan743x_csr_init(struct lan743x_adapter *adapter) 182 { 183 struct lan743x_csr *csr = &adapter->csr; 184 resource_size_t bar_start, bar_length; 185 186 bar_start = pci_resource_start(adapter->pdev, 0); 187 bar_length = pci_resource_len(adapter->pdev, 0); 188 csr->csr_address = devm_ioremap(&adapter->pdev->dev, 189 bar_start, bar_length); 190 if (!csr->csr_address) 191 return -ENOMEM; 192 193 csr->id_rev = lan743x_csr_read(adapter, ID_REV); 194 csr->fpga_rev = lan743x_csr_read(adapter, FPGA_REV); 195 dev_dbg(&adapter->pdev->dev, 196 "ID_REV = 0x%08X, FPGA_REV = %d.%d\n", 197 csr->id_rev, FPGA_REV_GET_MAJOR_(csr->fpga_rev), 198 FPGA_REV_GET_MINOR_(csr->fpga_rev)); 199 if (!ID_REV_IS_VALID_CHIP_ID_(csr->id_rev)) 200 return -ENODEV; 201 202 csr->flags = LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR; 203 switch (csr->id_rev & ID_REV_CHIP_REV_MASK_) { 204 case ID_REV_CHIP_REV_A0_: 205 csr->flags |= LAN743X_CSR_FLAG_IS_A0; 206 csr->flags &= ~LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR; 207 break; 208 case ID_REV_CHIP_REV_B0_: 209 csr->flags |= LAN743X_CSR_FLAG_IS_B0; 210 break; 211 } 212 213 return lan743x_csr_light_reset(adapter); 214 } 215 216 static void lan743x_intr_software_isr(struct lan743x_adapter *adapter) 217 { 218 struct lan743x_intr *intr = &adapter->intr; 219 220 /* disable the interrupt to prevent repeated re-triggering */ 221 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_SW_GP_); 222 intr->software_isr_flag = true; 223 wake_up(&intr->software_isr_wq); 224 } 225 226 static void lan743x_tx_isr(void *context, u32 int_sts, u32 flags) 227 { 228 struct lan743x_tx *tx = context; 229 struct lan743x_adapter *adapter = tx->adapter; 230 bool enable_flag = true; 231 232 lan743x_csr_read(adapter, INT_EN_SET); 233 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR) { 234 lan743x_csr_write(adapter, INT_EN_CLR, 235 INT_BIT_DMA_TX_(tx->channel_number)); 236 } 237 238 if (int_sts & INT_BIT_DMA_TX_(tx->channel_number)) { 239 u32 ioc_bit = DMAC_INT_BIT_TX_IOC_(tx->channel_number); 240 u32 dmac_int_sts; 241 u32 dmac_int_en; 242 243 if (flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ) 244 dmac_int_sts = lan743x_csr_read(adapter, DMAC_INT_STS); 245 else 246 dmac_int_sts = ioc_bit; 247 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK) 248 dmac_int_en = lan743x_csr_read(adapter, 249 DMAC_INT_EN_SET); 250 else 251 dmac_int_en = ioc_bit; 252 253 dmac_int_en &= ioc_bit; 254 dmac_int_sts &= dmac_int_en; 255 if (dmac_int_sts & ioc_bit) { 256 napi_schedule(&tx->napi); 257 enable_flag = false;/* poll func will enable later */ 258 } 259 } 260 261 if (enable_flag) 262 /* enable isr */ 263 lan743x_csr_write(adapter, INT_EN_SET, 264 INT_BIT_DMA_TX_(tx->channel_number)); 265 } 266 267 static void lan743x_rx_isr(void *context, u32 int_sts, u32 flags) 268 { 269 struct lan743x_rx *rx = context; 270 struct lan743x_adapter *adapter = rx->adapter; 271 bool enable_flag = true; 272 273 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR) { 274 lan743x_csr_write(adapter, INT_EN_CLR, 275 INT_BIT_DMA_RX_(rx->channel_number)); 276 } 277 278 if (int_sts & INT_BIT_DMA_RX_(rx->channel_number)) { 279 u32 rx_frame_bit = DMAC_INT_BIT_RXFRM_(rx->channel_number); 280 u32 dmac_int_sts; 281 u32 dmac_int_en; 282 283 if (flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ) 284 dmac_int_sts = lan743x_csr_read(adapter, DMAC_INT_STS); 285 else 286 dmac_int_sts = rx_frame_bit; 287 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK) 288 dmac_int_en = lan743x_csr_read(adapter, 289 DMAC_INT_EN_SET); 290 else 291 dmac_int_en = rx_frame_bit; 292 293 dmac_int_en &= rx_frame_bit; 294 dmac_int_sts &= dmac_int_en; 295 if (dmac_int_sts & rx_frame_bit) { 296 napi_schedule(&rx->napi); 297 enable_flag = false;/* poll funct will enable later */ 298 } 299 } 300 301 if (enable_flag) { 302 /* enable isr */ 303 lan743x_csr_write(adapter, INT_EN_SET, 304 INT_BIT_DMA_RX_(rx->channel_number)); 305 } 306 } 307 308 static void lan743x_intr_shared_isr(void *context, u32 int_sts, u32 flags) 309 { 310 struct lan743x_adapter *adapter = context; 311 unsigned int channel; 312 313 if (int_sts & INT_BIT_ALL_RX_) { 314 for (channel = 0; channel < LAN743X_USED_RX_CHANNELS; 315 channel++) { 316 u32 int_bit = INT_BIT_DMA_RX_(channel); 317 318 if (int_sts & int_bit) { 319 lan743x_rx_isr(&adapter->rx[channel], 320 int_bit, flags); 321 int_sts &= ~int_bit; 322 } 323 } 324 } 325 if (int_sts & INT_BIT_ALL_TX_) { 326 for (channel = 0; channel < adapter->used_tx_channels; 327 channel++) { 328 u32 int_bit = INT_BIT_DMA_TX_(channel); 329 330 if (int_sts & int_bit) { 331 lan743x_tx_isr(&adapter->tx[channel], 332 int_bit, flags); 333 int_sts &= ~int_bit; 334 } 335 } 336 } 337 if (int_sts & INT_BIT_ALL_OTHER_) { 338 if (int_sts & INT_BIT_SW_GP_) { 339 lan743x_intr_software_isr(adapter); 340 int_sts &= ~INT_BIT_SW_GP_; 341 } 342 if (int_sts & INT_BIT_1588_) { 343 lan743x_ptp_isr(adapter); 344 int_sts &= ~INT_BIT_1588_; 345 } 346 } 347 if (int_sts) 348 lan743x_csr_write(adapter, INT_EN_CLR, int_sts); 349 } 350 351 static irqreturn_t lan743x_intr_entry_isr(int irq, void *ptr) 352 { 353 struct lan743x_vector *vector = ptr; 354 struct lan743x_adapter *adapter = vector->adapter; 355 irqreturn_t result = IRQ_NONE; 356 u32 int_enables; 357 u32 int_sts; 358 359 if (vector->flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ) { 360 int_sts = lan743x_csr_read(adapter, INT_STS); 361 } else if (vector->flags & 362 (LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C | 363 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C)) { 364 int_sts = lan743x_csr_read(adapter, INT_STS_R2C); 365 } else { 366 /* use mask as implied status */ 367 int_sts = vector->int_mask | INT_BIT_MAS_; 368 } 369 370 if (!(int_sts & INT_BIT_MAS_)) 371 goto irq_done; 372 373 if (vector->flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR) 374 /* disable vector interrupt */ 375 lan743x_csr_write(adapter, 376 INT_VEC_EN_CLR, 377 INT_VEC_EN_(vector->vector_index)); 378 379 if (vector->flags & LAN743X_VECTOR_FLAG_MASTER_ENABLE_CLEAR) 380 /* disable master interrupt */ 381 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_MAS_); 382 383 if (vector->flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK) { 384 int_enables = lan743x_csr_read(adapter, INT_EN_SET); 385 } else { 386 /* use vector mask as implied enable mask */ 387 int_enables = vector->int_mask; 388 } 389 390 int_sts &= int_enables; 391 int_sts &= vector->int_mask; 392 if (int_sts) { 393 if (vector->handler) { 394 vector->handler(vector->context, 395 int_sts, vector->flags); 396 } else { 397 /* disable interrupts on this vector */ 398 lan743x_csr_write(adapter, INT_EN_CLR, 399 vector->int_mask); 400 } 401 result = IRQ_HANDLED; 402 } 403 404 if (vector->flags & LAN743X_VECTOR_FLAG_MASTER_ENABLE_SET) 405 /* enable master interrupt */ 406 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_MAS_); 407 408 if (vector->flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET) 409 /* enable vector interrupt */ 410 lan743x_csr_write(adapter, 411 INT_VEC_EN_SET, 412 INT_VEC_EN_(vector->vector_index)); 413 irq_done: 414 return result; 415 } 416 417 static int lan743x_intr_test_isr(struct lan743x_adapter *adapter) 418 { 419 struct lan743x_intr *intr = &adapter->intr; 420 int ret; 421 422 intr->software_isr_flag = false; 423 424 /* enable and activate test interrupt */ 425 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_SW_GP_); 426 lan743x_csr_write(adapter, INT_SET, INT_BIT_SW_GP_); 427 428 ret = wait_event_timeout(intr->software_isr_wq, 429 intr->software_isr_flag, 430 msecs_to_jiffies(200)); 431 432 /* disable test interrupt */ 433 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_SW_GP_); 434 435 return ret > 0 ? 0 : -ENODEV; 436 } 437 438 static int lan743x_intr_register_isr(struct lan743x_adapter *adapter, 439 int vector_index, u32 flags, 440 u32 int_mask, 441 lan743x_vector_handler handler, 442 void *context) 443 { 444 struct lan743x_vector *vector = &adapter->intr.vector_list 445 [vector_index]; 446 int ret; 447 448 vector->adapter = adapter; 449 vector->flags = flags; 450 vector->vector_index = vector_index; 451 vector->int_mask = int_mask; 452 vector->handler = handler; 453 vector->context = context; 454 455 ret = request_irq(vector->irq, 456 lan743x_intr_entry_isr, 457 (flags & LAN743X_VECTOR_FLAG_IRQ_SHARED) ? 458 IRQF_SHARED : 0, DRIVER_NAME, vector); 459 if (ret) { 460 vector->handler = NULL; 461 vector->context = NULL; 462 vector->int_mask = 0; 463 vector->flags = 0; 464 } 465 return ret; 466 } 467 468 static void lan743x_intr_unregister_isr(struct lan743x_adapter *adapter, 469 int vector_index) 470 { 471 struct lan743x_vector *vector = &adapter->intr.vector_list 472 [vector_index]; 473 474 free_irq(vector->irq, vector); 475 vector->handler = NULL; 476 vector->context = NULL; 477 vector->int_mask = 0; 478 vector->flags = 0; 479 } 480 481 static u32 lan743x_intr_get_vector_flags(struct lan743x_adapter *adapter, 482 u32 int_mask) 483 { 484 int index; 485 486 for (index = 0; index < adapter->max_vector_count; index++) { 487 if (adapter->intr.vector_list[index].int_mask & int_mask) 488 return adapter->intr.vector_list[index].flags; 489 } 490 return 0; 491 } 492 493 static void lan743x_intr_close(struct lan743x_adapter *adapter) 494 { 495 struct lan743x_intr *intr = &adapter->intr; 496 int index = 0; 497 498 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_MAS_); 499 if (adapter->is_pci11x1x) 500 lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0x0000FFFF); 501 else 502 lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0x000000FF); 503 504 for (index = 0; index < intr->number_of_vectors; index++) { 505 if (intr->flags & INTR_FLAG_IRQ_REQUESTED(index)) { 506 lan743x_intr_unregister_isr(adapter, index); 507 intr->flags &= ~INTR_FLAG_IRQ_REQUESTED(index); 508 } 509 } 510 511 if (intr->flags & INTR_FLAG_MSI_ENABLED) { 512 pci_disable_msi(adapter->pdev); 513 intr->flags &= ~INTR_FLAG_MSI_ENABLED; 514 } 515 516 if (intr->flags & INTR_FLAG_MSIX_ENABLED) { 517 pci_disable_msix(adapter->pdev); 518 intr->flags &= ~INTR_FLAG_MSIX_ENABLED; 519 } 520 } 521 522 static int lan743x_intr_open(struct lan743x_adapter *adapter) 523 { 524 struct msix_entry msix_entries[PCI11X1X_MAX_VECTOR_COUNT]; 525 struct lan743x_intr *intr = &adapter->intr; 526 unsigned int used_tx_channels; 527 u32 int_vec_en_auto_clr = 0; 528 u8 max_vector_count; 529 u32 int_vec_map0 = 0; 530 u32 int_vec_map1 = 0; 531 int ret = -ENODEV; 532 int index = 0; 533 u32 flags = 0; 534 535 intr->number_of_vectors = 0; 536 537 /* Try to set up MSIX interrupts */ 538 max_vector_count = adapter->max_vector_count; 539 memset(&msix_entries[0], 0, 540 sizeof(struct msix_entry) * max_vector_count); 541 for (index = 0; index < max_vector_count; index++) 542 msix_entries[index].entry = index; 543 used_tx_channels = adapter->used_tx_channels; 544 ret = pci_enable_msix_range(adapter->pdev, 545 msix_entries, 1, 546 1 + used_tx_channels + 547 LAN743X_USED_RX_CHANNELS); 548 549 if (ret > 0) { 550 intr->flags |= INTR_FLAG_MSIX_ENABLED; 551 intr->number_of_vectors = ret; 552 intr->using_vectors = true; 553 for (index = 0; index < intr->number_of_vectors; index++) 554 intr->vector_list[index].irq = msix_entries 555 [index].vector; 556 netif_info(adapter, ifup, adapter->netdev, 557 "using MSIX interrupts, number of vectors = %d\n", 558 intr->number_of_vectors); 559 } 560 561 /* If MSIX failed try to setup using MSI interrupts */ 562 if (!intr->number_of_vectors) { 563 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) { 564 if (!pci_enable_msi(adapter->pdev)) { 565 intr->flags |= INTR_FLAG_MSI_ENABLED; 566 intr->number_of_vectors = 1; 567 intr->using_vectors = true; 568 intr->vector_list[0].irq = 569 adapter->pdev->irq; 570 netif_info(adapter, ifup, adapter->netdev, 571 "using MSI interrupts, number of vectors = %d\n", 572 intr->number_of_vectors); 573 } 574 } 575 } 576 577 /* If MSIX, and MSI failed, setup using legacy interrupt */ 578 if (!intr->number_of_vectors) { 579 intr->number_of_vectors = 1; 580 intr->using_vectors = false; 581 intr->vector_list[0].irq = intr->irq; 582 netif_info(adapter, ifup, adapter->netdev, 583 "using legacy interrupts\n"); 584 } 585 586 /* At this point we must have at least one irq */ 587 lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0xFFFFFFFF); 588 589 /* map all interrupts to vector 0 */ 590 lan743x_csr_write(adapter, INT_VEC_MAP0, 0x00000000); 591 lan743x_csr_write(adapter, INT_VEC_MAP1, 0x00000000); 592 lan743x_csr_write(adapter, INT_VEC_MAP2, 0x00000000); 593 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ | 594 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C | 595 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK | 596 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR; 597 598 if (intr->using_vectors) { 599 flags |= LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR | 600 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET; 601 } else { 602 flags |= LAN743X_VECTOR_FLAG_MASTER_ENABLE_CLEAR | 603 LAN743X_VECTOR_FLAG_MASTER_ENABLE_SET | 604 LAN743X_VECTOR_FLAG_IRQ_SHARED; 605 } 606 607 if (adapter->csr.flags & LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) { 608 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ; 609 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C; 610 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR; 611 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK; 612 flags |= LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C; 613 flags |= LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C; 614 } 615 616 init_waitqueue_head(&intr->software_isr_wq); 617 618 ret = lan743x_intr_register_isr(adapter, 0, flags, 619 INT_BIT_ALL_RX_ | INT_BIT_ALL_TX_ | 620 INT_BIT_ALL_OTHER_, 621 lan743x_intr_shared_isr, adapter); 622 if (ret) 623 goto clean_up; 624 intr->flags |= INTR_FLAG_IRQ_REQUESTED(0); 625 626 if (intr->using_vectors) 627 lan743x_csr_write(adapter, INT_VEC_EN_SET, 628 INT_VEC_EN_(0)); 629 630 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) { 631 lan743x_csr_write(adapter, INT_MOD_CFG0, LAN743X_INT_MOD); 632 lan743x_csr_write(adapter, INT_MOD_CFG1, LAN743X_INT_MOD); 633 lan743x_csr_write(adapter, INT_MOD_CFG2, LAN743X_INT_MOD); 634 lan743x_csr_write(adapter, INT_MOD_CFG3, LAN743X_INT_MOD); 635 lan743x_csr_write(adapter, INT_MOD_CFG4, LAN743X_INT_MOD); 636 lan743x_csr_write(adapter, INT_MOD_CFG5, LAN743X_INT_MOD); 637 lan743x_csr_write(adapter, INT_MOD_CFG6, LAN743X_INT_MOD); 638 lan743x_csr_write(adapter, INT_MOD_CFG7, LAN743X_INT_MOD); 639 if (adapter->is_pci11x1x) { 640 lan743x_csr_write(adapter, INT_MOD_CFG8, LAN743X_INT_MOD); 641 lan743x_csr_write(adapter, INT_MOD_CFG9, LAN743X_INT_MOD); 642 lan743x_csr_write(adapter, INT_MOD_MAP0, 0x00007654); 643 lan743x_csr_write(adapter, INT_MOD_MAP1, 0x00003210); 644 } else { 645 lan743x_csr_write(adapter, INT_MOD_MAP0, 0x00005432); 646 lan743x_csr_write(adapter, INT_MOD_MAP1, 0x00000001); 647 } 648 lan743x_csr_write(adapter, INT_MOD_MAP2, 0x00FFFFFF); 649 } 650 651 /* enable interrupts */ 652 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_MAS_); 653 ret = lan743x_intr_test_isr(adapter); 654 if (ret) 655 goto clean_up; 656 657 if (intr->number_of_vectors > 1) { 658 int number_of_tx_vectors = intr->number_of_vectors - 1; 659 660 if (number_of_tx_vectors > used_tx_channels) 661 number_of_tx_vectors = used_tx_channels; 662 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ | 663 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C | 664 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK | 665 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR | 666 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR | 667 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET; 668 669 if (adapter->csr.flags & 670 LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) { 671 flags = LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET | 672 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET | 673 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR | 674 LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR; 675 } 676 677 for (index = 0; index < number_of_tx_vectors; index++) { 678 u32 int_bit = INT_BIT_DMA_TX_(index); 679 int vector = index + 1; 680 681 /* map TX interrupt to vector */ 682 int_vec_map1 |= INT_VEC_MAP1_TX_VEC_(index, vector); 683 lan743x_csr_write(adapter, INT_VEC_MAP1, int_vec_map1); 684 685 /* Remove TX interrupt from shared mask */ 686 intr->vector_list[0].int_mask &= ~int_bit; 687 ret = lan743x_intr_register_isr(adapter, vector, flags, 688 int_bit, lan743x_tx_isr, 689 &adapter->tx[index]); 690 if (ret) 691 goto clean_up; 692 intr->flags |= INTR_FLAG_IRQ_REQUESTED(vector); 693 if (!(flags & 694 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET)) 695 lan743x_csr_write(adapter, INT_VEC_EN_SET, 696 INT_VEC_EN_(vector)); 697 } 698 } 699 if ((intr->number_of_vectors - used_tx_channels) > 1) { 700 int number_of_rx_vectors = intr->number_of_vectors - 701 used_tx_channels - 1; 702 703 if (number_of_rx_vectors > LAN743X_USED_RX_CHANNELS) 704 number_of_rx_vectors = LAN743X_USED_RX_CHANNELS; 705 706 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ | 707 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C | 708 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK | 709 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR | 710 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR | 711 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET; 712 713 if (adapter->csr.flags & 714 LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) { 715 flags = LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR | 716 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET | 717 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET | 718 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR | 719 LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR; 720 } 721 for (index = 0; index < number_of_rx_vectors; index++) { 722 int vector = index + 1 + used_tx_channels; 723 u32 int_bit = INT_BIT_DMA_RX_(index); 724 725 /* map RX interrupt to vector */ 726 int_vec_map0 |= INT_VEC_MAP0_RX_VEC_(index, vector); 727 lan743x_csr_write(adapter, INT_VEC_MAP0, int_vec_map0); 728 if (flags & 729 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR) { 730 int_vec_en_auto_clr |= INT_VEC_EN_(vector); 731 lan743x_csr_write(adapter, INT_VEC_EN_AUTO_CLR, 732 int_vec_en_auto_clr); 733 } 734 735 /* Remove RX interrupt from shared mask */ 736 intr->vector_list[0].int_mask &= ~int_bit; 737 ret = lan743x_intr_register_isr(adapter, vector, flags, 738 int_bit, lan743x_rx_isr, 739 &adapter->rx[index]); 740 if (ret) 741 goto clean_up; 742 intr->flags |= INTR_FLAG_IRQ_REQUESTED(vector); 743 744 lan743x_csr_write(adapter, INT_VEC_EN_SET, 745 INT_VEC_EN_(vector)); 746 } 747 } 748 return 0; 749 750 clean_up: 751 lan743x_intr_close(adapter); 752 return ret; 753 } 754 755 static int lan743x_dp_write(struct lan743x_adapter *adapter, 756 u32 select, u32 addr, u32 length, u32 *buf) 757 { 758 u32 dp_sel; 759 int i; 760 761 if (lan743x_csr_wait_for_bit_atomic(adapter, DP_SEL, DP_SEL_DPRDY_, 762 1, 40, 100, 100)) 763 return -EIO; 764 dp_sel = lan743x_csr_read(adapter, DP_SEL); 765 dp_sel &= ~DP_SEL_MASK_; 766 dp_sel |= select; 767 lan743x_csr_write(adapter, DP_SEL, dp_sel); 768 769 for (i = 0; i < length; i++) { 770 lan743x_csr_write(adapter, DP_ADDR, addr + i); 771 lan743x_csr_write(adapter, DP_DATA_0, buf[i]); 772 lan743x_csr_write(adapter, DP_CMD, DP_CMD_WRITE_); 773 if (lan743x_csr_wait_for_bit_atomic(adapter, DP_SEL, 774 DP_SEL_DPRDY_, 775 1, 40, 100, 100)) 776 return -EIO; 777 } 778 779 return 0; 780 } 781 782 static u32 lan743x_mac_mii_access(u16 id, u16 index, int read) 783 { 784 u32 ret; 785 786 ret = (id << MAC_MII_ACC_PHY_ADDR_SHIFT_) & 787 MAC_MII_ACC_PHY_ADDR_MASK_; 788 ret |= (index << MAC_MII_ACC_MIIRINDA_SHIFT_) & 789 MAC_MII_ACC_MIIRINDA_MASK_; 790 791 if (read) 792 ret |= MAC_MII_ACC_MII_READ_; 793 else 794 ret |= MAC_MII_ACC_MII_WRITE_; 795 ret |= MAC_MII_ACC_MII_BUSY_; 796 797 return ret; 798 } 799 800 static int lan743x_mac_mii_wait_till_not_busy(struct lan743x_adapter *adapter) 801 { 802 u32 data; 803 804 return readx_poll_timeout(LAN743X_CSR_READ_OP, MAC_MII_ACC, data, 805 !(data & MAC_MII_ACC_MII_BUSY_), 0, 1000000); 806 } 807 808 static int lan743x_mdiobus_read_c22(struct mii_bus *bus, int phy_id, int index) 809 { 810 struct lan743x_adapter *adapter = bus->priv; 811 u32 val, mii_access; 812 int ret; 813 814 /* confirm MII not busy */ 815 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 816 if (ret < 0) 817 return ret; 818 819 /* set the address, index & direction (read from PHY) */ 820 mii_access = lan743x_mac_mii_access(phy_id, index, MAC_MII_READ); 821 lan743x_csr_write(adapter, MAC_MII_ACC, mii_access); 822 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 823 if (ret < 0) 824 return ret; 825 826 val = lan743x_csr_read(adapter, MAC_MII_DATA); 827 return (int)(val & 0xFFFF); 828 } 829 830 static int lan743x_mdiobus_write_c22(struct mii_bus *bus, 831 int phy_id, int index, u16 regval) 832 { 833 struct lan743x_adapter *adapter = bus->priv; 834 u32 val, mii_access; 835 int ret; 836 837 /* confirm MII not busy */ 838 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 839 if (ret < 0) 840 return ret; 841 val = (u32)regval; 842 lan743x_csr_write(adapter, MAC_MII_DATA, val); 843 844 /* set the address, index & direction (write to PHY) */ 845 mii_access = lan743x_mac_mii_access(phy_id, index, MAC_MII_WRITE); 846 lan743x_csr_write(adapter, MAC_MII_ACC, mii_access); 847 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 848 return ret; 849 } 850 851 static u32 lan743x_mac_mmd_access(int id, int dev_addr, int op) 852 { 853 u32 ret; 854 855 ret = (id << MAC_MII_ACC_PHY_ADDR_SHIFT_) & 856 MAC_MII_ACC_PHY_ADDR_MASK_; 857 ret |= (dev_addr << MAC_MII_ACC_MIIMMD_SHIFT_) & 858 MAC_MII_ACC_MIIMMD_MASK_; 859 if (op == MMD_ACCESS_WRITE) 860 ret |= MAC_MII_ACC_MIICMD_WRITE_; 861 else if (op == MMD_ACCESS_READ) 862 ret |= MAC_MII_ACC_MIICMD_READ_; 863 else if (op == MMD_ACCESS_READ_INC) 864 ret |= MAC_MII_ACC_MIICMD_READ_INC_; 865 else 866 ret |= MAC_MII_ACC_MIICMD_ADDR_; 867 ret |= (MAC_MII_ACC_MII_BUSY_ | MAC_MII_ACC_MIICL45_); 868 869 return ret; 870 } 871 872 static int lan743x_mdiobus_read_c45(struct mii_bus *bus, int phy_id, 873 int dev_addr, int index) 874 { 875 struct lan743x_adapter *adapter = bus->priv; 876 u32 mmd_access; 877 int ret; 878 879 /* confirm MII not busy */ 880 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 881 if (ret < 0) 882 return ret; 883 884 /* Load Register Address */ 885 lan743x_csr_write(adapter, MAC_MII_DATA, index); 886 mmd_access = lan743x_mac_mmd_access(phy_id, dev_addr, 887 MMD_ACCESS_ADDRESS); 888 lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access); 889 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 890 if (ret < 0) 891 return ret; 892 893 /* Read Data */ 894 mmd_access = lan743x_mac_mmd_access(phy_id, dev_addr, 895 MMD_ACCESS_READ); 896 lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access); 897 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 898 if (ret < 0) 899 return ret; 900 901 ret = lan743x_csr_read(adapter, MAC_MII_DATA); 902 return (int)(ret & 0xFFFF); 903 } 904 905 static int lan743x_mdiobus_write_c45(struct mii_bus *bus, int phy_id, 906 int dev_addr, int index, u16 regval) 907 { 908 struct lan743x_adapter *adapter = bus->priv; 909 u32 mmd_access; 910 int ret; 911 912 /* confirm MII not busy */ 913 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 914 if (ret < 0) 915 return ret; 916 917 /* Load Register Address */ 918 lan743x_csr_write(adapter, MAC_MII_DATA, (u32)index); 919 mmd_access = lan743x_mac_mmd_access(phy_id, dev_addr, 920 MMD_ACCESS_ADDRESS); 921 lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access); 922 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 923 if (ret < 0) 924 return ret; 925 926 /* Write Data */ 927 lan743x_csr_write(adapter, MAC_MII_DATA, (u32)regval); 928 mmd_access = lan743x_mac_mmd_access(phy_id, dev_addr, 929 MMD_ACCESS_WRITE); 930 lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access); 931 932 return lan743x_mac_mii_wait_till_not_busy(adapter); 933 } 934 935 static int lan743x_sgmii_wait_till_not_busy(struct lan743x_adapter *adapter) 936 { 937 u32 data; 938 int ret; 939 940 ret = readx_poll_timeout(LAN743X_CSR_READ_OP, SGMII_ACC, data, 941 !(data & SGMII_ACC_SGMII_BZY_), 100, 1000000); 942 if (ret < 0) 943 netif_err(adapter, drv, adapter->netdev, 944 "%s: error %d sgmii wait timeout\n", __func__, ret); 945 946 return ret; 947 } 948 949 int lan743x_sgmii_read(struct lan743x_adapter *adapter, u8 mmd, u16 addr) 950 { 951 u32 mmd_access; 952 int ret; 953 u32 val; 954 955 if (mmd > 31) { 956 dev_err(&adapter->pdev->dev, 957 "%s mmd should <= 31\n", __func__); 958 return -EINVAL; 959 } 960 961 mutex_lock(&adapter->sgmii_rw_lock); 962 /* Load Register Address */ 963 mmd_access = mmd << SGMII_ACC_SGMII_MMD_SHIFT_; 964 mmd_access |= (addr | SGMII_ACC_SGMII_BZY_); 965 lan743x_csr_write(adapter, SGMII_ACC, mmd_access); 966 ret = lan743x_sgmii_wait_till_not_busy(adapter); 967 if (ret < 0) 968 goto sgmii_unlock; 969 970 val = lan743x_csr_read(adapter, SGMII_DATA); 971 ret = (int)(val & SGMII_DATA_MASK_); 972 973 sgmii_unlock: 974 mutex_unlock(&adapter->sgmii_rw_lock); 975 976 return ret; 977 } 978 979 static int lan743x_sgmii_write(struct lan743x_adapter *adapter, 980 u8 mmd, u16 addr, u16 val) 981 { 982 u32 mmd_access; 983 int ret; 984 985 if (mmd > 31) { 986 dev_err(&adapter->pdev->dev, 987 "%s mmd should <= 31\n", __func__); 988 return -EINVAL; 989 } 990 mutex_lock(&adapter->sgmii_rw_lock); 991 /* Load Register Data */ 992 lan743x_csr_write(adapter, SGMII_DATA, (u32)(val & SGMII_DATA_MASK_)); 993 /* Load Register Address */ 994 mmd_access = mmd << SGMII_ACC_SGMII_MMD_SHIFT_; 995 mmd_access |= (addr | SGMII_ACC_SGMII_BZY_ | SGMII_ACC_SGMII_WR_); 996 lan743x_csr_write(adapter, SGMII_ACC, mmd_access); 997 ret = lan743x_sgmii_wait_till_not_busy(adapter); 998 mutex_unlock(&adapter->sgmii_rw_lock); 999 1000 return ret; 1001 } 1002 1003 static int lan743x_get_lsd(int speed, int duplex, u8 mss) 1004 { 1005 int lsd; 1006 1007 switch (speed) { 1008 case SPEED_2500: 1009 if (mss == MASTER_SLAVE_STATE_SLAVE) 1010 lsd = LINK_2500_SLAVE; 1011 else 1012 lsd = LINK_2500_MASTER; 1013 break; 1014 case SPEED_1000: 1015 if (mss == MASTER_SLAVE_STATE_SLAVE) 1016 lsd = LINK_1000_SLAVE; 1017 else 1018 lsd = LINK_1000_MASTER; 1019 break; 1020 case SPEED_100: 1021 if (duplex == DUPLEX_FULL) 1022 lsd = LINK_100FD; 1023 else 1024 lsd = LINK_100HD; 1025 break; 1026 case SPEED_10: 1027 if (duplex == DUPLEX_FULL) 1028 lsd = LINK_10FD; 1029 else 1030 lsd = LINK_10HD; 1031 break; 1032 default: 1033 lsd = -EINVAL; 1034 } 1035 1036 return lsd; 1037 } 1038 1039 static int lan743x_sgmii_mpll_set(struct lan743x_adapter *adapter, 1040 u16 baud) 1041 { 1042 int mpllctrl0; 1043 int mpllctrl1; 1044 int miscctrl1; 1045 int ret; 1046 1047 mpllctrl0 = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, 1048 VR_MII_GEN2_4_MPLL_CTRL0); 1049 if (mpllctrl0 < 0) 1050 return mpllctrl0; 1051 1052 mpllctrl0 &= ~VR_MII_MPLL_CTRL0_USE_REFCLK_PAD_; 1053 if (baud == VR_MII_BAUD_RATE_1P25GBPS) { 1054 mpllctrl1 = VR_MII_MPLL_MULTIPLIER_100; 1055 /* mpll_baud_clk/4 */ 1056 miscctrl1 = 0xA; 1057 } else { 1058 mpllctrl1 = VR_MII_MPLL_MULTIPLIER_125; 1059 /* mpll_baud_clk/2 */ 1060 miscctrl1 = 0x5; 1061 } 1062 1063 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, 1064 VR_MII_GEN2_4_MPLL_CTRL0, mpllctrl0); 1065 if (ret < 0) 1066 return ret; 1067 1068 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, 1069 VR_MII_GEN2_4_MPLL_CTRL1, mpllctrl1); 1070 if (ret < 0) 1071 return ret; 1072 1073 return lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, 1074 VR_MII_GEN2_4_MISC_CTRL1, miscctrl1); 1075 } 1076 1077 static int lan743x_sgmii_2_5G_mode_set(struct lan743x_adapter *adapter, 1078 bool enable) 1079 { 1080 if (enable) 1081 return lan743x_sgmii_mpll_set(adapter, 1082 VR_MII_BAUD_RATE_3P125GBPS); 1083 else 1084 return lan743x_sgmii_mpll_set(adapter, 1085 VR_MII_BAUD_RATE_1P25GBPS); 1086 } 1087 1088 static int lan743x_serdes_clock_and_aneg_update(struct lan743x_adapter *adapter) 1089 { 1090 enum lan743x_sgmii_lsd lsd = adapter->sgmii_lsd; 1091 int mii_ctrl; 1092 int dgt_ctrl; 1093 int an_ctrl; 1094 int ret; 1095 1096 if (lsd == LINK_2500_MASTER || lsd == LINK_2500_SLAVE) 1097 /* Switch to 2.5 Gbps */ 1098 ret = lan743x_sgmii_2_5G_mode_set(adapter, true); 1099 else 1100 /* Switch to 10/100/1000 Mbps clock */ 1101 ret = lan743x_sgmii_2_5G_mode_set(adapter, false); 1102 if (ret < 0) 1103 return ret; 1104 1105 /* Enable SGMII Auto NEG */ 1106 mii_ctrl = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, MII_BMCR); 1107 if (mii_ctrl < 0) 1108 return mii_ctrl; 1109 1110 an_ctrl = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, VR_MII_AN_CTRL); 1111 if (an_ctrl < 0) 1112 return an_ctrl; 1113 1114 dgt_ctrl = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, 1115 VR_MII_DIG_CTRL1); 1116 if (dgt_ctrl < 0) 1117 return dgt_ctrl; 1118 1119 if (lsd == LINK_2500_MASTER || lsd == LINK_2500_SLAVE) { 1120 mii_ctrl &= ~(BMCR_ANENABLE | BMCR_ANRESTART | BMCR_SPEED100); 1121 mii_ctrl |= BMCR_SPEED1000; 1122 dgt_ctrl |= VR_MII_DIG_CTRL1_CL37_TMR_OVR_RIDE_; 1123 dgt_ctrl &= ~VR_MII_DIG_CTRL1_MAC_AUTO_SW_; 1124 /* In order for Auto-Negotiation to operate properly at 1125 * 2.5 Gbps the 1.6ms link timer values must be adjusted 1126 * The VR_MII_LINK_TIMER_CTRL Register must be set to 1127 * 16'h7A1 and The CL37_TMR_OVR_RIDE bit of the 1128 * VR_MII_DIG_CTRL1 Register set to 1 1129 */ 1130 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, 1131 VR_MII_LINK_TIMER_CTRL, 0x7A1); 1132 if (ret < 0) 1133 return ret; 1134 } else { 1135 mii_ctrl |= (BMCR_ANENABLE | BMCR_ANRESTART); 1136 an_ctrl &= ~VR_MII_AN_CTRL_SGMII_LINK_STS_; 1137 dgt_ctrl &= ~VR_MII_DIG_CTRL1_CL37_TMR_OVR_RIDE_; 1138 dgt_ctrl |= VR_MII_DIG_CTRL1_MAC_AUTO_SW_; 1139 } 1140 1141 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, MII_BMCR, 1142 mii_ctrl); 1143 if (ret < 0) 1144 return ret; 1145 1146 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, 1147 VR_MII_DIG_CTRL1, dgt_ctrl); 1148 if (ret < 0) 1149 return ret; 1150 1151 return lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, 1152 VR_MII_AN_CTRL, an_ctrl); 1153 } 1154 1155 static int lan743x_pcs_seq_state(struct lan743x_adapter *adapter, u8 state) 1156 { 1157 u8 wait_cnt = 0; 1158 u32 dig_sts; 1159 1160 do { 1161 dig_sts = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, 1162 VR_MII_DIG_STS); 1163 if (((dig_sts & VR_MII_DIG_STS_PSEQ_STATE_MASK_) >> 1164 VR_MII_DIG_STS_PSEQ_STATE_POS_) == state) 1165 break; 1166 usleep_range(1000, 2000); 1167 } while (wait_cnt++ < 10); 1168 1169 if (wait_cnt >= 10) 1170 return -ETIMEDOUT; 1171 1172 return 0; 1173 } 1174 1175 static int lan743x_pcs_power_reset(struct lan743x_adapter *adapter) 1176 { 1177 int mii_ctl; 1178 int ret; 1179 1180 /* SGMII/1000/2500BASE-X PCS power down */ 1181 mii_ctl = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, MII_BMCR); 1182 if (mii_ctl < 0) 1183 return mii_ctl; 1184 1185 mii_ctl |= BMCR_PDOWN; 1186 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, MII_BMCR, mii_ctl); 1187 if (ret < 0) 1188 return ret; 1189 1190 ret = lan743x_pcs_seq_state(adapter, PCS_POWER_STATE_DOWN); 1191 if (ret < 0) 1192 return ret; 1193 1194 /* SGMII/1000/2500BASE-X PCS power up */ 1195 mii_ctl &= ~BMCR_PDOWN; 1196 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, MII_BMCR, mii_ctl); 1197 if (ret < 0) 1198 return ret; 1199 1200 return lan743x_pcs_seq_state(adapter, PCS_POWER_STATE_UP); 1201 } 1202 1203 static void lan743x_mac_set_address(struct lan743x_adapter *adapter, 1204 u8 *addr) 1205 { 1206 u32 addr_lo, addr_hi; 1207 1208 addr_lo = addr[0] | 1209 addr[1] << 8 | 1210 addr[2] << 16 | 1211 addr[3] << 24; 1212 addr_hi = addr[4] | 1213 addr[5] << 8; 1214 lan743x_csr_write(adapter, MAC_RX_ADDRL, addr_lo); 1215 lan743x_csr_write(adapter, MAC_RX_ADDRH, addr_hi); 1216 1217 ether_addr_copy(adapter->mac_address, addr); 1218 dev_dbg(&adapter->pdev->dev, "MAC address set to %pM\n", addr); 1219 } 1220 1221 static void lan743x_mac_rx_enable_fse(struct lan743x_adapter *adapter) 1222 { 1223 u32 mac_rx; 1224 bool rxen; 1225 1226 mac_rx = lan743x_csr_read(adapter, MAC_RX); 1227 if (mac_rx & MAC_RX_FSE_) 1228 return; 1229 1230 rxen = mac_rx & MAC_RX_RXEN_; 1231 if (rxen) { 1232 mac_rx &= ~MAC_RX_RXEN_; 1233 lan743x_csr_write(adapter, MAC_RX, mac_rx); 1234 lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_, 1235 1, 1000, 20000, 100); 1236 } 1237 1238 /* Per AN2948, hardware prevents modification of the FSE bit while the 1239 * MAC receiver is enabled (RXEN bit set). Use separate register write 1240 * to assert the FSE bit before enabling the RXEN bit in MAC_RX 1241 */ 1242 mac_rx |= MAC_RX_FSE_; 1243 lan743x_csr_write(adapter, MAC_RX, mac_rx); 1244 1245 if (rxen) { 1246 mac_rx |= MAC_RX_RXEN_; 1247 lan743x_csr_write(adapter, MAC_RX, mac_rx); 1248 } 1249 } 1250 1251 static int lan743x_mac_init(struct lan743x_adapter *adapter) 1252 { 1253 bool mac_address_valid = true; 1254 struct net_device *netdev; 1255 u32 mac_addr_hi = 0; 1256 u32 mac_addr_lo = 0; 1257 u32 data; 1258 1259 netdev = adapter->netdev; 1260 1261 /* disable auto duplex, and speed detection. Phylib does that */ 1262 data = lan743x_csr_read(adapter, MAC_CR); 1263 data &= ~(MAC_CR_ADD_ | MAC_CR_ASD_); 1264 data |= MAC_CR_CNTR_RST_; 1265 lan743x_csr_write(adapter, MAC_CR, data); 1266 1267 if (!is_valid_ether_addr(adapter->mac_address)) { 1268 mac_addr_hi = lan743x_csr_read(adapter, MAC_RX_ADDRH); 1269 mac_addr_lo = lan743x_csr_read(adapter, MAC_RX_ADDRL); 1270 adapter->mac_address[0] = mac_addr_lo & 0xFF; 1271 adapter->mac_address[1] = (mac_addr_lo >> 8) & 0xFF; 1272 adapter->mac_address[2] = (mac_addr_lo >> 16) & 0xFF; 1273 adapter->mac_address[3] = (mac_addr_lo >> 24) & 0xFF; 1274 adapter->mac_address[4] = mac_addr_hi & 0xFF; 1275 adapter->mac_address[5] = (mac_addr_hi >> 8) & 0xFF; 1276 1277 if (((mac_addr_hi & 0x0000FFFF) == 0x0000FFFF) && 1278 mac_addr_lo == 0xFFFFFFFF) { 1279 mac_address_valid = false; 1280 } else if (!is_valid_ether_addr(adapter->mac_address)) { 1281 mac_address_valid = false; 1282 } 1283 1284 if (!mac_address_valid) 1285 eth_random_addr(adapter->mac_address); 1286 } 1287 lan743x_mac_set_address(adapter, adapter->mac_address); 1288 eth_hw_addr_set(netdev, adapter->mac_address); 1289 1290 lan743x_mac_rx_enable_fse(adapter); 1291 1292 return 0; 1293 } 1294 1295 static int lan743x_mac_open(struct lan743x_adapter *adapter) 1296 { 1297 u32 temp; 1298 1299 temp = lan743x_csr_read(adapter, MAC_RX); 1300 lan743x_csr_write(adapter, MAC_RX, temp | MAC_RX_RXEN_); 1301 temp = lan743x_csr_read(adapter, MAC_TX); 1302 lan743x_csr_write(adapter, MAC_TX, temp | MAC_TX_TXEN_); 1303 return 0; 1304 } 1305 1306 static void lan743x_mac_close(struct lan743x_adapter *adapter) 1307 { 1308 u32 temp; 1309 1310 temp = lan743x_csr_read(adapter, MAC_TX); 1311 temp &= ~MAC_TX_TXEN_; 1312 lan743x_csr_write(adapter, MAC_TX, temp); 1313 lan743x_csr_wait_for_bit(adapter, MAC_TX, MAC_TX_TXD_, 1314 1, 1000, 20000, 100); 1315 1316 temp = lan743x_csr_read(adapter, MAC_RX); 1317 temp &= ~MAC_RX_RXEN_; 1318 lan743x_csr_write(adapter, MAC_RX, temp); 1319 lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_, 1320 1, 1000, 20000, 100); 1321 } 1322 1323 void lan743x_mac_flow_ctrl_set_enables(struct lan743x_adapter *adapter, 1324 bool tx_enable, bool rx_enable) 1325 { 1326 u32 flow_setting = 0; 1327 1328 /* set maximum pause time because when fifo space frees 1329 * up a zero value pause frame will be sent to release the pause 1330 */ 1331 flow_setting = MAC_FLOW_CR_FCPT_MASK_; 1332 if (tx_enable) 1333 flow_setting |= MAC_FLOW_CR_TX_FCEN_; 1334 if (rx_enable) 1335 flow_setting |= MAC_FLOW_CR_RX_FCEN_; 1336 lan743x_csr_write(adapter, MAC_FLOW, flow_setting); 1337 } 1338 1339 static int lan743x_mac_set_mtu(struct lan743x_adapter *adapter, int new_mtu) 1340 { 1341 int enabled = 0; 1342 u32 mac_rx = 0; 1343 1344 mac_rx = lan743x_csr_read(adapter, MAC_RX); 1345 if (mac_rx & MAC_RX_RXEN_) { 1346 enabled = 1; 1347 if (mac_rx & MAC_RX_RXD_) { 1348 lan743x_csr_write(adapter, MAC_RX, mac_rx); 1349 mac_rx &= ~MAC_RX_RXD_; 1350 } 1351 mac_rx &= ~MAC_RX_RXEN_; 1352 lan743x_csr_write(adapter, MAC_RX, mac_rx); 1353 lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_, 1354 1, 1000, 20000, 100); 1355 lan743x_csr_write(adapter, MAC_RX, mac_rx | MAC_RX_RXD_); 1356 } 1357 1358 mac_rx &= ~(MAC_RX_MAX_SIZE_MASK_); 1359 mac_rx |= (((new_mtu + ETH_HLEN + ETH_FCS_LEN) 1360 << MAC_RX_MAX_SIZE_SHIFT_) & MAC_RX_MAX_SIZE_MASK_); 1361 lan743x_csr_write(adapter, MAC_RX, mac_rx); 1362 1363 if (enabled) { 1364 mac_rx |= MAC_RX_RXEN_; 1365 lan743x_csr_write(adapter, MAC_RX, mac_rx); 1366 } 1367 return 0; 1368 } 1369 1370 /* PHY */ 1371 static int lan743x_hw_reset_phy(struct lan743x_adapter *adapter) 1372 { 1373 u32 data; 1374 1375 /* Only called with in probe, and before mdiobus_register */ 1376 1377 data = lan743x_csr_read(adapter, PMT_CTL); 1378 data |= PMT_CTL_ETH_PHY_RST_; 1379 lan743x_csr_write(adapter, PMT_CTL, data); 1380 1381 return readx_poll_timeout(LAN743X_CSR_READ_OP, PMT_CTL, data, 1382 (!(data & PMT_CTL_ETH_PHY_RST_) && 1383 (data & PMT_CTL_READY_)), 1384 50000, 1000000); 1385 } 1386 1387 static void lan743x_phy_interface_select(struct lan743x_adapter *adapter) 1388 { 1389 u32 id_rev; 1390 u32 data; 1391 1392 data = lan743x_csr_read(adapter, MAC_CR); 1393 id_rev = adapter->csr.id_rev & ID_REV_ID_MASK_; 1394 1395 if (adapter->is_pci11x1x && adapter->is_sgmii_en) 1396 adapter->phy_interface = PHY_INTERFACE_MODE_SGMII; 1397 else if (id_rev == ID_REV_ID_LAN7430_) 1398 adapter->phy_interface = PHY_INTERFACE_MODE_GMII; 1399 else if ((id_rev == ID_REV_ID_LAN7431_) && (data & MAC_CR_MII_EN_)) 1400 adapter->phy_interface = PHY_INTERFACE_MODE_MII; 1401 else 1402 adapter->phy_interface = PHY_INTERFACE_MODE_RGMII; 1403 1404 dev_dbg(&adapter->pdev->dev, 1405 "selected phy interface: 0x%X\n", adapter->phy_interface); 1406 } 1407 1408 static void lan743x_rfe_open(struct lan743x_adapter *adapter) 1409 { 1410 lan743x_csr_write(adapter, RFE_RSS_CFG, 1411 RFE_RSS_CFG_UDP_IPV6_EX_ | 1412 RFE_RSS_CFG_TCP_IPV6_EX_ | 1413 RFE_RSS_CFG_IPV6_EX_ | 1414 RFE_RSS_CFG_UDP_IPV6_ | 1415 RFE_RSS_CFG_TCP_IPV6_ | 1416 RFE_RSS_CFG_IPV6_ | 1417 RFE_RSS_CFG_UDP_IPV4_ | 1418 RFE_RSS_CFG_TCP_IPV4_ | 1419 RFE_RSS_CFG_IPV4_ | 1420 RFE_RSS_CFG_VALID_HASH_BITS_ | 1421 RFE_RSS_CFG_RSS_QUEUE_ENABLE_ | 1422 RFE_RSS_CFG_RSS_HASH_STORE_ | 1423 RFE_RSS_CFG_RSS_ENABLE_); 1424 } 1425 1426 static void lan743x_rfe_update_mac_address(struct lan743x_adapter *adapter) 1427 { 1428 u8 *mac_addr; 1429 u32 mac_addr_hi = 0; 1430 u32 mac_addr_lo = 0; 1431 1432 /* Add mac address to perfect Filter */ 1433 mac_addr = adapter->mac_address; 1434 mac_addr_lo = ((((u32)(mac_addr[0])) << 0) | 1435 (((u32)(mac_addr[1])) << 8) | 1436 (((u32)(mac_addr[2])) << 16) | 1437 (((u32)(mac_addr[3])) << 24)); 1438 mac_addr_hi = ((((u32)(mac_addr[4])) << 0) | 1439 (((u32)(mac_addr[5])) << 8)); 1440 1441 lan743x_csr_write(adapter, RFE_ADDR_FILT_LO(0), mac_addr_lo); 1442 lan743x_csr_write(adapter, RFE_ADDR_FILT_HI(0), 1443 mac_addr_hi | RFE_ADDR_FILT_HI_VALID_); 1444 } 1445 1446 static void lan743x_rfe_set_multicast(struct lan743x_adapter *adapter) 1447 { 1448 struct net_device *netdev = adapter->netdev; 1449 u32 hash_table[DP_SEL_VHF_HASH_LEN]; 1450 u32 rfctl; 1451 u32 data; 1452 1453 rfctl = lan743x_csr_read(adapter, RFE_CTL); 1454 rfctl &= ~(RFE_CTL_AU_ | RFE_CTL_AM_ | 1455 RFE_CTL_DA_PERFECT_ | RFE_CTL_MCAST_HASH_); 1456 rfctl |= RFE_CTL_AB_; 1457 if (netdev->flags & IFF_PROMISC) { 1458 rfctl |= RFE_CTL_AM_ | RFE_CTL_AU_; 1459 } else { 1460 if (netdev->flags & IFF_ALLMULTI) 1461 rfctl |= RFE_CTL_AM_; 1462 } 1463 1464 if (netdev->features & NETIF_F_RXCSUM) 1465 rfctl |= RFE_CTL_IP_COE_ | RFE_CTL_TCP_UDP_COE_; 1466 1467 memset(hash_table, 0, DP_SEL_VHF_HASH_LEN * sizeof(u32)); 1468 if (netdev_mc_count(netdev)) { 1469 struct netdev_hw_addr *ha; 1470 int i; 1471 1472 rfctl |= RFE_CTL_DA_PERFECT_; 1473 i = 1; 1474 netdev_for_each_mc_addr(ha, netdev) { 1475 /* set first 32 into Perfect Filter */ 1476 if (i < 33) { 1477 lan743x_csr_write(adapter, 1478 RFE_ADDR_FILT_HI(i), 0); 1479 data = ha->addr[3]; 1480 data = ha->addr[2] | (data << 8); 1481 data = ha->addr[1] | (data << 8); 1482 data = ha->addr[0] | (data << 8); 1483 lan743x_csr_write(adapter, 1484 RFE_ADDR_FILT_LO(i), data); 1485 data = ha->addr[5]; 1486 data = ha->addr[4] | (data << 8); 1487 data |= RFE_ADDR_FILT_HI_VALID_; 1488 lan743x_csr_write(adapter, 1489 RFE_ADDR_FILT_HI(i), data); 1490 } else { 1491 u32 bitnum = (ether_crc(ETH_ALEN, ha->addr) >> 1492 23) & 0x1FF; 1493 hash_table[bitnum / 32] |= (1 << (bitnum % 32)); 1494 rfctl |= RFE_CTL_MCAST_HASH_; 1495 } 1496 i++; 1497 } 1498 } 1499 1500 lan743x_dp_write(adapter, DP_SEL_RFE_RAM, 1501 DP_SEL_VHF_VLAN_LEN, 1502 DP_SEL_VHF_HASH_LEN, hash_table); 1503 lan743x_csr_write(adapter, RFE_CTL, rfctl); 1504 } 1505 1506 static int lan743x_dmac_init(struct lan743x_adapter *adapter) 1507 { 1508 u32 data = 0; 1509 1510 lan743x_csr_write(adapter, DMAC_CMD, DMAC_CMD_SWR_); 1511 lan743x_csr_wait_for_bit(adapter, DMAC_CMD, DMAC_CMD_SWR_, 1512 0, 1000, 20000, 100); 1513 switch (DEFAULT_DMA_DESCRIPTOR_SPACING) { 1514 case DMA_DESCRIPTOR_SPACING_16: 1515 data = DMAC_CFG_MAX_DSPACE_16_; 1516 break; 1517 case DMA_DESCRIPTOR_SPACING_32: 1518 data = DMAC_CFG_MAX_DSPACE_32_; 1519 break; 1520 case DMA_DESCRIPTOR_SPACING_64: 1521 data = DMAC_CFG_MAX_DSPACE_64_; 1522 break; 1523 case DMA_DESCRIPTOR_SPACING_128: 1524 data = DMAC_CFG_MAX_DSPACE_128_; 1525 break; 1526 default: 1527 return -EPERM; 1528 } 1529 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) 1530 data |= DMAC_CFG_COAL_EN_; 1531 data |= DMAC_CFG_CH_ARB_SEL_RX_HIGH_; 1532 data |= DMAC_CFG_MAX_READ_REQ_SET_(6); 1533 lan743x_csr_write(adapter, DMAC_CFG, data); 1534 data = DMAC_COAL_CFG_TIMER_LIMIT_SET_(1); 1535 data |= DMAC_COAL_CFG_TIMER_TX_START_; 1536 data |= DMAC_COAL_CFG_FLUSH_INTS_; 1537 data |= DMAC_COAL_CFG_INT_EXIT_COAL_; 1538 data |= DMAC_COAL_CFG_CSR_EXIT_COAL_; 1539 data |= DMAC_COAL_CFG_TX_THRES_SET_(0x0A); 1540 data |= DMAC_COAL_CFG_RX_THRES_SET_(0x0C); 1541 lan743x_csr_write(adapter, DMAC_COAL_CFG, data); 1542 data = DMAC_OBFF_TX_THRES_SET_(0x08); 1543 data |= DMAC_OBFF_RX_THRES_SET_(0x0A); 1544 lan743x_csr_write(adapter, DMAC_OBFF_CFG, data); 1545 return 0; 1546 } 1547 1548 static int lan743x_dmac_tx_get_state(struct lan743x_adapter *adapter, 1549 int tx_channel) 1550 { 1551 u32 dmac_cmd = 0; 1552 1553 dmac_cmd = lan743x_csr_read(adapter, DMAC_CMD); 1554 return DMAC_CHANNEL_STATE_SET((dmac_cmd & 1555 DMAC_CMD_START_T_(tx_channel)), 1556 (dmac_cmd & 1557 DMAC_CMD_STOP_T_(tx_channel))); 1558 } 1559 1560 static int lan743x_dmac_tx_wait_till_stopped(struct lan743x_adapter *adapter, 1561 int tx_channel) 1562 { 1563 int timeout = 100; 1564 int result = 0; 1565 1566 while (timeout && 1567 ((result = lan743x_dmac_tx_get_state(adapter, tx_channel)) == 1568 DMAC_CHANNEL_STATE_STOP_PENDING)) { 1569 usleep_range(1000, 20000); 1570 timeout--; 1571 } 1572 if (result == DMAC_CHANNEL_STATE_STOP_PENDING) 1573 result = -ENODEV; 1574 return result; 1575 } 1576 1577 static int lan743x_dmac_rx_get_state(struct lan743x_adapter *adapter, 1578 int rx_channel) 1579 { 1580 u32 dmac_cmd = 0; 1581 1582 dmac_cmd = lan743x_csr_read(adapter, DMAC_CMD); 1583 return DMAC_CHANNEL_STATE_SET((dmac_cmd & 1584 DMAC_CMD_START_R_(rx_channel)), 1585 (dmac_cmd & 1586 DMAC_CMD_STOP_R_(rx_channel))); 1587 } 1588 1589 static int lan743x_dmac_rx_wait_till_stopped(struct lan743x_adapter *adapter, 1590 int rx_channel) 1591 { 1592 int timeout = 100; 1593 int result = 0; 1594 1595 while (timeout && 1596 ((result = lan743x_dmac_rx_get_state(adapter, rx_channel)) == 1597 DMAC_CHANNEL_STATE_STOP_PENDING)) { 1598 usleep_range(1000, 20000); 1599 timeout--; 1600 } 1601 if (result == DMAC_CHANNEL_STATE_STOP_PENDING) 1602 result = -ENODEV; 1603 return result; 1604 } 1605 1606 static void lan743x_tx_release_desc(struct lan743x_tx *tx, 1607 int descriptor_index, bool cleanup) 1608 { 1609 struct lan743x_tx_buffer_info *buffer_info = NULL; 1610 struct lan743x_tx_descriptor *descriptor = NULL; 1611 u32 descriptor_type = 0; 1612 bool ignore_sync; 1613 1614 descriptor = &tx->ring_cpu_ptr[descriptor_index]; 1615 buffer_info = &tx->buffer_info[descriptor_index]; 1616 if (!(buffer_info->flags & TX_BUFFER_INFO_FLAG_ACTIVE)) 1617 goto done; 1618 1619 descriptor_type = le32_to_cpu(descriptor->data0) & 1620 TX_DESC_DATA0_DTYPE_MASK_; 1621 if (descriptor_type == TX_DESC_DATA0_DTYPE_DATA_) 1622 goto clean_up_data_descriptor; 1623 else 1624 goto clear_active; 1625 1626 clean_up_data_descriptor: 1627 if (buffer_info->dma_ptr) { 1628 if (buffer_info->flags & 1629 TX_BUFFER_INFO_FLAG_SKB_FRAGMENT) { 1630 dma_unmap_page(&tx->adapter->pdev->dev, 1631 buffer_info->dma_ptr, 1632 buffer_info->buffer_length, 1633 DMA_TO_DEVICE); 1634 } else { 1635 dma_unmap_single(&tx->adapter->pdev->dev, 1636 buffer_info->dma_ptr, 1637 buffer_info->buffer_length, 1638 DMA_TO_DEVICE); 1639 } 1640 buffer_info->dma_ptr = 0; 1641 buffer_info->buffer_length = 0; 1642 } 1643 if (!buffer_info->skb) 1644 goto clear_active; 1645 1646 if (!(buffer_info->flags & TX_BUFFER_INFO_FLAG_TIMESTAMP_REQUESTED)) { 1647 dev_kfree_skb_any(buffer_info->skb); 1648 goto clear_skb; 1649 } 1650 1651 if (cleanup) { 1652 lan743x_ptp_unrequest_tx_timestamp(tx->adapter); 1653 dev_kfree_skb_any(buffer_info->skb); 1654 } else { 1655 ignore_sync = (buffer_info->flags & 1656 TX_BUFFER_INFO_FLAG_IGNORE_SYNC) != 0; 1657 lan743x_ptp_tx_timestamp_skb(tx->adapter, 1658 buffer_info->skb, ignore_sync); 1659 } 1660 1661 clear_skb: 1662 buffer_info->skb = NULL; 1663 1664 clear_active: 1665 buffer_info->flags &= ~TX_BUFFER_INFO_FLAG_ACTIVE; 1666 1667 done: 1668 memset(buffer_info, 0, sizeof(*buffer_info)); 1669 memset(descriptor, 0, sizeof(*descriptor)); 1670 } 1671 1672 static int lan743x_tx_next_index(struct lan743x_tx *tx, int index) 1673 { 1674 return ((++index) % tx->ring_size); 1675 } 1676 1677 static void lan743x_tx_release_completed_descriptors(struct lan743x_tx *tx) 1678 { 1679 while (le32_to_cpu(*tx->head_cpu_ptr) != (tx->last_head)) { 1680 lan743x_tx_release_desc(tx, tx->last_head, false); 1681 tx->last_head = lan743x_tx_next_index(tx, tx->last_head); 1682 } 1683 } 1684 1685 static void lan743x_tx_release_all_descriptors(struct lan743x_tx *tx) 1686 { 1687 u32 original_head = 0; 1688 1689 original_head = tx->last_head; 1690 do { 1691 lan743x_tx_release_desc(tx, tx->last_head, true); 1692 tx->last_head = lan743x_tx_next_index(tx, tx->last_head); 1693 } while (tx->last_head != original_head); 1694 memset(tx->ring_cpu_ptr, 0, 1695 sizeof(*tx->ring_cpu_ptr) * (tx->ring_size)); 1696 memset(tx->buffer_info, 0, 1697 sizeof(*tx->buffer_info) * (tx->ring_size)); 1698 } 1699 1700 static int lan743x_tx_get_desc_cnt(struct lan743x_tx *tx, 1701 struct sk_buff *skb) 1702 { 1703 int result = 1; /* 1 for the main skb buffer */ 1704 int nr_frags = 0; 1705 1706 if (skb_is_gso(skb)) 1707 result++; /* requires an extension descriptor */ 1708 nr_frags = skb_shinfo(skb)->nr_frags; 1709 result += nr_frags; /* 1 for each fragment buffer */ 1710 return result; 1711 } 1712 1713 static int lan743x_tx_get_avail_desc(struct lan743x_tx *tx) 1714 { 1715 int last_head = tx->last_head; 1716 int last_tail = tx->last_tail; 1717 1718 if (last_tail >= last_head) 1719 return tx->ring_size - last_tail + last_head - 1; 1720 else 1721 return last_head - last_tail - 1; 1722 } 1723 1724 static void lan743x_rx_cfg_b_tstamp_config(struct lan743x_adapter *adapter, 1725 int rx_ts_config) 1726 { 1727 int channel_number; 1728 int index; 1729 u32 data; 1730 1731 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) { 1732 channel_number = adapter->rx[index].channel_number; 1733 data = lan743x_csr_read(adapter, RX_CFG_B(channel_number)); 1734 data &= RX_CFG_B_TS_MASK_; 1735 data |= rx_ts_config; 1736 lan743x_csr_write(adapter, RX_CFG_B(channel_number), 1737 data); 1738 } 1739 } 1740 1741 int lan743x_rx_set_tstamp_mode(struct lan743x_adapter *adapter, 1742 int rx_filter) 1743 { 1744 u32 data; 1745 1746 switch (rx_filter) { 1747 case HWTSTAMP_FILTER_PTP_V2_EVENT: 1748 lan743x_rx_cfg_b_tstamp_config(adapter, 1749 RX_CFG_B_TS_DESCR_EN_); 1750 data = lan743x_csr_read(adapter, PTP_RX_TS_CFG); 1751 data |= PTP_RX_TS_CFG_EVENT_MSGS_; 1752 lan743x_csr_write(adapter, PTP_RX_TS_CFG, data); 1753 break; 1754 case HWTSTAMP_FILTER_NONE: 1755 lan743x_rx_cfg_b_tstamp_config(adapter, 1756 RX_CFG_B_TS_NONE_); 1757 break; 1758 case HWTSTAMP_FILTER_ALL: 1759 lan743x_rx_cfg_b_tstamp_config(adapter, 1760 RX_CFG_B_TS_ALL_RX_); 1761 break; 1762 default: 1763 return -ERANGE; 1764 } 1765 adapter->rx_tstamp_filter = rx_filter; 1766 return 0; 1767 } 1768 1769 void lan743x_tx_set_timestamping_mode(struct lan743x_tx *tx, 1770 bool enable_timestamping, 1771 bool enable_onestep_sync) 1772 { 1773 if (enable_timestamping) 1774 tx->ts_flags |= TX_TS_FLAG_TIMESTAMPING_ENABLED; 1775 else 1776 tx->ts_flags &= ~TX_TS_FLAG_TIMESTAMPING_ENABLED; 1777 if (enable_onestep_sync) 1778 tx->ts_flags |= TX_TS_FLAG_ONE_STEP_SYNC; 1779 else 1780 tx->ts_flags &= ~TX_TS_FLAG_ONE_STEP_SYNC; 1781 } 1782 1783 static int lan743x_tx_frame_start(struct lan743x_tx *tx, 1784 unsigned char *first_buffer, 1785 unsigned int first_buffer_length, 1786 unsigned int frame_length, 1787 bool time_stamp, 1788 bool check_sum) 1789 { 1790 /* called only from within lan743x_tx_xmit_frame. 1791 * assuming tx->ring_lock has already been acquired. 1792 */ 1793 struct lan743x_tx_descriptor *tx_descriptor = NULL; 1794 struct lan743x_tx_buffer_info *buffer_info = NULL; 1795 struct lan743x_adapter *adapter = tx->adapter; 1796 struct device *dev = &adapter->pdev->dev; 1797 dma_addr_t dma_ptr; 1798 1799 tx->frame_flags |= TX_FRAME_FLAG_IN_PROGRESS; 1800 tx->frame_first = tx->last_tail; 1801 tx->frame_tail = tx->frame_first; 1802 1803 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1804 buffer_info = &tx->buffer_info[tx->frame_tail]; 1805 dma_ptr = dma_map_single(dev, first_buffer, first_buffer_length, 1806 DMA_TO_DEVICE); 1807 if (dma_mapping_error(dev, dma_ptr)) 1808 return -ENOMEM; 1809 1810 tx_descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(dma_ptr)); 1811 tx_descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(dma_ptr)); 1812 tx_descriptor->data3 = cpu_to_le32((frame_length << 16) & 1813 TX_DESC_DATA3_FRAME_LENGTH_MSS_MASK_); 1814 1815 buffer_info->skb = NULL; 1816 buffer_info->dma_ptr = dma_ptr; 1817 buffer_info->buffer_length = first_buffer_length; 1818 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE; 1819 1820 tx->frame_data0 = (first_buffer_length & 1821 TX_DESC_DATA0_BUF_LENGTH_MASK_) | 1822 TX_DESC_DATA0_DTYPE_DATA_ | 1823 TX_DESC_DATA0_FS_ | 1824 TX_DESC_DATA0_FCS_; 1825 if (time_stamp) 1826 tx->frame_data0 |= TX_DESC_DATA0_TSE_; 1827 1828 if (check_sum) 1829 tx->frame_data0 |= TX_DESC_DATA0_ICE_ | 1830 TX_DESC_DATA0_IPE_ | 1831 TX_DESC_DATA0_TPE_; 1832 1833 /* data0 will be programmed in one of other frame assembler functions */ 1834 return 0; 1835 } 1836 1837 static void lan743x_tx_frame_add_lso(struct lan743x_tx *tx, 1838 unsigned int frame_length, 1839 int nr_frags) 1840 { 1841 /* called only from within lan743x_tx_xmit_frame. 1842 * assuming tx->ring_lock has already been acquired. 1843 */ 1844 struct lan743x_tx_descriptor *tx_descriptor = NULL; 1845 struct lan743x_tx_buffer_info *buffer_info = NULL; 1846 1847 /* wrap up previous descriptor */ 1848 tx->frame_data0 |= TX_DESC_DATA0_EXT_; 1849 if (nr_frags <= 0) { 1850 tx->frame_data0 |= TX_DESC_DATA0_LS_; 1851 tx->frame_data0 |= TX_DESC_DATA0_IOC_; 1852 tx->frame_last = tx->frame_first; 1853 } 1854 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1855 tx_descriptor->data0 = cpu_to_le32(tx->frame_data0); 1856 1857 /* move to next descriptor */ 1858 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail); 1859 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1860 buffer_info = &tx->buffer_info[tx->frame_tail]; 1861 1862 /* add extension descriptor */ 1863 tx_descriptor->data1 = 0; 1864 tx_descriptor->data2 = 0; 1865 tx_descriptor->data3 = 0; 1866 1867 buffer_info->skb = NULL; 1868 buffer_info->dma_ptr = 0; 1869 buffer_info->buffer_length = 0; 1870 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE; 1871 1872 tx->frame_data0 = (frame_length & TX_DESC_DATA0_EXT_PAY_LENGTH_MASK_) | 1873 TX_DESC_DATA0_DTYPE_EXT_ | 1874 TX_DESC_DATA0_EXT_LSO_; 1875 1876 /* data0 will be programmed in one of other frame assembler functions */ 1877 } 1878 1879 static int lan743x_tx_frame_add_fragment(struct lan743x_tx *tx, 1880 const skb_frag_t *fragment, 1881 unsigned int frame_length) 1882 { 1883 /* called only from within lan743x_tx_xmit_frame 1884 * assuming tx->ring_lock has already been acquired 1885 */ 1886 struct lan743x_tx_descriptor *tx_descriptor = NULL; 1887 struct lan743x_tx_buffer_info *buffer_info = NULL; 1888 struct lan743x_adapter *adapter = tx->adapter; 1889 struct device *dev = &adapter->pdev->dev; 1890 unsigned int fragment_length = 0; 1891 dma_addr_t dma_ptr; 1892 1893 fragment_length = skb_frag_size(fragment); 1894 if (!fragment_length) 1895 return 0; 1896 1897 /* wrap up previous descriptor */ 1898 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1899 tx_descriptor->data0 = cpu_to_le32(tx->frame_data0); 1900 1901 /* move to next descriptor */ 1902 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail); 1903 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1904 buffer_info = &tx->buffer_info[tx->frame_tail]; 1905 dma_ptr = skb_frag_dma_map(dev, fragment, 1906 0, fragment_length, 1907 DMA_TO_DEVICE); 1908 if (dma_mapping_error(dev, dma_ptr)) { 1909 int desc_index; 1910 1911 /* cleanup all previously setup descriptors */ 1912 desc_index = tx->frame_first; 1913 while (desc_index != tx->frame_tail) { 1914 lan743x_tx_release_desc(tx, desc_index, true); 1915 desc_index = lan743x_tx_next_index(tx, desc_index); 1916 } 1917 dma_wmb(); 1918 tx->frame_flags &= ~TX_FRAME_FLAG_IN_PROGRESS; 1919 tx->frame_first = 0; 1920 tx->frame_data0 = 0; 1921 tx->frame_tail = 0; 1922 tx->frame_last = 0; 1923 return -ENOMEM; 1924 } 1925 1926 tx_descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(dma_ptr)); 1927 tx_descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(dma_ptr)); 1928 tx_descriptor->data3 = cpu_to_le32((frame_length << 16) & 1929 TX_DESC_DATA3_FRAME_LENGTH_MSS_MASK_); 1930 1931 buffer_info->skb = NULL; 1932 buffer_info->dma_ptr = dma_ptr; 1933 buffer_info->buffer_length = fragment_length; 1934 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE; 1935 buffer_info->flags |= TX_BUFFER_INFO_FLAG_SKB_FRAGMENT; 1936 1937 tx->frame_data0 = (fragment_length & TX_DESC_DATA0_BUF_LENGTH_MASK_) | 1938 TX_DESC_DATA0_DTYPE_DATA_ | 1939 TX_DESC_DATA0_FCS_; 1940 1941 /* data0 will be programmed in one of other frame assembler functions */ 1942 return 0; 1943 } 1944 1945 static void lan743x_tx_frame_end(struct lan743x_tx *tx, 1946 struct sk_buff *skb, 1947 bool time_stamp, 1948 bool ignore_sync) 1949 { 1950 /* called only from within lan743x_tx_xmit_frame 1951 * assuming tx->ring_lock has already been acquired 1952 */ 1953 struct lan743x_tx_descriptor *tx_descriptor = NULL; 1954 struct lan743x_tx_buffer_info *buffer_info = NULL; 1955 struct lan743x_adapter *adapter = tx->adapter; 1956 u32 tx_tail_flags = 0; 1957 1958 /* wrap up previous descriptor */ 1959 if ((tx->frame_data0 & TX_DESC_DATA0_DTYPE_MASK_) == 1960 TX_DESC_DATA0_DTYPE_DATA_) { 1961 tx->frame_data0 |= TX_DESC_DATA0_LS_; 1962 tx->frame_data0 |= TX_DESC_DATA0_IOC_; 1963 tx->frame_last = tx->frame_tail; 1964 } 1965 1966 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_last]; 1967 buffer_info = &tx->buffer_info[tx->frame_last]; 1968 buffer_info->skb = skb; 1969 if (time_stamp) 1970 buffer_info->flags |= TX_BUFFER_INFO_FLAG_TIMESTAMP_REQUESTED; 1971 if (ignore_sync) 1972 buffer_info->flags |= TX_BUFFER_INFO_FLAG_IGNORE_SYNC; 1973 1974 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1975 tx_descriptor->data0 = cpu_to_le32(tx->frame_data0); 1976 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail); 1977 tx->last_tail = tx->frame_tail; 1978 1979 dma_wmb(); 1980 1981 if (tx->vector_flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET) 1982 tx_tail_flags |= TX_TAIL_SET_TOP_INT_VEC_EN_; 1983 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET) 1984 tx_tail_flags |= TX_TAIL_SET_DMAC_INT_EN_ | 1985 TX_TAIL_SET_TOP_INT_EN_; 1986 1987 lan743x_csr_write(adapter, TX_TAIL(tx->channel_number), 1988 tx_tail_flags | tx->frame_tail); 1989 tx->frame_flags &= ~TX_FRAME_FLAG_IN_PROGRESS; 1990 } 1991 1992 static netdev_tx_t lan743x_tx_xmit_frame(struct lan743x_tx *tx, 1993 struct sk_buff *skb) 1994 { 1995 int required_number_of_descriptors = 0; 1996 unsigned int start_frame_length = 0; 1997 netdev_tx_t retval = NETDEV_TX_OK; 1998 unsigned int frame_length = 0; 1999 unsigned int head_length = 0; 2000 unsigned long irq_flags = 0; 2001 bool do_timestamp = false; 2002 bool ignore_sync = false; 2003 struct netdev_queue *txq; 2004 int nr_frags = 0; 2005 bool gso = false; 2006 int j; 2007 2008 required_number_of_descriptors = lan743x_tx_get_desc_cnt(tx, skb); 2009 2010 spin_lock_irqsave(&tx->ring_lock, irq_flags); 2011 if (required_number_of_descriptors > 2012 lan743x_tx_get_avail_desc(tx)) { 2013 if (required_number_of_descriptors > (tx->ring_size - 1)) { 2014 dev_kfree_skb_irq(skb); 2015 } else { 2016 /* save how many descriptors we needed to restart the queue */ 2017 tx->rqd_descriptors = required_number_of_descriptors; 2018 retval = NETDEV_TX_BUSY; 2019 txq = netdev_get_tx_queue(tx->adapter->netdev, 2020 tx->channel_number); 2021 netif_tx_stop_queue(txq); 2022 } 2023 goto unlock; 2024 } 2025 2026 /* space available, transmit skb */ 2027 if ((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) && 2028 (tx->ts_flags & TX_TS_FLAG_TIMESTAMPING_ENABLED) && 2029 (lan743x_ptp_request_tx_timestamp(tx->adapter))) { 2030 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; 2031 do_timestamp = true; 2032 if (tx->ts_flags & TX_TS_FLAG_ONE_STEP_SYNC) 2033 ignore_sync = true; 2034 } 2035 head_length = skb_headlen(skb); 2036 frame_length = skb_pagelen(skb); 2037 nr_frags = skb_shinfo(skb)->nr_frags; 2038 start_frame_length = frame_length; 2039 gso = skb_is_gso(skb); 2040 if (gso) { 2041 start_frame_length = max(skb_shinfo(skb)->gso_size, 2042 (unsigned short)8); 2043 } 2044 2045 if (lan743x_tx_frame_start(tx, 2046 skb->data, head_length, 2047 start_frame_length, 2048 do_timestamp, 2049 skb->ip_summed == CHECKSUM_PARTIAL)) { 2050 dev_kfree_skb_irq(skb); 2051 goto unlock; 2052 } 2053 tx->frame_count++; 2054 2055 if (gso) 2056 lan743x_tx_frame_add_lso(tx, frame_length, nr_frags); 2057 2058 if (nr_frags <= 0) 2059 goto finish; 2060 2061 for (j = 0; j < nr_frags; j++) { 2062 const skb_frag_t *frag = &(skb_shinfo(skb)->frags[j]); 2063 2064 if (lan743x_tx_frame_add_fragment(tx, frag, frame_length)) { 2065 /* upon error no need to call 2066 * lan743x_tx_frame_end 2067 * frame assembler clean up was performed inside 2068 * lan743x_tx_frame_add_fragment 2069 */ 2070 dev_kfree_skb_irq(skb); 2071 goto unlock; 2072 } 2073 } 2074 2075 finish: 2076 lan743x_tx_frame_end(tx, skb, do_timestamp, ignore_sync); 2077 2078 unlock: 2079 spin_unlock_irqrestore(&tx->ring_lock, irq_flags); 2080 return retval; 2081 } 2082 2083 static int lan743x_tx_napi_poll(struct napi_struct *napi, int weight) 2084 { 2085 struct lan743x_tx *tx = container_of(napi, struct lan743x_tx, napi); 2086 struct lan743x_adapter *adapter = tx->adapter; 2087 unsigned long irq_flags = 0; 2088 struct netdev_queue *txq; 2089 u32 ioc_bit = 0; 2090 2091 ioc_bit = DMAC_INT_BIT_TX_IOC_(tx->channel_number); 2092 lan743x_csr_read(adapter, DMAC_INT_STS); 2093 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C) 2094 lan743x_csr_write(adapter, DMAC_INT_STS, ioc_bit); 2095 spin_lock_irqsave(&tx->ring_lock, irq_flags); 2096 2097 /* clean up tx ring */ 2098 lan743x_tx_release_completed_descriptors(tx); 2099 txq = netdev_get_tx_queue(adapter->netdev, tx->channel_number); 2100 if (netif_tx_queue_stopped(txq)) { 2101 if (tx->rqd_descriptors) { 2102 if (tx->rqd_descriptors <= 2103 lan743x_tx_get_avail_desc(tx)) { 2104 tx->rqd_descriptors = 0; 2105 netif_tx_wake_queue(txq); 2106 } 2107 } else { 2108 netif_tx_wake_queue(txq); 2109 } 2110 } 2111 spin_unlock_irqrestore(&tx->ring_lock, irq_flags); 2112 2113 if (!napi_complete(napi)) 2114 goto done; 2115 2116 /* enable isr */ 2117 lan743x_csr_write(adapter, INT_EN_SET, 2118 INT_BIT_DMA_TX_(tx->channel_number)); 2119 lan743x_csr_read(adapter, INT_STS); 2120 2121 done: 2122 return 0; 2123 } 2124 2125 static void lan743x_tx_ring_cleanup(struct lan743x_tx *tx) 2126 { 2127 if (tx->head_cpu_ptr) { 2128 dma_free_coherent(&tx->adapter->pdev->dev, 2129 sizeof(*tx->head_cpu_ptr), tx->head_cpu_ptr, 2130 tx->head_dma_ptr); 2131 tx->head_cpu_ptr = NULL; 2132 tx->head_dma_ptr = 0; 2133 } 2134 kfree(tx->buffer_info); 2135 tx->buffer_info = NULL; 2136 2137 if (tx->ring_cpu_ptr) { 2138 dma_free_coherent(&tx->adapter->pdev->dev, 2139 tx->ring_allocation_size, tx->ring_cpu_ptr, 2140 tx->ring_dma_ptr); 2141 tx->ring_allocation_size = 0; 2142 tx->ring_cpu_ptr = NULL; 2143 tx->ring_dma_ptr = 0; 2144 } 2145 tx->ring_size = 0; 2146 } 2147 2148 static int lan743x_tx_ring_init(struct lan743x_tx *tx) 2149 { 2150 size_t ring_allocation_size = 0; 2151 void *cpu_ptr = NULL; 2152 dma_addr_t dma_ptr; 2153 int ret = -ENOMEM; 2154 2155 tx->ring_size = LAN743X_TX_RING_SIZE; 2156 if (tx->ring_size & ~TX_CFG_B_TX_RING_LEN_MASK_) { 2157 ret = -EINVAL; 2158 goto cleanup; 2159 } 2160 if (dma_set_mask_and_coherent(&tx->adapter->pdev->dev, 2161 DMA_BIT_MASK(64))) { 2162 dev_warn(&tx->adapter->pdev->dev, 2163 "lan743x_: No suitable DMA available\n"); 2164 ret = -ENOMEM; 2165 goto cleanup; 2166 } 2167 ring_allocation_size = ALIGN(tx->ring_size * 2168 sizeof(struct lan743x_tx_descriptor), 2169 PAGE_SIZE); 2170 dma_ptr = 0; 2171 cpu_ptr = dma_alloc_coherent(&tx->adapter->pdev->dev, 2172 ring_allocation_size, &dma_ptr, GFP_KERNEL); 2173 if (!cpu_ptr) { 2174 ret = -ENOMEM; 2175 goto cleanup; 2176 } 2177 2178 tx->ring_allocation_size = ring_allocation_size; 2179 tx->ring_cpu_ptr = (struct lan743x_tx_descriptor *)cpu_ptr; 2180 tx->ring_dma_ptr = dma_ptr; 2181 2182 cpu_ptr = kzalloc_objs(*tx->buffer_info, tx->ring_size); 2183 if (!cpu_ptr) { 2184 ret = -ENOMEM; 2185 goto cleanup; 2186 } 2187 tx->buffer_info = (struct lan743x_tx_buffer_info *)cpu_ptr; 2188 dma_ptr = 0; 2189 cpu_ptr = dma_alloc_coherent(&tx->adapter->pdev->dev, 2190 sizeof(*tx->head_cpu_ptr), &dma_ptr, 2191 GFP_KERNEL); 2192 if (!cpu_ptr) { 2193 ret = -ENOMEM; 2194 goto cleanup; 2195 } 2196 2197 tx->head_cpu_ptr = cpu_ptr; 2198 tx->head_dma_ptr = dma_ptr; 2199 if (tx->head_dma_ptr & 0x3) { 2200 ret = -ENOMEM; 2201 goto cleanup; 2202 } 2203 2204 return 0; 2205 2206 cleanup: 2207 lan743x_tx_ring_cleanup(tx); 2208 return ret; 2209 } 2210 2211 static void lan743x_tx_close(struct lan743x_tx *tx) 2212 { 2213 struct lan743x_adapter *adapter = tx->adapter; 2214 2215 lan743x_csr_write(adapter, 2216 DMAC_CMD, 2217 DMAC_CMD_STOP_T_(tx->channel_number)); 2218 lan743x_dmac_tx_wait_till_stopped(adapter, tx->channel_number); 2219 2220 lan743x_csr_write(adapter, 2221 DMAC_INT_EN_CLR, 2222 DMAC_INT_BIT_TX_IOC_(tx->channel_number)); 2223 lan743x_csr_write(adapter, INT_EN_CLR, 2224 INT_BIT_DMA_TX_(tx->channel_number)); 2225 napi_disable(&tx->napi); 2226 netif_napi_del(&tx->napi); 2227 2228 lan743x_csr_write(adapter, FCT_TX_CTL, 2229 FCT_TX_CTL_DIS_(tx->channel_number)); 2230 lan743x_csr_wait_for_bit(adapter, FCT_TX_CTL, 2231 FCT_TX_CTL_EN_(tx->channel_number), 2232 0, 1000, 20000, 100); 2233 2234 lan743x_tx_release_all_descriptors(tx); 2235 2236 tx->rqd_descriptors = 0; 2237 2238 lan743x_tx_ring_cleanup(tx); 2239 } 2240 2241 static int lan743x_tx_open(struct lan743x_tx *tx) 2242 { 2243 struct lan743x_adapter *adapter = NULL; 2244 u32 data = 0; 2245 int ret; 2246 2247 adapter = tx->adapter; 2248 ret = lan743x_tx_ring_init(tx); 2249 if (ret) 2250 return ret; 2251 2252 /* initialize fifo */ 2253 lan743x_csr_write(adapter, FCT_TX_CTL, 2254 FCT_TX_CTL_RESET_(tx->channel_number)); 2255 lan743x_csr_wait_for_bit(adapter, FCT_TX_CTL, 2256 FCT_TX_CTL_RESET_(tx->channel_number), 2257 0, 1000, 20000, 100); 2258 2259 /* enable fifo */ 2260 lan743x_csr_write(adapter, FCT_TX_CTL, 2261 FCT_TX_CTL_EN_(tx->channel_number)); 2262 2263 /* reset tx channel */ 2264 lan743x_csr_write(adapter, DMAC_CMD, 2265 DMAC_CMD_TX_SWR_(tx->channel_number)); 2266 lan743x_csr_wait_for_bit(adapter, DMAC_CMD, 2267 DMAC_CMD_TX_SWR_(tx->channel_number), 2268 0, 1000, 20000, 100); 2269 2270 /* Write TX_BASE_ADDR */ 2271 lan743x_csr_write(adapter, 2272 TX_BASE_ADDRH(tx->channel_number), 2273 DMA_ADDR_HIGH32(tx->ring_dma_ptr)); 2274 lan743x_csr_write(adapter, 2275 TX_BASE_ADDRL(tx->channel_number), 2276 DMA_ADDR_LOW32(tx->ring_dma_ptr)); 2277 2278 /* Write TX_CFG_B */ 2279 data = lan743x_csr_read(adapter, TX_CFG_B(tx->channel_number)); 2280 data &= ~TX_CFG_B_TX_RING_LEN_MASK_; 2281 data |= ((tx->ring_size) & TX_CFG_B_TX_RING_LEN_MASK_); 2282 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) 2283 data |= TX_CFG_B_TDMABL_512_; 2284 lan743x_csr_write(adapter, TX_CFG_B(tx->channel_number), data); 2285 2286 /* Write TX_CFG_A */ 2287 data = TX_CFG_A_TX_TMR_HPWB_SEL_IOC_ | TX_CFG_A_TX_HP_WB_EN_; 2288 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) { 2289 data |= TX_CFG_A_TX_HP_WB_ON_INT_TMR_; 2290 data |= TX_CFG_A_TX_PF_THRES_SET_(0x10); 2291 data |= TX_CFG_A_TX_PF_PRI_THRES_SET_(0x04); 2292 data |= TX_CFG_A_TX_HP_WB_THRES_SET_(0x07); 2293 } 2294 lan743x_csr_write(adapter, TX_CFG_A(tx->channel_number), data); 2295 2296 /* Write TX_HEAD_WRITEBACK_ADDR */ 2297 lan743x_csr_write(adapter, 2298 TX_HEAD_WRITEBACK_ADDRH(tx->channel_number), 2299 DMA_ADDR_HIGH32(tx->head_dma_ptr)); 2300 lan743x_csr_write(adapter, 2301 TX_HEAD_WRITEBACK_ADDRL(tx->channel_number), 2302 DMA_ADDR_LOW32(tx->head_dma_ptr)); 2303 2304 /* set last head */ 2305 tx->last_head = lan743x_csr_read(adapter, TX_HEAD(tx->channel_number)); 2306 2307 /* write TX_TAIL */ 2308 tx->last_tail = 0; 2309 lan743x_csr_write(adapter, TX_TAIL(tx->channel_number), 2310 (u32)(tx->last_tail)); 2311 tx->vector_flags = lan743x_intr_get_vector_flags(adapter, 2312 INT_BIT_DMA_TX_ 2313 (tx->channel_number)); 2314 netif_napi_add_tx_weight(adapter->netdev, 2315 &tx->napi, lan743x_tx_napi_poll, 2316 NAPI_POLL_WEIGHT); 2317 napi_enable(&tx->napi); 2318 2319 data = 0; 2320 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR) 2321 data |= TX_CFG_C_TX_TOP_INT_EN_AUTO_CLR_; 2322 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR) 2323 data |= TX_CFG_C_TX_DMA_INT_STS_AUTO_CLR_; 2324 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C) 2325 data |= TX_CFG_C_TX_INT_STS_R2C_MODE_MASK_; 2326 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C) 2327 data |= TX_CFG_C_TX_INT_EN_R2C_; 2328 lan743x_csr_write(adapter, TX_CFG_C(tx->channel_number), data); 2329 2330 if (!(tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET)) 2331 lan743x_csr_write(adapter, INT_EN_SET, 2332 INT_BIT_DMA_TX_(tx->channel_number)); 2333 lan743x_csr_write(adapter, DMAC_INT_EN_SET, 2334 DMAC_INT_BIT_TX_IOC_(tx->channel_number)); 2335 2336 /* start dmac channel */ 2337 lan743x_csr_write(adapter, DMAC_CMD, 2338 DMAC_CMD_START_T_(tx->channel_number)); 2339 return 0; 2340 } 2341 2342 static int lan743x_rx_next_index(struct lan743x_rx *rx, int index) 2343 { 2344 return ((++index) % rx->ring_size); 2345 } 2346 2347 static void lan743x_rx_update_tail(struct lan743x_rx *rx, int index) 2348 { 2349 /* update the tail once per 8 descriptors */ 2350 if ((index & 7) == 7) 2351 lan743x_csr_write(rx->adapter, RX_TAIL(rx->channel_number), 2352 index); 2353 } 2354 2355 static int lan743x_rx_init_ring_element(struct lan743x_rx *rx, int index, 2356 gfp_t gfp) 2357 { 2358 struct net_device *netdev = rx->adapter->netdev; 2359 struct device *dev = &rx->adapter->pdev->dev; 2360 struct lan743x_rx_buffer_info *buffer_info; 2361 unsigned int buffer_length, used_length; 2362 struct lan743x_rx_descriptor *descriptor; 2363 struct sk_buff *skb; 2364 dma_addr_t dma_ptr; 2365 2366 buffer_length = netdev->mtu + ETH_HLEN + ETH_FCS_LEN + RX_HEAD_PADDING; 2367 2368 descriptor = &rx->ring_cpu_ptr[index]; 2369 buffer_info = &rx->buffer_info[index]; 2370 skb = __netdev_alloc_skb(netdev, buffer_length, gfp); 2371 if (!skb) 2372 return -ENOMEM; 2373 dma_ptr = dma_map_single(dev, skb->data, buffer_length, DMA_FROM_DEVICE); 2374 if (dma_mapping_error(dev, dma_ptr)) { 2375 dev_kfree_skb_any(skb); 2376 return -ENOMEM; 2377 } 2378 if (buffer_info->dma_ptr) { 2379 /* sync used area of buffer only */ 2380 if (le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_LS_) 2381 /* frame length is valid only if LS bit is set. 2382 * it's a safe upper bound for the used area in this 2383 * buffer. 2384 */ 2385 used_length = min(RX_DESC_DATA0_FRAME_LENGTH_GET_ 2386 (le32_to_cpu(descriptor->data0)), 2387 buffer_info->buffer_length); 2388 else 2389 used_length = buffer_info->buffer_length; 2390 dma_sync_single_for_cpu(dev, buffer_info->dma_ptr, 2391 used_length, 2392 DMA_FROM_DEVICE); 2393 dma_unmap_single_attrs(dev, buffer_info->dma_ptr, 2394 buffer_info->buffer_length, 2395 DMA_FROM_DEVICE, 2396 DMA_ATTR_SKIP_CPU_SYNC); 2397 } 2398 2399 buffer_info->skb = skb; 2400 buffer_info->dma_ptr = dma_ptr; 2401 buffer_info->buffer_length = buffer_length; 2402 descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(buffer_info->dma_ptr)); 2403 descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(buffer_info->dma_ptr)); 2404 descriptor->data3 = 0; 2405 descriptor->data0 = cpu_to_le32((RX_DESC_DATA0_OWN_ | 2406 (buffer_length & RX_DESC_DATA0_BUF_LENGTH_MASK_))); 2407 lan743x_rx_update_tail(rx, index); 2408 2409 return 0; 2410 } 2411 2412 static void lan743x_rx_reuse_ring_element(struct lan743x_rx *rx, int index) 2413 { 2414 struct lan743x_rx_buffer_info *buffer_info; 2415 struct lan743x_rx_descriptor *descriptor; 2416 2417 descriptor = &rx->ring_cpu_ptr[index]; 2418 buffer_info = &rx->buffer_info[index]; 2419 2420 descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(buffer_info->dma_ptr)); 2421 descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(buffer_info->dma_ptr)); 2422 descriptor->data3 = 0; 2423 descriptor->data0 = cpu_to_le32((RX_DESC_DATA0_OWN_ | 2424 ((buffer_info->buffer_length) & 2425 RX_DESC_DATA0_BUF_LENGTH_MASK_))); 2426 lan743x_rx_update_tail(rx, index); 2427 } 2428 2429 static void lan743x_rx_release_ring_element(struct lan743x_rx *rx, int index) 2430 { 2431 struct lan743x_rx_buffer_info *buffer_info; 2432 struct lan743x_rx_descriptor *descriptor; 2433 2434 descriptor = &rx->ring_cpu_ptr[index]; 2435 buffer_info = &rx->buffer_info[index]; 2436 2437 memset(descriptor, 0, sizeof(*descriptor)); 2438 2439 if (buffer_info->dma_ptr) { 2440 dma_unmap_single(&rx->adapter->pdev->dev, 2441 buffer_info->dma_ptr, 2442 buffer_info->buffer_length, 2443 DMA_FROM_DEVICE); 2444 buffer_info->dma_ptr = 0; 2445 } 2446 2447 if (buffer_info->skb) { 2448 dev_kfree_skb(buffer_info->skb); 2449 buffer_info->skb = NULL; 2450 } 2451 2452 memset(buffer_info, 0, sizeof(*buffer_info)); 2453 } 2454 2455 static struct sk_buff * 2456 lan743x_rx_trim_skb(struct sk_buff *skb, int frame_length) 2457 { 2458 if (skb_linearize(skb)) { 2459 dev_kfree_skb_irq(skb); 2460 return NULL; 2461 } 2462 frame_length = max_t(int, 0, frame_length - ETH_FCS_LEN); 2463 if (skb->len > frame_length) { 2464 skb->tail -= skb->len - frame_length; 2465 skb->len = frame_length; 2466 } 2467 return skb; 2468 } 2469 2470 static int lan743x_rx_process_buffer(struct lan743x_rx *rx) 2471 { 2472 int current_head_index = le32_to_cpu(*rx->head_cpu_ptr); 2473 struct lan743x_rx_descriptor *descriptor, *desc_ext; 2474 struct net_device *netdev = rx->adapter->netdev; 2475 int result = RX_PROCESS_RESULT_NOTHING_TO_DO; 2476 struct lan743x_rx_buffer_info *buffer_info; 2477 int frame_length, buffer_length; 2478 bool is_ice, is_tce, is_icsm; 2479 int extension_index = -1; 2480 bool is_last, is_first; 2481 struct sk_buff *skb; 2482 2483 if (current_head_index < 0 || current_head_index >= rx->ring_size) 2484 goto done; 2485 2486 if (rx->last_head < 0 || rx->last_head >= rx->ring_size) 2487 goto done; 2488 2489 if (rx->last_head == current_head_index) 2490 goto done; 2491 2492 descriptor = &rx->ring_cpu_ptr[rx->last_head]; 2493 if (le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_OWN_) 2494 goto done; 2495 buffer_info = &rx->buffer_info[rx->last_head]; 2496 2497 is_last = le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_LS_; 2498 is_first = le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_FS_; 2499 2500 if (is_last && le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_EXT_) { 2501 /* extension is expected to follow */ 2502 int index = lan743x_rx_next_index(rx, rx->last_head); 2503 2504 if (index == current_head_index) 2505 /* extension not yet available */ 2506 goto done; 2507 desc_ext = &rx->ring_cpu_ptr[index]; 2508 if (le32_to_cpu(desc_ext->data0) & RX_DESC_DATA0_OWN_) 2509 /* extension not yet available */ 2510 goto done; 2511 if (!(le32_to_cpu(desc_ext->data0) & RX_DESC_DATA0_EXT_)) 2512 goto move_forward; 2513 extension_index = index; 2514 } 2515 2516 /* Only the last buffer in a multi-buffer frame contains the total frame 2517 * length. The chip occasionally sends more buffers than strictly 2518 * required to reach the total frame length. 2519 * Handle this by adding all buffers to the skb in their entirety. 2520 * Once the real frame length is known, trim the skb. 2521 */ 2522 frame_length = 2523 RX_DESC_DATA0_FRAME_LENGTH_GET_(le32_to_cpu(descriptor->data0)); 2524 buffer_length = buffer_info->buffer_length; 2525 is_ice = le32_to_cpu(descriptor->data1) & RX_DESC_DATA1_STATUS_ICE_; 2526 is_tce = le32_to_cpu(descriptor->data1) & RX_DESC_DATA1_STATUS_TCE_; 2527 is_icsm = le32_to_cpu(descriptor->data1) & RX_DESC_DATA1_STATUS_ICSM_; 2528 2529 netdev_dbg(netdev, "%s%schunk: %d/%d", 2530 is_first ? "first " : " ", 2531 is_last ? "last " : " ", 2532 frame_length, buffer_length); 2533 2534 /* save existing skb, allocate new skb and map to dma */ 2535 skb = buffer_info->skb; 2536 if (lan743x_rx_init_ring_element(rx, rx->last_head, GFP_ATOMIC)) { 2537 /* failed to allocate next skb. 2538 * Memory is very low. 2539 * Drop this packet and reuse buffer. 2540 */ 2541 lan743x_rx_reuse_ring_element(rx, rx->last_head); 2542 /* drop packet that was being assembled */ 2543 dev_kfree_skb_irq(rx->skb_head); 2544 rx->skb_head = NULL; 2545 goto process_extension; 2546 } 2547 2548 /* add buffers to skb via skb->frag_list */ 2549 if (is_first) { 2550 skb_reserve(skb, RX_HEAD_PADDING); 2551 skb_put(skb, buffer_length - RX_HEAD_PADDING); 2552 if (rx->skb_head) 2553 dev_kfree_skb_irq(rx->skb_head); 2554 rx->skb_head = skb; 2555 } else if (rx->skb_head) { 2556 skb_put(skb, buffer_length); 2557 if (skb_shinfo(rx->skb_head)->frag_list) 2558 rx->skb_tail->next = skb; 2559 else 2560 skb_shinfo(rx->skb_head)->frag_list = skb; 2561 rx->skb_tail = skb; 2562 rx->skb_head->len += skb->len; 2563 rx->skb_head->data_len += skb->len; 2564 rx->skb_head->truesize += skb->truesize; 2565 } else { 2566 /* packet to assemble has already been dropped because one or 2567 * more of its buffers could not be allocated 2568 */ 2569 netdev_dbg(netdev, "drop buffer intended for dropped packet"); 2570 dev_kfree_skb_irq(skb); 2571 } 2572 2573 process_extension: 2574 if (extension_index >= 0) { 2575 u32 ts_sec; 2576 u32 ts_nsec; 2577 2578 ts_sec = le32_to_cpu(desc_ext->data1); 2579 ts_nsec = (le32_to_cpu(desc_ext->data2) & 2580 RX_DESC_DATA2_TS_NS_MASK_); 2581 if (rx->skb_head) 2582 skb_hwtstamps(rx->skb_head)->hwtstamp = 2583 ktime_set(ts_sec, ts_nsec); 2584 lan743x_rx_reuse_ring_element(rx, extension_index); 2585 rx->last_head = extension_index; 2586 netdev_dbg(netdev, "process extension"); 2587 } 2588 2589 if (is_last && rx->skb_head) 2590 rx->skb_head = lan743x_rx_trim_skb(rx->skb_head, frame_length); 2591 2592 if (is_last && rx->skb_head) { 2593 rx->skb_head->protocol = eth_type_trans(rx->skb_head, 2594 rx->adapter->netdev); 2595 if (rx->adapter->netdev->features & NETIF_F_RXCSUM) { 2596 if (!is_ice && !is_tce && !is_icsm) 2597 skb->ip_summed = CHECKSUM_UNNECESSARY; 2598 } 2599 netdev_dbg(netdev, "sending %d byte frame to OS", 2600 rx->skb_head->len); 2601 napi_gro_receive(&rx->napi, rx->skb_head); 2602 rx->skb_head = NULL; 2603 } 2604 2605 move_forward: 2606 /* push tail and head forward */ 2607 rx->last_tail = rx->last_head; 2608 rx->last_head = lan743x_rx_next_index(rx, rx->last_head); 2609 result = RX_PROCESS_RESULT_BUFFER_RECEIVED; 2610 done: 2611 return result; 2612 } 2613 2614 static int lan743x_rx_napi_poll(struct napi_struct *napi, int weight) 2615 { 2616 struct lan743x_rx *rx = container_of(napi, struct lan743x_rx, napi); 2617 struct lan743x_adapter *adapter = rx->adapter; 2618 int result = RX_PROCESS_RESULT_NOTHING_TO_DO; 2619 u32 rx_tail_flags = 0; 2620 int count; 2621 2622 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C) { 2623 /* clear int status bit before reading packet */ 2624 lan743x_csr_write(adapter, DMAC_INT_STS, 2625 DMAC_INT_BIT_RXFRM_(rx->channel_number)); 2626 } 2627 for (count = 0; count < weight; count++) { 2628 result = lan743x_rx_process_buffer(rx); 2629 if (result == RX_PROCESS_RESULT_NOTHING_TO_DO) 2630 break; 2631 } 2632 rx->frame_count += count; 2633 if (count == weight || result == RX_PROCESS_RESULT_BUFFER_RECEIVED) 2634 return weight; 2635 2636 if (!napi_complete_done(napi, count)) 2637 return count; 2638 2639 /* re-arm interrupts, must write to rx tail on some chip variants */ 2640 if (rx->vector_flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET) 2641 rx_tail_flags |= RX_TAIL_SET_TOP_INT_VEC_EN_; 2642 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET) { 2643 rx_tail_flags |= RX_TAIL_SET_TOP_INT_EN_; 2644 } else { 2645 lan743x_csr_write(adapter, INT_EN_SET, 2646 INT_BIT_DMA_RX_(rx->channel_number)); 2647 } 2648 2649 if (rx_tail_flags) 2650 lan743x_csr_write(adapter, RX_TAIL(rx->channel_number), 2651 rx_tail_flags | rx->last_tail); 2652 2653 return count; 2654 } 2655 2656 static void lan743x_rx_ring_cleanup(struct lan743x_rx *rx) 2657 { 2658 if (rx->buffer_info && rx->ring_cpu_ptr) { 2659 int index; 2660 2661 for (index = 0; index < rx->ring_size; index++) 2662 lan743x_rx_release_ring_element(rx, index); 2663 } 2664 2665 if (rx->head_cpu_ptr) { 2666 dma_free_coherent(&rx->adapter->pdev->dev, 2667 sizeof(*rx->head_cpu_ptr), rx->head_cpu_ptr, 2668 rx->head_dma_ptr); 2669 rx->head_cpu_ptr = NULL; 2670 rx->head_dma_ptr = 0; 2671 } 2672 2673 kfree(rx->buffer_info); 2674 rx->buffer_info = NULL; 2675 2676 if (rx->ring_cpu_ptr) { 2677 dma_free_coherent(&rx->adapter->pdev->dev, 2678 rx->ring_allocation_size, rx->ring_cpu_ptr, 2679 rx->ring_dma_ptr); 2680 rx->ring_allocation_size = 0; 2681 rx->ring_cpu_ptr = NULL; 2682 rx->ring_dma_ptr = 0; 2683 } 2684 2685 rx->ring_size = 0; 2686 rx->last_head = 0; 2687 } 2688 2689 static int lan743x_rx_ring_init(struct lan743x_rx *rx) 2690 { 2691 size_t ring_allocation_size = 0; 2692 dma_addr_t dma_ptr = 0; 2693 void *cpu_ptr = NULL; 2694 int ret = -ENOMEM; 2695 int index = 0; 2696 2697 rx->ring_size = LAN743X_RX_RING_SIZE; 2698 if (rx->ring_size <= 1) { 2699 ret = -EINVAL; 2700 goto cleanup; 2701 } 2702 if (rx->ring_size & ~RX_CFG_B_RX_RING_LEN_MASK_) { 2703 ret = -EINVAL; 2704 goto cleanup; 2705 } 2706 if (dma_set_mask_and_coherent(&rx->adapter->pdev->dev, 2707 DMA_BIT_MASK(64))) { 2708 dev_warn(&rx->adapter->pdev->dev, 2709 "lan743x_: No suitable DMA available\n"); 2710 ret = -ENOMEM; 2711 goto cleanup; 2712 } 2713 ring_allocation_size = ALIGN(rx->ring_size * 2714 sizeof(struct lan743x_rx_descriptor), 2715 PAGE_SIZE); 2716 dma_ptr = 0; 2717 cpu_ptr = dma_alloc_coherent(&rx->adapter->pdev->dev, 2718 ring_allocation_size, &dma_ptr, GFP_KERNEL); 2719 if (!cpu_ptr) { 2720 ret = -ENOMEM; 2721 goto cleanup; 2722 } 2723 rx->ring_allocation_size = ring_allocation_size; 2724 rx->ring_cpu_ptr = (struct lan743x_rx_descriptor *)cpu_ptr; 2725 rx->ring_dma_ptr = dma_ptr; 2726 2727 cpu_ptr = kzalloc_objs(*rx->buffer_info, rx->ring_size); 2728 if (!cpu_ptr) { 2729 ret = -ENOMEM; 2730 goto cleanup; 2731 } 2732 rx->buffer_info = (struct lan743x_rx_buffer_info *)cpu_ptr; 2733 dma_ptr = 0; 2734 cpu_ptr = dma_alloc_coherent(&rx->adapter->pdev->dev, 2735 sizeof(*rx->head_cpu_ptr), &dma_ptr, 2736 GFP_KERNEL); 2737 if (!cpu_ptr) { 2738 ret = -ENOMEM; 2739 goto cleanup; 2740 } 2741 2742 rx->head_cpu_ptr = cpu_ptr; 2743 rx->head_dma_ptr = dma_ptr; 2744 if (rx->head_dma_ptr & 0x3) { 2745 ret = -ENOMEM; 2746 goto cleanup; 2747 } 2748 2749 rx->last_head = 0; 2750 for (index = 0; index < rx->ring_size; index++) { 2751 ret = lan743x_rx_init_ring_element(rx, index, GFP_KERNEL); 2752 if (ret) 2753 goto cleanup; 2754 } 2755 return 0; 2756 2757 cleanup: 2758 netif_warn(rx->adapter, ifup, rx->adapter->netdev, 2759 "Error allocating memory for LAN743x\n"); 2760 2761 lan743x_rx_ring_cleanup(rx); 2762 return ret; 2763 } 2764 2765 static void lan743x_rx_close(struct lan743x_rx *rx) 2766 { 2767 struct lan743x_adapter *adapter = rx->adapter; 2768 2769 lan743x_csr_write(adapter, FCT_RX_CTL, 2770 FCT_RX_CTL_DIS_(rx->channel_number)); 2771 lan743x_csr_wait_for_bit(adapter, FCT_RX_CTL, 2772 FCT_RX_CTL_EN_(rx->channel_number), 2773 0, 1000, 20000, 100); 2774 2775 lan743x_csr_write(adapter, DMAC_CMD, 2776 DMAC_CMD_STOP_R_(rx->channel_number)); 2777 lan743x_dmac_rx_wait_till_stopped(adapter, rx->channel_number); 2778 2779 lan743x_csr_write(adapter, DMAC_INT_EN_CLR, 2780 DMAC_INT_BIT_RXFRM_(rx->channel_number)); 2781 lan743x_csr_write(adapter, INT_EN_CLR, 2782 INT_BIT_DMA_RX_(rx->channel_number)); 2783 napi_disable(&rx->napi); 2784 2785 netif_napi_del(&rx->napi); 2786 2787 lan743x_rx_ring_cleanup(rx); 2788 } 2789 2790 static int lan743x_rx_open(struct lan743x_rx *rx) 2791 { 2792 struct lan743x_adapter *adapter = rx->adapter; 2793 u32 data = 0; 2794 int ret; 2795 2796 rx->frame_count = 0; 2797 ret = lan743x_rx_ring_init(rx); 2798 if (ret) 2799 goto return_error; 2800 2801 netif_napi_add(adapter->netdev, &rx->napi, lan743x_rx_napi_poll); 2802 2803 lan743x_csr_write(adapter, DMAC_CMD, 2804 DMAC_CMD_RX_SWR_(rx->channel_number)); 2805 lan743x_csr_wait_for_bit(adapter, DMAC_CMD, 2806 DMAC_CMD_RX_SWR_(rx->channel_number), 2807 0, 1000, 20000, 100); 2808 2809 /* set ring base address */ 2810 lan743x_csr_write(adapter, 2811 RX_BASE_ADDRH(rx->channel_number), 2812 DMA_ADDR_HIGH32(rx->ring_dma_ptr)); 2813 lan743x_csr_write(adapter, 2814 RX_BASE_ADDRL(rx->channel_number), 2815 DMA_ADDR_LOW32(rx->ring_dma_ptr)); 2816 2817 /* set rx write back address */ 2818 lan743x_csr_write(adapter, 2819 RX_HEAD_WRITEBACK_ADDRH(rx->channel_number), 2820 DMA_ADDR_HIGH32(rx->head_dma_ptr)); 2821 lan743x_csr_write(adapter, 2822 RX_HEAD_WRITEBACK_ADDRL(rx->channel_number), 2823 DMA_ADDR_LOW32(rx->head_dma_ptr)); 2824 data = RX_CFG_A_RX_HP_WB_EN_; 2825 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) { 2826 data |= (RX_CFG_A_RX_WB_ON_INT_TMR_ | 2827 RX_CFG_A_RX_WB_THRES_SET_(0x7) | 2828 RX_CFG_A_RX_PF_THRES_SET_(16) | 2829 RX_CFG_A_RX_PF_PRI_THRES_SET_(4)); 2830 } 2831 2832 /* set RX_CFG_A */ 2833 lan743x_csr_write(adapter, 2834 RX_CFG_A(rx->channel_number), data); 2835 2836 /* set RX_CFG_B */ 2837 data = lan743x_csr_read(adapter, RX_CFG_B(rx->channel_number)); 2838 data &= ~RX_CFG_B_RX_PAD_MASK_; 2839 if (!RX_HEAD_PADDING) 2840 data |= RX_CFG_B_RX_PAD_0_; 2841 else 2842 data |= RX_CFG_B_RX_PAD_2_; 2843 data &= ~RX_CFG_B_RX_RING_LEN_MASK_; 2844 data |= ((rx->ring_size) & RX_CFG_B_RX_RING_LEN_MASK_); 2845 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) 2846 data |= RX_CFG_B_RDMABL_512_; 2847 2848 lan743x_csr_write(adapter, RX_CFG_B(rx->channel_number), data); 2849 rx->vector_flags = lan743x_intr_get_vector_flags(adapter, 2850 INT_BIT_DMA_RX_ 2851 (rx->channel_number)); 2852 2853 /* set RX_CFG_C */ 2854 data = 0; 2855 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR) 2856 data |= RX_CFG_C_RX_TOP_INT_EN_AUTO_CLR_; 2857 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR) 2858 data |= RX_CFG_C_RX_DMA_INT_STS_AUTO_CLR_; 2859 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C) 2860 data |= RX_CFG_C_RX_INT_STS_R2C_MODE_MASK_; 2861 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C) 2862 data |= RX_CFG_C_RX_INT_EN_R2C_; 2863 lan743x_csr_write(adapter, RX_CFG_C(rx->channel_number), data); 2864 2865 rx->last_tail = ((u32)(rx->ring_size - 1)); 2866 lan743x_csr_write(adapter, RX_TAIL(rx->channel_number), 2867 rx->last_tail); 2868 rx->last_head = lan743x_csr_read(adapter, RX_HEAD(rx->channel_number)); 2869 if (rx->last_head) { 2870 ret = -EIO; 2871 goto napi_delete; 2872 } 2873 2874 napi_enable(&rx->napi); 2875 2876 lan743x_csr_write(adapter, INT_EN_SET, 2877 INT_BIT_DMA_RX_(rx->channel_number)); 2878 lan743x_csr_write(adapter, DMAC_INT_STS, 2879 DMAC_INT_BIT_RXFRM_(rx->channel_number)); 2880 lan743x_csr_write(adapter, DMAC_INT_EN_SET, 2881 DMAC_INT_BIT_RXFRM_(rx->channel_number)); 2882 lan743x_csr_write(adapter, DMAC_CMD, 2883 DMAC_CMD_START_R_(rx->channel_number)); 2884 2885 /* initialize fifo */ 2886 lan743x_csr_write(adapter, FCT_RX_CTL, 2887 FCT_RX_CTL_RESET_(rx->channel_number)); 2888 lan743x_csr_wait_for_bit(adapter, FCT_RX_CTL, 2889 FCT_RX_CTL_RESET_(rx->channel_number), 2890 0, 1000, 20000, 100); 2891 lan743x_csr_write(adapter, FCT_FLOW(rx->channel_number), 2892 FCT_FLOW_CTL_REQ_EN_ | 2893 FCT_FLOW_CTL_ON_THRESHOLD_SET_(0x2A) | 2894 FCT_FLOW_CTL_OFF_THRESHOLD_SET_(0xA)); 2895 2896 /* enable fifo */ 2897 lan743x_csr_write(adapter, FCT_RX_CTL, 2898 FCT_RX_CTL_EN_(rx->channel_number)); 2899 return 0; 2900 2901 napi_delete: 2902 netif_napi_del(&rx->napi); 2903 lan743x_rx_ring_cleanup(rx); 2904 2905 return_error: 2906 return ret; 2907 } 2908 2909 static int lan743x_phylink_sgmii_config(struct lan743x_adapter *adapter) 2910 { 2911 u32 sgmii_ctl; 2912 int ret; 2913 2914 ret = lan743x_get_lsd(SPEED_1000, DUPLEX_FULL, 2915 MASTER_SLAVE_STATE_MASTER); 2916 if (ret < 0) { 2917 netif_err(adapter, drv, adapter->netdev, 2918 "error %d link-speed-duplex(LSD) invalid\n", ret); 2919 return ret; 2920 } 2921 2922 adapter->sgmii_lsd = ret; 2923 netif_dbg(adapter, drv, adapter->netdev, 2924 "Link Speed Duplex (lsd) : 0x%X\n", adapter->sgmii_lsd); 2925 2926 /* LINK_STATUS_SOURCE from the External PHY via SGMII */ 2927 sgmii_ctl = lan743x_csr_read(adapter, SGMII_CTL); 2928 sgmii_ctl &= ~SGMII_CTL_LINK_STATUS_SOURCE_; 2929 lan743x_csr_write(adapter, SGMII_CTL, sgmii_ctl); 2930 2931 ret = lan743x_serdes_clock_and_aneg_update(adapter); 2932 if (ret < 0) { 2933 netif_err(adapter, drv, adapter->netdev, 2934 "error %d sgmii aneg update failed\n", ret); 2935 return ret; 2936 } 2937 2938 return lan743x_pcs_power_reset(adapter); 2939 } 2940 2941 static int lan743x_phylink_1000basex_config(struct lan743x_adapter *adapter) 2942 { 2943 u32 sgmii_ctl; 2944 int ret; 2945 2946 ret = lan743x_get_lsd(SPEED_1000, DUPLEX_FULL, 2947 MASTER_SLAVE_STATE_MASTER); 2948 if (ret < 0) { 2949 netif_err(adapter, drv, adapter->netdev, 2950 "error %d link-speed-duplex(LSD) invalid\n", ret); 2951 return ret; 2952 } 2953 2954 adapter->sgmii_lsd = ret; 2955 netif_dbg(adapter, drv, adapter->netdev, 2956 "Link Speed Duplex (lsd) : 0x%X\n", adapter->sgmii_lsd); 2957 2958 /* LINK_STATUS_SOURCE from 1000BASE-X PCS link status */ 2959 sgmii_ctl = lan743x_csr_read(adapter, SGMII_CTL); 2960 sgmii_ctl |= SGMII_CTL_LINK_STATUS_SOURCE_; 2961 lan743x_csr_write(adapter, SGMII_CTL, sgmii_ctl); 2962 2963 ret = lan743x_serdes_clock_and_aneg_update(adapter); 2964 if (ret < 0) { 2965 netif_err(adapter, drv, adapter->netdev, 2966 "error %d 1000basex aneg update failed\n", ret); 2967 return ret; 2968 } 2969 2970 return lan743x_pcs_power_reset(adapter); 2971 } 2972 2973 static int lan743x_phylink_2500basex_config(struct lan743x_adapter *adapter) 2974 { 2975 u32 sgmii_ctl; 2976 int ret; 2977 2978 ret = lan743x_get_lsd(SPEED_2500, DUPLEX_FULL, 2979 MASTER_SLAVE_STATE_MASTER); 2980 if (ret < 0) { 2981 netif_err(adapter, drv, adapter->netdev, 2982 "error %d link-speed-duplex(LSD) invalid\n", ret); 2983 return ret; 2984 } 2985 2986 adapter->sgmii_lsd = ret; 2987 netif_dbg(adapter, drv, adapter->netdev, 2988 "Link Speed Duplex (lsd) : 0x%X\n", adapter->sgmii_lsd); 2989 2990 /* LINK_STATUS_SOURCE from 2500BASE-X PCS link status */ 2991 sgmii_ctl = lan743x_csr_read(adapter, SGMII_CTL); 2992 sgmii_ctl |= SGMII_CTL_LINK_STATUS_SOURCE_; 2993 lan743x_csr_write(adapter, SGMII_CTL, sgmii_ctl); 2994 2995 ret = lan743x_serdes_clock_and_aneg_update(adapter); 2996 if (ret < 0) { 2997 netif_err(adapter, drv, adapter->netdev, 2998 "error %d 2500basex aneg update failed\n", ret); 2999 return ret; 3000 } 3001 3002 return lan743x_pcs_power_reset(adapter); 3003 } 3004 3005 static void lan743x_mac_eee_enable(struct lan743x_adapter *adapter, bool enable) 3006 { 3007 u32 mac_cr; 3008 3009 mac_cr = lan743x_csr_read(adapter, MAC_CR); 3010 if (enable) 3011 mac_cr |= MAC_CR_EEE_EN_; 3012 else 3013 mac_cr &= ~MAC_CR_EEE_EN_; 3014 lan743x_csr_write(adapter, MAC_CR, mac_cr); 3015 } 3016 3017 static void lan743x_phylink_mac_config(struct phylink_config *config, 3018 unsigned int link_an_mode, 3019 const struct phylink_link_state *state) 3020 { 3021 struct net_device *netdev = to_net_dev(config->dev); 3022 struct lan743x_adapter *adapter = netdev_priv(netdev); 3023 int ret; 3024 3025 switch (state->interface) { 3026 case PHY_INTERFACE_MODE_2500BASEX: 3027 ret = lan743x_phylink_2500basex_config(adapter); 3028 if (ret < 0) 3029 netif_err(adapter, drv, adapter->netdev, 3030 "2500BASEX config failed. Error %d\n", ret); 3031 else 3032 netif_dbg(adapter, drv, adapter->netdev, 3033 "2500BASEX mode selected and configured\n"); 3034 break; 3035 case PHY_INTERFACE_MODE_1000BASEX: 3036 ret = lan743x_phylink_1000basex_config(adapter); 3037 if (ret < 0) 3038 netif_err(adapter, drv, adapter->netdev, 3039 "1000BASEX config failed. Error %d\n", ret); 3040 else 3041 netif_dbg(adapter, drv, adapter->netdev, 3042 "1000BASEX mode selected and configured\n"); 3043 break; 3044 case PHY_INTERFACE_MODE_SGMII: 3045 ret = lan743x_phylink_sgmii_config(adapter); 3046 if (ret < 0) 3047 netif_err(adapter, drv, adapter->netdev, 3048 "SGMII config failed. Error %d\n", ret); 3049 else 3050 netif_dbg(adapter, drv, adapter->netdev, 3051 "SGMII mode selected and configured\n"); 3052 break; 3053 default: 3054 netif_dbg(adapter, drv, adapter->netdev, 3055 "RGMII/GMII/MII(0x%X) mode enable\n", 3056 state->interface); 3057 break; 3058 } 3059 } 3060 3061 static void lan743x_phylink_mac_link_down(struct phylink_config *config, 3062 unsigned int link_an_mode, 3063 phy_interface_t interface) 3064 { 3065 struct net_device *netdev = to_net_dev(config->dev); 3066 3067 netif_tx_stop_all_queues(netdev); 3068 } 3069 3070 static void lan743x_phylink_mac_link_up(struct phylink_config *config, 3071 struct phy_device *phydev, 3072 unsigned int link_an_mode, 3073 phy_interface_t interface, 3074 int speed, int duplex, 3075 bool tx_pause, bool rx_pause) 3076 { 3077 struct net_device *netdev = to_net_dev(config->dev); 3078 struct lan743x_adapter *adapter = netdev_priv(netdev); 3079 int mac_cr; 3080 u8 cap; 3081 3082 mac_cr = lan743x_csr_read(adapter, MAC_CR); 3083 /* Pre-initialize register bits. 3084 * Resulting value corresponds to SPEED_10 3085 */ 3086 mac_cr &= ~(MAC_CR_CFG_H_ | MAC_CR_CFG_L_); 3087 if (speed == SPEED_2500) 3088 mac_cr |= MAC_CR_CFG_H_ | MAC_CR_CFG_L_; 3089 else if (speed == SPEED_1000) 3090 mac_cr |= MAC_CR_CFG_H_; 3091 else if (speed == SPEED_100) 3092 mac_cr |= MAC_CR_CFG_L_; 3093 3094 if (duplex == DUPLEX_FULL) 3095 mac_cr |= MAC_CR_DPX_; 3096 else 3097 mac_cr &= ~MAC_CR_DPX_; 3098 3099 lan743x_csr_write(adapter, MAC_CR, mac_cr); 3100 3101 lan743x_ptp_update_latency(adapter, speed); 3102 3103 /* Flow Control operation */ 3104 cap = 0; 3105 if (tx_pause) 3106 cap |= FLOW_CTRL_TX; 3107 if (rx_pause) 3108 cap |= FLOW_CTRL_RX; 3109 3110 lan743x_mac_flow_ctrl_set_enables(adapter, 3111 cap & FLOW_CTRL_TX, 3112 cap & FLOW_CTRL_RX); 3113 3114 netif_tx_wake_all_queues(netdev); 3115 } 3116 3117 static void lan743x_mac_disable_tx_lpi(struct phylink_config *config) 3118 { 3119 struct net_device *netdev = to_net_dev(config->dev); 3120 struct lan743x_adapter *adapter = netdev_priv(netdev); 3121 3122 lan743x_mac_eee_enable(adapter, false); 3123 } 3124 3125 static int lan743x_mac_enable_tx_lpi(struct phylink_config *config, u32 timer, 3126 bool tx_clk_stop) 3127 { 3128 struct net_device *netdev = to_net_dev(config->dev); 3129 struct lan743x_adapter *adapter = netdev_priv(netdev); 3130 3131 /* Software should only change this field when Energy Efficient 3132 * Ethernet Enable (EEEEN) is cleared. We ensure that by clearing 3133 * EEEEN during probe, and phylink itself guarantees that 3134 * mac_disable_tx_lpi() will have been previously called. 3135 */ 3136 lan743x_csr_write(adapter, MAC_EEE_TX_LPI_REQ_DLY_CNT, timer); 3137 lan743x_mac_eee_enable(adapter, true); 3138 3139 return 0; 3140 } 3141 3142 static const struct phylink_mac_ops lan743x_phylink_mac_ops = { 3143 .mac_config = lan743x_phylink_mac_config, 3144 .mac_link_down = lan743x_phylink_mac_link_down, 3145 .mac_link_up = lan743x_phylink_mac_link_up, 3146 .mac_disable_tx_lpi = lan743x_mac_disable_tx_lpi, 3147 .mac_enable_tx_lpi = lan743x_mac_enable_tx_lpi, 3148 }; 3149 3150 static int lan743x_phylink_create(struct lan743x_adapter *adapter) 3151 { 3152 struct net_device *netdev = adapter->netdev; 3153 struct phylink *pl; 3154 3155 adapter->phylink_config.dev = &netdev->dev; 3156 adapter->phylink_config.type = PHYLINK_NETDEV; 3157 adapter->phylink_config.mac_managed_pm = false; 3158 3159 adapter->phylink_config.mac_capabilities = MAC_ASYM_PAUSE | 3160 MAC_SYM_PAUSE | MAC_10 | MAC_100 | MAC_1000FD; 3161 adapter->phylink_config.lpi_capabilities = MAC_100FD | MAC_1000FD; 3162 adapter->phylink_config.lpi_timer_default = 3163 lan743x_csr_read(adapter, MAC_EEE_TX_LPI_REQ_DLY_CNT); 3164 3165 lan743x_phy_interface_select(adapter); 3166 3167 switch (adapter->phy_interface) { 3168 case PHY_INTERFACE_MODE_SGMII: 3169 __set_bit(PHY_INTERFACE_MODE_SGMII, 3170 adapter->phylink_config.supported_interfaces); 3171 __set_bit(PHY_INTERFACE_MODE_1000BASEX, 3172 adapter->phylink_config.supported_interfaces); 3173 __set_bit(PHY_INTERFACE_MODE_2500BASEX, 3174 adapter->phylink_config.supported_interfaces); 3175 adapter->phylink_config.mac_capabilities |= MAC_2500FD; 3176 break; 3177 case PHY_INTERFACE_MODE_GMII: 3178 __set_bit(PHY_INTERFACE_MODE_GMII, 3179 adapter->phylink_config.supported_interfaces); 3180 break; 3181 case PHY_INTERFACE_MODE_MII: 3182 __set_bit(PHY_INTERFACE_MODE_MII, 3183 adapter->phylink_config.supported_interfaces); 3184 break; 3185 default: 3186 phy_interface_set_rgmii(adapter->phylink_config.supported_interfaces); 3187 } 3188 3189 memcpy(adapter->phylink_config.lpi_interfaces, 3190 adapter->phylink_config.supported_interfaces, 3191 sizeof(adapter->phylink_config.lpi_interfaces)); 3192 3193 pl = phylink_create(&adapter->phylink_config, NULL, 3194 adapter->phy_interface, &lan743x_phylink_mac_ops); 3195 3196 if (IS_ERR(pl)) { 3197 netdev_err(netdev, "Could not create phylink (%pe)\n", pl); 3198 return PTR_ERR(pl); 3199 } 3200 3201 adapter->phylink = pl; 3202 dev_dbg(&adapter->pdev->dev, "lan743x phylink created"); 3203 3204 return 0; 3205 } 3206 3207 static bool lan743x_phy_handle_exists(struct device_node *dn) 3208 { 3209 dn = of_parse_phandle(dn, "phy-handle", 0); 3210 of_node_put(dn); 3211 return dn != NULL; 3212 } 3213 3214 static int lan743x_phylink_connect(struct lan743x_adapter *adapter) 3215 { 3216 struct device_node *dn = adapter->pdev->dev.of_node; 3217 struct net_device *dev = adapter->netdev; 3218 struct phy_device *phydev; 3219 int ret; 3220 3221 if (dn) 3222 ret = phylink_of_phy_connect(adapter->phylink, dn, 0); 3223 3224 if (!dn || (ret && !lan743x_phy_handle_exists(dn))) { 3225 phydev = phy_find_first(adapter->mdiobus); 3226 if (phydev) { 3227 /* attach the mac to the phy */ 3228 ret = phylink_connect_phy(adapter->phylink, phydev); 3229 } else if (((adapter->csr.id_rev & ID_REV_ID_MASK_) == 3230 ID_REV_ID_LAN7431_) || adapter->is_pci11x1x) { 3231 struct phylink_link_state state; 3232 unsigned long caps; 3233 3234 caps = adapter->phylink_config.mac_capabilities; 3235 if (caps & MAC_2500FD) { 3236 state.speed = SPEED_2500; 3237 state.duplex = DUPLEX_FULL; 3238 } else if (caps & MAC_1000FD) { 3239 state.speed = SPEED_1000; 3240 state.duplex = DUPLEX_FULL; 3241 } else { 3242 state.speed = SPEED_UNKNOWN; 3243 state.duplex = DUPLEX_UNKNOWN; 3244 } 3245 3246 ret = phylink_set_fixed_link(adapter->phylink, &state); 3247 if (ret) { 3248 netdev_err(dev, "Could not set fixed link\n"); 3249 return ret; 3250 } 3251 } else { 3252 netdev_err(dev, "no PHY found\n"); 3253 return -ENXIO; 3254 } 3255 } 3256 3257 if (ret) { 3258 netdev_err(dev, "Could not attach PHY (%d)\n", ret); 3259 return ret; 3260 } 3261 3262 phylink_start(adapter->phylink); 3263 3264 return 0; 3265 } 3266 3267 static void lan743x_phylink_disconnect(struct lan743x_adapter *adapter) 3268 { 3269 phylink_stop(adapter->phylink); 3270 phylink_disconnect_phy(adapter->phylink); 3271 } 3272 3273 static int lan743x_netdev_close(struct net_device *netdev) 3274 { 3275 struct lan743x_adapter *adapter = netdev_priv(netdev); 3276 int index; 3277 3278 for (index = 0; index < adapter->used_tx_channels; index++) 3279 lan743x_tx_close(&adapter->tx[index]); 3280 3281 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) 3282 lan743x_rx_close(&adapter->rx[index]); 3283 3284 lan743x_ptp_close(adapter); 3285 3286 lan743x_phylink_disconnect(adapter); 3287 3288 lan743x_mac_close(adapter); 3289 3290 lan743x_intr_close(adapter); 3291 3292 return 0; 3293 } 3294 3295 static int lan743x_netdev_open(struct net_device *netdev) 3296 { 3297 struct lan743x_adapter *adapter = netdev_priv(netdev); 3298 int index; 3299 int ret; 3300 3301 ret = lan743x_intr_open(adapter); 3302 if (ret) 3303 goto return_error; 3304 3305 ret = lan743x_mac_open(adapter); 3306 if (ret) 3307 goto close_intr; 3308 3309 ret = lan743x_phylink_connect(adapter); 3310 if (ret) 3311 goto close_mac; 3312 3313 ret = lan743x_ptp_open(adapter); 3314 if (ret) 3315 goto close_mac; 3316 3317 lan743x_rfe_open(adapter); 3318 3319 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) { 3320 ret = lan743x_rx_open(&adapter->rx[index]); 3321 if (ret) 3322 goto close_rx; 3323 } 3324 3325 for (index = 0; index < adapter->used_tx_channels; index++) { 3326 ret = lan743x_tx_open(&adapter->tx[index]); 3327 if (ret) 3328 goto close_tx; 3329 } 3330 3331 if (netdev->phydev) 3332 phy_support_eee(netdev->phydev); 3333 3334 #ifdef CONFIG_PM 3335 if (adapter->netdev->phydev) { 3336 struct ethtool_wolinfo wol = { .cmd = ETHTOOL_GWOL }; 3337 3338 phy_ethtool_get_wol(netdev->phydev, &wol); 3339 adapter->phy_wol_supported = wol.supported; 3340 adapter->phy_wolopts = wol.wolopts; 3341 } 3342 #endif 3343 3344 return 0; 3345 3346 close_tx: 3347 for (index = 0; index < adapter->used_tx_channels; index++) { 3348 if (adapter->tx[index].ring_cpu_ptr) 3349 lan743x_tx_close(&adapter->tx[index]); 3350 } 3351 3352 close_rx: 3353 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) { 3354 if (adapter->rx[index].ring_cpu_ptr) 3355 lan743x_rx_close(&adapter->rx[index]); 3356 } 3357 lan743x_ptp_close(adapter); 3358 if (adapter->phylink) 3359 lan743x_phylink_disconnect(adapter); 3360 3361 close_mac: 3362 lan743x_mac_close(adapter); 3363 3364 close_intr: 3365 lan743x_intr_close(adapter); 3366 3367 return_error: 3368 netif_warn(adapter, ifup, adapter->netdev, 3369 "Error opening LAN743x\n"); 3370 return ret; 3371 } 3372 3373 static netdev_tx_t lan743x_netdev_xmit_frame(struct sk_buff *skb, 3374 struct net_device *netdev) 3375 { 3376 struct lan743x_adapter *adapter = netdev_priv(netdev); 3377 u8 ch = 0; 3378 3379 if (adapter->is_pci11x1x) 3380 ch = skb->queue_mapping % PCI11X1X_USED_TX_CHANNELS; 3381 3382 return lan743x_tx_xmit_frame(&adapter->tx[ch], skb); 3383 } 3384 3385 static int lan743x_netdev_ioctl(struct net_device *netdev, 3386 struct ifreq *ifr, int cmd) 3387 { 3388 struct lan743x_adapter *adapter = netdev_priv(netdev); 3389 3390 if (!netif_running(netdev)) 3391 return -EINVAL; 3392 3393 return phylink_mii_ioctl(adapter->phylink, ifr, cmd); 3394 } 3395 3396 static void lan743x_netdev_set_multicast(struct net_device *netdev) 3397 { 3398 struct lan743x_adapter *adapter = netdev_priv(netdev); 3399 3400 lan743x_rfe_set_multicast(adapter); 3401 } 3402 3403 static int lan743x_netdev_change_mtu(struct net_device *netdev, int new_mtu) 3404 { 3405 struct lan743x_adapter *adapter = netdev_priv(netdev); 3406 int ret = 0; 3407 3408 ret = lan743x_mac_set_mtu(adapter, new_mtu); 3409 if (!ret) 3410 WRITE_ONCE(netdev->mtu, new_mtu); 3411 return ret; 3412 } 3413 3414 static void lan743x_netdev_get_stats64(struct net_device *netdev, 3415 struct rtnl_link_stats64 *stats) 3416 { 3417 struct lan743x_adapter *adapter = netdev_priv(netdev); 3418 3419 stats->rx_packets = lan743x_csr_read(adapter, STAT_RX_TOTAL_FRAMES); 3420 stats->tx_packets = lan743x_csr_read(adapter, STAT_TX_TOTAL_FRAMES); 3421 stats->rx_bytes = lan743x_csr_read(adapter, 3422 STAT_RX_UNICAST_BYTE_COUNT) + 3423 lan743x_csr_read(adapter, 3424 STAT_RX_BROADCAST_BYTE_COUNT) + 3425 lan743x_csr_read(adapter, 3426 STAT_RX_MULTICAST_BYTE_COUNT); 3427 stats->tx_bytes = lan743x_csr_read(adapter, 3428 STAT_TX_UNICAST_BYTE_COUNT) + 3429 lan743x_csr_read(adapter, 3430 STAT_TX_BROADCAST_BYTE_COUNT) + 3431 lan743x_csr_read(adapter, 3432 STAT_TX_MULTICAST_BYTE_COUNT); 3433 stats->rx_errors = lan743x_csr_read(adapter, STAT_RX_FCS_ERRORS) + 3434 lan743x_csr_read(adapter, 3435 STAT_RX_ALIGNMENT_ERRORS) + 3436 lan743x_csr_read(adapter, STAT_RX_JABBER_ERRORS) + 3437 lan743x_csr_read(adapter, 3438 STAT_RX_UNDERSIZE_FRAME_ERRORS) + 3439 lan743x_csr_read(adapter, 3440 STAT_RX_OVERSIZE_FRAME_ERRORS); 3441 stats->tx_errors = lan743x_csr_read(adapter, STAT_TX_FCS_ERRORS) + 3442 lan743x_csr_read(adapter, 3443 STAT_TX_EXCESS_DEFERRAL_ERRORS) + 3444 lan743x_csr_read(adapter, STAT_TX_CARRIER_ERRORS); 3445 stats->rx_dropped = lan743x_csr_read(adapter, 3446 STAT_RX_DROPPED_FRAMES); 3447 stats->tx_dropped = lan743x_csr_read(adapter, 3448 STAT_TX_EXCESSIVE_COLLISION); 3449 stats->multicast = lan743x_csr_read(adapter, 3450 STAT_RX_MULTICAST_FRAMES) + 3451 lan743x_csr_read(adapter, 3452 STAT_TX_MULTICAST_FRAMES); 3453 stats->collisions = lan743x_csr_read(adapter, 3454 STAT_TX_SINGLE_COLLISIONS) + 3455 lan743x_csr_read(adapter, 3456 STAT_TX_MULTIPLE_COLLISIONS) + 3457 lan743x_csr_read(adapter, 3458 STAT_TX_LATE_COLLISIONS); 3459 } 3460 3461 static int lan743x_netdev_set_mac_address(struct net_device *netdev, 3462 void *addr) 3463 { 3464 struct lan743x_adapter *adapter = netdev_priv(netdev); 3465 struct sockaddr *sock_addr = addr; 3466 int ret; 3467 3468 ret = eth_prepare_mac_addr_change(netdev, sock_addr); 3469 if (ret) 3470 return ret; 3471 eth_hw_addr_set(netdev, sock_addr->sa_data); 3472 lan743x_mac_set_address(adapter, sock_addr->sa_data); 3473 lan743x_rfe_update_mac_address(adapter); 3474 return 0; 3475 } 3476 3477 static const struct net_device_ops lan743x_netdev_ops = { 3478 .ndo_open = lan743x_netdev_open, 3479 .ndo_stop = lan743x_netdev_close, 3480 .ndo_start_xmit = lan743x_netdev_xmit_frame, 3481 .ndo_eth_ioctl = lan743x_netdev_ioctl, 3482 .ndo_set_rx_mode = lan743x_netdev_set_multicast, 3483 .ndo_change_mtu = lan743x_netdev_change_mtu, 3484 .ndo_get_stats64 = lan743x_netdev_get_stats64, 3485 .ndo_set_mac_address = lan743x_netdev_set_mac_address, 3486 .ndo_hwtstamp_get = lan743x_ptp_hwtstamp_get, 3487 .ndo_hwtstamp_set = lan743x_ptp_hwtstamp_set, 3488 }; 3489 3490 static void lan743x_hardware_cleanup(struct lan743x_adapter *adapter) 3491 { 3492 lan743x_csr_write(adapter, INT_EN_CLR, 0xFFFFFFFF); 3493 } 3494 3495 static void lan743x_mdiobus_cleanup(struct lan743x_adapter *adapter) 3496 { 3497 mdiobus_unregister(adapter->mdiobus); 3498 } 3499 3500 static void lan743x_destroy_phylink(struct lan743x_adapter *adapter) 3501 { 3502 phylink_destroy(adapter->phylink); 3503 adapter->phylink = NULL; 3504 } 3505 3506 static void lan743x_full_cleanup(struct lan743x_adapter *adapter) 3507 { 3508 unregister_netdev(adapter->netdev); 3509 3510 lan743x_destroy_phylink(adapter); 3511 lan743x_mdiobus_cleanup(adapter); 3512 lan743x_hardware_cleanup(adapter); 3513 lan743x_pci_cleanup(adapter); 3514 } 3515 3516 static void pci11x1x_set_rfe_rd_fifo_threshold(struct lan743x_adapter *adapter) 3517 { 3518 u16 rev = adapter->csr.id_rev & ID_REV_CHIP_REV_MASK_; 3519 3520 if (rev == ID_REV_CHIP_REV_PCI11X1X_B0_) { 3521 u32 misc_ctl; 3522 3523 misc_ctl = lan743x_csr_read(adapter, MISC_CTL_0); 3524 misc_ctl &= ~MISC_CTL_0_RFE_READ_FIFO_MASK_; 3525 misc_ctl |= FIELD_PREP(MISC_CTL_0_RFE_READ_FIFO_MASK_, 3526 RFE_RD_FIFO_TH_3_DWORDS); 3527 lan743x_csr_write(adapter, MISC_CTL_0, misc_ctl); 3528 } 3529 } 3530 3531 static int lan743x_hardware_init(struct lan743x_adapter *adapter, 3532 struct pci_dev *pdev) 3533 { 3534 struct lan743x_tx *tx; 3535 u32 sgmii_ctl; 3536 int index; 3537 int ret; 3538 3539 adapter->is_pci11x1x = is_pci11x1x_chip(adapter); 3540 if (adapter->is_pci11x1x) { 3541 adapter->max_tx_channels = PCI11X1X_MAX_TX_CHANNELS; 3542 adapter->used_tx_channels = PCI11X1X_USED_TX_CHANNELS; 3543 adapter->max_vector_count = PCI11X1X_MAX_VECTOR_COUNT; 3544 pci11x1x_strap_get_status(adapter); 3545 spin_lock_init(&adapter->eth_syslock_spinlock); 3546 mutex_init(&adapter->sgmii_rw_lock); 3547 pci11x1x_set_rfe_rd_fifo_threshold(adapter); 3548 sgmii_ctl = lan743x_csr_read(adapter, SGMII_CTL); 3549 if (adapter->is_sgmii_en) { 3550 sgmii_ctl |= SGMII_CTL_SGMII_ENABLE_; 3551 sgmii_ctl &= ~SGMII_CTL_SGMII_POWER_DN_; 3552 } else { 3553 sgmii_ctl &= ~SGMII_CTL_SGMII_ENABLE_; 3554 sgmii_ctl |= SGMII_CTL_SGMII_POWER_DN_; 3555 } 3556 lan743x_csr_write(adapter, SGMII_CTL, sgmii_ctl); 3557 } else { 3558 adapter->max_tx_channels = LAN743X_MAX_TX_CHANNELS; 3559 adapter->used_tx_channels = LAN743X_USED_TX_CHANNELS; 3560 adapter->max_vector_count = LAN743X_MAX_VECTOR_COUNT; 3561 } 3562 3563 adapter->intr.irq = adapter->pdev->irq; 3564 lan743x_csr_write(adapter, INT_EN_CLR, 0xFFFFFFFF); 3565 3566 ret = lan743x_gpio_init(adapter); 3567 if (ret) 3568 return ret; 3569 3570 ret = lan743x_mac_init(adapter); 3571 if (ret) 3572 return ret; 3573 3574 ret = lan743x_ptp_init(adapter); 3575 if (ret) 3576 return ret; 3577 3578 lan743x_rfe_update_mac_address(adapter); 3579 3580 ret = lan743x_dmac_init(adapter); 3581 if (ret) 3582 return ret; 3583 3584 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) { 3585 adapter->rx[index].adapter = adapter; 3586 adapter->rx[index].channel_number = index; 3587 } 3588 3589 for (index = 0; index < adapter->used_tx_channels; index++) { 3590 tx = &adapter->tx[index]; 3591 tx->adapter = adapter; 3592 tx->channel_number = index; 3593 spin_lock_init(&tx->ring_lock); 3594 } 3595 3596 /* Ensure EEEEN is clear */ 3597 lan743x_mac_eee_enable(adapter, false); 3598 3599 return 0; 3600 } 3601 3602 static int lan743x_mdiobus_init(struct lan743x_adapter *adapter) 3603 { 3604 int ret; 3605 3606 adapter->mdiobus = devm_mdiobus_alloc(&adapter->pdev->dev); 3607 if (!(adapter->mdiobus)) { 3608 ret = -ENOMEM; 3609 goto return_error; 3610 } 3611 3612 adapter->mdiobus->priv = (void *)adapter; 3613 if (adapter->is_pci11x1x) { 3614 if (adapter->is_sgmii_en) { 3615 dev_dbg(&adapter->pdev->dev, "SGMII operation\n"); 3616 adapter->mdiobus->read = lan743x_mdiobus_read_c22; 3617 adapter->mdiobus->write = lan743x_mdiobus_write_c22; 3618 adapter->mdiobus->read_c45 = lan743x_mdiobus_read_c45; 3619 adapter->mdiobus->write_c45 = lan743x_mdiobus_write_c45; 3620 adapter->mdiobus->name = "lan743x-mdiobus-c45"; 3621 dev_dbg(&adapter->pdev->dev, "lan743x-mdiobus-c45\n"); 3622 } else { 3623 dev_dbg(&adapter->pdev->dev, "RGMII operation\n"); 3624 // Only C22 support when RGMII I/F 3625 adapter->mdiobus->read = lan743x_mdiobus_read_c22; 3626 adapter->mdiobus->write = lan743x_mdiobus_write_c22; 3627 adapter->mdiobus->name = "lan743x-mdiobus"; 3628 dev_dbg(&adapter->pdev->dev, "lan743x-mdiobus\n"); 3629 } 3630 } else { 3631 adapter->mdiobus->read = lan743x_mdiobus_read_c22; 3632 adapter->mdiobus->write = lan743x_mdiobus_write_c22; 3633 adapter->mdiobus->name = "lan743x-mdiobus"; 3634 dev_dbg(&adapter->pdev->dev, "lan743x-mdiobus\n"); 3635 } 3636 3637 snprintf(adapter->mdiobus->id, MII_BUS_ID_SIZE, 3638 "pci-%s", pci_name(adapter->pdev)); 3639 3640 if ((adapter->csr.id_rev & ID_REV_ID_MASK_) == ID_REV_ID_LAN7430_) 3641 /* LAN7430 uses internal phy at address 1 */ 3642 adapter->mdiobus->phy_mask = ~(u32)BIT(1); 3643 3644 /* register mdiobus */ 3645 ret = mdiobus_register(adapter->mdiobus); 3646 if (ret < 0) 3647 goto return_error; 3648 return 0; 3649 3650 return_error: 3651 return ret; 3652 } 3653 3654 /* lan743x_pcidev_probe - Device Initialization Routine 3655 * @pdev: PCI device information struct 3656 * @id: entry in lan743x_pci_tbl 3657 * 3658 * Returns 0 on success, negative on failure 3659 * 3660 * initializes an adapter identified by a pci_dev structure. 3661 * The OS initialization, configuring of the adapter private structure, 3662 * and a hardware reset occur. 3663 **/ 3664 static int lan743x_pcidev_probe(struct pci_dev *pdev, 3665 const struct pci_device_id *id) 3666 { 3667 struct lan743x_adapter *adapter = NULL; 3668 struct net_device *netdev = NULL; 3669 int ret = -ENODEV; 3670 3671 if (id->device == PCI_DEVICE_ID_SMSC_A011 || 3672 id->device == PCI_DEVICE_ID_SMSC_A041) { 3673 netdev = devm_alloc_etherdev_mqs(&pdev->dev, 3674 sizeof(struct lan743x_adapter), 3675 PCI11X1X_USED_TX_CHANNELS, 3676 LAN743X_USED_RX_CHANNELS); 3677 } else { 3678 netdev = devm_alloc_etherdev_mqs(&pdev->dev, 3679 sizeof(struct lan743x_adapter), 3680 LAN743X_USED_TX_CHANNELS, 3681 LAN743X_USED_RX_CHANNELS); 3682 } 3683 3684 if (!netdev) 3685 goto return_error; 3686 3687 SET_NETDEV_DEV(netdev, &pdev->dev); 3688 pci_set_drvdata(pdev, netdev); 3689 adapter = netdev_priv(netdev); 3690 adapter->netdev = netdev; 3691 adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE | 3692 NETIF_MSG_LINK | NETIF_MSG_IFUP | 3693 NETIF_MSG_IFDOWN | NETIF_MSG_TX_QUEUED; 3694 netdev->max_mtu = LAN743X_MAX_FRAME_SIZE; 3695 3696 of_get_mac_address(pdev->dev.of_node, adapter->mac_address); 3697 3698 ret = lan743x_pci_init(adapter, pdev); 3699 if (ret) 3700 goto return_error; 3701 3702 ret = lan743x_csr_init(adapter); 3703 if (ret) 3704 goto cleanup_pci; 3705 3706 ret = lan743x_hw_reset_phy(adapter); 3707 if (ret) 3708 goto cleanup_pci; 3709 3710 ret = lan743x_hardware_init(adapter, pdev); 3711 if (ret) 3712 goto cleanup_pci; 3713 3714 ret = lan743x_mdiobus_init(adapter); 3715 if (ret) 3716 goto cleanup_hardware; 3717 3718 adapter->netdev->netdev_ops = &lan743x_netdev_ops; 3719 adapter->netdev->ethtool_ops = &lan743x_ethtool_ops; 3720 adapter->netdev->features = NETIF_F_SG | NETIF_F_TSO | 3721 NETIF_F_HW_CSUM | NETIF_F_RXCSUM; 3722 adapter->netdev->hw_features = adapter->netdev->features; 3723 3724 ret = lan743x_phylink_create(adapter); 3725 if (ret < 0) { 3726 dev_err(&pdev->dev, "failed to setup phylink (%d)\n", ret); 3727 goto cleanup_mdiobus; 3728 } 3729 3730 ret = register_netdev(adapter->netdev); 3731 if (ret < 0) 3732 goto cleanup_phylink; 3733 return 0; 3734 3735 cleanup_phylink: 3736 lan743x_destroy_phylink(adapter); 3737 3738 cleanup_mdiobus: 3739 lan743x_mdiobus_cleanup(adapter); 3740 3741 cleanup_hardware: 3742 lan743x_hardware_cleanup(adapter); 3743 3744 cleanup_pci: 3745 lan743x_pci_cleanup(adapter); 3746 3747 return_error: 3748 pr_warn("Initialization failed\n"); 3749 return ret; 3750 } 3751 3752 /** 3753 * lan743x_pcidev_remove - Device Removal Routine 3754 * @pdev: PCI device information struct 3755 * 3756 * this is called by the PCI subsystem to alert the driver 3757 * that it should release a PCI device. This could be caused by a 3758 * Hot-Plug event, or because the driver is going to be removed from 3759 * memory. 3760 **/ 3761 static void lan743x_pcidev_remove(struct pci_dev *pdev) 3762 { 3763 struct net_device *netdev = pci_get_drvdata(pdev); 3764 struct lan743x_adapter *adapter = netdev_priv(netdev); 3765 3766 lan743x_full_cleanup(adapter); 3767 } 3768 3769 static void lan743x_pcidev_shutdown(struct pci_dev *pdev) 3770 { 3771 struct net_device *netdev = pci_get_drvdata(pdev); 3772 struct lan743x_adapter *adapter = netdev_priv(netdev); 3773 3774 rtnl_lock(); 3775 netif_device_detach(netdev); 3776 3777 /* close netdev when netdev is at running state. 3778 * For instance, it is true when system goes to sleep by pm-suspend 3779 * However, it is false when system goes to sleep by suspend GUI menu 3780 */ 3781 if (netif_running(netdev)) 3782 lan743x_netdev_close(netdev); 3783 rtnl_unlock(); 3784 3785 #ifdef CONFIG_PM 3786 pci_save_state(pdev); 3787 #endif 3788 3789 /* clean up lan743x portion */ 3790 lan743x_hardware_cleanup(adapter); 3791 } 3792 3793 #ifdef CONFIG_PM_SLEEP 3794 static u16 lan743x_pm_wakeframe_crc16(const u8 *buf, int len) 3795 { 3796 return bitrev16(crc16(0xFFFF, buf, len)); 3797 } 3798 3799 static void lan743x_pm_set_wol(struct lan743x_adapter *adapter) 3800 { 3801 const u8 ipv4_multicast[3] = { 0x01, 0x00, 0x5E }; 3802 const u8 ipv6_multicast[3] = { 0x33, 0x33 }; 3803 const u8 arp_type[2] = { 0x08, 0x06 }; 3804 int mask_index; 3805 u32 sopass; 3806 u32 pmtctl; 3807 u32 wucsr; 3808 u32 macrx; 3809 u16 crc; 3810 3811 for (mask_index = 0; mask_index < MAC_NUM_OF_WUF_CFG; mask_index++) 3812 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 0); 3813 3814 /* clear wake settings */ 3815 pmtctl = lan743x_csr_read(adapter, PMT_CTL); 3816 pmtctl |= PMT_CTL_WUPS_MASK_ | PMT_CTL_RES_CLR_WKP_MASK_; 3817 pmtctl &= ~(PMT_CTL_GPIO_WAKEUP_EN_ | PMT_CTL_EEE_WAKEUP_EN_ | 3818 PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_ | 3819 PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_ | PMT_CTL_ETH_PHY_WAKE_EN_); 3820 3821 macrx = lan743x_csr_read(adapter, MAC_RX); 3822 3823 wucsr = 0; 3824 mask_index = 0; 3825 3826 pmtctl |= PMT_CTL_ETH_PHY_D3_COLD_OVR_ | PMT_CTL_ETH_PHY_D3_OVR_; 3827 3828 if (adapter->phy_wolopts) 3829 pmtctl |= PMT_CTL_ETH_PHY_WAKE_EN_; 3830 3831 if (adapter->wolopts & WAKE_MAGIC) { 3832 wucsr |= MAC_WUCSR_MPEN_; 3833 macrx |= MAC_RX_RXEN_; 3834 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 3835 } 3836 if (adapter->wolopts & WAKE_UCAST) { 3837 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_PFDA_EN_; 3838 macrx |= MAC_RX_RXEN_; 3839 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 3840 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_; 3841 } 3842 if (adapter->wolopts & WAKE_BCAST) { 3843 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_BCST_EN_; 3844 macrx |= MAC_RX_RXEN_; 3845 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 3846 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_; 3847 } 3848 if (adapter->wolopts & WAKE_MCAST) { 3849 /* IPv4 multicast */ 3850 crc = lan743x_pm_wakeframe_crc16(ipv4_multicast, 3); 3851 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 3852 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_MCAST_ | 3853 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) | 3854 (crc & MAC_WUF_CFG_CRC16_MASK_)); 3855 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 7); 3856 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0); 3857 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0); 3858 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0); 3859 mask_index++; 3860 3861 /* IPv6 multicast */ 3862 crc = lan743x_pm_wakeframe_crc16(ipv6_multicast, 2); 3863 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 3864 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_MCAST_ | 3865 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) | 3866 (crc & MAC_WUF_CFG_CRC16_MASK_)); 3867 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 3); 3868 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0); 3869 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0); 3870 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0); 3871 mask_index++; 3872 3873 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_WAKE_EN_; 3874 macrx |= MAC_RX_RXEN_; 3875 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 3876 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_; 3877 } 3878 if (adapter->wolopts & WAKE_ARP) { 3879 /* set MAC_WUF_CFG & WUF_MASK 3880 * for packettype (offset 12,13) = ARP (0x0806) 3881 */ 3882 crc = lan743x_pm_wakeframe_crc16(arp_type, 2); 3883 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 3884 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_ALL_ | 3885 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) | 3886 (crc & MAC_WUF_CFG_CRC16_MASK_)); 3887 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 0x3000); 3888 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0); 3889 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0); 3890 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0); 3891 mask_index++; 3892 3893 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_WAKE_EN_; 3894 macrx |= MAC_RX_RXEN_; 3895 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 3896 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_; 3897 } 3898 3899 if (adapter->wolopts & WAKE_MAGICSECURE) { 3900 sopass = *(u32 *)adapter->sopass; 3901 lan743x_csr_write(adapter, MAC_MP_SO_LO, sopass); 3902 sopass = *(u16 *)&adapter->sopass[4]; 3903 lan743x_csr_write(adapter, MAC_MP_SO_HI, sopass); 3904 wucsr |= MAC_MP_SO_EN_; 3905 } 3906 3907 lan743x_csr_write(adapter, MAC_WUCSR, wucsr); 3908 lan743x_csr_write(adapter, PMT_CTL, pmtctl); 3909 lan743x_csr_write(adapter, MAC_RX, macrx); 3910 } 3911 3912 static int lan743x_pm_suspend(struct device *dev) 3913 { 3914 struct pci_dev *pdev = to_pci_dev(dev); 3915 struct net_device *netdev = pci_get_drvdata(pdev); 3916 struct lan743x_adapter *adapter = netdev_priv(netdev); 3917 u32 data; 3918 3919 lan743x_pcidev_shutdown(pdev); 3920 3921 /* clear all wakes */ 3922 lan743x_csr_write(adapter, MAC_WUCSR, 0); 3923 lan743x_csr_write(adapter, MAC_WUCSR2, 0); 3924 lan743x_csr_write(adapter, MAC_WK_SRC, 0xFFFFFFFF); 3925 3926 if (adapter->wolopts || adapter->phy_wolopts) 3927 lan743x_pm_set_wol(adapter); 3928 3929 if (adapter->is_pci11x1x) { 3930 /* Save HW_CFG to config again in PM resume */ 3931 data = lan743x_csr_read(adapter, HW_CFG); 3932 adapter->hw_cfg = data; 3933 data |= (HW_CFG_RST_PROTECT_PCIE_ | 3934 HW_CFG_D3_RESET_DIS_ | 3935 HW_CFG_D3_VAUX_OVR_ | 3936 HW_CFG_HOT_RESET_DIS_ | 3937 HW_CFG_RST_PROTECT_); 3938 lan743x_csr_write(adapter, HW_CFG, data); 3939 } 3940 3941 /* Host sets PME_En, put D3hot */ 3942 return pci_prepare_to_sleep(pdev); 3943 } 3944 3945 static int lan743x_pm_resume(struct device *dev) 3946 { 3947 struct pci_dev *pdev = to_pci_dev(dev); 3948 struct net_device *netdev = pci_get_drvdata(pdev); 3949 struct lan743x_adapter *adapter = netdev_priv(netdev); 3950 u32 data; 3951 int ret; 3952 3953 pci_set_power_state(pdev, PCI_D0); 3954 pci_restore_state(pdev); 3955 3956 /* Restore HW_CFG that was saved during pm suspend */ 3957 if (adapter->is_pci11x1x) 3958 lan743x_csr_write(adapter, HW_CFG, adapter->hw_cfg); 3959 3960 ret = lan743x_hardware_init(adapter, pdev); 3961 if (ret) { 3962 netif_err(adapter, probe, adapter->netdev, 3963 "lan743x_hardware_init returned %d\n", ret); 3964 lan743x_pci_cleanup(adapter); 3965 return ret; 3966 } 3967 3968 ret = lan743x_csr_read(adapter, MAC_WK_SRC); 3969 netif_dbg(adapter, drv, adapter->netdev, 3970 "Wakeup source : 0x%08X\n", ret); 3971 3972 /* Clear the wol configuration and status bits. Note that 3973 * the status bits are "Write One to Clear (W1C)" 3974 */ 3975 data = MAC_WUCSR_EEE_TX_WAKE_ | MAC_WUCSR_EEE_RX_WAKE_ | 3976 MAC_WUCSR_RFE_WAKE_FR_ | MAC_WUCSR_PFDA_FR_ | MAC_WUCSR_WUFR_ | 3977 MAC_WUCSR_MPR_ | MAC_WUCSR_BCAST_FR_; 3978 lan743x_csr_write(adapter, MAC_WUCSR, data); 3979 3980 data = MAC_WUCSR2_NS_RCD_ | MAC_WUCSR2_ARP_RCD_ | 3981 MAC_WUCSR2_IPV6_TCPSYN_RCD_ | MAC_WUCSR2_IPV4_TCPSYN_RCD_; 3982 lan743x_csr_write(adapter, MAC_WUCSR2, data); 3983 3984 data = MAC_WK_SRC_ETH_PHY_WK_ | MAC_WK_SRC_IPV6_TCPSYN_RCD_WK_ | 3985 MAC_WK_SRC_IPV4_TCPSYN_RCD_WK_ | MAC_WK_SRC_EEE_TX_WK_ | 3986 MAC_WK_SRC_EEE_RX_WK_ | MAC_WK_SRC_RFE_FR_WK_ | 3987 MAC_WK_SRC_PFDA_FR_WK_ | MAC_WK_SRC_MP_FR_WK_ | 3988 MAC_WK_SRC_BCAST_FR_WK_ | MAC_WK_SRC_WU_FR_WK_ | 3989 MAC_WK_SRC_WK_FR_SAVED_; 3990 lan743x_csr_write(adapter, MAC_WK_SRC, data); 3991 3992 rtnl_lock(); 3993 /* open netdev when netdev is at running state while resume. 3994 * For instance, it is true when system wakesup after pm-suspend 3995 * However, it is false when system wakes up after suspend GUI menu 3996 */ 3997 if (netif_running(netdev)) 3998 lan743x_netdev_open(netdev); 3999 4000 netif_device_attach(netdev); 4001 rtnl_unlock(); 4002 4003 return 0; 4004 } 4005 4006 static const struct dev_pm_ops lan743x_pm_ops = { 4007 SET_SYSTEM_SLEEP_PM_OPS(lan743x_pm_suspend, lan743x_pm_resume) 4008 }; 4009 #endif /* CONFIG_PM_SLEEP */ 4010 4011 static const struct pci_device_id lan743x_pcidev_tbl[] = { 4012 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_LAN7430) }, 4013 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_LAN7431) }, 4014 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_A011) }, 4015 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_A041) }, 4016 { 0, } 4017 }; 4018 4019 MODULE_DEVICE_TABLE(pci, lan743x_pcidev_tbl); 4020 4021 static struct pci_driver lan743x_pcidev_driver = { 4022 .name = DRIVER_NAME, 4023 .id_table = lan743x_pcidev_tbl, 4024 .probe = lan743x_pcidev_probe, 4025 .remove = lan743x_pcidev_remove, 4026 #ifdef CONFIG_PM_SLEEP 4027 .driver.pm = &lan743x_pm_ops, 4028 #endif 4029 .shutdown = lan743x_pcidev_shutdown, 4030 }; 4031 4032 module_pci_driver(lan743x_pcidev_driver); 4033 4034 MODULE_AUTHOR(DRIVER_AUTHOR); 4035 MODULE_DESCRIPTION(DRIVER_DESC); 4036 MODULE_LICENSE("GPL"); 4037