1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /* Copyright (C) 2018 Microchip Technology Inc. */
3
4 #include <linux/module.h>
5 #include <linux/pci.h>
6 #include <linux/netdevice.h>
7 #include <linux/etherdevice.h>
8 #include <linux/crc32.h>
9 #include <linux/microchipphy.h>
10 #include <linux/net_tstamp.h>
11 #include <linux/of_mdio.h>
12 #include <linux/of_net.h>
13 #include <linux/phy.h>
14 #include <linux/phy_fixed.h>
15 #include <linux/rtnetlink.h>
16 #include <linux/iopoll.h>
17 #include <linux/crc16.h>
18 #include <linux/phylink.h>
19 #include "lan743x_main.h"
20 #include "lan743x_ethtool.h"
21
22 #define MMD_ACCESS_ADDRESS 0
23 #define MMD_ACCESS_WRITE 1
24 #define MMD_ACCESS_READ 2
25 #define MMD_ACCESS_READ_INC 3
26 #define PCS_POWER_STATE_DOWN 0x6
27 #define PCS_POWER_STATE_UP 0x4
28
29 #define RFE_RD_FIFO_TH_3_DWORDS 0x3
30
pci11x1x_is_a0(struct lan743x_adapter * adapter)31 static bool pci11x1x_is_a0(struct lan743x_adapter *adapter)
32 {
33 u32 dev_rev = adapter->csr.id_rev & ID_REV_CHIP_REV_MASK_;
34 return dev_rev == ID_REV_CHIP_REV_PCI11X1X_A0_;
35 }
36
pci11x1x_strap_get_status(struct lan743x_adapter * adapter)37 static void pci11x1x_strap_get_status(struct lan743x_adapter *adapter)
38 {
39 u32 fpga_rev;
40 u32 cfg_load;
41 u32 hw_cfg;
42 u32 strap;
43 int ret;
44
45 /* Timeout = 100 (i.e. 1 sec (10 msce * 100)) */
46 ret = lan743x_hs_syslock_acquire(adapter, 100);
47 if (ret < 0) {
48 netif_err(adapter, drv, adapter->netdev,
49 "Sys Lock acquire failed ret:%d\n", ret);
50 return;
51 }
52
53 cfg_load = lan743x_csr_read(adapter, ETH_SYS_CONFIG_LOAD_STARTED_REG);
54 lan743x_hs_syslock_release(adapter);
55 hw_cfg = lan743x_csr_read(adapter, HW_CFG);
56 strap = lan743x_csr_read(adapter, STRAP_READ);
57 if ((pci11x1x_is_a0(adapter) &&
58 (cfg_load & GEN_SYS_LOAD_STARTED_REG_ETH_ ||
59 hw_cfg & HW_CFG_RST_PROTECT_)) ||
60 (strap & STRAP_READ_USE_SGMII_EN_)) {
61 if (strap & STRAP_READ_SGMII_EN_)
62 adapter->is_sgmii_en = true;
63 else
64 adapter->is_sgmii_en = false;
65 } else {
66 fpga_rev = lan743x_csr_read(adapter, FPGA_REV);
67 if (fpga_rev) {
68 if (fpga_rev & FPGA_SGMII_OP)
69 adapter->is_sgmii_en = true;
70 else
71 adapter->is_sgmii_en = false;
72 } else {
73 adapter->is_sgmii_en = false;
74 }
75 }
76 netif_dbg(adapter, drv, adapter->netdev,
77 "SGMII I/F %sable\n", adapter->is_sgmii_en ? "En" : "Dis");
78 }
79
is_pci11x1x_chip(struct lan743x_adapter * adapter)80 static bool is_pci11x1x_chip(struct lan743x_adapter *adapter)
81 {
82 struct lan743x_csr *csr = &adapter->csr;
83 u32 id_rev = csr->id_rev;
84
85 if (((id_rev & 0xFFFF0000) == ID_REV_ID_A011_) ||
86 ((id_rev & 0xFFFF0000) == ID_REV_ID_A041_)) {
87 return true;
88 }
89 return false;
90 }
91
lan743x_pci_cleanup(struct lan743x_adapter * adapter)92 static void lan743x_pci_cleanup(struct lan743x_adapter *adapter)
93 {
94 pci_release_selected_regions(adapter->pdev,
95 pci_select_bars(adapter->pdev,
96 IORESOURCE_MEM));
97 pci_disable_device(adapter->pdev);
98 }
99
lan743x_pci_init(struct lan743x_adapter * adapter,struct pci_dev * pdev)100 static int lan743x_pci_init(struct lan743x_adapter *adapter,
101 struct pci_dev *pdev)
102 {
103 unsigned long bars = 0;
104 int ret;
105
106 adapter->pdev = pdev;
107 ret = pci_enable_device_mem(pdev);
108 if (ret)
109 goto return_error;
110
111 netif_info(adapter, probe, adapter->netdev,
112 "PCI: Vendor ID = 0x%04X, Device ID = 0x%04X\n",
113 pdev->vendor, pdev->device);
114 bars = pci_select_bars(pdev, IORESOURCE_MEM);
115 if (!test_bit(0, &bars))
116 goto disable_device;
117
118 ret = pci_request_selected_regions(pdev, bars, DRIVER_NAME);
119 if (ret)
120 goto disable_device;
121
122 pci_set_master(pdev);
123 return 0;
124
125 disable_device:
126 pci_disable_device(adapter->pdev);
127
128 return_error:
129 return ret;
130 }
131
lan743x_csr_read(struct lan743x_adapter * adapter,int offset)132 u32 lan743x_csr_read(struct lan743x_adapter *adapter, int offset)
133 {
134 return ioread32(&adapter->csr.csr_address[offset]);
135 }
136
lan743x_csr_write(struct lan743x_adapter * adapter,int offset,u32 data)137 void lan743x_csr_write(struct lan743x_adapter *adapter, int offset,
138 u32 data)
139 {
140 iowrite32(data, &adapter->csr.csr_address[offset]);
141 }
142
143 #define LAN743X_CSR_READ_OP(offset) lan743x_csr_read(adapter, offset)
144
lan743x_csr_light_reset(struct lan743x_adapter * adapter)145 static int lan743x_csr_light_reset(struct lan743x_adapter *adapter)
146 {
147 u32 data;
148
149 data = lan743x_csr_read(adapter, HW_CFG);
150 data |= HW_CFG_LRST_;
151 lan743x_csr_write(adapter, HW_CFG, data);
152
153 return readx_poll_timeout(LAN743X_CSR_READ_OP, HW_CFG, data,
154 !(data & HW_CFG_LRST_), 100000, 10000000);
155 }
156
lan743x_csr_wait_for_bit_atomic(struct lan743x_adapter * adapter,int offset,u32 bit_mask,int target_value,int udelay_min,int udelay_max,int count)157 static int lan743x_csr_wait_for_bit_atomic(struct lan743x_adapter *adapter,
158 int offset, u32 bit_mask,
159 int target_value, int udelay_min,
160 int udelay_max, int count)
161 {
162 u32 data;
163
164 return readx_poll_timeout_atomic(LAN743X_CSR_READ_OP, offset, data,
165 target_value == !!(data & bit_mask),
166 udelay_max, udelay_min * count);
167 }
168
lan743x_csr_wait_for_bit(struct lan743x_adapter * adapter,int offset,u32 bit_mask,int target_value,int usleep_min,int usleep_max,int count)169 static int lan743x_csr_wait_for_bit(struct lan743x_adapter *adapter,
170 int offset, u32 bit_mask,
171 int target_value, int usleep_min,
172 int usleep_max, int count)
173 {
174 u32 data;
175
176 return readx_poll_timeout(LAN743X_CSR_READ_OP, offset, data,
177 target_value == !!(data & bit_mask),
178 usleep_max, usleep_min * count);
179 }
180
lan743x_csr_init(struct lan743x_adapter * adapter)181 static int lan743x_csr_init(struct lan743x_adapter *adapter)
182 {
183 struct lan743x_csr *csr = &adapter->csr;
184 resource_size_t bar_start, bar_length;
185
186 bar_start = pci_resource_start(adapter->pdev, 0);
187 bar_length = pci_resource_len(adapter->pdev, 0);
188 csr->csr_address = devm_ioremap(&adapter->pdev->dev,
189 bar_start, bar_length);
190 if (!csr->csr_address)
191 return -ENOMEM;
192
193 csr->id_rev = lan743x_csr_read(adapter, ID_REV);
194 csr->fpga_rev = lan743x_csr_read(adapter, FPGA_REV);
195 netif_info(adapter, probe, adapter->netdev,
196 "ID_REV = 0x%08X, FPGA_REV = %d.%d\n",
197 csr->id_rev, FPGA_REV_GET_MAJOR_(csr->fpga_rev),
198 FPGA_REV_GET_MINOR_(csr->fpga_rev));
199 if (!ID_REV_IS_VALID_CHIP_ID_(csr->id_rev))
200 return -ENODEV;
201
202 csr->flags = LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR;
203 switch (csr->id_rev & ID_REV_CHIP_REV_MASK_) {
204 case ID_REV_CHIP_REV_A0_:
205 csr->flags |= LAN743X_CSR_FLAG_IS_A0;
206 csr->flags &= ~LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR;
207 break;
208 case ID_REV_CHIP_REV_B0_:
209 csr->flags |= LAN743X_CSR_FLAG_IS_B0;
210 break;
211 }
212
213 return lan743x_csr_light_reset(adapter);
214 }
215
lan743x_intr_software_isr(struct lan743x_adapter * adapter)216 static void lan743x_intr_software_isr(struct lan743x_adapter *adapter)
217 {
218 struct lan743x_intr *intr = &adapter->intr;
219
220 /* disable the interrupt to prevent repeated re-triggering */
221 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_SW_GP_);
222 intr->software_isr_flag = true;
223 wake_up(&intr->software_isr_wq);
224 }
225
lan743x_tx_isr(void * context,u32 int_sts,u32 flags)226 static void lan743x_tx_isr(void *context, u32 int_sts, u32 flags)
227 {
228 struct lan743x_tx *tx = context;
229 struct lan743x_adapter *adapter = tx->adapter;
230 bool enable_flag = true;
231
232 lan743x_csr_read(adapter, INT_EN_SET);
233 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR) {
234 lan743x_csr_write(adapter, INT_EN_CLR,
235 INT_BIT_DMA_TX_(tx->channel_number));
236 }
237
238 if (int_sts & INT_BIT_DMA_TX_(tx->channel_number)) {
239 u32 ioc_bit = DMAC_INT_BIT_TX_IOC_(tx->channel_number);
240 u32 dmac_int_sts;
241 u32 dmac_int_en;
242
243 if (flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ)
244 dmac_int_sts = lan743x_csr_read(adapter, DMAC_INT_STS);
245 else
246 dmac_int_sts = ioc_bit;
247 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK)
248 dmac_int_en = lan743x_csr_read(adapter,
249 DMAC_INT_EN_SET);
250 else
251 dmac_int_en = ioc_bit;
252
253 dmac_int_en &= ioc_bit;
254 dmac_int_sts &= dmac_int_en;
255 if (dmac_int_sts & ioc_bit) {
256 napi_schedule(&tx->napi);
257 enable_flag = false;/* poll func will enable later */
258 }
259 }
260
261 if (enable_flag)
262 /* enable isr */
263 lan743x_csr_write(adapter, INT_EN_SET,
264 INT_BIT_DMA_TX_(tx->channel_number));
265 }
266
lan743x_rx_isr(void * context,u32 int_sts,u32 flags)267 static void lan743x_rx_isr(void *context, u32 int_sts, u32 flags)
268 {
269 struct lan743x_rx *rx = context;
270 struct lan743x_adapter *adapter = rx->adapter;
271 bool enable_flag = true;
272
273 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR) {
274 lan743x_csr_write(adapter, INT_EN_CLR,
275 INT_BIT_DMA_RX_(rx->channel_number));
276 }
277
278 if (int_sts & INT_BIT_DMA_RX_(rx->channel_number)) {
279 u32 rx_frame_bit = DMAC_INT_BIT_RXFRM_(rx->channel_number);
280 u32 dmac_int_sts;
281 u32 dmac_int_en;
282
283 if (flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ)
284 dmac_int_sts = lan743x_csr_read(adapter, DMAC_INT_STS);
285 else
286 dmac_int_sts = rx_frame_bit;
287 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK)
288 dmac_int_en = lan743x_csr_read(adapter,
289 DMAC_INT_EN_SET);
290 else
291 dmac_int_en = rx_frame_bit;
292
293 dmac_int_en &= rx_frame_bit;
294 dmac_int_sts &= dmac_int_en;
295 if (dmac_int_sts & rx_frame_bit) {
296 napi_schedule(&rx->napi);
297 enable_flag = false;/* poll funct will enable later */
298 }
299 }
300
301 if (enable_flag) {
302 /* enable isr */
303 lan743x_csr_write(adapter, INT_EN_SET,
304 INT_BIT_DMA_RX_(rx->channel_number));
305 }
306 }
307
lan743x_intr_shared_isr(void * context,u32 int_sts,u32 flags)308 static void lan743x_intr_shared_isr(void *context, u32 int_sts, u32 flags)
309 {
310 struct lan743x_adapter *adapter = context;
311 unsigned int channel;
312
313 if (int_sts & INT_BIT_ALL_RX_) {
314 for (channel = 0; channel < LAN743X_USED_RX_CHANNELS;
315 channel++) {
316 u32 int_bit = INT_BIT_DMA_RX_(channel);
317
318 if (int_sts & int_bit) {
319 lan743x_rx_isr(&adapter->rx[channel],
320 int_bit, flags);
321 int_sts &= ~int_bit;
322 }
323 }
324 }
325 if (int_sts & INT_BIT_ALL_TX_) {
326 for (channel = 0; channel < adapter->used_tx_channels;
327 channel++) {
328 u32 int_bit = INT_BIT_DMA_TX_(channel);
329
330 if (int_sts & int_bit) {
331 lan743x_tx_isr(&adapter->tx[channel],
332 int_bit, flags);
333 int_sts &= ~int_bit;
334 }
335 }
336 }
337 if (int_sts & INT_BIT_ALL_OTHER_) {
338 if (int_sts & INT_BIT_SW_GP_) {
339 lan743x_intr_software_isr(adapter);
340 int_sts &= ~INT_BIT_SW_GP_;
341 }
342 if (int_sts & INT_BIT_1588_) {
343 lan743x_ptp_isr(adapter);
344 int_sts &= ~INT_BIT_1588_;
345 }
346 }
347 if (int_sts)
348 lan743x_csr_write(adapter, INT_EN_CLR, int_sts);
349 }
350
lan743x_intr_entry_isr(int irq,void * ptr)351 static irqreturn_t lan743x_intr_entry_isr(int irq, void *ptr)
352 {
353 struct lan743x_vector *vector = ptr;
354 struct lan743x_adapter *adapter = vector->adapter;
355 irqreturn_t result = IRQ_NONE;
356 u32 int_enables;
357 u32 int_sts;
358
359 if (vector->flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ) {
360 int_sts = lan743x_csr_read(adapter, INT_STS);
361 } else if (vector->flags &
362 (LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C |
363 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C)) {
364 int_sts = lan743x_csr_read(adapter, INT_STS_R2C);
365 } else {
366 /* use mask as implied status */
367 int_sts = vector->int_mask | INT_BIT_MAS_;
368 }
369
370 if (!(int_sts & INT_BIT_MAS_))
371 goto irq_done;
372
373 if (vector->flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR)
374 /* disable vector interrupt */
375 lan743x_csr_write(adapter,
376 INT_VEC_EN_CLR,
377 INT_VEC_EN_(vector->vector_index));
378
379 if (vector->flags & LAN743X_VECTOR_FLAG_MASTER_ENABLE_CLEAR)
380 /* disable master interrupt */
381 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_MAS_);
382
383 if (vector->flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK) {
384 int_enables = lan743x_csr_read(adapter, INT_EN_SET);
385 } else {
386 /* use vector mask as implied enable mask */
387 int_enables = vector->int_mask;
388 }
389
390 int_sts &= int_enables;
391 int_sts &= vector->int_mask;
392 if (int_sts) {
393 if (vector->handler) {
394 vector->handler(vector->context,
395 int_sts, vector->flags);
396 } else {
397 /* disable interrupts on this vector */
398 lan743x_csr_write(adapter, INT_EN_CLR,
399 vector->int_mask);
400 }
401 result = IRQ_HANDLED;
402 }
403
404 if (vector->flags & LAN743X_VECTOR_FLAG_MASTER_ENABLE_SET)
405 /* enable master interrupt */
406 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_MAS_);
407
408 if (vector->flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET)
409 /* enable vector interrupt */
410 lan743x_csr_write(adapter,
411 INT_VEC_EN_SET,
412 INT_VEC_EN_(vector->vector_index));
413 irq_done:
414 return result;
415 }
416
lan743x_intr_test_isr(struct lan743x_adapter * adapter)417 static int lan743x_intr_test_isr(struct lan743x_adapter *adapter)
418 {
419 struct lan743x_intr *intr = &adapter->intr;
420 int ret;
421
422 intr->software_isr_flag = false;
423
424 /* enable and activate test interrupt */
425 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_SW_GP_);
426 lan743x_csr_write(adapter, INT_SET, INT_BIT_SW_GP_);
427
428 ret = wait_event_timeout(intr->software_isr_wq,
429 intr->software_isr_flag,
430 msecs_to_jiffies(200));
431
432 /* disable test interrupt */
433 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_SW_GP_);
434
435 return ret > 0 ? 0 : -ENODEV;
436 }
437
lan743x_intr_register_isr(struct lan743x_adapter * adapter,int vector_index,u32 flags,u32 int_mask,lan743x_vector_handler handler,void * context)438 static int lan743x_intr_register_isr(struct lan743x_adapter *adapter,
439 int vector_index, u32 flags,
440 u32 int_mask,
441 lan743x_vector_handler handler,
442 void *context)
443 {
444 struct lan743x_vector *vector = &adapter->intr.vector_list
445 [vector_index];
446 int ret;
447
448 vector->adapter = adapter;
449 vector->flags = flags;
450 vector->vector_index = vector_index;
451 vector->int_mask = int_mask;
452 vector->handler = handler;
453 vector->context = context;
454
455 ret = request_irq(vector->irq,
456 lan743x_intr_entry_isr,
457 (flags & LAN743X_VECTOR_FLAG_IRQ_SHARED) ?
458 IRQF_SHARED : 0, DRIVER_NAME, vector);
459 if (ret) {
460 vector->handler = NULL;
461 vector->context = NULL;
462 vector->int_mask = 0;
463 vector->flags = 0;
464 }
465 return ret;
466 }
467
lan743x_intr_unregister_isr(struct lan743x_adapter * adapter,int vector_index)468 static void lan743x_intr_unregister_isr(struct lan743x_adapter *adapter,
469 int vector_index)
470 {
471 struct lan743x_vector *vector = &adapter->intr.vector_list
472 [vector_index];
473
474 free_irq(vector->irq, vector);
475 vector->handler = NULL;
476 vector->context = NULL;
477 vector->int_mask = 0;
478 vector->flags = 0;
479 }
480
lan743x_intr_get_vector_flags(struct lan743x_adapter * adapter,u32 int_mask)481 static u32 lan743x_intr_get_vector_flags(struct lan743x_adapter *adapter,
482 u32 int_mask)
483 {
484 int index;
485
486 for (index = 0; index < adapter->max_vector_count; index++) {
487 if (adapter->intr.vector_list[index].int_mask & int_mask)
488 return adapter->intr.vector_list[index].flags;
489 }
490 return 0;
491 }
492
lan743x_intr_close(struct lan743x_adapter * adapter)493 static void lan743x_intr_close(struct lan743x_adapter *adapter)
494 {
495 struct lan743x_intr *intr = &adapter->intr;
496 int index = 0;
497
498 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_MAS_);
499 if (adapter->is_pci11x1x)
500 lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0x0000FFFF);
501 else
502 lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0x000000FF);
503
504 for (index = 0; index < intr->number_of_vectors; index++) {
505 if (intr->flags & INTR_FLAG_IRQ_REQUESTED(index)) {
506 lan743x_intr_unregister_isr(adapter, index);
507 intr->flags &= ~INTR_FLAG_IRQ_REQUESTED(index);
508 }
509 }
510
511 if (intr->flags & INTR_FLAG_MSI_ENABLED) {
512 pci_disable_msi(adapter->pdev);
513 intr->flags &= ~INTR_FLAG_MSI_ENABLED;
514 }
515
516 if (intr->flags & INTR_FLAG_MSIX_ENABLED) {
517 pci_disable_msix(adapter->pdev);
518 intr->flags &= ~INTR_FLAG_MSIX_ENABLED;
519 }
520 }
521
lan743x_intr_open(struct lan743x_adapter * adapter)522 static int lan743x_intr_open(struct lan743x_adapter *adapter)
523 {
524 struct msix_entry msix_entries[PCI11X1X_MAX_VECTOR_COUNT];
525 struct lan743x_intr *intr = &adapter->intr;
526 unsigned int used_tx_channels;
527 u32 int_vec_en_auto_clr = 0;
528 u8 max_vector_count;
529 u32 int_vec_map0 = 0;
530 u32 int_vec_map1 = 0;
531 int ret = -ENODEV;
532 int index = 0;
533 u32 flags = 0;
534
535 intr->number_of_vectors = 0;
536
537 /* Try to set up MSIX interrupts */
538 max_vector_count = adapter->max_vector_count;
539 memset(&msix_entries[0], 0,
540 sizeof(struct msix_entry) * max_vector_count);
541 for (index = 0; index < max_vector_count; index++)
542 msix_entries[index].entry = index;
543 used_tx_channels = adapter->used_tx_channels;
544 ret = pci_enable_msix_range(adapter->pdev,
545 msix_entries, 1,
546 1 + used_tx_channels +
547 LAN743X_USED_RX_CHANNELS);
548
549 if (ret > 0) {
550 intr->flags |= INTR_FLAG_MSIX_ENABLED;
551 intr->number_of_vectors = ret;
552 intr->using_vectors = true;
553 for (index = 0; index < intr->number_of_vectors; index++)
554 intr->vector_list[index].irq = msix_entries
555 [index].vector;
556 netif_info(adapter, ifup, adapter->netdev,
557 "using MSIX interrupts, number of vectors = %d\n",
558 intr->number_of_vectors);
559 }
560
561 /* If MSIX failed try to setup using MSI interrupts */
562 if (!intr->number_of_vectors) {
563 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) {
564 if (!pci_enable_msi(adapter->pdev)) {
565 intr->flags |= INTR_FLAG_MSI_ENABLED;
566 intr->number_of_vectors = 1;
567 intr->using_vectors = true;
568 intr->vector_list[0].irq =
569 adapter->pdev->irq;
570 netif_info(adapter, ifup, adapter->netdev,
571 "using MSI interrupts, number of vectors = %d\n",
572 intr->number_of_vectors);
573 }
574 }
575 }
576
577 /* If MSIX, and MSI failed, setup using legacy interrupt */
578 if (!intr->number_of_vectors) {
579 intr->number_of_vectors = 1;
580 intr->using_vectors = false;
581 intr->vector_list[0].irq = intr->irq;
582 netif_info(adapter, ifup, adapter->netdev,
583 "using legacy interrupts\n");
584 }
585
586 /* At this point we must have at least one irq */
587 lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0xFFFFFFFF);
588
589 /* map all interrupts to vector 0 */
590 lan743x_csr_write(adapter, INT_VEC_MAP0, 0x00000000);
591 lan743x_csr_write(adapter, INT_VEC_MAP1, 0x00000000);
592 lan743x_csr_write(adapter, INT_VEC_MAP2, 0x00000000);
593 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ |
594 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C |
595 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK |
596 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR;
597
598 if (intr->using_vectors) {
599 flags |= LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR |
600 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET;
601 } else {
602 flags |= LAN743X_VECTOR_FLAG_MASTER_ENABLE_CLEAR |
603 LAN743X_VECTOR_FLAG_MASTER_ENABLE_SET |
604 LAN743X_VECTOR_FLAG_IRQ_SHARED;
605 }
606
607 if (adapter->csr.flags & LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) {
608 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ;
609 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C;
610 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR;
611 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK;
612 flags |= LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C;
613 flags |= LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C;
614 }
615
616 init_waitqueue_head(&intr->software_isr_wq);
617
618 ret = lan743x_intr_register_isr(adapter, 0, flags,
619 INT_BIT_ALL_RX_ | INT_BIT_ALL_TX_ |
620 INT_BIT_ALL_OTHER_,
621 lan743x_intr_shared_isr, adapter);
622 if (ret)
623 goto clean_up;
624 intr->flags |= INTR_FLAG_IRQ_REQUESTED(0);
625
626 if (intr->using_vectors)
627 lan743x_csr_write(adapter, INT_VEC_EN_SET,
628 INT_VEC_EN_(0));
629
630 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) {
631 lan743x_csr_write(adapter, INT_MOD_CFG0, LAN743X_INT_MOD);
632 lan743x_csr_write(adapter, INT_MOD_CFG1, LAN743X_INT_MOD);
633 lan743x_csr_write(adapter, INT_MOD_CFG2, LAN743X_INT_MOD);
634 lan743x_csr_write(adapter, INT_MOD_CFG3, LAN743X_INT_MOD);
635 lan743x_csr_write(adapter, INT_MOD_CFG4, LAN743X_INT_MOD);
636 lan743x_csr_write(adapter, INT_MOD_CFG5, LAN743X_INT_MOD);
637 lan743x_csr_write(adapter, INT_MOD_CFG6, LAN743X_INT_MOD);
638 lan743x_csr_write(adapter, INT_MOD_CFG7, LAN743X_INT_MOD);
639 if (adapter->is_pci11x1x) {
640 lan743x_csr_write(adapter, INT_MOD_CFG8, LAN743X_INT_MOD);
641 lan743x_csr_write(adapter, INT_MOD_CFG9, LAN743X_INT_MOD);
642 lan743x_csr_write(adapter, INT_MOD_MAP0, 0x00007654);
643 lan743x_csr_write(adapter, INT_MOD_MAP1, 0x00003210);
644 } else {
645 lan743x_csr_write(adapter, INT_MOD_MAP0, 0x00005432);
646 lan743x_csr_write(adapter, INT_MOD_MAP1, 0x00000001);
647 }
648 lan743x_csr_write(adapter, INT_MOD_MAP2, 0x00FFFFFF);
649 }
650
651 /* enable interrupts */
652 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_MAS_);
653 ret = lan743x_intr_test_isr(adapter);
654 if (ret)
655 goto clean_up;
656
657 if (intr->number_of_vectors > 1) {
658 int number_of_tx_vectors = intr->number_of_vectors - 1;
659
660 if (number_of_tx_vectors > used_tx_channels)
661 number_of_tx_vectors = used_tx_channels;
662 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ |
663 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C |
664 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK |
665 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR |
666 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR |
667 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET;
668
669 if (adapter->csr.flags &
670 LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) {
671 flags = LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET |
672 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET |
673 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR |
674 LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR;
675 }
676
677 for (index = 0; index < number_of_tx_vectors; index++) {
678 u32 int_bit = INT_BIT_DMA_TX_(index);
679 int vector = index + 1;
680
681 /* map TX interrupt to vector */
682 int_vec_map1 |= INT_VEC_MAP1_TX_VEC_(index, vector);
683 lan743x_csr_write(adapter, INT_VEC_MAP1, int_vec_map1);
684
685 /* Remove TX interrupt from shared mask */
686 intr->vector_list[0].int_mask &= ~int_bit;
687 ret = lan743x_intr_register_isr(adapter, vector, flags,
688 int_bit, lan743x_tx_isr,
689 &adapter->tx[index]);
690 if (ret)
691 goto clean_up;
692 intr->flags |= INTR_FLAG_IRQ_REQUESTED(vector);
693 if (!(flags &
694 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET))
695 lan743x_csr_write(adapter, INT_VEC_EN_SET,
696 INT_VEC_EN_(vector));
697 }
698 }
699 if ((intr->number_of_vectors - used_tx_channels) > 1) {
700 int number_of_rx_vectors = intr->number_of_vectors -
701 used_tx_channels - 1;
702
703 if (number_of_rx_vectors > LAN743X_USED_RX_CHANNELS)
704 number_of_rx_vectors = LAN743X_USED_RX_CHANNELS;
705
706 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ |
707 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C |
708 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK |
709 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR |
710 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR |
711 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET;
712
713 if (adapter->csr.flags &
714 LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) {
715 flags = LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR |
716 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET |
717 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET |
718 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR |
719 LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR;
720 }
721 for (index = 0; index < number_of_rx_vectors; index++) {
722 int vector = index + 1 + used_tx_channels;
723 u32 int_bit = INT_BIT_DMA_RX_(index);
724
725 /* map RX interrupt to vector */
726 int_vec_map0 |= INT_VEC_MAP0_RX_VEC_(index, vector);
727 lan743x_csr_write(adapter, INT_VEC_MAP0, int_vec_map0);
728 if (flags &
729 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR) {
730 int_vec_en_auto_clr |= INT_VEC_EN_(vector);
731 lan743x_csr_write(adapter, INT_VEC_EN_AUTO_CLR,
732 int_vec_en_auto_clr);
733 }
734
735 /* Remove RX interrupt from shared mask */
736 intr->vector_list[0].int_mask &= ~int_bit;
737 ret = lan743x_intr_register_isr(adapter, vector, flags,
738 int_bit, lan743x_rx_isr,
739 &adapter->rx[index]);
740 if (ret)
741 goto clean_up;
742 intr->flags |= INTR_FLAG_IRQ_REQUESTED(vector);
743
744 lan743x_csr_write(adapter, INT_VEC_EN_SET,
745 INT_VEC_EN_(vector));
746 }
747 }
748 return 0;
749
750 clean_up:
751 lan743x_intr_close(adapter);
752 return ret;
753 }
754
lan743x_dp_write(struct lan743x_adapter * adapter,u32 select,u32 addr,u32 length,u32 * buf)755 static int lan743x_dp_write(struct lan743x_adapter *adapter,
756 u32 select, u32 addr, u32 length, u32 *buf)
757 {
758 u32 dp_sel;
759 int i;
760
761 if (lan743x_csr_wait_for_bit_atomic(adapter, DP_SEL, DP_SEL_DPRDY_,
762 1, 40, 100, 100))
763 return -EIO;
764 dp_sel = lan743x_csr_read(adapter, DP_SEL);
765 dp_sel &= ~DP_SEL_MASK_;
766 dp_sel |= select;
767 lan743x_csr_write(adapter, DP_SEL, dp_sel);
768
769 for (i = 0; i < length; i++) {
770 lan743x_csr_write(adapter, DP_ADDR, addr + i);
771 lan743x_csr_write(adapter, DP_DATA_0, buf[i]);
772 lan743x_csr_write(adapter, DP_CMD, DP_CMD_WRITE_);
773 if (lan743x_csr_wait_for_bit_atomic(adapter, DP_SEL,
774 DP_SEL_DPRDY_,
775 1, 40, 100, 100))
776 return -EIO;
777 }
778
779 return 0;
780 }
781
lan743x_mac_mii_access(u16 id,u16 index,int read)782 static u32 lan743x_mac_mii_access(u16 id, u16 index, int read)
783 {
784 u32 ret;
785
786 ret = (id << MAC_MII_ACC_PHY_ADDR_SHIFT_) &
787 MAC_MII_ACC_PHY_ADDR_MASK_;
788 ret |= (index << MAC_MII_ACC_MIIRINDA_SHIFT_) &
789 MAC_MII_ACC_MIIRINDA_MASK_;
790
791 if (read)
792 ret |= MAC_MII_ACC_MII_READ_;
793 else
794 ret |= MAC_MII_ACC_MII_WRITE_;
795 ret |= MAC_MII_ACC_MII_BUSY_;
796
797 return ret;
798 }
799
lan743x_mac_mii_wait_till_not_busy(struct lan743x_adapter * adapter)800 static int lan743x_mac_mii_wait_till_not_busy(struct lan743x_adapter *adapter)
801 {
802 u32 data;
803
804 return readx_poll_timeout(LAN743X_CSR_READ_OP, MAC_MII_ACC, data,
805 !(data & MAC_MII_ACC_MII_BUSY_), 0, 1000000);
806 }
807
lan743x_mdiobus_read_c22(struct mii_bus * bus,int phy_id,int index)808 static int lan743x_mdiobus_read_c22(struct mii_bus *bus, int phy_id, int index)
809 {
810 struct lan743x_adapter *adapter = bus->priv;
811 u32 val, mii_access;
812 int ret;
813
814 /* confirm MII not busy */
815 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
816 if (ret < 0)
817 return ret;
818
819 /* set the address, index & direction (read from PHY) */
820 mii_access = lan743x_mac_mii_access(phy_id, index, MAC_MII_READ);
821 lan743x_csr_write(adapter, MAC_MII_ACC, mii_access);
822 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
823 if (ret < 0)
824 return ret;
825
826 val = lan743x_csr_read(adapter, MAC_MII_DATA);
827 return (int)(val & 0xFFFF);
828 }
829
lan743x_mdiobus_write_c22(struct mii_bus * bus,int phy_id,int index,u16 regval)830 static int lan743x_mdiobus_write_c22(struct mii_bus *bus,
831 int phy_id, int index, u16 regval)
832 {
833 struct lan743x_adapter *adapter = bus->priv;
834 u32 val, mii_access;
835 int ret;
836
837 /* confirm MII not busy */
838 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
839 if (ret < 0)
840 return ret;
841 val = (u32)regval;
842 lan743x_csr_write(adapter, MAC_MII_DATA, val);
843
844 /* set the address, index & direction (write to PHY) */
845 mii_access = lan743x_mac_mii_access(phy_id, index, MAC_MII_WRITE);
846 lan743x_csr_write(adapter, MAC_MII_ACC, mii_access);
847 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
848 return ret;
849 }
850
lan743x_mac_mmd_access(int id,int dev_addr,int op)851 static u32 lan743x_mac_mmd_access(int id, int dev_addr, int op)
852 {
853 u32 ret;
854
855 ret = (id << MAC_MII_ACC_PHY_ADDR_SHIFT_) &
856 MAC_MII_ACC_PHY_ADDR_MASK_;
857 ret |= (dev_addr << MAC_MII_ACC_MIIMMD_SHIFT_) &
858 MAC_MII_ACC_MIIMMD_MASK_;
859 if (op == MMD_ACCESS_WRITE)
860 ret |= MAC_MII_ACC_MIICMD_WRITE_;
861 else if (op == MMD_ACCESS_READ)
862 ret |= MAC_MII_ACC_MIICMD_READ_;
863 else if (op == MMD_ACCESS_READ_INC)
864 ret |= MAC_MII_ACC_MIICMD_READ_INC_;
865 else
866 ret |= MAC_MII_ACC_MIICMD_ADDR_;
867 ret |= (MAC_MII_ACC_MII_BUSY_ | MAC_MII_ACC_MIICL45_);
868
869 return ret;
870 }
871
lan743x_mdiobus_read_c45(struct mii_bus * bus,int phy_id,int dev_addr,int index)872 static int lan743x_mdiobus_read_c45(struct mii_bus *bus, int phy_id,
873 int dev_addr, int index)
874 {
875 struct lan743x_adapter *adapter = bus->priv;
876 u32 mmd_access;
877 int ret;
878
879 /* confirm MII not busy */
880 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
881 if (ret < 0)
882 return ret;
883
884 /* Load Register Address */
885 lan743x_csr_write(adapter, MAC_MII_DATA, index);
886 mmd_access = lan743x_mac_mmd_access(phy_id, dev_addr,
887 MMD_ACCESS_ADDRESS);
888 lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access);
889 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
890 if (ret < 0)
891 return ret;
892
893 /* Read Data */
894 mmd_access = lan743x_mac_mmd_access(phy_id, dev_addr,
895 MMD_ACCESS_READ);
896 lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access);
897 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
898 if (ret < 0)
899 return ret;
900
901 ret = lan743x_csr_read(adapter, MAC_MII_DATA);
902 return (int)(ret & 0xFFFF);
903 }
904
lan743x_mdiobus_write_c45(struct mii_bus * bus,int phy_id,int dev_addr,int index,u16 regval)905 static int lan743x_mdiobus_write_c45(struct mii_bus *bus, int phy_id,
906 int dev_addr, int index, u16 regval)
907 {
908 struct lan743x_adapter *adapter = bus->priv;
909 u32 mmd_access;
910 int ret;
911
912 /* confirm MII not busy */
913 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
914 if (ret < 0)
915 return ret;
916
917 /* Load Register Address */
918 lan743x_csr_write(adapter, MAC_MII_DATA, (u32)index);
919 mmd_access = lan743x_mac_mmd_access(phy_id, dev_addr,
920 MMD_ACCESS_ADDRESS);
921 lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access);
922 ret = lan743x_mac_mii_wait_till_not_busy(adapter);
923 if (ret < 0)
924 return ret;
925
926 /* Write Data */
927 lan743x_csr_write(adapter, MAC_MII_DATA, (u32)regval);
928 mmd_access = lan743x_mac_mmd_access(phy_id, dev_addr,
929 MMD_ACCESS_WRITE);
930 lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access);
931
932 return lan743x_mac_mii_wait_till_not_busy(adapter);
933 }
934
lan743x_sgmii_wait_till_not_busy(struct lan743x_adapter * adapter)935 static int lan743x_sgmii_wait_till_not_busy(struct lan743x_adapter *adapter)
936 {
937 u32 data;
938 int ret;
939
940 ret = readx_poll_timeout(LAN743X_CSR_READ_OP, SGMII_ACC, data,
941 !(data & SGMII_ACC_SGMII_BZY_), 100, 1000000);
942 if (ret < 0)
943 netif_err(adapter, drv, adapter->netdev,
944 "%s: error %d sgmii wait timeout\n", __func__, ret);
945
946 return ret;
947 }
948
lan743x_sgmii_read(struct lan743x_adapter * adapter,u8 mmd,u16 addr)949 int lan743x_sgmii_read(struct lan743x_adapter *adapter, u8 mmd, u16 addr)
950 {
951 u32 mmd_access;
952 int ret;
953 u32 val;
954
955 if (mmd > 31) {
956 netif_err(adapter, probe, adapter->netdev,
957 "%s mmd should <= 31\n", __func__);
958 return -EINVAL;
959 }
960
961 mutex_lock(&adapter->sgmii_rw_lock);
962 /* Load Register Address */
963 mmd_access = mmd << SGMII_ACC_SGMII_MMD_SHIFT_;
964 mmd_access |= (addr | SGMII_ACC_SGMII_BZY_);
965 lan743x_csr_write(adapter, SGMII_ACC, mmd_access);
966 ret = lan743x_sgmii_wait_till_not_busy(adapter);
967 if (ret < 0)
968 goto sgmii_unlock;
969
970 val = lan743x_csr_read(adapter, SGMII_DATA);
971 ret = (int)(val & SGMII_DATA_MASK_);
972
973 sgmii_unlock:
974 mutex_unlock(&adapter->sgmii_rw_lock);
975
976 return ret;
977 }
978
lan743x_sgmii_write(struct lan743x_adapter * adapter,u8 mmd,u16 addr,u16 val)979 static int lan743x_sgmii_write(struct lan743x_adapter *adapter,
980 u8 mmd, u16 addr, u16 val)
981 {
982 u32 mmd_access;
983 int ret;
984
985 if (mmd > 31) {
986 netif_err(adapter, probe, adapter->netdev,
987 "%s mmd should <= 31\n", __func__);
988 return -EINVAL;
989 }
990 mutex_lock(&adapter->sgmii_rw_lock);
991 /* Load Register Data */
992 lan743x_csr_write(adapter, SGMII_DATA, (u32)(val & SGMII_DATA_MASK_));
993 /* Load Register Address */
994 mmd_access = mmd << SGMII_ACC_SGMII_MMD_SHIFT_;
995 mmd_access |= (addr | SGMII_ACC_SGMII_BZY_ | SGMII_ACC_SGMII_WR_);
996 lan743x_csr_write(adapter, SGMII_ACC, mmd_access);
997 ret = lan743x_sgmii_wait_till_not_busy(adapter);
998 mutex_unlock(&adapter->sgmii_rw_lock);
999
1000 return ret;
1001 }
1002
lan743x_get_lsd(int speed,int duplex,u8 mss)1003 static int lan743x_get_lsd(int speed, int duplex, u8 mss)
1004 {
1005 int lsd;
1006
1007 switch (speed) {
1008 case SPEED_2500:
1009 if (mss == MASTER_SLAVE_STATE_SLAVE)
1010 lsd = LINK_2500_SLAVE;
1011 else
1012 lsd = LINK_2500_MASTER;
1013 break;
1014 case SPEED_1000:
1015 if (mss == MASTER_SLAVE_STATE_SLAVE)
1016 lsd = LINK_1000_SLAVE;
1017 else
1018 lsd = LINK_1000_MASTER;
1019 break;
1020 case SPEED_100:
1021 if (duplex == DUPLEX_FULL)
1022 lsd = LINK_100FD;
1023 else
1024 lsd = LINK_100HD;
1025 break;
1026 case SPEED_10:
1027 if (duplex == DUPLEX_FULL)
1028 lsd = LINK_10FD;
1029 else
1030 lsd = LINK_10HD;
1031 break;
1032 default:
1033 lsd = -EINVAL;
1034 }
1035
1036 return lsd;
1037 }
1038
lan743x_sgmii_mpll_set(struct lan743x_adapter * adapter,u16 baud)1039 static int lan743x_sgmii_mpll_set(struct lan743x_adapter *adapter,
1040 u16 baud)
1041 {
1042 int mpllctrl0;
1043 int mpllctrl1;
1044 int miscctrl1;
1045 int ret;
1046
1047 mpllctrl0 = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2,
1048 VR_MII_GEN2_4_MPLL_CTRL0);
1049 if (mpllctrl0 < 0)
1050 return mpllctrl0;
1051
1052 mpllctrl0 &= ~VR_MII_MPLL_CTRL0_USE_REFCLK_PAD_;
1053 if (baud == VR_MII_BAUD_RATE_1P25GBPS) {
1054 mpllctrl1 = VR_MII_MPLL_MULTIPLIER_100;
1055 /* mpll_baud_clk/4 */
1056 miscctrl1 = 0xA;
1057 } else {
1058 mpllctrl1 = VR_MII_MPLL_MULTIPLIER_125;
1059 /* mpll_baud_clk/2 */
1060 miscctrl1 = 0x5;
1061 }
1062
1063 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2,
1064 VR_MII_GEN2_4_MPLL_CTRL0, mpllctrl0);
1065 if (ret < 0)
1066 return ret;
1067
1068 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2,
1069 VR_MII_GEN2_4_MPLL_CTRL1, mpllctrl1);
1070 if (ret < 0)
1071 return ret;
1072
1073 return lan743x_sgmii_write(adapter, MDIO_MMD_VEND2,
1074 VR_MII_GEN2_4_MISC_CTRL1, miscctrl1);
1075 }
1076
lan743x_sgmii_2_5G_mode_set(struct lan743x_adapter * adapter,bool enable)1077 static int lan743x_sgmii_2_5G_mode_set(struct lan743x_adapter *adapter,
1078 bool enable)
1079 {
1080 if (enable)
1081 return lan743x_sgmii_mpll_set(adapter,
1082 VR_MII_BAUD_RATE_3P125GBPS);
1083 else
1084 return lan743x_sgmii_mpll_set(adapter,
1085 VR_MII_BAUD_RATE_1P25GBPS);
1086 }
1087
lan743x_serdes_clock_and_aneg_update(struct lan743x_adapter * adapter)1088 static int lan743x_serdes_clock_and_aneg_update(struct lan743x_adapter *adapter)
1089 {
1090 enum lan743x_sgmii_lsd lsd = adapter->sgmii_lsd;
1091 int mii_ctrl;
1092 int dgt_ctrl;
1093 int an_ctrl;
1094 int ret;
1095
1096 if (lsd == LINK_2500_MASTER || lsd == LINK_2500_SLAVE)
1097 /* Switch to 2.5 Gbps */
1098 ret = lan743x_sgmii_2_5G_mode_set(adapter, true);
1099 else
1100 /* Switch to 10/100/1000 Mbps clock */
1101 ret = lan743x_sgmii_2_5G_mode_set(adapter, false);
1102 if (ret < 0)
1103 return ret;
1104
1105 /* Enable SGMII Auto NEG */
1106 mii_ctrl = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, MII_BMCR);
1107 if (mii_ctrl < 0)
1108 return mii_ctrl;
1109
1110 an_ctrl = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, VR_MII_AN_CTRL);
1111 if (an_ctrl < 0)
1112 return an_ctrl;
1113
1114 dgt_ctrl = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2,
1115 VR_MII_DIG_CTRL1);
1116 if (dgt_ctrl < 0)
1117 return dgt_ctrl;
1118
1119 if (lsd == LINK_2500_MASTER || lsd == LINK_2500_SLAVE) {
1120 mii_ctrl &= ~(BMCR_ANENABLE | BMCR_ANRESTART | BMCR_SPEED100);
1121 mii_ctrl |= BMCR_SPEED1000;
1122 dgt_ctrl |= VR_MII_DIG_CTRL1_CL37_TMR_OVR_RIDE_;
1123 dgt_ctrl &= ~VR_MII_DIG_CTRL1_MAC_AUTO_SW_;
1124 /* In order for Auto-Negotiation to operate properly at
1125 * 2.5 Gbps the 1.6ms link timer values must be adjusted
1126 * The VR_MII_LINK_TIMER_CTRL Register must be set to
1127 * 16'h7A1 and The CL37_TMR_OVR_RIDE bit of the
1128 * VR_MII_DIG_CTRL1 Register set to 1
1129 */
1130 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2,
1131 VR_MII_LINK_TIMER_CTRL, 0x7A1);
1132 if (ret < 0)
1133 return ret;
1134 } else {
1135 mii_ctrl |= (BMCR_ANENABLE | BMCR_ANRESTART);
1136 an_ctrl &= ~VR_MII_AN_CTRL_SGMII_LINK_STS_;
1137 dgt_ctrl &= ~VR_MII_DIG_CTRL1_CL37_TMR_OVR_RIDE_;
1138 dgt_ctrl |= VR_MII_DIG_CTRL1_MAC_AUTO_SW_;
1139 }
1140
1141 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, MII_BMCR,
1142 mii_ctrl);
1143 if (ret < 0)
1144 return ret;
1145
1146 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2,
1147 VR_MII_DIG_CTRL1, dgt_ctrl);
1148 if (ret < 0)
1149 return ret;
1150
1151 return lan743x_sgmii_write(adapter, MDIO_MMD_VEND2,
1152 VR_MII_AN_CTRL, an_ctrl);
1153 }
1154
lan743x_pcs_seq_state(struct lan743x_adapter * adapter,u8 state)1155 static int lan743x_pcs_seq_state(struct lan743x_adapter *adapter, u8 state)
1156 {
1157 u8 wait_cnt = 0;
1158 u32 dig_sts;
1159
1160 do {
1161 dig_sts = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2,
1162 VR_MII_DIG_STS);
1163 if (((dig_sts & VR_MII_DIG_STS_PSEQ_STATE_MASK_) >>
1164 VR_MII_DIG_STS_PSEQ_STATE_POS_) == state)
1165 break;
1166 usleep_range(1000, 2000);
1167 } while (wait_cnt++ < 10);
1168
1169 if (wait_cnt >= 10)
1170 return -ETIMEDOUT;
1171
1172 return 0;
1173 }
1174
lan743x_pcs_power_reset(struct lan743x_adapter * adapter)1175 static int lan743x_pcs_power_reset(struct lan743x_adapter *adapter)
1176 {
1177 int mii_ctl;
1178 int ret;
1179
1180 /* SGMII/1000/2500BASE-X PCS power down */
1181 mii_ctl = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, MII_BMCR);
1182 if (mii_ctl < 0)
1183 return mii_ctl;
1184
1185 mii_ctl |= BMCR_PDOWN;
1186 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, MII_BMCR, mii_ctl);
1187 if (ret < 0)
1188 return ret;
1189
1190 ret = lan743x_pcs_seq_state(adapter, PCS_POWER_STATE_DOWN);
1191 if (ret < 0)
1192 return ret;
1193
1194 /* SGMII/1000/2500BASE-X PCS power up */
1195 mii_ctl &= ~BMCR_PDOWN;
1196 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, MII_BMCR, mii_ctl);
1197 if (ret < 0)
1198 return ret;
1199
1200 return lan743x_pcs_seq_state(adapter, PCS_POWER_STATE_UP);
1201 }
1202
lan743x_mac_set_address(struct lan743x_adapter * adapter,u8 * addr)1203 static void lan743x_mac_set_address(struct lan743x_adapter *adapter,
1204 u8 *addr)
1205 {
1206 u32 addr_lo, addr_hi;
1207
1208 addr_lo = addr[0] |
1209 addr[1] << 8 |
1210 addr[2] << 16 |
1211 addr[3] << 24;
1212 addr_hi = addr[4] |
1213 addr[5] << 8;
1214 lan743x_csr_write(adapter, MAC_RX_ADDRL, addr_lo);
1215 lan743x_csr_write(adapter, MAC_RX_ADDRH, addr_hi);
1216
1217 ether_addr_copy(adapter->mac_address, addr);
1218 netif_info(adapter, drv, adapter->netdev,
1219 "MAC address set to %pM\n", addr);
1220 }
1221
lan743x_mac_rx_enable_fse(struct lan743x_adapter * adapter)1222 static void lan743x_mac_rx_enable_fse(struct lan743x_adapter *adapter)
1223 {
1224 u32 mac_rx;
1225 bool rxen;
1226
1227 mac_rx = lan743x_csr_read(adapter, MAC_RX);
1228 if (mac_rx & MAC_RX_FSE_)
1229 return;
1230
1231 rxen = mac_rx & MAC_RX_RXEN_;
1232 if (rxen) {
1233 mac_rx &= ~MAC_RX_RXEN_;
1234 lan743x_csr_write(adapter, MAC_RX, mac_rx);
1235 lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_,
1236 1, 1000, 20000, 100);
1237 }
1238
1239 /* Per AN2948, hardware prevents modification of the FSE bit while the
1240 * MAC receiver is enabled (RXEN bit set). Use separate register write
1241 * to assert the FSE bit before enabling the RXEN bit in MAC_RX
1242 */
1243 mac_rx |= MAC_RX_FSE_;
1244 lan743x_csr_write(adapter, MAC_RX, mac_rx);
1245
1246 if (rxen) {
1247 mac_rx |= MAC_RX_RXEN_;
1248 lan743x_csr_write(adapter, MAC_RX, mac_rx);
1249 }
1250 }
1251
lan743x_mac_init(struct lan743x_adapter * adapter)1252 static int lan743x_mac_init(struct lan743x_adapter *adapter)
1253 {
1254 bool mac_address_valid = true;
1255 struct net_device *netdev;
1256 u32 mac_addr_hi = 0;
1257 u32 mac_addr_lo = 0;
1258 u32 data;
1259
1260 netdev = adapter->netdev;
1261
1262 /* disable auto duplex, and speed detection. Phylib does that */
1263 data = lan743x_csr_read(adapter, MAC_CR);
1264 data &= ~(MAC_CR_ADD_ | MAC_CR_ASD_);
1265 data |= MAC_CR_CNTR_RST_;
1266 lan743x_csr_write(adapter, MAC_CR, data);
1267
1268 if (!is_valid_ether_addr(adapter->mac_address)) {
1269 mac_addr_hi = lan743x_csr_read(adapter, MAC_RX_ADDRH);
1270 mac_addr_lo = lan743x_csr_read(adapter, MAC_RX_ADDRL);
1271 adapter->mac_address[0] = mac_addr_lo & 0xFF;
1272 adapter->mac_address[1] = (mac_addr_lo >> 8) & 0xFF;
1273 adapter->mac_address[2] = (mac_addr_lo >> 16) & 0xFF;
1274 adapter->mac_address[3] = (mac_addr_lo >> 24) & 0xFF;
1275 adapter->mac_address[4] = mac_addr_hi & 0xFF;
1276 adapter->mac_address[5] = (mac_addr_hi >> 8) & 0xFF;
1277
1278 if (((mac_addr_hi & 0x0000FFFF) == 0x0000FFFF) &&
1279 mac_addr_lo == 0xFFFFFFFF) {
1280 mac_address_valid = false;
1281 } else if (!is_valid_ether_addr(adapter->mac_address)) {
1282 mac_address_valid = false;
1283 }
1284
1285 if (!mac_address_valid)
1286 eth_random_addr(adapter->mac_address);
1287 }
1288 lan743x_mac_set_address(adapter, adapter->mac_address);
1289 eth_hw_addr_set(netdev, adapter->mac_address);
1290
1291 lan743x_mac_rx_enable_fse(adapter);
1292
1293 return 0;
1294 }
1295
lan743x_mac_open(struct lan743x_adapter * adapter)1296 static int lan743x_mac_open(struct lan743x_adapter *adapter)
1297 {
1298 u32 temp;
1299
1300 temp = lan743x_csr_read(adapter, MAC_RX);
1301 lan743x_csr_write(adapter, MAC_RX, temp | MAC_RX_RXEN_);
1302 temp = lan743x_csr_read(adapter, MAC_TX);
1303 lan743x_csr_write(adapter, MAC_TX, temp | MAC_TX_TXEN_);
1304 return 0;
1305 }
1306
lan743x_mac_close(struct lan743x_adapter * adapter)1307 static void lan743x_mac_close(struct lan743x_adapter *adapter)
1308 {
1309 u32 temp;
1310
1311 temp = lan743x_csr_read(adapter, MAC_TX);
1312 temp &= ~MAC_TX_TXEN_;
1313 lan743x_csr_write(adapter, MAC_TX, temp);
1314 lan743x_csr_wait_for_bit(adapter, MAC_TX, MAC_TX_TXD_,
1315 1, 1000, 20000, 100);
1316
1317 temp = lan743x_csr_read(adapter, MAC_RX);
1318 temp &= ~MAC_RX_RXEN_;
1319 lan743x_csr_write(adapter, MAC_RX, temp);
1320 lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_,
1321 1, 1000, 20000, 100);
1322 }
1323
lan743x_mac_flow_ctrl_set_enables(struct lan743x_adapter * adapter,bool tx_enable,bool rx_enable)1324 void lan743x_mac_flow_ctrl_set_enables(struct lan743x_adapter *adapter,
1325 bool tx_enable, bool rx_enable)
1326 {
1327 u32 flow_setting = 0;
1328
1329 /* set maximum pause time because when fifo space frees
1330 * up a zero value pause frame will be sent to release the pause
1331 */
1332 flow_setting = MAC_FLOW_CR_FCPT_MASK_;
1333 if (tx_enable)
1334 flow_setting |= MAC_FLOW_CR_TX_FCEN_;
1335 if (rx_enable)
1336 flow_setting |= MAC_FLOW_CR_RX_FCEN_;
1337 lan743x_csr_write(adapter, MAC_FLOW, flow_setting);
1338 }
1339
lan743x_mac_set_mtu(struct lan743x_adapter * adapter,int new_mtu)1340 static int lan743x_mac_set_mtu(struct lan743x_adapter *adapter, int new_mtu)
1341 {
1342 int enabled = 0;
1343 u32 mac_rx = 0;
1344
1345 mac_rx = lan743x_csr_read(adapter, MAC_RX);
1346 if (mac_rx & MAC_RX_RXEN_) {
1347 enabled = 1;
1348 if (mac_rx & MAC_RX_RXD_) {
1349 lan743x_csr_write(adapter, MAC_RX, mac_rx);
1350 mac_rx &= ~MAC_RX_RXD_;
1351 }
1352 mac_rx &= ~MAC_RX_RXEN_;
1353 lan743x_csr_write(adapter, MAC_RX, mac_rx);
1354 lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_,
1355 1, 1000, 20000, 100);
1356 lan743x_csr_write(adapter, MAC_RX, mac_rx | MAC_RX_RXD_);
1357 }
1358
1359 mac_rx &= ~(MAC_RX_MAX_SIZE_MASK_);
1360 mac_rx |= (((new_mtu + ETH_HLEN + ETH_FCS_LEN)
1361 << MAC_RX_MAX_SIZE_SHIFT_) & MAC_RX_MAX_SIZE_MASK_);
1362 lan743x_csr_write(adapter, MAC_RX, mac_rx);
1363
1364 if (enabled) {
1365 mac_rx |= MAC_RX_RXEN_;
1366 lan743x_csr_write(adapter, MAC_RX, mac_rx);
1367 }
1368 return 0;
1369 }
1370
1371 /* PHY */
lan743x_hw_reset_phy(struct lan743x_adapter * adapter)1372 static int lan743x_hw_reset_phy(struct lan743x_adapter *adapter)
1373 {
1374 u32 data;
1375
1376 /* Only called with in probe, and before mdiobus_register */
1377
1378 data = lan743x_csr_read(adapter, PMT_CTL);
1379 data |= PMT_CTL_ETH_PHY_RST_;
1380 lan743x_csr_write(adapter, PMT_CTL, data);
1381
1382 return readx_poll_timeout(LAN743X_CSR_READ_OP, PMT_CTL, data,
1383 (!(data & PMT_CTL_ETH_PHY_RST_) &&
1384 (data & PMT_CTL_READY_)),
1385 50000, 1000000);
1386 }
1387
lan743x_phy_interface_select(struct lan743x_adapter * adapter)1388 static void lan743x_phy_interface_select(struct lan743x_adapter *adapter)
1389 {
1390 u32 id_rev;
1391 u32 data;
1392
1393 data = lan743x_csr_read(adapter, MAC_CR);
1394 id_rev = adapter->csr.id_rev & ID_REV_ID_MASK_;
1395
1396 if (adapter->is_pci11x1x && adapter->is_sgmii_en)
1397 adapter->phy_interface = PHY_INTERFACE_MODE_SGMII;
1398 else if (id_rev == ID_REV_ID_LAN7430_)
1399 adapter->phy_interface = PHY_INTERFACE_MODE_GMII;
1400 else if ((id_rev == ID_REV_ID_LAN7431_) && (data & MAC_CR_MII_EN_))
1401 adapter->phy_interface = PHY_INTERFACE_MODE_MII;
1402 else
1403 adapter->phy_interface = PHY_INTERFACE_MODE_RGMII;
1404
1405 netif_dbg(adapter, drv, adapter->netdev,
1406 "selected phy interface: 0x%X\n", adapter->phy_interface);
1407 }
1408
lan743x_rfe_open(struct lan743x_adapter * adapter)1409 static void lan743x_rfe_open(struct lan743x_adapter *adapter)
1410 {
1411 lan743x_csr_write(adapter, RFE_RSS_CFG,
1412 RFE_RSS_CFG_UDP_IPV6_EX_ |
1413 RFE_RSS_CFG_TCP_IPV6_EX_ |
1414 RFE_RSS_CFG_IPV6_EX_ |
1415 RFE_RSS_CFG_UDP_IPV6_ |
1416 RFE_RSS_CFG_TCP_IPV6_ |
1417 RFE_RSS_CFG_IPV6_ |
1418 RFE_RSS_CFG_UDP_IPV4_ |
1419 RFE_RSS_CFG_TCP_IPV4_ |
1420 RFE_RSS_CFG_IPV4_ |
1421 RFE_RSS_CFG_VALID_HASH_BITS_ |
1422 RFE_RSS_CFG_RSS_QUEUE_ENABLE_ |
1423 RFE_RSS_CFG_RSS_HASH_STORE_ |
1424 RFE_RSS_CFG_RSS_ENABLE_);
1425 }
1426
lan743x_rfe_update_mac_address(struct lan743x_adapter * adapter)1427 static void lan743x_rfe_update_mac_address(struct lan743x_adapter *adapter)
1428 {
1429 u8 *mac_addr;
1430 u32 mac_addr_hi = 0;
1431 u32 mac_addr_lo = 0;
1432
1433 /* Add mac address to perfect Filter */
1434 mac_addr = adapter->mac_address;
1435 mac_addr_lo = ((((u32)(mac_addr[0])) << 0) |
1436 (((u32)(mac_addr[1])) << 8) |
1437 (((u32)(mac_addr[2])) << 16) |
1438 (((u32)(mac_addr[3])) << 24));
1439 mac_addr_hi = ((((u32)(mac_addr[4])) << 0) |
1440 (((u32)(mac_addr[5])) << 8));
1441
1442 lan743x_csr_write(adapter, RFE_ADDR_FILT_LO(0), mac_addr_lo);
1443 lan743x_csr_write(adapter, RFE_ADDR_FILT_HI(0),
1444 mac_addr_hi | RFE_ADDR_FILT_HI_VALID_);
1445 }
1446
lan743x_rfe_set_multicast(struct lan743x_adapter * adapter)1447 static void lan743x_rfe_set_multicast(struct lan743x_adapter *adapter)
1448 {
1449 struct net_device *netdev = adapter->netdev;
1450 u32 hash_table[DP_SEL_VHF_HASH_LEN];
1451 u32 rfctl;
1452 u32 data;
1453
1454 rfctl = lan743x_csr_read(adapter, RFE_CTL);
1455 rfctl &= ~(RFE_CTL_AU_ | RFE_CTL_AM_ |
1456 RFE_CTL_DA_PERFECT_ | RFE_CTL_MCAST_HASH_);
1457 rfctl |= RFE_CTL_AB_;
1458 if (netdev->flags & IFF_PROMISC) {
1459 rfctl |= RFE_CTL_AM_ | RFE_CTL_AU_;
1460 } else {
1461 if (netdev->flags & IFF_ALLMULTI)
1462 rfctl |= RFE_CTL_AM_;
1463 }
1464
1465 if (netdev->features & NETIF_F_RXCSUM)
1466 rfctl |= RFE_CTL_IP_COE_ | RFE_CTL_TCP_UDP_COE_;
1467
1468 memset(hash_table, 0, DP_SEL_VHF_HASH_LEN * sizeof(u32));
1469 if (netdev_mc_count(netdev)) {
1470 struct netdev_hw_addr *ha;
1471 int i;
1472
1473 rfctl |= RFE_CTL_DA_PERFECT_;
1474 i = 1;
1475 netdev_for_each_mc_addr(ha, netdev) {
1476 /* set first 32 into Perfect Filter */
1477 if (i < 33) {
1478 lan743x_csr_write(adapter,
1479 RFE_ADDR_FILT_HI(i), 0);
1480 data = ha->addr[3];
1481 data = ha->addr[2] | (data << 8);
1482 data = ha->addr[1] | (data << 8);
1483 data = ha->addr[0] | (data << 8);
1484 lan743x_csr_write(adapter,
1485 RFE_ADDR_FILT_LO(i), data);
1486 data = ha->addr[5];
1487 data = ha->addr[4] | (data << 8);
1488 data |= RFE_ADDR_FILT_HI_VALID_;
1489 lan743x_csr_write(adapter,
1490 RFE_ADDR_FILT_HI(i), data);
1491 } else {
1492 u32 bitnum = (ether_crc(ETH_ALEN, ha->addr) >>
1493 23) & 0x1FF;
1494 hash_table[bitnum / 32] |= (1 << (bitnum % 32));
1495 rfctl |= RFE_CTL_MCAST_HASH_;
1496 }
1497 i++;
1498 }
1499 }
1500
1501 lan743x_dp_write(adapter, DP_SEL_RFE_RAM,
1502 DP_SEL_VHF_VLAN_LEN,
1503 DP_SEL_VHF_HASH_LEN, hash_table);
1504 lan743x_csr_write(adapter, RFE_CTL, rfctl);
1505 }
1506
lan743x_dmac_init(struct lan743x_adapter * adapter)1507 static int lan743x_dmac_init(struct lan743x_adapter *adapter)
1508 {
1509 u32 data = 0;
1510
1511 lan743x_csr_write(adapter, DMAC_CMD, DMAC_CMD_SWR_);
1512 lan743x_csr_wait_for_bit(adapter, DMAC_CMD, DMAC_CMD_SWR_,
1513 0, 1000, 20000, 100);
1514 switch (DEFAULT_DMA_DESCRIPTOR_SPACING) {
1515 case DMA_DESCRIPTOR_SPACING_16:
1516 data = DMAC_CFG_MAX_DSPACE_16_;
1517 break;
1518 case DMA_DESCRIPTOR_SPACING_32:
1519 data = DMAC_CFG_MAX_DSPACE_32_;
1520 break;
1521 case DMA_DESCRIPTOR_SPACING_64:
1522 data = DMAC_CFG_MAX_DSPACE_64_;
1523 break;
1524 case DMA_DESCRIPTOR_SPACING_128:
1525 data = DMAC_CFG_MAX_DSPACE_128_;
1526 break;
1527 default:
1528 return -EPERM;
1529 }
1530 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0))
1531 data |= DMAC_CFG_COAL_EN_;
1532 data |= DMAC_CFG_CH_ARB_SEL_RX_HIGH_;
1533 data |= DMAC_CFG_MAX_READ_REQ_SET_(6);
1534 lan743x_csr_write(adapter, DMAC_CFG, data);
1535 data = DMAC_COAL_CFG_TIMER_LIMIT_SET_(1);
1536 data |= DMAC_COAL_CFG_TIMER_TX_START_;
1537 data |= DMAC_COAL_CFG_FLUSH_INTS_;
1538 data |= DMAC_COAL_CFG_INT_EXIT_COAL_;
1539 data |= DMAC_COAL_CFG_CSR_EXIT_COAL_;
1540 data |= DMAC_COAL_CFG_TX_THRES_SET_(0x0A);
1541 data |= DMAC_COAL_CFG_RX_THRES_SET_(0x0C);
1542 lan743x_csr_write(adapter, DMAC_COAL_CFG, data);
1543 data = DMAC_OBFF_TX_THRES_SET_(0x08);
1544 data |= DMAC_OBFF_RX_THRES_SET_(0x0A);
1545 lan743x_csr_write(adapter, DMAC_OBFF_CFG, data);
1546 return 0;
1547 }
1548
lan743x_dmac_tx_get_state(struct lan743x_adapter * adapter,int tx_channel)1549 static int lan743x_dmac_tx_get_state(struct lan743x_adapter *adapter,
1550 int tx_channel)
1551 {
1552 u32 dmac_cmd = 0;
1553
1554 dmac_cmd = lan743x_csr_read(adapter, DMAC_CMD);
1555 return DMAC_CHANNEL_STATE_SET((dmac_cmd &
1556 DMAC_CMD_START_T_(tx_channel)),
1557 (dmac_cmd &
1558 DMAC_CMD_STOP_T_(tx_channel)));
1559 }
1560
lan743x_dmac_tx_wait_till_stopped(struct lan743x_adapter * adapter,int tx_channel)1561 static int lan743x_dmac_tx_wait_till_stopped(struct lan743x_adapter *adapter,
1562 int tx_channel)
1563 {
1564 int timeout = 100;
1565 int result = 0;
1566
1567 while (timeout &&
1568 ((result = lan743x_dmac_tx_get_state(adapter, tx_channel)) ==
1569 DMAC_CHANNEL_STATE_STOP_PENDING)) {
1570 usleep_range(1000, 20000);
1571 timeout--;
1572 }
1573 if (result == DMAC_CHANNEL_STATE_STOP_PENDING)
1574 result = -ENODEV;
1575 return result;
1576 }
1577
lan743x_dmac_rx_get_state(struct lan743x_adapter * adapter,int rx_channel)1578 static int lan743x_dmac_rx_get_state(struct lan743x_adapter *adapter,
1579 int rx_channel)
1580 {
1581 u32 dmac_cmd = 0;
1582
1583 dmac_cmd = lan743x_csr_read(adapter, DMAC_CMD);
1584 return DMAC_CHANNEL_STATE_SET((dmac_cmd &
1585 DMAC_CMD_START_R_(rx_channel)),
1586 (dmac_cmd &
1587 DMAC_CMD_STOP_R_(rx_channel)));
1588 }
1589
lan743x_dmac_rx_wait_till_stopped(struct lan743x_adapter * adapter,int rx_channel)1590 static int lan743x_dmac_rx_wait_till_stopped(struct lan743x_adapter *adapter,
1591 int rx_channel)
1592 {
1593 int timeout = 100;
1594 int result = 0;
1595
1596 while (timeout &&
1597 ((result = lan743x_dmac_rx_get_state(adapter, rx_channel)) ==
1598 DMAC_CHANNEL_STATE_STOP_PENDING)) {
1599 usleep_range(1000, 20000);
1600 timeout--;
1601 }
1602 if (result == DMAC_CHANNEL_STATE_STOP_PENDING)
1603 result = -ENODEV;
1604 return result;
1605 }
1606
lan743x_tx_release_desc(struct lan743x_tx * tx,int descriptor_index,bool cleanup)1607 static void lan743x_tx_release_desc(struct lan743x_tx *tx,
1608 int descriptor_index, bool cleanup)
1609 {
1610 struct lan743x_tx_buffer_info *buffer_info = NULL;
1611 struct lan743x_tx_descriptor *descriptor = NULL;
1612 u32 descriptor_type = 0;
1613 bool ignore_sync;
1614
1615 descriptor = &tx->ring_cpu_ptr[descriptor_index];
1616 buffer_info = &tx->buffer_info[descriptor_index];
1617 if (!(buffer_info->flags & TX_BUFFER_INFO_FLAG_ACTIVE))
1618 goto done;
1619
1620 descriptor_type = le32_to_cpu(descriptor->data0) &
1621 TX_DESC_DATA0_DTYPE_MASK_;
1622 if (descriptor_type == TX_DESC_DATA0_DTYPE_DATA_)
1623 goto clean_up_data_descriptor;
1624 else
1625 goto clear_active;
1626
1627 clean_up_data_descriptor:
1628 if (buffer_info->dma_ptr) {
1629 if (buffer_info->flags &
1630 TX_BUFFER_INFO_FLAG_SKB_FRAGMENT) {
1631 dma_unmap_page(&tx->adapter->pdev->dev,
1632 buffer_info->dma_ptr,
1633 buffer_info->buffer_length,
1634 DMA_TO_DEVICE);
1635 } else {
1636 dma_unmap_single(&tx->adapter->pdev->dev,
1637 buffer_info->dma_ptr,
1638 buffer_info->buffer_length,
1639 DMA_TO_DEVICE);
1640 }
1641 buffer_info->dma_ptr = 0;
1642 buffer_info->buffer_length = 0;
1643 }
1644 if (!buffer_info->skb)
1645 goto clear_active;
1646
1647 if (!(buffer_info->flags & TX_BUFFER_INFO_FLAG_TIMESTAMP_REQUESTED)) {
1648 dev_kfree_skb_any(buffer_info->skb);
1649 goto clear_skb;
1650 }
1651
1652 if (cleanup) {
1653 lan743x_ptp_unrequest_tx_timestamp(tx->adapter);
1654 dev_kfree_skb_any(buffer_info->skb);
1655 } else {
1656 ignore_sync = (buffer_info->flags &
1657 TX_BUFFER_INFO_FLAG_IGNORE_SYNC) != 0;
1658 lan743x_ptp_tx_timestamp_skb(tx->adapter,
1659 buffer_info->skb, ignore_sync);
1660 }
1661
1662 clear_skb:
1663 buffer_info->skb = NULL;
1664
1665 clear_active:
1666 buffer_info->flags &= ~TX_BUFFER_INFO_FLAG_ACTIVE;
1667
1668 done:
1669 memset(buffer_info, 0, sizeof(*buffer_info));
1670 memset(descriptor, 0, sizeof(*descriptor));
1671 }
1672
lan743x_tx_next_index(struct lan743x_tx * tx,int index)1673 static int lan743x_tx_next_index(struct lan743x_tx *tx, int index)
1674 {
1675 return ((++index) % tx->ring_size);
1676 }
1677
lan743x_tx_release_completed_descriptors(struct lan743x_tx * tx)1678 static void lan743x_tx_release_completed_descriptors(struct lan743x_tx *tx)
1679 {
1680 while (le32_to_cpu(*tx->head_cpu_ptr) != (tx->last_head)) {
1681 lan743x_tx_release_desc(tx, tx->last_head, false);
1682 tx->last_head = lan743x_tx_next_index(tx, tx->last_head);
1683 }
1684 }
1685
lan743x_tx_release_all_descriptors(struct lan743x_tx * tx)1686 static void lan743x_tx_release_all_descriptors(struct lan743x_tx *tx)
1687 {
1688 u32 original_head = 0;
1689
1690 original_head = tx->last_head;
1691 do {
1692 lan743x_tx_release_desc(tx, tx->last_head, true);
1693 tx->last_head = lan743x_tx_next_index(tx, tx->last_head);
1694 } while (tx->last_head != original_head);
1695 memset(tx->ring_cpu_ptr, 0,
1696 sizeof(*tx->ring_cpu_ptr) * (tx->ring_size));
1697 memset(tx->buffer_info, 0,
1698 sizeof(*tx->buffer_info) * (tx->ring_size));
1699 }
1700
lan743x_tx_get_desc_cnt(struct lan743x_tx * tx,struct sk_buff * skb)1701 static int lan743x_tx_get_desc_cnt(struct lan743x_tx *tx,
1702 struct sk_buff *skb)
1703 {
1704 int result = 1; /* 1 for the main skb buffer */
1705 int nr_frags = 0;
1706
1707 if (skb_is_gso(skb))
1708 result++; /* requires an extension descriptor */
1709 nr_frags = skb_shinfo(skb)->nr_frags;
1710 result += nr_frags; /* 1 for each fragment buffer */
1711 return result;
1712 }
1713
lan743x_tx_get_avail_desc(struct lan743x_tx * tx)1714 static int lan743x_tx_get_avail_desc(struct lan743x_tx *tx)
1715 {
1716 int last_head = tx->last_head;
1717 int last_tail = tx->last_tail;
1718
1719 if (last_tail >= last_head)
1720 return tx->ring_size - last_tail + last_head - 1;
1721 else
1722 return last_head - last_tail - 1;
1723 }
1724
lan743x_rx_cfg_b_tstamp_config(struct lan743x_adapter * adapter,int rx_ts_config)1725 static void lan743x_rx_cfg_b_tstamp_config(struct lan743x_adapter *adapter,
1726 int rx_ts_config)
1727 {
1728 int channel_number;
1729 int index;
1730 u32 data;
1731
1732 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) {
1733 channel_number = adapter->rx[index].channel_number;
1734 data = lan743x_csr_read(adapter, RX_CFG_B(channel_number));
1735 data &= RX_CFG_B_TS_MASK_;
1736 data |= rx_ts_config;
1737 lan743x_csr_write(adapter, RX_CFG_B(channel_number),
1738 data);
1739 }
1740 }
1741
lan743x_rx_set_tstamp_mode(struct lan743x_adapter * adapter,int rx_filter)1742 int lan743x_rx_set_tstamp_mode(struct lan743x_adapter *adapter,
1743 int rx_filter)
1744 {
1745 u32 data;
1746
1747 switch (rx_filter) {
1748 case HWTSTAMP_FILTER_PTP_V2_EVENT:
1749 lan743x_rx_cfg_b_tstamp_config(adapter,
1750 RX_CFG_B_TS_DESCR_EN_);
1751 data = lan743x_csr_read(adapter, PTP_RX_TS_CFG);
1752 data |= PTP_RX_TS_CFG_EVENT_MSGS_;
1753 lan743x_csr_write(adapter, PTP_RX_TS_CFG, data);
1754 break;
1755 case HWTSTAMP_FILTER_NONE:
1756 lan743x_rx_cfg_b_tstamp_config(adapter,
1757 RX_CFG_B_TS_NONE_);
1758 break;
1759 case HWTSTAMP_FILTER_ALL:
1760 lan743x_rx_cfg_b_tstamp_config(adapter,
1761 RX_CFG_B_TS_ALL_RX_);
1762 break;
1763 default:
1764 return -ERANGE;
1765 }
1766 adapter->rx_tstamp_filter = rx_filter;
1767 return 0;
1768 }
1769
lan743x_tx_set_timestamping_mode(struct lan743x_tx * tx,bool enable_timestamping,bool enable_onestep_sync)1770 void lan743x_tx_set_timestamping_mode(struct lan743x_tx *tx,
1771 bool enable_timestamping,
1772 bool enable_onestep_sync)
1773 {
1774 if (enable_timestamping)
1775 tx->ts_flags |= TX_TS_FLAG_TIMESTAMPING_ENABLED;
1776 else
1777 tx->ts_flags &= ~TX_TS_FLAG_TIMESTAMPING_ENABLED;
1778 if (enable_onestep_sync)
1779 tx->ts_flags |= TX_TS_FLAG_ONE_STEP_SYNC;
1780 else
1781 tx->ts_flags &= ~TX_TS_FLAG_ONE_STEP_SYNC;
1782 }
1783
lan743x_tx_frame_start(struct lan743x_tx * tx,unsigned char * first_buffer,unsigned int first_buffer_length,unsigned int frame_length,bool time_stamp,bool check_sum)1784 static int lan743x_tx_frame_start(struct lan743x_tx *tx,
1785 unsigned char *first_buffer,
1786 unsigned int first_buffer_length,
1787 unsigned int frame_length,
1788 bool time_stamp,
1789 bool check_sum)
1790 {
1791 /* called only from within lan743x_tx_xmit_frame.
1792 * assuming tx->ring_lock has already been acquired.
1793 */
1794 struct lan743x_tx_descriptor *tx_descriptor = NULL;
1795 struct lan743x_tx_buffer_info *buffer_info = NULL;
1796 struct lan743x_adapter *adapter = tx->adapter;
1797 struct device *dev = &adapter->pdev->dev;
1798 dma_addr_t dma_ptr;
1799
1800 tx->frame_flags |= TX_FRAME_FLAG_IN_PROGRESS;
1801 tx->frame_first = tx->last_tail;
1802 tx->frame_tail = tx->frame_first;
1803
1804 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
1805 buffer_info = &tx->buffer_info[tx->frame_tail];
1806 dma_ptr = dma_map_single(dev, first_buffer, first_buffer_length,
1807 DMA_TO_DEVICE);
1808 if (dma_mapping_error(dev, dma_ptr))
1809 return -ENOMEM;
1810
1811 tx_descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(dma_ptr));
1812 tx_descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(dma_ptr));
1813 tx_descriptor->data3 = cpu_to_le32((frame_length << 16) &
1814 TX_DESC_DATA3_FRAME_LENGTH_MSS_MASK_);
1815
1816 buffer_info->skb = NULL;
1817 buffer_info->dma_ptr = dma_ptr;
1818 buffer_info->buffer_length = first_buffer_length;
1819 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE;
1820
1821 tx->frame_data0 = (first_buffer_length &
1822 TX_DESC_DATA0_BUF_LENGTH_MASK_) |
1823 TX_DESC_DATA0_DTYPE_DATA_ |
1824 TX_DESC_DATA0_FS_ |
1825 TX_DESC_DATA0_FCS_;
1826 if (time_stamp)
1827 tx->frame_data0 |= TX_DESC_DATA0_TSE_;
1828
1829 if (check_sum)
1830 tx->frame_data0 |= TX_DESC_DATA0_ICE_ |
1831 TX_DESC_DATA0_IPE_ |
1832 TX_DESC_DATA0_TPE_;
1833
1834 /* data0 will be programmed in one of other frame assembler functions */
1835 return 0;
1836 }
1837
lan743x_tx_frame_add_lso(struct lan743x_tx * tx,unsigned int frame_length,int nr_frags)1838 static void lan743x_tx_frame_add_lso(struct lan743x_tx *tx,
1839 unsigned int frame_length,
1840 int nr_frags)
1841 {
1842 /* called only from within lan743x_tx_xmit_frame.
1843 * assuming tx->ring_lock has already been acquired.
1844 */
1845 struct lan743x_tx_descriptor *tx_descriptor = NULL;
1846 struct lan743x_tx_buffer_info *buffer_info = NULL;
1847
1848 /* wrap up previous descriptor */
1849 tx->frame_data0 |= TX_DESC_DATA0_EXT_;
1850 if (nr_frags <= 0) {
1851 tx->frame_data0 |= TX_DESC_DATA0_LS_;
1852 tx->frame_data0 |= TX_DESC_DATA0_IOC_;
1853 tx->frame_last = tx->frame_first;
1854 }
1855 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
1856 tx_descriptor->data0 = cpu_to_le32(tx->frame_data0);
1857
1858 /* move to next descriptor */
1859 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail);
1860 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
1861 buffer_info = &tx->buffer_info[tx->frame_tail];
1862
1863 /* add extension descriptor */
1864 tx_descriptor->data1 = 0;
1865 tx_descriptor->data2 = 0;
1866 tx_descriptor->data3 = 0;
1867
1868 buffer_info->skb = NULL;
1869 buffer_info->dma_ptr = 0;
1870 buffer_info->buffer_length = 0;
1871 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE;
1872
1873 tx->frame_data0 = (frame_length & TX_DESC_DATA0_EXT_PAY_LENGTH_MASK_) |
1874 TX_DESC_DATA0_DTYPE_EXT_ |
1875 TX_DESC_DATA0_EXT_LSO_;
1876
1877 /* data0 will be programmed in one of other frame assembler functions */
1878 }
1879
lan743x_tx_frame_add_fragment(struct lan743x_tx * tx,const skb_frag_t * fragment,unsigned int frame_length)1880 static int lan743x_tx_frame_add_fragment(struct lan743x_tx *tx,
1881 const skb_frag_t *fragment,
1882 unsigned int frame_length)
1883 {
1884 /* called only from within lan743x_tx_xmit_frame
1885 * assuming tx->ring_lock has already been acquired
1886 */
1887 struct lan743x_tx_descriptor *tx_descriptor = NULL;
1888 struct lan743x_tx_buffer_info *buffer_info = NULL;
1889 struct lan743x_adapter *adapter = tx->adapter;
1890 struct device *dev = &adapter->pdev->dev;
1891 unsigned int fragment_length = 0;
1892 dma_addr_t dma_ptr;
1893
1894 fragment_length = skb_frag_size(fragment);
1895 if (!fragment_length)
1896 return 0;
1897
1898 /* wrap up previous descriptor */
1899 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
1900 tx_descriptor->data0 = cpu_to_le32(tx->frame_data0);
1901
1902 /* move to next descriptor */
1903 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail);
1904 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
1905 buffer_info = &tx->buffer_info[tx->frame_tail];
1906 dma_ptr = skb_frag_dma_map(dev, fragment,
1907 0, fragment_length,
1908 DMA_TO_DEVICE);
1909 if (dma_mapping_error(dev, dma_ptr)) {
1910 int desc_index;
1911
1912 /* cleanup all previously setup descriptors */
1913 desc_index = tx->frame_first;
1914 while (desc_index != tx->frame_tail) {
1915 lan743x_tx_release_desc(tx, desc_index, true);
1916 desc_index = lan743x_tx_next_index(tx, desc_index);
1917 }
1918 dma_wmb();
1919 tx->frame_flags &= ~TX_FRAME_FLAG_IN_PROGRESS;
1920 tx->frame_first = 0;
1921 tx->frame_data0 = 0;
1922 tx->frame_tail = 0;
1923 tx->frame_last = 0;
1924 return -ENOMEM;
1925 }
1926
1927 tx_descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(dma_ptr));
1928 tx_descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(dma_ptr));
1929 tx_descriptor->data3 = cpu_to_le32((frame_length << 16) &
1930 TX_DESC_DATA3_FRAME_LENGTH_MSS_MASK_);
1931
1932 buffer_info->skb = NULL;
1933 buffer_info->dma_ptr = dma_ptr;
1934 buffer_info->buffer_length = fragment_length;
1935 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE;
1936 buffer_info->flags |= TX_BUFFER_INFO_FLAG_SKB_FRAGMENT;
1937
1938 tx->frame_data0 = (fragment_length & TX_DESC_DATA0_BUF_LENGTH_MASK_) |
1939 TX_DESC_DATA0_DTYPE_DATA_ |
1940 TX_DESC_DATA0_FCS_;
1941
1942 /* data0 will be programmed in one of other frame assembler functions */
1943 return 0;
1944 }
1945
lan743x_tx_frame_end(struct lan743x_tx * tx,struct sk_buff * skb,bool time_stamp,bool ignore_sync)1946 static void lan743x_tx_frame_end(struct lan743x_tx *tx,
1947 struct sk_buff *skb,
1948 bool time_stamp,
1949 bool ignore_sync)
1950 {
1951 /* called only from within lan743x_tx_xmit_frame
1952 * assuming tx->ring_lock has already been acquired
1953 */
1954 struct lan743x_tx_descriptor *tx_descriptor = NULL;
1955 struct lan743x_tx_buffer_info *buffer_info = NULL;
1956 struct lan743x_adapter *adapter = tx->adapter;
1957 u32 tx_tail_flags = 0;
1958
1959 /* wrap up previous descriptor */
1960 if ((tx->frame_data0 & TX_DESC_DATA0_DTYPE_MASK_) ==
1961 TX_DESC_DATA0_DTYPE_DATA_) {
1962 tx->frame_data0 |= TX_DESC_DATA0_LS_;
1963 tx->frame_data0 |= TX_DESC_DATA0_IOC_;
1964 tx->frame_last = tx->frame_tail;
1965 }
1966
1967 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_last];
1968 buffer_info = &tx->buffer_info[tx->frame_last];
1969 buffer_info->skb = skb;
1970 if (time_stamp)
1971 buffer_info->flags |= TX_BUFFER_INFO_FLAG_TIMESTAMP_REQUESTED;
1972 if (ignore_sync)
1973 buffer_info->flags |= TX_BUFFER_INFO_FLAG_IGNORE_SYNC;
1974
1975 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail];
1976 tx_descriptor->data0 = cpu_to_le32(tx->frame_data0);
1977 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail);
1978 tx->last_tail = tx->frame_tail;
1979
1980 dma_wmb();
1981
1982 if (tx->vector_flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET)
1983 tx_tail_flags |= TX_TAIL_SET_TOP_INT_VEC_EN_;
1984 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET)
1985 tx_tail_flags |= TX_TAIL_SET_DMAC_INT_EN_ |
1986 TX_TAIL_SET_TOP_INT_EN_;
1987
1988 lan743x_csr_write(adapter, TX_TAIL(tx->channel_number),
1989 tx_tail_flags | tx->frame_tail);
1990 tx->frame_flags &= ~TX_FRAME_FLAG_IN_PROGRESS;
1991 }
1992
lan743x_tx_xmit_frame(struct lan743x_tx * tx,struct sk_buff * skb)1993 static netdev_tx_t lan743x_tx_xmit_frame(struct lan743x_tx *tx,
1994 struct sk_buff *skb)
1995 {
1996 int required_number_of_descriptors = 0;
1997 unsigned int start_frame_length = 0;
1998 netdev_tx_t retval = NETDEV_TX_OK;
1999 unsigned int frame_length = 0;
2000 unsigned int head_length = 0;
2001 unsigned long irq_flags = 0;
2002 bool do_timestamp = false;
2003 bool ignore_sync = false;
2004 struct netdev_queue *txq;
2005 int nr_frags = 0;
2006 bool gso = false;
2007 int j;
2008
2009 required_number_of_descriptors = lan743x_tx_get_desc_cnt(tx, skb);
2010
2011 spin_lock_irqsave(&tx->ring_lock, irq_flags);
2012 if (required_number_of_descriptors >
2013 lan743x_tx_get_avail_desc(tx)) {
2014 if (required_number_of_descriptors > (tx->ring_size - 1)) {
2015 dev_kfree_skb_irq(skb);
2016 } else {
2017 /* save how many descriptors we needed to restart the queue */
2018 tx->rqd_descriptors = required_number_of_descriptors;
2019 retval = NETDEV_TX_BUSY;
2020 txq = netdev_get_tx_queue(tx->adapter->netdev,
2021 tx->channel_number);
2022 netif_tx_stop_queue(txq);
2023 }
2024 goto unlock;
2025 }
2026
2027 /* space available, transmit skb */
2028 if ((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
2029 (tx->ts_flags & TX_TS_FLAG_TIMESTAMPING_ENABLED) &&
2030 (lan743x_ptp_request_tx_timestamp(tx->adapter))) {
2031 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
2032 do_timestamp = true;
2033 if (tx->ts_flags & TX_TS_FLAG_ONE_STEP_SYNC)
2034 ignore_sync = true;
2035 }
2036 head_length = skb_headlen(skb);
2037 frame_length = skb_pagelen(skb);
2038 nr_frags = skb_shinfo(skb)->nr_frags;
2039 start_frame_length = frame_length;
2040 gso = skb_is_gso(skb);
2041 if (gso) {
2042 start_frame_length = max(skb_shinfo(skb)->gso_size,
2043 (unsigned short)8);
2044 }
2045
2046 if (lan743x_tx_frame_start(tx,
2047 skb->data, head_length,
2048 start_frame_length,
2049 do_timestamp,
2050 skb->ip_summed == CHECKSUM_PARTIAL)) {
2051 dev_kfree_skb_irq(skb);
2052 goto unlock;
2053 }
2054 tx->frame_count++;
2055
2056 if (gso)
2057 lan743x_tx_frame_add_lso(tx, frame_length, nr_frags);
2058
2059 if (nr_frags <= 0)
2060 goto finish;
2061
2062 for (j = 0; j < nr_frags; j++) {
2063 const skb_frag_t *frag = &(skb_shinfo(skb)->frags[j]);
2064
2065 if (lan743x_tx_frame_add_fragment(tx, frag, frame_length)) {
2066 /* upon error no need to call
2067 * lan743x_tx_frame_end
2068 * frame assembler clean up was performed inside
2069 * lan743x_tx_frame_add_fragment
2070 */
2071 dev_kfree_skb_irq(skb);
2072 goto unlock;
2073 }
2074 }
2075
2076 finish:
2077 lan743x_tx_frame_end(tx, skb, do_timestamp, ignore_sync);
2078
2079 unlock:
2080 spin_unlock_irqrestore(&tx->ring_lock, irq_flags);
2081 return retval;
2082 }
2083
lan743x_tx_napi_poll(struct napi_struct * napi,int weight)2084 static int lan743x_tx_napi_poll(struct napi_struct *napi, int weight)
2085 {
2086 struct lan743x_tx *tx = container_of(napi, struct lan743x_tx, napi);
2087 struct lan743x_adapter *adapter = tx->adapter;
2088 unsigned long irq_flags = 0;
2089 struct netdev_queue *txq;
2090 u32 ioc_bit = 0;
2091
2092 ioc_bit = DMAC_INT_BIT_TX_IOC_(tx->channel_number);
2093 lan743x_csr_read(adapter, DMAC_INT_STS);
2094 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C)
2095 lan743x_csr_write(adapter, DMAC_INT_STS, ioc_bit);
2096 spin_lock_irqsave(&tx->ring_lock, irq_flags);
2097
2098 /* clean up tx ring */
2099 lan743x_tx_release_completed_descriptors(tx);
2100 txq = netdev_get_tx_queue(adapter->netdev, tx->channel_number);
2101 if (netif_tx_queue_stopped(txq)) {
2102 if (tx->rqd_descriptors) {
2103 if (tx->rqd_descriptors <=
2104 lan743x_tx_get_avail_desc(tx)) {
2105 tx->rqd_descriptors = 0;
2106 netif_tx_wake_queue(txq);
2107 }
2108 } else {
2109 netif_tx_wake_queue(txq);
2110 }
2111 }
2112 spin_unlock_irqrestore(&tx->ring_lock, irq_flags);
2113
2114 if (!napi_complete(napi))
2115 goto done;
2116
2117 /* enable isr */
2118 lan743x_csr_write(adapter, INT_EN_SET,
2119 INT_BIT_DMA_TX_(tx->channel_number));
2120 lan743x_csr_read(adapter, INT_STS);
2121
2122 done:
2123 return 0;
2124 }
2125
lan743x_tx_ring_cleanup(struct lan743x_tx * tx)2126 static void lan743x_tx_ring_cleanup(struct lan743x_tx *tx)
2127 {
2128 if (tx->head_cpu_ptr) {
2129 dma_free_coherent(&tx->adapter->pdev->dev,
2130 sizeof(*tx->head_cpu_ptr), tx->head_cpu_ptr,
2131 tx->head_dma_ptr);
2132 tx->head_cpu_ptr = NULL;
2133 tx->head_dma_ptr = 0;
2134 }
2135 kfree(tx->buffer_info);
2136 tx->buffer_info = NULL;
2137
2138 if (tx->ring_cpu_ptr) {
2139 dma_free_coherent(&tx->adapter->pdev->dev,
2140 tx->ring_allocation_size, tx->ring_cpu_ptr,
2141 tx->ring_dma_ptr);
2142 tx->ring_allocation_size = 0;
2143 tx->ring_cpu_ptr = NULL;
2144 tx->ring_dma_ptr = 0;
2145 }
2146 tx->ring_size = 0;
2147 }
2148
lan743x_tx_ring_init(struct lan743x_tx * tx)2149 static int lan743x_tx_ring_init(struct lan743x_tx *tx)
2150 {
2151 size_t ring_allocation_size = 0;
2152 void *cpu_ptr = NULL;
2153 dma_addr_t dma_ptr;
2154 int ret = -ENOMEM;
2155
2156 tx->ring_size = LAN743X_TX_RING_SIZE;
2157 if (tx->ring_size & ~TX_CFG_B_TX_RING_LEN_MASK_) {
2158 ret = -EINVAL;
2159 goto cleanup;
2160 }
2161 if (dma_set_mask_and_coherent(&tx->adapter->pdev->dev,
2162 DMA_BIT_MASK(64))) {
2163 dev_warn(&tx->adapter->pdev->dev,
2164 "lan743x_: No suitable DMA available\n");
2165 ret = -ENOMEM;
2166 goto cleanup;
2167 }
2168 ring_allocation_size = ALIGN(tx->ring_size *
2169 sizeof(struct lan743x_tx_descriptor),
2170 PAGE_SIZE);
2171 dma_ptr = 0;
2172 cpu_ptr = dma_alloc_coherent(&tx->adapter->pdev->dev,
2173 ring_allocation_size, &dma_ptr, GFP_KERNEL);
2174 if (!cpu_ptr) {
2175 ret = -ENOMEM;
2176 goto cleanup;
2177 }
2178
2179 tx->ring_allocation_size = ring_allocation_size;
2180 tx->ring_cpu_ptr = (struct lan743x_tx_descriptor *)cpu_ptr;
2181 tx->ring_dma_ptr = dma_ptr;
2182
2183 cpu_ptr = kzalloc_objs(*tx->buffer_info, tx->ring_size);
2184 if (!cpu_ptr) {
2185 ret = -ENOMEM;
2186 goto cleanup;
2187 }
2188 tx->buffer_info = (struct lan743x_tx_buffer_info *)cpu_ptr;
2189 dma_ptr = 0;
2190 cpu_ptr = dma_alloc_coherent(&tx->adapter->pdev->dev,
2191 sizeof(*tx->head_cpu_ptr), &dma_ptr,
2192 GFP_KERNEL);
2193 if (!cpu_ptr) {
2194 ret = -ENOMEM;
2195 goto cleanup;
2196 }
2197
2198 tx->head_cpu_ptr = cpu_ptr;
2199 tx->head_dma_ptr = dma_ptr;
2200 if (tx->head_dma_ptr & 0x3) {
2201 ret = -ENOMEM;
2202 goto cleanup;
2203 }
2204
2205 return 0;
2206
2207 cleanup:
2208 lan743x_tx_ring_cleanup(tx);
2209 return ret;
2210 }
2211
lan743x_tx_close(struct lan743x_tx * tx)2212 static void lan743x_tx_close(struct lan743x_tx *tx)
2213 {
2214 struct lan743x_adapter *adapter = tx->adapter;
2215
2216 lan743x_csr_write(adapter,
2217 DMAC_CMD,
2218 DMAC_CMD_STOP_T_(tx->channel_number));
2219 lan743x_dmac_tx_wait_till_stopped(adapter, tx->channel_number);
2220
2221 lan743x_csr_write(adapter,
2222 DMAC_INT_EN_CLR,
2223 DMAC_INT_BIT_TX_IOC_(tx->channel_number));
2224 lan743x_csr_write(adapter, INT_EN_CLR,
2225 INT_BIT_DMA_TX_(tx->channel_number));
2226 napi_disable(&tx->napi);
2227 netif_napi_del(&tx->napi);
2228
2229 lan743x_csr_write(adapter, FCT_TX_CTL,
2230 FCT_TX_CTL_DIS_(tx->channel_number));
2231 lan743x_csr_wait_for_bit(adapter, FCT_TX_CTL,
2232 FCT_TX_CTL_EN_(tx->channel_number),
2233 0, 1000, 20000, 100);
2234
2235 lan743x_tx_release_all_descriptors(tx);
2236
2237 tx->rqd_descriptors = 0;
2238
2239 lan743x_tx_ring_cleanup(tx);
2240 }
2241
lan743x_tx_open(struct lan743x_tx * tx)2242 static int lan743x_tx_open(struct lan743x_tx *tx)
2243 {
2244 struct lan743x_adapter *adapter = NULL;
2245 u32 data = 0;
2246 int ret;
2247
2248 adapter = tx->adapter;
2249 ret = lan743x_tx_ring_init(tx);
2250 if (ret)
2251 return ret;
2252
2253 /* initialize fifo */
2254 lan743x_csr_write(adapter, FCT_TX_CTL,
2255 FCT_TX_CTL_RESET_(tx->channel_number));
2256 lan743x_csr_wait_for_bit(adapter, FCT_TX_CTL,
2257 FCT_TX_CTL_RESET_(tx->channel_number),
2258 0, 1000, 20000, 100);
2259
2260 /* enable fifo */
2261 lan743x_csr_write(adapter, FCT_TX_CTL,
2262 FCT_TX_CTL_EN_(tx->channel_number));
2263
2264 /* reset tx channel */
2265 lan743x_csr_write(adapter, DMAC_CMD,
2266 DMAC_CMD_TX_SWR_(tx->channel_number));
2267 lan743x_csr_wait_for_bit(adapter, DMAC_CMD,
2268 DMAC_CMD_TX_SWR_(tx->channel_number),
2269 0, 1000, 20000, 100);
2270
2271 /* Write TX_BASE_ADDR */
2272 lan743x_csr_write(adapter,
2273 TX_BASE_ADDRH(tx->channel_number),
2274 DMA_ADDR_HIGH32(tx->ring_dma_ptr));
2275 lan743x_csr_write(adapter,
2276 TX_BASE_ADDRL(tx->channel_number),
2277 DMA_ADDR_LOW32(tx->ring_dma_ptr));
2278
2279 /* Write TX_CFG_B */
2280 data = lan743x_csr_read(adapter, TX_CFG_B(tx->channel_number));
2281 data &= ~TX_CFG_B_TX_RING_LEN_MASK_;
2282 data |= ((tx->ring_size) & TX_CFG_B_TX_RING_LEN_MASK_);
2283 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0))
2284 data |= TX_CFG_B_TDMABL_512_;
2285 lan743x_csr_write(adapter, TX_CFG_B(tx->channel_number), data);
2286
2287 /* Write TX_CFG_A */
2288 data = TX_CFG_A_TX_TMR_HPWB_SEL_IOC_ | TX_CFG_A_TX_HP_WB_EN_;
2289 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) {
2290 data |= TX_CFG_A_TX_HP_WB_ON_INT_TMR_;
2291 data |= TX_CFG_A_TX_PF_THRES_SET_(0x10);
2292 data |= TX_CFG_A_TX_PF_PRI_THRES_SET_(0x04);
2293 data |= TX_CFG_A_TX_HP_WB_THRES_SET_(0x07);
2294 }
2295 lan743x_csr_write(adapter, TX_CFG_A(tx->channel_number), data);
2296
2297 /* Write TX_HEAD_WRITEBACK_ADDR */
2298 lan743x_csr_write(adapter,
2299 TX_HEAD_WRITEBACK_ADDRH(tx->channel_number),
2300 DMA_ADDR_HIGH32(tx->head_dma_ptr));
2301 lan743x_csr_write(adapter,
2302 TX_HEAD_WRITEBACK_ADDRL(tx->channel_number),
2303 DMA_ADDR_LOW32(tx->head_dma_ptr));
2304
2305 /* set last head */
2306 tx->last_head = lan743x_csr_read(adapter, TX_HEAD(tx->channel_number));
2307
2308 /* write TX_TAIL */
2309 tx->last_tail = 0;
2310 lan743x_csr_write(adapter, TX_TAIL(tx->channel_number),
2311 (u32)(tx->last_tail));
2312 tx->vector_flags = lan743x_intr_get_vector_flags(adapter,
2313 INT_BIT_DMA_TX_
2314 (tx->channel_number));
2315 netif_napi_add_tx_weight(adapter->netdev,
2316 &tx->napi, lan743x_tx_napi_poll,
2317 NAPI_POLL_WEIGHT);
2318 napi_enable(&tx->napi);
2319
2320 data = 0;
2321 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR)
2322 data |= TX_CFG_C_TX_TOP_INT_EN_AUTO_CLR_;
2323 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR)
2324 data |= TX_CFG_C_TX_DMA_INT_STS_AUTO_CLR_;
2325 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C)
2326 data |= TX_CFG_C_TX_INT_STS_R2C_MODE_MASK_;
2327 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C)
2328 data |= TX_CFG_C_TX_INT_EN_R2C_;
2329 lan743x_csr_write(adapter, TX_CFG_C(tx->channel_number), data);
2330
2331 if (!(tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET))
2332 lan743x_csr_write(adapter, INT_EN_SET,
2333 INT_BIT_DMA_TX_(tx->channel_number));
2334 lan743x_csr_write(adapter, DMAC_INT_EN_SET,
2335 DMAC_INT_BIT_TX_IOC_(tx->channel_number));
2336
2337 /* start dmac channel */
2338 lan743x_csr_write(adapter, DMAC_CMD,
2339 DMAC_CMD_START_T_(tx->channel_number));
2340 return 0;
2341 }
2342
lan743x_rx_next_index(struct lan743x_rx * rx,int index)2343 static int lan743x_rx_next_index(struct lan743x_rx *rx, int index)
2344 {
2345 return ((++index) % rx->ring_size);
2346 }
2347
lan743x_rx_update_tail(struct lan743x_rx * rx,int index)2348 static void lan743x_rx_update_tail(struct lan743x_rx *rx, int index)
2349 {
2350 /* update the tail once per 8 descriptors */
2351 if ((index & 7) == 7)
2352 lan743x_csr_write(rx->adapter, RX_TAIL(rx->channel_number),
2353 index);
2354 }
2355
lan743x_rx_init_ring_element(struct lan743x_rx * rx,int index,gfp_t gfp)2356 static int lan743x_rx_init_ring_element(struct lan743x_rx *rx, int index,
2357 gfp_t gfp)
2358 {
2359 struct net_device *netdev = rx->adapter->netdev;
2360 struct device *dev = &rx->adapter->pdev->dev;
2361 struct lan743x_rx_buffer_info *buffer_info;
2362 unsigned int buffer_length, used_length;
2363 struct lan743x_rx_descriptor *descriptor;
2364 struct sk_buff *skb;
2365 dma_addr_t dma_ptr;
2366
2367 buffer_length = netdev->mtu + ETH_HLEN + ETH_FCS_LEN + RX_HEAD_PADDING;
2368
2369 descriptor = &rx->ring_cpu_ptr[index];
2370 buffer_info = &rx->buffer_info[index];
2371 skb = __netdev_alloc_skb(netdev, buffer_length, gfp);
2372 if (!skb)
2373 return -ENOMEM;
2374 dma_ptr = dma_map_single(dev, skb->data, buffer_length, DMA_FROM_DEVICE);
2375 if (dma_mapping_error(dev, dma_ptr)) {
2376 dev_kfree_skb_any(skb);
2377 return -ENOMEM;
2378 }
2379 if (buffer_info->dma_ptr) {
2380 /* sync used area of buffer only */
2381 if (le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_LS_)
2382 /* frame length is valid only if LS bit is set.
2383 * it's a safe upper bound for the used area in this
2384 * buffer.
2385 */
2386 used_length = min(RX_DESC_DATA0_FRAME_LENGTH_GET_
2387 (le32_to_cpu(descriptor->data0)),
2388 buffer_info->buffer_length);
2389 else
2390 used_length = buffer_info->buffer_length;
2391 dma_sync_single_for_cpu(dev, buffer_info->dma_ptr,
2392 used_length,
2393 DMA_FROM_DEVICE);
2394 dma_unmap_single_attrs(dev, buffer_info->dma_ptr,
2395 buffer_info->buffer_length,
2396 DMA_FROM_DEVICE,
2397 DMA_ATTR_SKIP_CPU_SYNC);
2398 }
2399
2400 buffer_info->skb = skb;
2401 buffer_info->dma_ptr = dma_ptr;
2402 buffer_info->buffer_length = buffer_length;
2403 descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(buffer_info->dma_ptr));
2404 descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(buffer_info->dma_ptr));
2405 descriptor->data3 = 0;
2406 descriptor->data0 = cpu_to_le32((RX_DESC_DATA0_OWN_ |
2407 (buffer_length & RX_DESC_DATA0_BUF_LENGTH_MASK_)));
2408 lan743x_rx_update_tail(rx, index);
2409
2410 return 0;
2411 }
2412
lan743x_rx_reuse_ring_element(struct lan743x_rx * rx,int index)2413 static void lan743x_rx_reuse_ring_element(struct lan743x_rx *rx, int index)
2414 {
2415 struct lan743x_rx_buffer_info *buffer_info;
2416 struct lan743x_rx_descriptor *descriptor;
2417
2418 descriptor = &rx->ring_cpu_ptr[index];
2419 buffer_info = &rx->buffer_info[index];
2420
2421 descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(buffer_info->dma_ptr));
2422 descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(buffer_info->dma_ptr));
2423 descriptor->data3 = 0;
2424 descriptor->data0 = cpu_to_le32((RX_DESC_DATA0_OWN_ |
2425 ((buffer_info->buffer_length) &
2426 RX_DESC_DATA0_BUF_LENGTH_MASK_)));
2427 lan743x_rx_update_tail(rx, index);
2428 }
2429
lan743x_rx_release_ring_element(struct lan743x_rx * rx,int index)2430 static void lan743x_rx_release_ring_element(struct lan743x_rx *rx, int index)
2431 {
2432 struct lan743x_rx_buffer_info *buffer_info;
2433 struct lan743x_rx_descriptor *descriptor;
2434
2435 descriptor = &rx->ring_cpu_ptr[index];
2436 buffer_info = &rx->buffer_info[index];
2437
2438 memset(descriptor, 0, sizeof(*descriptor));
2439
2440 if (buffer_info->dma_ptr) {
2441 dma_unmap_single(&rx->adapter->pdev->dev,
2442 buffer_info->dma_ptr,
2443 buffer_info->buffer_length,
2444 DMA_FROM_DEVICE);
2445 buffer_info->dma_ptr = 0;
2446 }
2447
2448 if (buffer_info->skb) {
2449 dev_kfree_skb(buffer_info->skb);
2450 buffer_info->skb = NULL;
2451 }
2452
2453 memset(buffer_info, 0, sizeof(*buffer_info));
2454 }
2455
2456 static struct sk_buff *
lan743x_rx_trim_skb(struct sk_buff * skb,int frame_length)2457 lan743x_rx_trim_skb(struct sk_buff *skb, int frame_length)
2458 {
2459 if (skb_linearize(skb)) {
2460 dev_kfree_skb_irq(skb);
2461 return NULL;
2462 }
2463 frame_length = max_t(int, 0, frame_length - ETH_FCS_LEN);
2464 if (skb->len > frame_length) {
2465 skb->tail -= skb->len - frame_length;
2466 skb->len = frame_length;
2467 }
2468 return skb;
2469 }
2470
lan743x_rx_process_buffer(struct lan743x_rx * rx)2471 static int lan743x_rx_process_buffer(struct lan743x_rx *rx)
2472 {
2473 int current_head_index = le32_to_cpu(*rx->head_cpu_ptr);
2474 struct lan743x_rx_descriptor *descriptor, *desc_ext;
2475 struct net_device *netdev = rx->adapter->netdev;
2476 int result = RX_PROCESS_RESULT_NOTHING_TO_DO;
2477 struct lan743x_rx_buffer_info *buffer_info;
2478 int frame_length, buffer_length;
2479 bool is_ice, is_tce, is_icsm;
2480 int extension_index = -1;
2481 bool is_last, is_first;
2482 struct sk_buff *skb;
2483
2484 if (current_head_index < 0 || current_head_index >= rx->ring_size)
2485 goto done;
2486
2487 if (rx->last_head < 0 || rx->last_head >= rx->ring_size)
2488 goto done;
2489
2490 if (rx->last_head == current_head_index)
2491 goto done;
2492
2493 descriptor = &rx->ring_cpu_ptr[rx->last_head];
2494 if (le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_OWN_)
2495 goto done;
2496 buffer_info = &rx->buffer_info[rx->last_head];
2497
2498 is_last = le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_LS_;
2499 is_first = le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_FS_;
2500
2501 if (is_last && le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_EXT_) {
2502 /* extension is expected to follow */
2503 int index = lan743x_rx_next_index(rx, rx->last_head);
2504
2505 if (index == current_head_index)
2506 /* extension not yet available */
2507 goto done;
2508 desc_ext = &rx->ring_cpu_ptr[index];
2509 if (le32_to_cpu(desc_ext->data0) & RX_DESC_DATA0_OWN_)
2510 /* extension not yet available */
2511 goto done;
2512 if (!(le32_to_cpu(desc_ext->data0) & RX_DESC_DATA0_EXT_))
2513 goto move_forward;
2514 extension_index = index;
2515 }
2516
2517 /* Only the last buffer in a multi-buffer frame contains the total frame
2518 * length. The chip occasionally sends more buffers than strictly
2519 * required to reach the total frame length.
2520 * Handle this by adding all buffers to the skb in their entirety.
2521 * Once the real frame length is known, trim the skb.
2522 */
2523 frame_length =
2524 RX_DESC_DATA0_FRAME_LENGTH_GET_(le32_to_cpu(descriptor->data0));
2525 buffer_length = buffer_info->buffer_length;
2526 is_ice = le32_to_cpu(descriptor->data1) & RX_DESC_DATA1_STATUS_ICE_;
2527 is_tce = le32_to_cpu(descriptor->data1) & RX_DESC_DATA1_STATUS_TCE_;
2528 is_icsm = le32_to_cpu(descriptor->data1) & RX_DESC_DATA1_STATUS_ICSM_;
2529
2530 netdev_dbg(netdev, "%s%schunk: %d/%d",
2531 is_first ? "first " : " ",
2532 is_last ? "last " : " ",
2533 frame_length, buffer_length);
2534
2535 /* save existing skb, allocate new skb and map to dma */
2536 skb = buffer_info->skb;
2537 if (lan743x_rx_init_ring_element(rx, rx->last_head, GFP_ATOMIC)) {
2538 /* failed to allocate next skb.
2539 * Memory is very low.
2540 * Drop this packet and reuse buffer.
2541 */
2542 lan743x_rx_reuse_ring_element(rx, rx->last_head);
2543 /* drop packet that was being assembled */
2544 dev_kfree_skb_irq(rx->skb_head);
2545 rx->skb_head = NULL;
2546 goto process_extension;
2547 }
2548
2549 /* add buffers to skb via skb->frag_list */
2550 if (is_first) {
2551 skb_reserve(skb, RX_HEAD_PADDING);
2552 skb_put(skb, buffer_length - RX_HEAD_PADDING);
2553 if (rx->skb_head)
2554 dev_kfree_skb_irq(rx->skb_head);
2555 rx->skb_head = skb;
2556 } else if (rx->skb_head) {
2557 skb_put(skb, buffer_length);
2558 if (skb_shinfo(rx->skb_head)->frag_list)
2559 rx->skb_tail->next = skb;
2560 else
2561 skb_shinfo(rx->skb_head)->frag_list = skb;
2562 rx->skb_tail = skb;
2563 rx->skb_head->len += skb->len;
2564 rx->skb_head->data_len += skb->len;
2565 rx->skb_head->truesize += skb->truesize;
2566 } else {
2567 /* packet to assemble has already been dropped because one or
2568 * more of its buffers could not be allocated
2569 */
2570 netdev_dbg(netdev, "drop buffer intended for dropped packet");
2571 dev_kfree_skb_irq(skb);
2572 }
2573
2574 process_extension:
2575 if (extension_index >= 0) {
2576 u32 ts_sec;
2577 u32 ts_nsec;
2578
2579 ts_sec = le32_to_cpu(desc_ext->data1);
2580 ts_nsec = (le32_to_cpu(desc_ext->data2) &
2581 RX_DESC_DATA2_TS_NS_MASK_);
2582 if (rx->skb_head)
2583 skb_hwtstamps(rx->skb_head)->hwtstamp =
2584 ktime_set(ts_sec, ts_nsec);
2585 lan743x_rx_reuse_ring_element(rx, extension_index);
2586 rx->last_head = extension_index;
2587 netdev_dbg(netdev, "process extension");
2588 }
2589
2590 if (is_last && rx->skb_head)
2591 rx->skb_head = lan743x_rx_trim_skb(rx->skb_head, frame_length);
2592
2593 if (is_last && rx->skb_head) {
2594 rx->skb_head->protocol = eth_type_trans(rx->skb_head,
2595 rx->adapter->netdev);
2596 if (rx->adapter->netdev->features & NETIF_F_RXCSUM) {
2597 if (!is_ice && !is_tce && !is_icsm)
2598 skb->ip_summed = CHECKSUM_UNNECESSARY;
2599 }
2600 netdev_dbg(netdev, "sending %d byte frame to OS",
2601 rx->skb_head->len);
2602 napi_gro_receive(&rx->napi, rx->skb_head);
2603 rx->skb_head = NULL;
2604 }
2605
2606 move_forward:
2607 /* push tail and head forward */
2608 rx->last_tail = rx->last_head;
2609 rx->last_head = lan743x_rx_next_index(rx, rx->last_head);
2610 result = RX_PROCESS_RESULT_BUFFER_RECEIVED;
2611 done:
2612 return result;
2613 }
2614
lan743x_rx_napi_poll(struct napi_struct * napi,int weight)2615 static int lan743x_rx_napi_poll(struct napi_struct *napi, int weight)
2616 {
2617 struct lan743x_rx *rx = container_of(napi, struct lan743x_rx, napi);
2618 struct lan743x_adapter *adapter = rx->adapter;
2619 int result = RX_PROCESS_RESULT_NOTHING_TO_DO;
2620 u32 rx_tail_flags = 0;
2621 int count;
2622
2623 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C) {
2624 /* clear int status bit before reading packet */
2625 lan743x_csr_write(adapter, DMAC_INT_STS,
2626 DMAC_INT_BIT_RXFRM_(rx->channel_number));
2627 }
2628 for (count = 0; count < weight; count++) {
2629 result = lan743x_rx_process_buffer(rx);
2630 if (result == RX_PROCESS_RESULT_NOTHING_TO_DO)
2631 break;
2632 }
2633 rx->frame_count += count;
2634 if (count == weight || result == RX_PROCESS_RESULT_BUFFER_RECEIVED)
2635 return weight;
2636
2637 if (!napi_complete_done(napi, count))
2638 return count;
2639
2640 /* re-arm interrupts, must write to rx tail on some chip variants */
2641 if (rx->vector_flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET)
2642 rx_tail_flags |= RX_TAIL_SET_TOP_INT_VEC_EN_;
2643 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET) {
2644 rx_tail_flags |= RX_TAIL_SET_TOP_INT_EN_;
2645 } else {
2646 lan743x_csr_write(adapter, INT_EN_SET,
2647 INT_BIT_DMA_RX_(rx->channel_number));
2648 }
2649
2650 if (rx_tail_flags)
2651 lan743x_csr_write(adapter, RX_TAIL(rx->channel_number),
2652 rx_tail_flags | rx->last_tail);
2653
2654 return count;
2655 }
2656
lan743x_rx_ring_cleanup(struct lan743x_rx * rx)2657 static void lan743x_rx_ring_cleanup(struct lan743x_rx *rx)
2658 {
2659 if (rx->buffer_info && rx->ring_cpu_ptr) {
2660 int index;
2661
2662 for (index = 0; index < rx->ring_size; index++)
2663 lan743x_rx_release_ring_element(rx, index);
2664 }
2665
2666 if (rx->head_cpu_ptr) {
2667 dma_free_coherent(&rx->adapter->pdev->dev,
2668 sizeof(*rx->head_cpu_ptr), rx->head_cpu_ptr,
2669 rx->head_dma_ptr);
2670 rx->head_cpu_ptr = NULL;
2671 rx->head_dma_ptr = 0;
2672 }
2673
2674 kfree(rx->buffer_info);
2675 rx->buffer_info = NULL;
2676
2677 if (rx->ring_cpu_ptr) {
2678 dma_free_coherent(&rx->adapter->pdev->dev,
2679 rx->ring_allocation_size, rx->ring_cpu_ptr,
2680 rx->ring_dma_ptr);
2681 rx->ring_allocation_size = 0;
2682 rx->ring_cpu_ptr = NULL;
2683 rx->ring_dma_ptr = 0;
2684 }
2685
2686 rx->ring_size = 0;
2687 rx->last_head = 0;
2688 }
2689
lan743x_rx_ring_init(struct lan743x_rx * rx)2690 static int lan743x_rx_ring_init(struct lan743x_rx *rx)
2691 {
2692 size_t ring_allocation_size = 0;
2693 dma_addr_t dma_ptr = 0;
2694 void *cpu_ptr = NULL;
2695 int ret = -ENOMEM;
2696 int index = 0;
2697
2698 rx->ring_size = LAN743X_RX_RING_SIZE;
2699 if (rx->ring_size <= 1) {
2700 ret = -EINVAL;
2701 goto cleanup;
2702 }
2703 if (rx->ring_size & ~RX_CFG_B_RX_RING_LEN_MASK_) {
2704 ret = -EINVAL;
2705 goto cleanup;
2706 }
2707 if (dma_set_mask_and_coherent(&rx->adapter->pdev->dev,
2708 DMA_BIT_MASK(64))) {
2709 dev_warn(&rx->adapter->pdev->dev,
2710 "lan743x_: No suitable DMA available\n");
2711 ret = -ENOMEM;
2712 goto cleanup;
2713 }
2714 ring_allocation_size = ALIGN(rx->ring_size *
2715 sizeof(struct lan743x_rx_descriptor),
2716 PAGE_SIZE);
2717 dma_ptr = 0;
2718 cpu_ptr = dma_alloc_coherent(&rx->adapter->pdev->dev,
2719 ring_allocation_size, &dma_ptr, GFP_KERNEL);
2720 if (!cpu_ptr) {
2721 ret = -ENOMEM;
2722 goto cleanup;
2723 }
2724 rx->ring_allocation_size = ring_allocation_size;
2725 rx->ring_cpu_ptr = (struct lan743x_rx_descriptor *)cpu_ptr;
2726 rx->ring_dma_ptr = dma_ptr;
2727
2728 cpu_ptr = kzalloc_objs(*rx->buffer_info, rx->ring_size);
2729 if (!cpu_ptr) {
2730 ret = -ENOMEM;
2731 goto cleanup;
2732 }
2733 rx->buffer_info = (struct lan743x_rx_buffer_info *)cpu_ptr;
2734 dma_ptr = 0;
2735 cpu_ptr = dma_alloc_coherent(&rx->adapter->pdev->dev,
2736 sizeof(*rx->head_cpu_ptr), &dma_ptr,
2737 GFP_KERNEL);
2738 if (!cpu_ptr) {
2739 ret = -ENOMEM;
2740 goto cleanup;
2741 }
2742
2743 rx->head_cpu_ptr = cpu_ptr;
2744 rx->head_dma_ptr = dma_ptr;
2745 if (rx->head_dma_ptr & 0x3) {
2746 ret = -ENOMEM;
2747 goto cleanup;
2748 }
2749
2750 rx->last_head = 0;
2751 for (index = 0; index < rx->ring_size; index++) {
2752 ret = lan743x_rx_init_ring_element(rx, index, GFP_KERNEL);
2753 if (ret)
2754 goto cleanup;
2755 }
2756 return 0;
2757
2758 cleanup:
2759 netif_warn(rx->adapter, ifup, rx->adapter->netdev,
2760 "Error allocating memory for LAN743x\n");
2761
2762 lan743x_rx_ring_cleanup(rx);
2763 return ret;
2764 }
2765
lan743x_rx_close(struct lan743x_rx * rx)2766 static void lan743x_rx_close(struct lan743x_rx *rx)
2767 {
2768 struct lan743x_adapter *adapter = rx->adapter;
2769
2770 lan743x_csr_write(adapter, FCT_RX_CTL,
2771 FCT_RX_CTL_DIS_(rx->channel_number));
2772 lan743x_csr_wait_for_bit(adapter, FCT_RX_CTL,
2773 FCT_RX_CTL_EN_(rx->channel_number),
2774 0, 1000, 20000, 100);
2775
2776 lan743x_csr_write(adapter, DMAC_CMD,
2777 DMAC_CMD_STOP_R_(rx->channel_number));
2778 lan743x_dmac_rx_wait_till_stopped(adapter, rx->channel_number);
2779
2780 lan743x_csr_write(adapter, DMAC_INT_EN_CLR,
2781 DMAC_INT_BIT_RXFRM_(rx->channel_number));
2782 lan743x_csr_write(adapter, INT_EN_CLR,
2783 INT_BIT_DMA_RX_(rx->channel_number));
2784 napi_disable(&rx->napi);
2785
2786 netif_napi_del(&rx->napi);
2787
2788 lan743x_rx_ring_cleanup(rx);
2789 }
2790
lan743x_rx_open(struct lan743x_rx * rx)2791 static int lan743x_rx_open(struct lan743x_rx *rx)
2792 {
2793 struct lan743x_adapter *adapter = rx->adapter;
2794 u32 data = 0;
2795 int ret;
2796
2797 rx->frame_count = 0;
2798 ret = lan743x_rx_ring_init(rx);
2799 if (ret)
2800 goto return_error;
2801
2802 netif_napi_add(adapter->netdev, &rx->napi, lan743x_rx_napi_poll);
2803
2804 lan743x_csr_write(adapter, DMAC_CMD,
2805 DMAC_CMD_RX_SWR_(rx->channel_number));
2806 lan743x_csr_wait_for_bit(adapter, DMAC_CMD,
2807 DMAC_CMD_RX_SWR_(rx->channel_number),
2808 0, 1000, 20000, 100);
2809
2810 /* set ring base address */
2811 lan743x_csr_write(adapter,
2812 RX_BASE_ADDRH(rx->channel_number),
2813 DMA_ADDR_HIGH32(rx->ring_dma_ptr));
2814 lan743x_csr_write(adapter,
2815 RX_BASE_ADDRL(rx->channel_number),
2816 DMA_ADDR_LOW32(rx->ring_dma_ptr));
2817
2818 /* set rx write back address */
2819 lan743x_csr_write(adapter,
2820 RX_HEAD_WRITEBACK_ADDRH(rx->channel_number),
2821 DMA_ADDR_HIGH32(rx->head_dma_ptr));
2822 lan743x_csr_write(adapter,
2823 RX_HEAD_WRITEBACK_ADDRL(rx->channel_number),
2824 DMA_ADDR_LOW32(rx->head_dma_ptr));
2825 data = RX_CFG_A_RX_HP_WB_EN_;
2826 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) {
2827 data |= (RX_CFG_A_RX_WB_ON_INT_TMR_ |
2828 RX_CFG_A_RX_WB_THRES_SET_(0x7) |
2829 RX_CFG_A_RX_PF_THRES_SET_(16) |
2830 RX_CFG_A_RX_PF_PRI_THRES_SET_(4));
2831 }
2832
2833 /* set RX_CFG_A */
2834 lan743x_csr_write(adapter,
2835 RX_CFG_A(rx->channel_number), data);
2836
2837 /* set RX_CFG_B */
2838 data = lan743x_csr_read(adapter, RX_CFG_B(rx->channel_number));
2839 data &= ~RX_CFG_B_RX_PAD_MASK_;
2840 if (!RX_HEAD_PADDING)
2841 data |= RX_CFG_B_RX_PAD_0_;
2842 else
2843 data |= RX_CFG_B_RX_PAD_2_;
2844 data &= ~RX_CFG_B_RX_RING_LEN_MASK_;
2845 data |= ((rx->ring_size) & RX_CFG_B_RX_RING_LEN_MASK_);
2846 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0))
2847 data |= RX_CFG_B_RDMABL_512_;
2848
2849 lan743x_csr_write(adapter, RX_CFG_B(rx->channel_number), data);
2850 rx->vector_flags = lan743x_intr_get_vector_flags(adapter,
2851 INT_BIT_DMA_RX_
2852 (rx->channel_number));
2853
2854 /* set RX_CFG_C */
2855 data = 0;
2856 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR)
2857 data |= RX_CFG_C_RX_TOP_INT_EN_AUTO_CLR_;
2858 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR)
2859 data |= RX_CFG_C_RX_DMA_INT_STS_AUTO_CLR_;
2860 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C)
2861 data |= RX_CFG_C_RX_INT_STS_R2C_MODE_MASK_;
2862 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C)
2863 data |= RX_CFG_C_RX_INT_EN_R2C_;
2864 lan743x_csr_write(adapter, RX_CFG_C(rx->channel_number), data);
2865
2866 rx->last_tail = ((u32)(rx->ring_size - 1));
2867 lan743x_csr_write(adapter, RX_TAIL(rx->channel_number),
2868 rx->last_tail);
2869 rx->last_head = lan743x_csr_read(adapter, RX_HEAD(rx->channel_number));
2870 if (rx->last_head) {
2871 ret = -EIO;
2872 goto napi_delete;
2873 }
2874
2875 napi_enable(&rx->napi);
2876
2877 lan743x_csr_write(adapter, INT_EN_SET,
2878 INT_BIT_DMA_RX_(rx->channel_number));
2879 lan743x_csr_write(adapter, DMAC_INT_STS,
2880 DMAC_INT_BIT_RXFRM_(rx->channel_number));
2881 lan743x_csr_write(adapter, DMAC_INT_EN_SET,
2882 DMAC_INT_BIT_RXFRM_(rx->channel_number));
2883 lan743x_csr_write(adapter, DMAC_CMD,
2884 DMAC_CMD_START_R_(rx->channel_number));
2885
2886 /* initialize fifo */
2887 lan743x_csr_write(adapter, FCT_RX_CTL,
2888 FCT_RX_CTL_RESET_(rx->channel_number));
2889 lan743x_csr_wait_for_bit(adapter, FCT_RX_CTL,
2890 FCT_RX_CTL_RESET_(rx->channel_number),
2891 0, 1000, 20000, 100);
2892 lan743x_csr_write(adapter, FCT_FLOW(rx->channel_number),
2893 FCT_FLOW_CTL_REQ_EN_ |
2894 FCT_FLOW_CTL_ON_THRESHOLD_SET_(0x2A) |
2895 FCT_FLOW_CTL_OFF_THRESHOLD_SET_(0xA));
2896
2897 /* enable fifo */
2898 lan743x_csr_write(adapter, FCT_RX_CTL,
2899 FCT_RX_CTL_EN_(rx->channel_number));
2900 return 0;
2901
2902 napi_delete:
2903 netif_napi_del(&rx->napi);
2904 lan743x_rx_ring_cleanup(rx);
2905
2906 return_error:
2907 return ret;
2908 }
2909
lan743x_phylink_sgmii_config(struct lan743x_adapter * adapter)2910 static int lan743x_phylink_sgmii_config(struct lan743x_adapter *adapter)
2911 {
2912 u32 sgmii_ctl;
2913 int ret;
2914
2915 ret = lan743x_get_lsd(SPEED_1000, DUPLEX_FULL,
2916 MASTER_SLAVE_STATE_MASTER);
2917 if (ret < 0) {
2918 netif_err(adapter, drv, adapter->netdev,
2919 "error %d link-speed-duplex(LSD) invalid\n", ret);
2920 return ret;
2921 }
2922
2923 adapter->sgmii_lsd = ret;
2924 netif_dbg(adapter, drv, adapter->netdev,
2925 "Link Speed Duplex (lsd) : 0x%X\n", adapter->sgmii_lsd);
2926
2927 /* LINK_STATUS_SOURCE from the External PHY via SGMII */
2928 sgmii_ctl = lan743x_csr_read(adapter, SGMII_CTL);
2929 sgmii_ctl &= ~SGMII_CTL_LINK_STATUS_SOURCE_;
2930 lan743x_csr_write(adapter, SGMII_CTL, sgmii_ctl);
2931
2932 ret = lan743x_serdes_clock_and_aneg_update(adapter);
2933 if (ret < 0) {
2934 netif_err(adapter, drv, adapter->netdev,
2935 "error %d sgmii aneg update failed\n", ret);
2936 return ret;
2937 }
2938
2939 return lan743x_pcs_power_reset(adapter);
2940 }
2941
lan743x_phylink_1000basex_config(struct lan743x_adapter * adapter)2942 static int lan743x_phylink_1000basex_config(struct lan743x_adapter *adapter)
2943 {
2944 u32 sgmii_ctl;
2945 int ret;
2946
2947 ret = lan743x_get_lsd(SPEED_1000, DUPLEX_FULL,
2948 MASTER_SLAVE_STATE_MASTER);
2949 if (ret < 0) {
2950 netif_err(adapter, drv, adapter->netdev,
2951 "error %d link-speed-duplex(LSD) invalid\n", ret);
2952 return ret;
2953 }
2954
2955 adapter->sgmii_lsd = ret;
2956 netif_dbg(adapter, drv, adapter->netdev,
2957 "Link Speed Duplex (lsd) : 0x%X\n", adapter->sgmii_lsd);
2958
2959 /* LINK_STATUS_SOURCE from 1000BASE-X PCS link status */
2960 sgmii_ctl = lan743x_csr_read(adapter, SGMII_CTL);
2961 sgmii_ctl |= SGMII_CTL_LINK_STATUS_SOURCE_;
2962 lan743x_csr_write(adapter, SGMII_CTL, sgmii_ctl);
2963
2964 ret = lan743x_serdes_clock_and_aneg_update(adapter);
2965 if (ret < 0) {
2966 netif_err(adapter, drv, adapter->netdev,
2967 "error %d 1000basex aneg update failed\n", ret);
2968 return ret;
2969 }
2970
2971 return lan743x_pcs_power_reset(adapter);
2972 }
2973
lan743x_phylink_2500basex_config(struct lan743x_adapter * adapter)2974 static int lan743x_phylink_2500basex_config(struct lan743x_adapter *adapter)
2975 {
2976 u32 sgmii_ctl;
2977 int ret;
2978
2979 ret = lan743x_get_lsd(SPEED_2500, DUPLEX_FULL,
2980 MASTER_SLAVE_STATE_MASTER);
2981 if (ret < 0) {
2982 netif_err(adapter, drv, adapter->netdev,
2983 "error %d link-speed-duplex(LSD) invalid\n", ret);
2984 return ret;
2985 }
2986
2987 adapter->sgmii_lsd = ret;
2988 netif_dbg(adapter, drv, adapter->netdev,
2989 "Link Speed Duplex (lsd) : 0x%X\n", adapter->sgmii_lsd);
2990
2991 /* LINK_STATUS_SOURCE from 2500BASE-X PCS link status */
2992 sgmii_ctl = lan743x_csr_read(adapter, SGMII_CTL);
2993 sgmii_ctl |= SGMII_CTL_LINK_STATUS_SOURCE_;
2994 lan743x_csr_write(adapter, SGMII_CTL, sgmii_ctl);
2995
2996 ret = lan743x_serdes_clock_and_aneg_update(adapter);
2997 if (ret < 0) {
2998 netif_err(adapter, drv, adapter->netdev,
2999 "error %d 2500basex aneg update failed\n", ret);
3000 return ret;
3001 }
3002
3003 return lan743x_pcs_power_reset(adapter);
3004 }
3005
lan743x_mac_eee_enable(struct lan743x_adapter * adapter,bool enable)3006 static void lan743x_mac_eee_enable(struct lan743x_adapter *adapter, bool enable)
3007 {
3008 u32 mac_cr;
3009
3010 mac_cr = lan743x_csr_read(adapter, MAC_CR);
3011 if (enable)
3012 mac_cr |= MAC_CR_EEE_EN_;
3013 else
3014 mac_cr &= ~MAC_CR_EEE_EN_;
3015 lan743x_csr_write(adapter, MAC_CR, mac_cr);
3016 }
3017
lan743x_phylink_mac_config(struct phylink_config * config,unsigned int link_an_mode,const struct phylink_link_state * state)3018 static void lan743x_phylink_mac_config(struct phylink_config *config,
3019 unsigned int link_an_mode,
3020 const struct phylink_link_state *state)
3021 {
3022 struct net_device *netdev = to_net_dev(config->dev);
3023 struct lan743x_adapter *adapter = netdev_priv(netdev);
3024 int ret;
3025
3026 switch (state->interface) {
3027 case PHY_INTERFACE_MODE_2500BASEX:
3028 ret = lan743x_phylink_2500basex_config(adapter);
3029 if (ret < 0)
3030 netif_err(adapter, drv, adapter->netdev,
3031 "2500BASEX config failed. Error %d\n", ret);
3032 else
3033 netif_dbg(adapter, drv, adapter->netdev,
3034 "2500BASEX mode selected and configured\n");
3035 break;
3036 case PHY_INTERFACE_MODE_1000BASEX:
3037 ret = lan743x_phylink_1000basex_config(adapter);
3038 if (ret < 0)
3039 netif_err(adapter, drv, adapter->netdev,
3040 "1000BASEX config failed. Error %d\n", ret);
3041 else
3042 netif_dbg(adapter, drv, adapter->netdev,
3043 "1000BASEX mode selected and configured\n");
3044 break;
3045 case PHY_INTERFACE_MODE_SGMII:
3046 ret = lan743x_phylink_sgmii_config(adapter);
3047 if (ret < 0)
3048 netif_err(adapter, drv, adapter->netdev,
3049 "SGMII config failed. Error %d\n", ret);
3050 else
3051 netif_dbg(adapter, drv, adapter->netdev,
3052 "SGMII mode selected and configured\n");
3053 break;
3054 default:
3055 netif_dbg(adapter, drv, adapter->netdev,
3056 "RGMII/GMII/MII(0x%X) mode enable\n",
3057 state->interface);
3058 break;
3059 }
3060 }
3061
lan743x_phylink_mac_link_down(struct phylink_config * config,unsigned int link_an_mode,phy_interface_t interface)3062 static void lan743x_phylink_mac_link_down(struct phylink_config *config,
3063 unsigned int link_an_mode,
3064 phy_interface_t interface)
3065 {
3066 struct net_device *netdev = to_net_dev(config->dev);
3067
3068 netif_tx_stop_all_queues(netdev);
3069 }
3070
lan743x_phylink_mac_link_up(struct phylink_config * config,struct phy_device * phydev,unsigned int link_an_mode,phy_interface_t interface,int speed,int duplex,bool tx_pause,bool rx_pause)3071 static void lan743x_phylink_mac_link_up(struct phylink_config *config,
3072 struct phy_device *phydev,
3073 unsigned int link_an_mode,
3074 phy_interface_t interface,
3075 int speed, int duplex,
3076 bool tx_pause, bool rx_pause)
3077 {
3078 struct net_device *netdev = to_net_dev(config->dev);
3079 struct lan743x_adapter *adapter = netdev_priv(netdev);
3080 int mac_cr;
3081 u8 cap;
3082
3083 mac_cr = lan743x_csr_read(adapter, MAC_CR);
3084 /* Pre-initialize register bits.
3085 * Resulting value corresponds to SPEED_10
3086 */
3087 mac_cr &= ~(MAC_CR_CFG_H_ | MAC_CR_CFG_L_);
3088 if (speed == SPEED_2500)
3089 mac_cr |= MAC_CR_CFG_H_ | MAC_CR_CFG_L_;
3090 else if (speed == SPEED_1000)
3091 mac_cr |= MAC_CR_CFG_H_;
3092 else if (speed == SPEED_100)
3093 mac_cr |= MAC_CR_CFG_L_;
3094
3095 if (duplex == DUPLEX_FULL)
3096 mac_cr |= MAC_CR_DPX_;
3097 else
3098 mac_cr &= ~MAC_CR_DPX_;
3099
3100 lan743x_csr_write(adapter, MAC_CR, mac_cr);
3101
3102 lan743x_ptp_update_latency(adapter, speed);
3103
3104 /* Flow Control operation */
3105 cap = 0;
3106 if (tx_pause)
3107 cap |= FLOW_CTRL_TX;
3108 if (rx_pause)
3109 cap |= FLOW_CTRL_RX;
3110
3111 lan743x_mac_flow_ctrl_set_enables(adapter,
3112 cap & FLOW_CTRL_TX,
3113 cap & FLOW_CTRL_RX);
3114
3115 netif_tx_wake_all_queues(netdev);
3116 }
3117
lan743x_mac_disable_tx_lpi(struct phylink_config * config)3118 static void lan743x_mac_disable_tx_lpi(struct phylink_config *config)
3119 {
3120 struct net_device *netdev = to_net_dev(config->dev);
3121 struct lan743x_adapter *adapter = netdev_priv(netdev);
3122
3123 lan743x_mac_eee_enable(adapter, false);
3124 }
3125
lan743x_mac_enable_tx_lpi(struct phylink_config * config,u32 timer,bool tx_clk_stop)3126 static int lan743x_mac_enable_tx_lpi(struct phylink_config *config, u32 timer,
3127 bool tx_clk_stop)
3128 {
3129 struct net_device *netdev = to_net_dev(config->dev);
3130 struct lan743x_adapter *adapter = netdev_priv(netdev);
3131
3132 /* Software should only change this field when Energy Efficient
3133 * Ethernet Enable (EEEEN) is cleared. We ensure that by clearing
3134 * EEEEN during probe, and phylink itself guarantees that
3135 * mac_disable_tx_lpi() will have been previously called.
3136 */
3137 lan743x_csr_write(adapter, MAC_EEE_TX_LPI_REQ_DLY_CNT, timer);
3138 lan743x_mac_eee_enable(adapter, true);
3139
3140 return 0;
3141 }
3142
3143 static const struct phylink_mac_ops lan743x_phylink_mac_ops = {
3144 .mac_config = lan743x_phylink_mac_config,
3145 .mac_link_down = lan743x_phylink_mac_link_down,
3146 .mac_link_up = lan743x_phylink_mac_link_up,
3147 .mac_disable_tx_lpi = lan743x_mac_disable_tx_lpi,
3148 .mac_enable_tx_lpi = lan743x_mac_enable_tx_lpi,
3149 };
3150
lan743x_phylink_create(struct lan743x_adapter * adapter)3151 static int lan743x_phylink_create(struct lan743x_adapter *adapter)
3152 {
3153 struct net_device *netdev = adapter->netdev;
3154 struct phylink *pl;
3155
3156 adapter->phylink_config.dev = &netdev->dev;
3157 adapter->phylink_config.type = PHYLINK_NETDEV;
3158 adapter->phylink_config.mac_managed_pm = false;
3159
3160 adapter->phylink_config.mac_capabilities = MAC_ASYM_PAUSE |
3161 MAC_SYM_PAUSE | MAC_10 | MAC_100 | MAC_1000FD;
3162 adapter->phylink_config.lpi_capabilities = MAC_100FD | MAC_1000FD;
3163 adapter->phylink_config.lpi_timer_default =
3164 lan743x_csr_read(adapter, MAC_EEE_TX_LPI_REQ_DLY_CNT);
3165
3166 lan743x_phy_interface_select(adapter);
3167
3168 switch (adapter->phy_interface) {
3169 case PHY_INTERFACE_MODE_SGMII:
3170 __set_bit(PHY_INTERFACE_MODE_SGMII,
3171 adapter->phylink_config.supported_interfaces);
3172 __set_bit(PHY_INTERFACE_MODE_1000BASEX,
3173 adapter->phylink_config.supported_interfaces);
3174 __set_bit(PHY_INTERFACE_MODE_2500BASEX,
3175 adapter->phylink_config.supported_interfaces);
3176 adapter->phylink_config.mac_capabilities |= MAC_2500FD;
3177 break;
3178 case PHY_INTERFACE_MODE_GMII:
3179 __set_bit(PHY_INTERFACE_MODE_GMII,
3180 adapter->phylink_config.supported_interfaces);
3181 break;
3182 case PHY_INTERFACE_MODE_MII:
3183 __set_bit(PHY_INTERFACE_MODE_MII,
3184 adapter->phylink_config.supported_interfaces);
3185 break;
3186 default:
3187 phy_interface_set_rgmii(adapter->phylink_config.supported_interfaces);
3188 }
3189
3190 memcpy(adapter->phylink_config.lpi_interfaces,
3191 adapter->phylink_config.supported_interfaces,
3192 sizeof(adapter->phylink_config.lpi_interfaces));
3193
3194 pl = phylink_create(&adapter->phylink_config, NULL,
3195 adapter->phy_interface, &lan743x_phylink_mac_ops);
3196
3197 if (IS_ERR(pl)) {
3198 netdev_err(netdev, "Could not create phylink (%pe)\n", pl);
3199 return PTR_ERR(pl);
3200 }
3201
3202 adapter->phylink = pl;
3203 netdev_dbg(netdev, "lan743x phylink created");
3204
3205 return 0;
3206 }
3207
lan743x_phy_handle_exists(struct device_node * dn)3208 static bool lan743x_phy_handle_exists(struct device_node *dn)
3209 {
3210 dn = of_parse_phandle(dn, "phy-handle", 0);
3211 of_node_put(dn);
3212 return dn != NULL;
3213 }
3214
lan743x_phylink_connect(struct lan743x_adapter * adapter)3215 static int lan743x_phylink_connect(struct lan743x_adapter *adapter)
3216 {
3217 struct device_node *dn = adapter->pdev->dev.of_node;
3218 struct net_device *dev = adapter->netdev;
3219 struct phy_device *phydev;
3220 int ret;
3221
3222 if (dn)
3223 ret = phylink_of_phy_connect(adapter->phylink, dn, 0);
3224
3225 if (!dn || (ret && !lan743x_phy_handle_exists(dn))) {
3226 phydev = phy_find_first(adapter->mdiobus);
3227 if (phydev) {
3228 /* attach the mac to the phy */
3229 ret = phylink_connect_phy(adapter->phylink, phydev);
3230 } else if (((adapter->csr.id_rev & ID_REV_ID_MASK_) ==
3231 ID_REV_ID_LAN7431_) || adapter->is_pci11x1x) {
3232 struct phylink_link_state state;
3233 unsigned long caps;
3234
3235 caps = adapter->phylink_config.mac_capabilities;
3236 if (caps & MAC_2500FD) {
3237 state.speed = SPEED_2500;
3238 state.duplex = DUPLEX_FULL;
3239 } else if (caps & MAC_1000FD) {
3240 state.speed = SPEED_1000;
3241 state.duplex = DUPLEX_FULL;
3242 } else {
3243 state.speed = SPEED_UNKNOWN;
3244 state.duplex = DUPLEX_UNKNOWN;
3245 }
3246
3247 ret = phylink_set_fixed_link(adapter->phylink, &state);
3248 if (ret) {
3249 netdev_err(dev, "Could not set fixed link\n");
3250 return ret;
3251 }
3252 } else {
3253 netdev_err(dev, "no PHY found\n");
3254 return -ENXIO;
3255 }
3256 }
3257
3258 if (ret) {
3259 netdev_err(dev, "Could not attach PHY (%d)\n", ret);
3260 return ret;
3261 }
3262
3263 phylink_start(adapter->phylink);
3264
3265 return 0;
3266 }
3267
lan743x_phylink_disconnect(struct lan743x_adapter * adapter)3268 static void lan743x_phylink_disconnect(struct lan743x_adapter *adapter)
3269 {
3270 phylink_stop(adapter->phylink);
3271 phylink_disconnect_phy(adapter->phylink);
3272 }
3273
lan743x_netdev_close(struct net_device * netdev)3274 static int lan743x_netdev_close(struct net_device *netdev)
3275 {
3276 struct lan743x_adapter *adapter = netdev_priv(netdev);
3277 int index;
3278
3279 for (index = 0; index < adapter->used_tx_channels; index++)
3280 lan743x_tx_close(&adapter->tx[index]);
3281
3282 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++)
3283 lan743x_rx_close(&adapter->rx[index]);
3284
3285 lan743x_ptp_close(adapter);
3286
3287 lan743x_phylink_disconnect(adapter);
3288
3289 lan743x_mac_close(adapter);
3290
3291 lan743x_intr_close(adapter);
3292
3293 return 0;
3294 }
3295
lan743x_netdev_open(struct net_device * netdev)3296 static int lan743x_netdev_open(struct net_device *netdev)
3297 {
3298 struct lan743x_adapter *adapter = netdev_priv(netdev);
3299 int index;
3300 int ret;
3301
3302 ret = lan743x_intr_open(adapter);
3303 if (ret)
3304 goto return_error;
3305
3306 ret = lan743x_mac_open(adapter);
3307 if (ret)
3308 goto close_intr;
3309
3310 ret = lan743x_phylink_connect(adapter);
3311 if (ret)
3312 goto close_mac;
3313
3314 ret = lan743x_ptp_open(adapter);
3315 if (ret)
3316 goto close_mac;
3317
3318 lan743x_rfe_open(adapter);
3319
3320 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) {
3321 ret = lan743x_rx_open(&adapter->rx[index]);
3322 if (ret)
3323 goto close_rx;
3324 }
3325
3326 for (index = 0; index < adapter->used_tx_channels; index++) {
3327 ret = lan743x_tx_open(&adapter->tx[index]);
3328 if (ret)
3329 goto close_tx;
3330 }
3331
3332 if (netdev->phydev)
3333 phy_support_eee(netdev->phydev);
3334
3335 #ifdef CONFIG_PM
3336 if (adapter->netdev->phydev) {
3337 struct ethtool_wolinfo wol = { .cmd = ETHTOOL_GWOL };
3338
3339 phy_ethtool_get_wol(netdev->phydev, &wol);
3340 adapter->phy_wol_supported = wol.supported;
3341 adapter->phy_wolopts = wol.wolopts;
3342 }
3343 #endif
3344
3345 return 0;
3346
3347 close_tx:
3348 for (index = 0; index < adapter->used_tx_channels; index++) {
3349 if (adapter->tx[index].ring_cpu_ptr)
3350 lan743x_tx_close(&adapter->tx[index]);
3351 }
3352
3353 close_rx:
3354 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) {
3355 if (adapter->rx[index].ring_cpu_ptr)
3356 lan743x_rx_close(&adapter->rx[index]);
3357 }
3358 lan743x_ptp_close(adapter);
3359 if (adapter->phylink)
3360 lan743x_phylink_disconnect(adapter);
3361
3362 close_mac:
3363 lan743x_mac_close(adapter);
3364
3365 close_intr:
3366 lan743x_intr_close(adapter);
3367
3368 return_error:
3369 netif_warn(adapter, ifup, adapter->netdev,
3370 "Error opening LAN743x\n");
3371 return ret;
3372 }
3373
lan743x_netdev_xmit_frame(struct sk_buff * skb,struct net_device * netdev)3374 static netdev_tx_t lan743x_netdev_xmit_frame(struct sk_buff *skb,
3375 struct net_device *netdev)
3376 {
3377 struct lan743x_adapter *adapter = netdev_priv(netdev);
3378 u8 ch = 0;
3379
3380 if (adapter->is_pci11x1x)
3381 ch = skb->queue_mapping % PCI11X1X_USED_TX_CHANNELS;
3382
3383 return lan743x_tx_xmit_frame(&adapter->tx[ch], skb);
3384 }
3385
lan743x_netdev_ioctl(struct net_device * netdev,struct ifreq * ifr,int cmd)3386 static int lan743x_netdev_ioctl(struct net_device *netdev,
3387 struct ifreq *ifr, int cmd)
3388 {
3389 struct lan743x_adapter *adapter = netdev_priv(netdev);
3390
3391 if (!netif_running(netdev))
3392 return -EINVAL;
3393
3394 return phylink_mii_ioctl(adapter->phylink, ifr, cmd);
3395 }
3396
lan743x_netdev_set_multicast(struct net_device * netdev)3397 static void lan743x_netdev_set_multicast(struct net_device *netdev)
3398 {
3399 struct lan743x_adapter *adapter = netdev_priv(netdev);
3400
3401 lan743x_rfe_set_multicast(adapter);
3402 }
3403
lan743x_netdev_change_mtu(struct net_device * netdev,int new_mtu)3404 static int lan743x_netdev_change_mtu(struct net_device *netdev, int new_mtu)
3405 {
3406 struct lan743x_adapter *adapter = netdev_priv(netdev);
3407 int ret = 0;
3408
3409 ret = lan743x_mac_set_mtu(adapter, new_mtu);
3410 if (!ret)
3411 WRITE_ONCE(netdev->mtu, new_mtu);
3412 return ret;
3413 }
3414
lan743x_netdev_get_stats64(struct net_device * netdev,struct rtnl_link_stats64 * stats)3415 static void lan743x_netdev_get_stats64(struct net_device *netdev,
3416 struct rtnl_link_stats64 *stats)
3417 {
3418 struct lan743x_adapter *adapter = netdev_priv(netdev);
3419
3420 stats->rx_packets = lan743x_csr_read(adapter, STAT_RX_TOTAL_FRAMES);
3421 stats->tx_packets = lan743x_csr_read(adapter, STAT_TX_TOTAL_FRAMES);
3422 stats->rx_bytes = lan743x_csr_read(adapter,
3423 STAT_RX_UNICAST_BYTE_COUNT) +
3424 lan743x_csr_read(adapter,
3425 STAT_RX_BROADCAST_BYTE_COUNT) +
3426 lan743x_csr_read(adapter,
3427 STAT_RX_MULTICAST_BYTE_COUNT);
3428 stats->tx_bytes = lan743x_csr_read(adapter,
3429 STAT_TX_UNICAST_BYTE_COUNT) +
3430 lan743x_csr_read(adapter,
3431 STAT_TX_BROADCAST_BYTE_COUNT) +
3432 lan743x_csr_read(adapter,
3433 STAT_TX_MULTICAST_BYTE_COUNT);
3434 stats->rx_errors = lan743x_csr_read(adapter, STAT_RX_FCS_ERRORS) +
3435 lan743x_csr_read(adapter,
3436 STAT_RX_ALIGNMENT_ERRORS) +
3437 lan743x_csr_read(adapter, STAT_RX_JABBER_ERRORS) +
3438 lan743x_csr_read(adapter,
3439 STAT_RX_UNDERSIZE_FRAME_ERRORS) +
3440 lan743x_csr_read(adapter,
3441 STAT_RX_OVERSIZE_FRAME_ERRORS);
3442 stats->tx_errors = lan743x_csr_read(adapter, STAT_TX_FCS_ERRORS) +
3443 lan743x_csr_read(adapter,
3444 STAT_TX_EXCESS_DEFERRAL_ERRORS) +
3445 lan743x_csr_read(adapter, STAT_TX_CARRIER_ERRORS);
3446 stats->rx_dropped = lan743x_csr_read(adapter,
3447 STAT_RX_DROPPED_FRAMES);
3448 stats->tx_dropped = lan743x_csr_read(adapter,
3449 STAT_TX_EXCESSIVE_COLLISION);
3450 stats->multicast = lan743x_csr_read(adapter,
3451 STAT_RX_MULTICAST_FRAMES) +
3452 lan743x_csr_read(adapter,
3453 STAT_TX_MULTICAST_FRAMES);
3454 stats->collisions = lan743x_csr_read(adapter,
3455 STAT_TX_SINGLE_COLLISIONS) +
3456 lan743x_csr_read(adapter,
3457 STAT_TX_MULTIPLE_COLLISIONS) +
3458 lan743x_csr_read(adapter,
3459 STAT_TX_LATE_COLLISIONS);
3460 }
3461
lan743x_netdev_set_mac_address(struct net_device * netdev,void * addr)3462 static int lan743x_netdev_set_mac_address(struct net_device *netdev,
3463 void *addr)
3464 {
3465 struct lan743x_adapter *adapter = netdev_priv(netdev);
3466 struct sockaddr *sock_addr = addr;
3467 int ret;
3468
3469 ret = eth_prepare_mac_addr_change(netdev, sock_addr);
3470 if (ret)
3471 return ret;
3472 eth_hw_addr_set(netdev, sock_addr->sa_data);
3473 lan743x_mac_set_address(adapter, sock_addr->sa_data);
3474 lan743x_rfe_update_mac_address(adapter);
3475 return 0;
3476 }
3477
3478 static const struct net_device_ops lan743x_netdev_ops = {
3479 .ndo_open = lan743x_netdev_open,
3480 .ndo_stop = lan743x_netdev_close,
3481 .ndo_start_xmit = lan743x_netdev_xmit_frame,
3482 .ndo_eth_ioctl = lan743x_netdev_ioctl,
3483 .ndo_set_rx_mode = lan743x_netdev_set_multicast,
3484 .ndo_change_mtu = lan743x_netdev_change_mtu,
3485 .ndo_get_stats64 = lan743x_netdev_get_stats64,
3486 .ndo_set_mac_address = lan743x_netdev_set_mac_address,
3487 .ndo_hwtstamp_get = lan743x_ptp_hwtstamp_get,
3488 .ndo_hwtstamp_set = lan743x_ptp_hwtstamp_set,
3489 };
3490
lan743x_hardware_cleanup(struct lan743x_adapter * adapter)3491 static void lan743x_hardware_cleanup(struct lan743x_adapter *adapter)
3492 {
3493 lan743x_csr_write(adapter, INT_EN_CLR, 0xFFFFFFFF);
3494 }
3495
lan743x_mdiobus_cleanup(struct lan743x_adapter * adapter)3496 static void lan743x_mdiobus_cleanup(struct lan743x_adapter *adapter)
3497 {
3498 mdiobus_unregister(adapter->mdiobus);
3499 }
3500
lan743x_destroy_phylink(struct lan743x_adapter * adapter)3501 static void lan743x_destroy_phylink(struct lan743x_adapter *adapter)
3502 {
3503 phylink_destroy(adapter->phylink);
3504 adapter->phylink = NULL;
3505 }
3506
lan743x_full_cleanup(struct lan743x_adapter * adapter)3507 static void lan743x_full_cleanup(struct lan743x_adapter *adapter)
3508 {
3509 unregister_netdev(adapter->netdev);
3510
3511 lan743x_destroy_phylink(adapter);
3512 lan743x_mdiobus_cleanup(adapter);
3513 lan743x_hardware_cleanup(adapter);
3514 lan743x_pci_cleanup(adapter);
3515 }
3516
pci11x1x_set_rfe_rd_fifo_threshold(struct lan743x_adapter * adapter)3517 static void pci11x1x_set_rfe_rd_fifo_threshold(struct lan743x_adapter *adapter)
3518 {
3519 u16 rev = adapter->csr.id_rev & ID_REV_CHIP_REV_MASK_;
3520
3521 if (rev == ID_REV_CHIP_REV_PCI11X1X_B0_) {
3522 u32 misc_ctl;
3523
3524 misc_ctl = lan743x_csr_read(adapter, MISC_CTL_0);
3525 misc_ctl &= ~MISC_CTL_0_RFE_READ_FIFO_MASK_;
3526 misc_ctl |= FIELD_PREP(MISC_CTL_0_RFE_READ_FIFO_MASK_,
3527 RFE_RD_FIFO_TH_3_DWORDS);
3528 lan743x_csr_write(adapter, MISC_CTL_0, misc_ctl);
3529 }
3530 }
3531
lan743x_hardware_init(struct lan743x_adapter * adapter,struct pci_dev * pdev)3532 static int lan743x_hardware_init(struct lan743x_adapter *adapter,
3533 struct pci_dev *pdev)
3534 {
3535 struct lan743x_tx *tx;
3536 u32 sgmii_ctl;
3537 int index;
3538 int ret;
3539
3540 adapter->is_pci11x1x = is_pci11x1x_chip(adapter);
3541 if (adapter->is_pci11x1x) {
3542 adapter->max_tx_channels = PCI11X1X_MAX_TX_CHANNELS;
3543 adapter->used_tx_channels = PCI11X1X_USED_TX_CHANNELS;
3544 adapter->max_vector_count = PCI11X1X_MAX_VECTOR_COUNT;
3545 pci11x1x_strap_get_status(adapter);
3546 spin_lock_init(&adapter->eth_syslock_spinlock);
3547 mutex_init(&adapter->sgmii_rw_lock);
3548 pci11x1x_set_rfe_rd_fifo_threshold(adapter);
3549 sgmii_ctl = lan743x_csr_read(adapter, SGMII_CTL);
3550 if (adapter->is_sgmii_en) {
3551 sgmii_ctl |= SGMII_CTL_SGMII_ENABLE_;
3552 sgmii_ctl &= ~SGMII_CTL_SGMII_POWER_DN_;
3553 } else {
3554 sgmii_ctl &= ~SGMII_CTL_SGMII_ENABLE_;
3555 sgmii_ctl |= SGMII_CTL_SGMII_POWER_DN_;
3556 }
3557 lan743x_csr_write(adapter, SGMII_CTL, sgmii_ctl);
3558 } else {
3559 adapter->max_tx_channels = LAN743X_MAX_TX_CHANNELS;
3560 adapter->used_tx_channels = LAN743X_USED_TX_CHANNELS;
3561 adapter->max_vector_count = LAN743X_MAX_VECTOR_COUNT;
3562 }
3563
3564 adapter->intr.irq = adapter->pdev->irq;
3565 lan743x_csr_write(adapter, INT_EN_CLR, 0xFFFFFFFF);
3566
3567 ret = lan743x_gpio_init(adapter);
3568 if (ret)
3569 return ret;
3570
3571 ret = lan743x_mac_init(adapter);
3572 if (ret)
3573 return ret;
3574
3575 ret = lan743x_ptp_init(adapter);
3576 if (ret)
3577 return ret;
3578
3579 lan743x_rfe_update_mac_address(adapter);
3580
3581 ret = lan743x_dmac_init(adapter);
3582 if (ret)
3583 return ret;
3584
3585 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) {
3586 adapter->rx[index].adapter = adapter;
3587 adapter->rx[index].channel_number = index;
3588 }
3589
3590 for (index = 0; index < adapter->used_tx_channels; index++) {
3591 tx = &adapter->tx[index];
3592 tx->adapter = adapter;
3593 tx->channel_number = index;
3594 spin_lock_init(&tx->ring_lock);
3595 }
3596
3597 /* Ensure EEEEN is clear */
3598 lan743x_mac_eee_enable(adapter, false);
3599
3600 return 0;
3601 }
3602
lan743x_mdiobus_init(struct lan743x_adapter * adapter)3603 static int lan743x_mdiobus_init(struct lan743x_adapter *adapter)
3604 {
3605 int ret;
3606
3607 adapter->mdiobus = devm_mdiobus_alloc(&adapter->pdev->dev);
3608 if (!(adapter->mdiobus)) {
3609 ret = -ENOMEM;
3610 goto return_error;
3611 }
3612
3613 adapter->mdiobus->priv = (void *)adapter;
3614 if (adapter->is_pci11x1x) {
3615 if (adapter->is_sgmii_en) {
3616 netif_dbg(adapter, drv, adapter->netdev,
3617 "SGMII operation\n");
3618 adapter->mdiobus->read = lan743x_mdiobus_read_c22;
3619 adapter->mdiobus->write = lan743x_mdiobus_write_c22;
3620 adapter->mdiobus->read_c45 = lan743x_mdiobus_read_c45;
3621 adapter->mdiobus->write_c45 = lan743x_mdiobus_write_c45;
3622 adapter->mdiobus->name = "lan743x-mdiobus-c45";
3623 netif_dbg(adapter, drv, adapter->netdev,
3624 "lan743x-mdiobus-c45\n");
3625 } else {
3626 netif_dbg(adapter, drv, adapter->netdev,
3627 "RGMII operation\n");
3628 // Only C22 support when RGMII I/F
3629 adapter->mdiobus->read = lan743x_mdiobus_read_c22;
3630 adapter->mdiobus->write = lan743x_mdiobus_write_c22;
3631 adapter->mdiobus->name = "lan743x-mdiobus";
3632 netif_dbg(adapter, drv, adapter->netdev,
3633 "lan743x-mdiobus\n");
3634 }
3635 } else {
3636 adapter->mdiobus->read = lan743x_mdiobus_read_c22;
3637 adapter->mdiobus->write = lan743x_mdiobus_write_c22;
3638 adapter->mdiobus->name = "lan743x-mdiobus";
3639 netif_dbg(adapter, drv, adapter->netdev, "lan743x-mdiobus\n");
3640 }
3641
3642 snprintf(adapter->mdiobus->id, MII_BUS_ID_SIZE,
3643 "pci-%s", pci_name(adapter->pdev));
3644
3645 if ((adapter->csr.id_rev & ID_REV_ID_MASK_) == ID_REV_ID_LAN7430_)
3646 /* LAN7430 uses internal phy at address 1 */
3647 adapter->mdiobus->phy_mask = ~(u32)BIT(1);
3648
3649 /* register mdiobus */
3650 ret = mdiobus_register(adapter->mdiobus);
3651 if (ret < 0)
3652 goto return_error;
3653 return 0;
3654
3655 return_error:
3656 return ret;
3657 }
3658
3659 /* lan743x_pcidev_probe - Device Initialization Routine
3660 * @pdev: PCI device information struct
3661 * @id: entry in lan743x_pci_tbl
3662 *
3663 * Returns 0 on success, negative on failure
3664 *
3665 * initializes an adapter identified by a pci_dev structure.
3666 * The OS initialization, configuring of the adapter private structure,
3667 * and a hardware reset occur.
3668 **/
lan743x_pcidev_probe(struct pci_dev * pdev,const struct pci_device_id * id)3669 static int lan743x_pcidev_probe(struct pci_dev *pdev,
3670 const struct pci_device_id *id)
3671 {
3672 struct lan743x_adapter *adapter = NULL;
3673 struct net_device *netdev = NULL;
3674 int ret = -ENODEV;
3675
3676 if (id->device == PCI_DEVICE_ID_SMSC_A011 ||
3677 id->device == PCI_DEVICE_ID_SMSC_A041) {
3678 netdev = devm_alloc_etherdev_mqs(&pdev->dev,
3679 sizeof(struct lan743x_adapter),
3680 PCI11X1X_USED_TX_CHANNELS,
3681 LAN743X_USED_RX_CHANNELS);
3682 } else {
3683 netdev = devm_alloc_etherdev_mqs(&pdev->dev,
3684 sizeof(struct lan743x_adapter),
3685 LAN743X_USED_TX_CHANNELS,
3686 LAN743X_USED_RX_CHANNELS);
3687 }
3688
3689 if (!netdev)
3690 goto return_error;
3691
3692 SET_NETDEV_DEV(netdev, &pdev->dev);
3693 pci_set_drvdata(pdev, netdev);
3694 adapter = netdev_priv(netdev);
3695 adapter->netdev = netdev;
3696 adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE |
3697 NETIF_MSG_LINK | NETIF_MSG_IFUP |
3698 NETIF_MSG_IFDOWN | NETIF_MSG_TX_QUEUED;
3699 netdev->max_mtu = LAN743X_MAX_FRAME_SIZE;
3700
3701 of_get_mac_address(pdev->dev.of_node, adapter->mac_address);
3702
3703 ret = lan743x_pci_init(adapter, pdev);
3704 if (ret)
3705 goto return_error;
3706
3707 ret = lan743x_csr_init(adapter);
3708 if (ret)
3709 goto cleanup_pci;
3710
3711 ret = lan743x_hw_reset_phy(adapter);
3712 if (ret)
3713 goto cleanup_pci;
3714
3715 ret = lan743x_hardware_init(adapter, pdev);
3716 if (ret)
3717 goto cleanup_pci;
3718
3719 ret = lan743x_mdiobus_init(adapter);
3720 if (ret)
3721 goto cleanup_hardware;
3722
3723 adapter->netdev->netdev_ops = &lan743x_netdev_ops;
3724 adapter->netdev->ethtool_ops = &lan743x_ethtool_ops;
3725 adapter->netdev->features = NETIF_F_SG | NETIF_F_TSO |
3726 NETIF_F_HW_CSUM | NETIF_F_RXCSUM;
3727 adapter->netdev->hw_features = adapter->netdev->features;
3728
3729 ret = lan743x_phylink_create(adapter);
3730 if (ret < 0) {
3731 netif_err(adapter, probe, netdev,
3732 "failed to setup phylink (%d)\n", ret);
3733 goto cleanup_mdiobus;
3734 }
3735
3736 ret = register_netdev(adapter->netdev);
3737 if (ret < 0)
3738 goto cleanup_phylink;
3739 return 0;
3740
3741 cleanup_phylink:
3742 lan743x_destroy_phylink(adapter);
3743
3744 cleanup_mdiobus:
3745 lan743x_mdiobus_cleanup(adapter);
3746
3747 cleanup_hardware:
3748 lan743x_hardware_cleanup(adapter);
3749
3750 cleanup_pci:
3751 lan743x_pci_cleanup(adapter);
3752
3753 return_error:
3754 pr_warn("Initialization failed\n");
3755 return ret;
3756 }
3757
3758 /**
3759 * lan743x_pcidev_remove - Device Removal Routine
3760 * @pdev: PCI device information struct
3761 *
3762 * this is called by the PCI subsystem to alert the driver
3763 * that it should release a PCI device. This could be caused by a
3764 * Hot-Plug event, or because the driver is going to be removed from
3765 * memory.
3766 **/
lan743x_pcidev_remove(struct pci_dev * pdev)3767 static void lan743x_pcidev_remove(struct pci_dev *pdev)
3768 {
3769 struct net_device *netdev = pci_get_drvdata(pdev);
3770 struct lan743x_adapter *adapter = netdev_priv(netdev);
3771
3772 lan743x_full_cleanup(adapter);
3773 }
3774
lan743x_pcidev_shutdown(struct pci_dev * pdev)3775 static void lan743x_pcidev_shutdown(struct pci_dev *pdev)
3776 {
3777 struct net_device *netdev = pci_get_drvdata(pdev);
3778 struct lan743x_adapter *adapter = netdev_priv(netdev);
3779
3780 rtnl_lock();
3781 netif_device_detach(netdev);
3782
3783 /* close netdev when netdev is at running state.
3784 * For instance, it is true when system goes to sleep by pm-suspend
3785 * However, it is false when system goes to sleep by suspend GUI menu
3786 */
3787 if (netif_running(netdev))
3788 lan743x_netdev_close(netdev);
3789 rtnl_unlock();
3790
3791 #ifdef CONFIG_PM
3792 pci_save_state(pdev);
3793 #endif
3794
3795 /* clean up lan743x portion */
3796 lan743x_hardware_cleanup(adapter);
3797 }
3798
3799 #ifdef CONFIG_PM_SLEEP
lan743x_pm_wakeframe_crc16(const u8 * buf,int len)3800 static u16 lan743x_pm_wakeframe_crc16(const u8 *buf, int len)
3801 {
3802 return bitrev16(crc16(0xFFFF, buf, len));
3803 }
3804
lan743x_pm_set_wol(struct lan743x_adapter * adapter)3805 static void lan743x_pm_set_wol(struct lan743x_adapter *adapter)
3806 {
3807 const u8 ipv4_multicast[3] = { 0x01, 0x00, 0x5E };
3808 const u8 ipv6_multicast[3] = { 0x33, 0x33 };
3809 const u8 arp_type[2] = { 0x08, 0x06 };
3810 int mask_index;
3811 u32 sopass;
3812 u32 pmtctl;
3813 u32 wucsr;
3814 u32 macrx;
3815 u16 crc;
3816
3817 for (mask_index = 0; mask_index < MAC_NUM_OF_WUF_CFG; mask_index++)
3818 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 0);
3819
3820 /* clear wake settings */
3821 pmtctl = lan743x_csr_read(adapter, PMT_CTL);
3822 pmtctl |= PMT_CTL_WUPS_MASK_ | PMT_CTL_RES_CLR_WKP_MASK_;
3823 pmtctl &= ~(PMT_CTL_GPIO_WAKEUP_EN_ | PMT_CTL_EEE_WAKEUP_EN_ |
3824 PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_ |
3825 PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_ | PMT_CTL_ETH_PHY_WAKE_EN_);
3826
3827 macrx = lan743x_csr_read(adapter, MAC_RX);
3828
3829 wucsr = 0;
3830 mask_index = 0;
3831
3832 pmtctl |= PMT_CTL_ETH_PHY_D3_COLD_OVR_ | PMT_CTL_ETH_PHY_D3_OVR_;
3833
3834 if (adapter->phy_wolopts)
3835 pmtctl |= PMT_CTL_ETH_PHY_WAKE_EN_;
3836
3837 if (adapter->wolopts & WAKE_MAGIC) {
3838 wucsr |= MAC_WUCSR_MPEN_;
3839 macrx |= MAC_RX_RXEN_;
3840 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
3841 }
3842 if (adapter->wolopts & WAKE_UCAST) {
3843 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_PFDA_EN_;
3844 macrx |= MAC_RX_RXEN_;
3845 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
3846 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_;
3847 }
3848 if (adapter->wolopts & WAKE_BCAST) {
3849 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_BCST_EN_;
3850 macrx |= MAC_RX_RXEN_;
3851 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
3852 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_;
3853 }
3854 if (adapter->wolopts & WAKE_MCAST) {
3855 /* IPv4 multicast */
3856 crc = lan743x_pm_wakeframe_crc16(ipv4_multicast, 3);
3857 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index),
3858 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_MCAST_ |
3859 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) |
3860 (crc & MAC_WUF_CFG_CRC16_MASK_));
3861 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 7);
3862 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0);
3863 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0);
3864 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0);
3865 mask_index++;
3866
3867 /* IPv6 multicast */
3868 crc = lan743x_pm_wakeframe_crc16(ipv6_multicast, 2);
3869 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index),
3870 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_MCAST_ |
3871 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) |
3872 (crc & MAC_WUF_CFG_CRC16_MASK_));
3873 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 3);
3874 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0);
3875 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0);
3876 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0);
3877 mask_index++;
3878
3879 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_WAKE_EN_;
3880 macrx |= MAC_RX_RXEN_;
3881 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
3882 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_;
3883 }
3884 if (adapter->wolopts & WAKE_ARP) {
3885 /* set MAC_WUF_CFG & WUF_MASK
3886 * for packettype (offset 12,13) = ARP (0x0806)
3887 */
3888 crc = lan743x_pm_wakeframe_crc16(arp_type, 2);
3889 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index),
3890 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_ALL_ |
3891 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) |
3892 (crc & MAC_WUF_CFG_CRC16_MASK_));
3893 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 0x3000);
3894 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0);
3895 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0);
3896 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0);
3897 mask_index++;
3898
3899 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_WAKE_EN_;
3900 macrx |= MAC_RX_RXEN_;
3901 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_;
3902 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_;
3903 }
3904
3905 if (adapter->wolopts & WAKE_MAGICSECURE) {
3906 sopass = *(u32 *)adapter->sopass;
3907 lan743x_csr_write(adapter, MAC_MP_SO_LO, sopass);
3908 sopass = *(u16 *)&adapter->sopass[4];
3909 lan743x_csr_write(adapter, MAC_MP_SO_HI, sopass);
3910 wucsr |= MAC_MP_SO_EN_;
3911 }
3912
3913 lan743x_csr_write(adapter, MAC_WUCSR, wucsr);
3914 lan743x_csr_write(adapter, PMT_CTL, pmtctl);
3915 lan743x_csr_write(adapter, MAC_RX, macrx);
3916 }
3917
lan743x_pm_suspend(struct device * dev)3918 static int lan743x_pm_suspend(struct device *dev)
3919 {
3920 struct pci_dev *pdev = to_pci_dev(dev);
3921 struct net_device *netdev = pci_get_drvdata(pdev);
3922 struct lan743x_adapter *adapter = netdev_priv(netdev);
3923 u32 data;
3924
3925 lan743x_pcidev_shutdown(pdev);
3926
3927 /* clear all wakes */
3928 lan743x_csr_write(adapter, MAC_WUCSR, 0);
3929 lan743x_csr_write(adapter, MAC_WUCSR2, 0);
3930 lan743x_csr_write(adapter, MAC_WK_SRC, 0xFFFFFFFF);
3931
3932 if (adapter->wolopts || adapter->phy_wolopts)
3933 lan743x_pm_set_wol(adapter);
3934
3935 if (adapter->is_pci11x1x) {
3936 /* Save HW_CFG to config again in PM resume */
3937 data = lan743x_csr_read(adapter, HW_CFG);
3938 adapter->hw_cfg = data;
3939 data |= (HW_CFG_RST_PROTECT_PCIE_ |
3940 HW_CFG_D3_RESET_DIS_ |
3941 HW_CFG_D3_VAUX_OVR_ |
3942 HW_CFG_HOT_RESET_DIS_ |
3943 HW_CFG_RST_PROTECT_);
3944 lan743x_csr_write(adapter, HW_CFG, data);
3945 }
3946
3947 /* Host sets PME_En, put D3hot */
3948 return pci_prepare_to_sleep(pdev);
3949 }
3950
lan743x_pm_resume(struct device * dev)3951 static int lan743x_pm_resume(struct device *dev)
3952 {
3953 struct pci_dev *pdev = to_pci_dev(dev);
3954 struct net_device *netdev = pci_get_drvdata(pdev);
3955 struct lan743x_adapter *adapter = netdev_priv(netdev);
3956 u32 data;
3957 int ret;
3958
3959 pci_set_power_state(pdev, PCI_D0);
3960 pci_restore_state(pdev);
3961
3962 /* Restore HW_CFG that was saved during pm suspend */
3963 if (adapter->is_pci11x1x)
3964 lan743x_csr_write(adapter, HW_CFG, adapter->hw_cfg);
3965
3966 ret = lan743x_hardware_init(adapter, pdev);
3967 if (ret) {
3968 netif_err(adapter, probe, adapter->netdev,
3969 "lan743x_hardware_init returned %d\n", ret);
3970 lan743x_pci_cleanup(adapter);
3971 return ret;
3972 }
3973
3974 ret = lan743x_csr_read(adapter, MAC_WK_SRC);
3975 netif_dbg(adapter, drv, adapter->netdev,
3976 "Wakeup source : 0x%08X\n", ret);
3977
3978 /* Clear the wol configuration and status bits. Note that
3979 * the status bits are "Write One to Clear (W1C)"
3980 */
3981 data = MAC_WUCSR_EEE_TX_WAKE_ | MAC_WUCSR_EEE_RX_WAKE_ |
3982 MAC_WUCSR_RFE_WAKE_FR_ | MAC_WUCSR_PFDA_FR_ | MAC_WUCSR_WUFR_ |
3983 MAC_WUCSR_MPR_ | MAC_WUCSR_BCAST_FR_;
3984 lan743x_csr_write(adapter, MAC_WUCSR, data);
3985
3986 data = MAC_WUCSR2_NS_RCD_ | MAC_WUCSR2_ARP_RCD_ |
3987 MAC_WUCSR2_IPV6_TCPSYN_RCD_ | MAC_WUCSR2_IPV4_TCPSYN_RCD_;
3988 lan743x_csr_write(adapter, MAC_WUCSR2, data);
3989
3990 data = MAC_WK_SRC_ETH_PHY_WK_ | MAC_WK_SRC_IPV6_TCPSYN_RCD_WK_ |
3991 MAC_WK_SRC_IPV4_TCPSYN_RCD_WK_ | MAC_WK_SRC_EEE_TX_WK_ |
3992 MAC_WK_SRC_EEE_RX_WK_ | MAC_WK_SRC_RFE_FR_WK_ |
3993 MAC_WK_SRC_PFDA_FR_WK_ | MAC_WK_SRC_MP_FR_WK_ |
3994 MAC_WK_SRC_BCAST_FR_WK_ | MAC_WK_SRC_WU_FR_WK_ |
3995 MAC_WK_SRC_WK_FR_SAVED_;
3996 lan743x_csr_write(adapter, MAC_WK_SRC, data);
3997
3998 rtnl_lock();
3999 /* open netdev when netdev is at running state while resume.
4000 * For instance, it is true when system wakesup after pm-suspend
4001 * However, it is false when system wakes up after suspend GUI menu
4002 */
4003 if (netif_running(netdev))
4004 lan743x_netdev_open(netdev);
4005
4006 netif_device_attach(netdev);
4007 rtnl_unlock();
4008
4009 return 0;
4010 }
4011
4012 static const struct dev_pm_ops lan743x_pm_ops = {
4013 SET_SYSTEM_SLEEP_PM_OPS(lan743x_pm_suspend, lan743x_pm_resume)
4014 };
4015 #endif /* CONFIG_PM_SLEEP */
4016
4017 static const struct pci_device_id lan743x_pcidev_tbl[] = {
4018 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_LAN7430) },
4019 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_LAN7431) },
4020 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_A011) },
4021 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_A041) },
4022 { 0, }
4023 };
4024
4025 MODULE_DEVICE_TABLE(pci, lan743x_pcidev_tbl);
4026
4027 static struct pci_driver lan743x_pcidev_driver = {
4028 .name = DRIVER_NAME,
4029 .id_table = lan743x_pcidev_tbl,
4030 .probe = lan743x_pcidev_probe,
4031 .remove = lan743x_pcidev_remove,
4032 #ifdef CONFIG_PM_SLEEP
4033 .driver.pm = &lan743x_pm_ops,
4034 #endif
4035 .shutdown = lan743x_pcidev_shutdown,
4036 };
4037
4038 module_pci_driver(lan743x_pcidev_driver);
4039
4040 MODULE_AUTHOR(DRIVER_AUTHOR);
4041 MODULE_DESCRIPTION(DRIVER_DESC);
4042 MODULE_LICENSE("GPL");
4043