1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) 2018, Intel Corporation. */
3
4 #ifndef _ICE_H_
5 #define _ICE_H_
6
7 #include <linux/types.h>
8 #include <linux/errno.h>
9 #include <linux/kernel.h>
10 #include <linux/module.h>
11 #include <linux/firmware.h>
12 #include <linux/netdevice.h>
13 #include <linux/compiler.h>
14 #include <linux/etherdevice.h>
15 #include <linux/skbuff.h>
16 #include <linux/cpumask.h>
17 #include <linux/rtnetlink.h>
18 #include <linux/if_vlan.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/pci.h>
21 #include <linux/workqueue.h>
22 #include <linux/wait.h>
23 #include <linux/interrupt.h>
24 #include <linux/ethtool.h>
25 #include <linux/timer.h>
26 #include <linux/delay.h>
27 #include <linux/bitmap.h>
28 #include <linux/log2.h>
29 #include <linux/ip.h>
30 #include <linux/sctp.h>
31 #include <linux/ipv6.h>
32 #include <linux/pkt_sched.h>
33 #include <linux/if_bridge.h>
34 #include <linux/ctype.h>
35 #include <linux/linkmode.h>
36 #include <linux/bpf.h>
37 #include <linux/btf.h>
38 #include <linux/auxiliary_bus.h>
39 #include <linux/avf/virtchnl.h>
40 #include <linux/cpu_rmap.h>
41 #include <linux/dim.h>
42 #include <linux/gnss.h>
43 #include <net/pkt_cls.h>
44 #include <net/pkt_sched.h>
45 #include <net/tc_act/tc_mirred.h>
46 #include <net/tc_act/tc_gact.h>
47 #include <net/ip.h>
48 #include <net/devlink.h>
49 #include <net/ipv6.h>
50 #include <net/xdp_sock.h>
51 #include <net/xdp_sock_drv.h>
52 #include <net/geneve.h>
53 #include <net/gre.h>
54 #include <net/udp_tunnel.h>
55 #include <net/vxlan.h>
56 #include <net/gtp.h>
57 #include <linux/ppp_defs.h>
58 #include "ice_devids.h"
59 #include "ice_type.h"
60 #include "ice_txrx.h"
61 #include "ice_dcb.h"
62 #include "ice_switch.h"
63 #include "ice_common.h"
64 #include "ice_flow.h"
65 #include "ice_sched.h"
66 #include "ice_idc_int.h"
67 #include "ice_sriov.h"
68 #include "ice_vf_mbx.h"
69 #include "ice_ptp.h"
70 #include "ice_tspll.h"
71 #include "ice_fdir.h"
72 #include "ice_xsk.h"
73 #include "ice_arfs.h"
74 #include "ice_repr.h"
75 #include "ice_eswitch.h"
76 #include "ice_lag.h"
77 #include "ice_vsi_vlan_ops.h"
78 #include "ice_gnss.h"
79 #include "ice_irq.h"
80 #include "ice_dpll.h"
81 #include "ice_adapter.h"
82 #include "devlink/health.h"
83
84 #define ICE_BAR0 0
85 #define ICE_REQ_DESC_MULTIPLE 32
86 #define ICE_MIN_NUM_DESC 64
87 #define ICE_MAX_NUM_DESC 8160
88 #define ICE_DFLT_MIN_RX_DESC 512
89 #define ICE_DFLT_NUM_TX_DESC 256
90 #define ICE_DFLT_NUM_RX_DESC 2048
91
92 #define ICE_DFLT_TRAFFIC_CLASS BIT(0)
93 #define ICE_INT_NAME_STR_LEN (IFNAMSIZ + 16)
94 #define ICE_AQ_LEN 192
95 #define ICE_MBXSQ_LEN 64
96 #define ICE_SBQ_LEN 64
97 #define ICE_MIN_LAN_TXRX_MSIX 1
98 #define ICE_MIN_LAN_OICR_MSIX 1
99 #define ICE_MIN_MSIX (ICE_MIN_LAN_TXRX_MSIX + ICE_MIN_LAN_OICR_MSIX)
100 #define ICE_FDIR_MSIX 2
101 #define ICE_NO_VSI 0xffff
102 #define ICE_VSI_MAP_CONTIG 0
103 #define ICE_VSI_MAP_SCATTER 1
104 #define ICE_MAX_SCATTER_TXQS 16
105 #define ICE_MAX_SCATTER_RXQS 16
106 #define ICE_Q_WAIT_RETRY_LIMIT 10
107 #define ICE_Q_WAIT_MAX_RETRY (5 * ICE_Q_WAIT_RETRY_LIMIT)
108 #define ICE_MAX_LG_RSS_QS 256
109 #define ICE_INVAL_Q_INDEX 0xffff
110
111 #define ICE_MAX_RXQS_PER_TC 256 /* Used when setting VSI context per TC Rx queues */
112
113 #define ICE_CHNL_START_TC 1
114
115 #define ICE_MAX_RESET_WAIT 20
116
117 #define ICE_VSIQF_HKEY_ARRAY_SIZE ((VSIQF_HKEY_MAX_INDEX + 1) * 4)
118
119 #define ICE_DFLT_NETIF_M (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK)
120
121 #define ICE_MAX_MTU (ICE_AQ_SET_MAC_FRAME_SIZE_MAX - ICE_ETH_PKT_HDR_PAD)
122
123 #define ICE_MAX_TSO_SIZE 131072
124
125 #define ICE_UP_TABLE_TRANSLATE(val, i) \
126 (((val) << ICE_AQ_VSI_UP_TABLE_UP##i##_S) & \
127 ICE_AQ_VSI_UP_TABLE_UP##i##_M)
128
129 #define ICE_TX_DESC(R, i) (&(((struct ice_tx_desc *)((R)->desc))[i]))
130 #define ICE_RX_DESC(R, i) (&(((union ice_32b_rx_flex_desc *)((R)->desc))[i]))
131 #define ICE_TX_CTX_DESC(R, i) (&(((struct ice_tx_ctx_desc *)((R)->desc))[i]))
132 #define ICE_TX_FDIRDESC(R, i) (&(((struct ice_fltr_desc *)((R)->desc))[i]))
133
134 /* Minimum BW limit is 500 Kbps for any scheduler node */
135 #define ICE_MIN_BW_LIMIT 500
136 /* User can specify BW in either Kbit/Mbit/Gbit and OS converts it in bytes.
137 * use it to convert user specified BW limit into Kbps
138 */
139 #define ICE_BW_KBPS_DIVISOR 125
140
141 /* Default recipes have priority 4 and below, hence priority values between 5..7
142 * can be used as filter priority for advanced switch filter (advanced switch
143 * filters need new recipe to be created for specified extraction sequence
144 * because default recipe extraction sequence does not represent custom
145 * extraction)
146 */
147 #define ICE_SWITCH_FLTR_PRIO_QUEUE 7
148 /* prio 6 is reserved for future use (e.g. switch filter with L3 fields +
149 * (Optional: IP TOS/TTL) + L4 fields + (optionally: TCP fields such as
150 * SYN/FIN/RST))
151 */
152 #define ICE_SWITCH_FLTR_PRIO_RSVD 6
153 #define ICE_SWITCH_FLTR_PRIO_VSI 5
154 #define ICE_SWITCH_FLTR_PRIO_QGRP ICE_SWITCH_FLTR_PRIO_VSI
155
156 /* Macro for each VSI in a PF */
157 #define ice_for_each_vsi(pf, i) \
158 for ((i) = 0; (i) < (pf)->num_alloc_vsi; (i)++)
159
160 /* Macros for each Tx/Xdp/Rx ring in a VSI */
161 #define ice_for_each_txq(vsi, i) \
162 for ((i) = 0; (i) < (vsi)->num_txq; (i)++)
163
164 #define ice_for_each_xdp_txq(vsi, i) \
165 for ((i) = 0; (i) < (vsi)->num_xdp_txq; (i)++)
166
167 #define ice_for_each_rxq(vsi, i) \
168 for ((i) = 0; (i) < (vsi)->num_rxq; (i)++)
169
170 /* Macros for each allocated Tx/Rx ring whether used or not in a VSI */
171 #define ice_for_each_alloc_txq(vsi, i) \
172 for ((i) = 0; (i) < (vsi)->alloc_txq; (i)++)
173
174 #define ice_for_each_alloc_rxq(vsi, i) \
175 for ((i) = 0; (i) < (vsi)->alloc_rxq; (i)++)
176
177 #define ice_for_each_q_vector(vsi, i) \
178 for ((i) = 0; (i) < (vsi)->num_q_vectors; (i)++)
179
180 #define ice_for_each_chnl_tc(i) \
181 for ((i) = ICE_CHNL_START_TC; (i) < ICE_CHNL_MAX_TC; (i)++)
182
183 #define ICE_UCAST_PROMISC_BITS ICE_PROMISC_UCAST_RX
184
185 #define ICE_UCAST_VLAN_PROMISC_BITS (ICE_PROMISC_UCAST_RX | \
186 ICE_PROMISC_VLAN_RX)
187
188 #define ICE_MCAST_PROMISC_BITS (ICE_PROMISC_MCAST_TX | ICE_PROMISC_MCAST_RX)
189
190 #define ICE_MCAST_VLAN_PROMISC_BITS (ICE_PROMISC_MCAST_TX | \
191 ICE_PROMISC_MCAST_RX | \
192 ICE_PROMISC_VLAN_TX | \
193 ICE_PROMISC_VLAN_RX)
194
195 #define ice_pf_to_dev(pf) (&((pf)->pdev->dev))
196
197 enum ice_feature {
198 ICE_F_DSCP,
199 ICE_F_PHY_RCLK,
200 ICE_F_SMA_CTRL,
201 ICE_F_CGU,
202 ICE_F_GNSS,
203 ICE_F_GCS,
204 ICE_F_ROCE_LAG,
205 ICE_F_SRIOV_LAG,
206 ICE_F_MBX_LIMIT,
207 ICE_F_MAX
208 };
209
210 DECLARE_STATIC_KEY_FALSE(ice_xdp_locking_key);
211
212 struct ice_channel {
213 struct list_head list;
214 u8 type;
215 u16 sw_id;
216 u16 base_q;
217 u16 num_rxq;
218 u16 num_txq;
219 u16 vsi_num;
220 u8 ena_tc;
221 struct ice_aqc_vsi_props info;
222 u64 max_tx_rate;
223 u64 min_tx_rate;
224 atomic_t num_sb_fltr;
225 struct ice_vsi *ch_vsi;
226 };
227
228 struct ice_txq_meta {
229 u32 q_teid; /* Tx-scheduler element identifier */
230 u16 q_id; /* Entry in VSI's txq_map bitmap */
231 u16 q_handle; /* Relative index of Tx queue within TC */
232 u16 vsi_idx; /* VSI index that Tx queue belongs to */
233 u8 tc; /* TC number that Tx queue belongs to */
234 };
235
236 struct ice_tc_info {
237 u16 qoffset;
238 u16 qcount_tx;
239 u16 qcount_rx;
240 u8 netdev_tc;
241 };
242
243 struct ice_tc_cfg {
244 u8 numtc; /* Total number of enabled TCs */
245 u16 ena_tc; /* Tx map */
246 struct ice_tc_info tc_info[ICE_MAX_TRAFFIC_CLASS];
247 };
248
249 struct ice_qs_cfg {
250 struct mutex *qs_mutex; /* will be assigned to &pf->avail_q_mutex */
251 unsigned long *pf_map;
252 unsigned long pf_map_size;
253 unsigned int q_count;
254 unsigned int scatter_count;
255 u16 *vsi_map;
256 u16 vsi_map_offset;
257 u8 mapping_mode;
258 };
259
260 struct ice_sw {
261 struct ice_pf *pf;
262 u16 sw_id; /* switch ID for this switch */
263 u16 bridge_mode; /* VEB/VEPA/Port Virtualizer */
264 };
265
266 enum ice_pf_state {
267 ICE_TESTING,
268 ICE_DOWN,
269 ICE_NEEDS_RESTART,
270 ICE_PREPARED_FOR_RESET, /* set by driver when prepared */
271 ICE_RESET_OICR_RECV, /* set by driver after rcv reset OICR */
272 ICE_PFR_REQ, /* set by driver */
273 ICE_CORER_REQ, /* set by driver */
274 ICE_GLOBR_REQ, /* set by driver */
275 ICE_CORER_RECV, /* set by OICR handler */
276 ICE_GLOBR_RECV, /* set by OICR handler */
277 ICE_EMPR_RECV, /* set by OICR handler */
278 ICE_SUSPENDED, /* set on module remove path */
279 ICE_RESET_FAILED, /* set by reset/rebuild */
280 /* When checking for the PF to be in a nominal operating state, the
281 * bits that are grouped at the beginning of the list need to be
282 * checked. Bits occurring before ICE_STATE_NOMINAL_CHECK_BITS will
283 * be checked. If you need to add a bit into consideration for nominal
284 * operating state, it must be added before
285 * ICE_STATE_NOMINAL_CHECK_BITS. Do not move this entry's position
286 * without appropriate consideration.
287 */
288 ICE_STATE_NOMINAL_CHECK_BITS,
289 ICE_ADMINQ_EVENT_PENDING,
290 ICE_MAILBOXQ_EVENT_PENDING,
291 ICE_SIDEBANDQ_EVENT_PENDING,
292 ICE_MDD_EVENT_PENDING,
293 ICE_VFLR_EVENT_PENDING,
294 ICE_FLTR_OVERFLOW_PROMISC,
295 ICE_VF_DIS,
296 ICE_CFG_BUSY,
297 ICE_SERVICE_SCHED,
298 ICE_SERVICE_DIS,
299 ICE_FD_FLUSH_REQ,
300 ICE_OICR_INTR_DIS, /* Global OICR interrupt disabled */
301 ICE_MDD_VF_PRINT_PENDING, /* set when MDD event handle */
302 ICE_VF_RESETS_DISABLED, /* disable resets during ice_remove */
303 ICE_LINK_DEFAULT_OVERRIDE_PENDING,
304 ICE_PHY_INIT_COMPLETE,
305 ICE_FD_VF_FLUSH_CTX, /* set at FD Rx IRQ or timeout */
306 ICE_AUX_ERR_PENDING,
307 ICE_STATE_NBITS /* must be last */
308 };
309
310 enum ice_vsi_state {
311 ICE_VSI_DOWN,
312 ICE_VSI_NEEDS_RESTART,
313 ICE_VSI_NETDEV_ALLOCD,
314 ICE_VSI_NETDEV_REGISTERED,
315 ICE_VSI_UMAC_FLTR_CHANGED,
316 ICE_VSI_MMAC_FLTR_CHANGED,
317 ICE_VSI_PROMISC_CHANGED,
318 ICE_VSI_REBUILD_PENDING,
319 ICE_VSI_STATE_NBITS /* must be last */
320 };
321
322 struct ice_vsi_stats {
323 struct ice_ring_stats **tx_ring_stats; /* Tx ring stats array */
324 struct ice_ring_stats **rx_ring_stats; /* Rx ring stats array */
325 };
326
327 /* struct that defines a VSI, associated with a dev */
328 struct ice_vsi {
329 struct net_device *netdev;
330 struct ice_sw *vsw; /* switch this VSI is on */
331 struct ice_pf *back; /* back pointer to PF */
332 struct ice_rx_ring **rx_rings; /* Rx ring array */
333 struct ice_tx_ring **tx_rings; /* Tx ring array */
334 struct ice_q_vector **q_vectors; /* q_vector array */
335
336 irqreturn_t (*irq_handler)(int irq, void *data);
337
338 u64 tx_linearize;
339 DECLARE_BITMAP(state, ICE_VSI_STATE_NBITS);
340 unsigned int current_netdev_flags;
341 u32 tx_restart;
342 u32 tx_busy;
343 u32 rx_buf_failed;
344 u32 rx_page_failed;
345 u16 num_q_vectors;
346 /* tell if only dynamic irq allocation is allowed */
347 bool irq_dyn_alloc;
348
349 u16 vsi_num; /* HW (absolute) index of this VSI */
350 u16 idx; /* software index in pf->vsi[] */
351
352 u16 num_gfltr;
353 u16 num_bfltr;
354
355 /* RSS config */
356 u16 rss_table_size; /* HW RSS table size */
357 u16 rss_size; /* Allocated RSS queues */
358 u8 rss_hfunc; /* User configured hash type */
359 u8 *rss_hkey_user; /* User configured hash keys */
360 u8 *rss_lut_user; /* User configured lookup table entries */
361 u8 rss_lut_type; /* used to configure Get/Set RSS LUT AQ call */
362
363 /* aRFS members only allocated for the PF VSI */
364 #define ICE_MAX_ARFS_LIST 1024
365 #define ICE_ARFS_LST_MASK (ICE_MAX_ARFS_LIST - 1)
366 struct hlist_head *arfs_fltr_list;
367 struct ice_arfs_active_fltr_cntrs *arfs_fltr_cntrs;
368 spinlock_t arfs_lock; /* protects aRFS hash table and filter state */
369 atomic_t *arfs_last_fltr_id;
370
371 struct ice_aqc_vsi_props info; /* VSI properties */
372 struct ice_vsi_vlan_info vlan_info; /* vlan config to be restored */
373
374 /* VSI stats */
375 struct rtnl_link_stats64 net_stats;
376 struct rtnl_link_stats64 net_stats_prev;
377 struct ice_eth_stats eth_stats;
378 struct ice_eth_stats eth_stats_prev;
379
380 struct list_head tmp_sync_list; /* MAC filters to be synced */
381 struct list_head tmp_unsync_list; /* MAC filters to be unsynced */
382
383 u8 irqs_ready:1;
384 u8 current_isup:1; /* Sync 'link up' logging */
385 u8 stat_offsets_loaded:1;
386 struct ice_vsi_vlan_ops inner_vlan_ops;
387 struct ice_vsi_vlan_ops outer_vlan_ops;
388 u16 num_vlan;
389
390 /* queue information */
391 u8 tx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */
392 u8 rx_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */
393 u16 *txq_map; /* index in pf->avail_txqs */
394 u16 *rxq_map; /* index in pf->avail_rxqs */
395 u16 alloc_txq; /* Allocated Tx queues */
396 u16 num_txq; /* Used Tx queues */
397 u16 alloc_rxq; /* Allocated Rx queues */
398 u16 num_rxq; /* Used Rx queues */
399 u16 req_txq; /* User requested Tx queues */
400 u16 req_rxq; /* User requested Rx queues */
401 u16 num_rx_desc;
402 u16 num_tx_desc;
403 struct ice_tc_cfg tc_cfg;
404 struct bpf_prog *xdp_prog;
405 struct ice_tx_ring **xdp_rings; /* XDP ring array */
406 u16 num_xdp_txq; /* Used XDP queues */
407 u8 xdp_mapping_mode; /* ICE_MAP_MODE_[CONTIG|SCATTER] */
408 struct mutex xdp_state_lock;
409
410 struct net_device **target_netdevs;
411
412 struct tc_mqprio_qopt_offload mqprio_qopt; /* queue parameters */
413
414 /* Channel Specific Fields */
415 struct ice_vsi *tc_map_vsi[ICE_CHNL_MAX_TC];
416 u16 cnt_q_avail;
417 u16 next_base_q; /* next queue to be used for channel setup */
418 struct list_head ch_list;
419 u16 num_chnl_rxq;
420 u16 num_chnl_txq;
421 u16 ch_rss_size;
422 u16 num_chnl_fltr;
423 /* store away rss size info before configuring ADQ channels so that,
424 * it can be used after tc-qdisc delete, to get back RSS setting as
425 * they were before
426 */
427 u16 orig_rss_size;
428 /* this keeps tracks of all enabled TC with and without DCB
429 * and inclusive of ADQ, vsi->mqprio_opt keeps track of queue
430 * information
431 */
432 u8 all_numtc;
433 u16 all_enatc;
434
435 /* store away TC info, to be used for rebuild logic */
436 u8 old_numtc;
437 u16 old_ena_tc;
438
439 /* setup back reference, to which aggregator node this VSI
440 * corresponds to
441 */
442 struct ice_agg_node *agg_node;
443
444 struct_group_tagged(ice_vsi_cfg_params, params,
445 struct ice_port_info *port_info; /* back pointer to port_info */
446 struct ice_channel *ch; /* VSI's channel structure, may be NULL */
447 union {
448 /* VF associated with this VSI, may be NULL */
449 struct ice_vf *vf;
450 /* SF associated with this VSI, may be NULL */
451 struct ice_dynamic_port *sf;
452 };
453 u32 flags; /* VSI flags used for rebuild and configuration */
454 enum ice_vsi_type type; /* the type of the VSI */
455 );
456 } ____cacheline_internodealigned_in_smp;
457
458 /* struct that defines an interrupt vector */
459 struct ice_q_vector {
460 struct ice_vsi *vsi;
461
462 u16 v_idx; /* index in the vsi->q_vector array. */
463 u16 reg_idx; /* PF relative register index */
464 u8 num_ring_rx; /* total number of Rx rings in vector */
465 u8 num_ring_tx; /* total number of Tx rings in vector */
466 u8 wb_on_itr:1; /* if true, WB on ITR is enabled */
467 /* in usecs, need to use ice_intrl_to_usecs_reg() before writing this
468 * value to the device
469 */
470 u8 intrl;
471
472 struct napi_struct napi;
473
474 struct ice_ring_container rx;
475 struct ice_ring_container tx;
476
477 struct ice_channel *ch;
478
479 char name[ICE_INT_NAME_STR_LEN];
480
481 u16 total_events; /* net_dim(): number of interrupts processed */
482 u16 vf_reg_idx; /* VF relative register index */
483 struct msi_map irq;
484 } ____cacheline_internodealigned_in_smp;
485
486 enum ice_pf_flags {
487 ICE_FLAG_FLTR_SYNC,
488 ICE_FLAG_RDMA_ENA,
489 ICE_FLAG_RSS_ENA,
490 ICE_FLAG_SRIOV_ENA,
491 ICE_FLAG_SRIOV_CAPABLE,
492 ICE_FLAG_DCB_CAPABLE,
493 ICE_FLAG_DCB_ENA,
494 ICE_FLAG_FD_ENA,
495 ICE_FLAG_PTP_SUPPORTED, /* PTP is supported by NVM */
496 ICE_FLAG_ADV_FEATURES,
497 ICE_FLAG_TC_MQPRIO, /* support for Multi queue TC */
498 ICE_FLAG_CLS_FLOWER,
499 ICE_FLAG_LINK_DOWN_ON_CLOSE_ENA,
500 ICE_FLAG_TOTAL_PORT_SHUTDOWN_ENA,
501 ICE_FLAG_NO_MEDIA,
502 ICE_FLAG_FW_LLDP_AGENT,
503 ICE_FLAG_MOD_POWER_UNSUPPORTED,
504 ICE_FLAG_PHY_FW_LOAD_FAILED,
505 ICE_FLAG_ETHTOOL_CTXT, /* set when ethtool holds RTNL lock */
506 ICE_FLAG_LEGACY_RX,
507 ICE_FLAG_VF_TRUE_PROMISC_ENA,
508 ICE_FLAG_MDD_AUTO_RESET_VF,
509 ICE_FLAG_VF_VLAN_PRUNING,
510 ICE_FLAG_LINK_LENIENT_MODE_ENA,
511 ICE_FLAG_PLUG_AUX_DEV,
512 ICE_FLAG_UNPLUG_AUX_DEV,
513 ICE_FLAG_AUX_DEV_CREATED,
514 ICE_FLAG_MTU_CHANGED,
515 ICE_FLAG_GNSS, /* GNSS successfully initialized */
516 ICE_FLAG_DPLL, /* SyncE/PTP dplls initialized */
517 ICE_FLAG_LLDP_AQ_FLTR,
518 ICE_PF_FLAGS_NBITS /* must be last */
519 };
520
521 enum ice_misc_thread_tasks {
522 ICE_MISC_THREAD_TX_TSTAMP,
523 ICE_MISC_THREAD_NBITS /* must be last */
524 };
525
526 struct ice_eswitch {
527 struct ice_vsi *uplink_vsi;
528 struct ice_esw_br_offloads *br_offloads;
529 struct xarray reprs;
530 bool is_running;
531 };
532
533 struct ice_agg_node {
534 u32 agg_id;
535 #define ICE_MAX_VSIS_IN_AGG_NODE 64
536 u32 num_vsis;
537 u8 valid;
538 };
539
540 struct ice_pf_msix {
541 u32 cur;
542 u32 min;
543 u32 max;
544 u32 total;
545 u32 rest;
546 };
547
548 struct ice_pf {
549 struct pci_dev *pdev;
550 struct ice_adapter *adapter;
551
552 struct devlink_region *nvm_region;
553 struct devlink_region *sram_region;
554 struct devlink_region *devcaps_region;
555
556 /* devlink port data */
557 struct devlink_port devlink_port;
558
559 /* OS reserved IRQ details */
560 struct ice_irq_tracker irq_tracker;
561 struct ice_virt_irq_tracker virt_irq_tracker;
562
563 u16 ctrl_vsi_idx; /* control VSI index in pf->vsi array */
564
565 struct ice_vsi **vsi; /* VSIs created by the driver */
566 struct ice_vsi_stats **vsi_stats;
567 struct ice_sw *first_sw; /* first switch created by firmware */
568 u16 eswitch_mode; /* current mode of eswitch */
569 struct dentry *ice_debugfs_pf;
570 struct dentry *ice_debugfs_pf_fwlog;
571 /* keep track of all the dentrys for FW log modules */
572 struct dentry **ice_debugfs_pf_fwlog_modules;
573 struct ice_vfs vfs;
574 DECLARE_BITMAP(features, ICE_F_MAX);
575 DECLARE_BITMAP(state, ICE_STATE_NBITS);
576 DECLARE_BITMAP(flags, ICE_PF_FLAGS_NBITS);
577 DECLARE_BITMAP(misc_thread, ICE_MISC_THREAD_NBITS);
578 unsigned long *avail_txqs; /* bitmap to track PF Tx queue usage */
579 unsigned long *avail_rxqs; /* bitmap to track PF Rx queue usage */
580 unsigned long serv_tmr_period;
581 unsigned long serv_tmr_prev;
582 struct timer_list serv_tmr;
583 struct work_struct serv_task;
584 struct mutex avail_q_mutex; /* protects access to avail_[rx|tx]qs */
585 struct mutex sw_mutex; /* lock for protecting VSI alloc flow */
586 struct mutex tc_mutex; /* lock to protect TC changes */
587 struct mutex adev_mutex; /* lock to protect aux device access */
588 struct mutex lag_mutex; /* protect ice_lag struct in PF */
589 u32 msg_enable;
590 struct ice_ptp ptp;
591 struct gnss_serial *gnss_serial;
592 struct gnss_device *gnss_dev;
593 u16 num_rdma_msix; /* Total MSIX vectors for RDMA driver */
594
595 /* spinlock to protect the AdminQ wait list */
596 spinlock_t aq_wait_lock;
597 struct hlist_head aq_wait_list;
598 wait_queue_head_t aq_wait_queue;
599 bool fw_emp_reset_disabled;
600
601 wait_queue_head_t reset_wait_queue;
602
603 u32 hw_csum_rx_error;
604 u32 hw_rx_eipe_error;
605 u32 oicr_err_reg;
606 struct msi_map oicr_irq; /* Other interrupt cause MSIX vector */
607 struct msi_map ll_ts_irq; /* LL_TS interrupt MSIX vector */
608 u16 max_pf_txqs; /* Total Tx queues PF wide */
609 u16 max_pf_rxqs; /* Total Rx queues PF wide */
610 struct ice_pf_msix msix;
611 u16 num_lan_tx; /* num LAN Tx queues setup */
612 u16 num_lan_rx; /* num LAN Rx queues setup */
613 u16 next_vsi; /* Next free slot in pf->vsi[] - 0-based! */
614 u16 num_alloc_vsi;
615 u16 corer_count; /* Core reset count */
616 u16 globr_count; /* Global reset count */
617 u16 empr_count; /* EMP reset count */
618 u16 pfr_count; /* PF reset count */
619 u32 link_down_events;
620
621 u8 wol_ena : 1; /* software state of WoL */
622 u32 wakeup_reason; /* last wakeup reason */
623 struct ice_hw_port_stats stats;
624 struct ice_hw_port_stats stats_prev;
625 struct ice_hw hw;
626 u8 stat_prev_loaded:1; /* has previous stats been loaded */
627 u16 dcbx_cap;
628 u32 tx_timeout_count;
629 unsigned long tx_timeout_last_recovery;
630 u32 tx_timeout_recovery_level;
631 char int_name[ICE_INT_NAME_STR_LEN];
632 char int_name_ll_ts[ICE_INT_NAME_STR_LEN];
633 int aux_idx;
634 u32 sw_int_count;
635 /* count of tc_flower filters specific to channel (aka where filter
636 * action is "hw_tc <tc_num>")
637 */
638 u16 num_dmac_chnl_fltrs;
639 struct hlist_head tc_flower_fltr_list;
640
641 u64 supported_rxdids;
642
643 __le64 nvm_phy_type_lo; /* NVM PHY type low */
644 __le64 nvm_phy_type_hi; /* NVM PHY type high */
645 struct ice_link_default_override_tlv link_dflt_override;
646 struct ice_lag *lag; /* Link Aggregation information */
647
648 struct ice_eswitch eswitch;
649 struct ice_esw_br_port *br_port;
650
651 struct xarray dyn_ports;
652 struct xarray sf_nums;
653
654 #define ICE_INVALID_AGG_NODE_ID 0
655 #define ICE_PF_AGG_NODE_ID_START 1
656 #define ICE_MAX_PF_AGG_NODES 32
657 struct ice_agg_node pf_agg_node[ICE_MAX_PF_AGG_NODES];
658 #define ICE_VF_AGG_NODE_ID_START 65
659 #define ICE_MAX_VF_AGG_NODES 32
660 struct ice_agg_node vf_agg_node[ICE_MAX_VF_AGG_NODES];
661 struct ice_dplls dplls;
662 struct device *hwmon_dev;
663 struct ice_health health_reporters;
664 struct iidc_rdma_core_dev_info *cdev_info;
665
666 u8 num_quanta_prof_used;
667 };
668
669 extern struct workqueue_struct *ice_lag_wq;
670
671 struct ice_netdev_priv {
672 struct ice_vsi *vsi;
673 struct ice_repr *repr;
674 /* indirect block callbacks on registered higher level devices
675 * (e.g. tunnel devices)
676 *
677 * tc_indr_block_cb_priv_list is used to look up indirect callback
678 * private data
679 */
680 struct list_head tc_indr_block_priv_list;
681 };
682
683 /**
684 * ice_vector_ch_enabled
685 * @qv: pointer to q_vector, can be NULL
686 *
687 * This function returns true if vector is channel enabled otherwise false
688 */
ice_vector_ch_enabled(struct ice_q_vector * qv)689 static inline bool ice_vector_ch_enabled(struct ice_q_vector *qv)
690 {
691 return !!qv->ch; /* Enable it to run with TC */
692 }
693
694 /**
695 * ice_ptp_pf_handles_tx_interrupt - Check if PF handles Tx interrupt
696 * @pf: Board private structure
697 *
698 * Return true if this PF should respond to the Tx timestamp interrupt
699 * indication in the miscellaneous OICR interrupt handler.
700 */
ice_ptp_pf_handles_tx_interrupt(struct ice_pf * pf)701 static inline bool ice_ptp_pf_handles_tx_interrupt(struct ice_pf *pf)
702 {
703 return pf->ptp.tx_interrupt_mode != ICE_PTP_TX_INTERRUPT_NONE;
704 }
705
706 /**
707 * ice_irq_dynamic_ena - Enable default interrupt generation settings
708 * @hw: pointer to HW struct
709 * @vsi: pointer to VSI struct, can be NULL
710 * @q_vector: pointer to q_vector, can be NULL
711 */
712 static inline void
ice_irq_dynamic_ena(struct ice_hw * hw,struct ice_vsi * vsi,struct ice_q_vector * q_vector)713 ice_irq_dynamic_ena(struct ice_hw *hw, struct ice_vsi *vsi,
714 struct ice_q_vector *q_vector)
715 {
716 u32 vector = (vsi && q_vector) ? q_vector->reg_idx :
717 ((struct ice_pf *)hw->back)->oicr_irq.index;
718 int itr = ICE_ITR_NONE;
719 u32 val;
720
721 /* clear the PBA here, as this function is meant to clean out all
722 * previous interrupts and enable the interrupt
723 */
724 val = GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |
725 (itr << GLINT_DYN_CTL_ITR_INDX_S);
726 if (vsi)
727 if (test_bit(ICE_VSI_DOWN, vsi->state))
728 return;
729 wr32(hw, GLINT_DYN_CTL(vector), val);
730 }
731
732 /**
733 * ice_netdev_to_pf - Retrieve the PF struct associated with a netdev
734 * @netdev: pointer to the netdev struct
735 */
ice_netdev_to_pf(struct net_device * netdev)736 static inline struct ice_pf *ice_netdev_to_pf(struct net_device *netdev)
737 {
738 struct ice_netdev_priv *np = netdev_priv(netdev);
739
740 return np->vsi->back;
741 }
742
ice_is_xdp_ena_vsi(struct ice_vsi * vsi)743 static inline bool ice_is_xdp_ena_vsi(struct ice_vsi *vsi)
744 {
745 return !!READ_ONCE(vsi->xdp_prog);
746 }
747
ice_set_ring_xdp(struct ice_tx_ring * ring)748 static inline void ice_set_ring_xdp(struct ice_tx_ring *ring)
749 {
750 ring->flags |= ICE_TX_FLAGS_RING_XDP;
751 }
752
753 /**
754 * ice_get_xp_from_qid - get ZC XSK buffer pool bound to a queue ID
755 * @vsi: pointer to VSI
756 * @qid: index of a queue to look at XSK buff pool presence
757 *
758 * Return: A pointer to xsk_buff_pool structure if there is a buffer pool
759 * attached and configured as zero-copy, NULL otherwise.
760 */
ice_get_xp_from_qid(struct ice_vsi * vsi,u16 qid)761 static inline struct xsk_buff_pool *ice_get_xp_from_qid(struct ice_vsi *vsi,
762 u16 qid)
763 {
764 struct xsk_buff_pool *pool = xsk_get_pool_from_qid(vsi->netdev, qid);
765
766 if (!ice_is_xdp_ena_vsi(vsi))
767 return NULL;
768
769 return (pool && pool->dev) ? pool : NULL;
770 }
771
772 /**
773 * ice_rx_xsk_pool - assign XSK buff pool to Rx ring
774 * @ring: Rx ring to use
775 *
776 * Sets XSK buff pool pointer on Rx ring.
777 */
ice_rx_xsk_pool(struct ice_rx_ring * ring)778 static inline void ice_rx_xsk_pool(struct ice_rx_ring *ring)
779 {
780 struct ice_vsi *vsi = ring->vsi;
781 u16 qid = ring->q_index;
782
783 WRITE_ONCE(ring->xsk_pool, ice_get_xp_from_qid(vsi, qid));
784 }
785
786 /**
787 * ice_tx_xsk_pool - assign XSK buff pool to XDP ring
788 * @vsi: pointer to VSI
789 * @qid: index of a queue to look at XSK buff pool presence
790 *
791 * Sets XSK buff pool pointer on XDP ring.
792 *
793 * XDP ring is picked from Rx ring, whereas Rx ring is picked based on provided
794 * queue id. Reason for doing so is that queue vectors might have assigned more
795 * than one XDP ring, e.g. when user reduced the queue count on netdev; Rx ring
796 * carries a pointer to one of these XDP rings for its own purposes, such as
797 * handling XDP_TX action, therefore we can piggyback here on the
798 * rx_ring->xdp_ring assignment that was done during XDP rings initialization.
799 */
ice_tx_xsk_pool(struct ice_vsi * vsi,u16 qid)800 static inline void ice_tx_xsk_pool(struct ice_vsi *vsi, u16 qid)
801 {
802 struct ice_tx_ring *ring;
803
804 ring = vsi->rx_rings[qid]->xdp_ring;
805 if (!ring)
806 return;
807
808 WRITE_ONCE(ring->xsk_pool, ice_get_xp_from_qid(vsi, qid));
809 }
810
811 /**
812 * ice_get_main_vsi - Get the PF VSI
813 * @pf: PF instance
814 *
815 * returns pf->vsi[0], which by definition is the PF VSI
816 */
ice_get_main_vsi(struct ice_pf * pf)817 static inline struct ice_vsi *ice_get_main_vsi(struct ice_pf *pf)
818 {
819 if (pf->vsi)
820 return pf->vsi[0];
821
822 return NULL;
823 }
824
825 /**
826 * ice_get_netdev_priv_vsi - return VSI associated with netdev priv.
827 * @np: private netdev structure
828 */
ice_get_netdev_priv_vsi(struct ice_netdev_priv * np)829 static inline struct ice_vsi *ice_get_netdev_priv_vsi(struct ice_netdev_priv *np)
830 {
831 /* In case of port representor return source port VSI. */
832 if (np->repr)
833 return np->repr->src_vsi;
834 else
835 return np->vsi;
836 }
837
838 /**
839 * ice_get_ctrl_vsi - Get the control VSI
840 * @pf: PF instance
841 */
ice_get_ctrl_vsi(struct ice_pf * pf)842 static inline struct ice_vsi *ice_get_ctrl_vsi(struct ice_pf *pf)
843 {
844 /* if pf->ctrl_vsi_idx is ICE_NO_VSI, control VSI was not set up */
845 if (!pf->vsi || pf->ctrl_vsi_idx == ICE_NO_VSI)
846 return NULL;
847
848 return pf->vsi[pf->ctrl_vsi_idx];
849 }
850
851 /**
852 * ice_find_vsi - Find the VSI from VSI ID
853 * @pf: The PF pointer to search in
854 * @vsi_num: The VSI ID to search for
855 */
ice_find_vsi(struct ice_pf * pf,u16 vsi_num)856 static inline struct ice_vsi *ice_find_vsi(struct ice_pf *pf, u16 vsi_num)
857 {
858 int i;
859
860 ice_for_each_vsi(pf, i)
861 if (pf->vsi[i] && pf->vsi[i]->vsi_num == vsi_num)
862 return pf->vsi[i];
863 return NULL;
864 }
865
866 /**
867 * ice_is_switchdev_running - check if switchdev is configured
868 * @pf: pointer to PF structure
869 *
870 * Returns true if eswitch mode is set to DEVLINK_ESWITCH_MODE_SWITCHDEV
871 * and switchdev is configured, false otherwise.
872 */
ice_is_switchdev_running(struct ice_pf * pf)873 static inline bool ice_is_switchdev_running(struct ice_pf *pf)
874 {
875 return pf->eswitch.is_running;
876 }
877
878 #define ICE_FD_STAT_CTR_BLOCK_COUNT 256
879 #define ICE_FD_STAT_PF_IDX(base_idx) \
880 ((base_idx) * ICE_FD_STAT_CTR_BLOCK_COUNT)
881 #define ICE_FD_SB_STAT_IDX(base_idx) ICE_FD_STAT_PF_IDX(base_idx)
882 #define ICE_FD_STAT_CH 1
883 #define ICE_FD_CH_STAT_IDX(base_idx) \
884 (ICE_FD_STAT_PF_IDX(base_idx) + ICE_FD_STAT_CH)
885
886 /**
887 * ice_is_adq_active - any active ADQs
888 * @pf: pointer to PF
889 *
890 * This function returns true if there are any ADQs configured (which is
891 * determined by looking at VSI type (which should be VSI_PF), numtc, and
892 * TC_MQPRIO flag) otherwise return false
893 */
ice_is_adq_active(struct ice_pf * pf)894 static inline bool ice_is_adq_active(struct ice_pf *pf)
895 {
896 struct ice_vsi *vsi;
897
898 vsi = ice_get_main_vsi(pf);
899 if (!vsi)
900 return false;
901
902 /* is ADQ configured */
903 if (vsi->tc_cfg.numtc > ICE_CHNL_START_TC &&
904 test_bit(ICE_FLAG_TC_MQPRIO, pf->flags))
905 return true;
906
907 return false;
908 }
909
910 void ice_debugfs_fwlog_init(struct ice_pf *pf);
911 void ice_debugfs_pf_deinit(struct ice_pf *pf);
912 void ice_debugfs_init(void);
913 void ice_debugfs_exit(void);
914 void ice_pf_fwlog_update_module(struct ice_pf *pf, int log_level, int module);
915
916 bool netif_is_ice(const struct net_device *dev);
917 int ice_vsi_setup_tx_rings(struct ice_vsi *vsi);
918 int ice_vsi_setup_rx_rings(struct ice_vsi *vsi);
919 int ice_vsi_open_ctrl(struct ice_vsi *vsi);
920 int ice_vsi_open(struct ice_vsi *vsi);
921 void ice_set_ethtool_ops(struct net_device *netdev);
922 void ice_set_ethtool_repr_ops(struct net_device *netdev);
923 void ice_set_ethtool_safe_mode_ops(struct net_device *netdev);
924 void ice_set_ethtool_sf_ops(struct net_device *netdev);
925 u16 ice_get_avail_txq_count(struct ice_pf *pf);
926 u16 ice_get_avail_rxq_count(struct ice_pf *pf);
927 int ice_vsi_recfg_qs(struct ice_vsi *vsi, int new_rx, int new_tx, bool locked);
928 void ice_update_vsi_stats(struct ice_vsi *vsi);
929 void ice_update_pf_stats(struct ice_pf *pf);
930 void
931 ice_fetch_u64_stats_per_ring(struct u64_stats_sync *syncp,
932 struct ice_q_stats stats, u64 *pkts, u64 *bytes);
933 int ice_up(struct ice_vsi *vsi);
934 int ice_down(struct ice_vsi *vsi);
935 int ice_down_up(struct ice_vsi *vsi);
936 int ice_vsi_cfg_lan(struct ice_vsi *vsi);
937 struct ice_vsi *ice_lb_vsi_setup(struct ice_pf *pf, struct ice_port_info *pi);
938
939 enum ice_xdp_cfg {
940 ICE_XDP_CFG_FULL, /* Fully apply new config in .ndo_bpf() */
941 ICE_XDP_CFG_PART, /* Save/use part of config in VSI rebuild */
942 };
943
944 int ice_vsi_determine_xdp_res(struct ice_vsi *vsi);
945 int ice_prepare_xdp_rings(struct ice_vsi *vsi, struct bpf_prog *prog,
946 enum ice_xdp_cfg cfg_type);
947 int ice_destroy_xdp_rings(struct ice_vsi *vsi, enum ice_xdp_cfg cfg_type);
948 void ice_map_xdp_rings(struct ice_vsi *vsi);
949 int
950 ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames,
951 u32 flags);
952 int ice_set_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size);
953 int ice_get_rss_lut(struct ice_vsi *vsi, u8 *lut, u16 lut_size);
954 int ice_set_rss_key(struct ice_vsi *vsi, u8 *seed);
955 int ice_get_rss_key(struct ice_vsi *vsi, u8 *seed);
956 int ice_set_rss_hfunc(struct ice_vsi *vsi, u8 hfunc);
957 void ice_fill_rss_lut(u8 *lut, u16 rss_table_size, u16 rss_size);
958 int ice_schedule_reset(struct ice_pf *pf, enum ice_reset_req reset);
959 void ice_print_link_msg(struct ice_vsi *vsi, bool isup);
960 int ice_plug_aux_dev(struct ice_pf *pf);
961 void ice_unplug_aux_dev(struct ice_pf *pf);
962 int ice_init_rdma(struct ice_pf *pf);
963 void ice_deinit_rdma(struct ice_pf *pf);
964 bool ice_is_wol_supported(struct ice_hw *hw);
965 void ice_fdir_del_all_fltrs(struct ice_vsi *vsi);
966 int
967 ice_fdir_write_fltr(struct ice_pf *pf, struct ice_fdir_fltr *input, bool add,
968 bool is_tun);
969 void ice_vsi_manage_fdir(struct ice_vsi *vsi, bool ena);
970 int ice_add_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd);
971 int ice_del_fdir_ethtool(struct ice_vsi *vsi, struct ethtool_rxnfc *cmd);
972 int ice_get_ethtool_fdir_entry(struct ice_hw *hw, struct ethtool_rxnfc *cmd);
973 int
974 ice_get_fdir_fltr_ids(struct ice_hw *hw, struct ethtool_rxnfc *cmd,
975 u32 *rule_locs);
976 void ice_fdir_rem_adq_chnl(struct ice_hw *hw, u16 vsi_idx);
977 void ice_fdir_release_flows(struct ice_hw *hw);
978 void ice_fdir_replay_flows(struct ice_hw *hw);
979 void ice_fdir_replay_fltrs(struct ice_pf *pf);
980 int ice_fdir_create_dflt_rules(struct ice_pf *pf);
981
982 enum ice_aq_task_state {
983 ICE_AQ_TASK_NOT_PREPARED,
984 ICE_AQ_TASK_WAITING,
985 ICE_AQ_TASK_COMPLETE,
986 ICE_AQ_TASK_CANCELED,
987 };
988
989 struct ice_aq_task {
990 struct hlist_node entry;
991 struct ice_rq_event_info event;
992 enum ice_aq_task_state state;
993 u16 opcode;
994 };
995
996 void ice_aq_prep_for_event(struct ice_pf *pf, struct ice_aq_task *task,
997 u16 opcode);
998 int ice_aq_wait_for_event(struct ice_pf *pf, struct ice_aq_task *task,
999 unsigned long timeout);
1000 int ice_open(struct net_device *netdev);
1001 int ice_open_internal(struct net_device *netdev);
1002 int ice_stop(struct net_device *netdev);
1003 void ice_service_task_schedule(struct ice_pf *pf);
1004 int ice_load(struct ice_pf *pf);
1005 void ice_unload(struct ice_pf *pf);
1006 void ice_adv_lnk_speed_maps_init(void);
1007 int ice_init_dev(struct ice_pf *pf);
1008 void ice_deinit_dev(struct ice_pf *pf);
1009 int ice_change_mtu(struct net_device *netdev, int new_mtu);
1010 void ice_tx_timeout(struct net_device *netdev, unsigned int txqueue);
1011 int ice_xdp(struct net_device *dev, struct netdev_bpf *xdp);
1012 void ice_set_netdev_features(struct net_device *netdev);
1013 int ice_vlan_rx_add_vid(struct net_device *netdev, __be16 proto, u16 vid);
1014 int ice_vlan_rx_kill_vid(struct net_device *netdev, __be16 proto, u16 vid);
1015 void ice_get_stats64(struct net_device *netdev,
1016 struct rtnl_link_stats64 *stats);
1017
1018 /**
1019 * ice_set_rdma_cap - enable RDMA support
1020 * @pf: PF struct
1021 */
ice_set_rdma_cap(struct ice_pf * pf)1022 static inline void ice_set_rdma_cap(struct ice_pf *pf)
1023 {
1024 if (pf->hw.func_caps.common_cap.rdma && pf->num_rdma_msix) {
1025 set_bit(ICE_FLAG_RDMA_ENA, pf->flags);
1026 set_bit(ICE_FLAG_PLUG_AUX_DEV, pf->flags);
1027 }
1028 }
1029
1030 /**
1031 * ice_clear_rdma_cap - disable RDMA support
1032 * @pf: PF struct
1033 */
ice_clear_rdma_cap(struct ice_pf * pf)1034 static inline void ice_clear_rdma_cap(struct ice_pf *pf)
1035 {
1036 /* defer unplug to service task to avoid RTNL lock and
1037 * clear PLUG bit so that pending plugs don't interfere
1038 */
1039 clear_bit(ICE_FLAG_PLUG_AUX_DEV, pf->flags);
1040 set_bit(ICE_FLAG_UNPLUG_AUX_DEV, pf->flags);
1041 clear_bit(ICE_FLAG_RDMA_ENA, pf->flags);
1042 }
1043
1044 extern const struct xdp_metadata_ops ice_xdp_md_ops;
1045
1046 /**
1047 * ice_is_dual - Check if given config is multi-NAC
1048 * @hw: pointer to HW structure
1049 *
1050 * Return: true if the device is running in mutli-NAC (Network
1051 * Acceleration Complex) configuration variant, false otherwise
1052 * (always false for non-E825 devices).
1053 */
ice_is_dual(struct ice_hw * hw)1054 static inline bool ice_is_dual(struct ice_hw *hw)
1055 {
1056 return hw->mac_type == ICE_MAC_GENERIC_3K_E825 &&
1057 (hw->dev_caps.nac_topo.mode & ICE_NAC_TOPO_DUAL_M);
1058 }
1059
1060 /**
1061 * ice_is_primary - Check if given device belongs to the primary complex
1062 * @hw: pointer to HW structure
1063 *
1064 * Check if given PF/HW is running on primary complex in multi-NAC
1065 * configuration.
1066 *
1067 * Return: true if the device is dual, false otherwise (always true
1068 * for non-E825 devices).
1069 */
ice_is_primary(struct ice_hw * hw)1070 static inline bool ice_is_primary(struct ice_hw *hw)
1071 {
1072 return hw->mac_type != ICE_MAC_GENERIC_3K_E825 ||
1073 !ice_is_dual(hw) ||
1074 (hw->dev_caps.nac_topo.mode & ICE_NAC_TOPO_PRIMARY_M);
1075 }
1076
1077 /**
1078 * ice_pf_src_tmr_owned - Check if a primary timer is owned by PF
1079 * @pf: pointer to PF structure
1080 *
1081 * Return: true if PF owns primary timer, false otherwise.
1082 */
ice_pf_src_tmr_owned(struct ice_pf * pf)1083 static inline bool ice_pf_src_tmr_owned(struct ice_pf *pf)
1084 {
1085 return pf->hw.func_caps.ts_func_info.src_tmr_owned &&
1086 ice_is_primary(&pf->hw);
1087 }
1088
1089 /**
1090 * ice_get_primary_hw - Get pointer to primary ice_hw structure
1091 * @pf: pointer to PF structure
1092 *
1093 * Return: A pointer to ice_hw structure with access to timesync
1094 * register space.
1095 */
ice_get_primary_hw(struct ice_pf * pf)1096 static inline struct ice_hw *ice_get_primary_hw(struct ice_pf *pf)
1097 {
1098 if (!pf->adapter->ctrl_pf)
1099 return &pf->hw;
1100 else
1101 return &pf->adapter->ctrl_pf->hw;
1102 }
1103 #endif /* _ICE_H_ */
1104