1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * Copyright (C) 2020-2023 Loongson Technology Corporation Limited
4 */
5
6 #ifndef __ASM_LOONGARCH_KVM_HOST_H__
7 #define __ASM_LOONGARCH_KVM_HOST_H__
8
9 #include <linux/cpumask.h>
10 #include <linux/hrtimer.h>
11 #include <linux/interrupt.h>
12 #include <linux/kvm.h>
13 #include <linux/kvm_types.h>
14 #include <linux/mutex.h>
15 #include <linux/perf_event.h>
16 #include <linux/spinlock.h>
17 #include <linux/threads.h>
18 #include <linux/types.h>
19
20 #include <asm/inst.h>
21 #include <asm/kvm_mmu.h>
22 #include <asm/kvm_ipi.h>
23 #include <asm/kvm_eiointc.h>
24 #include <asm/kvm_pch_pic.h>
25 #include <asm/loongarch.h>
26
27 #define __KVM_HAVE_ARCH_INTC_INITIALIZED
28
29 /* Loongarch KVM register ids */
30 #define KVM_GET_IOC_CSR_IDX(id) ((id & KVM_CSR_IDX_MASK) >> LOONGARCH_REG_SHIFT)
31 #define KVM_GET_IOC_CPUCFG_IDX(id) ((id & KVM_CPUCFG_IDX_MASK) >> LOONGARCH_REG_SHIFT)
32
33 #define KVM_MAX_VCPUS 256
34 #define KVM_MAX_CPUCFG_REGS 21
35
36 #define KVM_HALT_POLL_NS_DEFAULT 500000
37 #define KVM_REQ_TLB_FLUSH_GPA KVM_ARCH_REQ(0)
38 #define KVM_REQ_STEAL_UPDATE KVM_ARCH_REQ(1)
39 #define KVM_REQ_PMU KVM_ARCH_REQ(2)
40
41 #define KVM_GUESTDBG_SW_BP_MASK \
42 (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP)
43 #define KVM_GUESTDBG_VALID_MASK \
44 (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP | KVM_GUESTDBG_SINGLESTEP)
45
46 #define KVM_DIRTY_LOG_MANUAL_CAPS \
47 (KVM_DIRTY_LOG_MANUAL_PROTECT_ENABLE | KVM_DIRTY_LOG_INITIALLY_SET)
48
49 struct kvm_vm_stat {
50 struct kvm_vm_stat_generic generic;
51 u64 pages;
52 u64 hugepages;
53 u64 ipi_read_exits;
54 u64 ipi_write_exits;
55 u64 eiointc_read_exits;
56 u64 eiointc_write_exits;
57 u64 pch_pic_read_exits;
58 u64 pch_pic_write_exits;
59 };
60
61 struct kvm_vcpu_stat {
62 struct kvm_vcpu_stat_generic generic;
63 u64 int_exits;
64 u64 idle_exits;
65 u64 cpucfg_exits;
66 u64 signal_exits;
67 u64 hypercall_exits;
68 };
69
70 #define KVM_MEM_HUGEPAGE_CAPABLE (1UL << 0)
71 #define KVM_MEM_HUGEPAGE_INCAPABLE (1UL << 1)
72 struct kvm_arch_memory_slot {
73 unsigned long flags;
74 };
75
76 #define HOST_MAX_PMNUM 16
77 struct kvm_context {
78 unsigned long vpid_cache;
79 struct kvm_vcpu *last_vcpu;
80 /* Host PMU CSR */
81 u64 perf_ctrl[HOST_MAX_PMNUM];
82 u64 perf_cntr[HOST_MAX_PMNUM];
83 };
84
85 struct kvm_world_switch {
86 int (*exc_entry)(void);
87 int (*enter_guest)(struct kvm_run *run, struct kvm_vcpu *vcpu);
88 unsigned long page_order;
89 };
90
91 #define MAX_PGTABLE_LEVELS 4
92
93 /*
94 * Physical CPUID is used for interrupt routing, there are different
95 * definitions about physical cpuid on different hardwares.
96 *
97 * For LOONGARCH_CSR_CPUID register, max CPUID size if 512
98 * For IPI hardware, max destination CPUID size 1024
99 * For eiointc interrupt controller, max destination CPUID size is 256
100 * For msgint interrupt controller, max supported CPUID size is 65536
101 *
102 * Currently max CPUID is defined as 256 for KVM hypervisor, in future
103 * it will be expanded to 4096, including 16 packages at most. And every
104 * package supports at most 256 vcpus
105 */
106 #define KVM_MAX_PHYID 256
107
108 struct kvm_phyid_info {
109 struct kvm_vcpu *vcpu;
110 bool enabled;
111 };
112
113 struct kvm_phyid_map {
114 int max_phyid;
115 struct kvm_phyid_info phys_map[KVM_MAX_PHYID];
116 };
117
118 struct kvm_arch {
119 /* Guest physical mm */
120 kvm_pte_t *pgd;
121 unsigned long gpa_size;
122 unsigned long invalid_ptes[MAX_PGTABLE_LEVELS];
123 unsigned int pte_shifts[MAX_PGTABLE_LEVELS];
124 unsigned int root_level;
125 spinlock_t phyid_map_lock;
126 struct kvm_phyid_map *phyid_map;
127 /* Enabled PV features */
128 unsigned long pv_features;
129
130 s64 time_offset;
131 struct kvm_context __percpu *vmcs;
132 struct loongarch_ipi *ipi;
133 struct loongarch_eiointc *eiointc;
134 struct loongarch_pch_pic *pch_pic;
135 };
136
137 #define CSR_MAX_NUMS 0x800
138
139 struct loongarch_csrs {
140 unsigned long csrs[CSR_MAX_NUMS];
141 };
142
143 /* Resume Flags */
144 #define RESUME_HOST 0
145 #define RESUME_GUEST 1
146
147 enum emulation_result {
148 EMULATE_DONE, /* no further processing */
149 EMULATE_DO_MMIO, /* kvm_run filled with MMIO request */
150 EMULATE_DO_IOCSR, /* handle IOCSR request */
151 EMULATE_FAIL, /* can't emulate this instruction */
152 EMULATE_EXCEPT, /* A guest exception has been generated */
153 };
154
155 #define KVM_LARCH_FPU (0x1 << 0)
156 #define KVM_LARCH_LSX (0x1 << 1)
157 #define KVM_LARCH_LASX (0x1 << 2)
158 #define KVM_LARCH_LBT (0x1 << 3)
159 #define KVM_LARCH_PMU (0x1 << 4)
160 #define KVM_LARCH_SWCSR_LATEST (0x1 << 5)
161 #define KVM_LARCH_HWCSR_USABLE (0x1 << 6)
162
163 #define LOONGARCH_PV_FEAT_UPDATED BIT_ULL(63)
164 #define LOONGARCH_PV_FEAT_MASK (BIT(KVM_FEATURE_IPI) | \
165 BIT(KVM_FEATURE_STEAL_TIME) | \
166 BIT(KVM_FEATURE_USER_HCALL) | \
167 BIT(KVM_FEATURE_VIRT_EXTIOI))
168
169 struct kvm_vcpu_arch {
170 /*
171 * Switch pointer-to-function type to unsigned long
172 * for loading the value into register directly.
173 */
174 unsigned long host_eentry;
175 unsigned long guest_eentry;
176
177 /* Pointers stored here for easy accessing from assembly code */
178 int (*handle_exit)(struct kvm_run *run, struct kvm_vcpu *vcpu);
179
180 /* GPA (=HVA) of PGD for secondary mmu */
181 unsigned long kvm_pgd;
182
183 /* Host registers preserved across guest mode execution */
184 unsigned long host_sp;
185 unsigned long host_tp;
186 unsigned long host_pgd;
187
188 /* Host CSRs are used when handling exits from guest */
189 unsigned long badi;
190 unsigned long badv;
191 unsigned long host_ecfg;
192 unsigned long host_estat;
193 unsigned long host_percpu;
194
195 /* GPRs */
196 unsigned long gprs[32];
197 unsigned long pc;
198
199 /* Which auxiliary state is loaded (KVM_LARCH_*) */
200 unsigned int aux_inuse;
201
202 /* FPU state */
203 struct loongarch_fpu fpu FPU_ALIGN;
204 struct loongarch_lbt lbt;
205
206 /* CSR state */
207 struct loongarch_csrs *csr;
208
209 /* Guest max PMU CSR id */
210 int max_pmu_csrid;
211
212 /* GPR used as IO source/target */
213 u32 io_gpr;
214
215 /* KVM register to control count timer */
216 u32 count_ctl;
217 struct hrtimer swtimer;
218
219 /* Bitmask of intr that are pending */
220 unsigned long irq_pending;
221 /* Bitmask of pending intr to be cleared */
222 unsigned long irq_clear;
223
224 /* Bitmask of exceptions that are pending */
225 unsigned long exception_pending;
226 unsigned int esubcode;
227
228 /* Cache for pages needed inside spinlock regions */
229 struct kvm_mmu_memory_cache mmu_page_cache;
230
231 /* vcpu's vpid */
232 u64 vpid;
233 gpa_t flush_gpa;
234
235 /* Frequency of stable timer in Hz */
236 u64 timer_mhz;
237 ktime_t expire;
238
239 /* Last CPU the vCPU state was loaded on */
240 int last_sched_cpu;
241 /* mp state */
242 struct kvm_mp_state mp_state;
243 /* ipi state */
244 struct ipi_state ipi_state;
245 /* cpucfg */
246 u32 cpucfg[KVM_MAX_CPUCFG_REGS];
247
248 /* paravirt steal time */
249 struct {
250 u64 guest_addr;
251 u64 last_steal;
252 struct gfn_to_hva_cache cache;
253 } st;
254 };
255
readl_sw_gcsr(struct loongarch_csrs * csr,int reg)256 static inline unsigned long readl_sw_gcsr(struct loongarch_csrs *csr, int reg)
257 {
258 return csr->csrs[reg];
259 }
260
writel_sw_gcsr(struct loongarch_csrs * csr,int reg,unsigned long val)261 static inline void writel_sw_gcsr(struct loongarch_csrs *csr, int reg, unsigned long val)
262 {
263 csr->csrs[reg] = val;
264 }
265
kvm_guest_has_fpu(struct kvm_vcpu_arch * arch)266 static inline bool kvm_guest_has_fpu(struct kvm_vcpu_arch *arch)
267 {
268 return arch->cpucfg[2] & CPUCFG2_FP;
269 }
270
kvm_guest_has_lsx(struct kvm_vcpu_arch * arch)271 static inline bool kvm_guest_has_lsx(struct kvm_vcpu_arch *arch)
272 {
273 return arch->cpucfg[2] & CPUCFG2_LSX;
274 }
275
kvm_guest_has_lasx(struct kvm_vcpu_arch * arch)276 static inline bool kvm_guest_has_lasx(struct kvm_vcpu_arch *arch)
277 {
278 return arch->cpucfg[2] & CPUCFG2_LASX;
279 }
280
kvm_guest_has_lbt(struct kvm_vcpu_arch * arch)281 static inline bool kvm_guest_has_lbt(struct kvm_vcpu_arch *arch)
282 {
283 return arch->cpucfg[2] & (CPUCFG2_X86BT | CPUCFG2_ARMBT | CPUCFG2_MIPSBT);
284 }
285
kvm_guest_has_pmu(struct kvm_vcpu_arch * arch)286 static inline bool kvm_guest_has_pmu(struct kvm_vcpu_arch *arch)
287 {
288 return arch->cpucfg[6] & CPUCFG6_PMP;
289 }
290
kvm_get_pmu_num(struct kvm_vcpu_arch * arch)291 static inline int kvm_get_pmu_num(struct kvm_vcpu_arch *arch)
292 {
293 return (arch->cpucfg[6] & CPUCFG6_PMNUM) >> CPUCFG6_PMNUM_SHIFT;
294 }
295
296 bool kvm_arch_pmi_in_guest(struct kvm_vcpu *vcpu);
297
298 /* Debug: dump vcpu state */
299 int kvm_arch_vcpu_dump_regs(struct kvm_vcpu *vcpu);
300
301 /* MMU handling */
302 void kvm_flush_tlb_all(void);
303 void kvm_flush_tlb_gpa(struct kvm_vcpu *vcpu, unsigned long gpa);
304 int kvm_handle_mm_fault(struct kvm_vcpu *vcpu, unsigned long badv, bool write, int ecode);
305
306 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end, bool blockable);
307 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);
308 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
309
update_pc(struct kvm_vcpu_arch * arch)310 static inline void update_pc(struct kvm_vcpu_arch *arch)
311 {
312 arch->pc += 4;
313 }
314
315 /*
316 * kvm_is_ifetch_fault() - Find whether a TLBL exception is due to ifetch fault.
317 * @vcpu: Virtual CPU.
318 *
319 * Returns: Whether the TLBL exception was likely due to an instruction
320 * fetch fault rather than a data load fault.
321 */
kvm_is_ifetch_fault(struct kvm_vcpu_arch * arch)322 static inline bool kvm_is_ifetch_fault(struct kvm_vcpu_arch *arch)
323 {
324 return arch->pc == arch->badv;
325 }
326
327 /* Misc */
kvm_arch_hardware_unsetup(void)328 static inline void kvm_arch_hardware_unsetup(void) {}
kvm_arch_memslots_updated(struct kvm * kvm,u64 gen)329 static inline void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen) {}
kvm_arch_vcpu_blocking(struct kvm_vcpu * vcpu)330 static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) {}
kvm_arch_vcpu_unblocking(struct kvm_vcpu * vcpu)331 static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) {}
kvm_arch_vcpu_block_finish(struct kvm_vcpu * vcpu)332 static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {}
kvm_arch_free_memslot(struct kvm * kvm,struct kvm_memory_slot * slot)333 static inline void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot) {}
334 void kvm_check_vpid(struct kvm_vcpu *vcpu);
335 enum hrtimer_restart kvm_swtimer_wakeup(struct hrtimer *timer);
336 void kvm_arch_flush_remote_tlbs_memslot(struct kvm *kvm, const struct kvm_memory_slot *memslot);
337 void kvm_init_vmcs(struct kvm *kvm);
338 void kvm_exc_entry(void);
339 int kvm_enter_guest(struct kvm_run *run, struct kvm_vcpu *vcpu);
340
341 extern unsigned long vpid_mask;
342 extern const unsigned long kvm_exception_size;
343 extern const unsigned long kvm_enter_guest_size;
344 extern struct kvm_world_switch *kvm_loongarch_ops;
345
346 #define SW_GCSR (1 << 0)
347 #define HW_GCSR (1 << 1)
348 #define INVALID_GCSR (1 << 2)
349
350 int get_gcsr_flag(int csr);
351 void set_hw_gcsr(int csr_id, unsigned long val);
352
353 #endif /* __ASM_LOONGARCH_KVM_HOST_H__ */
354