1 // SPDX-License-Identifier: GPL-2.0 OR MIT
2 /*
3 * Copyright 2014-2022 Advanced Micro Devices, Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
22 */
23
24 #include <linux/types.h>
25 #include <linux/kernel.h>
26 #include <linux/pci.h>
27 #include <linux/errno.h>
28 #include <linux/acpi.h>
29 #include <linux/hash.h>
30 #include <linux/cpufreq.h>
31 #include <linux/log2.h>
32 #include <linux/dmi.h>
33 #include <linux/atomic.h>
34 #include <linux/crc16.h>
35
36 #include "kfd_priv.h"
37 #include "kfd_crat.h"
38 #include "kfd_topology.h"
39 #include "kfd_device_queue_manager.h"
40 #include "kfd_svm.h"
41 #include "kfd_debug.h"
42 #include "amdgpu_amdkfd.h"
43 #include "amdgpu_ras.h"
44 #include "amdgpu.h"
45
46 /* topology_device_list - Master list of all topology devices */
47 static struct list_head topology_device_list;
48 static struct kfd_system_properties sys_props;
49
50 static DECLARE_RWSEM(topology_lock);
51 static uint32_t topology_crat_proximity_domain;
52
kfd_topology_device_by_proximity_domain_no_lock(uint32_t proximity_domain)53 struct kfd_topology_device *kfd_topology_device_by_proximity_domain_no_lock(
54 uint32_t proximity_domain)
55 {
56 struct kfd_topology_device *top_dev;
57 struct kfd_topology_device *device = NULL;
58
59 list_for_each_entry(top_dev, &topology_device_list, list)
60 if (top_dev->proximity_domain == proximity_domain) {
61 device = top_dev;
62 break;
63 }
64
65 return device;
66 }
67
kfd_topology_device_by_proximity_domain(uint32_t proximity_domain)68 struct kfd_topology_device *kfd_topology_device_by_proximity_domain(
69 uint32_t proximity_domain)
70 {
71 struct kfd_topology_device *device = NULL;
72
73 down_read(&topology_lock);
74
75 device = kfd_topology_device_by_proximity_domain_no_lock(
76 proximity_domain);
77 up_read(&topology_lock);
78
79 return device;
80 }
81
kfd_topology_device_by_id(uint32_t gpu_id)82 struct kfd_topology_device *kfd_topology_device_by_id(uint32_t gpu_id)
83 {
84 struct kfd_topology_device *top_dev = NULL;
85 struct kfd_topology_device *ret = NULL;
86
87 down_read(&topology_lock);
88
89 list_for_each_entry(top_dev, &topology_device_list, list)
90 if (top_dev->gpu_id == gpu_id) {
91 ret = top_dev;
92 break;
93 }
94
95 up_read(&topology_lock);
96
97 return ret;
98 }
99
kfd_device_by_id(uint32_t gpu_id)100 struct kfd_node *kfd_device_by_id(uint32_t gpu_id)
101 {
102 struct kfd_topology_device *top_dev;
103
104 top_dev = kfd_topology_device_by_id(gpu_id);
105 if (!top_dev)
106 return NULL;
107
108 return top_dev->gpu;
109 }
110
111 /* Called with write topology_lock acquired */
kfd_release_topology_device(struct kfd_topology_device * dev)112 static void kfd_release_topology_device(struct kfd_topology_device *dev)
113 {
114 struct kfd_mem_properties *mem;
115 struct kfd_cache_properties *cache;
116 struct kfd_iolink_properties *iolink;
117 struct kfd_iolink_properties *p2plink;
118 struct kfd_perf_properties *perf;
119
120 list_del(&dev->list);
121
122 while (dev->mem_props.next != &dev->mem_props) {
123 mem = container_of(dev->mem_props.next,
124 struct kfd_mem_properties, list);
125 list_del(&mem->list);
126 kfree(mem);
127 }
128
129 while (dev->cache_props.next != &dev->cache_props) {
130 cache = container_of(dev->cache_props.next,
131 struct kfd_cache_properties, list);
132 list_del(&cache->list);
133 kfree(cache);
134 }
135
136 while (dev->io_link_props.next != &dev->io_link_props) {
137 iolink = container_of(dev->io_link_props.next,
138 struct kfd_iolink_properties, list);
139 list_del(&iolink->list);
140 kfree(iolink);
141 }
142
143 while (dev->p2p_link_props.next != &dev->p2p_link_props) {
144 p2plink = container_of(dev->p2p_link_props.next,
145 struct kfd_iolink_properties, list);
146 list_del(&p2plink->list);
147 kfree(p2plink);
148 }
149
150 while (dev->perf_props.next != &dev->perf_props) {
151 perf = container_of(dev->perf_props.next,
152 struct kfd_perf_properties, list);
153 list_del(&perf->list);
154 kfree(perf);
155 }
156
157 kfree(dev);
158 }
159
kfd_release_topology_device_list(struct list_head * device_list)160 void kfd_release_topology_device_list(struct list_head *device_list)
161 {
162 struct kfd_topology_device *dev;
163
164 while (!list_empty(device_list)) {
165 dev = list_first_entry(device_list,
166 struct kfd_topology_device, list);
167 kfd_release_topology_device(dev);
168 }
169 }
170
kfd_release_live_view(void)171 static void kfd_release_live_view(void)
172 {
173 kfd_release_topology_device_list(&topology_device_list);
174 memset(&sys_props, 0, sizeof(sys_props));
175 }
176
kfd_create_topology_device(struct list_head * device_list)177 struct kfd_topology_device *kfd_create_topology_device(
178 struct list_head *device_list)
179 {
180 struct kfd_topology_device *dev;
181
182 dev = kfd_alloc_struct(dev);
183 if (!dev) {
184 pr_err("No memory to allocate a topology device");
185 return NULL;
186 }
187
188 INIT_LIST_HEAD(&dev->mem_props);
189 INIT_LIST_HEAD(&dev->cache_props);
190 INIT_LIST_HEAD(&dev->io_link_props);
191 INIT_LIST_HEAD(&dev->p2p_link_props);
192 INIT_LIST_HEAD(&dev->perf_props);
193
194 list_add_tail(&dev->list, device_list);
195
196 return dev;
197 }
198
199
200 #define sysfs_show_gen_prop(buffer, offs, fmt, ...) \
201 (offs += snprintf(buffer+offs, PAGE_SIZE-offs, \
202 fmt, __VA_ARGS__))
203 #define sysfs_show_32bit_prop(buffer, offs, name, value) \
204 sysfs_show_gen_prop(buffer, offs, "%s %u\n", name, value)
205 #define sysfs_show_64bit_prop(buffer, offs, name, value) \
206 sysfs_show_gen_prop(buffer, offs, "%s %llu\n", name, value)
207 #define sysfs_show_32bit_val(buffer, offs, value) \
208 sysfs_show_gen_prop(buffer, offs, "%u\n", value)
209 #define sysfs_show_str_val(buffer, offs, value) \
210 sysfs_show_gen_prop(buffer, offs, "%s\n", value)
211
sysprops_show(struct kobject * kobj,struct attribute * attr,char * buffer)212 static ssize_t sysprops_show(struct kobject *kobj, struct attribute *attr,
213 char *buffer)
214 {
215 int offs = 0;
216
217 /* Making sure that the buffer is an empty string */
218 buffer[0] = 0;
219
220 if (attr == &sys_props.attr_genid) {
221 sysfs_show_32bit_val(buffer, offs,
222 sys_props.generation_count);
223 } else if (attr == &sys_props.attr_props) {
224 sysfs_show_64bit_prop(buffer, offs, "platform_oem",
225 sys_props.platform_oem);
226 sysfs_show_64bit_prop(buffer, offs, "platform_id",
227 sys_props.platform_id);
228 sysfs_show_64bit_prop(buffer, offs, "platform_rev",
229 sys_props.platform_rev);
230 } else {
231 offs = -EINVAL;
232 }
233
234 return offs;
235 }
236
kfd_topology_kobj_release(struct kobject * kobj)237 static void kfd_topology_kobj_release(struct kobject *kobj)
238 {
239 kfree(kobj);
240 }
241
242 static const struct sysfs_ops sysprops_ops = {
243 .show = sysprops_show,
244 };
245
246 static const struct kobj_type sysprops_type = {
247 .release = kfd_topology_kobj_release,
248 .sysfs_ops = &sysprops_ops,
249 };
250
iolink_show(struct kobject * kobj,struct attribute * attr,char * buffer)251 static ssize_t iolink_show(struct kobject *kobj, struct attribute *attr,
252 char *buffer)
253 {
254 int offs = 0;
255 struct kfd_iolink_properties *iolink;
256
257 /* Making sure that the buffer is an empty string */
258 buffer[0] = 0;
259
260 iolink = container_of(attr, struct kfd_iolink_properties, attr);
261 if (iolink->gpu && kfd_devcgroup_check_permission(iolink->gpu))
262 return -EPERM;
263 sysfs_show_32bit_prop(buffer, offs, "type", iolink->iolink_type);
264 sysfs_show_32bit_prop(buffer, offs, "version_major", iolink->ver_maj);
265 sysfs_show_32bit_prop(buffer, offs, "version_minor", iolink->ver_min);
266 sysfs_show_32bit_prop(buffer, offs, "node_from", iolink->node_from);
267 sysfs_show_32bit_prop(buffer, offs, "node_to", iolink->node_to);
268 sysfs_show_32bit_prop(buffer, offs, "weight", iolink->weight);
269 sysfs_show_32bit_prop(buffer, offs, "min_latency", iolink->min_latency);
270 sysfs_show_32bit_prop(buffer, offs, "max_latency", iolink->max_latency);
271 sysfs_show_32bit_prop(buffer, offs, "min_bandwidth",
272 iolink->min_bandwidth);
273 sysfs_show_32bit_prop(buffer, offs, "max_bandwidth",
274 iolink->max_bandwidth);
275 sysfs_show_32bit_prop(buffer, offs, "recommended_transfer_size",
276 iolink->rec_transfer_size);
277 sysfs_show_32bit_prop(buffer, offs, "recommended_sdma_engine_id_mask",
278 iolink->rec_sdma_eng_id_mask);
279 sysfs_show_32bit_prop(buffer, offs, "flags", iolink->flags);
280
281 return offs;
282 }
283
284 static const struct sysfs_ops iolink_ops = {
285 .show = iolink_show,
286 };
287
288 static const struct kobj_type iolink_type = {
289 .release = kfd_topology_kobj_release,
290 .sysfs_ops = &iolink_ops,
291 };
292
mem_show(struct kobject * kobj,struct attribute * attr,char * buffer)293 static ssize_t mem_show(struct kobject *kobj, struct attribute *attr,
294 char *buffer)
295 {
296 int offs = 0;
297 struct kfd_mem_properties *mem;
298
299 /* Making sure that the buffer is an empty string */
300 buffer[0] = 0;
301
302 mem = container_of(attr, struct kfd_mem_properties, attr);
303 if (mem->gpu && kfd_devcgroup_check_permission(mem->gpu))
304 return -EPERM;
305 sysfs_show_32bit_prop(buffer, offs, "heap_type", mem->heap_type);
306 sysfs_show_64bit_prop(buffer, offs, "size_in_bytes",
307 mem->size_in_bytes);
308 sysfs_show_32bit_prop(buffer, offs, "flags", mem->flags);
309 sysfs_show_32bit_prop(buffer, offs, "width", mem->width);
310 sysfs_show_32bit_prop(buffer, offs, "mem_clk_max",
311 mem->mem_clk_max);
312
313 return offs;
314 }
315
316 static const struct sysfs_ops mem_ops = {
317 .show = mem_show,
318 };
319
320 static const struct kobj_type mem_type = {
321 .release = kfd_topology_kobj_release,
322 .sysfs_ops = &mem_ops,
323 };
324
kfd_cache_show(struct kobject * kobj,struct attribute * attr,char * buffer)325 static ssize_t kfd_cache_show(struct kobject *kobj, struct attribute *attr,
326 char *buffer)
327 {
328 int offs = 0;
329 uint32_t i, j;
330 struct kfd_cache_properties *cache;
331
332 /* Making sure that the buffer is an empty string */
333 buffer[0] = 0;
334 cache = container_of(attr, struct kfd_cache_properties, attr);
335 if (cache->gpu && kfd_devcgroup_check_permission(cache->gpu))
336 return -EPERM;
337 sysfs_show_32bit_prop(buffer, offs, "processor_id_low",
338 cache->processor_id_low);
339 sysfs_show_32bit_prop(buffer, offs, "level", cache->cache_level);
340 sysfs_show_32bit_prop(buffer, offs, "size", cache->cache_size);
341 sysfs_show_32bit_prop(buffer, offs, "cache_line_size",
342 cache->cacheline_size);
343 sysfs_show_32bit_prop(buffer, offs, "cache_lines_per_tag",
344 cache->cachelines_per_tag);
345 sysfs_show_32bit_prop(buffer, offs, "association", cache->cache_assoc);
346 sysfs_show_32bit_prop(buffer, offs, "latency", cache->cache_latency);
347 sysfs_show_32bit_prop(buffer, offs, "type", cache->cache_type);
348
349 offs += snprintf(buffer+offs, PAGE_SIZE-offs, "sibling_map ");
350 for (i = 0; i < cache->sibling_map_size; i++)
351 for (j = 0; j < sizeof(cache->sibling_map[0])*8; j++)
352 /* Check each bit */
353 offs += snprintf(buffer+offs, PAGE_SIZE-offs, "%d,",
354 (cache->sibling_map[i] >> j) & 1);
355
356 /* Replace the last "," with end of line */
357 buffer[offs-1] = '\n';
358 return offs;
359 }
360
361 static const struct sysfs_ops cache_ops = {
362 .show = kfd_cache_show,
363 };
364
365 static const struct kobj_type cache_type = {
366 .release = kfd_topology_kobj_release,
367 .sysfs_ops = &cache_ops,
368 };
369
370 /****** Sysfs of Performance Counters ******/
371
372 struct kfd_perf_attr {
373 struct kobj_attribute attr;
374 uint32_t data;
375 };
376
perf_show(struct kobject * kobj,struct kobj_attribute * attrs,char * buf)377 static ssize_t perf_show(struct kobject *kobj, struct kobj_attribute *attrs,
378 char *buf)
379 {
380 int offs = 0;
381 struct kfd_perf_attr *attr;
382
383 buf[0] = 0;
384 attr = container_of(attrs, struct kfd_perf_attr, attr);
385 if (!attr->data) /* invalid data for PMC */
386 return 0;
387 else
388 return sysfs_show_32bit_val(buf, offs, attr->data);
389 }
390
391 #define KFD_PERF_DESC(_name, _data) \
392 { \
393 .attr = __ATTR(_name, 0444, perf_show, NULL), \
394 .data = _data, \
395 }
396
397 static struct kfd_perf_attr perf_attr_iommu[] = {
398 KFD_PERF_DESC(max_concurrent, 0),
399 KFD_PERF_DESC(num_counters, 0),
400 KFD_PERF_DESC(counter_ids, 0),
401 };
402 /****************************************/
403
node_show(struct kobject * kobj,struct attribute * attr,char * buffer)404 static ssize_t node_show(struct kobject *kobj, struct attribute *attr,
405 char *buffer)
406 {
407 int offs = 0;
408 struct kfd_topology_device *dev;
409 uint32_t log_max_watch_addr;
410
411 /* Making sure that the buffer is an empty string */
412 buffer[0] = 0;
413
414 if (strcmp(attr->name, "gpu_id") == 0) {
415 dev = container_of(attr, struct kfd_topology_device,
416 attr_gpuid);
417 if (dev->gpu && kfd_devcgroup_check_permission(dev->gpu))
418 return -EPERM;
419 return sysfs_show_32bit_val(buffer, offs, dev->gpu_id);
420 }
421
422 if (strcmp(attr->name, "name") == 0) {
423 dev = container_of(attr, struct kfd_topology_device,
424 attr_name);
425
426 if (dev->gpu && kfd_devcgroup_check_permission(dev->gpu))
427 return -EPERM;
428 return sysfs_show_str_val(buffer, offs, dev->node_props.name);
429 }
430
431 dev = container_of(attr, struct kfd_topology_device,
432 attr_props);
433 if (dev->gpu && kfd_devcgroup_check_permission(dev->gpu))
434 return -EPERM;
435 sysfs_show_32bit_prop(buffer, offs, "cpu_cores_count",
436 dev->node_props.cpu_cores_count);
437 sysfs_show_32bit_prop(buffer, offs, "simd_count",
438 dev->gpu ? dev->node_props.simd_count : 0);
439 sysfs_show_32bit_prop(buffer, offs, "mem_banks_count",
440 dev->node_props.mem_banks_count);
441 sysfs_show_32bit_prop(buffer, offs, "caches_count",
442 dev->node_props.caches_count);
443 sysfs_show_32bit_prop(buffer, offs, "io_links_count",
444 dev->node_props.io_links_count);
445 sysfs_show_32bit_prop(buffer, offs, "p2p_links_count",
446 dev->node_props.p2p_links_count);
447 sysfs_show_32bit_prop(buffer, offs, "cpu_core_id_base",
448 dev->node_props.cpu_core_id_base);
449 sysfs_show_32bit_prop(buffer, offs, "simd_id_base",
450 dev->node_props.simd_id_base);
451 sysfs_show_32bit_prop(buffer, offs, "max_waves_per_simd",
452 dev->node_props.max_waves_per_simd);
453 sysfs_show_32bit_prop(buffer, offs, "lds_size_in_kb",
454 dev->node_props.lds_size_in_kb);
455 sysfs_show_32bit_prop(buffer, offs, "gds_size_in_kb",
456 dev->node_props.gds_size_in_kb);
457 sysfs_show_32bit_prop(buffer, offs, "num_gws",
458 dev->node_props.num_gws);
459 sysfs_show_32bit_prop(buffer, offs, "wave_front_size",
460 dev->node_props.wave_front_size);
461 sysfs_show_32bit_prop(buffer, offs, "array_count",
462 dev->gpu ? (dev->node_props.array_count *
463 NUM_XCC(dev->gpu->xcc_mask)) : 0);
464 sysfs_show_32bit_prop(buffer, offs, "simd_arrays_per_engine",
465 dev->node_props.simd_arrays_per_engine);
466 sysfs_show_32bit_prop(buffer, offs, "cu_per_simd_array",
467 dev->node_props.cu_per_simd_array);
468 sysfs_show_32bit_prop(buffer, offs, "simd_per_cu",
469 dev->node_props.simd_per_cu);
470 sysfs_show_32bit_prop(buffer, offs, "max_slots_scratch_cu",
471 dev->node_props.max_slots_scratch_cu);
472 sysfs_show_32bit_prop(buffer, offs, "gfx_target_version",
473 dev->node_props.gfx_target_version);
474 sysfs_show_32bit_prop(buffer, offs, "vendor_id",
475 dev->node_props.vendor_id);
476 sysfs_show_32bit_prop(buffer, offs, "device_id",
477 dev->node_props.device_id);
478 sysfs_show_32bit_prop(buffer, offs, "location_id",
479 dev->node_props.location_id);
480 sysfs_show_32bit_prop(buffer, offs, "domain",
481 dev->node_props.domain);
482 sysfs_show_32bit_prop(buffer, offs, "drm_render_minor",
483 dev->node_props.drm_render_minor);
484 sysfs_show_64bit_prop(buffer, offs, "hive_id",
485 dev->node_props.hive_id);
486 sysfs_show_32bit_prop(buffer, offs, "num_sdma_engines",
487 dev->node_props.num_sdma_engines);
488 sysfs_show_32bit_prop(buffer, offs, "num_sdma_xgmi_engines",
489 dev->node_props.num_sdma_xgmi_engines);
490 sysfs_show_32bit_prop(buffer, offs, "num_sdma_queues_per_engine",
491 dev->node_props.num_sdma_queues_per_engine);
492 sysfs_show_32bit_prop(buffer, offs, "num_cp_queues",
493 dev->node_props.num_cp_queues);
494
495 if (dev->gpu) {
496 log_max_watch_addr =
497 __ilog2_u32(dev->gpu->kfd->device_info.num_of_watch_points);
498
499 if (log_max_watch_addr) {
500 dev->node_props.capability |=
501 HSA_CAP_WATCH_POINTS_SUPPORTED;
502
503 dev->node_props.capability |=
504 ((log_max_watch_addr <<
505 HSA_CAP_WATCH_POINTS_TOTALBITS_SHIFT) &
506 HSA_CAP_WATCH_POINTS_TOTALBITS_MASK);
507 }
508
509 if (dev->gpu->adev->asic_type == CHIP_TONGA)
510 dev->node_props.capability |=
511 HSA_CAP_AQL_QUEUE_DOUBLE_MAP;
512
513 if (KFD_GC_VERSION(dev->gpu) < IP_VERSION(10, 0, 0) &&
514 (dev->gpu->adev->sdma.supported_reset & AMDGPU_RESET_TYPE_PER_QUEUE))
515 dev->node_props.capability2 |= HSA_CAP2_PER_SDMA_QUEUE_RESET_SUPPORTED;
516
517 sysfs_show_32bit_prop(buffer, offs, "max_engine_clk_fcompute",
518 dev->node_props.max_engine_clk_fcompute);
519
520 sysfs_show_64bit_prop(buffer, offs, "local_mem_size", 0ULL);
521
522 sysfs_show_32bit_prop(buffer, offs, "fw_version",
523 dev->gpu->kfd->mec_fw_version);
524 sysfs_show_32bit_prop(buffer, offs, "capability",
525 dev->node_props.capability);
526 sysfs_show_32bit_prop(buffer, offs, "capability2",
527 dev->node_props.capability2);
528 sysfs_show_64bit_prop(buffer, offs, "debug_prop",
529 dev->node_props.debug_prop);
530 sysfs_show_32bit_prop(buffer, offs, "sdma_fw_version",
531 dev->gpu->kfd->sdma_fw_version);
532 sysfs_show_64bit_prop(buffer, offs, "unique_id",
533 dev->gpu->adev->unique_id);
534 sysfs_show_32bit_prop(buffer, offs, "num_xcc",
535 NUM_XCC(dev->gpu->xcc_mask));
536 }
537
538 return sysfs_show_32bit_prop(buffer, offs, "max_engine_clk_ccompute",
539 cpufreq_quick_get_max(0)/1000);
540 }
541
542 static const struct sysfs_ops node_ops = {
543 .show = node_show,
544 };
545
546 static const struct kobj_type node_type = {
547 .release = kfd_topology_kobj_release,
548 .sysfs_ops = &node_ops,
549 };
550
kfd_remove_sysfs_file(struct kobject * kobj,struct attribute * attr)551 static void kfd_remove_sysfs_file(struct kobject *kobj, struct attribute *attr)
552 {
553 sysfs_remove_file(kobj, attr);
554 kobject_del(kobj);
555 kobject_put(kobj);
556 }
557
kfd_remove_sysfs_node_entry(struct kfd_topology_device * dev)558 static void kfd_remove_sysfs_node_entry(struct kfd_topology_device *dev)
559 {
560 struct kfd_iolink_properties *p2plink;
561 struct kfd_iolink_properties *iolink;
562 struct kfd_cache_properties *cache;
563 struct kfd_mem_properties *mem;
564 struct kfd_perf_properties *perf;
565
566 if (dev->kobj_iolink) {
567 list_for_each_entry(iolink, &dev->io_link_props, list)
568 if (iolink->kobj) {
569 kfd_remove_sysfs_file(iolink->kobj,
570 &iolink->attr);
571 iolink->kobj = NULL;
572 }
573 kobject_del(dev->kobj_iolink);
574 kobject_put(dev->kobj_iolink);
575 dev->kobj_iolink = NULL;
576 }
577
578 if (dev->kobj_p2plink) {
579 list_for_each_entry(p2plink, &dev->p2p_link_props, list)
580 if (p2plink->kobj) {
581 kfd_remove_sysfs_file(p2plink->kobj,
582 &p2plink->attr);
583 p2plink->kobj = NULL;
584 }
585 kobject_del(dev->kobj_p2plink);
586 kobject_put(dev->kobj_p2plink);
587 dev->kobj_p2plink = NULL;
588 }
589
590 if (dev->kobj_cache) {
591 list_for_each_entry(cache, &dev->cache_props, list)
592 if (cache->kobj) {
593 kfd_remove_sysfs_file(cache->kobj,
594 &cache->attr);
595 cache->kobj = NULL;
596 }
597 kobject_del(dev->kobj_cache);
598 kobject_put(dev->kobj_cache);
599 dev->kobj_cache = NULL;
600 }
601
602 if (dev->kobj_mem) {
603 list_for_each_entry(mem, &dev->mem_props, list)
604 if (mem->kobj) {
605 kfd_remove_sysfs_file(mem->kobj, &mem->attr);
606 mem->kobj = NULL;
607 }
608 kobject_del(dev->kobj_mem);
609 kobject_put(dev->kobj_mem);
610 dev->kobj_mem = NULL;
611 }
612
613 if (dev->kobj_perf) {
614 list_for_each_entry(perf, &dev->perf_props, list) {
615 kfree(perf->attr_group);
616 perf->attr_group = NULL;
617 }
618 kobject_del(dev->kobj_perf);
619 kobject_put(dev->kobj_perf);
620 dev->kobj_perf = NULL;
621 }
622
623 if (dev->kobj_node) {
624 sysfs_remove_file(dev->kobj_node, &dev->attr_gpuid);
625 sysfs_remove_file(dev->kobj_node, &dev->attr_name);
626 sysfs_remove_file(dev->kobj_node, &dev->attr_props);
627 kobject_del(dev->kobj_node);
628 kobject_put(dev->kobj_node);
629 dev->kobj_node = NULL;
630 }
631 }
632
kfd_build_sysfs_node_entry(struct kfd_topology_device * dev,uint32_t id)633 static int kfd_build_sysfs_node_entry(struct kfd_topology_device *dev,
634 uint32_t id)
635 {
636 struct kfd_iolink_properties *p2plink;
637 struct kfd_iolink_properties *iolink;
638 struct kfd_cache_properties *cache;
639 struct kfd_mem_properties *mem;
640 struct kfd_perf_properties *perf;
641 int ret;
642 uint32_t i, num_attrs;
643 struct attribute **attrs;
644
645 if (WARN_ON(dev->kobj_node))
646 return -EEXIST;
647
648 /*
649 * Creating the sysfs folders
650 */
651 dev->kobj_node = kfd_alloc_struct(dev->kobj_node);
652 if (!dev->kobj_node)
653 return -ENOMEM;
654
655 ret = kobject_init_and_add(dev->kobj_node, &node_type,
656 sys_props.kobj_nodes, "%d", id);
657 if (ret < 0) {
658 kobject_put(dev->kobj_node);
659 return ret;
660 }
661
662 dev->kobj_mem = kobject_create_and_add("mem_banks", dev->kobj_node);
663 if (!dev->kobj_mem)
664 return -ENOMEM;
665
666 dev->kobj_cache = kobject_create_and_add("caches", dev->kobj_node);
667 if (!dev->kobj_cache)
668 return -ENOMEM;
669
670 dev->kobj_iolink = kobject_create_and_add("io_links", dev->kobj_node);
671 if (!dev->kobj_iolink)
672 return -ENOMEM;
673
674 dev->kobj_p2plink = kobject_create_and_add("p2p_links", dev->kobj_node);
675 if (!dev->kobj_p2plink)
676 return -ENOMEM;
677
678 dev->kobj_perf = kobject_create_and_add("perf", dev->kobj_node);
679 if (!dev->kobj_perf)
680 return -ENOMEM;
681
682 /*
683 * Creating sysfs files for node properties
684 */
685 dev->attr_gpuid.name = "gpu_id";
686 dev->attr_gpuid.mode = KFD_SYSFS_FILE_MODE;
687 sysfs_attr_init(&dev->attr_gpuid);
688 dev->attr_name.name = "name";
689 dev->attr_name.mode = KFD_SYSFS_FILE_MODE;
690 sysfs_attr_init(&dev->attr_name);
691 dev->attr_props.name = "properties";
692 dev->attr_props.mode = KFD_SYSFS_FILE_MODE;
693 sysfs_attr_init(&dev->attr_props);
694 ret = sysfs_create_file(dev->kobj_node, &dev->attr_gpuid);
695 if (ret < 0)
696 return ret;
697 ret = sysfs_create_file(dev->kobj_node, &dev->attr_name);
698 if (ret < 0)
699 return ret;
700 ret = sysfs_create_file(dev->kobj_node, &dev->attr_props);
701 if (ret < 0)
702 return ret;
703
704 i = 0;
705 list_for_each_entry(mem, &dev->mem_props, list) {
706 mem->kobj = kzalloc(sizeof(struct kobject), GFP_KERNEL);
707 if (!mem->kobj)
708 return -ENOMEM;
709 ret = kobject_init_and_add(mem->kobj, &mem_type,
710 dev->kobj_mem, "%d", i);
711 if (ret < 0) {
712 kobject_put(mem->kobj);
713 return ret;
714 }
715
716 mem->attr.name = "properties";
717 mem->attr.mode = KFD_SYSFS_FILE_MODE;
718 sysfs_attr_init(&mem->attr);
719 ret = sysfs_create_file(mem->kobj, &mem->attr);
720 if (ret < 0)
721 return ret;
722 i++;
723 }
724
725 i = 0;
726 list_for_each_entry(cache, &dev->cache_props, list) {
727 cache->kobj = kzalloc(sizeof(struct kobject), GFP_KERNEL);
728 if (!cache->kobj)
729 return -ENOMEM;
730 ret = kobject_init_and_add(cache->kobj, &cache_type,
731 dev->kobj_cache, "%d", i);
732 if (ret < 0) {
733 kobject_put(cache->kobj);
734 return ret;
735 }
736
737 cache->attr.name = "properties";
738 cache->attr.mode = KFD_SYSFS_FILE_MODE;
739 sysfs_attr_init(&cache->attr);
740 ret = sysfs_create_file(cache->kobj, &cache->attr);
741 if (ret < 0)
742 return ret;
743 i++;
744 }
745
746 i = 0;
747 list_for_each_entry(iolink, &dev->io_link_props, list) {
748 iolink->kobj = kzalloc(sizeof(struct kobject), GFP_KERNEL);
749 if (!iolink->kobj)
750 return -ENOMEM;
751 ret = kobject_init_and_add(iolink->kobj, &iolink_type,
752 dev->kobj_iolink, "%d", i);
753 if (ret < 0) {
754 kobject_put(iolink->kobj);
755 return ret;
756 }
757
758 iolink->attr.name = "properties";
759 iolink->attr.mode = KFD_SYSFS_FILE_MODE;
760 sysfs_attr_init(&iolink->attr);
761 ret = sysfs_create_file(iolink->kobj, &iolink->attr);
762 if (ret < 0)
763 return ret;
764 i++;
765 }
766
767 i = 0;
768 list_for_each_entry(p2plink, &dev->p2p_link_props, list) {
769 p2plink->kobj = kzalloc(sizeof(struct kobject), GFP_KERNEL);
770 if (!p2plink->kobj)
771 return -ENOMEM;
772 ret = kobject_init_and_add(p2plink->kobj, &iolink_type,
773 dev->kobj_p2plink, "%d", i);
774 if (ret < 0) {
775 kobject_put(p2plink->kobj);
776 return ret;
777 }
778
779 p2plink->attr.name = "properties";
780 p2plink->attr.mode = KFD_SYSFS_FILE_MODE;
781 sysfs_attr_init(&p2plink->attr);
782 ret = sysfs_create_file(p2plink->kobj, &p2plink->attr);
783 if (ret < 0)
784 return ret;
785 i++;
786 }
787
788 /* All hardware blocks have the same number of attributes. */
789 num_attrs = ARRAY_SIZE(perf_attr_iommu);
790 list_for_each_entry(perf, &dev->perf_props, list) {
791 perf->attr_group = kzalloc(sizeof(struct kfd_perf_attr)
792 * num_attrs + sizeof(struct attribute_group),
793 GFP_KERNEL);
794 if (!perf->attr_group)
795 return -ENOMEM;
796
797 attrs = (struct attribute **)(perf->attr_group + 1);
798 if (!strcmp(perf->block_name, "iommu")) {
799 /* Information of IOMMU's num_counters and counter_ids is shown
800 * under /sys/bus/event_source/devices/amd_iommu. We don't
801 * duplicate here.
802 */
803 perf_attr_iommu[0].data = perf->max_concurrent;
804 for (i = 0; i < num_attrs; i++)
805 attrs[i] = &perf_attr_iommu[i].attr.attr;
806 }
807 perf->attr_group->name = perf->block_name;
808 perf->attr_group->attrs = attrs;
809 ret = sysfs_create_group(dev->kobj_perf, perf->attr_group);
810 if (ret < 0)
811 return ret;
812 }
813
814 return 0;
815 }
816
817 /* Called with write topology lock acquired */
kfd_build_sysfs_node_tree(void)818 static int kfd_build_sysfs_node_tree(void)
819 {
820 struct kfd_topology_device *dev;
821 int ret;
822 uint32_t i = 0;
823
824 list_for_each_entry(dev, &topology_device_list, list) {
825 ret = kfd_build_sysfs_node_entry(dev, i);
826 if (ret < 0)
827 return ret;
828 i++;
829 }
830
831 return 0;
832 }
833
834 /* Called with write topology lock acquired */
kfd_remove_sysfs_node_tree(void)835 static void kfd_remove_sysfs_node_tree(void)
836 {
837 struct kfd_topology_device *dev;
838
839 list_for_each_entry(dev, &topology_device_list, list)
840 kfd_remove_sysfs_node_entry(dev);
841 }
842
kfd_topology_update_sysfs(void)843 static int kfd_topology_update_sysfs(void)
844 {
845 int ret;
846
847 if (!sys_props.kobj_topology) {
848 sys_props.kobj_topology =
849 kfd_alloc_struct(sys_props.kobj_topology);
850 if (!sys_props.kobj_topology)
851 return -ENOMEM;
852
853 ret = kobject_init_and_add(sys_props.kobj_topology,
854 &sysprops_type, &kfd_device->kobj,
855 "topology");
856 if (ret < 0) {
857 kobject_put(sys_props.kobj_topology);
858 return ret;
859 }
860
861 sys_props.kobj_nodes = kobject_create_and_add("nodes",
862 sys_props.kobj_topology);
863 if (!sys_props.kobj_nodes)
864 return -ENOMEM;
865
866 sys_props.attr_genid.name = "generation_id";
867 sys_props.attr_genid.mode = KFD_SYSFS_FILE_MODE;
868 sysfs_attr_init(&sys_props.attr_genid);
869 ret = sysfs_create_file(sys_props.kobj_topology,
870 &sys_props.attr_genid);
871 if (ret < 0)
872 return ret;
873
874 sys_props.attr_props.name = "system_properties";
875 sys_props.attr_props.mode = KFD_SYSFS_FILE_MODE;
876 sysfs_attr_init(&sys_props.attr_props);
877 ret = sysfs_create_file(sys_props.kobj_topology,
878 &sys_props.attr_props);
879 if (ret < 0)
880 return ret;
881 }
882
883 kfd_remove_sysfs_node_tree();
884
885 return kfd_build_sysfs_node_tree();
886 }
887
kfd_topology_release_sysfs(void)888 static void kfd_topology_release_sysfs(void)
889 {
890 kfd_remove_sysfs_node_tree();
891 if (sys_props.kobj_topology) {
892 sysfs_remove_file(sys_props.kobj_topology,
893 &sys_props.attr_genid);
894 sysfs_remove_file(sys_props.kobj_topology,
895 &sys_props.attr_props);
896 if (sys_props.kobj_nodes) {
897 kobject_del(sys_props.kobj_nodes);
898 kobject_put(sys_props.kobj_nodes);
899 sys_props.kobj_nodes = NULL;
900 }
901 kobject_del(sys_props.kobj_topology);
902 kobject_put(sys_props.kobj_topology);
903 sys_props.kobj_topology = NULL;
904 }
905 }
906
907 /* Called with write topology_lock acquired */
kfd_topology_update_device_list(struct list_head * temp_list,struct list_head * master_list)908 static void kfd_topology_update_device_list(struct list_head *temp_list,
909 struct list_head *master_list)
910 {
911 while (!list_empty(temp_list)) {
912 list_move_tail(temp_list->next, master_list);
913 sys_props.num_devices++;
914 }
915 }
916
kfd_debug_print_topology(void)917 static void kfd_debug_print_topology(void)
918 {
919 struct kfd_topology_device *dev;
920
921 down_read(&topology_lock);
922
923 dev = list_last_entry(&topology_device_list,
924 struct kfd_topology_device, list);
925 if (dev) {
926 if (dev->node_props.cpu_cores_count &&
927 dev->node_props.simd_count) {
928 pr_info("Topology: Add APU node [0x%0x:0x%0x]\n",
929 dev->node_props.device_id,
930 dev->node_props.vendor_id);
931 } else if (dev->node_props.cpu_cores_count)
932 pr_info("Topology: Add CPU node\n");
933 else if (dev->node_props.simd_count)
934 pr_info("Topology: Add dGPU node [0x%0x:0x%0x]\n",
935 dev->node_props.device_id,
936 dev->node_props.vendor_id);
937 }
938 up_read(&topology_lock);
939 }
940
941 /* Helper function for intializing platform_xx members of
942 * kfd_system_properties. Uses OEM info from the last CPU/APU node.
943 */
kfd_update_system_properties(void)944 static void kfd_update_system_properties(void)
945 {
946 struct kfd_topology_device *dev;
947
948 down_read(&topology_lock);
949 dev = list_last_entry(&topology_device_list,
950 struct kfd_topology_device, list);
951 if (dev) {
952 sys_props.platform_id = dev->oem_id64;
953 sys_props.platform_oem = *((uint64_t *)dev->oem_table_id);
954 sys_props.platform_rev = dev->oem_revision;
955 }
956 up_read(&topology_lock);
957 }
958
find_system_memory(const struct dmi_header * dm,void * private)959 static void find_system_memory(const struct dmi_header *dm, void *private)
960 {
961 struct dmi_mem_device *memdev = container_of(dm, struct dmi_mem_device, header);
962 struct kfd_mem_properties *mem;
963 struct kfd_topology_device *kdev =
964 (struct kfd_topology_device *)private;
965
966 if (memdev->header.type != DMI_ENTRY_MEM_DEVICE)
967 return;
968 if (memdev->header.length < sizeof(struct dmi_mem_device))
969 return;
970
971 list_for_each_entry(mem, &kdev->mem_props, list) {
972 if (memdev->total_width != 0xFFFF && memdev->total_width != 0)
973 mem->width = memdev->total_width;
974 if (memdev->speed != 0)
975 mem->mem_clk_max = memdev->speed;
976 }
977 }
978
979 /* kfd_add_non_crat_information - Add information that is not currently
980 * defined in CRAT but is necessary for KFD topology
981 * @dev - topology device to which addition info is added
982 */
kfd_add_non_crat_information(struct kfd_topology_device * kdev)983 static void kfd_add_non_crat_information(struct kfd_topology_device *kdev)
984 {
985 /* Check if CPU only node. */
986 if (!kdev->gpu) {
987 /* Add system memory information */
988 dmi_walk(find_system_memory, kdev);
989 }
990 /* TODO: For GPU node, rearrange code from kfd_topology_add_device */
991 }
992
kfd_topology_init(void)993 int kfd_topology_init(void)
994 {
995 void *crat_image = NULL;
996 size_t image_size = 0;
997 int ret;
998 struct list_head temp_topology_device_list;
999 int cpu_only_node = 0;
1000 struct kfd_topology_device *kdev;
1001 int proximity_domain;
1002
1003 /* topology_device_list - Master list of all topology devices
1004 * temp_topology_device_list - temporary list created while parsing CRAT
1005 * or VCRAT. Once parsing is complete the contents of list is moved to
1006 * topology_device_list
1007 */
1008
1009 /* Initialize the head for the both the lists */
1010 INIT_LIST_HEAD(&topology_device_list);
1011 INIT_LIST_HEAD(&temp_topology_device_list);
1012 init_rwsem(&topology_lock);
1013
1014 memset(&sys_props, 0, sizeof(sys_props));
1015
1016 /* Proximity domains in ACPI CRAT tables start counting at
1017 * 0. The same should be true for virtual CRAT tables created
1018 * at this stage. GPUs added later in kfd_topology_add_device
1019 * use a counter.
1020 */
1021 proximity_domain = 0;
1022
1023 ret = kfd_create_crat_image_virtual(&crat_image, &image_size,
1024 COMPUTE_UNIT_CPU, NULL,
1025 proximity_domain);
1026 cpu_only_node = 1;
1027 if (ret) {
1028 pr_err("Error creating VCRAT table for CPU\n");
1029 return ret;
1030 }
1031
1032 ret = kfd_parse_crat_table(crat_image,
1033 &temp_topology_device_list,
1034 proximity_domain);
1035 if (ret) {
1036 pr_err("Error parsing VCRAT table for CPU\n");
1037 goto err;
1038 }
1039
1040 kdev = list_first_entry(&temp_topology_device_list,
1041 struct kfd_topology_device, list);
1042
1043 down_write(&topology_lock);
1044 kfd_topology_update_device_list(&temp_topology_device_list,
1045 &topology_device_list);
1046 topology_crat_proximity_domain = sys_props.num_devices-1;
1047 ret = kfd_topology_update_sysfs();
1048 up_write(&topology_lock);
1049
1050 if (!ret) {
1051 sys_props.generation_count++;
1052 kfd_update_system_properties();
1053 kfd_debug_print_topology();
1054 } else
1055 pr_err("Failed to update topology in sysfs ret=%d\n", ret);
1056
1057 /* For nodes with GPU, this information gets added
1058 * when GPU is detected (kfd_topology_add_device).
1059 */
1060 if (cpu_only_node) {
1061 /* Add additional information to CPU only node created above */
1062 down_write(&topology_lock);
1063 kdev = list_first_entry(&topology_device_list,
1064 struct kfd_topology_device, list);
1065 up_write(&topology_lock);
1066 kfd_add_non_crat_information(kdev);
1067 }
1068
1069 err:
1070 kfd_destroy_crat_image(crat_image);
1071 return ret;
1072 }
1073
kfd_topology_shutdown(void)1074 void kfd_topology_shutdown(void)
1075 {
1076 down_write(&topology_lock);
1077 kfd_topology_release_sysfs();
1078 kfd_release_live_view();
1079 up_write(&topology_lock);
1080 }
1081
kfd_generate_gpu_id(struct kfd_node * gpu)1082 static uint32_t kfd_generate_gpu_id(struct kfd_node *gpu)
1083 {
1084 uint32_t gpu_id;
1085 uint32_t buf[8];
1086 uint64_t local_mem_size;
1087 struct kfd_topology_device *dev;
1088 bool is_unique;
1089 uint8_t *crc_buf;
1090
1091 if (!gpu)
1092 return 0;
1093
1094 crc_buf = (uint8_t *)&buf;
1095 local_mem_size = gpu->local_mem_info.local_mem_size_private +
1096 gpu->local_mem_info.local_mem_size_public;
1097 buf[0] = gpu->adev->pdev->devfn;
1098 buf[1] = gpu->adev->pdev->subsystem_vendor |
1099 (gpu->adev->pdev->subsystem_device << 16);
1100 buf[2] = pci_domain_nr(gpu->adev->pdev->bus);
1101 buf[3] = gpu->adev->pdev->device;
1102 buf[4] = gpu->adev->pdev->bus->number;
1103 buf[5] = lower_32_bits(local_mem_size);
1104 buf[6] = upper_32_bits(local_mem_size);
1105 buf[7] = (ffs(gpu->xcc_mask) - 1) | (NUM_XCC(gpu->xcc_mask) << 16);
1106
1107 gpu_id = crc16(0, crc_buf, sizeof(buf)) &
1108 ((1 << KFD_GPU_ID_HASH_WIDTH) - 1);
1109
1110 /* There is a very small possibility when generating a
1111 * 16 (KFD_GPU_ID_HASH_WIDTH) bit value from 8 word buffer
1112 * that the value could be 0 or non-unique. So, check if
1113 * it is unique and non-zero. If not unique increment till
1114 * unique one is found. In case of overflow, restart from 1
1115 */
1116
1117 down_read(&topology_lock);
1118 do {
1119 is_unique = true;
1120 if (!gpu_id)
1121 gpu_id = 1;
1122 list_for_each_entry(dev, &topology_device_list, list) {
1123 if (dev->gpu && dev->gpu_id == gpu_id) {
1124 is_unique = false;
1125 break;
1126 }
1127 }
1128 if (unlikely(!is_unique))
1129 gpu_id = (gpu_id + 1) &
1130 ((1 << KFD_GPU_ID_HASH_WIDTH) - 1);
1131 } while (!is_unique);
1132 up_read(&topology_lock);
1133
1134 return gpu_id;
1135 }
1136 /* kfd_assign_gpu - Attach @gpu to the correct kfd topology device. If
1137 * the GPU device is not already present in the topology device
1138 * list then return NULL. This means a new topology device has to
1139 * be created for this GPU.
1140 */
kfd_assign_gpu(struct kfd_node * gpu)1141 static struct kfd_topology_device *kfd_assign_gpu(struct kfd_node *gpu)
1142 {
1143 struct kfd_topology_device *dev;
1144 struct kfd_topology_device *out_dev = NULL;
1145 struct kfd_mem_properties *mem;
1146 struct kfd_cache_properties *cache;
1147 struct kfd_iolink_properties *iolink;
1148 struct kfd_iolink_properties *p2plink;
1149
1150 list_for_each_entry(dev, &topology_device_list, list) {
1151 /* Discrete GPUs need their own topology device list
1152 * entries. Don't assign them to CPU/APU nodes.
1153 */
1154 if (dev->node_props.cpu_cores_count)
1155 continue;
1156
1157 if (!dev->gpu && (dev->node_props.simd_count > 0)) {
1158 dev->gpu = gpu;
1159 out_dev = dev;
1160
1161 list_for_each_entry(mem, &dev->mem_props, list)
1162 mem->gpu = dev->gpu;
1163 list_for_each_entry(cache, &dev->cache_props, list)
1164 cache->gpu = dev->gpu;
1165 list_for_each_entry(iolink, &dev->io_link_props, list)
1166 iolink->gpu = dev->gpu;
1167 list_for_each_entry(p2plink, &dev->p2p_link_props, list)
1168 p2plink->gpu = dev->gpu;
1169 break;
1170 }
1171 }
1172 return out_dev;
1173 }
1174
kfd_notify_gpu_change(uint32_t gpu_id,int arrival)1175 static void kfd_notify_gpu_change(uint32_t gpu_id, int arrival)
1176 {
1177 /*
1178 * TODO: Generate an event for thunk about the arrival/removal
1179 * of the GPU
1180 */
1181 }
1182
1183 /* kfd_fill_mem_clk_max_info - Since CRAT doesn't have memory clock info,
1184 * patch this after CRAT parsing.
1185 */
kfd_fill_mem_clk_max_info(struct kfd_topology_device * dev)1186 static void kfd_fill_mem_clk_max_info(struct kfd_topology_device *dev)
1187 {
1188 struct kfd_mem_properties *mem;
1189 struct kfd_local_mem_info local_mem_info;
1190
1191 if (!dev)
1192 return;
1193
1194 /* Currently, amdgpu driver (amdgpu_mc) deals only with GPUs with
1195 * single bank of VRAM local memory.
1196 * for dGPUs - VCRAT reports only one bank of Local Memory
1197 * for APUs - If CRAT from ACPI reports more than one bank, then
1198 * all the banks will report the same mem_clk_max information
1199 */
1200 amdgpu_amdkfd_get_local_mem_info(dev->gpu->adev, &local_mem_info,
1201 dev->gpu->xcp);
1202
1203 list_for_each_entry(mem, &dev->mem_props, list)
1204 mem->mem_clk_max = local_mem_info.mem_clk_max;
1205 }
1206
kfd_set_iolink_no_atomics(struct kfd_topology_device * dev,struct kfd_topology_device * target_gpu_dev,struct kfd_iolink_properties * link)1207 static void kfd_set_iolink_no_atomics(struct kfd_topology_device *dev,
1208 struct kfd_topology_device *target_gpu_dev,
1209 struct kfd_iolink_properties *link)
1210 {
1211 /* xgmi always supports atomics between links. */
1212 if (link->iolink_type == CRAT_IOLINK_TYPE_XGMI)
1213 return;
1214
1215 /* check pcie support to set cpu(dev) flags for target_gpu_dev link. */
1216 if (target_gpu_dev) {
1217 uint32_t cap;
1218
1219 pcie_capability_read_dword(target_gpu_dev->gpu->adev->pdev,
1220 PCI_EXP_DEVCAP2, &cap);
1221
1222 if (!(cap & (PCI_EXP_DEVCAP2_ATOMIC_COMP32 |
1223 PCI_EXP_DEVCAP2_ATOMIC_COMP64)))
1224 link->flags |= CRAT_IOLINK_FLAGS_NO_ATOMICS_32_BIT |
1225 CRAT_IOLINK_FLAGS_NO_ATOMICS_64_BIT;
1226 /* set gpu (dev) flags. */
1227 } else {
1228 if (!dev->gpu->kfd->pci_atomic_requested ||
1229 dev->gpu->adev->asic_type == CHIP_HAWAII)
1230 link->flags |= CRAT_IOLINK_FLAGS_NO_ATOMICS_32_BIT |
1231 CRAT_IOLINK_FLAGS_NO_ATOMICS_64_BIT;
1232 }
1233 }
1234
kfd_set_iolink_non_coherent(struct kfd_topology_device * to_dev,struct kfd_iolink_properties * outbound_link,struct kfd_iolink_properties * inbound_link)1235 static void kfd_set_iolink_non_coherent(struct kfd_topology_device *to_dev,
1236 struct kfd_iolink_properties *outbound_link,
1237 struct kfd_iolink_properties *inbound_link)
1238 {
1239 /* CPU -> GPU with PCIe */
1240 if (!to_dev->gpu &&
1241 inbound_link->iolink_type == CRAT_IOLINK_TYPE_PCIEXPRESS)
1242 inbound_link->flags |= CRAT_IOLINK_FLAGS_NON_COHERENT;
1243
1244 if (to_dev->gpu) {
1245 /* GPU <-> GPU with PCIe and
1246 * Vega20 with XGMI
1247 */
1248 if (inbound_link->iolink_type == CRAT_IOLINK_TYPE_PCIEXPRESS ||
1249 (inbound_link->iolink_type == CRAT_IOLINK_TYPE_XGMI &&
1250 KFD_GC_VERSION(to_dev->gpu) == IP_VERSION(9, 4, 0))) {
1251 outbound_link->flags |= CRAT_IOLINK_FLAGS_NON_COHERENT;
1252 inbound_link->flags |= CRAT_IOLINK_FLAGS_NON_COHERENT;
1253 }
1254 }
1255 }
1256
1257 #define REC_SDMA_NUM_GPU 8
1258 static const int rec_sdma_eng_map[REC_SDMA_NUM_GPU][REC_SDMA_NUM_GPU] = {
1259 { -1, 14, 12, 2, 4, 8, 10, 6 },
1260 { 14, -1, 2, 10, 8, 4, 6, 12 },
1261 { 10, 2, -1, 12, 14, 6, 4, 8 },
1262 { 2, 12, 10, -1, 6, 14, 8, 4 },
1263 { 4, 8, 14, 6, -1, 10, 12, 2 },
1264 { 8, 4, 6, 14, 12, -1, 2, 10 },
1265 { 10, 6, 4, 8, 12, 2, -1, 14 },
1266 { 6, 12, 8, 4, 2, 10, 14, -1 }};
1267
kfd_set_recommended_sdma_engines(struct kfd_topology_device * to_dev,struct kfd_iolink_properties * outbound_link,struct kfd_iolink_properties * inbound_link)1268 static void kfd_set_recommended_sdma_engines(struct kfd_topology_device *to_dev,
1269 struct kfd_iolink_properties *outbound_link,
1270 struct kfd_iolink_properties *inbound_link)
1271 {
1272 struct kfd_node *gpu = outbound_link->gpu;
1273 struct amdgpu_device *adev = gpu->adev;
1274 unsigned int num_xgmi_nodes = adev->gmc.xgmi.num_physical_nodes;
1275 unsigned int num_xgmi_sdma_engines = kfd_get_num_xgmi_sdma_engines(gpu);
1276 unsigned int num_sdma_engines = kfd_get_num_sdma_engines(gpu);
1277 uint32_t sdma_eng_id_mask = (1 << num_sdma_engines) - 1;
1278 uint32_t xgmi_sdma_eng_id_mask =
1279 ((1 << num_xgmi_sdma_engines) - 1) << num_sdma_engines;
1280
1281 bool support_rec_eng = !amdgpu_sriov_vf(adev) && to_dev->gpu &&
1282 adev->aid_mask && num_xgmi_nodes && gpu->kfd->num_nodes == 1 &&
1283 num_xgmi_sdma_engines >= 6 && (!(adev->flags & AMD_IS_APU) &&
1284 num_xgmi_nodes == 8);
1285
1286 if (support_rec_eng) {
1287 int src_socket_id = adev->gmc.xgmi.physical_node_id;
1288 int dst_socket_id = to_dev->gpu->adev->gmc.xgmi.physical_node_id;
1289 unsigned int reshift = num_xgmi_sdma_engines == 6 ? 1 : 0;
1290
1291 outbound_link->rec_sdma_eng_id_mask =
1292 1 << (rec_sdma_eng_map[src_socket_id][dst_socket_id] >> reshift);
1293 inbound_link->rec_sdma_eng_id_mask =
1294 1 << (rec_sdma_eng_map[dst_socket_id][src_socket_id] >> reshift);
1295
1296 /* If recommended engine is out of range, need to reset the mask */
1297 if (outbound_link->rec_sdma_eng_id_mask & sdma_eng_id_mask)
1298 outbound_link->rec_sdma_eng_id_mask = xgmi_sdma_eng_id_mask;
1299 if (inbound_link->rec_sdma_eng_id_mask & sdma_eng_id_mask)
1300 inbound_link->rec_sdma_eng_id_mask = xgmi_sdma_eng_id_mask;
1301
1302 } else {
1303 uint32_t engine_mask = (outbound_link->iolink_type == CRAT_IOLINK_TYPE_XGMI &&
1304 num_xgmi_sdma_engines && to_dev->gpu) ? xgmi_sdma_eng_id_mask :
1305 sdma_eng_id_mask;
1306
1307 outbound_link->rec_sdma_eng_id_mask = engine_mask;
1308 inbound_link->rec_sdma_eng_id_mask = engine_mask;
1309 }
1310 }
1311
kfd_fill_iolink_non_crat_info(struct kfd_topology_device * dev)1312 static void kfd_fill_iolink_non_crat_info(struct kfd_topology_device *dev)
1313 {
1314 struct kfd_iolink_properties *link, *inbound_link;
1315 struct kfd_topology_device *peer_dev;
1316
1317 if (!dev || !dev->gpu)
1318 return;
1319
1320 /* GPU only creates direct links so apply flags setting to all */
1321 list_for_each_entry(link, &dev->io_link_props, list) {
1322 link->flags = CRAT_IOLINK_FLAGS_ENABLED;
1323 kfd_set_iolink_no_atomics(dev, NULL, link);
1324 peer_dev = kfd_topology_device_by_proximity_domain(
1325 link->node_to);
1326
1327 if (!peer_dev)
1328 continue;
1329
1330 /* Include the CPU peer in GPU hive if connected over xGMI. */
1331 if (!peer_dev->gpu &&
1332 link->iolink_type == CRAT_IOLINK_TYPE_XGMI) {
1333 /*
1334 * If the GPU is not part of a GPU hive, use its pci
1335 * device location as the hive ID to bind with the CPU.
1336 */
1337 if (!dev->node_props.hive_id)
1338 dev->node_props.hive_id = pci_dev_id(dev->gpu->adev->pdev);
1339 peer_dev->node_props.hive_id = dev->node_props.hive_id;
1340 }
1341
1342 list_for_each_entry(inbound_link, &peer_dev->io_link_props,
1343 list) {
1344 if (inbound_link->node_to != link->node_from)
1345 continue;
1346
1347 inbound_link->flags = CRAT_IOLINK_FLAGS_ENABLED;
1348 kfd_set_iolink_no_atomics(peer_dev, dev, inbound_link);
1349 kfd_set_iolink_non_coherent(peer_dev, link, inbound_link);
1350 kfd_set_recommended_sdma_engines(peer_dev, link, inbound_link);
1351 }
1352 }
1353
1354 /* Create indirect links so apply flags setting to all */
1355 list_for_each_entry(link, &dev->p2p_link_props, list) {
1356 link->flags = CRAT_IOLINK_FLAGS_ENABLED;
1357 kfd_set_iolink_no_atomics(dev, NULL, link);
1358 peer_dev = kfd_topology_device_by_proximity_domain(
1359 link->node_to);
1360
1361 if (!peer_dev)
1362 continue;
1363
1364 list_for_each_entry(inbound_link, &peer_dev->p2p_link_props,
1365 list) {
1366 if (inbound_link->node_to != link->node_from)
1367 continue;
1368
1369 inbound_link->flags = CRAT_IOLINK_FLAGS_ENABLED;
1370 kfd_set_iolink_no_atomics(peer_dev, dev, inbound_link);
1371 kfd_set_iolink_non_coherent(peer_dev, link, inbound_link);
1372 }
1373 }
1374 }
1375
kfd_build_p2p_node_entry(struct kfd_topology_device * dev,struct kfd_iolink_properties * p2plink)1376 static int kfd_build_p2p_node_entry(struct kfd_topology_device *dev,
1377 struct kfd_iolink_properties *p2plink)
1378 {
1379 int ret;
1380
1381 p2plink->kobj = kzalloc(sizeof(struct kobject), GFP_KERNEL);
1382 if (!p2plink->kobj)
1383 return -ENOMEM;
1384
1385 ret = kobject_init_and_add(p2plink->kobj, &iolink_type,
1386 dev->kobj_p2plink, "%d", dev->node_props.p2p_links_count - 1);
1387 if (ret < 0) {
1388 kobject_put(p2plink->kobj);
1389 return ret;
1390 }
1391
1392 p2plink->attr.name = "properties";
1393 p2plink->attr.mode = KFD_SYSFS_FILE_MODE;
1394 sysfs_attr_init(&p2plink->attr);
1395 ret = sysfs_create_file(p2plink->kobj, &p2plink->attr);
1396 if (ret < 0)
1397 return ret;
1398
1399 return 0;
1400 }
1401
kfd_create_indirect_link_prop(struct kfd_topology_device * kdev,int gpu_node)1402 static int kfd_create_indirect_link_prop(struct kfd_topology_device *kdev, int gpu_node)
1403 {
1404 struct kfd_iolink_properties *gpu_link, *tmp_link, *cpu_link;
1405 struct kfd_iolink_properties *props = NULL, *props2 = NULL;
1406 struct kfd_topology_device *cpu_dev;
1407 int ret = 0;
1408 int i, num_cpu;
1409
1410 num_cpu = 0;
1411 list_for_each_entry(cpu_dev, &topology_device_list, list) {
1412 if (cpu_dev->gpu)
1413 break;
1414 num_cpu++;
1415 }
1416
1417 if (list_empty(&kdev->io_link_props))
1418 return -ENODATA;
1419
1420 gpu_link = list_first_entry(&kdev->io_link_props,
1421 struct kfd_iolink_properties, list);
1422
1423 for (i = 0; i < num_cpu; i++) {
1424 /* CPU <--> GPU */
1425 if (gpu_link->node_to == i)
1426 continue;
1427
1428 /* find CPU <--> CPU links */
1429 cpu_link = NULL;
1430 cpu_dev = kfd_topology_device_by_proximity_domain(i);
1431 if (cpu_dev) {
1432 list_for_each_entry(tmp_link,
1433 &cpu_dev->io_link_props, list) {
1434 if (tmp_link->node_to == gpu_link->node_to) {
1435 cpu_link = tmp_link;
1436 break;
1437 }
1438 }
1439 }
1440
1441 if (!cpu_link)
1442 return -ENOMEM;
1443
1444 /* CPU <--> CPU <--> GPU, GPU node*/
1445 props = kfd_alloc_struct(props);
1446 if (!props)
1447 return -ENOMEM;
1448
1449 memcpy(props, gpu_link, sizeof(struct kfd_iolink_properties));
1450 props->weight = gpu_link->weight + cpu_link->weight;
1451 props->min_latency = gpu_link->min_latency + cpu_link->min_latency;
1452 props->max_latency = gpu_link->max_latency + cpu_link->max_latency;
1453 props->min_bandwidth = min(gpu_link->min_bandwidth, cpu_link->min_bandwidth);
1454 props->max_bandwidth = min(gpu_link->max_bandwidth, cpu_link->max_bandwidth);
1455
1456 props->node_from = gpu_node;
1457 props->node_to = i;
1458 kdev->node_props.p2p_links_count++;
1459 list_add_tail(&props->list, &kdev->p2p_link_props);
1460 ret = kfd_build_p2p_node_entry(kdev, props);
1461 if (ret < 0)
1462 return ret;
1463
1464 /* for small Bar, no CPU --> GPU in-direct links */
1465 if (kfd_dev_is_large_bar(kdev->gpu)) {
1466 /* CPU <--> CPU <--> GPU, CPU node*/
1467 props2 = kfd_alloc_struct(props2);
1468 if (!props2)
1469 return -ENOMEM;
1470
1471 memcpy(props2, props, sizeof(struct kfd_iolink_properties));
1472 props2->node_from = i;
1473 props2->node_to = gpu_node;
1474 props2->kobj = NULL;
1475 cpu_dev->node_props.p2p_links_count++;
1476 list_add_tail(&props2->list, &cpu_dev->p2p_link_props);
1477 ret = kfd_build_p2p_node_entry(cpu_dev, props2);
1478 if (ret < 0)
1479 return ret;
1480 }
1481 }
1482 return ret;
1483 }
1484
1485 #if defined(CONFIG_HSA_AMD_P2P)
kfd_add_peer_prop(struct kfd_topology_device * kdev,struct kfd_topology_device * peer,int from,int to)1486 static int kfd_add_peer_prop(struct kfd_topology_device *kdev,
1487 struct kfd_topology_device *peer, int from, int to)
1488 {
1489 struct kfd_iolink_properties *props = NULL;
1490 struct kfd_iolink_properties *iolink1, *iolink2, *iolink3;
1491 struct kfd_topology_device *cpu_dev;
1492 int ret = 0;
1493
1494 if (!amdgpu_device_is_peer_accessible(
1495 kdev->gpu->adev,
1496 peer->gpu->adev))
1497 return ret;
1498
1499 if (list_empty(&kdev->io_link_props))
1500 return -ENODATA;
1501
1502 iolink1 = list_first_entry(&kdev->io_link_props,
1503 struct kfd_iolink_properties, list);
1504
1505 if (list_empty(&peer->io_link_props))
1506 return -ENODATA;
1507
1508 iolink2 = list_first_entry(&peer->io_link_props,
1509 struct kfd_iolink_properties, list);
1510
1511 props = kfd_alloc_struct(props);
1512 if (!props)
1513 return -ENOMEM;
1514
1515 memcpy(props, iolink1, sizeof(struct kfd_iolink_properties));
1516
1517 props->weight = iolink1->weight + iolink2->weight;
1518 props->min_latency = iolink1->min_latency + iolink2->min_latency;
1519 props->max_latency = iolink1->max_latency + iolink2->max_latency;
1520 props->min_bandwidth = min(iolink1->min_bandwidth, iolink2->min_bandwidth);
1521 props->max_bandwidth = min(iolink2->max_bandwidth, iolink2->max_bandwidth);
1522
1523 if (iolink1->node_to != iolink2->node_to) {
1524 /* CPU->CPU link*/
1525 cpu_dev = kfd_topology_device_by_proximity_domain(iolink1->node_to);
1526 if (cpu_dev) {
1527 list_for_each_entry(iolink3, &cpu_dev->io_link_props, list) {
1528 if (iolink3->node_to != iolink2->node_to)
1529 continue;
1530
1531 props->weight += iolink3->weight;
1532 props->min_latency += iolink3->min_latency;
1533 props->max_latency += iolink3->max_latency;
1534 props->min_bandwidth = min(props->min_bandwidth,
1535 iolink3->min_bandwidth);
1536 props->max_bandwidth = min(props->max_bandwidth,
1537 iolink3->max_bandwidth);
1538 break;
1539 }
1540 } else {
1541 WARN(1, "CPU node not found");
1542 }
1543 }
1544
1545 props->node_from = from;
1546 props->node_to = to;
1547 peer->node_props.p2p_links_count++;
1548 list_add_tail(&props->list, &peer->p2p_link_props);
1549 ret = kfd_build_p2p_node_entry(peer, props);
1550
1551 return ret;
1552 }
1553 #endif
1554
kfd_dev_create_p2p_links(void)1555 static int kfd_dev_create_p2p_links(void)
1556 {
1557 struct kfd_topology_device *dev;
1558 struct kfd_topology_device *new_dev;
1559 #if defined(CONFIG_HSA_AMD_P2P)
1560 uint32_t i;
1561 #endif
1562 uint32_t k;
1563 int ret = 0;
1564
1565 k = 0;
1566 list_for_each_entry(dev, &topology_device_list, list)
1567 k++;
1568 if (k < 2)
1569 return 0;
1570
1571 new_dev = list_last_entry(&topology_device_list, struct kfd_topology_device, list);
1572 if (WARN_ON(!new_dev->gpu))
1573 return 0;
1574
1575 k--;
1576
1577 /* create in-direct links */
1578 ret = kfd_create_indirect_link_prop(new_dev, k);
1579 if (ret < 0)
1580 goto out;
1581
1582 /* create p2p links */
1583 #if defined(CONFIG_HSA_AMD_P2P)
1584 i = 0;
1585 list_for_each_entry(dev, &topology_device_list, list) {
1586 if (dev == new_dev)
1587 break;
1588 if (!dev->gpu || !dev->gpu->adev ||
1589 (dev->gpu->kfd->hive_id &&
1590 dev->gpu->kfd->hive_id == new_dev->gpu->kfd->hive_id &&
1591 amdgpu_xgmi_get_is_sharing_enabled(dev->gpu->adev, new_dev->gpu->adev)))
1592 goto next;
1593
1594 /* check if node(s) is/are peer accessible in one direction or bi-direction */
1595 ret = kfd_add_peer_prop(new_dev, dev, i, k);
1596 if (ret < 0)
1597 goto out;
1598
1599 ret = kfd_add_peer_prop(dev, new_dev, k, i);
1600 if (ret < 0)
1601 goto out;
1602 next:
1603 i++;
1604 }
1605 #endif
1606
1607 out:
1608 return ret;
1609 }
1610
1611 /* Helper function. See kfd_fill_gpu_cache_info for parameter description */
fill_in_l1_pcache(struct kfd_cache_properties ** props_ext,struct kfd_gpu_cache_info * pcache_info,int cu_bitmask,int cache_type,unsigned int cu_processor_id,int cu_block)1612 static int fill_in_l1_pcache(struct kfd_cache_properties **props_ext,
1613 struct kfd_gpu_cache_info *pcache_info,
1614 int cu_bitmask,
1615 int cache_type, unsigned int cu_processor_id,
1616 int cu_block)
1617 {
1618 unsigned int cu_sibling_map_mask;
1619 int first_active_cu;
1620 struct kfd_cache_properties *pcache = NULL;
1621
1622 cu_sibling_map_mask = cu_bitmask;
1623 cu_sibling_map_mask >>= cu_block;
1624 cu_sibling_map_mask &= ((1 << pcache_info[cache_type].num_cu_shared) - 1);
1625 first_active_cu = ffs(cu_sibling_map_mask);
1626
1627 /* CU could be inactive. In case of shared cache find the first active
1628 * CU. and incase of non-shared cache check if the CU is inactive. If
1629 * inactive active skip it
1630 */
1631 if (first_active_cu) {
1632 pcache = kfd_alloc_struct(pcache);
1633 if (!pcache)
1634 return -ENOMEM;
1635
1636 memset(pcache, 0, sizeof(struct kfd_cache_properties));
1637 pcache->processor_id_low = cu_processor_id + (first_active_cu - 1);
1638 pcache->cache_level = pcache_info[cache_type].cache_level;
1639 pcache->cache_size = pcache_info[cache_type].cache_size;
1640 pcache->cacheline_size = pcache_info[cache_type].cache_line_size;
1641
1642 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_DATA_CACHE)
1643 pcache->cache_type |= HSA_CACHE_TYPE_DATA;
1644 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_INST_CACHE)
1645 pcache->cache_type |= HSA_CACHE_TYPE_INSTRUCTION;
1646 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_CPU_CACHE)
1647 pcache->cache_type |= HSA_CACHE_TYPE_CPU;
1648 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_SIMD_CACHE)
1649 pcache->cache_type |= HSA_CACHE_TYPE_HSACU;
1650
1651 /* Sibling map is w.r.t processor_id_low, so shift out
1652 * inactive CU
1653 */
1654 cu_sibling_map_mask =
1655 cu_sibling_map_mask >> (first_active_cu - 1);
1656
1657 pcache->sibling_map[0] = (uint8_t)(cu_sibling_map_mask & 0xFF);
1658 pcache->sibling_map[1] =
1659 (uint8_t)((cu_sibling_map_mask >> 8) & 0xFF);
1660 pcache->sibling_map[2] =
1661 (uint8_t)((cu_sibling_map_mask >> 16) & 0xFF);
1662 pcache->sibling_map[3] =
1663 (uint8_t)((cu_sibling_map_mask >> 24) & 0xFF);
1664
1665 pcache->sibling_map_size = 4;
1666 *props_ext = pcache;
1667
1668 return 0;
1669 }
1670 return 1;
1671 }
1672
1673 /* Helper function. See kfd_fill_gpu_cache_info for parameter description */
fill_in_l2_l3_pcache(struct kfd_cache_properties ** props_ext,struct kfd_gpu_cache_info * pcache_info,struct amdgpu_cu_info * cu_info,struct amdgpu_gfx_config * gfx_info,int cache_type,unsigned int cu_processor_id,struct kfd_node * knode)1674 static int fill_in_l2_l3_pcache(struct kfd_cache_properties **props_ext,
1675 struct kfd_gpu_cache_info *pcache_info,
1676 struct amdgpu_cu_info *cu_info,
1677 struct amdgpu_gfx_config *gfx_info,
1678 int cache_type, unsigned int cu_processor_id,
1679 struct kfd_node *knode)
1680 {
1681 unsigned int cu_sibling_map_mask = 0;
1682 int first_active_cu;
1683 int i, j, k, xcc, start, end;
1684 int num_xcc = NUM_XCC(knode->xcc_mask);
1685 struct kfd_cache_properties *pcache = NULL;
1686 enum amdgpu_memory_partition mode;
1687 struct amdgpu_device *adev = knode->adev;
1688 bool found = false;
1689
1690 start = ffs(knode->xcc_mask) - 1;
1691 end = start + num_xcc;
1692
1693 /* To find the bitmap in the first active cu in the first
1694 * xcc, it is based on the assumption that evrey xcc must
1695 * have at least one active cu.
1696 */
1697 for (i = 0; i < gfx_info->max_shader_engines && !found; i++) {
1698 for (j = 0; j < gfx_info->max_sh_per_se && !found; j++) {
1699 if (cu_info->bitmap[start][i % 4][j % 4]) {
1700 cu_sibling_map_mask =
1701 cu_info->bitmap[start][i % 4][j % 4];
1702 found = true;
1703 }
1704 }
1705 }
1706
1707 cu_sibling_map_mask &=
1708 ((1 << pcache_info[cache_type].num_cu_shared) - 1);
1709 first_active_cu = ffs(cu_sibling_map_mask);
1710
1711 /* CU could be inactive. In case of shared cache find the first active
1712 * CU. and incase of non-shared cache check if the CU is inactive. If
1713 * inactive active skip it
1714 */
1715 if (first_active_cu) {
1716 pcache = kfd_alloc_struct(pcache);
1717 if (!pcache)
1718 return -ENOMEM;
1719
1720 memset(pcache, 0, sizeof(struct kfd_cache_properties));
1721 pcache->processor_id_low = cu_processor_id
1722 + (first_active_cu - 1);
1723 pcache->cache_level = pcache_info[cache_type].cache_level;
1724 pcache->cacheline_size = pcache_info[cache_type].cache_line_size;
1725
1726 if (KFD_GC_VERSION(knode) == IP_VERSION(9, 4, 3) ||
1727 KFD_GC_VERSION(knode) == IP_VERSION(9, 4, 4) ||
1728 KFD_GC_VERSION(knode) == IP_VERSION(9, 5, 0))
1729 mode = adev->gmc.gmc_funcs->query_mem_partition_mode(adev);
1730 else
1731 mode = UNKNOWN_MEMORY_PARTITION_MODE;
1732
1733 pcache->cache_size = pcache_info[cache_type].cache_size;
1734 /* Partition mode only affects L3 cache size */
1735 if (mode && pcache->cache_level == 3)
1736 pcache->cache_size /= mode;
1737
1738 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_DATA_CACHE)
1739 pcache->cache_type |= HSA_CACHE_TYPE_DATA;
1740 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_INST_CACHE)
1741 pcache->cache_type |= HSA_CACHE_TYPE_INSTRUCTION;
1742 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_CPU_CACHE)
1743 pcache->cache_type |= HSA_CACHE_TYPE_CPU;
1744 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_SIMD_CACHE)
1745 pcache->cache_type |= HSA_CACHE_TYPE_HSACU;
1746
1747 /* Sibling map is w.r.t processor_id_low, so shift out
1748 * inactive CU
1749 */
1750 cu_sibling_map_mask = cu_sibling_map_mask >> (first_active_cu - 1);
1751 k = 0;
1752
1753 for (xcc = start; xcc < end; xcc++) {
1754 for (i = 0; i < gfx_info->max_shader_engines; i++) {
1755 for (j = 0; j < gfx_info->max_sh_per_se; j++) {
1756 pcache->sibling_map[k] = (uint8_t)(cu_sibling_map_mask & 0xFF);
1757 pcache->sibling_map[k+1] = (uint8_t)((cu_sibling_map_mask >> 8) & 0xFF);
1758 pcache->sibling_map[k+2] = (uint8_t)((cu_sibling_map_mask >> 16) & 0xFF);
1759 pcache->sibling_map[k+3] = (uint8_t)((cu_sibling_map_mask >> 24) & 0xFF);
1760 k += 4;
1761
1762 cu_sibling_map_mask = cu_info->bitmap[xcc][i % 4][j + i / 4];
1763 cu_sibling_map_mask &= ((1 << pcache_info[cache_type].num_cu_shared) - 1);
1764 }
1765 }
1766 }
1767 pcache->sibling_map_size = k;
1768 *props_ext = pcache;
1769 return 0;
1770 }
1771 return 1;
1772 }
1773
1774 #define KFD_MAX_CACHE_TYPES 6
1775
1776 /* kfd_fill_cache_non_crat_info - Fill GPU cache info using kfd_gpu_cache_info
1777 * tables
1778 */
kfd_fill_cache_non_crat_info(struct kfd_topology_device * dev,struct kfd_node * kdev)1779 static void kfd_fill_cache_non_crat_info(struct kfd_topology_device *dev, struct kfd_node *kdev)
1780 {
1781 struct kfd_gpu_cache_info *pcache_info = NULL;
1782 int i, j, k, xcc, start, end;
1783 int ct = 0;
1784 unsigned int cu_processor_id;
1785 int ret;
1786 unsigned int num_cu_shared;
1787 struct amdgpu_cu_info *cu_info = &kdev->adev->gfx.cu_info;
1788 struct amdgpu_gfx_config *gfx_info = &kdev->adev->gfx.config;
1789 int gpu_processor_id;
1790 struct kfd_cache_properties *props_ext = NULL;
1791 int num_of_entries = 0;
1792 int num_of_cache_types = 0;
1793 struct kfd_gpu_cache_info cache_info[KFD_MAX_CACHE_TYPES];
1794
1795
1796 gpu_processor_id = dev->node_props.simd_id_base;
1797
1798 memset(cache_info, 0, sizeof(cache_info));
1799 pcache_info = cache_info;
1800 num_of_cache_types = kfd_get_gpu_cache_info(kdev, &pcache_info);
1801 if (!num_of_cache_types) {
1802 pr_warn("no cache info found\n");
1803 return;
1804 }
1805
1806 /* For each type of cache listed in the kfd_gpu_cache_info table,
1807 * go through all available Compute Units.
1808 * The [i,j,k] loop will
1809 * if kfd_gpu_cache_info.num_cu_shared = 1
1810 * will parse through all available CU
1811 * If (kfd_gpu_cache_info.num_cu_shared != 1)
1812 * then it will consider only one CU from
1813 * the shared unit
1814 */
1815 start = ffs(kdev->xcc_mask) - 1;
1816 end = start + NUM_XCC(kdev->xcc_mask);
1817
1818 for (ct = 0; ct < num_of_cache_types; ct++) {
1819 cu_processor_id = gpu_processor_id;
1820 if (pcache_info[ct].cache_level == 1) {
1821 for (xcc = start; xcc < end; xcc++) {
1822 for (i = 0; i < gfx_info->max_shader_engines; i++) {
1823 for (j = 0; j < gfx_info->max_sh_per_se; j++) {
1824 for (k = 0; k < gfx_info->max_cu_per_sh; k += pcache_info[ct].num_cu_shared) {
1825
1826 ret = fill_in_l1_pcache(&props_ext, pcache_info,
1827 cu_info->bitmap[xcc][i % 4][j + i / 4], ct,
1828 cu_processor_id, k);
1829
1830 if (ret < 0)
1831 break;
1832
1833 if (!ret) {
1834 num_of_entries++;
1835 list_add_tail(&props_ext->list, &dev->cache_props);
1836 }
1837
1838 /* Move to next CU block */
1839 num_cu_shared = ((k + pcache_info[ct].num_cu_shared) <=
1840 gfx_info->max_cu_per_sh) ?
1841 pcache_info[ct].num_cu_shared :
1842 (gfx_info->max_cu_per_sh - k);
1843 cu_processor_id += num_cu_shared;
1844 }
1845 }
1846 }
1847 }
1848 } else {
1849 ret = fill_in_l2_l3_pcache(&props_ext, pcache_info,
1850 cu_info, gfx_info, ct, cu_processor_id, kdev);
1851
1852 if (ret < 0)
1853 break;
1854
1855 if (!ret) {
1856 num_of_entries++;
1857 list_add_tail(&props_ext->list, &dev->cache_props);
1858 }
1859 }
1860 }
1861 dev->node_props.caches_count += num_of_entries;
1862 pr_debug("Added [%d] GPU cache entries\n", num_of_entries);
1863 }
1864
kfd_topology_add_device_locked(struct kfd_node * gpu,struct kfd_topology_device ** dev)1865 static int kfd_topology_add_device_locked(struct kfd_node *gpu,
1866 struct kfd_topology_device **dev)
1867 {
1868 int proximity_domain = ++topology_crat_proximity_domain;
1869 struct list_head temp_topology_device_list;
1870 void *crat_image = NULL;
1871 size_t image_size = 0;
1872 int res;
1873
1874 res = kfd_create_crat_image_virtual(&crat_image, &image_size,
1875 COMPUTE_UNIT_GPU, gpu,
1876 proximity_domain);
1877 if (res) {
1878 dev_err(gpu->adev->dev, "Error creating VCRAT\n");
1879 topology_crat_proximity_domain--;
1880 goto err;
1881 }
1882
1883 INIT_LIST_HEAD(&temp_topology_device_list);
1884
1885 res = kfd_parse_crat_table(crat_image,
1886 &temp_topology_device_list,
1887 proximity_domain);
1888 if (res) {
1889 dev_err(gpu->adev->dev, "Error parsing VCRAT\n");
1890 topology_crat_proximity_domain--;
1891 goto err;
1892 }
1893
1894 kfd_topology_update_device_list(&temp_topology_device_list,
1895 &topology_device_list);
1896
1897 *dev = kfd_assign_gpu(gpu);
1898 if (WARN_ON(!*dev)) {
1899 res = -ENODEV;
1900 goto err;
1901 }
1902
1903 /* Fill the cache affinity information here for the GPUs
1904 * using VCRAT
1905 */
1906 kfd_fill_cache_non_crat_info(*dev, gpu);
1907
1908 /* Update the SYSFS tree, since we added another topology
1909 * device
1910 */
1911 res = kfd_topology_update_sysfs();
1912 if (!res)
1913 sys_props.generation_count++;
1914 else
1915 dev_err(gpu->adev->dev, "Failed to update GPU to sysfs topology. res=%d\n",
1916 res);
1917
1918 err:
1919 kfd_destroy_crat_image(crat_image);
1920 return res;
1921 }
1922
kfd_topology_set_dbg_firmware_support(struct kfd_topology_device * dev)1923 static void kfd_topology_set_dbg_firmware_support(struct kfd_topology_device *dev)
1924 {
1925 bool firmware_supported = true;
1926
1927 if (KFD_GC_VERSION(dev->gpu) >= IP_VERSION(11, 0, 0) &&
1928 KFD_GC_VERSION(dev->gpu) < IP_VERSION(12, 0, 0)) {
1929 uint32_t mes_api_rev = (dev->gpu->adev->mes.sched_version &
1930 AMDGPU_MES_API_VERSION_MASK) >>
1931 AMDGPU_MES_API_VERSION_SHIFT;
1932 uint32_t mes_rev = dev->gpu->adev->mes.sched_version &
1933 AMDGPU_MES_VERSION_MASK;
1934
1935 firmware_supported = (mes_api_rev >= 14) && (mes_rev >= 64);
1936 goto out;
1937 }
1938
1939 /*
1940 * Note: Any unlisted devices here are assumed to support exception handling.
1941 * Add additional checks here as needed.
1942 */
1943 switch (KFD_GC_VERSION(dev->gpu)) {
1944 case IP_VERSION(9, 0, 1):
1945 firmware_supported = dev->gpu->kfd->mec_fw_version >= 459 + 32768;
1946 break;
1947 case IP_VERSION(9, 1, 0):
1948 case IP_VERSION(9, 2, 1):
1949 case IP_VERSION(9, 2, 2):
1950 case IP_VERSION(9, 3, 0):
1951 case IP_VERSION(9, 4, 0):
1952 firmware_supported = dev->gpu->kfd->mec_fw_version >= 459;
1953 break;
1954 case IP_VERSION(9, 4, 1):
1955 firmware_supported = dev->gpu->kfd->mec_fw_version >= 60;
1956 break;
1957 case IP_VERSION(9, 4, 2):
1958 firmware_supported = dev->gpu->kfd->mec_fw_version >= 51;
1959 break;
1960 case IP_VERSION(10, 1, 10):
1961 case IP_VERSION(10, 1, 2):
1962 case IP_VERSION(10, 1, 1):
1963 firmware_supported = dev->gpu->kfd->mec_fw_version >= 144;
1964 break;
1965 case IP_VERSION(10, 3, 0):
1966 case IP_VERSION(10, 3, 2):
1967 case IP_VERSION(10, 3, 1):
1968 case IP_VERSION(10, 3, 4):
1969 case IP_VERSION(10, 3, 5):
1970 firmware_supported = dev->gpu->kfd->mec_fw_version >= 89;
1971 break;
1972 case IP_VERSION(10, 1, 3):
1973 case IP_VERSION(10, 3, 3):
1974 firmware_supported = false;
1975 break;
1976 default:
1977 break;
1978 }
1979
1980 out:
1981 if (firmware_supported)
1982 dev->node_props.capability |= HSA_CAP_TRAP_DEBUG_FIRMWARE_SUPPORTED;
1983 }
1984
kfd_topology_set_capabilities(struct kfd_topology_device * dev)1985 static void kfd_topology_set_capabilities(struct kfd_topology_device *dev)
1986 {
1987 dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_2_0 <<
1988 HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT) &
1989 HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK);
1990
1991 dev->node_props.capability |= HSA_CAP_TRAP_DEBUG_SUPPORT |
1992 HSA_CAP_TRAP_DEBUG_WAVE_LAUNCH_TRAP_OVERRIDE_SUPPORTED |
1993 HSA_CAP_TRAP_DEBUG_WAVE_LAUNCH_MODE_SUPPORTED;
1994
1995 if (kfd_dbg_has_ttmps_always_setup(dev->gpu))
1996 dev->node_props.debug_prop |= HSA_DBG_DISPATCH_INFO_ALWAYS_VALID;
1997
1998 if (KFD_GC_VERSION(dev->gpu) < IP_VERSION(10, 0, 0)) {
1999 if (KFD_GC_VERSION(dev->gpu) == IP_VERSION(9, 4, 3) ||
2000 KFD_GC_VERSION(dev->gpu) == IP_VERSION(9, 4, 4))
2001 dev->node_props.debug_prop |=
2002 HSA_DBG_WATCH_ADDR_MASK_LO_BIT_GFX9_4_3 |
2003 HSA_DBG_WATCH_ADDR_MASK_HI_BIT_GFX9_4_3;
2004 else
2005 dev->node_props.debug_prop |=
2006 HSA_DBG_WATCH_ADDR_MASK_LO_BIT_GFX9 |
2007 HSA_DBG_WATCH_ADDR_MASK_HI_BIT;
2008
2009 if (KFD_GC_VERSION(dev->gpu) >= IP_VERSION(9, 4, 2))
2010 dev->node_props.capability |=
2011 HSA_CAP_TRAP_DEBUG_PRECISE_MEMORY_OPERATIONS_SUPPORTED;
2012
2013 if (!amdgpu_sriov_vf(dev->gpu->adev))
2014 dev->node_props.capability |= HSA_CAP_PER_QUEUE_RESET_SUPPORTED;
2015
2016 } else {
2017 dev->node_props.debug_prop |= HSA_DBG_WATCH_ADDR_MASK_LO_BIT_GFX10 |
2018 HSA_DBG_WATCH_ADDR_MASK_HI_BIT;
2019
2020 if (KFD_GC_VERSION(dev->gpu) >= IP_VERSION(12, 0, 0))
2021 dev->node_props.capability |=
2022 HSA_CAP_TRAP_DEBUG_PRECISE_ALU_OPERATIONS_SUPPORTED;
2023 }
2024
2025 kfd_topology_set_dbg_firmware_support(dev);
2026 }
2027
kfd_topology_add_device(struct kfd_node * gpu)2028 int kfd_topology_add_device(struct kfd_node *gpu)
2029 {
2030 uint32_t gpu_id;
2031 struct kfd_topology_device *dev;
2032 int res = 0;
2033 int i;
2034 const char *asic_name = amdgpu_asic_name[gpu->adev->asic_type];
2035 struct amdgpu_gfx_config *gfx_info = &gpu->adev->gfx.config;
2036 struct amdgpu_cu_info *cu_info = &gpu->adev->gfx.cu_info;
2037
2038 if (gpu->xcp && !gpu->xcp->ddev) {
2039 dev_warn(gpu->adev->dev,
2040 "Won't add GPU to topology since it has no drm node assigned.");
2041 return 0;
2042 } else {
2043 dev_dbg(gpu->adev->dev, "Adding new GPU to topology\n");
2044 }
2045
2046 /* Check to see if this gpu device exists in the topology_device_list.
2047 * If so, assign the gpu to that device,
2048 * else create a Virtual CRAT for this gpu device and then parse that
2049 * CRAT to create a new topology device. Once created assign the gpu to
2050 * that topology device
2051 */
2052 down_write(&topology_lock);
2053 dev = kfd_assign_gpu(gpu);
2054 if (!dev)
2055 res = kfd_topology_add_device_locked(gpu, &dev);
2056 up_write(&topology_lock);
2057 if (res)
2058 return res;
2059
2060 gpu_id = kfd_generate_gpu_id(gpu);
2061 dev->gpu_id = gpu_id;
2062 gpu->id = gpu_id;
2063
2064 kfd_dev_create_p2p_links();
2065
2066 /* TODO: Move the following lines to function
2067 * kfd_add_non_crat_information
2068 */
2069
2070 /* Fill-in additional information that is not available in CRAT but
2071 * needed for the topology
2072 */
2073 for (i = 0; i < KFD_TOPOLOGY_PUBLIC_NAME_SIZE-1; i++) {
2074 dev->node_props.name[i] = __tolower(asic_name[i]);
2075 if (asic_name[i] == '\0')
2076 break;
2077 }
2078 dev->node_props.name[i] = '\0';
2079
2080 dev->node_props.simd_arrays_per_engine =
2081 gfx_info->max_sh_per_se;
2082
2083 dev->node_props.gfx_target_version =
2084 gpu->kfd->device_info.gfx_target_version;
2085 dev->node_props.vendor_id = gpu->adev->pdev->vendor;
2086 dev->node_props.device_id = gpu->adev->pdev->device;
2087 dev->node_props.capability |=
2088 ((dev->gpu->adev->rev_id << HSA_CAP_ASIC_REVISION_SHIFT) &
2089 HSA_CAP_ASIC_REVISION_MASK);
2090
2091 dev->node_props.location_id = pci_dev_id(gpu->adev->pdev);
2092 if (gpu->kfd->num_nodes > 1)
2093 dev->node_props.location_id |= dev->gpu->node_id;
2094
2095 dev->node_props.domain = pci_domain_nr(gpu->adev->pdev->bus);
2096 dev->node_props.max_engine_clk_fcompute =
2097 amdgpu_amdkfd_get_max_engine_clock_in_mhz(dev->gpu->adev);
2098 dev->node_props.max_engine_clk_ccompute =
2099 cpufreq_quick_get_max(0) / 1000;
2100
2101 if (gpu->xcp)
2102 dev->node_props.drm_render_minor = gpu->xcp->ddev->render->index;
2103 else
2104 dev->node_props.drm_render_minor =
2105 gpu->kfd->shared_resources.drm_render_minor;
2106
2107 dev->node_props.hive_id = gpu->kfd->hive_id;
2108 dev->node_props.num_sdma_engines = kfd_get_num_sdma_engines(gpu);
2109 dev->node_props.num_sdma_xgmi_engines =
2110 kfd_get_num_xgmi_sdma_engines(gpu);
2111 dev->node_props.num_sdma_queues_per_engine =
2112 gpu->kfd->device_info.num_sdma_queues_per_engine -
2113 gpu->kfd->device_info.num_reserved_sdma_queues_per_engine;
2114 dev->node_props.num_gws = (dev->gpu->gws &&
2115 dev->gpu->dqm->sched_policy != KFD_SCHED_POLICY_NO_HWS) ?
2116 dev->gpu->adev->gds.gws_size : 0;
2117 dev->node_props.num_cp_queues = get_cp_queues_num(dev->gpu->dqm);
2118
2119 kfd_fill_mem_clk_max_info(dev);
2120 kfd_fill_iolink_non_crat_info(dev);
2121
2122 switch (dev->gpu->adev->asic_type) {
2123 case CHIP_KAVERI:
2124 case CHIP_HAWAII:
2125 case CHIP_TONGA:
2126 dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_PRE_1_0 <<
2127 HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT) &
2128 HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK);
2129 break;
2130 case CHIP_CARRIZO:
2131 case CHIP_FIJI:
2132 case CHIP_POLARIS10:
2133 case CHIP_POLARIS11:
2134 case CHIP_POLARIS12:
2135 case CHIP_VEGAM:
2136 pr_debug("Adding doorbell packet type capability\n");
2137 dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_1_0 <<
2138 HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT) &
2139 HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK);
2140 break;
2141 default:
2142 if (KFD_GC_VERSION(dev->gpu) < IP_VERSION(9, 0, 1))
2143 WARN(1, "Unexpected ASIC family %u",
2144 dev->gpu->adev->asic_type);
2145 else
2146 kfd_topology_set_capabilities(dev);
2147 }
2148
2149 /*
2150 * Overwrite ATS capability according to needs_iommu_device to fix
2151 * potential missing corresponding bit in CRAT of BIOS.
2152 */
2153 dev->node_props.capability &= ~HSA_CAP_ATS_PRESENT;
2154
2155 /* Fix errors in CZ CRAT.
2156 * simd_count: Carrizo CRAT reports wrong simd_count, probably
2157 * because it doesn't consider masked out CUs
2158 * max_waves_per_simd: Carrizo reports wrong max_waves_per_simd
2159 */
2160 if (dev->gpu->adev->asic_type == CHIP_CARRIZO) {
2161 dev->node_props.simd_count =
2162 cu_info->simd_per_cu * cu_info->number;
2163 dev->node_props.max_waves_per_simd = 10;
2164 }
2165
2166 /* kfd only concerns sram ecc on GFX and HBM ecc on UMC */
2167 dev->node_props.capability |=
2168 ((dev->gpu->adev->ras_enabled & BIT(AMDGPU_RAS_BLOCK__GFX)) != 0) ?
2169 HSA_CAP_SRAM_EDCSUPPORTED : 0;
2170 dev->node_props.capability |=
2171 ((dev->gpu->adev->ras_enabled & BIT(AMDGPU_RAS_BLOCK__UMC)) != 0) ?
2172 HSA_CAP_MEM_EDCSUPPORTED : 0;
2173
2174 if (KFD_GC_VERSION(dev->gpu) != IP_VERSION(9, 0, 1))
2175 dev->node_props.capability |= (dev->gpu->adev->ras_enabled != 0) ?
2176 HSA_CAP_RASEVENTNOTIFY : 0;
2177
2178 if (KFD_IS_SVM_API_SUPPORTED(dev->gpu->adev))
2179 dev->node_props.capability |= HSA_CAP_SVMAPI_SUPPORTED;
2180
2181 if (dev->gpu->adev->gmc.is_app_apu ||
2182 dev->gpu->adev->gmc.xgmi.connected_to_cpu)
2183 dev->node_props.capability |= HSA_CAP_FLAGS_COHERENTHOSTACCESS;
2184
2185 kfd_queue_ctx_save_restore_size(dev);
2186
2187 kfd_debug_print_topology();
2188
2189 kfd_notify_gpu_change(gpu_id, 1);
2190
2191 return 0;
2192 }
2193
2194 /**
2195 * kfd_topology_update_io_links() - Update IO links after device removal.
2196 * @proximity_domain: Proximity domain value of the dev being removed.
2197 *
2198 * The topology list currently is arranged in increasing order of
2199 * proximity domain.
2200 *
2201 * Two things need to be done when a device is removed:
2202 * 1. All the IO links to this device need to be removed.
2203 * 2. All nodes after the current device node need to move
2204 * up once this device node is removed from the topology
2205 * list. As a result, the proximity domain values for
2206 * all nodes after the node being deleted reduce by 1.
2207 * This would also cause the proximity domain values for
2208 * io links to be updated based on new proximity domain
2209 * values.
2210 *
2211 * Context: The caller must hold write topology_lock.
2212 */
kfd_topology_update_io_links(int proximity_domain)2213 static void kfd_topology_update_io_links(int proximity_domain)
2214 {
2215 struct kfd_topology_device *dev;
2216 struct kfd_iolink_properties *iolink, *p2plink, *tmp;
2217
2218 list_for_each_entry(dev, &topology_device_list, list) {
2219 if (dev->proximity_domain > proximity_domain)
2220 dev->proximity_domain--;
2221
2222 list_for_each_entry_safe(iolink, tmp, &dev->io_link_props, list) {
2223 /*
2224 * If there is an io link to the dev being deleted
2225 * then remove that IO link also.
2226 */
2227 if (iolink->node_to == proximity_domain) {
2228 list_del(&iolink->list);
2229 dev->node_props.io_links_count--;
2230 } else {
2231 if (iolink->node_from > proximity_domain)
2232 iolink->node_from--;
2233 if (iolink->node_to > proximity_domain)
2234 iolink->node_to--;
2235 }
2236 }
2237
2238 list_for_each_entry_safe(p2plink, tmp, &dev->p2p_link_props, list) {
2239 /*
2240 * If there is a p2p link to the dev being deleted
2241 * then remove that p2p link also.
2242 */
2243 if (p2plink->node_to == proximity_domain) {
2244 list_del(&p2plink->list);
2245 dev->node_props.p2p_links_count--;
2246 } else {
2247 if (p2plink->node_from > proximity_domain)
2248 p2plink->node_from--;
2249 if (p2plink->node_to > proximity_domain)
2250 p2plink->node_to--;
2251 }
2252 }
2253 }
2254 }
2255
kfd_topology_remove_device(struct kfd_node * gpu)2256 int kfd_topology_remove_device(struct kfd_node *gpu)
2257 {
2258 struct kfd_topology_device *dev, *tmp;
2259 uint32_t gpu_id;
2260 int res = -ENODEV;
2261 int i = 0;
2262
2263 down_write(&topology_lock);
2264
2265 list_for_each_entry_safe(dev, tmp, &topology_device_list, list) {
2266 if (dev->gpu == gpu) {
2267 gpu_id = dev->gpu_id;
2268 kfd_remove_sysfs_node_entry(dev);
2269 kfd_release_topology_device(dev);
2270 sys_props.num_devices--;
2271 kfd_topology_update_io_links(i);
2272 topology_crat_proximity_domain = sys_props.num_devices-1;
2273 sys_props.generation_count++;
2274 res = 0;
2275 if (kfd_topology_update_sysfs() < 0)
2276 kfd_topology_release_sysfs();
2277 break;
2278 }
2279 i++;
2280 }
2281
2282 up_write(&topology_lock);
2283
2284 if (!res)
2285 kfd_notify_gpu_change(gpu_id, 0);
2286
2287 return res;
2288 }
2289
2290 /* kfd_topology_enum_kfd_devices - Enumerate through all devices in KFD
2291 * topology. If GPU device is found @idx, then valid kfd_dev pointer is
2292 * returned through @kdev
2293 * Return - 0: On success (@kdev will be NULL for non GPU nodes)
2294 * -1: If end of list
2295 */
kfd_topology_enum_kfd_devices(uint8_t idx,struct kfd_node ** kdev)2296 int kfd_topology_enum_kfd_devices(uint8_t idx, struct kfd_node **kdev)
2297 {
2298
2299 struct kfd_topology_device *top_dev;
2300 uint8_t device_idx = 0;
2301
2302 *kdev = NULL;
2303 down_read(&topology_lock);
2304
2305 list_for_each_entry(top_dev, &topology_device_list, list) {
2306 if (device_idx == idx) {
2307 *kdev = top_dev->gpu;
2308 up_read(&topology_lock);
2309 return 0;
2310 }
2311
2312 device_idx++;
2313 }
2314
2315 up_read(&topology_lock);
2316
2317 return -1;
2318
2319 }
2320
kfd_cpumask_to_apic_id(const struct cpumask * cpumask)2321 static int kfd_cpumask_to_apic_id(const struct cpumask *cpumask)
2322 {
2323 int first_cpu_of_numa_node;
2324
2325 if (!cpumask || cpumask == cpu_none_mask)
2326 return -1;
2327 first_cpu_of_numa_node = cpumask_first(cpumask);
2328 if (first_cpu_of_numa_node >= nr_cpu_ids)
2329 return -1;
2330 #ifdef CONFIG_X86_64
2331 return cpu_data(first_cpu_of_numa_node).topo.apicid;
2332 #else
2333 return first_cpu_of_numa_node;
2334 #endif
2335 }
2336
2337 /* kfd_numa_node_to_apic_id - Returns the APIC ID of the first logical processor
2338 * of the given NUMA node (numa_node_id)
2339 * Return -1 on failure
2340 */
kfd_numa_node_to_apic_id(int numa_node_id)2341 int kfd_numa_node_to_apic_id(int numa_node_id)
2342 {
2343 if (numa_node_id == -1) {
2344 pr_warn("Invalid NUMA Node. Use online CPU mask\n");
2345 return kfd_cpumask_to_apic_id(cpu_online_mask);
2346 }
2347 return kfd_cpumask_to_apic_id(cpumask_of_node(numa_node_id));
2348 }
2349
2350 #if defined(CONFIG_DEBUG_FS)
2351
kfd_debugfs_hqds_by_device(struct seq_file * m,void * data)2352 int kfd_debugfs_hqds_by_device(struct seq_file *m, void *data)
2353 {
2354 struct kfd_topology_device *dev;
2355 unsigned int i = 0;
2356 int r = 0;
2357
2358 down_read(&topology_lock);
2359
2360 list_for_each_entry(dev, &topology_device_list, list) {
2361 if (!dev->gpu) {
2362 i++;
2363 continue;
2364 }
2365
2366 seq_printf(m, "Node %u, gpu_id %x:\n", i++, dev->gpu->id);
2367 r = dqm_debugfs_hqds(m, dev->gpu->dqm);
2368 if (r)
2369 break;
2370 }
2371
2372 up_read(&topology_lock);
2373
2374 return r;
2375 }
2376
kfd_debugfs_rls_by_device(struct seq_file * m,void * data)2377 int kfd_debugfs_rls_by_device(struct seq_file *m, void *data)
2378 {
2379 struct kfd_topology_device *dev;
2380 unsigned int i = 0;
2381 int r = 0;
2382
2383 down_read(&topology_lock);
2384
2385 list_for_each_entry(dev, &topology_device_list, list) {
2386 if (!dev->gpu) {
2387 i++;
2388 continue;
2389 }
2390
2391 seq_printf(m, "Node %u, gpu_id %x:\n", i++, dev->gpu->id);
2392 r = pm_debugfs_runlist(m, &dev->gpu->dqm->packet_mgr);
2393 if (r)
2394 break;
2395 }
2396
2397 up_read(&topology_lock);
2398
2399 return r;
2400 }
2401
2402 #endif
2403