1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* 3 * Copyright 2014-2022 Advanced Micro Devices, Inc. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice shall be included in 13 * all copies or substantial portions of the Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21 * OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24 #include <linux/types.h> 25 #include <linux/kernel.h> 26 #include <linux/pci.h> 27 #include <linux/errno.h> 28 #include <linux/acpi.h> 29 #include <linux/hash.h> 30 #include <linux/cpufreq.h> 31 #include <linux/log2.h> 32 #include <linux/dmi.h> 33 #include <linux/atomic.h> 34 #include <linux/crc16.h> 35 36 #include "kfd_priv.h" 37 #include "kfd_crat.h" 38 #include "kfd_topology.h" 39 #include "kfd_device_queue_manager.h" 40 #include "kfd_svm.h" 41 #include "kfd_debug.h" 42 #include "amdgpu_amdkfd.h" 43 #include "amdgpu_ras.h" 44 #include "amdgpu.h" 45 46 /* topology_device_list - Master list of all topology devices */ 47 static struct list_head topology_device_list; 48 static struct kfd_system_properties sys_props; 49 50 static DECLARE_RWSEM(topology_lock); 51 static uint32_t topology_crat_proximity_domain; 52 53 struct kfd_topology_device *kfd_topology_device_by_proximity_domain_no_lock( 54 uint32_t proximity_domain) 55 { 56 struct kfd_topology_device *top_dev; 57 struct kfd_topology_device *device = NULL; 58 59 list_for_each_entry(top_dev, &topology_device_list, list) 60 if (top_dev->proximity_domain == proximity_domain) { 61 device = top_dev; 62 break; 63 } 64 65 return device; 66 } 67 68 struct kfd_topology_device *kfd_topology_device_by_proximity_domain( 69 uint32_t proximity_domain) 70 { 71 struct kfd_topology_device *device = NULL; 72 73 down_read(&topology_lock); 74 75 device = kfd_topology_device_by_proximity_domain_no_lock( 76 proximity_domain); 77 up_read(&topology_lock); 78 79 return device; 80 } 81 82 struct kfd_topology_device *kfd_topology_device_by_id(uint32_t gpu_id) 83 { 84 struct kfd_topology_device *top_dev = NULL; 85 struct kfd_topology_device *ret = NULL; 86 87 down_read(&topology_lock); 88 89 list_for_each_entry(top_dev, &topology_device_list, list) 90 if (top_dev->gpu_id == gpu_id) { 91 ret = top_dev; 92 break; 93 } 94 95 up_read(&topology_lock); 96 97 return ret; 98 } 99 100 struct kfd_node *kfd_device_by_id(uint32_t gpu_id) 101 { 102 struct kfd_topology_device *top_dev; 103 104 top_dev = kfd_topology_device_by_id(gpu_id); 105 if (!top_dev) 106 return NULL; 107 108 return top_dev->gpu; 109 } 110 111 /* Called with write topology_lock acquired */ 112 static void kfd_release_topology_device(struct kfd_topology_device *dev) 113 { 114 struct kfd_mem_properties *mem; 115 struct kfd_cache_properties *cache; 116 struct kfd_iolink_properties *iolink; 117 struct kfd_iolink_properties *p2plink; 118 struct kfd_perf_properties *perf; 119 120 list_del(&dev->list); 121 122 while (dev->mem_props.next != &dev->mem_props) { 123 mem = container_of(dev->mem_props.next, 124 struct kfd_mem_properties, list); 125 list_del(&mem->list); 126 kfree(mem); 127 } 128 129 while (dev->cache_props.next != &dev->cache_props) { 130 cache = container_of(dev->cache_props.next, 131 struct kfd_cache_properties, list); 132 list_del(&cache->list); 133 kfree(cache); 134 } 135 136 while (dev->io_link_props.next != &dev->io_link_props) { 137 iolink = container_of(dev->io_link_props.next, 138 struct kfd_iolink_properties, list); 139 list_del(&iolink->list); 140 kfree(iolink); 141 } 142 143 while (dev->p2p_link_props.next != &dev->p2p_link_props) { 144 p2plink = container_of(dev->p2p_link_props.next, 145 struct kfd_iolink_properties, list); 146 list_del(&p2plink->list); 147 kfree(p2plink); 148 } 149 150 while (dev->perf_props.next != &dev->perf_props) { 151 perf = container_of(dev->perf_props.next, 152 struct kfd_perf_properties, list); 153 list_del(&perf->list); 154 kfree(perf); 155 } 156 157 kfree(dev); 158 } 159 160 void kfd_release_topology_device_list(struct list_head *device_list) 161 { 162 struct kfd_topology_device *dev; 163 164 while (!list_empty(device_list)) { 165 dev = list_first_entry(device_list, 166 struct kfd_topology_device, list); 167 kfd_release_topology_device(dev); 168 } 169 } 170 171 static void kfd_release_live_view(void) 172 { 173 kfd_release_topology_device_list(&topology_device_list); 174 memset(&sys_props, 0, sizeof(sys_props)); 175 } 176 177 struct kfd_topology_device *kfd_create_topology_device( 178 struct list_head *device_list) 179 { 180 struct kfd_topology_device *dev; 181 182 dev = kfd_alloc_struct(dev); 183 if (!dev) { 184 pr_err("No memory to allocate a topology device"); 185 return NULL; 186 } 187 188 INIT_LIST_HEAD(&dev->mem_props); 189 INIT_LIST_HEAD(&dev->cache_props); 190 INIT_LIST_HEAD(&dev->io_link_props); 191 INIT_LIST_HEAD(&dev->p2p_link_props); 192 INIT_LIST_HEAD(&dev->perf_props); 193 194 list_add_tail(&dev->list, device_list); 195 196 return dev; 197 } 198 199 200 #define sysfs_show_gen_prop(buffer, offs, fmt, ...) \ 201 (offs += snprintf(buffer+offs, PAGE_SIZE-offs, \ 202 fmt, __VA_ARGS__)) 203 #define sysfs_show_32bit_prop(buffer, offs, name, value) \ 204 sysfs_show_gen_prop(buffer, offs, "%s %u\n", name, value) 205 #define sysfs_show_64bit_prop(buffer, offs, name, value) \ 206 sysfs_show_gen_prop(buffer, offs, "%s %llu\n", name, value) 207 #define sysfs_show_32bit_val(buffer, offs, value) \ 208 sysfs_show_gen_prop(buffer, offs, "%u\n", value) 209 #define sysfs_show_str_val(buffer, offs, value) \ 210 sysfs_show_gen_prop(buffer, offs, "%s\n", value) 211 212 static ssize_t sysprops_show(struct kobject *kobj, struct attribute *attr, 213 char *buffer) 214 { 215 int offs = 0; 216 217 /* Making sure that the buffer is an empty string */ 218 buffer[0] = 0; 219 220 if (attr == &sys_props.attr_genid) { 221 sysfs_show_32bit_val(buffer, offs, 222 sys_props.generation_count); 223 } else if (attr == &sys_props.attr_props) { 224 sysfs_show_64bit_prop(buffer, offs, "platform_oem", 225 sys_props.platform_oem); 226 sysfs_show_64bit_prop(buffer, offs, "platform_id", 227 sys_props.platform_id); 228 sysfs_show_64bit_prop(buffer, offs, "platform_rev", 229 sys_props.platform_rev); 230 } else { 231 offs = -EINVAL; 232 } 233 234 return offs; 235 } 236 237 static void kfd_topology_kobj_release(struct kobject *kobj) 238 { 239 kfree(kobj); 240 } 241 242 static const struct sysfs_ops sysprops_ops = { 243 .show = sysprops_show, 244 }; 245 246 static const struct kobj_type sysprops_type = { 247 .release = kfd_topology_kobj_release, 248 .sysfs_ops = &sysprops_ops, 249 }; 250 251 static ssize_t iolink_show(struct kobject *kobj, struct attribute *attr, 252 char *buffer) 253 { 254 int offs = 0; 255 struct kfd_iolink_properties *iolink; 256 257 /* Making sure that the buffer is an empty string */ 258 buffer[0] = 0; 259 260 iolink = container_of(attr, struct kfd_iolink_properties, attr); 261 if (iolink->gpu && kfd_devcgroup_check_permission(iolink->gpu)) 262 return -EPERM; 263 sysfs_show_32bit_prop(buffer, offs, "type", iolink->iolink_type); 264 sysfs_show_32bit_prop(buffer, offs, "version_major", iolink->ver_maj); 265 sysfs_show_32bit_prop(buffer, offs, "version_minor", iolink->ver_min); 266 sysfs_show_32bit_prop(buffer, offs, "node_from", iolink->node_from); 267 sysfs_show_32bit_prop(buffer, offs, "node_to", iolink->node_to); 268 sysfs_show_32bit_prop(buffer, offs, "weight", iolink->weight); 269 sysfs_show_32bit_prop(buffer, offs, "min_latency", iolink->min_latency); 270 sysfs_show_32bit_prop(buffer, offs, "max_latency", iolink->max_latency); 271 sysfs_show_32bit_prop(buffer, offs, "min_bandwidth", 272 iolink->min_bandwidth); 273 sysfs_show_32bit_prop(buffer, offs, "max_bandwidth", 274 iolink->max_bandwidth); 275 sysfs_show_32bit_prop(buffer, offs, "recommended_transfer_size", 276 iolink->rec_transfer_size); 277 sysfs_show_32bit_prop(buffer, offs, "recommended_sdma_engine_id_mask", 278 iolink->rec_sdma_eng_id_mask); 279 sysfs_show_32bit_prop(buffer, offs, "flags", iolink->flags); 280 281 return offs; 282 } 283 284 static const struct sysfs_ops iolink_ops = { 285 .show = iolink_show, 286 }; 287 288 static const struct kobj_type iolink_type = { 289 .release = kfd_topology_kobj_release, 290 .sysfs_ops = &iolink_ops, 291 }; 292 293 static ssize_t mem_show(struct kobject *kobj, struct attribute *attr, 294 char *buffer) 295 { 296 int offs = 0; 297 struct kfd_mem_properties *mem; 298 299 /* Making sure that the buffer is an empty string */ 300 buffer[0] = 0; 301 302 mem = container_of(attr, struct kfd_mem_properties, attr); 303 if (mem->gpu && kfd_devcgroup_check_permission(mem->gpu)) 304 return -EPERM; 305 sysfs_show_32bit_prop(buffer, offs, "heap_type", mem->heap_type); 306 sysfs_show_64bit_prop(buffer, offs, "size_in_bytes", 307 mem->size_in_bytes); 308 sysfs_show_32bit_prop(buffer, offs, "flags", mem->flags); 309 sysfs_show_32bit_prop(buffer, offs, "width", mem->width); 310 sysfs_show_32bit_prop(buffer, offs, "mem_clk_max", 311 mem->mem_clk_max); 312 313 return offs; 314 } 315 316 static const struct sysfs_ops mem_ops = { 317 .show = mem_show, 318 }; 319 320 static const struct kobj_type mem_type = { 321 .release = kfd_topology_kobj_release, 322 .sysfs_ops = &mem_ops, 323 }; 324 325 static ssize_t kfd_cache_show(struct kobject *kobj, struct attribute *attr, 326 char *buffer) 327 { 328 int offs = 0; 329 uint32_t i, j; 330 struct kfd_cache_properties *cache; 331 332 /* Making sure that the buffer is an empty string */ 333 buffer[0] = 0; 334 cache = container_of(attr, struct kfd_cache_properties, attr); 335 if (cache->gpu && kfd_devcgroup_check_permission(cache->gpu)) 336 return -EPERM; 337 sysfs_show_32bit_prop(buffer, offs, "processor_id_low", 338 cache->processor_id_low); 339 sysfs_show_32bit_prop(buffer, offs, "level", cache->cache_level); 340 sysfs_show_32bit_prop(buffer, offs, "size", cache->cache_size); 341 sysfs_show_32bit_prop(buffer, offs, "cache_line_size", 342 cache->cacheline_size); 343 sysfs_show_32bit_prop(buffer, offs, "cache_lines_per_tag", 344 cache->cachelines_per_tag); 345 sysfs_show_32bit_prop(buffer, offs, "association", cache->cache_assoc); 346 sysfs_show_32bit_prop(buffer, offs, "latency", cache->cache_latency); 347 sysfs_show_32bit_prop(buffer, offs, "type", cache->cache_type); 348 349 offs += snprintf(buffer+offs, PAGE_SIZE-offs, "sibling_map "); 350 for (i = 0; i < cache->sibling_map_size; i++) 351 for (j = 0; j < sizeof(cache->sibling_map[0])*8; j++) 352 /* Check each bit */ 353 offs += snprintf(buffer+offs, PAGE_SIZE-offs, "%d,", 354 (cache->sibling_map[i] >> j) & 1); 355 356 /* Replace the last "," with end of line */ 357 buffer[offs-1] = '\n'; 358 return offs; 359 } 360 361 static const struct sysfs_ops cache_ops = { 362 .show = kfd_cache_show, 363 }; 364 365 static const struct kobj_type cache_type = { 366 .release = kfd_topology_kobj_release, 367 .sysfs_ops = &cache_ops, 368 }; 369 370 /****** Sysfs of Performance Counters ******/ 371 372 struct kfd_perf_attr { 373 struct kobj_attribute attr; 374 uint32_t data; 375 }; 376 377 static ssize_t perf_show(struct kobject *kobj, struct kobj_attribute *attrs, 378 char *buf) 379 { 380 int offs = 0; 381 struct kfd_perf_attr *attr; 382 383 buf[0] = 0; 384 attr = container_of(attrs, struct kfd_perf_attr, attr); 385 if (!attr->data) /* invalid data for PMC */ 386 return 0; 387 else 388 return sysfs_show_32bit_val(buf, offs, attr->data); 389 } 390 391 #define KFD_PERF_DESC(_name, _data) \ 392 { \ 393 .attr = __ATTR(_name, 0444, perf_show, NULL), \ 394 .data = _data, \ 395 } 396 397 static struct kfd_perf_attr perf_attr_iommu[] = { 398 KFD_PERF_DESC(max_concurrent, 0), 399 KFD_PERF_DESC(num_counters, 0), 400 KFD_PERF_DESC(counter_ids, 0), 401 }; 402 /****************************************/ 403 404 static ssize_t node_show(struct kobject *kobj, struct attribute *attr, 405 char *buffer) 406 { 407 int offs = 0; 408 struct kfd_topology_device *dev; 409 uint32_t log_max_watch_addr; 410 411 /* Making sure that the buffer is an empty string */ 412 buffer[0] = 0; 413 414 if (strcmp(attr->name, "gpu_id") == 0) { 415 dev = container_of(attr, struct kfd_topology_device, 416 attr_gpuid); 417 if (dev->gpu && kfd_devcgroup_check_permission(dev->gpu)) 418 return -EPERM; 419 return sysfs_show_32bit_val(buffer, offs, dev->gpu_id); 420 } 421 422 if (strcmp(attr->name, "name") == 0) { 423 dev = container_of(attr, struct kfd_topology_device, 424 attr_name); 425 426 if (dev->gpu && kfd_devcgroup_check_permission(dev->gpu)) 427 return -EPERM; 428 return sysfs_show_str_val(buffer, offs, dev->node_props.name); 429 } 430 431 dev = container_of(attr, struct kfd_topology_device, 432 attr_props); 433 if (dev->gpu && kfd_devcgroup_check_permission(dev->gpu)) 434 return -EPERM; 435 sysfs_show_32bit_prop(buffer, offs, "cpu_cores_count", 436 dev->node_props.cpu_cores_count); 437 sysfs_show_32bit_prop(buffer, offs, "simd_count", 438 dev->gpu ? dev->node_props.simd_count : 0); 439 sysfs_show_32bit_prop(buffer, offs, "mem_banks_count", 440 dev->node_props.mem_banks_count); 441 sysfs_show_32bit_prop(buffer, offs, "caches_count", 442 dev->node_props.caches_count); 443 sysfs_show_32bit_prop(buffer, offs, "io_links_count", 444 dev->node_props.io_links_count); 445 sysfs_show_32bit_prop(buffer, offs, "p2p_links_count", 446 dev->node_props.p2p_links_count); 447 sysfs_show_32bit_prop(buffer, offs, "cpu_core_id_base", 448 dev->node_props.cpu_core_id_base); 449 sysfs_show_32bit_prop(buffer, offs, "simd_id_base", 450 dev->node_props.simd_id_base); 451 sysfs_show_32bit_prop(buffer, offs, "max_waves_per_simd", 452 dev->node_props.max_waves_per_simd); 453 sysfs_show_32bit_prop(buffer, offs, "lds_size_in_kb", 454 dev->node_props.lds_size_in_kb); 455 sysfs_show_32bit_prop(buffer, offs, "gds_size_in_kb", 456 dev->node_props.gds_size_in_kb); 457 sysfs_show_32bit_prop(buffer, offs, "num_gws", 458 dev->node_props.num_gws); 459 sysfs_show_32bit_prop(buffer, offs, "wave_front_size", 460 dev->node_props.wave_front_size); 461 sysfs_show_32bit_prop(buffer, offs, "array_count", 462 dev->gpu ? (dev->node_props.array_count * 463 NUM_XCC(dev->gpu->xcc_mask)) : 0); 464 sysfs_show_32bit_prop(buffer, offs, "simd_arrays_per_engine", 465 dev->node_props.simd_arrays_per_engine); 466 sysfs_show_32bit_prop(buffer, offs, "cu_per_simd_array", 467 dev->node_props.cu_per_simd_array); 468 sysfs_show_32bit_prop(buffer, offs, "simd_per_cu", 469 dev->node_props.simd_per_cu); 470 sysfs_show_32bit_prop(buffer, offs, "max_slots_scratch_cu", 471 dev->node_props.max_slots_scratch_cu); 472 sysfs_show_32bit_prop(buffer, offs, "gfx_target_version", 473 dev->node_props.gfx_target_version); 474 sysfs_show_32bit_prop(buffer, offs, "vendor_id", 475 dev->node_props.vendor_id); 476 sysfs_show_32bit_prop(buffer, offs, "device_id", 477 dev->node_props.device_id); 478 sysfs_show_32bit_prop(buffer, offs, "location_id", 479 dev->node_props.location_id); 480 sysfs_show_32bit_prop(buffer, offs, "domain", 481 dev->node_props.domain); 482 sysfs_show_32bit_prop(buffer, offs, "drm_render_minor", 483 dev->node_props.drm_render_minor); 484 sysfs_show_64bit_prop(buffer, offs, "hive_id", 485 dev->node_props.hive_id); 486 sysfs_show_32bit_prop(buffer, offs, "num_sdma_engines", 487 dev->node_props.num_sdma_engines); 488 sysfs_show_32bit_prop(buffer, offs, "num_sdma_xgmi_engines", 489 dev->node_props.num_sdma_xgmi_engines); 490 sysfs_show_32bit_prop(buffer, offs, "num_sdma_queues_per_engine", 491 dev->node_props.num_sdma_queues_per_engine); 492 sysfs_show_32bit_prop(buffer, offs, "num_cp_queues", 493 dev->node_props.num_cp_queues); 494 sysfs_show_32bit_prop(buffer, offs, "cwsr_size", 495 dev->node_props.cwsr_size); 496 sysfs_show_32bit_prop(buffer, offs, "ctl_stack_size", 497 dev->node_props.ctl_stack_size); 498 499 if (dev->gpu) { 500 log_max_watch_addr = 501 __ilog2_u32(dev->gpu->kfd->device_info.num_of_watch_points); 502 503 if (log_max_watch_addr) { 504 dev->node_props.capability |= 505 HSA_CAP_WATCH_POINTS_SUPPORTED; 506 507 dev->node_props.capability |= 508 ((log_max_watch_addr << 509 HSA_CAP_WATCH_POINTS_TOTALBITS_SHIFT) & 510 HSA_CAP_WATCH_POINTS_TOTALBITS_MASK); 511 } 512 513 if (dev->gpu->adev->asic_type == CHIP_TONGA) 514 dev->node_props.capability |= 515 HSA_CAP_AQL_QUEUE_DOUBLE_MAP; 516 517 if (KFD_GC_VERSION(dev->gpu) < IP_VERSION(10, 0, 0) && 518 (dev->gpu->adev->sdma.supported_reset & AMDGPU_RESET_TYPE_PER_QUEUE)) 519 dev->node_props.capability2 |= HSA_CAP2_PER_SDMA_QUEUE_RESET_SUPPORTED; 520 521 sysfs_show_32bit_prop(buffer, offs, "max_engine_clk_fcompute", 522 dev->node_props.max_engine_clk_fcompute); 523 524 sysfs_show_64bit_prop(buffer, offs, "local_mem_size", 0ULL); 525 526 sysfs_show_32bit_prop(buffer, offs, "fw_version", 527 dev->gpu->kfd->mec_fw_version); 528 sysfs_show_32bit_prop(buffer, offs, "capability", 529 dev->node_props.capability); 530 sysfs_show_32bit_prop(buffer, offs, "capability2", 531 dev->node_props.capability2); 532 sysfs_show_64bit_prop(buffer, offs, "debug_prop", 533 dev->node_props.debug_prop); 534 sysfs_show_32bit_prop(buffer, offs, "sdma_fw_version", 535 dev->gpu->kfd->sdma_fw_version); 536 sysfs_show_64bit_prop(buffer, offs, "unique_id", 537 dev->gpu->xcp && 538 (dev->gpu->xcp->xcp_mgr->mode != 539 AMDGPU_SPX_PARTITION_MODE) ? 540 dev->gpu->xcp->unique_id : 541 dev->gpu->adev->unique_id); 542 sysfs_show_32bit_prop(buffer, offs, "num_xcc", 543 NUM_XCC(dev->gpu->xcc_mask)); 544 } 545 546 return sysfs_show_32bit_prop(buffer, offs, "max_engine_clk_ccompute", 547 cpufreq_quick_get_max(0)/1000); 548 } 549 550 static const struct sysfs_ops node_ops = { 551 .show = node_show, 552 }; 553 554 static const struct kobj_type node_type = { 555 .release = kfd_topology_kobj_release, 556 .sysfs_ops = &node_ops, 557 }; 558 559 static void kfd_remove_sysfs_file(struct kobject *kobj, struct attribute *attr) 560 { 561 sysfs_remove_file(kobj, attr); 562 kobject_del(kobj); 563 kobject_put(kobj); 564 } 565 566 static void kfd_remove_sysfs_node_entry(struct kfd_topology_device *dev) 567 { 568 struct kfd_iolink_properties *p2plink; 569 struct kfd_iolink_properties *iolink; 570 struct kfd_cache_properties *cache; 571 struct kfd_mem_properties *mem; 572 struct kfd_perf_properties *perf; 573 574 if (dev->kobj_iolink) { 575 list_for_each_entry(iolink, &dev->io_link_props, list) 576 if (iolink->kobj) { 577 kfd_remove_sysfs_file(iolink->kobj, 578 &iolink->attr); 579 iolink->kobj = NULL; 580 } 581 kobject_del(dev->kobj_iolink); 582 kobject_put(dev->kobj_iolink); 583 dev->kobj_iolink = NULL; 584 } 585 586 if (dev->kobj_p2plink) { 587 list_for_each_entry(p2plink, &dev->p2p_link_props, list) 588 if (p2plink->kobj) { 589 kfd_remove_sysfs_file(p2plink->kobj, 590 &p2plink->attr); 591 p2plink->kobj = NULL; 592 } 593 kobject_del(dev->kobj_p2plink); 594 kobject_put(dev->kobj_p2plink); 595 dev->kobj_p2plink = NULL; 596 } 597 598 if (dev->kobj_cache) { 599 list_for_each_entry(cache, &dev->cache_props, list) 600 if (cache->kobj) { 601 kfd_remove_sysfs_file(cache->kobj, 602 &cache->attr); 603 cache->kobj = NULL; 604 } 605 kobject_del(dev->kobj_cache); 606 kobject_put(dev->kobj_cache); 607 dev->kobj_cache = NULL; 608 } 609 610 if (dev->kobj_mem) { 611 list_for_each_entry(mem, &dev->mem_props, list) 612 if (mem->kobj) { 613 kfd_remove_sysfs_file(mem->kobj, &mem->attr); 614 mem->kobj = NULL; 615 } 616 kobject_del(dev->kobj_mem); 617 kobject_put(dev->kobj_mem); 618 dev->kobj_mem = NULL; 619 } 620 621 if (dev->kobj_perf) { 622 list_for_each_entry(perf, &dev->perf_props, list) { 623 kfree(perf->attr_group); 624 perf->attr_group = NULL; 625 } 626 kobject_del(dev->kobj_perf); 627 kobject_put(dev->kobj_perf); 628 dev->kobj_perf = NULL; 629 } 630 631 if (dev->kobj_node) { 632 sysfs_remove_file(dev->kobj_node, &dev->attr_gpuid); 633 sysfs_remove_file(dev->kobj_node, &dev->attr_name); 634 sysfs_remove_file(dev->kobj_node, &dev->attr_props); 635 kobject_del(dev->kobj_node); 636 kobject_put(dev->kobj_node); 637 dev->kobj_node = NULL; 638 } 639 } 640 641 static int kfd_build_sysfs_node_entry(struct kfd_topology_device *dev, 642 uint32_t id) 643 { 644 struct kfd_iolink_properties *p2plink; 645 struct kfd_iolink_properties *iolink; 646 struct kfd_cache_properties *cache; 647 struct kfd_mem_properties *mem; 648 struct kfd_perf_properties *perf; 649 int ret; 650 uint32_t i, num_attrs; 651 struct attribute **attrs; 652 653 if (WARN_ON(dev->kobj_node)) 654 return -EEXIST; 655 656 /* 657 * Creating the sysfs folders 658 */ 659 dev->kobj_node = kfd_alloc_struct(dev->kobj_node); 660 if (!dev->kobj_node) 661 return -ENOMEM; 662 663 ret = kobject_init_and_add(dev->kobj_node, &node_type, 664 sys_props.kobj_nodes, "%d", id); 665 if (ret < 0) { 666 kobject_put(dev->kobj_node); 667 return ret; 668 } 669 670 dev->kobj_mem = kobject_create_and_add("mem_banks", dev->kobj_node); 671 if (!dev->kobj_mem) 672 return -ENOMEM; 673 674 dev->kobj_cache = kobject_create_and_add("caches", dev->kobj_node); 675 if (!dev->kobj_cache) 676 return -ENOMEM; 677 678 dev->kobj_iolink = kobject_create_and_add("io_links", dev->kobj_node); 679 if (!dev->kobj_iolink) 680 return -ENOMEM; 681 682 dev->kobj_p2plink = kobject_create_and_add("p2p_links", dev->kobj_node); 683 if (!dev->kobj_p2plink) 684 return -ENOMEM; 685 686 dev->kobj_perf = kobject_create_and_add("perf", dev->kobj_node); 687 if (!dev->kobj_perf) 688 return -ENOMEM; 689 690 /* 691 * Creating sysfs files for node properties 692 */ 693 dev->attr_gpuid.name = "gpu_id"; 694 dev->attr_gpuid.mode = KFD_SYSFS_FILE_MODE; 695 sysfs_attr_init(&dev->attr_gpuid); 696 dev->attr_name.name = "name"; 697 dev->attr_name.mode = KFD_SYSFS_FILE_MODE; 698 sysfs_attr_init(&dev->attr_name); 699 dev->attr_props.name = "properties"; 700 dev->attr_props.mode = KFD_SYSFS_FILE_MODE; 701 sysfs_attr_init(&dev->attr_props); 702 ret = sysfs_create_file(dev->kobj_node, &dev->attr_gpuid); 703 if (ret < 0) 704 return ret; 705 ret = sysfs_create_file(dev->kobj_node, &dev->attr_name); 706 if (ret < 0) 707 return ret; 708 ret = sysfs_create_file(dev->kobj_node, &dev->attr_props); 709 if (ret < 0) 710 return ret; 711 712 i = 0; 713 list_for_each_entry(mem, &dev->mem_props, list) { 714 mem->kobj = kzalloc(sizeof(struct kobject), GFP_KERNEL); 715 if (!mem->kobj) 716 return -ENOMEM; 717 ret = kobject_init_and_add(mem->kobj, &mem_type, 718 dev->kobj_mem, "%d", i); 719 if (ret < 0) { 720 kobject_put(mem->kobj); 721 return ret; 722 } 723 724 mem->attr.name = "properties"; 725 mem->attr.mode = KFD_SYSFS_FILE_MODE; 726 sysfs_attr_init(&mem->attr); 727 ret = sysfs_create_file(mem->kobj, &mem->attr); 728 if (ret < 0) 729 return ret; 730 i++; 731 } 732 733 i = 0; 734 list_for_each_entry(cache, &dev->cache_props, list) { 735 cache->kobj = kzalloc(sizeof(struct kobject), GFP_KERNEL); 736 if (!cache->kobj) 737 return -ENOMEM; 738 ret = kobject_init_and_add(cache->kobj, &cache_type, 739 dev->kobj_cache, "%d", i); 740 if (ret < 0) { 741 kobject_put(cache->kobj); 742 return ret; 743 } 744 745 cache->attr.name = "properties"; 746 cache->attr.mode = KFD_SYSFS_FILE_MODE; 747 sysfs_attr_init(&cache->attr); 748 ret = sysfs_create_file(cache->kobj, &cache->attr); 749 if (ret < 0) 750 return ret; 751 i++; 752 } 753 754 i = 0; 755 list_for_each_entry(iolink, &dev->io_link_props, list) { 756 iolink->kobj = kzalloc(sizeof(struct kobject), GFP_KERNEL); 757 if (!iolink->kobj) 758 return -ENOMEM; 759 ret = kobject_init_and_add(iolink->kobj, &iolink_type, 760 dev->kobj_iolink, "%d", i); 761 if (ret < 0) { 762 kobject_put(iolink->kobj); 763 return ret; 764 } 765 766 iolink->attr.name = "properties"; 767 iolink->attr.mode = KFD_SYSFS_FILE_MODE; 768 sysfs_attr_init(&iolink->attr); 769 ret = sysfs_create_file(iolink->kobj, &iolink->attr); 770 if (ret < 0) 771 return ret; 772 i++; 773 } 774 775 i = 0; 776 list_for_each_entry(p2plink, &dev->p2p_link_props, list) { 777 p2plink->kobj = kzalloc(sizeof(struct kobject), GFP_KERNEL); 778 if (!p2plink->kobj) 779 return -ENOMEM; 780 ret = kobject_init_and_add(p2plink->kobj, &iolink_type, 781 dev->kobj_p2plink, "%d", i); 782 if (ret < 0) { 783 kobject_put(p2plink->kobj); 784 return ret; 785 } 786 787 p2plink->attr.name = "properties"; 788 p2plink->attr.mode = KFD_SYSFS_FILE_MODE; 789 sysfs_attr_init(&p2plink->attr); 790 ret = sysfs_create_file(p2plink->kobj, &p2plink->attr); 791 if (ret < 0) 792 return ret; 793 i++; 794 } 795 796 /* All hardware blocks have the same number of attributes. */ 797 num_attrs = ARRAY_SIZE(perf_attr_iommu); 798 list_for_each_entry(perf, &dev->perf_props, list) { 799 perf->attr_group = kzalloc(sizeof(struct kfd_perf_attr) 800 * num_attrs + sizeof(struct attribute_group), 801 GFP_KERNEL); 802 if (!perf->attr_group) 803 return -ENOMEM; 804 805 attrs = (struct attribute **)(perf->attr_group + 1); 806 if (!strcmp(perf->block_name, "iommu")) { 807 /* Information of IOMMU's num_counters and counter_ids is shown 808 * under /sys/bus/event_source/devices/amd_iommu. We don't 809 * duplicate here. 810 */ 811 perf_attr_iommu[0].data = perf->max_concurrent; 812 for (i = 0; i < num_attrs; i++) 813 attrs[i] = &perf_attr_iommu[i].attr.attr; 814 } 815 perf->attr_group->name = perf->block_name; 816 perf->attr_group->attrs = attrs; 817 ret = sysfs_create_group(dev->kobj_perf, perf->attr_group); 818 if (ret < 0) 819 return ret; 820 } 821 822 return 0; 823 } 824 825 /* Called with write topology lock acquired */ 826 static int kfd_build_sysfs_node_tree(void) 827 { 828 struct kfd_topology_device *dev; 829 int ret; 830 uint32_t i = 0; 831 832 list_for_each_entry(dev, &topology_device_list, list) { 833 ret = kfd_build_sysfs_node_entry(dev, i); 834 if (ret < 0) 835 return ret; 836 i++; 837 } 838 839 return 0; 840 } 841 842 /* Called with write topology lock acquired */ 843 static void kfd_remove_sysfs_node_tree(void) 844 { 845 struct kfd_topology_device *dev; 846 847 list_for_each_entry(dev, &topology_device_list, list) 848 kfd_remove_sysfs_node_entry(dev); 849 } 850 851 static int kfd_topology_update_sysfs(void) 852 { 853 int ret; 854 855 if (!sys_props.kobj_topology) { 856 sys_props.kobj_topology = 857 kfd_alloc_struct(sys_props.kobj_topology); 858 if (!sys_props.kobj_topology) 859 return -ENOMEM; 860 861 ret = kobject_init_and_add(sys_props.kobj_topology, 862 &sysprops_type, &kfd_device->kobj, 863 "topology"); 864 if (ret < 0) { 865 kobject_put(sys_props.kobj_topology); 866 return ret; 867 } 868 869 sys_props.kobj_nodes = kobject_create_and_add("nodes", 870 sys_props.kobj_topology); 871 if (!sys_props.kobj_nodes) 872 return -ENOMEM; 873 874 sys_props.attr_genid.name = "generation_id"; 875 sys_props.attr_genid.mode = KFD_SYSFS_FILE_MODE; 876 sysfs_attr_init(&sys_props.attr_genid); 877 ret = sysfs_create_file(sys_props.kobj_topology, 878 &sys_props.attr_genid); 879 if (ret < 0) 880 return ret; 881 882 sys_props.attr_props.name = "system_properties"; 883 sys_props.attr_props.mode = KFD_SYSFS_FILE_MODE; 884 sysfs_attr_init(&sys_props.attr_props); 885 ret = sysfs_create_file(sys_props.kobj_topology, 886 &sys_props.attr_props); 887 if (ret < 0) 888 return ret; 889 } 890 891 kfd_remove_sysfs_node_tree(); 892 893 return kfd_build_sysfs_node_tree(); 894 } 895 896 static void kfd_topology_release_sysfs(void) 897 { 898 kfd_remove_sysfs_node_tree(); 899 if (sys_props.kobj_topology) { 900 sysfs_remove_file(sys_props.kobj_topology, 901 &sys_props.attr_genid); 902 sysfs_remove_file(sys_props.kobj_topology, 903 &sys_props.attr_props); 904 if (sys_props.kobj_nodes) { 905 kobject_del(sys_props.kobj_nodes); 906 kobject_put(sys_props.kobj_nodes); 907 sys_props.kobj_nodes = NULL; 908 } 909 kobject_del(sys_props.kobj_topology); 910 kobject_put(sys_props.kobj_topology); 911 sys_props.kobj_topology = NULL; 912 } 913 } 914 915 /* Called with write topology_lock acquired */ 916 static void kfd_topology_update_device_list(struct list_head *temp_list, 917 struct list_head *master_list) 918 { 919 while (!list_empty(temp_list)) { 920 list_move_tail(temp_list->next, master_list); 921 sys_props.num_devices++; 922 } 923 } 924 925 static void kfd_debug_print_topology(void) 926 { 927 struct kfd_topology_device *dev; 928 929 down_read(&topology_lock); 930 931 dev = list_last_entry(&topology_device_list, 932 struct kfd_topology_device, list); 933 if (dev) { 934 if (dev->node_props.cpu_cores_count) 935 pr_info("Topology: Add CPU node\n"); 936 else 937 pr_info("Topology: Add GPU node [0x%0x:0x%0x]\n", 938 dev->node_props.vendor_id, 939 dev->node_props.device_id); 940 } 941 up_read(&topology_lock); 942 } 943 944 /* Helper function for intializing platform_xx members of 945 * kfd_system_properties. Uses OEM info from the last CPU/APU node. 946 */ 947 static void kfd_update_system_properties(void) 948 { 949 struct kfd_topology_device *dev; 950 951 down_read(&topology_lock); 952 dev = list_last_entry(&topology_device_list, 953 struct kfd_topology_device, list); 954 if (dev) { 955 sys_props.platform_id = dev->oem_id64; 956 sys_props.platform_oem = *((uint64_t *)dev->oem_table_id); 957 sys_props.platform_rev = dev->oem_revision; 958 } 959 up_read(&topology_lock); 960 } 961 962 static void find_system_memory(const struct dmi_header *dm, void *private) 963 { 964 struct dmi_mem_device *memdev = container_of(dm, struct dmi_mem_device, header); 965 struct kfd_mem_properties *mem; 966 struct kfd_topology_device *kdev = 967 (struct kfd_topology_device *)private; 968 969 if (memdev->header.type != DMI_ENTRY_MEM_DEVICE) 970 return; 971 if (memdev->header.length < sizeof(struct dmi_mem_device)) 972 return; 973 974 list_for_each_entry(mem, &kdev->mem_props, list) { 975 if (memdev->total_width != 0xFFFF && memdev->total_width != 0) 976 mem->width = memdev->total_width; 977 if (memdev->speed != 0) 978 mem->mem_clk_max = memdev->speed; 979 } 980 } 981 982 /* kfd_add_non_crat_information - Add information that is not currently 983 * defined in CRAT but is necessary for KFD topology 984 * @dev - topology device to which addition info is added 985 */ 986 static void kfd_add_non_crat_information(struct kfd_topology_device *kdev) 987 { 988 /* Check if CPU only node. */ 989 if (!kdev->gpu) { 990 /* Add system memory information */ 991 dmi_walk(find_system_memory, kdev); 992 } 993 /* TODO: For GPU node, rearrange code from kfd_topology_add_device */ 994 } 995 996 int kfd_topology_init(void) 997 { 998 void *crat_image = NULL; 999 size_t image_size = 0; 1000 int ret; 1001 struct list_head temp_topology_device_list; 1002 int cpu_only_node = 0; 1003 struct kfd_topology_device *kdev; 1004 int proximity_domain; 1005 1006 /* topology_device_list - Master list of all topology devices 1007 * temp_topology_device_list - temporary list created while parsing CRAT 1008 * or VCRAT. Once parsing is complete the contents of list is moved to 1009 * topology_device_list 1010 */ 1011 1012 /* Initialize the head for the both the lists */ 1013 INIT_LIST_HEAD(&topology_device_list); 1014 INIT_LIST_HEAD(&temp_topology_device_list); 1015 init_rwsem(&topology_lock); 1016 1017 memset(&sys_props, 0, sizeof(sys_props)); 1018 1019 /* Proximity domains in ACPI CRAT tables start counting at 1020 * 0. The same should be true for virtual CRAT tables created 1021 * at this stage. GPUs added later in kfd_topology_add_device 1022 * use a counter. 1023 */ 1024 proximity_domain = 0; 1025 1026 ret = kfd_create_crat_image_virtual(&crat_image, &image_size, 1027 COMPUTE_UNIT_CPU, NULL, 1028 proximity_domain); 1029 cpu_only_node = 1; 1030 if (ret) { 1031 pr_err("Error creating VCRAT table for CPU\n"); 1032 return ret; 1033 } 1034 1035 ret = kfd_parse_crat_table(crat_image, 1036 &temp_topology_device_list, 1037 proximity_domain); 1038 if (ret) { 1039 pr_err("Error parsing VCRAT table for CPU\n"); 1040 goto err; 1041 } 1042 1043 kdev = list_first_entry(&temp_topology_device_list, 1044 struct kfd_topology_device, list); 1045 1046 down_write(&topology_lock); 1047 kfd_topology_update_device_list(&temp_topology_device_list, 1048 &topology_device_list); 1049 topology_crat_proximity_domain = sys_props.num_devices-1; 1050 ret = kfd_topology_update_sysfs(); 1051 up_write(&topology_lock); 1052 1053 if (!ret) { 1054 sys_props.generation_count++; 1055 kfd_update_system_properties(); 1056 kfd_debug_print_topology(); 1057 } else 1058 pr_err("Failed to update topology in sysfs ret=%d\n", ret); 1059 1060 /* For nodes with GPU, this information gets added 1061 * when GPU is detected (kfd_topology_add_device). 1062 */ 1063 if (cpu_only_node) { 1064 /* Add additional information to CPU only node created above */ 1065 down_write(&topology_lock); 1066 kdev = list_first_entry(&topology_device_list, 1067 struct kfd_topology_device, list); 1068 up_write(&topology_lock); 1069 kfd_add_non_crat_information(kdev); 1070 } 1071 1072 err: 1073 kfd_destroy_crat_image(crat_image); 1074 return ret; 1075 } 1076 1077 void kfd_topology_shutdown(void) 1078 { 1079 down_write(&topology_lock); 1080 kfd_topology_release_sysfs(); 1081 kfd_release_live_view(); 1082 up_write(&topology_lock); 1083 } 1084 1085 static uint32_t kfd_generate_gpu_id(struct kfd_node *gpu) 1086 { 1087 uint32_t gpu_id; 1088 uint32_t buf[8]; 1089 uint64_t local_mem_size; 1090 struct kfd_topology_device *dev; 1091 bool is_unique; 1092 uint8_t *crc_buf; 1093 1094 if (!gpu) 1095 return 0; 1096 1097 crc_buf = (uint8_t *)&buf; 1098 local_mem_size = gpu->local_mem_info.local_mem_size_private + 1099 gpu->local_mem_info.local_mem_size_public; 1100 buf[0] = gpu->adev->pdev->devfn; 1101 buf[1] = gpu->adev->pdev->subsystem_vendor | 1102 (gpu->adev->pdev->subsystem_device << 16); 1103 buf[2] = pci_domain_nr(gpu->adev->pdev->bus); 1104 buf[3] = gpu->adev->pdev->device; 1105 buf[4] = gpu->adev->pdev->bus->number; 1106 buf[5] = lower_32_bits(local_mem_size); 1107 buf[6] = upper_32_bits(local_mem_size); 1108 buf[7] = (ffs(gpu->xcc_mask) - 1) | (NUM_XCC(gpu->xcc_mask) << 16); 1109 1110 gpu_id = crc16(0, crc_buf, sizeof(buf)) & 1111 ((1 << KFD_GPU_ID_HASH_WIDTH) - 1); 1112 1113 /* There is a very small possibility when generating a 1114 * 16 (KFD_GPU_ID_HASH_WIDTH) bit value from 8 word buffer 1115 * that the value could be 0 or non-unique. So, check if 1116 * it is unique and non-zero. If not unique increment till 1117 * unique one is found. In case of overflow, restart from 1 1118 */ 1119 1120 down_read(&topology_lock); 1121 do { 1122 is_unique = true; 1123 if (!gpu_id) 1124 gpu_id = 1; 1125 list_for_each_entry(dev, &topology_device_list, list) { 1126 if (dev->gpu && dev->gpu_id == gpu_id) { 1127 is_unique = false; 1128 break; 1129 } 1130 } 1131 if (unlikely(!is_unique)) 1132 gpu_id = (gpu_id + 1) & 1133 ((1 << KFD_GPU_ID_HASH_WIDTH) - 1); 1134 } while (!is_unique); 1135 up_read(&topology_lock); 1136 1137 return gpu_id; 1138 } 1139 /* kfd_assign_gpu - Attach @gpu to the correct kfd topology device. If 1140 * the GPU device is not already present in the topology device 1141 * list then return NULL. This means a new topology device has to 1142 * be created for this GPU. 1143 */ 1144 static struct kfd_topology_device *kfd_assign_gpu(struct kfd_node *gpu) 1145 { 1146 struct kfd_topology_device *dev; 1147 struct kfd_topology_device *out_dev = NULL; 1148 struct kfd_mem_properties *mem; 1149 struct kfd_cache_properties *cache; 1150 struct kfd_iolink_properties *iolink; 1151 struct kfd_iolink_properties *p2plink; 1152 1153 list_for_each_entry(dev, &topology_device_list, list) { 1154 /* Discrete GPUs need their own topology device list 1155 * entries. Don't assign them to CPU/APU nodes. 1156 */ 1157 if (dev->node_props.cpu_cores_count) 1158 continue; 1159 1160 if (!dev->gpu && (dev->node_props.simd_count > 0)) { 1161 dev->gpu = gpu; 1162 out_dev = dev; 1163 1164 list_for_each_entry(mem, &dev->mem_props, list) 1165 mem->gpu = dev->gpu; 1166 list_for_each_entry(cache, &dev->cache_props, list) 1167 cache->gpu = dev->gpu; 1168 list_for_each_entry(iolink, &dev->io_link_props, list) 1169 iolink->gpu = dev->gpu; 1170 list_for_each_entry(p2plink, &dev->p2p_link_props, list) 1171 p2plink->gpu = dev->gpu; 1172 break; 1173 } 1174 } 1175 return out_dev; 1176 } 1177 1178 static void kfd_notify_gpu_change(uint32_t gpu_id, int arrival) 1179 { 1180 /* 1181 * TODO: Generate an event for thunk about the arrival/removal 1182 * of the GPU 1183 */ 1184 } 1185 1186 /* kfd_fill_mem_clk_max_info - Since CRAT doesn't have memory clock info, 1187 * patch this after CRAT parsing. 1188 */ 1189 static void kfd_fill_mem_clk_max_info(struct kfd_topology_device *dev) 1190 { 1191 struct kfd_mem_properties *mem; 1192 struct kfd_local_mem_info local_mem_info; 1193 1194 if (!dev) 1195 return; 1196 1197 /* Currently, amdgpu driver (amdgpu_mc) deals only with GPUs with 1198 * single bank of VRAM local memory. 1199 * for dGPUs - VCRAT reports only one bank of Local Memory 1200 * for APUs - If CRAT from ACPI reports more than one bank, then 1201 * all the banks will report the same mem_clk_max information 1202 */ 1203 amdgpu_amdkfd_get_local_mem_info(dev->gpu->adev, &local_mem_info, 1204 dev->gpu->xcp); 1205 1206 list_for_each_entry(mem, &dev->mem_props, list) 1207 mem->mem_clk_max = local_mem_info.mem_clk_max; 1208 } 1209 1210 static void kfd_set_iolink_no_atomics(struct kfd_topology_device *dev, 1211 struct kfd_topology_device *target_gpu_dev, 1212 struct kfd_iolink_properties *link) 1213 { 1214 /* xgmi always supports atomics between links. */ 1215 if (link->iolink_type == CRAT_IOLINK_TYPE_XGMI) 1216 return; 1217 1218 /* check pcie support to set cpu(dev) flags for target_gpu_dev link. */ 1219 if (target_gpu_dev) { 1220 uint32_t cap; 1221 1222 pcie_capability_read_dword(target_gpu_dev->gpu->adev->pdev, 1223 PCI_EXP_DEVCAP2, &cap); 1224 1225 if (!(cap & (PCI_EXP_DEVCAP2_ATOMIC_COMP32 | 1226 PCI_EXP_DEVCAP2_ATOMIC_COMP64))) 1227 link->flags |= CRAT_IOLINK_FLAGS_NO_ATOMICS_32_BIT | 1228 CRAT_IOLINK_FLAGS_NO_ATOMICS_64_BIT; 1229 /* set gpu (dev) flags. */ 1230 } else { 1231 if (!dev->gpu->kfd->pci_atomic_requested || 1232 dev->gpu->adev->asic_type == CHIP_HAWAII) 1233 link->flags |= CRAT_IOLINK_FLAGS_NO_ATOMICS_32_BIT | 1234 CRAT_IOLINK_FLAGS_NO_ATOMICS_64_BIT; 1235 } 1236 } 1237 1238 static void kfd_set_iolink_non_coherent(struct kfd_topology_device *to_dev, 1239 struct kfd_iolink_properties *outbound_link, 1240 struct kfd_iolink_properties *inbound_link) 1241 { 1242 /* CPU -> GPU with PCIe */ 1243 if (!to_dev->gpu && 1244 inbound_link->iolink_type == CRAT_IOLINK_TYPE_PCIEXPRESS) 1245 inbound_link->flags |= CRAT_IOLINK_FLAGS_NON_COHERENT; 1246 1247 if (to_dev->gpu) { 1248 /* GPU <-> GPU with PCIe and 1249 * Vega20 with XGMI 1250 */ 1251 if (inbound_link->iolink_type == CRAT_IOLINK_TYPE_PCIEXPRESS || 1252 (inbound_link->iolink_type == CRAT_IOLINK_TYPE_XGMI && 1253 KFD_GC_VERSION(to_dev->gpu) == IP_VERSION(9, 4, 0))) { 1254 outbound_link->flags |= CRAT_IOLINK_FLAGS_NON_COHERENT; 1255 inbound_link->flags |= CRAT_IOLINK_FLAGS_NON_COHERENT; 1256 } 1257 } 1258 } 1259 1260 #define REC_SDMA_NUM_GPU 8 1261 static const int rec_sdma_eng_map[REC_SDMA_NUM_GPU][REC_SDMA_NUM_GPU] = { 1262 { -1, 14, 12, 2, 4, 8, 10, 6 }, 1263 { 14, -1, 2, 10, 8, 4, 6, 12 }, 1264 { 10, 2, -1, 12, 14, 6, 4, 8 }, 1265 { 2, 12, 10, -1, 6, 14, 8, 4 }, 1266 { 4, 8, 14, 6, -1, 10, 12, 2 }, 1267 { 8, 4, 6, 14, 12, -1, 2, 10 }, 1268 { 10, 6, 4, 8, 12, 2, -1, 14 }, 1269 { 6, 12, 8, 4, 2, 10, 14, -1 }}; 1270 1271 static void kfd_set_recommended_sdma_engines(struct kfd_topology_device *to_dev, 1272 struct kfd_iolink_properties *outbound_link, 1273 struct kfd_iolink_properties *inbound_link) 1274 { 1275 struct kfd_node *gpu = outbound_link->gpu; 1276 struct amdgpu_device *adev = gpu->adev; 1277 unsigned int num_xgmi_nodes = adev->gmc.xgmi.num_physical_nodes; 1278 unsigned int num_xgmi_sdma_engines = kfd_get_num_xgmi_sdma_engines(gpu); 1279 unsigned int num_sdma_engines = kfd_get_num_sdma_engines(gpu); 1280 uint32_t sdma_eng_id_mask = (1 << num_sdma_engines) - 1; 1281 uint32_t xgmi_sdma_eng_id_mask = 1282 ((1 << num_xgmi_sdma_engines) - 1) << num_sdma_engines; 1283 1284 bool support_rec_eng = !amdgpu_sriov_vf(adev) && to_dev->gpu && 1285 adev->aid_mask && num_xgmi_nodes && gpu->kfd->num_nodes == 1 && 1286 num_xgmi_sdma_engines >= 6 && (!(adev->flags & AMD_IS_APU) && 1287 num_xgmi_nodes == 8); 1288 1289 if (support_rec_eng) { 1290 int src_socket_id = adev->gmc.xgmi.physical_node_id; 1291 int dst_socket_id = to_dev->gpu->adev->gmc.xgmi.physical_node_id; 1292 unsigned int reshift = num_xgmi_sdma_engines == 6 ? 1 : 0; 1293 1294 outbound_link->rec_sdma_eng_id_mask = 1295 1 << (rec_sdma_eng_map[src_socket_id][dst_socket_id] >> reshift); 1296 inbound_link->rec_sdma_eng_id_mask = 1297 1 << (rec_sdma_eng_map[dst_socket_id][src_socket_id] >> reshift); 1298 1299 /* If recommended engine is out of range, need to reset the mask */ 1300 if (outbound_link->rec_sdma_eng_id_mask & sdma_eng_id_mask) 1301 outbound_link->rec_sdma_eng_id_mask = xgmi_sdma_eng_id_mask; 1302 if (inbound_link->rec_sdma_eng_id_mask & sdma_eng_id_mask) 1303 inbound_link->rec_sdma_eng_id_mask = xgmi_sdma_eng_id_mask; 1304 1305 } else { 1306 uint32_t engine_mask = (outbound_link->iolink_type == CRAT_IOLINK_TYPE_XGMI && 1307 num_xgmi_sdma_engines && to_dev->gpu) ? xgmi_sdma_eng_id_mask : 1308 sdma_eng_id_mask; 1309 1310 outbound_link->rec_sdma_eng_id_mask = engine_mask; 1311 inbound_link->rec_sdma_eng_id_mask = engine_mask; 1312 } 1313 } 1314 1315 static void kfd_fill_iolink_non_crat_info(struct kfd_topology_device *dev) 1316 { 1317 struct kfd_iolink_properties *link, *inbound_link; 1318 struct kfd_topology_device *peer_dev; 1319 1320 if (!dev || !dev->gpu) 1321 return; 1322 1323 /* GPU only creates direct links so apply flags setting to all */ 1324 list_for_each_entry(link, &dev->io_link_props, list) { 1325 link->flags = CRAT_IOLINK_FLAGS_ENABLED; 1326 kfd_set_iolink_no_atomics(dev, NULL, link); 1327 peer_dev = kfd_topology_device_by_proximity_domain( 1328 link->node_to); 1329 1330 if (!peer_dev) 1331 continue; 1332 1333 /* Include the CPU peer in GPU hive if connected over xGMI. */ 1334 if (!peer_dev->gpu && 1335 link->iolink_type == CRAT_IOLINK_TYPE_XGMI) { 1336 /* 1337 * If the GPU is not part of a GPU hive, use its pci 1338 * device location as the hive ID to bind with the CPU. 1339 */ 1340 if (!dev->node_props.hive_id) 1341 dev->node_props.hive_id = pci_dev_id(dev->gpu->adev->pdev); 1342 peer_dev->node_props.hive_id = dev->node_props.hive_id; 1343 } 1344 1345 list_for_each_entry(inbound_link, &peer_dev->io_link_props, 1346 list) { 1347 if (inbound_link->node_to != link->node_from) 1348 continue; 1349 1350 inbound_link->flags = CRAT_IOLINK_FLAGS_ENABLED; 1351 kfd_set_iolink_no_atomics(peer_dev, dev, inbound_link); 1352 kfd_set_iolink_non_coherent(peer_dev, link, inbound_link); 1353 kfd_set_recommended_sdma_engines(peer_dev, link, inbound_link); 1354 } 1355 } 1356 1357 /* Create indirect links so apply flags setting to all */ 1358 list_for_each_entry(link, &dev->p2p_link_props, list) { 1359 link->flags = CRAT_IOLINK_FLAGS_ENABLED; 1360 kfd_set_iolink_no_atomics(dev, NULL, link); 1361 peer_dev = kfd_topology_device_by_proximity_domain( 1362 link->node_to); 1363 1364 if (!peer_dev) 1365 continue; 1366 1367 list_for_each_entry(inbound_link, &peer_dev->p2p_link_props, 1368 list) { 1369 if (inbound_link->node_to != link->node_from) 1370 continue; 1371 1372 inbound_link->flags = CRAT_IOLINK_FLAGS_ENABLED; 1373 kfd_set_iolink_no_atomics(peer_dev, dev, inbound_link); 1374 kfd_set_iolink_non_coherent(peer_dev, link, inbound_link); 1375 } 1376 } 1377 } 1378 1379 static int kfd_build_p2p_node_entry(struct kfd_topology_device *dev, 1380 struct kfd_iolink_properties *p2plink) 1381 { 1382 int ret; 1383 1384 p2plink->kobj = kzalloc(sizeof(struct kobject), GFP_KERNEL); 1385 if (!p2plink->kobj) 1386 return -ENOMEM; 1387 1388 ret = kobject_init_and_add(p2plink->kobj, &iolink_type, 1389 dev->kobj_p2plink, "%d", dev->node_props.p2p_links_count - 1); 1390 if (ret < 0) { 1391 kobject_put(p2plink->kobj); 1392 return ret; 1393 } 1394 1395 p2plink->attr.name = "properties"; 1396 p2plink->attr.mode = KFD_SYSFS_FILE_MODE; 1397 sysfs_attr_init(&p2plink->attr); 1398 ret = sysfs_create_file(p2plink->kobj, &p2plink->attr); 1399 if (ret < 0) 1400 return ret; 1401 1402 return 0; 1403 } 1404 1405 static int kfd_create_indirect_link_prop(struct kfd_topology_device *kdev, int gpu_node) 1406 { 1407 struct kfd_iolink_properties *gpu_link, *tmp_link, *cpu_link; 1408 struct kfd_iolink_properties *props = NULL, *props2 = NULL; 1409 struct kfd_topology_device *cpu_dev; 1410 int ret = 0; 1411 int i, num_cpu; 1412 1413 num_cpu = 0; 1414 list_for_each_entry(cpu_dev, &topology_device_list, list) { 1415 if (cpu_dev->gpu) 1416 break; 1417 num_cpu++; 1418 } 1419 1420 if (list_empty(&kdev->io_link_props)) 1421 return -ENODATA; 1422 1423 gpu_link = list_first_entry(&kdev->io_link_props, 1424 struct kfd_iolink_properties, list); 1425 1426 for (i = 0; i < num_cpu; i++) { 1427 /* CPU <--> GPU */ 1428 if (gpu_link->node_to == i) 1429 continue; 1430 1431 /* find CPU <--> CPU links */ 1432 cpu_link = NULL; 1433 cpu_dev = kfd_topology_device_by_proximity_domain(i); 1434 if (cpu_dev) { 1435 list_for_each_entry(tmp_link, 1436 &cpu_dev->io_link_props, list) { 1437 if (tmp_link->node_to == gpu_link->node_to) { 1438 cpu_link = tmp_link; 1439 break; 1440 } 1441 } 1442 } 1443 1444 if (!cpu_link) 1445 return -ENOMEM; 1446 1447 /* CPU <--> CPU <--> GPU, GPU node*/ 1448 props = kfd_alloc_struct(props); 1449 if (!props) 1450 return -ENOMEM; 1451 1452 memcpy(props, gpu_link, sizeof(struct kfd_iolink_properties)); 1453 props->weight = gpu_link->weight + cpu_link->weight; 1454 props->min_latency = gpu_link->min_latency + cpu_link->min_latency; 1455 props->max_latency = gpu_link->max_latency + cpu_link->max_latency; 1456 props->min_bandwidth = min(gpu_link->min_bandwidth, cpu_link->min_bandwidth); 1457 props->max_bandwidth = min(gpu_link->max_bandwidth, cpu_link->max_bandwidth); 1458 1459 props->node_from = gpu_node; 1460 props->node_to = i; 1461 kdev->node_props.p2p_links_count++; 1462 list_add_tail(&props->list, &kdev->p2p_link_props); 1463 ret = kfd_build_p2p_node_entry(kdev, props); 1464 if (ret < 0) 1465 return ret; 1466 1467 /* for small Bar, no CPU --> GPU in-direct links */ 1468 if (kfd_dev_is_large_bar(kdev->gpu)) { 1469 /* CPU <--> CPU <--> GPU, CPU node*/ 1470 props2 = kfd_alloc_struct(props2); 1471 if (!props2) 1472 return -ENOMEM; 1473 1474 memcpy(props2, props, sizeof(struct kfd_iolink_properties)); 1475 props2->node_from = i; 1476 props2->node_to = gpu_node; 1477 props2->kobj = NULL; 1478 cpu_dev->node_props.p2p_links_count++; 1479 list_add_tail(&props2->list, &cpu_dev->p2p_link_props); 1480 ret = kfd_build_p2p_node_entry(cpu_dev, props2); 1481 if (ret < 0) 1482 return ret; 1483 } 1484 } 1485 return ret; 1486 } 1487 1488 #if defined(CONFIG_HSA_AMD_P2P) 1489 static int kfd_add_peer_prop(struct kfd_topology_device *kdev, 1490 struct kfd_topology_device *peer, int from, int to) 1491 { 1492 struct kfd_iolink_properties *props = NULL; 1493 struct kfd_iolink_properties *iolink1, *iolink2, *iolink3; 1494 struct kfd_topology_device *cpu_dev; 1495 int ret = 0; 1496 1497 if (!amdgpu_device_is_peer_accessible( 1498 kdev->gpu->adev, 1499 peer->gpu->adev)) 1500 return ret; 1501 1502 if (list_empty(&kdev->io_link_props)) 1503 return -ENODATA; 1504 1505 iolink1 = list_first_entry(&kdev->io_link_props, 1506 struct kfd_iolink_properties, list); 1507 1508 if (list_empty(&peer->io_link_props)) 1509 return -ENODATA; 1510 1511 iolink2 = list_first_entry(&peer->io_link_props, 1512 struct kfd_iolink_properties, list); 1513 1514 props = kfd_alloc_struct(props); 1515 if (!props) 1516 return -ENOMEM; 1517 1518 memcpy(props, iolink1, sizeof(struct kfd_iolink_properties)); 1519 1520 props->weight = iolink1->weight + iolink2->weight; 1521 props->min_latency = iolink1->min_latency + iolink2->min_latency; 1522 props->max_latency = iolink1->max_latency + iolink2->max_latency; 1523 props->min_bandwidth = min(iolink1->min_bandwidth, iolink2->min_bandwidth); 1524 props->max_bandwidth = min(iolink2->max_bandwidth, iolink2->max_bandwidth); 1525 1526 if (iolink1->node_to != iolink2->node_to) { 1527 /* CPU->CPU link*/ 1528 cpu_dev = kfd_topology_device_by_proximity_domain(iolink1->node_to); 1529 if (cpu_dev) { 1530 list_for_each_entry(iolink3, &cpu_dev->io_link_props, list) { 1531 if (iolink3->node_to != iolink2->node_to) 1532 continue; 1533 1534 props->weight += iolink3->weight; 1535 props->min_latency += iolink3->min_latency; 1536 props->max_latency += iolink3->max_latency; 1537 props->min_bandwidth = min(props->min_bandwidth, 1538 iolink3->min_bandwidth); 1539 props->max_bandwidth = min(props->max_bandwidth, 1540 iolink3->max_bandwidth); 1541 break; 1542 } 1543 } else { 1544 WARN(1, "CPU node not found"); 1545 } 1546 } 1547 1548 props->node_from = from; 1549 props->node_to = to; 1550 peer->node_props.p2p_links_count++; 1551 list_add_tail(&props->list, &peer->p2p_link_props); 1552 ret = kfd_build_p2p_node_entry(peer, props); 1553 1554 return ret; 1555 } 1556 #endif 1557 1558 static int kfd_dev_create_p2p_links(void) 1559 { 1560 struct kfd_topology_device *dev; 1561 struct kfd_topology_device *new_dev; 1562 #if defined(CONFIG_HSA_AMD_P2P) 1563 uint32_t i; 1564 #endif 1565 uint32_t k; 1566 int ret = 0; 1567 1568 k = 0; 1569 list_for_each_entry(dev, &topology_device_list, list) 1570 k++; 1571 if (k < 2) 1572 return 0; 1573 1574 new_dev = list_last_entry(&topology_device_list, struct kfd_topology_device, list); 1575 if (WARN_ON(!new_dev->gpu)) 1576 return 0; 1577 1578 k--; 1579 1580 /* create in-direct links */ 1581 ret = kfd_create_indirect_link_prop(new_dev, k); 1582 if (ret < 0) 1583 goto out; 1584 1585 /* create p2p links */ 1586 #if defined(CONFIG_HSA_AMD_P2P) 1587 i = 0; 1588 list_for_each_entry(dev, &topology_device_list, list) { 1589 if (dev == new_dev) 1590 break; 1591 if (!dev->gpu || !dev->gpu->adev || 1592 (dev->gpu->kfd->hive_id && 1593 dev->gpu->kfd->hive_id == new_dev->gpu->kfd->hive_id && 1594 amdgpu_xgmi_get_is_sharing_enabled(dev->gpu->adev, new_dev->gpu->adev))) 1595 goto next; 1596 1597 /* check if node(s) is/are peer accessible in one direction or bi-direction */ 1598 ret = kfd_add_peer_prop(new_dev, dev, i, k); 1599 if (ret < 0) 1600 goto out; 1601 1602 ret = kfd_add_peer_prop(dev, new_dev, k, i); 1603 if (ret < 0) 1604 goto out; 1605 next: 1606 i++; 1607 } 1608 #endif 1609 1610 out: 1611 return ret; 1612 } 1613 1614 /* Helper function. See kfd_fill_gpu_cache_info for parameter description */ 1615 static int fill_in_l1_pcache(struct kfd_cache_properties **props_ext, 1616 struct kfd_gpu_cache_info *pcache_info, 1617 int cu_bitmask, 1618 int cache_type, unsigned int cu_processor_id, 1619 int cu_block) 1620 { 1621 unsigned int cu_sibling_map_mask; 1622 int first_active_cu; 1623 struct kfd_cache_properties *pcache = NULL; 1624 1625 cu_sibling_map_mask = cu_bitmask; 1626 cu_sibling_map_mask >>= cu_block; 1627 cu_sibling_map_mask &= ((1 << pcache_info[cache_type].num_cu_shared) - 1); 1628 first_active_cu = ffs(cu_sibling_map_mask); 1629 1630 /* CU could be inactive. In case of shared cache find the first active 1631 * CU. and incase of non-shared cache check if the CU is inactive. If 1632 * inactive active skip it 1633 */ 1634 if (first_active_cu) { 1635 pcache = kfd_alloc_struct(pcache); 1636 if (!pcache) 1637 return -ENOMEM; 1638 1639 memset(pcache, 0, sizeof(struct kfd_cache_properties)); 1640 pcache->processor_id_low = cu_processor_id + (first_active_cu - 1); 1641 pcache->cache_level = pcache_info[cache_type].cache_level; 1642 pcache->cache_size = pcache_info[cache_type].cache_size; 1643 pcache->cacheline_size = pcache_info[cache_type].cache_line_size; 1644 1645 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_DATA_CACHE) 1646 pcache->cache_type |= HSA_CACHE_TYPE_DATA; 1647 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_INST_CACHE) 1648 pcache->cache_type |= HSA_CACHE_TYPE_INSTRUCTION; 1649 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_CPU_CACHE) 1650 pcache->cache_type |= HSA_CACHE_TYPE_CPU; 1651 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_SIMD_CACHE) 1652 pcache->cache_type |= HSA_CACHE_TYPE_HSACU; 1653 1654 /* Sibling map is w.r.t processor_id_low, so shift out 1655 * inactive CU 1656 */ 1657 cu_sibling_map_mask = 1658 cu_sibling_map_mask >> (first_active_cu - 1); 1659 1660 pcache->sibling_map[0] = (uint8_t)(cu_sibling_map_mask & 0xFF); 1661 pcache->sibling_map[1] = 1662 (uint8_t)((cu_sibling_map_mask >> 8) & 0xFF); 1663 pcache->sibling_map[2] = 1664 (uint8_t)((cu_sibling_map_mask >> 16) & 0xFF); 1665 pcache->sibling_map[3] = 1666 (uint8_t)((cu_sibling_map_mask >> 24) & 0xFF); 1667 1668 pcache->sibling_map_size = 4; 1669 *props_ext = pcache; 1670 1671 return 0; 1672 } 1673 return 1; 1674 } 1675 1676 /* Helper function. See kfd_fill_gpu_cache_info for parameter description */ 1677 static int fill_in_l2_l3_pcache(struct kfd_cache_properties **props_ext, 1678 struct kfd_gpu_cache_info *pcache_info, 1679 struct amdgpu_cu_info *cu_info, 1680 struct amdgpu_gfx_config *gfx_info, 1681 int cache_type, unsigned int cu_processor_id, 1682 struct kfd_node *knode) 1683 { 1684 unsigned int cu_sibling_map_mask = 0; 1685 int first_active_cu; 1686 int i, j, k, xcc, start, end; 1687 int num_xcc = NUM_XCC(knode->xcc_mask); 1688 struct kfd_cache_properties *pcache = NULL; 1689 enum amdgpu_memory_partition mode; 1690 struct amdgpu_device *adev = knode->adev; 1691 bool found = false; 1692 1693 start = ffs(knode->xcc_mask) - 1; 1694 end = start + num_xcc; 1695 1696 /* To find the bitmap in the first active cu in the first 1697 * xcc, it is based on the assumption that evrey xcc must 1698 * have at least one active cu. 1699 */ 1700 for (i = 0; i < gfx_info->max_shader_engines && !found; i++) { 1701 for (j = 0; j < gfx_info->max_sh_per_se && !found; j++) { 1702 if (cu_info->bitmap[start][i % 4][j % 4]) { 1703 cu_sibling_map_mask = 1704 cu_info->bitmap[start][i % 4][j % 4]; 1705 found = true; 1706 } 1707 } 1708 } 1709 1710 cu_sibling_map_mask &= 1711 ((1 << pcache_info[cache_type].num_cu_shared) - 1); 1712 first_active_cu = ffs(cu_sibling_map_mask); 1713 1714 /* CU could be inactive. In case of shared cache find the first active 1715 * CU. and incase of non-shared cache check if the CU is inactive. If 1716 * inactive active skip it 1717 */ 1718 if (first_active_cu) { 1719 pcache = kfd_alloc_struct(pcache); 1720 if (!pcache) 1721 return -ENOMEM; 1722 1723 memset(pcache, 0, sizeof(struct kfd_cache_properties)); 1724 pcache->processor_id_low = cu_processor_id 1725 + (first_active_cu - 1); 1726 pcache->cache_level = pcache_info[cache_type].cache_level; 1727 pcache->cacheline_size = pcache_info[cache_type].cache_line_size; 1728 1729 if (KFD_GC_VERSION(knode) == IP_VERSION(9, 4, 3) || 1730 KFD_GC_VERSION(knode) == IP_VERSION(9, 4, 4) || 1731 KFD_GC_VERSION(knode) == IP_VERSION(9, 5, 0)) 1732 mode = adev->gmc.gmc_funcs->query_mem_partition_mode(adev); 1733 else 1734 mode = UNKNOWN_MEMORY_PARTITION_MODE; 1735 1736 pcache->cache_size = pcache_info[cache_type].cache_size; 1737 /* Partition mode only affects L3 cache size */ 1738 if (mode && pcache->cache_level == 3) 1739 pcache->cache_size /= mode; 1740 1741 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_DATA_CACHE) 1742 pcache->cache_type |= HSA_CACHE_TYPE_DATA; 1743 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_INST_CACHE) 1744 pcache->cache_type |= HSA_CACHE_TYPE_INSTRUCTION; 1745 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_CPU_CACHE) 1746 pcache->cache_type |= HSA_CACHE_TYPE_CPU; 1747 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_SIMD_CACHE) 1748 pcache->cache_type |= HSA_CACHE_TYPE_HSACU; 1749 1750 /* Sibling map is w.r.t processor_id_low, so shift out 1751 * inactive CU 1752 */ 1753 cu_sibling_map_mask = cu_sibling_map_mask >> (first_active_cu - 1); 1754 k = 0; 1755 1756 for (xcc = start; xcc < end; xcc++) { 1757 for (i = 0; i < gfx_info->max_shader_engines; i++) { 1758 for (j = 0; j < gfx_info->max_sh_per_se; j++) { 1759 pcache->sibling_map[k] = (uint8_t)(cu_sibling_map_mask & 0xFF); 1760 pcache->sibling_map[k+1] = (uint8_t)((cu_sibling_map_mask >> 8) & 0xFF); 1761 pcache->sibling_map[k+2] = (uint8_t)((cu_sibling_map_mask >> 16) & 0xFF); 1762 pcache->sibling_map[k+3] = (uint8_t)((cu_sibling_map_mask >> 24) & 0xFF); 1763 k += 4; 1764 1765 cu_sibling_map_mask = cu_info->bitmap[xcc][i % 4][j + i / 4]; 1766 cu_sibling_map_mask &= ((1 << pcache_info[cache_type].num_cu_shared) - 1); 1767 } 1768 } 1769 } 1770 pcache->sibling_map_size = k; 1771 *props_ext = pcache; 1772 return 0; 1773 } 1774 return 1; 1775 } 1776 1777 #define KFD_MAX_CACHE_TYPES 6 1778 1779 /* kfd_fill_cache_non_crat_info - Fill GPU cache info using kfd_gpu_cache_info 1780 * tables 1781 */ 1782 static void kfd_fill_cache_non_crat_info(struct kfd_topology_device *dev, struct kfd_node *kdev) 1783 { 1784 struct kfd_gpu_cache_info *pcache_info = NULL; 1785 int i, j, k, xcc, start, end; 1786 int ct = 0; 1787 unsigned int cu_processor_id; 1788 int ret; 1789 unsigned int num_cu_shared; 1790 struct amdgpu_cu_info *cu_info = &kdev->adev->gfx.cu_info; 1791 struct amdgpu_gfx_config *gfx_info = &kdev->adev->gfx.config; 1792 int gpu_processor_id; 1793 struct kfd_cache_properties *props_ext = NULL; 1794 int num_of_entries = 0; 1795 int num_of_cache_types = 0; 1796 struct kfd_gpu_cache_info cache_info[KFD_MAX_CACHE_TYPES]; 1797 1798 1799 gpu_processor_id = dev->node_props.simd_id_base; 1800 1801 memset(cache_info, 0, sizeof(cache_info)); 1802 pcache_info = cache_info; 1803 num_of_cache_types = kfd_get_gpu_cache_info(kdev, &pcache_info); 1804 if (!num_of_cache_types) { 1805 pr_warn("no cache info found\n"); 1806 return; 1807 } 1808 1809 /* For each type of cache listed in the kfd_gpu_cache_info table, 1810 * go through all available Compute Units. 1811 * The [i,j,k] loop will 1812 * if kfd_gpu_cache_info.num_cu_shared = 1 1813 * will parse through all available CU 1814 * If (kfd_gpu_cache_info.num_cu_shared != 1) 1815 * then it will consider only one CU from 1816 * the shared unit 1817 */ 1818 start = ffs(kdev->xcc_mask) - 1; 1819 end = start + NUM_XCC(kdev->xcc_mask); 1820 1821 for (ct = 0; ct < num_of_cache_types; ct++) { 1822 cu_processor_id = gpu_processor_id; 1823 if (pcache_info[ct].cache_level == 1) { 1824 for (xcc = start; xcc < end; xcc++) { 1825 for (i = 0; i < gfx_info->max_shader_engines; i++) { 1826 for (j = 0; j < gfx_info->max_sh_per_se; j++) { 1827 for (k = 0; k < gfx_info->max_cu_per_sh; k += pcache_info[ct].num_cu_shared) { 1828 1829 ret = fill_in_l1_pcache(&props_ext, pcache_info, 1830 cu_info->bitmap[xcc][i % 4][j + i / 4], ct, 1831 cu_processor_id, k); 1832 1833 if (ret < 0) 1834 break; 1835 1836 if (!ret) { 1837 num_of_entries++; 1838 list_add_tail(&props_ext->list, &dev->cache_props); 1839 } 1840 1841 /* Move to next CU block */ 1842 num_cu_shared = ((k + pcache_info[ct].num_cu_shared) <= 1843 gfx_info->max_cu_per_sh) ? 1844 pcache_info[ct].num_cu_shared : 1845 (gfx_info->max_cu_per_sh - k); 1846 cu_processor_id += num_cu_shared; 1847 } 1848 } 1849 } 1850 } 1851 } else { 1852 ret = fill_in_l2_l3_pcache(&props_ext, pcache_info, 1853 cu_info, gfx_info, ct, cu_processor_id, kdev); 1854 1855 if (ret < 0) 1856 break; 1857 1858 if (!ret) { 1859 num_of_entries++; 1860 list_add_tail(&props_ext->list, &dev->cache_props); 1861 } 1862 } 1863 } 1864 dev->node_props.caches_count += num_of_entries; 1865 pr_debug("Added [%d] GPU cache entries\n", num_of_entries); 1866 } 1867 1868 static int kfd_topology_add_device_locked(struct kfd_node *gpu, 1869 struct kfd_topology_device **dev) 1870 { 1871 int proximity_domain = ++topology_crat_proximity_domain; 1872 struct list_head temp_topology_device_list; 1873 void *crat_image = NULL; 1874 size_t image_size = 0; 1875 int res; 1876 1877 res = kfd_create_crat_image_virtual(&crat_image, &image_size, 1878 COMPUTE_UNIT_GPU, gpu, 1879 proximity_domain); 1880 if (res) { 1881 dev_err(gpu->adev->dev, "Error creating VCRAT\n"); 1882 topology_crat_proximity_domain--; 1883 goto err; 1884 } 1885 1886 INIT_LIST_HEAD(&temp_topology_device_list); 1887 1888 res = kfd_parse_crat_table(crat_image, 1889 &temp_topology_device_list, 1890 proximity_domain); 1891 if (res) { 1892 dev_err(gpu->adev->dev, "Error parsing VCRAT\n"); 1893 topology_crat_proximity_domain--; 1894 goto err; 1895 } 1896 1897 kfd_topology_update_device_list(&temp_topology_device_list, 1898 &topology_device_list); 1899 1900 *dev = kfd_assign_gpu(gpu); 1901 if (WARN_ON(!*dev)) { 1902 res = -ENODEV; 1903 goto err; 1904 } 1905 1906 /* Fill the cache affinity information here for the GPUs 1907 * using VCRAT 1908 */ 1909 kfd_fill_cache_non_crat_info(*dev, gpu); 1910 1911 /* Update the SYSFS tree, since we added another topology 1912 * device 1913 */ 1914 res = kfd_topology_update_sysfs(); 1915 if (!res) 1916 sys_props.generation_count++; 1917 else 1918 dev_err(gpu->adev->dev, "Failed to update GPU to sysfs topology. res=%d\n", 1919 res); 1920 1921 err: 1922 kfd_destroy_crat_image(crat_image); 1923 return res; 1924 } 1925 1926 static void kfd_topology_set_dbg_firmware_support(struct kfd_topology_device *dev) 1927 { 1928 bool firmware_supported = true; 1929 1930 if (KFD_GC_VERSION(dev->gpu) >= IP_VERSION(11, 0, 0) && 1931 KFD_GC_VERSION(dev->gpu) < IP_VERSION(12, 0, 0)) { 1932 uint32_t mes_api_rev = (dev->gpu->adev->mes.sched_version & 1933 AMDGPU_MES_API_VERSION_MASK) >> 1934 AMDGPU_MES_API_VERSION_SHIFT; 1935 uint32_t mes_rev = dev->gpu->adev->mes.sched_version & 1936 AMDGPU_MES_VERSION_MASK; 1937 1938 firmware_supported = (mes_api_rev >= 14) && (mes_rev >= 64); 1939 goto out; 1940 } 1941 1942 /* 1943 * Note: Any unlisted devices here are assumed to support exception handling. 1944 * Add additional checks here as needed. 1945 */ 1946 switch (KFD_GC_VERSION(dev->gpu)) { 1947 case IP_VERSION(9, 0, 1): 1948 firmware_supported = dev->gpu->kfd->mec_fw_version >= 459 + 32768; 1949 break; 1950 case IP_VERSION(9, 1, 0): 1951 case IP_VERSION(9, 2, 1): 1952 case IP_VERSION(9, 2, 2): 1953 case IP_VERSION(9, 3, 0): 1954 case IP_VERSION(9, 4, 0): 1955 firmware_supported = dev->gpu->kfd->mec_fw_version >= 459; 1956 break; 1957 case IP_VERSION(9, 4, 1): 1958 firmware_supported = dev->gpu->kfd->mec_fw_version >= 60; 1959 break; 1960 case IP_VERSION(9, 4, 2): 1961 firmware_supported = dev->gpu->kfd->mec_fw_version >= 51; 1962 break; 1963 case IP_VERSION(10, 1, 10): 1964 case IP_VERSION(10, 1, 2): 1965 case IP_VERSION(10, 1, 1): 1966 firmware_supported = dev->gpu->kfd->mec_fw_version >= 144; 1967 break; 1968 case IP_VERSION(10, 3, 0): 1969 case IP_VERSION(10, 3, 2): 1970 case IP_VERSION(10, 3, 1): 1971 case IP_VERSION(10, 3, 4): 1972 case IP_VERSION(10, 3, 5): 1973 firmware_supported = dev->gpu->kfd->mec_fw_version >= 89; 1974 break; 1975 case IP_VERSION(10, 1, 3): 1976 case IP_VERSION(10, 3, 3): 1977 firmware_supported = false; 1978 break; 1979 default: 1980 break; 1981 } 1982 1983 out: 1984 if (firmware_supported) 1985 dev->node_props.capability |= HSA_CAP_TRAP_DEBUG_FIRMWARE_SUPPORTED; 1986 } 1987 1988 static void kfd_topology_set_capabilities(struct kfd_topology_device *dev) 1989 { 1990 dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_2_0 << 1991 HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT) & 1992 HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK); 1993 1994 dev->node_props.capability |= HSA_CAP_TRAP_DEBUG_SUPPORT | 1995 HSA_CAP_TRAP_DEBUG_WAVE_LAUNCH_TRAP_OVERRIDE_SUPPORTED | 1996 HSA_CAP_TRAP_DEBUG_WAVE_LAUNCH_MODE_SUPPORTED; 1997 1998 if (kfd_dbg_has_ttmps_always_setup(dev->gpu)) 1999 dev->node_props.debug_prop |= HSA_DBG_DISPATCH_INFO_ALWAYS_VALID; 2000 2001 if (KFD_GC_VERSION(dev->gpu) < IP_VERSION(10, 0, 0)) { 2002 if (KFD_GC_VERSION(dev->gpu) == IP_VERSION(9, 4, 3) || 2003 KFD_GC_VERSION(dev->gpu) == IP_VERSION(9, 4, 4)) 2004 dev->node_props.debug_prop |= 2005 HSA_DBG_WATCH_ADDR_MASK_LO_BIT_GFX9_4_3 | 2006 HSA_DBG_WATCH_ADDR_MASK_HI_BIT_GFX9_4_3; 2007 else 2008 dev->node_props.debug_prop |= 2009 HSA_DBG_WATCH_ADDR_MASK_LO_BIT_GFX9 | 2010 HSA_DBG_WATCH_ADDR_MASK_HI_BIT; 2011 2012 if (KFD_GC_VERSION(dev->gpu) >= IP_VERSION(9, 4, 2)) 2013 dev->node_props.capability |= 2014 HSA_CAP_TRAP_DEBUG_PRECISE_MEMORY_OPERATIONS_SUPPORTED; 2015 2016 if (!amdgpu_sriov_vf(dev->gpu->adev)) 2017 dev->node_props.capability |= HSA_CAP_PER_QUEUE_RESET_SUPPORTED; 2018 2019 } else { 2020 dev->node_props.debug_prop |= HSA_DBG_WATCH_ADDR_MASK_LO_BIT_GFX10 | 2021 HSA_DBG_WATCH_ADDR_MASK_HI_BIT; 2022 2023 if (KFD_GC_VERSION(dev->gpu) >= IP_VERSION(12, 0, 0)) 2024 dev->node_props.capability |= 2025 HSA_CAP_TRAP_DEBUG_PRECISE_ALU_OPERATIONS_SUPPORTED; 2026 2027 if (KFD_GC_VERSION(dev->gpu) >= IP_VERSION(12, 1, 0)) { 2028 dev->node_props.capability |= 2029 HSA_CAP_TRAP_DEBUG_PRECISE_MEMORY_OPERATIONS_SUPPORTED; 2030 dev->node_props.capability2 |= 2031 HSA_CAP2_TRAP_DEBUG_LDS_OUT_OF_ADDR_RANGE_SUPPORTED; 2032 } 2033 } 2034 2035 kfd_topology_set_dbg_firmware_support(dev); 2036 } 2037 2038 int kfd_topology_add_device(struct kfd_node *gpu) 2039 { 2040 uint32_t gpu_id; 2041 struct kfd_topology_device *dev; 2042 int res = 0; 2043 int i; 2044 const char *asic_name = amdgpu_asic_name[gpu->adev->asic_type]; 2045 struct amdgpu_gfx_config *gfx_info = &gpu->adev->gfx.config; 2046 struct amdgpu_cu_info *cu_info = &gpu->adev->gfx.cu_info; 2047 2048 if (gpu->xcp && !gpu->xcp->ddev) { 2049 dev_warn(gpu->adev->dev, 2050 "Won't add GPU to topology since it has no drm node assigned."); 2051 return 0; 2052 } else { 2053 dev_dbg(gpu->adev->dev, "Adding new GPU to topology\n"); 2054 } 2055 2056 /* Check to see if this gpu device exists in the topology_device_list. 2057 * If so, assign the gpu to that device, 2058 * else create a Virtual CRAT for this gpu device and then parse that 2059 * CRAT to create a new topology device. Once created assign the gpu to 2060 * that topology device 2061 */ 2062 down_write(&topology_lock); 2063 dev = kfd_assign_gpu(gpu); 2064 if (!dev) 2065 res = kfd_topology_add_device_locked(gpu, &dev); 2066 up_write(&topology_lock); 2067 if (res) 2068 return res; 2069 2070 gpu_id = kfd_generate_gpu_id(gpu); 2071 dev->gpu_id = gpu_id; 2072 gpu->id = gpu_id; 2073 2074 kfd_dev_create_p2p_links(); 2075 2076 /* TODO: Move the following lines to function 2077 * kfd_add_non_crat_information 2078 */ 2079 2080 /* Fill-in additional information that is not available in CRAT but 2081 * needed for the topology 2082 */ 2083 for (i = 0; i < KFD_TOPOLOGY_PUBLIC_NAME_SIZE-1; i++) { 2084 dev->node_props.name[i] = __tolower(asic_name[i]); 2085 if (asic_name[i] == '\0') 2086 break; 2087 } 2088 dev->node_props.name[i] = '\0'; 2089 2090 dev->node_props.simd_arrays_per_engine = 2091 gfx_info->max_sh_per_se; 2092 2093 dev->node_props.gfx_target_version = 2094 gpu->kfd->device_info.gfx_target_version; 2095 dev->node_props.vendor_id = gpu->adev->pdev->vendor; 2096 dev->node_props.device_id = gpu->adev->pdev->device; 2097 dev->node_props.capability |= 2098 ((dev->gpu->adev->rev_id << HSA_CAP_ASIC_REVISION_SHIFT) & 2099 HSA_CAP_ASIC_REVISION_MASK); 2100 2101 dev->node_props.location_id = pci_dev_id(gpu->adev->pdev); 2102 if (gpu->kfd->num_nodes > 1) 2103 dev->node_props.location_id |= dev->gpu->node_id; 2104 2105 dev->node_props.domain = pci_domain_nr(gpu->adev->pdev->bus); 2106 dev->node_props.max_engine_clk_fcompute = 2107 amdgpu_amdkfd_get_max_engine_clock_in_mhz(dev->gpu->adev); 2108 dev->node_props.max_engine_clk_ccompute = 2109 cpufreq_quick_get_max(0) / 1000; 2110 2111 if (gpu->xcp) 2112 dev->node_props.drm_render_minor = gpu->xcp->ddev->render->index; 2113 else 2114 dev->node_props.drm_render_minor = 2115 gpu->kfd->shared_resources.drm_render_minor; 2116 2117 dev->node_props.hive_id = gpu->kfd->hive_id; 2118 dev->node_props.num_sdma_engines = kfd_get_num_sdma_engines(gpu); 2119 dev->node_props.num_sdma_xgmi_engines = 2120 kfd_get_num_xgmi_sdma_engines(gpu); 2121 dev->node_props.num_sdma_queues_per_engine = 2122 gpu->kfd->device_info.num_sdma_queues_per_engine - 2123 gpu->kfd->device_info.num_reserved_sdma_queues_per_engine; 2124 dev->node_props.num_gws = (dev->gpu->gws && 2125 dev->gpu->dqm->sched_policy != KFD_SCHED_POLICY_NO_HWS) ? 2126 dev->gpu->adev->gds.gws_size : 0; 2127 dev->node_props.num_cp_queues = get_cp_queues_num(dev->gpu->dqm); 2128 2129 kfd_fill_mem_clk_max_info(dev); 2130 kfd_fill_iolink_non_crat_info(dev); 2131 2132 switch (dev->gpu->adev->asic_type) { 2133 case CHIP_KAVERI: 2134 case CHIP_HAWAII: 2135 case CHIP_TONGA: 2136 dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_PRE_1_0 << 2137 HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT) & 2138 HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK); 2139 break; 2140 case CHIP_CARRIZO: 2141 case CHIP_FIJI: 2142 case CHIP_POLARIS10: 2143 case CHIP_POLARIS11: 2144 case CHIP_POLARIS12: 2145 case CHIP_VEGAM: 2146 pr_debug("Adding doorbell packet type capability\n"); 2147 dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_1_0 << 2148 HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT) & 2149 HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK); 2150 break; 2151 default: 2152 if (KFD_GC_VERSION(dev->gpu) < IP_VERSION(9, 0, 1)) 2153 WARN(1, "Unexpected ASIC family %u", 2154 dev->gpu->adev->asic_type); 2155 else 2156 kfd_topology_set_capabilities(dev); 2157 } 2158 2159 /* 2160 * Overwrite ATS capability according to needs_iommu_device to fix 2161 * potential missing corresponding bit in CRAT of BIOS. 2162 */ 2163 dev->node_props.capability &= ~HSA_CAP_ATS_PRESENT; 2164 2165 /* Fix errors in CZ CRAT. 2166 * simd_count: Carrizo CRAT reports wrong simd_count, probably 2167 * because it doesn't consider masked out CUs 2168 * max_waves_per_simd: Carrizo reports wrong max_waves_per_simd 2169 */ 2170 if (dev->gpu->adev->asic_type == CHIP_CARRIZO) { 2171 dev->node_props.simd_count = 2172 cu_info->simd_per_cu * cu_info->number; 2173 dev->node_props.max_waves_per_simd = 10; 2174 } 2175 2176 /* kfd only concerns sram ecc on GFX and HBM ecc on UMC */ 2177 dev->node_props.capability |= 2178 ((dev->gpu->adev->ras_enabled & BIT(AMDGPU_RAS_BLOCK__GFX)) != 0) ? 2179 HSA_CAP_SRAM_EDCSUPPORTED : 0; 2180 dev->node_props.capability |= 2181 ((dev->gpu->adev->ras_enabled & BIT(AMDGPU_RAS_BLOCK__UMC)) != 0) ? 2182 HSA_CAP_MEM_EDCSUPPORTED : 0; 2183 2184 if (KFD_GC_VERSION(dev->gpu) != IP_VERSION(9, 0, 1)) 2185 dev->node_props.capability |= (dev->gpu->adev->ras_enabled != 0) ? 2186 HSA_CAP_RASEVENTNOTIFY : 0; 2187 2188 if (KFD_IS_SVM_API_SUPPORTED(dev->gpu->adev)) 2189 dev->node_props.capability |= HSA_CAP_SVMAPI_SUPPORTED; 2190 2191 if (dev->gpu->adev->gmc.is_app_apu || 2192 dev->gpu->adev->gmc.xgmi.connected_to_cpu) 2193 dev->node_props.capability |= HSA_CAP_FLAGS_COHERENTHOSTACCESS; 2194 2195 kfd_queue_ctx_save_restore_size(dev); 2196 2197 kfd_debug_print_topology(); 2198 2199 kfd_notify_gpu_change(gpu_id, 1); 2200 2201 return 0; 2202 } 2203 2204 /** 2205 * kfd_topology_update_io_links() - Update IO links after device removal. 2206 * @proximity_domain: Proximity domain value of the dev being removed. 2207 * 2208 * The topology list currently is arranged in increasing order of 2209 * proximity domain. 2210 * 2211 * Two things need to be done when a device is removed: 2212 * 1. All the IO links to this device need to be removed. 2213 * 2. All nodes after the current device node need to move 2214 * up once this device node is removed from the topology 2215 * list. As a result, the proximity domain values for 2216 * all nodes after the node being deleted reduce by 1. 2217 * This would also cause the proximity domain values for 2218 * io links to be updated based on new proximity domain 2219 * values. 2220 * 2221 * Context: The caller must hold write topology_lock. 2222 */ 2223 static void kfd_topology_update_io_links(int proximity_domain) 2224 { 2225 struct kfd_topology_device *dev; 2226 struct kfd_iolink_properties *iolink, *p2plink, *tmp; 2227 2228 list_for_each_entry(dev, &topology_device_list, list) { 2229 if (dev->proximity_domain > proximity_domain) 2230 dev->proximity_domain--; 2231 2232 list_for_each_entry_safe(iolink, tmp, &dev->io_link_props, list) { 2233 /* 2234 * If there is an io link to the dev being deleted 2235 * then remove that IO link also. 2236 */ 2237 if (iolink->node_to == proximity_domain) { 2238 list_del(&iolink->list); 2239 dev->node_props.io_links_count--; 2240 } else { 2241 if (iolink->node_from > proximity_domain) 2242 iolink->node_from--; 2243 if (iolink->node_to > proximity_domain) 2244 iolink->node_to--; 2245 } 2246 } 2247 2248 list_for_each_entry_safe(p2plink, tmp, &dev->p2p_link_props, list) { 2249 /* 2250 * If there is a p2p link to the dev being deleted 2251 * then remove that p2p link also. 2252 */ 2253 if (p2plink->node_to == proximity_domain) { 2254 list_del(&p2plink->list); 2255 dev->node_props.p2p_links_count--; 2256 } else { 2257 if (p2plink->node_from > proximity_domain) 2258 p2plink->node_from--; 2259 if (p2plink->node_to > proximity_domain) 2260 p2plink->node_to--; 2261 } 2262 } 2263 } 2264 } 2265 2266 int kfd_topology_remove_device(struct kfd_node *gpu) 2267 { 2268 struct kfd_topology_device *dev, *tmp; 2269 uint32_t gpu_id; 2270 int res = -ENODEV; 2271 int i = 0; 2272 2273 down_write(&topology_lock); 2274 2275 list_for_each_entry_safe(dev, tmp, &topology_device_list, list) { 2276 if (dev->gpu == gpu) { 2277 gpu_id = dev->gpu_id; 2278 kfd_remove_sysfs_node_entry(dev); 2279 kfd_release_topology_device(dev); 2280 sys_props.num_devices--; 2281 kfd_topology_update_io_links(i); 2282 topology_crat_proximity_domain = sys_props.num_devices-1; 2283 sys_props.generation_count++; 2284 res = 0; 2285 if (kfd_topology_update_sysfs() < 0) 2286 kfd_topology_release_sysfs(); 2287 break; 2288 } 2289 i++; 2290 } 2291 2292 up_write(&topology_lock); 2293 2294 if (!res) 2295 kfd_notify_gpu_change(gpu_id, 0); 2296 2297 return res; 2298 } 2299 2300 /* kfd_topology_enum_kfd_devices - Enumerate through all devices in KFD 2301 * topology. If GPU device is found @idx, then valid kfd_dev pointer is 2302 * returned through @kdev 2303 * Return - 0: On success (@kdev will be NULL for non GPU nodes) 2304 * -1: If end of list 2305 */ 2306 int kfd_topology_enum_kfd_devices(uint8_t idx, struct kfd_node **kdev) 2307 { 2308 2309 struct kfd_topology_device *top_dev; 2310 uint8_t device_idx = 0; 2311 2312 *kdev = NULL; 2313 down_read(&topology_lock); 2314 2315 list_for_each_entry(top_dev, &topology_device_list, list) { 2316 if (device_idx == idx) { 2317 *kdev = top_dev->gpu; 2318 up_read(&topology_lock); 2319 return 0; 2320 } 2321 2322 device_idx++; 2323 } 2324 2325 up_read(&topology_lock); 2326 2327 return -1; 2328 2329 } 2330 2331 static int kfd_cpumask_to_apic_id(const struct cpumask *cpumask) 2332 { 2333 int first_cpu_of_numa_node; 2334 2335 if (!cpumask || cpumask == cpu_none_mask) 2336 return -1; 2337 first_cpu_of_numa_node = cpumask_first(cpumask); 2338 if (first_cpu_of_numa_node >= nr_cpu_ids) 2339 return -1; 2340 #ifdef CONFIG_X86_64 2341 return cpu_data(first_cpu_of_numa_node).topo.apicid; 2342 #else 2343 return first_cpu_of_numa_node; 2344 #endif 2345 } 2346 2347 /* kfd_numa_node_to_apic_id - Returns the APIC ID of the first logical processor 2348 * of the given NUMA node (numa_node_id) 2349 * Return -1 on failure 2350 */ 2351 int kfd_numa_node_to_apic_id(int numa_node_id) 2352 { 2353 if (numa_node_id == -1) { 2354 pr_warn("Invalid NUMA Node. Use online CPU mask\n"); 2355 return kfd_cpumask_to_apic_id(cpu_online_mask); 2356 } 2357 return kfd_cpumask_to_apic_id(cpumask_of_node(numa_node_id)); 2358 } 2359 2360 /* kfd_gpu_node_num - Return kfd gpu node number at system */ 2361 uint32_t kfd_gpu_node_num(void) 2362 { 2363 struct kfd_node *dev; 2364 u8 gpu_num = 0; 2365 u8 id = 0; 2366 2367 while (kfd_topology_enum_kfd_devices(id, &dev) == 0) { 2368 if (!dev || kfd_devcgroup_check_permission(dev)) { 2369 /* Skip non GPU devices and devices to which the 2370 * current process have no access to 2371 */ 2372 id++; 2373 continue; 2374 } 2375 id++; 2376 gpu_num++; 2377 } 2378 2379 return gpu_num; 2380 } 2381 2382 #if defined(CONFIG_DEBUG_FS) 2383 2384 int kfd_debugfs_hqds_by_device(struct seq_file *m, void *data) 2385 { 2386 struct kfd_topology_device *dev; 2387 unsigned int i = 0; 2388 int r = 0; 2389 2390 down_read(&topology_lock); 2391 2392 list_for_each_entry(dev, &topology_device_list, list) { 2393 if (!dev->gpu) { 2394 i++; 2395 continue; 2396 } 2397 2398 seq_printf(m, "Node %u, gpu_id %x:\n", i++, dev->gpu->id); 2399 r = dqm_debugfs_hqds(m, dev->gpu->dqm); 2400 if (r) 2401 break; 2402 } 2403 2404 up_read(&topology_lock); 2405 2406 return r; 2407 } 2408 2409 int kfd_debugfs_rls_by_device(struct seq_file *m, void *data) 2410 { 2411 struct kfd_topology_device *dev; 2412 unsigned int i = 0; 2413 int r = 0; 2414 2415 down_read(&topology_lock); 2416 2417 list_for_each_entry(dev, &topology_device_list, list) { 2418 if (!dev->gpu) { 2419 i++; 2420 continue; 2421 } 2422 2423 seq_printf(m, "Node %u, gpu_id %x:\n", i++, dev->gpu->id); 2424 r = pm_debugfs_runlist(m, &dev->gpu->dqm->packet_mgr); 2425 if (r) 2426 break; 2427 } 2428 2429 up_read(&topology_lock); 2430 2431 return r; 2432 } 2433 2434 #endif 2435 2436 void kfd_update_svm_support_properties(struct amdgpu_device *adev) 2437 { 2438 struct kfd_topology_device *dev; 2439 int ret; 2440 2441 down_write(&topology_lock); 2442 list_for_each_entry(dev, &topology_device_list, list) { 2443 if (!dev->gpu || dev->gpu->adev != adev) 2444 continue; 2445 2446 if (KFD_IS_SVM_API_SUPPORTED(adev)) { 2447 dev->node_props.capability |= HSA_CAP_SVMAPI_SUPPORTED; 2448 ret = kfd_topology_update_sysfs(); 2449 if (!ret) 2450 sys_props.generation_count++; 2451 else 2452 dev_err(adev->dev, "Failed to update SVM support properties. ret=%d\n", ret); 2453 } else 2454 dev->node_props.capability &= ~HSA_CAP_SVMAPI_SUPPORTED; 2455 } 2456 up_write(&topology_lock); 2457 } 2458