1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /*
3 * Copyright (C) 2015 Intel Mobile Communications GmbH
4 * Copyright (C) 2016-2017 Intel Deutschland GmbH
5 * Copyright (C) 2019-2021, 2023-2025 Intel Corporation
6 */
7 #include <linux/kernel.h>
8 #include <linux/bsearch.h>
9 #include <linux/list.h>
10
11 #include "fw/api/tx.h"
12 #include "iwl-trans.h"
13 #include "iwl-drv.h"
14 #include "iwl-fh.h"
15 #include <linux/dmapool.h>
16 #include "fw/api/commands.h"
17 #include "pcie/gen1_2/internal.h"
18 #include "pcie/iwl-context-info-v2.h"
19
20 struct iwl_trans_dev_restart_data {
21 struct list_head list;
22 unsigned int restart_count;
23 time64_t last_error;
24 bool backoff;
25 char name[];
26 };
27
28 static LIST_HEAD(restart_data_list);
29 static DEFINE_SPINLOCK(restart_data_lock);
30
31 static struct iwl_trans_dev_restart_data *
iwl_trans_get_restart_data(struct device * dev)32 iwl_trans_get_restart_data(struct device *dev)
33 {
34 struct iwl_trans_dev_restart_data *tmp, *data = NULL;
35 const char *name = dev_name(dev);
36
37 spin_lock(&restart_data_lock);
38 list_for_each_entry(tmp, &restart_data_list, list) {
39 if (strcmp(tmp->name, name))
40 continue;
41 data = tmp;
42 break;
43 }
44 spin_unlock(&restart_data_lock);
45
46 if (data)
47 return data;
48
49 data = kzalloc(struct_size(data, name, strlen(name) + 1), GFP_ATOMIC);
50 if (!data)
51 return NULL;
52
53 strcpy(data->name, name);
54 spin_lock(&restart_data_lock);
55 list_add_tail(&data->list, &restart_data_list);
56 spin_unlock(&restart_data_lock);
57
58 return data;
59 }
60
iwl_trans_inc_restart_count(struct device * dev)61 static void iwl_trans_inc_restart_count(struct device *dev)
62 {
63 struct iwl_trans_dev_restart_data *data;
64
65 data = iwl_trans_get_restart_data(dev);
66 if (data) {
67 data->last_error = ktime_get_boottime_seconds();
68 data->restart_count++;
69 }
70 }
71
iwl_trans_free_restart_list(void)72 void iwl_trans_free_restart_list(void)
73 {
74 struct iwl_trans_dev_restart_data *tmp;
75
76 while ((tmp = list_first_entry_or_null(&restart_data_list,
77 typeof(*tmp), list))) {
78 list_del(&tmp->list);
79 kfree(tmp);
80 }
81 }
82
83 struct iwl_trans_reprobe {
84 struct device *dev;
85 struct delayed_work work;
86 };
87
iwl_trans_reprobe_wk(struct work_struct * wk)88 static void iwl_trans_reprobe_wk(struct work_struct *wk)
89 {
90 struct iwl_trans_reprobe *reprobe;
91
92 reprobe = container_of(wk, typeof(*reprobe), work.work);
93
94 if (device_reprobe(reprobe->dev))
95 dev_err(reprobe->dev, "reprobe failed!\n");
96 put_device(reprobe->dev);
97 kfree(reprobe);
98 module_put(THIS_MODULE);
99 }
100
iwl_trans_schedule_reprobe(struct iwl_trans * trans,unsigned int delay_ms)101 static void iwl_trans_schedule_reprobe(struct iwl_trans *trans,
102 unsigned int delay_ms)
103 {
104 struct iwl_trans_reprobe *reprobe;
105
106 /*
107 * get a module reference to avoid doing this while unloading
108 * anyway and to avoid scheduling a work with code that's
109 * being removed.
110 */
111 if (!try_module_get(THIS_MODULE)) {
112 IWL_ERR(trans, "Module is being unloaded - abort\n");
113 return;
114 }
115
116 reprobe = kzalloc(sizeof(*reprobe), GFP_KERNEL);
117 if (!reprobe) {
118 module_put(THIS_MODULE);
119 return;
120 }
121 reprobe->dev = get_device(trans->dev);
122 INIT_DELAYED_WORK(&reprobe->work, iwl_trans_reprobe_wk);
123 schedule_delayed_work(&reprobe->work, msecs_to_jiffies(delay_ms));
124 }
125
126 #define IWL_TRANS_RESET_OK_TIME 7 /* seconds */
127
128 static enum iwl_reset_mode
iwl_trans_determine_restart_mode(struct iwl_trans * trans)129 iwl_trans_determine_restart_mode(struct iwl_trans *trans)
130 {
131 struct iwl_trans_dev_restart_data *data;
132 enum iwl_reset_mode min_mode = 0;
133 unsigned int index;
134 static const enum iwl_reset_mode escalation_list_old[] = {
135 IWL_RESET_MODE_SW_RESET,
136 IWL_RESET_MODE_REPROBE,
137 IWL_RESET_MODE_REPROBE,
138 IWL_RESET_MODE_FUNC_RESET,
139 IWL_RESET_MODE_PROD_RESET,
140 };
141 static const enum iwl_reset_mode escalation_list_sc[] = {
142 IWL_RESET_MODE_SW_RESET,
143 IWL_RESET_MODE_REPROBE,
144 IWL_RESET_MODE_REPROBE,
145 IWL_RESET_MODE_FUNC_RESET,
146 IWL_RESET_MODE_TOP_RESET,
147 IWL_RESET_MODE_PROD_RESET,
148 IWL_RESET_MODE_TOP_RESET,
149 IWL_RESET_MODE_PROD_RESET,
150 IWL_RESET_MODE_TOP_RESET,
151 IWL_RESET_MODE_PROD_RESET,
152 };
153 const enum iwl_reset_mode *escalation_list;
154 size_t escalation_list_size;
155
156 /* used by TOP fatal error/TOP reset */
157 if (trans->restart.mode.type == IWL_ERR_TYPE_TOP_RESET_FAILED)
158 return IWL_RESET_MODE_PROD_RESET;
159
160 if (trans->request_top_reset) {
161 trans->request_top_reset = 0;
162 if (trans->mac_cfg->device_family >= IWL_DEVICE_FAMILY_SC)
163 return IWL_RESET_MODE_TOP_RESET;
164 return IWL_RESET_MODE_PROD_RESET;
165 }
166
167 if (trans->mac_cfg->device_family >= IWL_DEVICE_FAMILY_SC) {
168 escalation_list = escalation_list_sc;
169 escalation_list_size = ARRAY_SIZE(escalation_list_sc);
170 } else {
171 escalation_list = escalation_list_old;
172 escalation_list_size = ARRAY_SIZE(escalation_list_old);
173 }
174
175 if (trans->restart.during_reset)
176 min_mode = IWL_RESET_MODE_REPROBE;
177
178 data = iwl_trans_get_restart_data(trans->dev);
179 if (!data)
180 return min_mode;
181
182 if (!data->backoff &&
183 ktime_get_boottime_seconds() - data->last_error >=
184 IWL_TRANS_RESET_OK_TIME)
185 data->restart_count = 0;
186
187 index = data->restart_count;
188 if (index >= escalation_list_size) {
189 index = escalation_list_size - 1;
190 if (!data->backoff) {
191 data->backoff = true;
192 return IWL_RESET_MODE_BACKOFF;
193 }
194 data->backoff = false;
195 }
196
197 return max(min_mode, escalation_list[index]);
198 }
199
200 #define IWL_TRANS_TOP_FOLLOWER_WAIT 180 /* ms */
201
202 #define IWL_TRANS_RESET_DELAY (HZ * 60)
203
iwl_trans_restart_wk(struct work_struct * wk)204 static void iwl_trans_restart_wk(struct work_struct *wk)
205 {
206 struct iwl_trans *trans = container_of(wk, typeof(*trans),
207 restart.wk.work);
208 enum iwl_reset_mode mode;
209
210 if (trans->restart.mode.type == IWL_ERR_TYPE_TOP_RESET_BY_BT) {
211 iwl_trans_schedule_reprobe(trans, IWL_TRANS_TOP_FOLLOWER_WAIT);
212 return;
213 }
214
215 if (!trans->op_mode)
216 return;
217
218 /* might have been scheduled before marked as dead, re-check */
219 if (test_bit(STATUS_TRANS_DEAD, &trans->status))
220 return;
221
222 iwl_op_mode_dump_error(trans->op_mode, &trans->restart.mode);
223
224 /*
225 * If the opmode stopped the device while we were trying to dump and
226 * reset, then we'll have done the dump already (synchronized by the
227 * opmode lock that it will acquire in iwl_op_mode_dump_error()) and
228 * managed that via trans->restart.mode.
229 * Additionally, make sure that in such a case we won't attempt to do
230 * any resets now, since it's no longer requested.
231 */
232 if (!test_and_clear_bit(STATUS_RESET_PENDING, &trans->status))
233 return;
234
235 if (!iwlwifi_mod_params.fw_restart)
236 return;
237
238 mode = iwl_trans_determine_restart_mode(trans);
239 if (mode == IWL_RESET_MODE_BACKOFF) {
240 IWL_ERR(trans, "Too many device errors - delay next reset\n");
241 queue_delayed_work(system_unbound_wq, &trans->restart.wk,
242 IWL_TRANS_RESET_DELAY);
243 return;
244 }
245
246 iwl_trans_inc_restart_count(trans->dev);
247
248 switch (mode) {
249 case IWL_RESET_MODE_TOP_RESET:
250 trans->do_top_reset = 1;
251 IWL_ERR(trans, "Device error - TOP reset\n");
252 fallthrough;
253 case IWL_RESET_MODE_SW_RESET:
254 if (mode == IWL_RESET_MODE_SW_RESET)
255 IWL_ERR(trans, "Device error - SW reset\n");
256 iwl_trans_opmode_sw_reset(trans, trans->restart.mode.type);
257 break;
258 case IWL_RESET_MODE_REPROBE:
259 IWL_ERR(trans, "Device error - reprobe!\n");
260
261 iwl_trans_schedule_reprobe(trans, 0);
262 break;
263 default:
264 iwl_trans_pcie_reset(trans, mode);
265 break;
266 }
267 }
268
iwl_trans_alloc(unsigned int priv_size,struct device * dev,const struct iwl_mac_cfg * mac_cfg)269 struct iwl_trans *iwl_trans_alloc(unsigned int priv_size,
270 struct device *dev,
271 const struct iwl_mac_cfg *mac_cfg)
272 {
273 struct iwl_trans *trans;
274 #ifdef CONFIG_LOCKDEP
275 static struct lock_class_key __sync_cmd_key;
276 #endif
277
278 trans = devm_kzalloc(dev, sizeof(*trans) + priv_size, GFP_KERNEL);
279 if (!trans)
280 return NULL;
281
282 trans->mac_cfg = mac_cfg;
283
284 #ifdef CONFIG_LOCKDEP
285 lockdep_init_map(&trans->sync_cmd_lockdep_map, "sync_cmd_lockdep_map",
286 &__sync_cmd_key, 0);
287 #endif
288
289 trans->dev = dev;
290
291 INIT_DELAYED_WORK(&trans->restart.wk, iwl_trans_restart_wk);
292
293 return trans;
294 }
295
iwl_trans_free(struct iwl_trans * trans)296 void iwl_trans_free(struct iwl_trans *trans)
297 {
298 cancel_delayed_work_sync(&trans->restart.wk);
299 }
300
iwl_trans_send_cmd(struct iwl_trans * trans,struct iwl_host_cmd * cmd)301 int iwl_trans_send_cmd(struct iwl_trans *trans, struct iwl_host_cmd *cmd)
302 {
303 int ret;
304
305 if (unlikely(!(cmd->flags & CMD_SEND_IN_RFKILL) &&
306 test_bit(STATUS_RFKILL_OPMODE, &trans->status)))
307 return -ERFKILL;
308
309 if (unlikely(test_bit(STATUS_FW_ERROR, &trans->status)))
310 return -EIO;
311
312 if (WARN_ONCE(trans->state != IWL_TRANS_FW_ALIVE,
313 "bad state = %d\n", trans->state))
314 return -EIO;
315
316 if (!(cmd->flags & CMD_ASYNC))
317 lock_map_acquire_read(&trans->sync_cmd_lockdep_map);
318
319 if (trans->conf.wide_cmd_header && !iwl_cmd_groupid(cmd->id)) {
320 if (cmd->id != REPLY_ERROR)
321 cmd->id = DEF_ID(cmd->id);
322 }
323
324 ret = iwl_trans_pcie_send_hcmd(trans, cmd);
325
326 if (!(cmd->flags & CMD_ASYNC))
327 lock_map_release(&trans->sync_cmd_lockdep_map);
328
329 if (WARN_ON((cmd->flags & CMD_WANT_SKB) && !ret && !cmd->resp_pkt))
330 return -EIO;
331
332 return ret;
333 }
334 IWL_EXPORT_SYMBOL(iwl_trans_send_cmd);
335
iwl_trans_alloc_tx_cmd(struct iwl_trans * trans)336 struct iwl_device_tx_cmd *iwl_trans_alloc_tx_cmd(struct iwl_trans *trans)
337 {
338 return iwl_pcie_gen1_2_alloc_tx_cmd(trans);
339 }
340 IWL_EXPORT_SYMBOL(iwl_trans_alloc_tx_cmd);
341
iwl_trans_free_tx_cmd(struct iwl_trans * trans,struct iwl_device_tx_cmd * dev_cmd)342 void iwl_trans_free_tx_cmd(struct iwl_trans *trans,
343 struct iwl_device_tx_cmd *dev_cmd)
344 {
345 iwl_pcie_gen1_2_free_tx_cmd(trans, dev_cmd);
346 }
347 IWL_EXPORT_SYMBOL(iwl_trans_free_tx_cmd);
348
349 /* Comparator for struct iwl_hcmd_names.
350 * Used in the binary search over a list of host commands.
351 *
352 * @key: command_id that we're looking for.
353 * @elt: struct iwl_hcmd_names candidate for match.
354 *
355 * @return 0 iff equal.
356 */
iwl_hcmd_names_cmp(const void * key,const void * elt)357 static int iwl_hcmd_names_cmp(const void *key, const void *elt)
358 {
359 const struct iwl_hcmd_names *name = elt;
360 const u8 *cmd1 = key;
361 u8 cmd2 = name->cmd_id;
362
363 return (*cmd1 - cmd2);
364 }
365
iwl_get_cmd_string(struct iwl_trans * trans,u32 id)366 const char *iwl_get_cmd_string(struct iwl_trans *trans, u32 id)
367 {
368 u8 grp, cmd;
369 struct iwl_hcmd_names *ret;
370 const struct iwl_hcmd_arr *arr;
371 size_t size = sizeof(struct iwl_hcmd_names);
372
373 grp = iwl_cmd_groupid(id);
374 cmd = iwl_cmd_opcode(id);
375
376 if (!trans->conf.command_groups ||
377 grp >= trans->conf.command_groups_size ||
378 !trans->conf.command_groups[grp].arr)
379 return "UNKNOWN";
380
381 arr = &trans->conf.command_groups[grp];
382 ret = bsearch(&cmd, arr->arr, arr->size, size, iwl_hcmd_names_cmp);
383 if (!ret)
384 return "UNKNOWN";
385 return ret->cmd_name;
386 }
387 IWL_EXPORT_SYMBOL(iwl_get_cmd_string);
388
iwl_trans_op_mode_enter(struct iwl_trans * trans,struct iwl_op_mode * op_mode)389 void iwl_trans_op_mode_enter(struct iwl_trans *trans,
390 struct iwl_op_mode *op_mode)
391 {
392 trans->op_mode = op_mode;
393
394 if (WARN_ON(trans->conf.n_no_reclaim_cmds > MAX_NO_RECLAIM_CMDS))
395 trans->conf.n_no_reclaim_cmds =
396 ARRAY_SIZE(trans->conf.no_reclaim_cmds);
397
398 WARN_ON_ONCE(!trans->conf.rx_mpdu_cmd);
399
400 iwl_pcie_gen1_2_op_mode_enter(trans);
401 }
402 IWL_EXPORT_SYMBOL(iwl_trans_op_mode_enter);
403
iwl_trans_start_hw(struct iwl_trans * trans)404 int iwl_trans_start_hw(struct iwl_trans *trans)
405 {
406 might_sleep();
407
408 clear_bit(STATUS_TRANS_RESET_IN_PROGRESS, &trans->status);
409
410 return iwl_trans_pcie_start_hw(trans);
411 }
412 IWL_EXPORT_SYMBOL(iwl_trans_start_hw);
413
iwl_trans_op_mode_leave(struct iwl_trans * trans)414 void iwl_trans_op_mode_leave(struct iwl_trans *trans)
415 {
416 might_sleep();
417
418 if (trans->mac_cfg->gen2)
419 iwl_trans_pcie_gen2_op_mode_leave(trans);
420 else
421 iwl_trans_pcie_op_mode_leave(trans);
422
423 cancel_delayed_work_sync(&trans->restart.wk);
424
425 trans->op_mode = NULL;
426 memset(&trans->conf, 0, sizeof(trans->conf));
427
428 trans->state = IWL_TRANS_NO_FW;
429 }
430 IWL_EXPORT_SYMBOL(iwl_trans_op_mode_leave);
431
iwl_trans_write8(struct iwl_trans * trans,u32 ofs,u8 val)432 void iwl_trans_write8(struct iwl_trans *trans, u32 ofs, u8 val)
433 {
434 iwl_trans_pcie_write8(trans, ofs, val);
435 }
436
iwl_trans_write32(struct iwl_trans * trans,u32 ofs,u32 val)437 void iwl_trans_write32(struct iwl_trans *trans, u32 ofs, u32 val)
438 {
439 iwl_trans_pcie_write32(trans, ofs, val);
440 }
441
iwl_trans_read32(struct iwl_trans * trans,u32 ofs)442 u32 iwl_trans_read32(struct iwl_trans *trans, u32 ofs)
443 {
444 return iwl_trans_pcie_read32(trans, ofs);
445 }
446
iwl_trans_read_prph(struct iwl_trans * trans,u32 ofs)447 u32 iwl_trans_read_prph(struct iwl_trans *trans, u32 ofs)
448 {
449 return iwl_trans_pcie_read_prph(trans, ofs);
450 }
451
iwl_trans_write_prph(struct iwl_trans * trans,u32 ofs,u32 val)452 void iwl_trans_write_prph(struct iwl_trans *trans, u32 ofs, u32 val)
453 {
454 return iwl_trans_pcie_write_prph(trans, ofs, val);
455 }
456
iwl_trans_read_mem(struct iwl_trans * trans,u32 addr,void * buf,int dwords)457 int iwl_trans_read_mem(struct iwl_trans *trans, u32 addr,
458 void *buf, int dwords)
459 {
460 return iwl_trans_pcie_read_mem(trans, addr, buf, dwords);
461 }
462 IWL_EXPORT_SYMBOL(iwl_trans_read_mem);
463
iwl_trans_write_mem(struct iwl_trans * trans,u32 addr,const void * buf,int dwords)464 int iwl_trans_write_mem(struct iwl_trans *trans, u32 addr,
465 const void *buf, int dwords)
466 {
467 int offs, ret = 0;
468 const u32 *vals = buf;
469
470 if (iwl_trans_grab_nic_access(trans)) {
471 iwl_write32(trans, HBUS_TARG_MEM_WADDR, addr);
472 for (offs = 0; offs < dwords; offs++)
473 iwl_write32(trans, HBUS_TARG_MEM_WDAT,
474 vals ? vals[offs] : 0);
475 iwl_trans_release_nic_access(trans);
476 } else {
477 ret = -EBUSY;
478 }
479 return ret;
480 }
481 IWL_EXPORT_SYMBOL(iwl_trans_write_mem);
482
iwl_trans_set_pmi(struct iwl_trans * trans,bool state)483 void iwl_trans_set_pmi(struct iwl_trans *trans, bool state)
484 {
485 if (state)
486 set_bit(STATUS_TPOWER_PMI, &trans->status);
487 else
488 clear_bit(STATUS_TPOWER_PMI, &trans->status);
489 }
490 IWL_EXPORT_SYMBOL(iwl_trans_set_pmi);
491
iwl_trans_sw_reset(struct iwl_trans * trans)492 int iwl_trans_sw_reset(struct iwl_trans *trans)
493 {
494 return iwl_trans_pcie_sw_reset(trans, true);
495 }
496
497 struct iwl_trans_dump_data *
iwl_trans_dump_data(struct iwl_trans * trans,u32 dump_mask,const struct iwl_dump_sanitize_ops * sanitize_ops,void * sanitize_ctx)498 iwl_trans_dump_data(struct iwl_trans *trans, u32 dump_mask,
499 const struct iwl_dump_sanitize_ops *sanitize_ops,
500 void *sanitize_ctx)
501 {
502 return iwl_trans_pcie_dump_data(trans, dump_mask,
503 sanitize_ops, sanitize_ctx);
504 }
505
iwl_trans_d3_suspend(struct iwl_trans * trans,bool reset)506 int iwl_trans_d3_suspend(struct iwl_trans *trans, bool reset)
507 {
508 might_sleep();
509
510 return iwl_trans_pcie_d3_suspend(trans, reset);
511 }
512 IWL_EXPORT_SYMBOL(iwl_trans_d3_suspend);
513
iwl_trans_d3_resume(struct iwl_trans * trans,bool reset)514 int iwl_trans_d3_resume(struct iwl_trans *trans, bool reset)
515 {
516 might_sleep();
517
518 return iwl_trans_pcie_d3_resume(trans, reset);
519 }
520 IWL_EXPORT_SYMBOL(iwl_trans_d3_resume);
521
iwl_trans_interrupts(struct iwl_trans * trans,bool enable)522 void iwl_trans_interrupts(struct iwl_trans *trans, bool enable)
523 {
524 iwl_trans_pci_interrupts(trans, enable);
525 }
526
iwl_trans_sync_nmi(struct iwl_trans * trans)527 void iwl_trans_sync_nmi(struct iwl_trans *trans)
528 {
529 iwl_trans_pcie_sync_nmi(trans);
530 }
531
iwl_trans_write_imr_mem(struct iwl_trans * trans,u32 dst_addr,u64 src_addr,u32 byte_cnt)532 int iwl_trans_write_imr_mem(struct iwl_trans *trans, u32 dst_addr,
533 u64 src_addr, u32 byte_cnt)
534 {
535 return iwl_trans_pcie_copy_imr(trans, dst_addr, src_addr, byte_cnt);
536 }
537
iwl_trans_set_bits_mask(struct iwl_trans * trans,u32 reg,u32 mask,u32 value)538 void iwl_trans_set_bits_mask(struct iwl_trans *trans, u32 reg,
539 u32 mask, u32 value)
540 {
541 iwl_trans_pcie_set_bits_mask(trans, reg, mask, value);
542 }
543 IWL_EXPORT_SYMBOL(iwl_trans_set_bits_mask);
544
iwl_trans_read_config32(struct iwl_trans * trans,u32 ofs,u32 * val)545 int iwl_trans_read_config32(struct iwl_trans *trans, u32 ofs,
546 u32 *val)
547 {
548 return iwl_trans_pcie_read_config32(trans, ofs, val);
549 }
550
_iwl_trans_grab_nic_access(struct iwl_trans * trans)551 bool _iwl_trans_grab_nic_access(struct iwl_trans *trans)
552 {
553 return iwl_trans_pcie_grab_nic_access(trans);
554 }
555 IWL_EXPORT_SYMBOL(_iwl_trans_grab_nic_access);
556
__releases(nic_access)557 void __releases(nic_access)
558 iwl_trans_release_nic_access(struct iwl_trans *trans)
559 {
560 iwl_trans_pcie_release_nic_access(trans);
561 }
562 IWL_EXPORT_SYMBOL(iwl_trans_release_nic_access);
563
iwl_trans_fw_alive(struct iwl_trans * trans)564 void iwl_trans_fw_alive(struct iwl_trans *trans)
565 {
566 might_sleep();
567
568 trans->state = IWL_TRANS_FW_ALIVE;
569
570 if (trans->mac_cfg->gen2)
571 iwl_trans_pcie_gen2_fw_alive(trans);
572 else
573 iwl_trans_pcie_fw_alive(trans);
574 }
575 IWL_EXPORT_SYMBOL(iwl_trans_fw_alive);
576
iwl_trans_start_fw(struct iwl_trans * trans,const struct iwl_fw * fw,enum iwl_ucode_type ucode_type,bool run_in_rfkill)577 int iwl_trans_start_fw(struct iwl_trans *trans, const struct iwl_fw *fw,
578 enum iwl_ucode_type ucode_type, bool run_in_rfkill)
579 {
580 const struct fw_img *img;
581 int ret;
582
583 might_sleep();
584
585 img = iwl_get_ucode_image(fw, ucode_type);
586 if (!img)
587 return -EINVAL;
588
589 clear_bit(STATUS_FW_ERROR, &trans->status);
590
591 if (trans->mac_cfg->gen2)
592 ret = iwl_trans_pcie_gen2_start_fw(trans, fw, img,
593 run_in_rfkill);
594 else
595 ret = iwl_trans_pcie_start_fw(trans, fw, img,
596 run_in_rfkill);
597
598 if (ret == 0)
599 trans->state = IWL_TRANS_FW_STARTED;
600
601 return ret;
602 }
603 IWL_EXPORT_SYMBOL(iwl_trans_start_fw);
604
iwl_trans_stop_device(struct iwl_trans * trans)605 void iwl_trans_stop_device(struct iwl_trans *trans)
606 {
607 might_sleep();
608
609 /*
610 * See also the comment in iwl_trans_restart_wk().
611 *
612 * When the opmode stops the device while a reset is pending, the
613 * worker (iwl_trans_restart_wk) might not have run yet or, more
614 * likely, will be blocked on the opmode lock. Due to the locking,
615 * we can't just flush the worker.
616 *
617 * If this is the case, then the test_and_clear_bit() ensures that
618 * the worker won't attempt to do anything after the stop.
619 *
620 * The trans->restart.mode is a handshake with the opmode, we set
621 * the context there to ABORT so that when the worker can finally
622 * acquire the lock in the opmode, the code there won't attempt to
623 * do any dumps. Since we'd really like to have the dump though,
624 * also do it inline here (with the opmode locks already held),
625 * but use a separate mode struct to avoid races.
626 */
627 if (test_and_clear_bit(STATUS_RESET_PENDING, &trans->status)) {
628 struct iwl_fw_error_dump_mode mode;
629
630 mode = trans->restart.mode;
631 mode.context = IWL_ERR_CONTEXT_FROM_OPMODE;
632 trans->restart.mode.context = IWL_ERR_CONTEXT_ABORT;
633
634 iwl_op_mode_dump_error(trans->op_mode, &mode);
635 }
636
637 if (trans->mac_cfg->gen2)
638 iwl_trans_pcie_gen2_stop_device(trans);
639 else
640 iwl_trans_pcie_stop_device(trans);
641
642 trans->state = IWL_TRANS_NO_FW;
643 }
644 IWL_EXPORT_SYMBOL(iwl_trans_stop_device);
645
iwl_trans_tx(struct iwl_trans * trans,struct sk_buff * skb,struct iwl_device_tx_cmd * dev_cmd,int queue)646 int iwl_trans_tx(struct iwl_trans *trans, struct sk_buff *skb,
647 struct iwl_device_tx_cmd *dev_cmd, int queue)
648 {
649 if (unlikely(test_bit(STATUS_FW_ERROR, &trans->status)))
650 return -EIO;
651
652 if (WARN_ONCE(trans->state != IWL_TRANS_FW_ALIVE,
653 "bad state = %d\n", trans->state))
654 return -EIO;
655
656 if (trans->mac_cfg->gen2)
657 return iwl_txq_gen2_tx(trans, skb, dev_cmd, queue);
658
659 return iwl_trans_pcie_tx(trans, skb, dev_cmd, queue);
660 }
661 IWL_EXPORT_SYMBOL(iwl_trans_tx);
662
iwl_trans_reclaim(struct iwl_trans * trans,int queue,int ssn,struct sk_buff_head * skbs,bool is_flush)663 void iwl_trans_reclaim(struct iwl_trans *trans, int queue, int ssn,
664 struct sk_buff_head *skbs, bool is_flush)
665 {
666 if (unlikely(test_bit(STATUS_FW_ERROR, &trans->status)))
667 return;
668
669 if (WARN_ONCE(trans->state != IWL_TRANS_FW_ALIVE,
670 "bad state = %d\n", trans->state))
671 return;
672
673 iwl_pcie_reclaim(trans, queue, ssn, skbs, is_flush);
674 }
675 IWL_EXPORT_SYMBOL(iwl_trans_reclaim);
676
iwl_trans_txq_disable(struct iwl_trans * trans,int queue,bool configure_scd)677 void iwl_trans_txq_disable(struct iwl_trans *trans, int queue,
678 bool configure_scd)
679 {
680 iwl_trans_pcie_txq_disable(trans, queue, configure_scd);
681 }
682 IWL_EXPORT_SYMBOL(iwl_trans_txq_disable);
683
iwl_trans_txq_enable_cfg(struct iwl_trans * trans,int queue,u16 ssn,const struct iwl_trans_txq_scd_cfg * cfg,unsigned int queue_wdg_timeout)684 bool iwl_trans_txq_enable_cfg(struct iwl_trans *trans, int queue, u16 ssn,
685 const struct iwl_trans_txq_scd_cfg *cfg,
686 unsigned int queue_wdg_timeout)
687 {
688 might_sleep();
689
690 if (WARN_ONCE(trans->state != IWL_TRANS_FW_ALIVE,
691 "bad state = %d\n", trans->state))
692 return false;
693
694 return iwl_trans_pcie_txq_enable(trans, queue, ssn,
695 cfg, queue_wdg_timeout);
696 }
697 IWL_EXPORT_SYMBOL(iwl_trans_txq_enable_cfg);
698
iwl_trans_wait_txq_empty(struct iwl_trans * trans,int queue)699 int iwl_trans_wait_txq_empty(struct iwl_trans *trans, int queue)
700 {
701 if (unlikely(test_bit(STATUS_FW_ERROR, &trans->status)))
702 return -EIO;
703
704 if (WARN_ONCE(trans->state != IWL_TRANS_FW_ALIVE,
705 "bad state = %d\n", trans->state))
706 return -EIO;
707
708 return iwl_trans_pcie_wait_txq_empty(trans, queue);
709 }
710 IWL_EXPORT_SYMBOL(iwl_trans_wait_txq_empty);
711
iwl_trans_wait_tx_queues_empty(struct iwl_trans * trans,u32 txqs)712 int iwl_trans_wait_tx_queues_empty(struct iwl_trans *trans, u32 txqs)
713 {
714 if (WARN_ONCE(trans->state != IWL_TRANS_FW_ALIVE,
715 "bad state = %d\n", trans->state))
716 return -EIO;
717
718 return iwl_trans_pcie_wait_txqs_empty(trans, txqs);
719 }
720 IWL_EXPORT_SYMBOL(iwl_trans_wait_tx_queues_empty);
721
iwl_trans_freeze_txq_timer(struct iwl_trans * trans,unsigned long txqs,bool freeze)722 void iwl_trans_freeze_txq_timer(struct iwl_trans *trans,
723 unsigned long txqs, bool freeze)
724 {
725 if (WARN_ONCE(trans->state != IWL_TRANS_FW_ALIVE,
726 "bad state = %d\n", trans->state))
727 return;
728
729 iwl_pcie_freeze_txq_timer(trans, txqs, freeze);
730 }
731 IWL_EXPORT_SYMBOL(iwl_trans_freeze_txq_timer);
732
iwl_trans_txq_set_shared_mode(struct iwl_trans * trans,int txq_id,bool shared_mode)733 void iwl_trans_txq_set_shared_mode(struct iwl_trans *trans,
734 int txq_id, bool shared_mode)
735 {
736 iwl_trans_pcie_txq_set_shared_mode(trans, txq_id, shared_mode);
737 }
738 IWL_EXPORT_SYMBOL(iwl_trans_txq_set_shared_mode);
739
740 #ifdef CONFIG_IWLWIFI_DEBUGFS
iwl_trans_debugfs_cleanup(struct iwl_trans * trans)741 void iwl_trans_debugfs_cleanup(struct iwl_trans *trans)
742 {
743 iwl_trans_pcie_debugfs_cleanup(trans);
744 }
745 #endif
746
iwl_trans_set_q_ptrs(struct iwl_trans * trans,int queue,int ptr)747 void iwl_trans_set_q_ptrs(struct iwl_trans *trans, int queue, int ptr)
748 {
749 if (WARN_ONCE(trans->state != IWL_TRANS_FW_ALIVE,
750 "bad state = %d\n", trans->state))
751 return;
752
753 iwl_pcie_set_q_ptrs(trans, queue, ptr);
754 }
755 IWL_EXPORT_SYMBOL(iwl_trans_set_q_ptrs);
756
iwl_trans_txq_alloc(struct iwl_trans * trans,u32 flags,u32 sta_mask,u8 tid,int size,unsigned int wdg_timeout)757 int iwl_trans_txq_alloc(struct iwl_trans *trans, u32 flags, u32 sta_mask,
758 u8 tid, int size, unsigned int wdg_timeout)
759 {
760 might_sleep();
761
762 if (WARN_ONCE(trans->state != IWL_TRANS_FW_ALIVE,
763 "bad state = %d\n", trans->state))
764 return -EIO;
765
766 return iwl_txq_dyn_alloc(trans, flags, sta_mask, tid,
767 size, wdg_timeout);
768 }
769 IWL_EXPORT_SYMBOL(iwl_trans_txq_alloc);
770
iwl_trans_txq_free(struct iwl_trans * trans,int queue)771 void iwl_trans_txq_free(struct iwl_trans *trans, int queue)
772 {
773 iwl_txq_dyn_free(trans, queue);
774 }
775 IWL_EXPORT_SYMBOL(iwl_trans_txq_free);
776
iwl_trans_get_rxq_dma_data(struct iwl_trans * trans,int queue,struct iwl_trans_rxq_dma_data * data)777 int iwl_trans_get_rxq_dma_data(struct iwl_trans *trans, int queue,
778 struct iwl_trans_rxq_dma_data *data)
779 {
780 return iwl_trans_pcie_rxq_dma_data(trans, queue, data);
781 }
782
iwl_trans_load_pnvm(struct iwl_trans * trans,const struct iwl_pnvm_image * pnvm_data,const struct iwl_ucode_capabilities * capa)783 int iwl_trans_load_pnvm(struct iwl_trans *trans,
784 const struct iwl_pnvm_image *pnvm_data,
785 const struct iwl_ucode_capabilities *capa)
786 {
787 return iwl_trans_pcie_ctx_info_v2_load_pnvm(trans, pnvm_data, capa);
788 }
789 IWL_EXPORT_SYMBOL(iwl_trans_load_pnvm);
790
iwl_trans_set_pnvm(struct iwl_trans * trans,const struct iwl_ucode_capabilities * capa)791 void iwl_trans_set_pnvm(struct iwl_trans *trans,
792 const struct iwl_ucode_capabilities *capa)
793 {
794 iwl_trans_pcie_ctx_info_v2_set_pnvm(trans, capa);
795 }
796
iwl_trans_load_reduce_power(struct iwl_trans * trans,const struct iwl_pnvm_image * payloads,const struct iwl_ucode_capabilities * capa)797 int iwl_trans_load_reduce_power(struct iwl_trans *trans,
798 const struct iwl_pnvm_image *payloads,
799 const struct iwl_ucode_capabilities *capa)
800 {
801 return iwl_trans_pcie_ctx_info_v2_load_reduce_power(trans, payloads,
802 capa);
803 }
804
iwl_trans_set_reduce_power(struct iwl_trans * trans,const struct iwl_ucode_capabilities * capa)805 void iwl_trans_set_reduce_power(struct iwl_trans *trans,
806 const struct iwl_ucode_capabilities *capa)
807 {
808 iwl_trans_pcie_ctx_info_v2_set_reduce_power(trans, capa);
809 }
810
iwl_trans_is_pm_supported(struct iwl_trans * trans)811 bool iwl_trans_is_pm_supported(struct iwl_trans *trans)
812 {
813 if (WARN_ON(trans->mac_cfg->gen2))
814 return false;
815
816 return iwl_pcie_gen1_is_pm_supported(trans);
817 }
818 IWL_EXPORT_SYMBOL(iwl_trans_is_pm_supported);
819
iwl_trans_is_ltr_enabled(struct iwl_trans * trans)820 bool iwl_trans_is_ltr_enabled(struct iwl_trans *trans)
821 {
822 return iwl_pcie_gen1_2_is_ltr_enabled(trans);
823 }
824 IWL_EXPORT_SYMBOL(iwl_trans_is_ltr_enabled);
825