1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /*
3 * Copyright (C) 2012-2014, 2018-2025 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
6 */
7 #include <net/mac80211.h>
8 #include <linux/netdevice.h>
9 #include <linux/dmi.h>
10
11 #include "iwl-trans.h"
12 #include "iwl-op-mode.h"
13 #include "fw/img.h"
14 #include "iwl-debug.h"
15 #include "iwl-prph.h"
16 #include "fw/acpi.h"
17 #include "fw/pnvm.h"
18 #include "fw/uefi.h"
19 #include "fw/regulatory.h"
20
21 #include "mvm.h"
22 #include "fw/dbg.h"
23 #include "iwl-phy-db.h"
24 #include "iwl-modparams.h"
25 #include "iwl-nvm-parse.h"
26 #include "time-sync.h"
27
28 #define MVM_UCODE_ALIVE_TIMEOUT (2 * HZ)
29 #define MVM_UCODE_CALIB_TIMEOUT (2 * HZ)
30
31 struct iwl_mvm_alive_data {
32 __le32 sku_id[3];
33 bool valid;
34 };
35
iwl_send_tx_ant_cfg(struct iwl_mvm * mvm,u8 valid_tx_ant)36 static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant)
37 {
38 struct iwl_tx_ant_cfg_cmd tx_ant_cmd = {
39 .valid = cpu_to_le32(valid_tx_ant),
40 };
41
42 IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant);
43 return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0,
44 sizeof(tx_ant_cmd), &tx_ant_cmd);
45 }
46
iwl_send_rss_cfg_cmd(struct iwl_mvm * mvm)47 static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm)
48 {
49 int i;
50 struct iwl_rss_config_cmd cmd = {
51 .flags = cpu_to_le32(IWL_RSS_ENABLE),
52 .hash_mask = BIT(IWL_RSS_HASH_TYPE_IPV4_TCP) |
53 BIT(IWL_RSS_HASH_TYPE_IPV4_UDP) |
54 BIT(IWL_RSS_HASH_TYPE_IPV4_PAYLOAD) |
55 BIT(IWL_RSS_HASH_TYPE_IPV6_TCP) |
56 BIT(IWL_RSS_HASH_TYPE_IPV6_UDP) |
57 BIT(IWL_RSS_HASH_TYPE_IPV6_PAYLOAD),
58 };
59
60 if (mvm->trans->info.num_rxqs == 1)
61 return 0;
62
63 /* Do not direct RSS traffic to Q 0 which is our fallback queue */
64 for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++)
65 cmd.indirection_table[i] =
66 1 + (i % (mvm->trans->info.num_rxqs - 1));
67 netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key));
68
69 return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd);
70 }
71
iwl_mvm_send_dqa_cmd(struct iwl_mvm * mvm)72 static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm)
73 {
74 struct iwl_dqa_enable_cmd dqa_cmd = {
75 .cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE),
76 };
77 u32 cmd_id = WIDE_ID(DATA_PATH_GROUP, DQA_ENABLE_CMD);
78 int ret;
79
80 ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd);
81 if (ret)
82 IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret);
83 else
84 IWL_DEBUG_FW(mvm, "Working in DQA mode\n");
85
86 return ret;
87 }
88
iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm * mvm,struct iwl_rx_cmd_buffer * rxb)89 void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm,
90 struct iwl_rx_cmd_buffer *rxb)
91 {
92 struct iwl_rx_packet *pkt = rxb_addr(rxb);
93 struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data;
94
95 if (mfu_dump_notif->index_num == 0)
96 IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n",
97 le32_to_cpu(mfu_dump_notif->assert_id));
98 }
99
iwl_alive_fn(struct iwl_notif_wait_data * notif_wait,struct iwl_rx_packet * pkt,void * data)100 static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,
101 struct iwl_rx_packet *pkt, void *data)
102 {
103 unsigned int pkt_len = iwl_rx_packet_payload_len(pkt);
104 struct iwl_mvm *mvm =
105 container_of(notif_wait, struct iwl_mvm, notif_wait);
106 struct iwl_mvm_alive_data *alive_data = data;
107 struct iwl_umac_alive *umac;
108 struct iwl_lmac_alive *lmac1;
109 struct iwl_lmac_alive *lmac2 = NULL;
110 u16 status;
111 u32 lmac_error_event_table, umac_error_table;
112 u32 version = iwl_fw_lookup_notif_ver(mvm->fw, LEGACY_GROUP,
113 UCODE_ALIVE_NTFY, 0);
114 u32 i;
115
116
117 if (version >= 6) {
118 struct iwl_alive_ntf_v7 *palive;
119
120 if (pkt_len < sizeof(*palive))
121 return false;
122
123 palive = (void *)pkt->data;
124
125 umac = &palive->umac_data;
126 lmac1 = &palive->lmac_data[0];
127 lmac2 = &palive->lmac_data[1];
128 status = le16_to_cpu(palive->status);
129
130 BUILD_BUG_ON(sizeof(palive->sku_id.data) !=
131 sizeof(alive_data->sku_id));
132 memcpy(alive_data->sku_id, palive->sku_id.data,
133 sizeof(palive->sku_id.data));
134
135 IWL_DEBUG_FW(mvm, "Got sku_id: 0x0%x 0x0%x 0x0%x\n",
136 le32_to_cpu(alive_data->sku_id[0]),
137 le32_to_cpu(alive_data->sku_id[1]),
138 le32_to_cpu(alive_data->sku_id[2]));
139
140 mvm->trans->dbg.imr_data.imr_enable =
141 le32_to_cpu(palive->imr.enabled);
142 mvm->trans->dbg.imr_data.imr_size =
143 le32_to_cpu(palive->imr.size);
144 mvm->trans->dbg.imr_data.imr2sram_remainbyte =
145 mvm->trans->dbg.imr_data.imr_size;
146 mvm->trans->dbg.imr_data.imr_base_addr =
147 palive->imr.base_addr;
148 mvm->trans->dbg.imr_data.imr_curr_addr =
149 le64_to_cpu(mvm->trans->dbg.imr_data.imr_base_addr);
150 IWL_DEBUG_FW(mvm, "IMR Enabled: 0x0%x size 0x0%x Address 0x%016llx\n",
151 mvm->trans->dbg.imr_data.imr_enable,
152 mvm->trans->dbg.imr_data.imr_size,
153 le64_to_cpu(mvm->trans->dbg.imr_data.imr_base_addr));
154
155 if (!mvm->trans->dbg.imr_data.imr_enable) {
156 for (i = 0; i < ARRAY_SIZE(mvm->trans->dbg.active_regions); i++) {
157 struct iwl_ucode_tlv *reg_tlv;
158 struct iwl_fw_ini_region_tlv *reg;
159
160 reg_tlv = mvm->trans->dbg.active_regions[i];
161 if (!reg_tlv)
162 continue;
163
164 reg = (void *)reg_tlv->data;
165 /*
166 * We have only one DRAM IMR region, so we
167 * can break as soon as we find the first
168 * one.
169 */
170 if (reg->type == IWL_FW_INI_REGION_DRAM_IMR) {
171 mvm->trans->dbg.unsupported_region_msk |= BIT(i);
172 break;
173 }
174 }
175 }
176
177 if (version >= 8) {
178 const struct iwl_alive_ntf *palive_v8 =
179 (void *)pkt->data;
180
181 if (pkt_len < sizeof(*palive_v8))
182 return false;
183
184 IWL_DEBUG_FW(mvm, "platform id: 0x%llx\n",
185 palive_v8->platform_id);
186 }
187 } else if (iwl_rx_packet_payload_len(pkt) ==
188 sizeof(struct iwl_alive_ntf_v3)) {
189 struct iwl_alive_ntf_v3 *palive3;
190
191 if (pkt_len < sizeof(*palive3))
192 return false;
193
194 palive3 = (void *)pkt->data;
195 umac = &palive3->umac_data;
196 lmac1 = &palive3->lmac_data;
197 status = le16_to_cpu(palive3->status);
198 } else {
199 WARN(1, "unsupported alive notification (size %d)\n",
200 iwl_rx_packet_payload_len(pkt));
201 /* get timeout later */
202 return false;
203 }
204
205 lmac_error_event_table =
206 le32_to_cpu(lmac1->dbg_ptrs.error_event_table_ptr);
207 iwl_fw_lmac1_set_alive_err_table(mvm->trans, lmac_error_event_table);
208
209 if (lmac2)
210 mvm->trans->dbg.lmac_error_event_table[1] =
211 le32_to_cpu(lmac2->dbg_ptrs.error_event_table_ptr);
212
213 umac_error_table = le32_to_cpu(umac->dbg_ptrs.error_info_addr) &
214 ~FW_ADDR_CACHE_CONTROL;
215
216 if (umac_error_table) {
217 iwl_fw_umac_set_alive_err_table(mvm->trans,
218 umac_error_table);
219 }
220
221 alive_data->valid = status == IWL_ALIVE_STATUS_OK;
222
223 IWL_DEBUG_FW(mvm,
224 "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n",
225 status, lmac1->ver_type, lmac1->ver_subtype);
226
227 if (lmac2)
228 IWL_DEBUG_FW(mvm, "Alive ucode CDB\n");
229
230 IWL_DEBUG_FW(mvm,
231 "UMAC version: Major - 0x%x, Minor - 0x%x\n",
232 le32_to_cpu(umac->umac_major),
233 le32_to_cpu(umac->umac_minor));
234
235 iwl_fwrt_update_fw_versions(&mvm->fwrt, lmac1, umac);
236
237 return true;
238 }
239
iwl_wait_init_complete(struct iwl_notif_wait_data * notif_wait,struct iwl_rx_packet * pkt,void * data)240 static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait,
241 struct iwl_rx_packet *pkt, void *data)
242 {
243 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
244
245 return true;
246 }
247
iwl_wait_phy_db_entry(struct iwl_notif_wait_data * notif_wait,struct iwl_rx_packet * pkt,void * data)248 static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait,
249 struct iwl_rx_packet *pkt, void *data)
250 {
251 struct iwl_phy_db *phy_db = data;
252
253 if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) {
254 WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
255 return true;
256 }
257
258 WARN_ON(iwl_phy_db_set_section(phy_db, pkt));
259
260 return false;
261 }
262
iwl_mvm_print_pd_notification(struct iwl_mvm * mvm)263 static void iwl_mvm_print_pd_notification(struct iwl_mvm *mvm)
264 {
265 #define IWL_FW_PRINT_REG_INFO(reg_name) \
266 IWL_ERR(mvm, #reg_name ": 0x%x\n", iwl_read_umac_prph(trans, reg_name))
267
268 struct iwl_trans *trans = mvm->trans;
269 enum iwl_device_family device_family = trans->mac_cfg->device_family;
270
271 if (device_family < IWL_DEVICE_FAMILY_8000)
272 return;
273
274 if (device_family <= IWL_DEVICE_FAMILY_9000)
275 IWL_FW_PRINT_REG_INFO(WFPM_ARC1_PD_NOTIFICATION);
276 else
277 IWL_FW_PRINT_REG_INFO(WFPM_LMAC1_PD_NOTIFICATION);
278
279 IWL_FW_PRINT_REG_INFO(HPM_SECONDARY_DEVICE_STATE);
280
281 /* print OPT info */
282 IWL_FW_PRINT_REG_INFO(WFPM_MAC_OTP_CFG7_ADDR);
283 IWL_FW_PRINT_REG_INFO(WFPM_MAC_OTP_CFG7_DATA);
284 }
285
iwl_mvm_load_ucode_wait_alive(struct iwl_mvm * mvm,enum iwl_ucode_type ucode_type)286 static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
287 enum iwl_ucode_type ucode_type)
288 {
289 struct iwl_notification_wait alive_wait;
290 struct iwl_mvm_alive_data alive_data = {};
291 int ret;
292 enum iwl_ucode_type old_type = mvm->fwrt.cur_fw_img;
293 static const u16 alive_cmd[] = { UCODE_ALIVE_NTFY };
294 bool run_in_rfkill =
295 ucode_type == IWL_UCODE_INIT || iwl_mvm_has_unified_ucode(mvm);
296 u8 count;
297 struct iwl_pc_data *pc_data;
298
299 if (ucode_type == IWL_UCODE_REGULAR &&
300 iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) &&
301 !(fw_has_capa(&mvm->fw->ucode_capa,
302 IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED)))
303 ucode_type = IWL_UCODE_REGULAR_USNIFFER;
304 iwl_fw_set_current_image(&mvm->fwrt, ucode_type);
305 clear_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
306
307 iwl_init_notification_wait(&mvm->notif_wait, &alive_wait,
308 alive_cmd, ARRAY_SIZE(alive_cmd),
309 iwl_alive_fn, &alive_data);
310
311 /*
312 * We want to load the INIT firmware even in RFKILL
313 * For the unified firmware case, the ucode_type is not
314 * INIT, but we still need to run it.
315 */
316 ret = iwl_trans_start_fw(mvm->trans, mvm->fw, ucode_type,
317 run_in_rfkill);
318 if (ret) {
319 iwl_fw_set_current_image(&mvm->fwrt, old_type);
320 iwl_remove_notification(&mvm->notif_wait, &alive_wait);
321 return ret;
322 }
323
324 /*
325 * Some things may run in the background now, but we
326 * just wait for the ALIVE notification here.
327 */
328 ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait,
329 MVM_UCODE_ALIVE_TIMEOUT);
330
331 if (mvm->trans->mac_cfg->device_family ==
332 IWL_DEVICE_FAMILY_AX210) {
333 /* print these registers regardless of alive fail/success */
334 IWL_INFO(mvm, "WFPM_UMAC_PD_NOTIFICATION: 0x%x\n",
335 iwl_read_umac_prph(mvm->trans, WFPM_ARC1_PD_NOTIFICATION));
336 IWL_INFO(mvm, "WFPM_LMAC2_PD_NOTIFICATION: 0x%x\n",
337 iwl_read_umac_prph(mvm->trans, WFPM_LMAC2_PD_NOTIFICATION));
338 IWL_INFO(mvm, "WFPM_AUTH_KEY_0: 0x%x\n",
339 iwl_read_umac_prph(mvm->trans, SB_MODIFY_CFG_FLAG));
340 IWL_INFO(mvm, "CNVI_SCU_SEQ_DATA_DW9: 0x%x\n",
341 iwl_read_prph(mvm->trans, CNVI_SCU_SEQ_DATA_DW9));
342 }
343
344 if (ret) {
345 struct iwl_trans *trans = mvm->trans;
346
347 /* SecBoot info */
348 if (trans->mac_cfg->device_family >=
349 IWL_DEVICE_FAMILY_22000) {
350 IWL_ERR(mvm,
351 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
352 iwl_read_umac_prph(trans, UMAG_SB_CPU_1_STATUS),
353 iwl_read_umac_prph(trans,
354 UMAG_SB_CPU_2_STATUS));
355 } else if (trans->mac_cfg->device_family >=
356 IWL_DEVICE_FAMILY_8000) {
357 IWL_ERR(mvm,
358 "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
359 iwl_read_prph(trans, SB_CPU_1_STATUS),
360 iwl_read_prph(trans, SB_CPU_2_STATUS));
361 }
362
363 iwl_mvm_print_pd_notification(mvm);
364
365 /* LMAC/UMAC PC info */
366 if (trans->mac_cfg->device_family >=
367 IWL_DEVICE_FAMILY_22000) {
368 pc_data = trans->dbg.pc_data;
369 for (count = 0; count < trans->dbg.num_pc;
370 count++, pc_data++)
371 IWL_ERR(mvm, "%s: 0x%x\n",
372 pc_data->pc_name,
373 pc_data->pc_address);
374 } else if (trans->mac_cfg->device_family >=
375 IWL_DEVICE_FAMILY_9000) {
376 IWL_ERR(mvm, "UMAC PC: 0x%x\n",
377 iwl_read_umac_prph(trans,
378 UREG_UMAC_CURRENT_PC));
379 IWL_ERR(mvm, "LMAC PC: 0x%x\n",
380 iwl_read_umac_prph(trans,
381 UREG_LMAC1_CURRENT_PC));
382 if (iwl_mvm_is_cdb_supported(mvm))
383 IWL_ERR(mvm, "LMAC2 PC: 0x%x\n",
384 iwl_read_umac_prph(trans,
385 UREG_LMAC2_CURRENT_PC));
386 }
387
388 if (ret == -ETIMEDOUT && !mvm->fw_product_reset)
389 iwl_fw_dbg_error_collect(&mvm->fwrt,
390 FW_DBG_TRIGGER_ALIVE_TIMEOUT);
391
392 iwl_fw_set_current_image(&mvm->fwrt, old_type);
393 return ret;
394 }
395
396 if (!alive_data.valid) {
397 IWL_ERR(mvm, "Loaded ucode is not valid!\n");
398 iwl_fw_set_current_image(&mvm->fwrt, old_type);
399 return -EIO;
400 }
401
402 /* if reached this point, Alive notification was received */
403 iwl_mei_alive_notif(true);
404
405 iwl_trans_fw_alive(mvm->trans);
406
407 ret = iwl_pnvm_load(mvm->trans, &mvm->notif_wait,
408 mvm->fw, alive_data.sku_id);
409 if (ret) {
410 IWL_ERR(mvm, "Timeout waiting for PNVM load!\n");
411 iwl_fw_set_current_image(&mvm->fwrt, old_type);
412 return ret;
413 }
414
415 /*
416 * Note: all the queues are enabled as part of the interface
417 * initialization, but in firmware restart scenarios they
418 * could be stopped, so wake them up. In firmware restart,
419 * mac80211 will have the queues stopped as well until the
420 * reconfiguration completes. During normal startup, they
421 * will be empty.
422 */
423
424 memset(&mvm->queue_info, 0, sizeof(mvm->queue_info));
425 /*
426 * Set a 'fake' TID for the command queue, since we use the
427 * hweight() of the tid_bitmap as a refcount now. Not that
428 * we ever even consider the command queue as one we might
429 * want to reuse, but be safe nevertheless.
430 */
431 mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].tid_bitmap =
432 BIT(IWL_MAX_TID_COUNT + 2);
433
434 set_bit(IWL_MVM_STATUS_FIRMWARE_RUNNING, &mvm->status);
435 #ifdef CONFIG_IWLWIFI_DEBUGFS
436 iwl_fw_set_dbg_rec_on(&mvm->fwrt);
437 #endif
438
439 /*
440 * For pre-MLD API (MLD API doesn't use the timestamps):
441 * All the BSSes in the BSS table include the GP2 in the system
442 * at the beacon Rx time, this is of course no longer relevant
443 * since we are resetting the firmware.
444 * Purge all the BSS table.
445 */
446 if (!mvm->mld_api_is_used)
447 cfg80211_bss_flush(mvm->hw->wiphy);
448
449 return 0;
450 }
451
iwl_mvm_phy_filter_init(struct iwl_mvm * mvm,struct iwl_phy_specific_cfg * phy_filters)452 static void iwl_mvm_phy_filter_init(struct iwl_mvm *mvm,
453 struct iwl_phy_specific_cfg *phy_filters)
454 {
455 #ifdef CONFIG_ACPI
456 *phy_filters = mvm->fwrt.phy_filters;
457 #endif /* CONFIG_ACPI */
458 }
459
iwl_mvm_uats_init(struct iwl_mvm * mvm)460 static void iwl_mvm_uats_init(struct iwl_mvm *mvm)
461 {
462 int cmd_id = WIDE_ID(REGULATORY_AND_NVM_GROUP,
463 MCC_ALLOWED_AP_TYPE_CMD);
464 struct iwl_mcc_allowed_ap_type_cmd_v1 cmd = {};
465 u8 cmd_ver;
466 int ret;
467
468 if (mvm->trans->mac_cfg->device_family < IWL_DEVICE_FAMILY_AX210 ||
469 !mvm->trans->cfg->uhb_supported) {
470 IWL_DEBUG_RADIO(mvm, "UATS feature is not supported\n");
471 return;
472 }
473
474 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id,
475 IWL_FW_CMD_VER_UNKNOWN);
476 if (cmd_ver != 1) {
477 IWL_DEBUG_RADIO(mvm,
478 "MCC_ALLOWED_AP_TYPE_CMD ver %d not supported\n",
479 cmd_ver);
480 return;
481 }
482
483 iwl_uefi_get_uats_table(mvm->trans, &mvm->fwrt);
484
485 if (!mvm->fwrt.ap_type_cmd_valid)
486 return;
487
488 BUILD_BUG_ON(sizeof(mvm->fwrt.ap_type_cmd.mcc_to_ap_type_map) !=
489 sizeof(cmd.mcc_to_ap_type_map));
490
491 memcpy(cmd.mcc_to_ap_type_map,
492 mvm->fwrt.ap_type_cmd.mcc_to_ap_type_map,
493 sizeof(mvm->fwrt.ap_type_cmd.mcc_to_ap_type_map));
494
495 ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(cmd), &cmd);
496 if (ret < 0)
497 IWL_ERR(mvm, "failed to send MCC_ALLOWED_AP_TYPE_CMD (%d)\n",
498 ret);
499 else
500 IWL_DEBUG_RADIO(mvm, "MCC_ALLOWED_AP_TYPE_CMD sent to FW\n");
501 }
502
iwl_mvm_sgom_init(struct iwl_mvm * mvm)503 static int iwl_mvm_sgom_init(struct iwl_mvm *mvm)
504 {
505 u8 cmd_ver;
506 int ret;
507 struct iwl_host_cmd cmd = {
508 .id = WIDE_ID(REGULATORY_AND_NVM_GROUP,
509 SAR_OFFSET_MAPPING_TABLE_CMD),
510 .flags = 0,
511 .data[0] = &mvm->fwrt.sgom_table,
512 .len[0] = sizeof(mvm->fwrt.sgom_table),
513 .dataflags[0] = IWL_HCMD_DFL_NOCOPY,
514 };
515
516 if (!mvm->fwrt.sgom_enabled) {
517 IWL_DEBUG_RADIO(mvm, "SGOM table is disabled\n");
518 return 0;
519 }
520
521 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id,
522 IWL_FW_CMD_VER_UNKNOWN);
523
524 if (cmd_ver != 2) {
525 IWL_DEBUG_RADIO(mvm, "command version is unsupported. version = %d\n",
526 cmd_ver);
527 return 0;
528 }
529
530 ret = iwl_mvm_send_cmd(mvm, &cmd);
531 if (ret < 0)
532 IWL_ERR(mvm, "failed to send SAR_OFFSET_MAPPING_CMD (%d)\n", ret);
533
534 return ret;
535 }
536
iwl_send_phy_cfg_cmd(struct iwl_mvm * mvm)537 static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm)
538 {
539 u32 cmd_id = PHY_CONFIGURATION_CMD;
540 struct iwl_phy_cfg_cmd_v3 phy_cfg_cmd;
541 enum iwl_ucode_type ucode_type = mvm->fwrt.cur_fw_img;
542 u8 cmd_ver;
543 size_t cmd_size;
544
545 if (iwl_mvm_has_unified_ucode(mvm) &&
546 !mvm->trans->cfg->tx_with_siso_diversity)
547 return 0;
548
549 if (mvm->trans->cfg->tx_with_siso_diversity) {
550 /*
551 * TODO: currently we don't set the antenna but letting the NIC
552 * to decide which antenna to use. This should come from BIOS.
553 */
554 phy_cfg_cmd.phy_cfg =
555 cpu_to_le32(FW_PHY_CFG_CHAIN_SAD_ENABLED);
556 }
557
558 /* Set parameters */
559 phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm));
560
561 /* set flags extra PHY configuration flags from the device's cfg */
562 phy_cfg_cmd.phy_cfg |=
563 cpu_to_le32(mvm->trans->mac_cfg->extra_phy_cfg_flags);
564
565 phy_cfg_cmd.calib_control.event_trigger =
566 mvm->fw->default_calib[ucode_type].event_trigger;
567 phy_cfg_cmd.calib_control.flow_trigger =
568 mvm->fw->default_calib[ucode_type].flow_trigger;
569
570 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id,
571 IWL_FW_CMD_VER_UNKNOWN);
572 if (cmd_ver >= 3)
573 iwl_mvm_phy_filter_init(mvm, &phy_cfg_cmd.phy_specific_cfg);
574
575 IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n",
576 phy_cfg_cmd.phy_cfg);
577 cmd_size = (cmd_ver == 3) ? sizeof(struct iwl_phy_cfg_cmd_v3) :
578 sizeof(struct iwl_phy_cfg_cmd_v1);
579 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, cmd_size, &phy_cfg_cmd);
580 }
581
iwl_run_unified_mvm_ucode(struct iwl_mvm * mvm)582 static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm)
583 {
584 struct iwl_notification_wait init_wait;
585 struct iwl_nvm_access_complete_cmd nvm_complete = {};
586 struct iwl_init_extended_cfg_cmd init_cfg = {
587 .init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)),
588 };
589 static const u16 init_complete[] = {
590 INIT_COMPLETE_NOTIF,
591 };
592 u32 sb_cfg;
593 int ret;
594
595 if (mvm->trans->cfg->tx_with_siso_diversity)
596 init_cfg.init_flags |= cpu_to_le32(BIT(IWL_INIT_PHY));
597
598 lockdep_assert_held(&mvm->mutex);
599
600 mvm->rfkill_safe_init_done = false;
601
602 if (mvm->trans->mac_cfg->device_family == IWL_DEVICE_FAMILY_AX210) {
603 sb_cfg = iwl_read_umac_prph(mvm->trans, SB_MODIFY_CFG_FLAG);
604 /* if needed, we'll reset this on our way out later */
605 mvm->fw_product_reset = sb_cfg == SB_CFG_RESIDES_IN_ROM;
606 if (mvm->fw_product_reset && iwl_mei_pldr_req())
607 return -EBUSY;
608 }
609
610 iwl_init_notification_wait(&mvm->notif_wait,
611 &init_wait,
612 init_complete,
613 ARRAY_SIZE(init_complete),
614 iwl_wait_init_complete,
615 NULL);
616
617 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL);
618
619 /* Will also start the device */
620 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
621 if (ret) {
622 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
623
624 /* if we needed reset then fail here, but notify and remove */
625 if (mvm->fw_product_reset) {
626 iwl_mei_alive_notif(false);
627 iwl_trans_pcie_reset(mvm->trans,
628 IWL_RESET_MODE_RESCAN);
629 }
630
631 goto error;
632 }
633 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE,
634 NULL);
635
636 /* Send init config command to mark that we are sending NVM access
637 * commands
638 */
639 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP,
640 INIT_EXTENDED_CFG_CMD),
641 CMD_SEND_IN_RFKILL,
642 sizeof(init_cfg), &init_cfg);
643 if (ret) {
644 IWL_ERR(mvm, "Failed to run init config command: %d\n",
645 ret);
646 goto error;
647 }
648
649 /* Load NVM to NIC if needed */
650 if (mvm->nvm_file_name) {
651 ret = iwl_read_external_nvm(mvm->trans, mvm->nvm_file_name,
652 mvm->nvm_sections);
653 if (ret)
654 goto error;
655 ret = iwl_mvm_load_nvm_to_nic(mvm);
656 if (ret)
657 goto error;
658 }
659
660 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP,
661 NVM_ACCESS_COMPLETE),
662 CMD_SEND_IN_RFKILL,
663 sizeof(nvm_complete), &nvm_complete);
664 if (ret) {
665 IWL_ERR(mvm, "Failed to run complete NVM access: %d\n",
666 ret);
667 goto error;
668 }
669
670 ret = iwl_send_phy_cfg_cmd(mvm);
671 if (ret) {
672 IWL_ERR(mvm, "Failed to run PHY configuration: %d\n",
673 ret);
674 goto error;
675 }
676
677 /* We wait for the INIT complete notification */
678 ret = iwl_wait_notification(&mvm->notif_wait, &init_wait,
679 MVM_UCODE_ALIVE_TIMEOUT);
680 if (ret)
681 return ret;
682
683 /* Read the NVM only at driver load time, no need to do this twice */
684 if (!mvm->nvm_data) {
685 mvm->nvm_data = iwl_get_nvm(mvm->trans, mvm->fw,
686 mvm->set_tx_ant, mvm->set_rx_ant);
687 if (IS_ERR(mvm->nvm_data)) {
688 ret = PTR_ERR(mvm->nvm_data);
689 mvm->nvm_data = NULL;
690 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
691 return ret;
692 }
693 }
694
695 mvm->rfkill_safe_init_done = true;
696
697 return 0;
698
699 error:
700 iwl_remove_notification(&mvm->notif_wait, &init_wait);
701 return ret;
702 }
703
iwl_run_init_mvm_ucode(struct iwl_mvm * mvm)704 int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm)
705 {
706 struct iwl_notification_wait calib_wait;
707 static const u16 init_complete[] = {
708 INIT_COMPLETE_NOTIF,
709 CALIB_RES_NOTIF_PHY_DB
710 };
711 int ret;
712
713 if (iwl_mvm_has_unified_ucode(mvm))
714 return iwl_run_unified_mvm_ucode(mvm);
715
716 lockdep_assert_held(&mvm->mutex);
717
718 mvm->rfkill_safe_init_done = false;
719
720 iwl_init_notification_wait(&mvm->notif_wait,
721 &calib_wait,
722 init_complete,
723 ARRAY_SIZE(init_complete),
724 iwl_wait_phy_db_entry,
725 mvm->phy_db);
726
727 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_EARLY, NULL);
728
729 /* Will also start the device */
730 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT);
731 if (ret) {
732 IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret);
733 goto remove_notif;
734 }
735
736 if (mvm->trans->mac_cfg->device_family < IWL_DEVICE_FAMILY_8000) {
737 ret = iwl_mvm_send_bt_init_conf(mvm);
738 if (ret)
739 goto remove_notif;
740 }
741
742 /* Read the NVM only at driver load time, no need to do this twice */
743 if (!mvm->nvm_data) {
744 ret = iwl_nvm_init(mvm);
745 if (ret) {
746 IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
747 goto remove_notif;
748 }
749 }
750
751 /* In case we read the NVM from external file, load it to the NIC */
752 if (mvm->nvm_file_name) {
753 ret = iwl_mvm_load_nvm_to_nic(mvm);
754 if (ret)
755 goto remove_notif;
756 }
757
758 WARN_ONCE(mvm->nvm_data->nvm_version < mvm->trans->cfg->nvm_ver,
759 "Too old NVM version (0x%0x, required = 0x%0x)",
760 mvm->nvm_data->nvm_version, mvm->trans->cfg->nvm_ver);
761
762 /*
763 * abort after reading the nvm in case RF Kill is on, we will complete
764 * the init seq later when RF kill will switch to off
765 */
766 if (iwl_mvm_is_radio_hw_killed(mvm)) {
767 IWL_DEBUG_RF_KILL(mvm,
768 "jump over all phy activities due to RF kill\n");
769 goto remove_notif;
770 }
771
772 mvm->rfkill_safe_init_done = true;
773
774 /* Send TX valid antennas before triggering calibrations */
775 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
776 if (ret)
777 goto remove_notif;
778
779 ret = iwl_send_phy_cfg_cmd(mvm);
780 if (ret) {
781 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
782 ret);
783 goto remove_notif;
784 }
785
786 /*
787 * Some things may run in the background now, but we
788 * just wait for the calibration complete notification.
789 */
790 ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait,
791 MVM_UCODE_CALIB_TIMEOUT);
792 if (!ret)
793 goto out;
794
795 if (iwl_mvm_is_radio_hw_killed(mvm)) {
796 IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n");
797 ret = 0;
798 } else {
799 IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
800 ret);
801 }
802
803 goto out;
804
805 remove_notif:
806 iwl_remove_notification(&mvm->notif_wait, &calib_wait);
807 out:
808 mvm->rfkill_safe_init_done = false;
809 if (!mvm->nvm_data) {
810 /* we want to debug INIT and we have no NVM - fake */
811 mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) +
812 sizeof(struct ieee80211_channel) +
813 sizeof(struct ieee80211_rate),
814 GFP_KERNEL);
815 if (!mvm->nvm_data)
816 return -ENOMEM;
817 mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels;
818 mvm->nvm_data->bands[0].n_channels = 1;
819 mvm->nvm_data->bands[0].n_bitrates = 1;
820 mvm->nvm_data->bands[0].bitrates =
821 (void *)(mvm->nvm_data->channels + 1);
822 mvm->nvm_data->bands[0].bitrates->hw_value = 10;
823 }
824
825 return ret;
826 }
827
iwl_mvm_config_ltr(struct iwl_mvm * mvm)828 static int iwl_mvm_config_ltr(struct iwl_mvm *mvm)
829 {
830 struct iwl_ltr_config_cmd cmd = {
831 .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE),
832 };
833
834 if (!iwl_trans_is_ltr_enabled(mvm->trans))
835 return 0;
836
837 return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0,
838 sizeof(cmd), &cmd);
839 }
840
iwl_mvm_sar_select_profile(struct iwl_mvm * mvm,int prof_a,int prof_b)841 int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b)
842 {
843 u32 cmd_id = REDUCE_TX_POWER_CMD;
844 struct iwl_dev_tx_power_cmd_v3_v8 cmd = {
845 .common.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS),
846 };
847 struct iwl_dev_tx_power_cmd cmd_v9_v10 = {
848 .common.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS),
849 };
850 __le16 *per_chain;
851 int ret;
852 u16 len = 0;
853 u32 n_subbands;
854 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id, 3);
855 void *cmd_data = &cmd;
856
857 if (cmd_ver == 10) {
858 len = sizeof(cmd_v9_v10.v10);
859 n_subbands = IWL_NUM_SUB_BANDS_V2;
860 per_chain = &cmd_v9_v10.v10.per_chain[0][0][0];
861 cmd_v9_v10.v10.flags =
862 cpu_to_le32(mvm->fwrt.reduced_power_flags);
863 } else if (cmd_ver == 9) {
864 len = sizeof(cmd_v9_v10.v9);
865 n_subbands = IWL_NUM_SUB_BANDS_V1;
866 per_chain = &cmd_v9_v10.v9.per_chain[0][0];
867 } else if (cmd_ver == 8) {
868 len = sizeof(cmd.v8);
869 n_subbands = IWL_NUM_SUB_BANDS_V2;
870 per_chain = cmd.v8.per_chain[0][0];
871 cmd.v8.flags = cpu_to_le32(mvm->fwrt.reduced_power_flags);
872 } else if (fw_has_api(&mvm->fw->ucode_capa,
873 IWL_UCODE_TLV_API_REDUCE_TX_POWER)) {
874 len = sizeof(cmd.v5);
875 n_subbands = IWL_NUM_SUB_BANDS_V1;
876 per_chain = cmd.v5.per_chain[0][0];
877 } else if (fw_has_capa(&mvm->fw->ucode_capa,
878 IWL_UCODE_TLV_CAPA_TX_POWER_ACK)) {
879 len = sizeof(cmd.v4);
880 n_subbands = IWL_NUM_SUB_BANDS_V1;
881 per_chain = cmd.v4.per_chain[0][0];
882 } else {
883 len = sizeof(cmd.v3);
884 n_subbands = IWL_NUM_SUB_BANDS_V1;
885 per_chain = cmd.v3.per_chain[0][0];
886 }
887
888 /* all structs have the same common part, add its length */
889 len += sizeof(cmd.common);
890
891 if (cmd_ver < 9)
892 len += sizeof(cmd.per_band);
893 else
894 cmd_data = &cmd_v9_v10;
895
896 ret = iwl_sar_fill_profile(&mvm->fwrt, per_chain,
897 IWL_NUM_CHAIN_TABLES,
898 n_subbands, prof_a, prof_b);
899
900 /* return on error or if the profile is disabled (positive number) */
901 if (ret)
902 return ret;
903
904 iwl_mei_set_power_limit(per_chain);
905
906 IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n");
907 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, len, cmd_data);
908 }
909
iwl_mvm_get_sar_geo_profile(struct iwl_mvm * mvm)910 int iwl_mvm_get_sar_geo_profile(struct iwl_mvm *mvm)
911 {
912 union iwl_geo_tx_power_profiles_cmd geo_tx_cmd = {};
913 struct iwl_geo_tx_power_profiles_resp *resp;
914 u16 len;
915 int ret;
916 struct iwl_host_cmd cmd = {
917 .id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD),
918 .flags = CMD_WANT_SKB,
919 .data = { &geo_tx_cmd },
920 };
921 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd.id,
922 IWL_FW_CMD_VER_UNKNOWN);
923
924 /* the ops field is at the same spot for all versions, so set in v1 */
925 geo_tx_cmd.v1.ops =
926 cpu_to_le32(IWL_PER_CHAIN_OFFSET_GET_CURRENT_TABLE);
927
928 if (cmd_ver == 5)
929 len = sizeof(geo_tx_cmd.v5);
930 else if (cmd_ver == 4)
931 len = sizeof(geo_tx_cmd.v4);
932 else if (cmd_ver == 3)
933 len = sizeof(geo_tx_cmd.v3);
934 else if (fw_has_api(&mvm->fwrt.fw->ucode_capa,
935 IWL_UCODE_TLV_API_SAR_TABLE_VER))
936 len = sizeof(geo_tx_cmd.v2);
937 else
938 len = sizeof(geo_tx_cmd.v1);
939
940 if (!iwl_sar_geo_support(&mvm->fwrt))
941 return -EOPNOTSUPP;
942
943 cmd.len[0] = len;
944
945 ret = iwl_mvm_send_cmd(mvm, &cmd);
946 if (ret) {
947 IWL_ERR(mvm, "Failed to get geographic profile info %d\n", ret);
948 return ret;
949 }
950
951 resp = (void *)cmd.resp_pkt->data;
952 ret = le32_to_cpu(resp->profile_idx);
953
954 if (WARN_ON(ret > BIOS_GEO_MAX_PROFILE_NUM))
955 ret = -EIO;
956
957 iwl_free_resp(&cmd);
958 return ret;
959 }
960
iwl_mvm_sar_geo_init(struct iwl_mvm * mvm)961 static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
962 {
963 u32 cmd_id = WIDE_ID(PHY_OPS_GROUP, PER_CHAIN_LIMIT_OFFSET_CMD);
964 union iwl_geo_tx_power_profiles_cmd cmd = {};
965 u16 len;
966 u32 n_bands;
967 u32 n_profiles;
968 __le32 sk = cpu_to_le32(0);
969 int ret;
970 u8 cmd_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id,
971 IWL_FW_CMD_VER_UNKNOWN);
972
973 BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, ops) !=
974 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) ||
975 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, ops) !=
976 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) ||
977 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, ops) !=
978 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) ||
979 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, ops) !=
980 offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, ops));
981
982 /* the ops field is at the same spot for all versions, so set in v1 */
983 cmd.v1.ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES);
984
985 /* Only set to South Korea if the table revision is 1 */
986 if (mvm->fwrt.geo_rev == 1)
987 sk = cpu_to_le32(1);
988
989 if (cmd_ver == 5) {
990 len = sizeof(cmd.v5);
991 n_bands = ARRAY_SIZE(cmd.v5.table[0]);
992 n_profiles = BIOS_GEO_MAX_PROFILE_NUM;
993 cmd.v5.table_revision = sk;
994 } else if (cmd_ver == 4) {
995 len = sizeof(cmd.v4);
996 n_bands = ARRAY_SIZE(cmd.v4.table[0]);
997 n_profiles = BIOS_GEO_MAX_PROFILE_NUM;
998 cmd.v4.table_revision = sk;
999 } else if (cmd_ver == 3) {
1000 len = sizeof(cmd.v3);
1001 n_bands = ARRAY_SIZE(cmd.v3.table[0]);
1002 n_profiles = BIOS_GEO_MIN_PROFILE_NUM;
1003 cmd.v3.table_revision = sk;
1004 } else if (fw_has_api(&mvm->fwrt.fw->ucode_capa,
1005 IWL_UCODE_TLV_API_SAR_TABLE_VER)) {
1006 len = sizeof(cmd.v2);
1007 n_bands = ARRAY_SIZE(cmd.v2.table[0]);
1008 n_profiles = BIOS_GEO_MIN_PROFILE_NUM;
1009 cmd.v2.table_revision = sk;
1010 } else {
1011 len = sizeof(cmd.v1);
1012 n_bands = ARRAY_SIZE(cmd.v1.table[0]);
1013 n_profiles = BIOS_GEO_MIN_PROFILE_NUM;
1014 }
1015
1016 BUILD_BUG_ON(offsetof(struct iwl_geo_tx_power_profiles_cmd_v1, table) !=
1017 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) ||
1018 offsetof(struct iwl_geo_tx_power_profiles_cmd_v2, table) !=
1019 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) ||
1020 offsetof(struct iwl_geo_tx_power_profiles_cmd_v3, table) !=
1021 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) ||
1022 offsetof(struct iwl_geo_tx_power_profiles_cmd_v4, table) !=
1023 offsetof(struct iwl_geo_tx_power_profiles_cmd_v5, table));
1024 /* the table is at the same position for all versions, so set use v1 */
1025 ret = iwl_sar_geo_fill_table(&mvm->fwrt, &cmd.v1.table[0][0],
1026 n_bands, n_profiles);
1027
1028 /*
1029 * It is a valid scenario to not support SAR, or miss wgds table,
1030 * but in that case there is no need to send the command.
1031 */
1032 if (ret)
1033 return 0;
1034
1035 return iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, len, &cmd);
1036 }
1037
iwl_mvm_ppag_value_valid(struct iwl_fw_runtime * fwrt,int chain,int subband)1038 static bool iwl_mvm_ppag_value_valid(struct iwl_fw_runtime *fwrt, int chain,
1039 int subband)
1040 {
1041 s8 ppag_val = fwrt->ppag_chains[chain].subbands[subband];
1042
1043 if ((subband == 0 &&
1044 (ppag_val > IWL_PPAG_MAX_LB || ppag_val < IWL_PPAG_MIN_LB)) ||
1045 (subband != 0 &&
1046 (ppag_val > IWL_PPAG_MAX_HB || ppag_val < IWL_PPAG_MIN_HB))) {
1047 IWL_DEBUG_RADIO(fwrt, "Invalid PPAG value: %d\n", ppag_val);
1048 return false;
1049 }
1050 return true;
1051 }
1052
iwl_mvm_fill_ppag_table(struct iwl_fw_runtime * fwrt,union iwl_ppag_table_cmd * cmd,int * cmd_size)1053 static int iwl_mvm_fill_ppag_table(struct iwl_fw_runtime *fwrt,
1054 union iwl_ppag_table_cmd *cmd,
1055 int *cmd_size)
1056 {
1057 u8 cmd_ver;
1058 int i, j, num_sub_bands;
1059 s8 *gain;
1060 bool send_ppag_always;
1061
1062 /* many firmware images for JF lie about this */
1063 if (CSR_HW_RFID_TYPE(fwrt->trans->info.hw_rf_id) ==
1064 CSR_HW_RFID_TYPE(CSR_HW_RF_ID_TYPE_JF))
1065 return -EOPNOTSUPP;
1066
1067 if (!fw_has_capa(&fwrt->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_PPAG)) {
1068 IWL_DEBUG_RADIO(fwrt,
1069 "PPAG capability not supported by FW, command not sent.\n");
1070 return -EINVAL;
1071 }
1072
1073 cmd_ver = iwl_fw_lookup_cmd_ver(fwrt->fw,
1074 WIDE_ID(PHY_OPS_GROUP,
1075 PER_PLATFORM_ANT_GAIN_CMD), 1);
1076 /*
1077 * Starting from ver 4, driver needs to send the PPAG CMD regardless
1078 * if PPAG is enabled/disabled or valid/invalid.
1079 */
1080 send_ppag_always = cmd_ver > 3;
1081
1082 /* Don't send PPAG if it is disabled */
1083 if (!send_ppag_always && !fwrt->ppag_flags) {
1084 IWL_DEBUG_RADIO(fwrt, "PPAG not enabled, command not sent.\n");
1085 return -EINVAL;
1086 }
1087
1088 IWL_DEBUG_RADIO(fwrt, "PPAG cmd ver is %d\n", cmd_ver);
1089 if (cmd_ver == 1) {
1090 num_sub_bands = IWL_NUM_SUB_BANDS_V1;
1091 gain = cmd->v1.gain[0];
1092 *cmd_size = sizeof(cmd->v1);
1093 cmd->v1.flags =
1094 cpu_to_le32(fwrt->ppag_flags & IWL_PPAG_CMD_V1_MASK);
1095 if (fwrt->ppag_bios_rev >= 1) {
1096 /* in this case FW supports revision 0 */
1097 IWL_DEBUG_RADIO(fwrt,
1098 "PPAG table rev is %d, send truncated table\n",
1099 fwrt->ppag_bios_rev);
1100 }
1101 } else if (cmd_ver == 5) {
1102 num_sub_bands = IWL_NUM_SUB_BANDS_V2;
1103 gain = cmd->v5.gain[0];
1104 *cmd_size = sizeof(cmd->v5);
1105 cmd->v5.flags =
1106 cpu_to_le32(fwrt->ppag_flags & IWL_PPAG_CMD_V5_MASK);
1107 if (fwrt->ppag_bios_rev == 0) {
1108 /* in this case FW supports revisions 1,2 or 3 */
1109 IWL_DEBUG_RADIO(fwrt,
1110 "PPAG table rev is 0, send padded table\n");
1111 }
1112 } else if (cmd_ver == 7) {
1113 num_sub_bands = IWL_NUM_SUB_BANDS_V2;
1114 gain = cmd->v7.gain[0];
1115 *cmd_size = sizeof(cmd->v7);
1116 cmd->v7.ppag_config_info.hdr.table_source =
1117 fwrt->ppag_bios_source;
1118 cmd->v7.ppag_config_info.hdr.table_revision =
1119 fwrt->ppag_bios_rev;
1120 cmd->v7.ppag_config_info.value = cpu_to_le32(fwrt->ppag_flags);
1121 } else {
1122 IWL_DEBUG_RADIO(fwrt, "Unsupported PPAG command version\n");
1123 return -EINVAL;
1124 }
1125
1126 /* ppag mode */
1127 IWL_DEBUG_RADIO(fwrt,
1128 "PPAG MODE bits were read from bios: %d\n",
1129 fwrt->ppag_flags);
1130
1131 if (cmd_ver == 1 &&
1132 !fw_has_capa(&fwrt->fw->ucode_capa,
1133 IWL_UCODE_TLV_CAPA_PPAG_CHINA_BIOS_SUPPORT)) {
1134 cmd->v1.flags &= cpu_to_le32(IWL_PPAG_ETSI_MASK);
1135 IWL_DEBUG_RADIO(fwrt, "masking ppag China bit\n");
1136 } else {
1137 IWL_DEBUG_RADIO(fwrt, "isn't masking ppag China bit\n");
1138 }
1139
1140 /* The 'flags' field is the same in v1 and v5 so we can just
1141 * use v1 to access it.
1142 */
1143 IWL_DEBUG_RADIO(fwrt,
1144 "PPAG MODE bits going to be sent: %d\n",
1145 (cmd_ver < 7) ? le32_to_cpu(cmd->v1.flags) :
1146 le32_to_cpu(cmd->v7.ppag_config_info.value));
1147
1148 for (i = 0; i < IWL_NUM_CHAIN_LIMITS; i++) {
1149 for (j = 0; j < num_sub_bands; j++) {
1150 if (!send_ppag_always &&
1151 !iwl_mvm_ppag_value_valid(fwrt, i, j))
1152 return -EINVAL;
1153
1154 gain[i * num_sub_bands + j] =
1155 fwrt->ppag_chains[i].subbands[j];
1156 IWL_DEBUG_RADIO(fwrt,
1157 "PPAG table: chain[%d] band[%d]: gain = %d\n",
1158 i, j, gain[i * num_sub_bands + j]);
1159 }
1160 }
1161
1162 return 0;
1163 }
1164
iwl_mvm_ppag_send_cmd(struct iwl_mvm * mvm)1165 int iwl_mvm_ppag_send_cmd(struct iwl_mvm *mvm)
1166 {
1167 union iwl_ppag_table_cmd cmd;
1168 int ret, cmd_size;
1169
1170 ret = iwl_mvm_fill_ppag_table(&mvm->fwrt, &cmd, &cmd_size);
1171 /* Not supporting PPAG table is a valid scenario */
1172 if (ret < 0)
1173 return 0;
1174
1175 IWL_DEBUG_RADIO(mvm, "Sending PER_PLATFORM_ANT_GAIN_CMD\n");
1176 ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(PHY_OPS_GROUP,
1177 PER_PLATFORM_ANT_GAIN_CMD),
1178 0, cmd_size, &cmd);
1179 if (ret < 0)
1180 IWL_ERR(mvm, "failed to send PER_PLATFORM_ANT_GAIN_CMD (%d)\n",
1181 ret);
1182
1183 return ret;
1184 }
1185
iwl_mvm_ppag_init(struct iwl_mvm * mvm)1186 static int iwl_mvm_ppag_init(struct iwl_mvm *mvm)
1187 {
1188 /* no need to read the table, done in INIT stage */
1189 if (!(iwl_is_ppag_approved(&mvm->fwrt)))
1190 return 0;
1191
1192 return iwl_mvm_ppag_send_cmd(mvm);
1193 }
1194
iwl_mvm_tas_init(struct iwl_mvm * mvm)1195 static void iwl_mvm_tas_init(struct iwl_mvm *mvm)
1196 {
1197 u32 cmd_id = WIDE_ID(REGULATORY_AND_NVM_GROUP, TAS_CONFIG);
1198 int fw_ver = iwl_fw_lookup_cmd_ver(mvm->fw, cmd_id,
1199 IWL_FW_CMD_VER_UNKNOWN);
1200 struct iwl_tas_selection_data selection_data = {};
1201 struct iwl_tas_config_cmd_v2_v4 cmd_v2_v4 = {};
1202 struct iwl_tas_config_cmd cmd_v5 = {};
1203 struct iwl_tas_data data = {};
1204 void *cmd_data = &cmd_v2_v4;
1205 int cmd_size;
1206 int ret;
1207
1208 BUILD_BUG_ON(ARRAY_SIZE(data.block_list_array) !=
1209 IWL_WTAS_BLACK_LIST_MAX);
1210 BUILD_BUG_ON(ARRAY_SIZE(cmd_v2_v4.common.block_list_array) !=
1211 IWL_WTAS_BLACK_LIST_MAX);
1212 BUILD_BUG_ON(ARRAY_SIZE(cmd_v5.block_list_array) !=
1213 IWL_WTAS_BLACK_LIST_MAX);
1214
1215 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TAS_CFG)) {
1216 IWL_DEBUG_RADIO(mvm, "TAS not enabled in FW\n");
1217 return;
1218 }
1219
1220 ret = iwl_bios_get_tas_table(&mvm->fwrt, &data);
1221 if (ret < 0) {
1222 IWL_DEBUG_RADIO(mvm,
1223 "TAS table invalid or unavailable. (%d)\n",
1224 ret);
1225 return;
1226 }
1227
1228 if (ret == 0 && fw_ver < 5)
1229 return;
1230
1231 if (!iwl_is_tas_approved()) {
1232 IWL_DEBUG_RADIO(mvm,
1233 "System vendor '%s' is not in the approved list, disabling TAS in US and Canada.\n",
1234 dmi_get_system_info(DMI_SYS_VENDOR) ?: "<unknown>");
1235 if ((!iwl_add_mcc_to_tas_block_list(data.block_list_array,
1236 &data.block_list_size,
1237 IWL_MCC_US)) ||
1238 (!iwl_add_mcc_to_tas_block_list(data.block_list_array,
1239 &data.block_list_size,
1240 IWL_MCC_CANADA))) {
1241 IWL_DEBUG_RADIO(mvm,
1242 "Unable to add US/Canada to TAS block list, disabling TAS\n");
1243 return;
1244 }
1245 } else {
1246 IWL_DEBUG_RADIO(mvm,
1247 "System vendor '%s' is in the approved list.\n",
1248 dmi_get_system_info(DMI_SYS_VENDOR) ?: "<unknown>");
1249 }
1250
1251 if (fw_ver < 5) {
1252 selection_data = iwl_parse_tas_selection(data.tas_selection,
1253 data.table_revision);
1254 cmd_v2_v4.common.block_list_size =
1255 cpu_to_le32(data.block_list_size);
1256 for (u8 i = 0; i < data.block_list_size; i++)
1257 cmd_v2_v4.common.block_list_array[i] =
1258 cpu_to_le32(data.block_list_array[i]);
1259 }
1260
1261 if (fw_ver == 5) {
1262 cmd_size = sizeof(cmd_v5);
1263 cmd_data = &cmd_v5;
1264 cmd_v5.block_list_size = cpu_to_le16(data.block_list_size);
1265 for (u16 i = 0; i < data.block_list_size; i++)
1266 cmd_v5.block_list_array[i] =
1267 cpu_to_le16(data.block_list_array[i]);
1268 cmd_v5.tas_config_info.hdr.table_source = data.table_source;
1269 cmd_v5.tas_config_info.hdr.table_revision =
1270 data.table_revision;
1271 cmd_v5.tas_config_info.value = cpu_to_le32(data.tas_selection);
1272 } else if (fw_ver == 4) {
1273 cmd_size = sizeof(cmd_v2_v4.common) + sizeof(cmd_v2_v4.v4);
1274 cmd_v2_v4.v4.override_tas_iec = selection_data.override_tas_iec;
1275 cmd_v2_v4.v4.enable_tas_iec = selection_data.enable_tas_iec;
1276 cmd_v2_v4.v4.usa_tas_uhb_allowed =
1277 selection_data.usa_tas_uhb_allowed;
1278 if (fw_has_capa(&mvm->fw->ucode_capa,
1279 IWL_UCODE_TLV_CAPA_UHB_CANADA_TAS_SUPPORT) &&
1280 selection_data.canada_tas_uhb_allowed)
1281 cmd_v2_v4.v4.uhb_allowed_flags = TAS_UHB_ALLOWED_CANADA;
1282 } else if (fw_ver == 3) {
1283 cmd_size = sizeof(cmd_v2_v4.common) + sizeof(cmd_v2_v4.v3);
1284 cmd_v2_v4.v3.override_tas_iec =
1285 cpu_to_le16(selection_data.override_tas_iec);
1286 cmd_v2_v4.v3.enable_tas_iec =
1287 cpu_to_le16(selection_data.enable_tas_iec);
1288 } else if (fw_ver == 2) {
1289 cmd_size = sizeof(cmd_v2_v4.common);
1290 } else {
1291 return;
1292 }
1293
1294 ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, cmd_size, cmd_data);
1295 if (ret < 0)
1296 IWL_DEBUG_RADIO(mvm, "failed to send TAS_CONFIG (%d)\n", ret);
1297 }
1298
iwl_mvm_get_lari_config_bitmap(struct iwl_fw_runtime * fwrt)1299 static __le32 iwl_mvm_get_lari_config_bitmap(struct iwl_fw_runtime *fwrt)
1300 {
1301 int ret;
1302 u32 val;
1303 __le32 config_bitmap = 0;
1304
1305 switch (CSR_HW_RFID_TYPE(fwrt->trans->info.hw_rf_id)) {
1306 case IWL_CFG_RF_TYPE_HR1:
1307 case IWL_CFG_RF_TYPE_HR2:
1308 case IWL_CFG_RF_TYPE_JF1:
1309 case IWL_CFG_RF_TYPE_JF2:
1310 ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_ENABLE_INDONESIA_5G2,
1311 &val);
1312
1313 if (!ret && val == DSM_VALUE_INDONESIA_ENABLE)
1314 config_bitmap |=
1315 cpu_to_le32(LARI_CONFIG_ENABLE_5G2_IN_INDONESIA_MSK);
1316 break;
1317 default:
1318 break;
1319 }
1320
1321 ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_DISABLE_SRD, &val);
1322 if (!ret) {
1323 if (val == DSM_VALUE_SRD_PASSIVE)
1324 config_bitmap |=
1325 cpu_to_le32(LARI_CONFIG_CHANGE_ETSI_TO_PASSIVE_MSK);
1326 else if (val == DSM_VALUE_SRD_DISABLE)
1327 config_bitmap |=
1328 cpu_to_le32(LARI_CONFIG_CHANGE_ETSI_TO_DISABLED_MSK);
1329 }
1330
1331 if (fw_has_capa(&fwrt->fw->ucode_capa,
1332 IWL_UCODE_TLV_CAPA_CHINA_22_REG_SUPPORT)) {
1333 ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_REGULATORY_CONFIG,
1334 &val);
1335 /*
1336 * China 2022 enable if the BIOS object does not exist or
1337 * if it is enabled in BIOS.
1338 */
1339 if (ret < 0 || val & DSM_MASK_CHINA_22_REG)
1340 config_bitmap |=
1341 cpu_to_le32(LARI_CONFIG_ENABLE_CHINA_22_REG_SUPPORT_MSK);
1342 }
1343
1344 return config_bitmap;
1345 }
1346
iwl_mvm_get_lari_config_cmd_size(u8 cmd_ver)1347 static size_t iwl_mvm_get_lari_config_cmd_size(u8 cmd_ver)
1348 {
1349 size_t cmd_size;
1350
1351 switch (cmd_ver) {
1352 case 12:
1353 cmd_size = offsetof(struct iwl_lari_config_change_cmd,
1354 oem_11bn_allow_bitmap);
1355 break;
1356 case 8:
1357 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v8);
1358 break;
1359 case 6:
1360 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v6);
1361 break;
1362 default:
1363 cmd_size = sizeof(struct iwl_lari_config_change_cmd_v1);
1364 break;
1365 }
1366 return cmd_size;
1367 }
1368
iwl_mvm_fill_lari_config(struct iwl_fw_runtime * fwrt,struct iwl_lari_config_change_cmd * cmd,size_t * cmd_size)1369 static int iwl_mvm_fill_lari_config(struct iwl_fw_runtime *fwrt,
1370 struct iwl_lari_config_change_cmd *cmd,
1371 size_t *cmd_size)
1372 {
1373 int ret;
1374 u32 value;
1375 bool has_raw_dsm_capa = fw_has_capa(&fwrt->fw->ucode_capa,
1376 IWL_UCODE_TLV_CAPA_FW_ACCEPTS_RAW_DSM_TABLE);
1377 u8 cmd_ver = iwl_fw_lookup_cmd_ver(fwrt->fw,
1378 WIDE_ID(REGULATORY_AND_NVM_GROUP,
1379 LARI_CONFIG_CHANGE), 1);
1380
1381 memset(cmd, 0, sizeof(*cmd));
1382 *cmd_size = iwl_mvm_get_lari_config_cmd_size(cmd_ver);
1383
1384 cmd->config_bitmap = iwl_mvm_get_lari_config_bitmap(fwrt);
1385
1386 ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_11AX_ENABLEMENT, &value);
1387 if (!ret) {
1388 if (!has_raw_dsm_capa)
1389 value &= DSM_11AX_ALLOW_BITMAP;
1390 cmd->oem_11ax_allow_bitmap = cpu_to_le32(value);
1391 }
1392
1393 ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_ENABLE_UNII4_CHAN, &value);
1394 if (!ret) {
1395 if (!has_raw_dsm_capa)
1396 value &= DSM_UNII4_ALLOW_BITMAP;
1397
1398 /* Since version 12, bits 4 and 5 are supported
1399 * regardless of this capability, By pass this masking
1400 * if firmware has capability of accepting raw DSM table.
1401 */
1402 if (!has_raw_dsm_capa && cmd_ver < 12 &&
1403 !fw_has_capa(&fwrt->fw->ucode_capa,
1404 IWL_UCODE_TLV_CAPA_BIOS_OVERRIDE_5G9_FOR_CA))
1405 value &= ~(DSM_VALUE_UNII4_CANADA_OVERRIDE_MSK |
1406 DSM_VALUE_UNII4_CANADA_EN_MSK);
1407
1408 cmd->oem_unii4_allow_bitmap = cpu_to_le32(value);
1409 }
1410
1411 ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_ACTIVATE_CHANNEL, &value);
1412 if (!ret) {
1413 if (!has_raw_dsm_capa)
1414 value &= CHAN_STATE_ACTIVE_BITMAP_CMD_V12;
1415
1416 if (!has_raw_dsm_capa && cmd_ver < 8)
1417 value &= ~ACTIVATE_5G2_IN_WW_MASK;
1418
1419 /* Since version 12, bits 5 and 6 are supported
1420 * regardless of this capability, By pass this masking
1421 * if firmware has capability of accepting raw DSM table.
1422 */
1423 if (!has_raw_dsm_capa && cmd_ver < 12 &&
1424 !fw_has_capa(&fwrt->fw->ucode_capa,
1425 IWL_UCODE_TLV_CAPA_BIOS_OVERRIDE_UNII4_US_CA))
1426 value &= CHAN_STATE_ACTIVE_BITMAP_CMD_V8;
1427
1428 cmd->chan_state_active_bitmap = cpu_to_le32(value);
1429 }
1430
1431 ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_ENABLE_6E, &value);
1432 if (!ret)
1433 cmd->oem_uhb_allow_bitmap = cpu_to_le32(value);
1434
1435 ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_FORCE_DISABLE_CHANNELS, &value);
1436 if (!ret) {
1437 if (!has_raw_dsm_capa)
1438 value &= DSM_FORCE_DISABLE_CHANNELS_ALLOWED_BITMAP;
1439 cmd->force_disable_channels_bitmap = cpu_to_le32(value);
1440 }
1441
1442 ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_ENERGY_DETECTION_THRESHOLD,
1443 &value);
1444 if (!ret) {
1445 if (!has_raw_dsm_capa)
1446 value &= DSM_EDT_ALLOWED_BITMAP;
1447 cmd->edt_bitmap = cpu_to_le32(value);
1448 }
1449
1450 ret = iwl_bios_get_wbem(fwrt, &value);
1451 if (!ret)
1452 cmd->oem_320mhz_allow_bitmap = cpu_to_le32(value);
1453
1454 ret = iwl_bios_get_dsm(fwrt, DSM_FUNC_ENABLE_11BE, &value);
1455 if (!ret)
1456 cmd->oem_11be_allow_bitmap = cpu_to_le32(value);
1457
1458 if (cmd->config_bitmap ||
1459 cmd->oem_uhb_allow_bitmap ||
1460 cmd->oem_11ax_allow_bitmap ||
1461 cmd->oem_unii4_allow_bitmap ||
1462 cmd->chan_state_active_bitmap ||
1463 cmd->force_disable_channels_bitmap ||
1464 cmd->edt_bitmap ||
1465 cmd->oem_320mhz_allow_bitmap ||
1466 cmd->oem_11be_allow_bitmap) {
1467 IWL_DEBUG_RADIO(fwrt,
1468 "sending LARI_CONFIG_CHANGE, config_bitmap=0x%x, oem_11ax_allow_bitmap=0x%x\n",
1469 le32_to_cpu(cmd->config_bitmap),
1470 le32_to_cpu(cmd->oem_11ax_allow_bitmap));
1471 IWL_DEBUG_RADIO(fwrt,
1472 "sending LARI_CONFIG_CHANGE, oem_unii4_allow_bitmap=0x%x, chan_state_active_bitmap=0x%x, cmd_ver=%d\n",
1473 le32_to_cpu(cmd->oem_unii4_allow_bitmap),
1474 le32_to_cpu(cmd->chan_state_active_bitmap),
1475 cmd_ver);
1476 IWL_DEBUG_RADIO(fwrt,
1477 "sending LARI_CONFIG_CHANGE, oem_uhb_allow_bitmap=0x%x, force_disable_channels_bitmap=0x%x\n",
1478 le32_to_cpu(cmd->oem_uhb_allow_bitmap),
1479 le32_to_cpu(cmd->force_disable_channels_bitmap));
1480 IWL_DEBUG_RADIO(fwrt,
1481 "sending LARI_CONFIG_CHANGE, edt_bitmap=0x%x, oem_320mhz_allow_bitmap=0x%x\n",
1482 le32_to_cpu(cmd->edt_bitmap),
1483 le32_to_cpu(cmd->oem_320mhz_allow_bitmap));
1484 IWL_DEBUG_RADIO(fwrt,
1485 "sending LARI_CONFIG_CHANGE, oem_11be_allow_bitmap=0x%x\n",
1486 le32_to_cpu(cmd->oem_11be_allow_bitmap));
1487 } else {
1488 return 1;
1489 }
1490
1491 return 0;
1492 }
1493
iwl_mvm_lari_cfg(struct iwl_mvm * mvm)1494 static void iwl_mvm_lari_cfg(struct iwl_mvm *mvm)
1495 {
1496 struct iwl_lari_config_change_cmd cmd;
1497 size_t cmd_size;
1498 int ret;
1499
1500 ret = iwl_mvm_fill_lari_config(&mvm->fwrt, &cmd, &cmd_size);
1501 if (!ret) {
1502 ret = iwl_mvm_send_cmd_pdu(mvm,
1503 WIDE_ID(REGULATORY_AND_NVM_GROUP,
1504 LARI_CONFIG_CHANGE),
1505 0, cmd_size, &cmd);
1506 if (ret < 0)
1507 IWL_DEBUG_RADIO(mvm,
1508 "Failed to send LARI_CONFIG_CHANGE (%d)\n",
1509 ret);
1510 }
1511 }
1512
iwl_mvm_get_bios_tables(struct iwl_mvm * mvm)1513 void iwl_mvm_get_bios_tables(struct iwl_mvm *mvm)
1514 {
1515 int ret;
1516
1517 iwl_acpi_get_guid_lock_status(&mvm->fwrt);
1518
1519 /* read PPAG table */
1520 ret = iwl_bios_get_ppag_table(&mvm->fwrt);
1521 if (ret < 0) {
1522 IWL_DEBUG_RADIO(mvm,
1523 "PPAG BIOS table invalid or unavailable. (%d)\n",
1524 ret);
1525 }
1526
1527 /* read SAR tables */
1528 ret = iwl_bios_get_wrds_table(&mvm->fwrt);
1529 if (ret < 0) {
1530 IWL_DEBUG_RADIO(mvm,
1531 "WRDS SAR BIOS table invalid or unavailable. (%d)\n",
1532 ret);
1533 /*
1534 * If not available, don't fail and don't bother with EWRD and
1535 * WGDS */
1536
1537 if (!iwl_bios_get_wgds_table(&mvm->fwrt)) {
1538 /*
1539 * If basic SAR is not available, we check for WGDS,
1540 * which should *not* be available either. If it is
1541 * available, issue an error, because we can't use SAR
1542 * Geo without basic SAR.
1543 */
1544 IWL_ERR(mvm, "BIOS contains WGDS but no WRDS\n");
1545 }
1546
1547 } else {
1548 ret = iwl_bios_get_ewrd_table(&mvm->fwrt);
1549 /* if EWRD is not available, we can still use
1550 * WRDS, so don't fail */
1551 if (ret < 0)
1552 IWL_DEBUG_RADIO(mvm,
1553 "EWRD SAR BIOS table invalid or unavailable. (%d)\n",
1554 ret);
1555
1556 /* read geo SAR table */
1557 if (iwl_sar_geo_support(&mvm->fwrt)) {
1558 ret = iwl_bios_get_wgds_table(&mvm->fwrt);
1559 if (ret < 0)
1560 IWL_DEBUG_RADIO(mvm,
1561 "Geo SAR BIOS table invalid or unavailable. (%d)\n",
1562 ret);
1563 /* we don't fail if the table is not available */
1564 }
1565 }
1566
1567 iwl_acpi_get_phy_filters(&mvm->fwrt);
1568
1569 if (iwl_bios_get_eckv(&mvm->fwrt, &mvm->ext_clock_valid))
1570 IWL_DEBUG_RADIO(mvm, "ECKV table doesn't exist in BIOS\n");
1571 }
1572
iwl_mvm_disconnect_iterator(void * data,u8 * mac,struct ieee80211_vif * vif)1573 static void iwl_mvm_disconnect_iterator(void *data, u8 *mac,
1574 struct ieee80211_vif *vif)
1575 {
1576 if (vif->type == NL80211_IFTYPE_STATION)
1577 ieee80211_hw_restart_disconnect(vif);
1578 }
1579
iwl_mvm_send_recovery_cmd(struct iwl_mvm * mvm,u32 flags)1580 void iwl_mvm_send_recovery_cmd(struct iwl_mvm *mvm, u32 flags)
1581 {
1582 u32 error_log_size = mvm->fw->ucode_capa.error_log_size;
1583 u32 status = 0;
1584 int ret;
1585
1586 struct iwl_fw_error_recovery_cmd recovery_cmd = {
1587 .flags = cpu_to_le32(flags),
1588 .buf_size = 0,
1589 };
1590 struct iwl_host_cmd host_cmd = {
1591 .id = WIDE_ID(SYSTEM_GROUP, FW_ERROR_RECOVERY_CMD),
1592 .data = {&recovery_cmd, },
1593 .len = {sizeof(recovery_cmd), },
1594 };
1595
1596 /* no error log was defined in TLV */
1597 if (!error_log_size)
1598 return;
1599
1600 if (flags & ERROR_RECOVERY_UPDATE_DB) {
1601 /* no buf was allocated while HW reset */
1602 if (!mvm->error_recovery_buf)
1603 return;
1604
1605 host_cmd.data[1] = mvm->error_recovery_buf;
1606 host_cmd.len[1] = error_log_size;
1607 host_cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY;
1608 recovery_cmd.buf_size = cpu_to_le32(error_log_size);
1609 }
1610
1611 ret = iwl_mvm_send_cmd_status(mvm, &host_cmd, &status);
1612 kfree(mvm->error_recovery_buf);
1613 mvm->error_recovery_buf = NULL;
1614
1615 if (ret) {
1616 IWL_ERR(mvm, "Failed to send recovery cmd %d\n", ret);
1617 return;
1618 }
1619
1620 /* skb respond is only relevant in ERROR_RECOVERY_UPDATE_DB */
1621 if (flags & ERROR_RECOVERY_UPDATE_DB) {
1622 if (status) {
1623 IWL_ERR(mvm,
1624 "Failed to send recovery cmd blob was invalid %d\n",
1625 status);
1626
1627 ieee80211_iterate_interfaces(mvm->hw, 0,
1628 iwl_mvm_disconnect_iterator,
1629 mvm);
1630 }
1631 }
1632 }
1633
iwl_mvm_sar_init(struct iwl_mvm * mvm)1634 static int iwl_mvm_sar_init(struct iwl_mvm *mvm)
1635 {
1636 return iwl_mvm_sar_select_profile(mvm, 1, 1);
1637 }
1638
iwl_mvm_load_rt_fw(struct iwl_mvm * mvm)1639 static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm)
1640 {
1641 int ret;
1642
1643 if (iwl_mvm_has_unified_ucode(mvm))
1644 return iwl_run_unified_mvm_ucode(mvm);
1645
1646 ret = iwl_run_init_mvm_ucode(mvm);
1647
1648 if (ret) {
1649 IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret);
1650 return ret;
1651 }
1652
1653 iwl_fw_dbg_stop_sync(&mvm->fwrt);
1654 iwl_trans_stop_device(mvm->trans);
1655 ret = iwl_trans_start_hw(mvm->trans);
1656 if (ret)
1657 return ret;
1658
1659 mvm->rfkill_safe_init_done = false;
1660 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
1661 if (ret)
1662 return ret;
1663
1664 mvm->rfkill_safe_init_done = true;
1665
1666 iwl_dbg_tlv_time_point(&mvm->fwrt, IWL_FW_INI_TIME_POINT_AFTER_ALIVE,
1667 NULL);
1668
1669 return iwl_init_paging(&mvm->fwrt, mvm->fwrt.cur_fw_img);
1670 }
1671
iwl_mvm_up(struct iwl_mvm * mvm)1672 int iwl_mvm_up(struct iwl_mvm *mvm)
1673 {
1674 int ret, i;
1675 struct ieee80211_supported_band *sband = NULL;
1676
1677 lockdep_assert_wiphy(mvm->hw->wiphy);
1678 lockdep_assert_held(&mvm->mutex);
1679
1680 ret = iwl_trans_start_hw(mvm->trans);
1681 if (ret)
1682 return ret;
1683
1684 ret = iwl_mvm_load_rt_fw(mvm);
1685 if (ret) {
1686 IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
1687 if (ret != -ERFKILL && !mvm->fw_product_reset)
1688 iwl_fw_dbg_error_collect(&mvm->fwrt,
1689 FW_DBG_TRIGGER_DRIVER);
1690 goto error;
1691 }
1692
1693 /* FW loaded successfully */
1694 mvm->fw_product_reset = false;
1695
1696 iwl_fw_disable_dbg_asserts(&mvm->fwrt);
1697 iwl_get_shared_mem_conf(&mvm->fwrt);
1698
1699 ret = iwl_mvm_sf_update(mvm, NULL, false);
1700 if (ret)
1701 IWL_ERR(mvm, "Failed to initialize Smart Fifo\n");
1702
1703 if (!iwl_trans_dbg_ini_valid(mvm->trans)) {
1704 mvm->fwrt.dump.conf = FW_DBG_INVALID;
1705 /* if we have a destination, assume EARLY START */
1706 if (mvm->fw->dbg.dest_tlv)
1707 mvm->fwrt.dump.conf = FW_DBG_START_FROM_ALIVE;
1708 iwl_fw_start_dbg_conf(&mvm->fwrt, FW_DBG_START_FROM_ALIVE);
1709 }
1710
1711 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1712 if (ret)
1713 goto error;
1714
1715 if (!iwl_mvm_has_unified_ucode(mvm)) {
1716 /* Send phy db control command and then phy db calibration */
1717 ret = iwl_send_phy_db_data(mvm->phy_db);
1718 if (ret)
1719 goto error;
1720 ret = iwl_send_phy_cfg_cmd(mvm);
1721 if (ret)
1722 goto error;
1723 }
1724
1725 ret = iwl_mvm_send_bt_init_conf(mvm);
1726 if (ret)
1727 goto error;
1728
1729 if (fw_has_capa(&mvm->fw->ucode_capa,
1730 IWL_UCODE_TLV_CAPA_SOC_LATENCY_SUPPORT)) {
1731 ret = iwl_set_soc_latency(&mvm->fwrt);
1732 if (ret)
1733 goto error;
1734 }
1735
1736 iwl_mvm_lari_cfg(mvm);
1737
1738 /* Init RSS configuration */
1739 ret = iwl_configure_rxq(&mvm->fwrt);
1740 if (ret)
1741 goto error;
1742
1743 if (iwl_mvm_has_new_rx_api(mvm)) {
1744 ret = iwl_send_rss_cfg_cmd(mvm);
1745 if (ret) {
1746 IWL_ERR(mvm, "Failed to configure RSS queues: %d\n",
1747 ret);
1748 goto error;
1749 }
1750 }
1751
1752 /* init the fw <-> mac80211 STA mapping */
1753 for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) {
1754 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1755 RCU_INIT_POINTER(mvm->fw_id_to_link_sta[i], NULL);
1756 }
1757
1758 mvm->tdls_cs.peer.sta_id = IWL_INVALID_STA;
1759
1760 /* reset quota debouncing buffer - 0xff will yield invalid data */
1761 memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd));
1762
1763 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_DQA_SUPPORT)) {
1764 ret = iwl_mvm_send_dqa_cmd(mvm);
1765 if (ret)
1766 goto error;
1767 }
1768
1769 /*
1770 * Add auxiliary station for scanning.
1771 * Newer versions of this command implies that the fw uses
1772 * internal aux station for all aux activities that don't
1773 * requires a dedicated data queue.
1774 */
1775 if (!iwl_mvm_has_new_station_api(mvm->fw)) {
1776 /*
1777 * In old version the aux station uses mac id like other
1778 * station and not lmac id
1779 */
1780 ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX);
1781 if (ret)
1782 goto error;
1783 }
1784
1785 /* Add all the PHY contexts */
1786 i = 0;
1787 while (!sband && i < NUM_NL80211_BANDS)
1788 sband = mvm->hw->wiphy->bands[i++];
1789
1790 if (WARN_ON_ONCE(!sband)) {
1791 ret = -ENODEV;
1792 goto error;
1793 }
1794
1795 if (iwl_mvm_is_tt_in_fw(mvm)) {
1796 /* in order to give the responsibility of ct-kill and
1797 * TX backoff to FW we need to send empty temperature reporting
1798 * cmd during init time
1799 */
1800 iwl_mvm_send_temp_report_ths_cmd(mvm);
1801 } else {
1802 /* Initialize tx backoffs to the minimal possible */
1803 iwl_mvm_tt_tx_backoff(mvm, 0);
1804 }
1805
1806 #ifdef CONFIG_THERMAL
1807 /* TODO: read the budget from BIOS / Platform NVM */
1808
1809 /*
1810 * In case there is no budget from BIOS / Platform NVM the default
1811 * budget should be 2000mW (cooling state 0).
1812 */
1813 if (iwl_mvm_is_ctdp_supported(mvm)) {
1814 ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START,
1815 mvm->cooling_dev.cur_state);
1816 if (ret)
1817 goto error;
1818 }
1819 #endif
1820
1821 if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_SET_LTR_GEN2))
1822 WARN_ON(iwl_mvm_config_ltr(mvm));
1823
1824 ret = iwl_mvm_power_update_device(mvm);
1825 if (ret)
1826 goto error;
1827
1828 /*
1829 * RTNL is not taken during Ct-kill, but we don't need to scan/Tx
1830 * anyway, so don't init MCC.
1831 */
1832 if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) {
1833 ret = iwl_mvm_init_mcc(mvm);
1834 if (ret)
1835 goto error;
1836 }
1837
1838 if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) {
1839 mvm->scan_type = IWL_SCAN_TYPE_NOT_SET;
1840 mvm->hb_scan_type = IWL_SCAN_TYPE_NOT_SET;
1841 ret = iwl_mvm_config_scan(mvm);
1842 if (ret)
1843 goto error;
1844 }
1845
1846 if (test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status)) {
1847 iwl_mvm_send_recovery_cmd(mvm, ERROR_RECOVERY_UPDATE_DB);
1848
1849 if (mvm->time_sync.active)
1850 iwl_mvm_time_sync_config(mvm, mvm->time_sync.peer_addr,
1851 IWL_TIME_SYNC_PROTOCOL_TM |
1852 IWL_TIME_SYNC_PROTOCOL_FTM);
1853 }
1854
1855 if (!mvm->ptp_data.ptp_clock)
1856 iwl_mvm_ptp_init(mvm);
1857
1858 ret = iwl_mvm_ppag_init(mvm);
1859 if (ret)
1860 goto error;
1861
1862 ret = iwl_mvm_sar_init(mvm);
1863 if (ret == 0)
1864 ret = iwl_mvm_sar_geo_init(mvm);
1865 if (ret < 0)
1866 goto error;
1867
1868 ret = iwl_mvm_sgom_init(mvm);
1869 if (ret)
1870 goto error;
1871
1872 iwl_mvm_tas_init(mvm);
1873 iwl_mvm_leds_sync(mvm);
1874 iwl_mvm_uats_init(mvm);
1875
1876 if (iwl_rfi_supported(mvm)) {
1877 if (iwl_rfi_is_enabled_in_bios(&mvm->fwrt))
1878 iwl_rfi_send_config_cmd(mvm, NULL);
1879 }
1880
1881 iwl_mvm_mei_device_state(mvm, true);
1882
1883 IWL_DEBUG_INFO(mvm, "RT uCode started.\n");
1884 return 0;
1885 error:
1886 iwl_mvm_stop_device(mvm);
1887 return ret;
1888 }
1889
iwl_mvm_load_d3_fw(struct iwl_mvm * mvm)1890 int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm)
1891 {
1892 int ret, i;
1893
1894 lockdep_assert_wiphy(mvm->hw->wiphy);
1895 lockdep_assert_held(&mvm->mutex);
1896
1897 ret = iwl_trans_start_hw(mvm->trans);
1898 if (ret)
1899 return ret;
1900
1901 ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN);
1902 if (ret) {
1903 IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret);
1904 goto error;
1905 }
1906
1907 ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
1908 if (ret)
1909 goto error;
1910
1911 /* Send phy db control command and then phy db calibration*/
1912 ret = iwl_send_phy_db_data(mvm->phy_db);
1913 if (ret)
1914 goto error;
1915
1916 ret = iwl_send_phy_cfg_cmd(mvm);
1917 if (ret)
1918 goto error;
1919
1920 /* init the fw <-> mac80211 STA mapping */
1921 for (i = 0; i < mvm->fw->ucode_capa.num_stations; i++) {
1922 RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
1923 RCU_INIT_POINTER(mvm->fw_id_to_link_sta[i], NULL);
1924 }
1925
1926 if (!iwl_mvm_has_new_station_api(mvm->fw)) {
1927 /*
1928 * Add auxiliary station for scanning.
1929 * Newer versions of this command implies that the fw uses
1930 * internal aux station for all aux activities that don't
1931 * requires a dedicated data queue.
1932 * In old version the aux station uses mac id like other
1933 * station and not lmac id
1934 */
1935 ret = iwl_mvm_add_aux_sta(mvm, MAC_INDEX_AUX);
1936 if (ret)
1937 goto error;
1938 }
1939
1940 return 0;
1941 error:
1942 iwl_mvm_stop_device(mvm);
1943 return ret;
1944 }
1945
iwl_mvm_rx_mfuart_notif(struct iwl_mvm * mvm,struct iwl_rx_cmd_buffer * rxb)1946 void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm,
1947 struct iwl_rx_cmd_buffer *rxb)
1948 {
1949 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1950 struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data;
1951
1952 IWL_DEBUG_INFO(mvm,
1953 "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n",
1954 le32_to_cpu(mfuart_notif->installed_ver),
1955 le32_to_cpu(mfuart_notif->external_ver),
1956 le32_to_cpu(mfuart_notif->status),
1957 le32_to_cpu(mfuart_notif->duration));
1958
1959 if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif))
1960 IWL_DEBUG_INFO(mvm,
1961 "MFUART: image size: 0x%08x\n",
1962 le32_to_cpu(mfuart_notif->image_size));
1963 }
1964