xref: /linux/arch/powerpc/platforms/44x/iss4xx.c (revision 1ac731c529cd4d6adbce134754b51ff7d822b145)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * PPC476 board specific routines
4  *
5  * Copyright 2010 Torez Smith, IBM Corporation.
6  *
7  * Based on earlier code:
8  *    Matt Porter <mporter@kernel.crashing.org>
9  *    Copyright 2002-2005 MontaVista Software Inc.
10  *
11  *    Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
12  *    Copyright (c) 2003-2005 Zultys Technologies
13  *
14  *    Rewritten and ported to the merged powerpc tree:
15  *    Copyright 2007 David Gibson <dwg@au1.ibm.com>, IBM Corporation.
16  */
17 
18 #include <linux/init.h>
19 #include <linux/of_platform.h>
20 #include <linux/rtc.h>
21 
22 #include <asm/machdep.h>
23 #include <asm/prom.h>
24 #include <asm/udbg.h>
25 #include <asm/time.h>
26 #include <asm/uic.h>
27 #include <asm/ppc4xx.h>
28 #include <asm/mpic.h>
29 #include <asm/mmu.h>
30 
31 static const struct of_device_id iss4xx_of_bus[] __initconst = {
32 	{ .compatible = "ibm,plb4", },
33 	{ .compatible = "ibm,plb6", },
34 	{ .compatible = "ibm,opb", },
35 	{ .compatible = "ibm,ebc", },
36 	{},
37 };
38 
iss4xx_device_probe(void)39 static int __init iss4xx_device_probe(void)
40 {
41 	of_platform_bus_probe(NULL, iss4xx_of_bus, NULL);
42 	of_instantiate_rtc();
43 
44 	return 0;
45 }
46 machine_device_initcall(iss4xx, iss4xx_device_probe);
47 
48 /* We can have either UICs or MPICs */
iss4xx_init_irq(void)49 static void __init iss4xx_init_irq(void)
50 {
51 	struct device_node *np;
52 
53 	/* Find top level interrupt controller */
54 	for_each_node_with_property(np, "interrupt-controller") {
55 		if (!of_property_present(np, "interrupts"))
56 			break;
57 	}
58 	if (np == NULL)
59 		panic("Can't find top level interrupt controller");
60 
61 	/* Check type and do appropriate initialization */
62 	if (of_device_is_compatible(np, "ibm,uic")) {
63 		uic_init_tree();
64 		ppc_md.get_irq = uic_get_irq;
65 #ifdef CONFIG_MPIC
66 	} else if (of_device_is_compatible(np, "chrp,open-pic")) {
67 		/* The MPIC driver will get everything it needs from the
68 		 * device-tree, just pass 0 to all arguments
69 		 */
70 		struct mpic *mpic = mpic_alloc(np, 0, MPIC_NO_RESET, 0, 0, " MPIC     ");
71 		BUG_ON(mpic == NULL);
72 		mpic_init(mpic);
73 		ppc_md.get_irq = mpic_get_irq;
74 #endif
75 	} else
76 		panic("Unrecognized top level interrupt controller");
77 }
78 
79 #ifdef CONFIG_SMP
smp_iss4xx_setup_cpu(int cpu)80 static void smp_iss4xx_setup_cpu(int cpu)
81 {
82 	mpic_setup_this_cpu();
83 }
84 
smp_iss4xx_kick_cpu(int cpu)85 static int smp_iss4xx_kick_cpu(int cpu)
86 {
87 	struct device_node *cpunode = of_get_cpu_node(cpu, NULL);
88 	const u64 *spin_table_addr_prop;
89 	u32 *spin_table;
90 	extern void start_secondary_47x(void);
91 
92 	BUG_ON(cpunode == NULL);
93 
94 	/* Assume spin table. We could test for the enable-method in
95 	 * the device-tree but currently there's little point as it's
96 	 * our only supported method
97 	 */
98 	spin_table_addr_prop = of_get_property(cpunode, "cpu-release-addr",
99 					       NULL);
100 	if (spin_table_addr_prop == NULL) {
101 		pr_err("CPU%d: Can't start, missing cpu-release-addr !\n", cpu);
102 		return -ENOENT;
103 	}
104 
105 	/* Assume it's mapped as part of the linear mapping. This is a bit
106 	 * fishy but will work fine for now
107 	 */
108 	spin_table = (u32 *)__va(*spin_table_addr_prop);
109 	pr_debug("CPU%d: Spin table mapped at %p\n", cpu, spin_table);
110 
111 	spin_table[3] = cpu;
112 	smp_wmb();
113 	spin_table[1] = __pa(start_secondary_47x);
114 	mb();
115 
116 	return 0;
117 }
118 
119 static struct smp_ops_t iss_smp_ops = {
120 	.probe		= smp_mpic_probe,
121 	.message_pass	= smp_mpic_message_pass,
122 	.setup_cpu	= smp_iss4xx_setup_cpu,
123 	.kick_cpu	= smp_iss4xx_kick_cpu,
124 	.give_timebase	= smp_generic_give_timebase,
125 	.take_timebase	= smp_generic_take_timebase,
126 };
127 
iss4xx_smp_init(void)128 static void __init iss4xx_smp_init(void)
129 {
130 	if (mmu_has_feature(MMU_FTR_TYPE_47x))
131 		smp_ops = &iss_smp_ops;
132 }
133 
134 #else /* CONFIG_SMP */
iss4xx_smp_init(void)135 static void __init iss4xx_smp_init(void) { }
136 #endif /* CONFIG_SMP */
137 
iss4xx_setup_arch(void)138 static void __init iss4xx_setup_arch(void)
139 {
140 	iss4xx_smp_init();
141 }
142 
define_machine(iss4xx)143 define_machine(iss4xx) {
144 	.name			= "ISS-4xx",
145 	.compatible		= "ibm,iss-4xx",
146 	.progress		= udbg_progress,
147 	.init_IRQ		= iss4xx_init_irq,
148 	.setup_arch		= iss4xx_setup_arch,
149 	.restart		= ppc4xx_reset_system,
150 };
151