xref: /linux/drivers/gpu/drm/amd/amdgpu/amdgpu_isp.c (revision 2c1ed907520c50326b8f604907a8478b27881a2e)
1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Copyright (C) 2024 Advanced Micro Devices, Inc. All rights reserved.
4  * All Rights Reserved.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the
8  * "Software"), to deal in the Software without restriction, including
9  * without limitation the rights to use, copy, modify, merge, publish,
10  * distribute, sub license, and/or sell copies of the Software, and to
11  * permit persons to whom the Software is furnished to do so, subject to
12  * the following conditions:
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
18  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
19  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20  * USE OR OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * The above copyright notice and this permission notice (including the
23  * next paragraph) shall be included in all copies or substantial portions
24  * of the Software.
25  *
26  */
27 
28 #include <linux/firmware.h>
29 #include <linux/mfd/core.h>
30 
31 #include "amdgpu.h"
32 #include "amdgpu_isp.h"
33 #include "isp_v4_1_0.h"
34 #include "isp_v4_1_1.h"
35 
36 /**
37  * isp_hw_init - start and test isp block
38  *
39  * @ip_block: Pointer to the amdgpu_ip_block for this hw instance.
40  *
41  */
isp_hw_init(struct amdgpu_ip_block * ip_block)42 static int isp_hw_init(struct amdgpu_ip_block *ip_block)
43 {
44 	struct amdgpu_device *adev = ip_block->adev;
45 	struct amdgpu_isp *isp = &adev->isp;
46 
47 	if (isp->funcs->hw_init != NULL)
48 		return isp->funcs->hw_init(isp);
49 
50 	return -ENODEV;
51 }
52 
53 /**
54  * isp_hw_fini - stop the hardware block
55  *
56  * @ip_block: Pointer to the amdgpu_ip_block for this hw instance.
57  *
58  */
isp_hw_fini(struct amdgpu_ip_block * ip_block)59 static int isp_hw_fini(struct amdgpu_ip_block *ip_block)
60 {
61 	struct amdgpu_isp *isp = &ip_block->adev->isp;
62 
63 	if (isp->funcs->hw_fini != NULL)
64 		return isp->funcs->hw_fini(isp);
65 
66 	return -ENODEV;
67 }
68 
isp_load_fw_by_psp(struct amdgpu_device * adev)69 static int isp_load_fw_by_psp(struct amdgpu_device *adev)
70 {
71 	const struct common_firmware_header *hdr;
72 	char ucode_prefix[10];
73 	int r = 0;
74 
75 	/* get isp fw binary name and path */
76 	amdgpu_ucode_ip_version_decode(adev, ISP_HWIP, ucode_prefix,
77 				       sizeof(ucode_prefix));
78 
79 	/* read isp fw */
80 	r = amdgpu_ucode_request(adev, &adev->isp.fw, AMDGPU_UCODE_OPTIONAL,
81 				"amdgpu/%s.bin", ucode_prefix);
82 	if (r) {
83 		amdgpu_ucode_release(&adev->isp.fw);
84 		return r;
85 	}
86 
87 	hdr = (const struct common_firmware_header *)adev->isp.fw->data;
88 
89 	adev->firmware.ucode[AMDGPU_UCODE_ID_ISP].ucode_id =
90 		AMDGPU_UCODE_ID_ISP;
91 	adev->firmware.ucode[AMDGPU_UCODE_ID_ISP].fw = adev->isp.fw;
92 
93 	adev->firmware.fw_size +=
94 		ALIGN(le32_to_cpu(hdr->ucode_size_bytes), PAGE_SIZE);
95 
96 	return r;
97 }
98 
isp_early_init(struct amdgpu_ip_block * ip_block)99 static int isp_early_init(struct amdgpu_ip_block *ip_block)
100 {
101 
102 	struct amdgpu_device *adev = ip_block->adev;
103 	struct amdgpu_isp *isp = &adev->isp;
104 
105 	switch (amdgpu_ip_version(adev, ISP_HWIP, 0)) {
106 	case IP_VERSION(4, 1, 0):
107 		isp_v4_1_0_set_isp_funcs(isp);
108 		break;
109 	case IP_VERSION(4, 1, 1):
110 		isp_v4_1_1_set_isp_funcs(isp);
111 		break;
112 	default:
113 		return -EINVAL;
114 	}
115 
116 	isp->adev = adev;
117 	isp->parent = adev->dev;
118 
119 	if (isp_load_fw_by_psp(adev)) {
120 		DRM_DEBUG_DRIVER("%s: isp fw load failed\n", __func__);
121 		return -ENOENT;
122 	}
123 
124 	return 0;
125 }
126 
isp_is_idle(void * handle)127 static bool isp_is_idle(void *handle)
128 {
129 	return true;
130 }
131 
isp_set_clockgating_state(struct amdgpu_ip_block * ip_block,enum amd_clockgating_state state)132 static int isp_set_clockgating_state(struct amdgpu_ip_block *ip_block,
133 				     enum amd_clockgating_state state)
134 {
135 	return 0;
136 }
137 
isp_set_powergating_state(struct amdgpu_ip_block * ip_block,enum amd_powergating_state state)138 static int isp_set_powergating_state(struct amdgpu_ip_block *ip_block,
139 				     enum amd_powergating_state state)
140 {
141 	return 0;
142 }
143 
144 static const struct amd_ip_funcs isp_ip_funcs = {
145 	.name = "isp_ip",
146 	.early_init = isp_early_init,
147 	.hw_init = isp_hw_init,
148 	.hw_fini = isp_hw_fini,
149 	.is_idle = isp_is_idle,
150 	.set_clockgating_state = isp_set_clockgating_state,
151 	.set_powergating_state = isp_set_powergating_state,
152 };
153 
154 const struct amdgpu_ip_block_version isp_v4_1_0_ip_block = {
155 	.type = AMD_IP_BLOCK_TYPE_ISP,
156 	.major = 4,
157 	.minor = 1,
158 	.rev = 0,
159 	.funcs = &isp_ip_funcs,
160 };
161 
162 const struct amdgpu_ip_block_version isp_v4_1_1_ip_block = {
163 	.type = AMD_IP_BLOCK_TYPE_ISP,
164 	.major = 4,
165 	.minor = 1,
166 	.rev = 1,
167 	.funcs = &isp_ip_funcs,
168 };
169