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Searched defs:isKill (Results 1 – 25 of 33) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsInstrInfo.h138 bool isKill, int FrameIndex, in storeRegToStackSlot()
H A DMips16InstrInfo.cpp108 Register SrcReg, bool isKill, int FI, in storeRegToStack()
H A DMipsSEInstrInfo.cpp216 Register SrcReg, bool isKill, int FI, in storeRegToStack()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DThumb1InstrInfo.cpp116 Register SrcReg, bool isKill, int FI, in storeRegToStackSlot()
H A DThumb1FrameLowering.cpp879 bool isKill = !MRI.isLiveIn(Reg); in pushRegsToStack() local
919 bool isKill = !MRI.isLiveIn(*HiRegToSave); in pushRegsToStack() local
H A DThumb2InstrInfo.cpp166 Register SrcReg, bool isKill, int FI, in storeRegToStackSlot()
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVERegisterInfo.cpp297 bool isKill = MI.getOperand(3).isKill(); in processSTVM() local
377 bool isKill = MI.getOperand(3).isKill(); in processSTVM512() local
H A DVEInstrInfo.cpp461 Register SrcReg, bool isKill, int FI, in storeRegToStackSlot()
/freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430InstrInfo.cpp38 bool isKill, int FrameIdx, const TargetRegisterClass *RC, in storeRegToStackSlot()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrBuilder.h158 unsigned Reg, bool isKill, int Offset) { in addRegOffset()
H A DX86InstrInfo.cpp1162 bool &isKill, MachineOperand &ImplicitOp, in classifyLEAReg()
1469 bool isKill; in convertToThreeAddress() local
1507 bool isKill; in convertToThreeAddress() local
1533 bool isKill; in convertToThreeAddress() local
1577 bool isKill; in convertToThreeAddress() local
1627 bool isKill; in convertToThreeAddress() local
1667 bool isKill; in convertToThreeAddress() local
4722 bool isKill, int FrameIdx, const TargetRegisterClass *RC, in storeRegToStackSlot()
/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaInstrInfo.cpp121 bool isKill, int FrameIdx, const TargetRegisterClass *RC, in storeRegToStackSlot()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachineInstrBundle.cpp220 bool isKill = KilledUseSet.count(Reg); in finalizeBundle() local
H A DTwoAddressInstructionPass.cpp1022 bool isKill = isPlainlyKilled(MO); in rescheduleMIBelowKill() local
1150 bool isKill = isPlainlyKilled(MO); in rescheduleKillAboveMI() local
2015 bool isKill = UseMO.isKill(); in eliminateRegSequence() local
H A DLiveIntervals.cpp1157 bool isKill = SlotIndex::isSameInstr(OldIdx, OldIdxIn->end); in handleMoveDown() local
1301 bool isKill = SlotIndex::isSameInstr(OldIdx, OldIdxIn->end); in handleMoveUp() local
H A DMachineOperand.cpp274 bool isKill, bool isDead, bool isUndef, in ChangeToRegister()
H A DInlineSpiller.cpp1105 void InlineSpiller::insertSpill(Register NewVReg, bool isKill, in insertSpill()
/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRInstrInfo.cpp134 bool isKill, int FrameIndex, const TargetRegisterClass *RC, in storeRegToStackSlot()
/freebsd/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreInstrInfo.cpp360 bool isKill, int FrameIndex, const TargetRegisterClass *RC, in storeRegToStackSlot()
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcInstrInfo.cpp529 Register SrcReg, bool isKill, int FI, in storeRegToStackSlot()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DMachineOperand.h399 bool isKill() const { in isKill() function
H A DLiveInterval.h112 bool isKill() const { in isKill() function
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonSplitDouble.cpp603 bool isKill = Op.isKill(); in createHalfInstr() local
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCInstrInfo.cpp1927 MachineFunction &MF, unsigned SrcReg, bool isKill, int FrameIdx, in StoreRegToStackSlot()
1950 bool isKill, int FrameIdx, const TargetRegisterClass *RC, in storeRegToStackSlotNoUpd()
1970 bool isKill, int FrameIdx, const TargetRegisterClass *RC, in storeRegToStackSlot()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DInstrEmitter.cpp377 bool isKill = Op.hasOneUse() && !isConvergenceCtrlMachineOp(Op) && in AddRegisterOperand() local

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