xref: /linux/kernel/irq/chip.c (revision 7b667acd69e316c2ed1b47e5dcd9d093be4a843f)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
4  * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
5  *
6  * This file contains the core interrupt handling code, for irq-chip based
7  * architectures. Detailed information is available in
8  * Documentation/core-api/genericirq.rst
9  */
10 
11 #include <linux/irq.h>
12 #include <linux/msi.h>
13 #include <linux/module.h>
14 #include <linux/interrupt.h>
15 #include <linux/kernel_stat.h>
16 #include <linux/irqdomain.h>
17 
18 #include <trace/events/irq.h>
19 
20 #include "internals.h"
21 
22 static irqreturn_t bad_chained_irq(int irq, void *dev_id)
23 {
24 	WARN_ONCE(1, "Chained irq %d should not call an action\n", irq);
25 	return IRQ_NONE;
26 }
27 
28 /*
29  * Chained handlers should never call action on their IRQ. This default
30  * action will emit warning if such thing happens.
31  */
32 struct irqaction chained_action = {
33 	.handler = bad_chained_irq,
34 };
35 
36 /**
37  *	irq_set_chip - set the irq chip for an irq
38  *	@irq:	irq number
39  *	@chip:	pointer to irq chip description structure
40  */
41 int irq_set_chip(unsigned int irq, const struct irq_chip *chip)
42 {
43 	unsigned long flags;
44 	struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
45 
46 	if (!desc)
47 		return -EINVAL;
48 
49 	desc->irq_data.chip = (struct irq_chip *)(chip ?: &no_irq_chip);
50 	irq_put_desc_unlock(desc, flags);
51 	/*
52 	 * For !CONFIG_SPARSE_IRQ make the irq show up in
53 	 * allocated_irqs.
54 	 */
55 	irq_mark_irq(irq);
56 	return 0;
57 }
58 EXPORT_SYMBOL(irq_set_chip);
59 
60 /**
61  *	irq_set_irq_type - set the irq trigger type for an irq
62  *	@irq:	irq number
63  *	@type:	IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
64  */
65 int irq_set_irq_type(unsigned int irq, unsigned int type)
66 {
67 	unsigned long flags;
68 	struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
69 	int ret = 0;
70 
71 	if (!desc)
72 		return -EINVAL;
73 
74 	ret = __irq_set_trigger(desc, type);
75 	irq_put_desc_busunlock(desc, flags);
76 	return ret;
77 }
78 EXPORT_SYMBOL(irq_set_irq_type);
79 
80 /**
81  *	irq_set_handler_data - set irq handler data for an irq
82  *	@irq:	Interrupt number
83  *	@data:	Pointer to interrupt specific data
84  *
85  *	Set the hardware irq controller data for an irq
86  */
87 int irq_set_handler_data(unsigned int irq, void *data)
88 {
89 	unsigned long flags;
90 	struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
91 
92 	if (!desc)
93 		return -EINVAL;
94 	desc->irq_common_data.handler_data = data;
95 	irq_put_desc_unlock(desc, flags);
96 	return 0;
97 }
98 EXPORT_SYMBOL(irq_set_handler_data);
99 
100 /**
101  *	irq_set_msi_desc_off - set MSI descriptor data for an irq at offset
102  *	@irq_base:	Interrupt number base
103  *	@irq_offset:	Interrupt number offset
104  *	@entry:		Pointer to MSI descriptor data
105  *
106  *	Set the MSI descriptor entry for an irq at offset
107  */
108 int irq_set_msi_desc_off(unsigned int irq_base, unsigned int irq_offset,
109 			 struct msi_desc *entry)
110 {
111 	unsigned long flags;
112 	struct irq_desc *desc = irq_get_desc_lock(irq_base + irq_offset, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
113 
114 	if (!desc)
115 		return -EINVAL;
116 	desc->irq_common_data.msi_desc = entry;
117 	if (entry && !irq_offset)
118 		entry->irq = irq_base;
119 	irq_put_desc_unlock(desc, flags);
120 	return 0;
121 }
122 
123 /**
124  *	irq_set_msi_desc - set MSI descriptor data for an irq
125  *	@irq:	Interrupt number
126  *	@entry:	Pointer to MSI descriptor data
127  *
128  *	Set the MSI descriptor entry for an irq
129  */
130 int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry)
131 {
132 	return irq_set_msi_desc_off(irq, 0, entry);
133 }
134 
135 /**
136  *	irq_set_chip_data - set irq chip data for an irq
137  *	@irq:	Interrupt number
138  *	@data:	Pointer to chip specific data
139  *
140  *	Set the hardware irq chip data for an irq
141  */
142 int irq_set_chip_data(unsigned int irq, void *data)
143 {
144 	unsigned long flags;
145 	struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
146 
147 	if (!desc)
148 		return -EINVAL;
149 	desc->irq_data.chip_data = data;
150 	irq_put_desc_unlock(desc, flags);
151 	return 0;
152 }
153 EXPORT_SYMBOL(irq_set_chip_data);
154 
155 struct irq_data *irq_get_irq_data(unsigned int irq)
156 {
157 	struct irq_desc *desc = irq_to_desc(irq);
158 
159 	return desc ? &desc->irq_data : NULL;
160 }
161 EXPORT_SYMBOL_GPL(irq_get_irq_data);
162 
163 static void irq_state_clr_disabled(struct irq_desc *desc)
164 {
165 	irqd_clear(&desc->irq_data, IRQD_IRQ_DISABLED);
166 }
167 
168 static void irq_state_clr_masked(struct irq_desc *desc)
169 {
170 	irqd_clear(&desc->irq_data, IRQD_IRQ_MASKED);
171 }
172 
173 static void irq_state_clr_started(struct irq_desc *desc)
174 {
175 	irqd_clear(&desc->irq_data, IRQD_IRQ_STARTED);
176 }
177 
178 static void irq_state_set_started(struct irq_desc *desc)
179 {
180 	irqd_set(&desc->irq_data, IRQD_IRQ_STARTED);
181 }
182 
183 enum {
184 	IRQ_STARTUP_NORMAL,
185 	IRQ_STARTUP_MANAGED,
186 	IRQ_STARTUP_ABORT,
187 };
188 
189 #ifdef CONFIG_SMP
190 static int
191 __irq_startup_managed(struct irq_desc *desc, const struct cpumask *aff,
192 		      bool force)
193 {
194 	struct irq_data *d = irq_desc_get_irq_data(desc);
195 
196 	if (!irqd_affinity_is_managed(d))
197 		return IRQ_STARTUP_NORMAL;
198 
199 	irqd_clr_managed_shutdown(d);
200 
201 	if (!cpumask_intersects(aff, cpu_online_mask)) {
202 		/*
203 		 * Catch code which fiddles with enable_irq() on a managed
204 		 * and potentially shutdown IRQ. Chained interrupt
205 		 * installment or irq auto probing should not happen on
206 		 * managed irqs either.
207 		 */
208 		if (WARN_ON_ONCE(force))
209 			return IRQ_STARTUP_ABORT;
210 		/*
211 		 * The interrupt was requested, but there is no online CPU
212 		 * in it's affinity mask. Put it into managed shutdown
213 		 * state and let the cpu hotplug mechanism start it up once
214 		 * a CPU in the mask becomes available.
215 		 */
216 		return IRQ_STARTUP_ABORT;
217 	}
218 	/*
219 	 * Managed interrupts have reserved resources, so this should not
220 	 * happen.
221 	 */
222 	if (WARN_ON(irq_domain_activate_irq(d, false)))
223 		return IRQ_STARTUP_ABORT;
224 	return IRQ_STARTUP_MANAGED;
225 }
226 #else
227 static __always_inline int
228 __irq_startup_managed(struct irq_desc *desc, const struct cpumask *aff,
229 		      bool force)
230 {
231 	return IRQ_STARTUP_NORMAL;
232 }
233 #endif
234 
235 static void irq_enable(struct irq_desc *desc)
236 {
237 	if (!irqd_irq_disabled(&desc->irq_data)) {
238 		unmask_irq(desc);
239 	} else {
240 		irq_state_clr_disabled(desc);
241 		if (desc->irq_data.chip->irq_enable) {
242 			desc->irq_data.chip->irq_enable(&desc->irq_data);
243 			irq_state_clr_masked(desc);
244 		} else {
245 			unmask_irq(desc);
246 		}
247 	}
248 }
249 
250 static int __irq_startup(struct irq_desc *desc)
251 {
252 	struct irq_data *d = irq_desc_get_irq_data(desc);
253 	int ret = 0;
254 
255 	/* Warn if this interrupt is not activated but try nevertheless */
256 	WARN_ON_ONCE(!irqd_is_activated(d));
257 
258 	if (d->chip->irq_startup) {
259 		ret = d->chip->irq_startup(d);
260 		irq_state_clr_disabled(desc);
261 		irq_state_clr_masked(desc);
262 	} else {
263 		irq_enable(desc);
264 	}
265 	irq_state_set_started(desc);
266 	return ret;
267 }
268 
269 int irq_startup(struct irq_desc *desc, bool resend, bool force)
270 {
271 	struct irq_data *d = irq_desc_get_irq_data(desc);
272 	const struct cpumask *aff = irq_data_get_affinity_mask(d);
273 	int ret = 0;
274 
275 	desc->depth = 0;
276 
277 	if (irqd_is_started(d)) {
278 		irq_enable(desc);
279 	} else {
280 		switch (__irq_startup_managed(desc, aff, force)) {
281 		case IRQ_STARTUP_NORMAL:
282 			if (d->chip->flags & IRQCHIP_AFFINITY_PRE_STARTUP)
283 				irq_setup_affinity(desc);
284 			ret = __irq_startup(desc);
285 			if (!(d->chip->flags & IRQCHIP_AFFINITY_PRE_STARTUP))
286 				irq_setup_affinity(desc);
287 			break;
288 		case IRQ_STARTUP_MANAGED:
289 			irq_do_set_affinity(d, aff, false);
290 			ret = __irq_startup(desc);
291 			break;
292 		case IRQ_STARTUP_ABORT:
293 			irqd_set_managed_shutdown(d);
294 			return 0;
295 		}
296 	}
297 	if (resend)
298 		check_irq_resend(desc, false);
299 
300 	return ret;
301 }
302 
303 int irq_activate(struct irq_desc *desc)
304 {
305 	struct irq_data *d = irq_desc_get_irq_data(desc);
306 
307 	if (!irqd_affinity_is_managed(d))
308 		return irq_domain_activate_irq(d, false);
309 	return 0;
310 }
311 
312 int irq_activate_and_startup(struct irq_desc *desc, bool resend)
313 {
314 	if (WARN_ON(irq_activate(desc)))
315 		return 0;
316 	return irq_startup(desc, resend, IRQ_START_FORCE);
317 }
318 
319 static void __irq_disable(struct irq_desc *desc, bool mask);
320 
321 void irq_shutdown(struct irq_desc *desc)
322 {
323 	if (irqd_is_started(&desc->irq_data)) {
324 		clear_irq_resend(desc);
325 		desc->depth = 1;
326 		if (desc->irq_data.chip->irq_shutdown) {
327 			desc->irq_data.chip->irq_shutdown(&desc->irq_data);
328 			irq_state_set_disabled(desc);
329 			irq_state_set_masked(desc);
330 		} else {
331 			__irq_disable(desc, true);
332 		}
333 		irq_state_clr_started(desc);
334 	}
335 }
336 
337 
338 void irq_shutdown_and_deactivate(struct irq_desc *desc)
339 {
340 	irq_shutdown(desc);
341 	/*
342 	 * This must be called even if the interrupt was never started up,
343 	 * because the activation can happen before the interrupt is
344 	 * available for request/startup. It has it's own state tracking so
345 	 * it's safe to call it unconditionally.
346 	 */
347 	irq_domain_deactivate_irq(&desc->irq_data);
348 }
349 
350 static void __irq_disable(struct irq_desc *desc, bool mask)
351 {
352 	if (irqd_irq_disabled(&desc->irq_data)) {
353 		if (mask)
354 			mask_irq(desc);
355 	} else {
356 		irq_state_set_disabled(desc);
357 		if (desc->irq_data.chip->irq_disable) {
358 			desc->irq_data.chip->irq_disable(&desc->irq_data);
359 			irq_state_set_masked(desc);
360 		} else if (mask) {
361 			mask_irq(desc);
362 		}
363 	}
364 }
365 
366 /**
367  * irq_disable - Mark interrupt disabled
368  * @desc:	irq descriptor which should be disabled
369  *
370  * If the chip does not implement the irq_disable callback, we
371  * use a lazy disable approach. That means we mark the interrupt
372  * disabled, but leave the hardware unmasked. That's an
373  * optimization because we avoid the hardware access for the
374  * common case where no interrupt happens after we marked it
375  * disabled. If an interrupt happens, then the interrupt flow
376  * handler masks the line at the hardware level and marks it
377  * pending.
378  *
379  * If the interrupt chip does not implement the irq_disable callback,
380  * a driver can disable the lazy approach for a particular irq line by
381  * calling 'irq_set_status_flags(irq, IRQ_DISABLE_UNLAZY)'. This can
382  * be used for devices which cannot disable the interrupt at the
383  * device level under certain circumstances and have to use
384  * disable_irq[_nosync] instead.
385  */
386 void irq_disable(struct irq_desc *desc)
387 {
388 	__irq_disable(desc, irq_settings_disable_unlazy(desc));
389 }
390 
391 void irq_percpu_enable(struct irq_desc *desc, unsigned int cpu)
392 {
393 	if (desc->irq_data.chip->irq_enable)
394 		desc->irq_data.chip->irq_enable(&desc->irq_data);
395 	else
396 		desc->irq_data.chip->irq_unmask(&desc->irq_data);
397 	cpumask_set_cpu(cpu, desc->percpu_enabled);
398 }
399 
400 void irq_percpu_disable(struct irq_desc *desc, unsigned int cpu)
401 {
402 	if (desc->irq_data.chip->irq_disable)
403 		desc->irq_data.chip->irq_disable(&desc->irq_data);
404 	else
405 		desc->irq_data.chip->irq_mask(&desc->irq_data);
406 	cpumask_clear_cpu(cpu, desc->percpu_enabled);
407 }
408 
409 static inline void mask_ack_irq(struct irq_desc *desc)
410 {
411 	if (desc->irq_data.chip->irq_mask_ack) {
412 		desc->irq_data.chip->irq_mask_ack(&desc->irq_data);
413 		irq_state_set_masked(desc);
414 	} else {
415 		mask_irq(desc);
416 		if (desc->irq_data.chip->irq_ack)
417 			desc->irq_data.chip->irq_ack(&desc->irq_data);
418 	}
419 }
420 
421 void mask_irq(struct irq_desc *desc)
422 {
423 	if (irqd_irq_masked(&desc->irq_data))
424 		return;
425 
426 	if (desc->irq_data.chip->irq_mask) {
427 		desc->irq_data.chip->irq_mask(&desc->irq_data);
428 		irq_state_set_masked(desc);
429 	}
430 }
431 
432 void unmask_irq(struct irq_desc *desc)
433 {
434 	if (!irqd_irq_masked(&desc->irq_data))
435 		return;
436 
437 	if (desc->irq_data.chip->irq_unmask) {
438 		desc->irq_data.chip->irq_unmask(&desc->irq_data);
439 		irq_state_clr_masked(desc);
440 	}
441 }
442 
443 void unmask_threaded_irq(struct irq_desc *desc)
444 {
445 	struct irq_chip *chip = desc->irq_data.chip;
446 
447 	if (chip->flags & IRQCHIP_EOI_THREADED)
448 		chip->irq_eoi(&desc->irq_data);
449 
450 	unmask_irq(desc);
451 }
452 
453 /*
454  *	handle_nested_irq - Handle a nested irq from a irq thread
455  *	@irq:	the interrupt number
456  *
457  *	Handle interrupts which are nested into a threaded interrupt
458  *	handler. The handler function is called inside the calling
459  *	threads context.
460  */
461 void handle_nested_irq(unsigned int irq)
462 {
463 	struct irq_desc *desc = irq_to_desc(irq);
464 	struct irqaction *action;
465 	irqreturn_t action_ret;
466 
467 	might_sleep();
468 
469 	raw_spin_lock_irq(&desc->lock);
470 
471 	desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
472 
473 	action = desc->action;
474 	if (unlikely(!action || irqd_irq_disabled(&desc->irq_data))) {
475 		desc->istate |= IRQS_PENDING;
476 		raw_spin_unlock_irq(&desc->lock);
477 		return;
478 	}
479 
480 	kstat_incr_irqs_this_cpu(desc);
481 	atomic_inc(&desc->threads_active);
482 	raw_spin_unlock_irq(&desc->lock);
483 
484 	action_ret = IRQ_NONE;
485 	for_each_action_of_desc(desc, action)
486 		action_ret |= action->thread_fn(action->irq, action->dev_id);
487 
488 	if (!irq_settings_no_debug(desc))
489 		note_interrupt(desc, action_ret);
490 
491 	wake_threads_waitq(desc);
492 }
493 EXPORT_SYMBOL_GPL(handle_nested_irq);
494 
495 static bool irq_check_poll(struct irq_desc *desc)
496 {
497 	if (!(desc->istate & IRQS_POLL_INPROGRESS))
498 		return false;
499 	return irq_wait_for_poll(desc);
500 }
501 
502 static bool irq_may_run(struct irq_desc *desc)
503 {
504 	unsigned int mask = IRQD_IRQ_INPROGRESS | IRQD_WAKEUP_ARMED;
505 
506 	/*
507 	 * If the interrupt is not in progress and is not an armed
508 	 * wakeup interrupt, proceed.
509 	 */
510 	if (!irqd_has_set(&desc->irq_data, mask))
511 		return true;
512 
513 	/*
514 	 * If the interrupt is an armed wakeup source, mark it pending
515 	 * and suspended, disable it and notify the pm core about the
516 	 * event.
517 	 */
518 	if (irq_pm_check_wakeup(desc))
519 		return false;
520 
521 	/*
522 	 * Handle a potential concurrent poll on a different core.
523 	 */
524 	return irq_check_poll(desc);
525 }
526 
527 /**
528  *	handle_simple_irq - Simple and software-decoded IRQs.
529  *	@desc:	the interrupt description structure for this irq
530  *
531  *	Simple interrupts are either sent from a demultiplexing interrupt
532  *	handler or come from hardware, where no interrupt hardware control
533  *	is necessary.
534  *
535  *	Note: The caller is expected to handle the ack, clear, mask and
536  *	unmask issues if necessary.
537  */
538 void handle_simple_irq(struct irq_desc *desc)
539 {
540 	raw_spin_lock(&desc->lock);
541 
542 	if (!irq_may_run(desc))
543 		goto out_unlock;
544 
545 	desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
546 
547 	if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
548 		desc->istate |= IRQS_PENDING;
549 		goto out_unlock;
550 	}
551 
552 	kstat_incr_irqs_this_cpu(desc);
553 	handle_irq_event(desc);
554 
555 out_unlock:
556 	raw_spin_unlock(&desc->lock);
557 }
558 EXPORT_SYMBOL_GPL(handle_simple_irq);
559 
560 /**
561  *	handle_untracked_irq - Simple and software-decoded IRQs.
562  *	@desc:	the interrupt description structure for this irq
563  *
564  *	Untracked interrupts are sent from a demultiplexing interrupt
565  *	handler when the demultiplexer does not know which device it its
566  *	multiplexed irq domain generated the interrupt. IRQ's handled
567  *	through here are not subjected to stats tracking, randomness, or
568  *	spurious interrupt detection.
569  *
570  *	Note: Like handle_simple_irq, the caller is expected to handle
571  *	the ack, clear, mask and unmask issues if necessary.
572  */
573 void handle_untracked_irq(struct irq_desc *desc)
574 {
575 	raw_spin_lock(&desc->lock);
576 
577 	if (!irq_may_run(desc))
578 		goto out_unlock;
579 
580 	desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
581 
582 	if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
583 		desc->istate |= IRQS_PENDING;
584 		goto out_unlock;
585 	}
586 
587 	desc->istate &= ~IRQS_PENDING;
588 	irqd_set(&desc->irq_data, IRQD_IRQ_INPROGRESS);
589 	raw_spin_unlock(&desc->lock);
590 
591 	__handle_irq_event_percpu(desc);
592 
593 	raw_spin_lock(&desc->lock);
594 	irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
595 
596 out_unlock:
597 	raw_spin_unlock(&desc->lock);
598 }
599 EXPORT_SYMBOL_GPL(handle_untracked_irq);
600 
601 /*
602  * Called unconditionally from handle_level_irq() and only for oneshot
603  * interrupts from handle_fasteoi_irq()
604  */
605 static void cond_unmask_irq(struct irq_desc *desc)
606 {
607 	/*
608 	 * We need to unmask in the following cases:
609 	 * - Standard level irq (IRQF_ONESHOT is not set)
610 	 * - Oneshot irq which did not wake the thread (caused by a
611 	 *   spurious interrupt or a primary handler handling it
612 	 *   completely).
613 	 */
614 	if (!irqd_irq_disabled(&desc->irq_data) &&
615 	    irqd_irq_masked(&desc->irq_data) && !desc->threads_oneshot)
616 		unmask_irq(desc);
617 }
618 
619 /**
620  *	handle_level_irq - Level type irq handler
621  *	@desc:	the interrupt description structure for this irq
622  *
623  *	Level type interrupts are active as long as the hardware line has
624  *	the active level. This may require to mask the interrupt and unmask
625  *	it after the associated handler has acknowledged the device, so the
626  *	interrupt line is back to inactive.
627  */
628 void handle_level_irq(struct irq_desc *desc)
629 {
630 	raw_spin_lock(&desc->lock);
631 	mask_ack_irq(desc);
632 
633 	if (!irq_may_run(desc))
634 		goto out_unlock;
635 
636 	desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
637 
638 	/*
639 	 * If its disabled or no action available
640 	 * keep it masked and get out of here
641 	 */
642 	if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
643 		desc->istate |= IRQS_PENDING;
644 		goto out_unlock;
645 	}
646 
647 	kstat_incr_irqs_this_cpu(desc);
648 	handle_irq_event(desc);
649 
650 	cond_unmask_irq(desc);
651 
652 out_unlock:
653 	raw_spin_unlock(&desc->lock);
654 }
655 EXPORT_SYMBOL_GPL(handle_level_irq);
656 
657 static void cond_unmask_eoi_irq(struct irq_desc *desc, struct irq_chip *chip)
658 {
659 	if (!(desc->istate & IRQS_ONESHOT)) {
660 		chip->irq_eoi(&desc->irq_data);
661 		return;
662 	}
663 	/*
664 	 * We need to unmask in the following cases:
665 	 * - Oneshot irq which did not wake the thread (caused by a
666 	 *   spurious interrupt or a primary handler handling it
667 	 *   completely).
668 	 */
669 	if (!irqd_irq_disabled(&desc->irq_data) &&
670 	    irqd_irq_masked(&desc->irq_data) && !desc->threads_oneshot) {
671 		chip->irq_eoi(&desc->irq_data);
672 		unmask_irq(desc);
673 	} else if (!(chip->flags & IRQCHIP_EOI_THREADED)) {
674 		chip->irq_eoi(&desc->irq_data);
675 	}
676 }
677 
678 /**
679  *	handle_fasteoi_irq - irq handler for transparent controllers
680  *	@desc:	the interrupt description structure for this irq
681  *
682  *	Only a single callback will be issued to the chip: an ->eoi()
683  *	call when the interrupt has been serviced. This enables support
684  *	for modern forms of interrupt handlers, which handle the flow
685  *	details in hardware, transparently.
686  */
687 void handle_fasteoi_irq(struct irq_desc *desc)
688 {
689 	struct irq_chip *chip = desc->irq_data.chip;
690 
691 	raw_spin_lock(&desc->lock);
692 
693 	/*
694 	 * When an affinity change races with IRQ handling, the next interrupt
695 	 * can arrive on the new CPU before the original CPU has completed
696 	 * handling the previous one - it may need to be resent.
697 	 */
698 	if (!irq_may_run(desc)) {
699 		if (irqd_needs_resend_when_in_progress(&desc->irq_data))
700 			desc->istate |= IRQS_PENDING;
701 		goto out;
702 	}
703 
704 	desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
705 
706 	/*
707 	 * If its disabled or no action available
708 	 * then mask it and get out of here:
709 	 */
710 	if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
711 		desc->istate |= IRQS_PENDING;
712 		mask_irq(desc);
713 		goto out;
714 	}
715 
716 	kstat_incr_irqs_this_cpu(desc);
717 	if (desc->istate & IRQS_ONESHOT)
718 		mask_irq(desc);
719 
720 	handle_irq_event(desc);
721 
722 	cond_unmask_eoi_irq(desc, chip);
723 
724 	/*
725 	 * When the race described above happens this will resend the interrupt.
726 	 */
727 	if (unlikely(desc->istate & IRQS_PENDING))
728 		check_irq_resend(desc, false);
729 
730 	raw_spin_unlock(&desc->lock);
731 	return;
732 out:
733 	if (!(chip->flags & IRQCHIP_EOI_IF_HANDLED))
734 		chip->irq_eoi(&desc->irq_data);
735 	raw_spin_unlock(&desc->lock);
736 }
737 EXPORT_SYMBOL_GPL(handle_fasteoi_irq);
738 
739 /**
740  *	handle_fasteoi_nmi - irq handler for NMI interrupt lines
741  *	@desc:	the interrupt description structure for this irq
742  *
743  *	A simple NMI-safe handler, considering the restrictions
744  *	from request_nmi.
745  *
746  *	Only a single callback will be issued to the chip: an ->eoi()
747  *	call when the interrupt has been serviced. This enables support
748  *	for modern forms of interrupt handlers, which handle the flow
749  *	details in hardware, transparently.
750  */
751 void handle_fasteoi_nmi(struct irq_desc *desc)
752 {
753 	struct irq_chip *chip = irq_desc_get_chip(desc);
754 	struct irqaction *action = desc->action;
755 	unsigned int irq = irq_desc_get_irq(desc);
756 	irqreturn_t res;
757 
758 	__kstat_incr_irqs_this_cpu(desc);
759 
760 	trace_irq_handler_entry(irq, action);
761 	/*
762 	 * NMIs cannot be shared, there is only one action.
763 	 */
764 	res = action->handler(irq, action->dev_id);
765 	trace_irq_handler_exit(irq, action, res);
766 
767 	if (chip->irq_eoi)
768 		chip->irq_eoi(&desc->irq_data);
769 }
770 EXPORT_SYMBOL_GPL(handle_fasteoi_nmi);
771 
772 /**
773  *	handle_edge_irq - edge type IRQ handler
774  *	@desc:	the interrupt description structure for this irq
775  *
776  *	Interrupt occurs on the falling and/or rising edge of a hardware
777  *	signal. The occurrence is latched into the irq controller hardware
778  *	and must be acked in order to be reenabled. After the ack another
779  *	interrupt can happen on the same source even before the first one
780  *	is handled by the associated event handler. If this happens it
781  *	might be necessary to disable (mask) the interrupt depending on the
782  *	controller hardware. This requires to reenable the interrupt inside
783  *	of the loop which handles the interrupts which have arrived while
784  *	the handler was running. If all pending interrupts are handled, the
785  *	loop is left.
786  */
787 void handle_edge_irq(struct irq_desc *desc)
788 {
789 	raw_spin_lock(&desc->lock);
790 
791 	desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
792 
793 	if (!irq_may_run(desc)) {
794 		desc->istate |= IRQS_PENDING;
795 		mask_ack_irq(desc);
796 		goto out_unlock;
797 	}
798 
799 	/*
800 	 * If its disabled or no action available then mask it and get
801 	 * out of here.
802 	 */
803 	if (irqd_irq_disabled(&desc->irq_data) || !desc->action) {
804 		desc->istate |= IRQS_PENDING;
805 		mask_ack_irq(desc);
806 		goto out_unlock;
807 	}
808 
809 	kstat_incr_irqs_this_cpu(desc);
810 
811 	/* Start handling the irq */
812 	desc->irq_data.chip->irq_ack(&desc->irq_data);
813 
814 	do {
815 		if (unlikely(!desc->action)) {
816 			mask_irq(desc);
817 			goto out_unlock;
818 		}
819 
820 		/*
821 		 * When another irq arrived while we were handling
822 		 * one, we could have masked the irq.
823 		 * Reenable it, if it was not disabled in meantime.
824 		 */
825 		if (unlikely(desc->istate & IRQS_PENDING)) {
826 			if (!irqd_irq_disabled(&desc->irq_data) &&
827 			    irqd_irq_masked(&desc->irq_data))
828 				unmask_irq(desc);
829 		}
830 
831 		handle_irq_event(desc);
832 
833 	} while ((desc->istate & IRQS_PENDING) &&
834 		 !irqd_irq_disabled(&desc->irq_data));
835 
836 out_unlock:
837 	raw_spin_unlock(&desc->lock);
838 }
839 EXPORT_SYMBOL(handle_edge_irq);
840 
841 /**
842  *	handle_percpu_irq - Per CPU local irq handler
843  *	@desc:	the interrupt description structure for this irq
844  *
845  *	Per CPU interrupts on SMP machines without locking requirements
846  */
847 void handle_percpu_irq(struct irq_desc *desc)
848 {
849 	struct irq_chip *chip = irq_desc_get_chip(desc);
850 
851 	/*
852 	 * PER CPU interrupts are not serialized. Do not touch
853 	 * desc->tot_count.
854 	 */
855 	__kstat_incr_irqs_this_cpu(desc);
856 
857 	if (chip->irq_ack)
858 		chip->irq_ack(&desc->irq_data);
859 
860 	handle_irq_event_percpu(desc);
861 
862 	if (chip->irq_eoi)
863 		chip->irq_eoi(&desc->irq_data);
864 }
865 
866 /**
867  * handle_percpu_devid_irq - Per CPU local irq handler with per cpu dev ids
868  * @desc:	the interrupt description structure for this irq
869  *
870  * Per CPU interrupts on SMP machines without locking requirements. Same as
871  * handle_percpu_irq() above but with the following extras:
872  *
873  * action->percpu_dev_id is a pointer to percpu variables which
874  * contain the real device id for the cpu on which this handler is
875  * called
876  */
877 void handle_percpu_devid_irq(struct irq_desc *desc)
878 {
879 	struct irq_chip *chip = irq_desc_get_chip(desc);
880 	struct irqaction *action = desc->action;
881 	unsigned int irq = irq_desc_get_irq(desc);
882 	irqreturn_t res;
883 
884 	/*
885 	 * PER CPU interrupts are not serialized. Do not touch
886 	 * desc->tot_count.
887 	 */
888 	__kstat_incr_irqs_this_cpu(desc);
889 
890 	if (chip->irq_ack)
891 		chip->irq_ack(&desc->irq_data);
892 
893 	if (likely(action)) {
894 		trace_irq_handler_entry(irq, action);
895 		res = action->handler(irq, raw_cpu_ptr(action->percpu_dev_id));
896 		trace_irq_handler_exit(irq, action, res);
897 	} else {
898 		unsigned int cpu = smp_processor_id();
899 		bool enabled = cpumask_test_cpu(cpu, desc->percpu_enabled);
900 
901 		if (enabled)
902 			irq_percpu_disable(desc, cpu);
903 
904 		pr_err_once("Spurious%s percpu IRQ%u on CPU%u\n",
905 			    enabled ? " and unmasked" : "", irq, cpu);
906 	}
907 
908 	if (chip->irq_eoi)
909 		chip->irq_eoi(&desc->irq_data);
910 }
911 
912 /**
913  * handle_percpu_devid_fasteoi_nmi - Per CPU local NMI handler with per cpu
914  *				     dev ids
915  * @desc:	the interrupt description structure for this irq
916  *
917  * Similar to handle_fasteoi_nmi, but handling the dev_id cookie
918  * as a percpu pointer.
919  */
920 void handle_percpu_devid_fasteoi_nmi(struct irq_desc *desc)
921 {
922 	struct irq_chip *chip = irq_desc_get_chip(desc);
923 	struct irqaction *action = desc->action;
924 	unsigned int irq = irq_desc_get_irq(desc);
925 	irqreturn_t res;
926 
927 	__kstat_incr_irqs_this_cpu(desc);
928 
929 	trace_irq_handler_entry(irq, action);
930 	res = action->handler(irq, raw_cpu_ptr(action->percpu_dev_id));
931 	trace_irq_handler_exit(irq, action, res);
932 
933 	if (chip->irq_eoi)
934 		chip->irq_eoi(&desc->irq_data);
935 }
936 
937 static void
938 __irq_do_set_handler(struct irq_desc *desc, irq_flow_handler_t handle,
939 		     int is_chained, const char *name)
940 {
941 	if (!handle) {
942 		handle = handle_bad_irq;
943 	} else {
944 		struct irq_data *irq_data = &desc->irq_data;
945 #ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
946 		/*
947 		 * With hierarchical domains we might run into a
948 		 * situation where the outermost chip is not yet set
949 		 * up, but the inner chips are there.  Instead of
950 		 * bailing we install the handler, but obviously we
951 		 * cannot enable/startup the interrupt at this point.
952 		 */
953 		while (irq_data) {
954 			if (irq_data->chip != &no_irq_chip)
955 				break;
956 			/*
957 			 * Bail out if the outer chip is not set up
958 			 * and the interrupt supposed to be started
959 			 * right away.
960 			 */
961 			if (WARN_ON(is_chained))
962 				return;
963 			/* Try the parent */
964 			irq_data = irq_data->parent_data;
965 		}
966 #endif
967 		if (WARN_ON(!irq_data || irq_data->chip == &no_irq_chip))
968 			return;
969 	}
970 
971 	/* Uninstall? */
972 	if (handle == handle_bad_irq) {
973 		if (desc->irq_data.chip != &no_irq_chip)
974 			mask_ack_irq(desc);
975 		irq_state_set_disabled(desc);
976 		if (is_chained) {
977 			desc->action = NULL;
978 			WARN_ON(irq_chip_pm_put(irq_desc_get_irq_data(desc)));
979 		}
980 		desc->depth = 1;
981 	}
982 	desc->handle_irq = handle;
983 	desc->name = name;
984 
985 	if (handle != handle_bad_irq && is_chained) {
986 		unsigned int type = irqd_get_trigger_type(&desc->irq_data);
987 
988 		/*
989 		 * We're about to start this interrupt immediately,
990 		 * hence the need to set the trigger configuration.
991 		 * But the .set_type callback may have overridden the
992 		 * flow handler, ignoring that we're dealing with a
993 		 * chained interrupt. Reset it immediately because we
994 		 * do know better.
995 		 */
996 		if (type != IRQ_TYPE_NONE) {
997 			__irq_set_trigger(desc, type);
998 			desc->handle_irq = handle;
999 		}
1000 
1001 		irq_settings_set_noprobe(desc);
1002 		irq_settings_set_norequest(desc);
1003 		irq_settings_set_nothread(desc);
1004 		desc->action = &chained_action;
1005 		WARN_ON(irq_chip_pm_get(irq_desc_get_irq_data(desc)));
1006 		irq_activate_and_startup(desc, IRQ_RESEND);
1007 	}
1008 }
1009 
1010 void
1011 __irq_set_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
1012 		  const char *name)
1013 {
1014 	unsigned long flags;
1015 	struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, 0);
1016 
1017 	if (!desc)
1018 		return;
1019 
1020 	__irq_do_set_handler(desc, handle, is_chained, name);
1021 	irq_put_desc_busunlock(desc, flags);
1022 }
1023 EXPORT_SYMBOL_GPL(__irq_set_handler);
1024 
1025 void
1026 irq_set_chained_handler_and_data(unsigned int irq, irq_flow_handler_t handle,
1027 				 void *data)
1028 {
1029 	unsigned long flags;
1030 	struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, 0);
1031 
1032 	if (!desc)
1033 		return;
1034 
1035 	desc->irq_common_data.handler_data = data;
1036 	__irq_do_set_handler(desc, handle, 1, NULL);
1037 
1038 	irq_put_desc_busunlock(desc, flags);
1039 }
1040 EXPORT_SYMBOL_GPL(irq_set_chained_handler_and_data);
1041 
1042 void
1043 irq_set_chip_and_handler_name(unsigned int irq, const struct irq_chip *chip,
1044 			      irq_flow_handler_t handle, const char *name)
1045 {
1046 	irq_set_chip(irq, chip);
1047 	__irq_set_handler(irq, handle, 0, name);
1048 }
1049 EXPORT_SYMBOL_GPL(irq_set_chip_and_handler_name);
1050 
1051 void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set)
1052 {
1053 	unsigned long flags, trigger, tmp;
1054 	struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
1055 
1056 	if (!desc)
1057 		return;
1058 
1059 	/*
1060 	 * Warn when a driver sets the no autoenable flag on an already
1061 	 * active interrupt.
1062 	 */
1063 	WARN_ON_ONCE(!desc->depth && (set & _IRQ_NOAUTOEN));
1064 
1065 	irq_settings_clr_and_set(desc, clr, set);
1066 
1067 	trigger = irqd_get_trigger_type(&desc->irq_data);
1068 
1069 	irqd_clear(&desc->irq_data, IRQD_NO_BALANCING | IRQD_PER_CPU |
1070 		   IRQD_TRIGGER_MASK | IRQD_LEVEL);
1071 	if (irq_settings_has_no_balance_set(desc))
1072 		irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
1073 	if (irq_settings_is_per_cpu(desc))
1074 		irqd_set(&desc->irq_data, IRQD_PER_CPU);
1075 	if (irq_settings_is_level(desc))
1076 		irqd_set(&desc->irq_data, IRQD_LEVEL);
1077 
1078 	tmp = irq_settings_get_trigger_mask(desc);
1079 	if (tmp != IRQ_TYPE_NONE)
1080 		trigger = tmp;
1081 
1082 	irqd_set(&desc->irq_data, trigger);
1083 
1084 	irq_put_desc_unlock(desc, flags);
1085 }
1086 EXPORT_SYMBOL_GPL(irq_modify_status);
1087 
1088 #ifdef CONFIG_DEPRECATED_IRQ_CPU_ONOFFLINE
1089 /**
1090  *	irq_cpu_online - Invoke all irq_cpu_online functions.
1091  *
1092  *	Iterate through all irqs and invoke the chip.irq_cpu_online()
1093  *	for each.
1094  */
1095 void irq_cpu_online(void)
1096 {
1097 	struct irq_desc *desc;
1098 	struct irq_chip *chip;
1099 	unsigned long flags;
1100 	unsigned int irq;
1101 
1102 	for_each_active_irq(irq) {
1103 		desc = irq_to_desc(irq);
1104 		if (!desc)
1105 			continue;
1106 
1107 		raw_spin_lock_irqsave(&desc->lock, flags);
1108 
1109 		chip = irq_data_get_irq_chip(&desc->irq_data);
1110 		if (chip && chip->irq_cpu_online &&
1111 		    (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
1112 		     !irqd_irq_disabled(&desc->irq_data)))
1113 			chip->irq_cpu_online(&desc->irq_data);
1114 
1115 		raw_spin_unlock_irqrestore(&desc->lock, flags);
1116 	}
1117 }
1118 
1119 /**
1120  *	irq_cpu_offline - Invoke all irq_cpu_offline functions.
1121  *
1122  *	Iterate through all irqs and invoke the chip.irq_cpu_offline()
1123  *	for each.
1124  */
1125 void irq_cpu_offline(void)
1126 {
1127 	struct irq_desc *desc;
1128 	struct irq_chip *chip;
1129 	unsigned long flags;
1130 	unsigned int irq;
1131 
1132 	for_each_active_irq(irq) {
1133 		desc = irq_to_desc(irq);
1134 		if (!desc)
1135 			continue;
1136 
1137 		raw_spin_lock_irqsave(&desc->lock, flags);
1138 
1139 		chip = irq_data_get_irq_chip(&desc->irq_data);
1140 		if (chip && chip->irq_cpu_offline &&
1141 		    (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
1142 		     !irqd_irq_disabled(&desc->irq_data)))
1143 			chip->irq_cpu_offline(&desc->irq_data);
1144 
1145 		raw_spin_unlock_irqrestore(&desc->lock, flags);
1146 	}
1147 }
1148 #endif
1149 
1150 #ifdef	CONFIG_IRQ_DOMAIN_HIERARCHY
1151 
1152 #ifdef CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS
1153 /**
1154  *	handle_fasteoi_ack_irq - irq handler for edge hierarchy
1155  *	stacked on transparent controllers
1156  *
1157  *	@desc:	the interrupt description structure for this irq
1158  *
1159  *	Like handle_fasteoi_irq(), but for use with hierarchy where
1160  *	the irq_chip also needs to have its ->irq_ack() function
1161  *	called.
1162  */
1163 void handle_fasteoi_ack_irq(struct irq_desc *desc)
1164 {
1165 	struct irq_chip *chip = desc->irq_data.chip;
1166 
1167 	raw_spin_lock(&desc->lock);
1168 
1169 	if (!irq_may_run(desc))
1170 		goto out;
1171 
1172 	desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
1173 
1174 	/*
1175 	 * If its disabled or no action available
1176 	 * then mask it and get out of here:
1177 	 */
1178 	if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
1179 		desc->istate |= IRQS_PENDING;
1180 		mask_irq(desc);
1181 		goto out;
1182 	}
1183 
1184 	kstat_incr_irqs_this_cpu(desc);
1185 	if (desc->istate & IRQS_ONESHOT)
1186 		mask_irq(desc);
1187 
1188 	/* Start handling the irq */
1189 	desc->irq_data.chip->irq_ack(&desc->irq_data);
1190 
1191 	handle_irq_event(desc);
1192 
1193 	cond_unmask_eoi_irq(desc, chip);
1194 
1195 	raw_spin_unlock(&desc->lock);
1196 	return;
1197 out:
1198 	if (!(chip->flags & IRQCHIP_EOI_IF_HANDLED))
1199 		chip->irq_eoi(&desc->irq_data);
1200 	raw_spin_unlock(&desc->lock);
1201 }
1202 EXPORT_SYMBOL_GPL(handle_fasteoi_ack_irq);
1203 
1204 /**
1205  *	handle_fasteoi_mask_irq - irq handler for level hierarchy
1206  *	stacked on transparent controllers
1207  *
1208  *	@desc:	the interrupt description structure for this irq
1209  *
1210  *	Like handle_fasteoi_irq(), but for use with hierarchy where
1211  *	the irq_chip also needs to have its ->irq_mask_ack() function
1212  *	called.
1213  */
1214 void handle_fasteoi_mask_irq(struct irq_desc *desc)
1215 {
1216 	struct irq_chip *chip = desc->irq_data.chip;
1217 
1218 	raw_spin_lock(&desc->lock);
1219 	mask_ack_irq(desc);
1220 
1221 	if (!irq_may_run(desc))
1222 		goto out;
1223 
1224 	desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
1225 
1226 	/*
1227 	 * If its disabled or no action available
1228 	 * then mask it and get out of here:
1229 	 */
1230 	if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
1231 		desc->istate |= IRQS_PENDING;
1232 		mask_irq(desc);
1233 		goto out;
1234 	}
1235 
1236 	kstat_incr_irqs_this_cpu(desc);
1237 	if (desc->istate & IRQS_ONESHOT)
1238 		mask_irq(desc);
1239 
1240 	handle_irq_event(desc);
1241 
1242 	cond_unmask_eoi_irq(desc, chip);
1243 
1244 	raw_spin_unlock(&desc->lock);
1245 	return;
1246 out:
1247 	if (!(chip->flags & IRQCHIP_EOI_IF_HANDLED))
1248 		chip->irq_eoi(&desc->irq_data);
1249 	raw_spin_unlock(&desc->lock);
1250 }
1251 EXPORT_SYMBOL_GPL(handle_fasteoi_mask_irq);
1252 
1253 #endif /* CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS */
1254 
1255 /**
1256  * irq_chip_set_parent_state - set the state of a parent interrupt.
1257  *
1258  * @data: Pointer to interrupt specific data
1259  * @which: State to be restored (one of IRQCHIP_STATE_*)
1260  * @val: Value corresponding to @which
1261  *
1262  * Conditional success, if the underlying irqchip does not implement it.
1263  */
1264 int irq_chip_set_parent_state(struct irq_data *data,
1265 			      enum irqchip_irq_state which,
1266 			      bool val)
1267 {
1268 	data = data->parent_data;
1269 
1270 	if (!data || !data->chip->irq_set_irqchip_state)
1271 		return 0;
1272 
1273 	return data->chip->irq_set_irqchip_state(data, which, val);
1274 }
1275 EXPORT_SYMBOL_GPL(irq_chip_set_parent_state);
1276 
1277 /**
1278  * irq_chip_get_parent_state - get the state of a parent interrupt.
1279  *
1280  * @data: Pointer to interrupt specific data
1281  * @which: one of IRQCHIP_STATE_* the caller wants to know
1282  * @state: a pointer to a boolean where the state is to be stored
1283  *
1284  * Conditional success, if the underlying irqchip does not implement it.
1285  */
1286 int irq_chip_get_parent_state(struct irq_data *data,
1287 			      enum irqchip_irq_state which,
1288 			      bool *state)
1289 {
1290 	data = data->parent_data;
1291 
1292 	if (!data || !data->chip->irq_get_irqchip_state)
1293 		return 0;
1294 
1295 	return data->chip->irq_get_irqchip_state(data, which, state);
1296 }
1297 EXPORT_SYMBOL_GPL(irq_chip_get_parent_state);
1298 
1299 /**
1300  * irq_chip_enable_parent - Enable the parent interrupt (defaults to unmask if
1301  * NULL)
1302  * @data:	Pointer to interrupt specific data
1303  */
1304 void irq_chip_enable_parent(struct irq_data *data)
1305 {
1306 	data = data->parent_data;
1307 	if (data->chip->irq_enable)
1308 		data->chip->irq_enable(data);
1309 	else
1310 		data->chip->irq_unmask(data);
1311 }
1312 EXPORT_SYMBOL_GPL(irq_chip_enable_parent);
1313 
1314 /**
1315  * irq_chip_disable_parent - Disable the parent interrupt (defaults to mask if
1316  * NULL)
1317  * @data:	Pointer to interrupt specific data
1318  */
1319 void irq_chip_disable_parent(struct irq_data *data)
1320 {
1321 	data = data->parent_data;
1322 	if (data->chip->irq_disable)
1323 		data->chip->irq_disable(data);
1324 	else
1325 		data->chip->irq_mask(data);
1326 }
1327 EXPORT_SYMBOL_GPL(irq_chip_disable_parent);
1328 
1329 /**
1330  * irq_chip_ack_parent - Acknowledge the parent interrupt
1331  * @data:	Pointer to interrupt specific data
1332  */
1333 void irq_chip_ack_parent(struct irq_data *data)
1334 {
1335 	data = data->parent_data;
1336 	data->chip->irq_ack(data);
1337 }
1338 EXPORT_SYMBOL_GPL(irq_chip_ack_parent);
1339 
1340 /**
1341  * irq_chip_mask_parent - Mask the parent interrupt
1342  * @data:	Pointer to interrupt specific data
1343  */
1344 void irq_chip_mask_parent(struct irq_data *data)
1345 {
1346 	data = data->parent_data;
1347 	data->chip->irq_mask(data);
1348 }
1349 EXPORT_SYMBOL_GPL(irq_chip_mask_parent);
1350 
1351 /**
1352  * irq_chip_mask_ack_parent - Mask and acknowledge the parent interrupt
1353  * @data:	Pointer to interrupt specific data
1354  */
1355 void irq_chip_mask_ack_parent(struct irq_data *data)
1356 {
1357 	data = data->parent_data;
1358 	data->chip->irq_mask_ack(data);
1359 }
1360 EXPORT_SYMBOL_GPL(irq_chip_mask_ack_parent);
1361 
1362 /**
1363  * irq_chip_unmask_parent - Unmask the parent interrupt
1364  * @data:	Pointer to interrupt specific data
1365  */
1366 void irq_chip_unmask_parent(struct irq_data *data)
1367 {
1368 	data = data->parent_data;
1369 	data->chip->irq_unmask(data);
1370 }
1371 EXPORT_SYMBOL_GPL(irq_chip_unmask_parent);
1372 
1373 /**
1374  * irq_chip_eoi_parent - Invoke EOI on the parent interrupt
1375  * @data:	Pointer to interrupt specific data
1376  */
1377 void irq_chip_eoi_parent(struct irq_data *data)
1378 {
1379 	data = data->parent_data;
1380 	data->chip->irq_eoi(data);
1381 }
1382 EXPORT_SYMBOL_GPL(irq_chip_eoi_parent);
1383 
1384 /**
1385  * irq_chip_set_affinity_parent - Set affinity on the parent interrupt
1386  * @data:	Pointer to interrupt specific data
1387  * @dest:	The affinity mask to set
1388  * @force:	Flag to enforce setting (disable online checks)
1389  *
1390  * Conditional, as the underlying parent chip might not implement it.
1391  */
1392 int irq_chip_set_affinity_parent(struct irq_data *data,
1393 				 const struct cpumask *dest, bool force)
1394 {
1395 	data = data->parent_data;
1396 	if (data->chip->irq_set_affinity)
1397 		return data->chip->irq_set_affinity(data, dest, force);
1398 
1399 	return -ENOSYS;
1400 }
1401 EXPORT_SYMBOL_GPL(irq_chip_set_affinity_parent);
1402 
1403 /**
1404  * irq_chip_set_type_parent - Set IRQ type on the parent interrupt
1405  * @data:	Pointer to interrupt specific data
1406  * @type:	IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
1407  *
1408  * Conditional, as the underlying parent chip might not implement it.
1409  */
1410 int irq_chip_set_type_parent(struct irq_data *data, unsigned int type)
1411 {
1412 	data = data->parent_data;
1413 
1414 	if (data->chip->irq_set_type)
1415 		return data->chip->irq_set_type(data, type);
1416 
1417 	return -ENOSYS;
1418 }
1419 EXPORT_SYMBOL_GPL(irq_chip_set_type_parent);
1420 
1421 /**
1422  * irq_chip_retrigger_hierarchy - Retrigger an interrupt in hardware
1423  * @data:	Pointer to interrupt specific data
1424  *
1425  * Iterate through the domain hierarchy of the interrupt and check
1426  * whether a hw retrigger function exists. If yes, invoke it.
1427  */
1428 int irq_chip_retrigger_hierarchy(struct irq_data *data)
1429 {
1430 	for (data = data->parent_data; data; data = data->parent_data)
1431 		if (data->chip && data->chip->irq_retrigger)
1432 			return data->chip->irq_retrigger(data);
1433 
1434 	return 0;
1435 }
1436 EXPORT_SYMBOL_GPL(irq_chip_retrigger_hierarchy);
1437 
1438 /**
1439  * irq_chip_set_vcpu_affinity_parent - Set vcpu affinity on the parent interrupt
1440  * @data:	Pointer to interrupt specific data
1441  * @vcpu_info:	The vcpu affinity information
1442  */
1443 int irq_chip_set_vcpu_affinity_parent(struct irq_data *data, void *vcpu_info)
1444 {
1445 	data = data->parent_data;
1446 	if (data->chip->irq_set_vcpu_affinity)
1447 		return data->chip->irq_set_vcpu_affinity(data, vcpu_info);
1448 
1449 	return -ENOSYS;
1450 }
1451 EXPORT_SYMBOL_GPL(irq_chip_set_vcpu_affinity_parent);
1452 /**
1453  * irq_chip_set_wake_parent - Set/reset wake-up on the parent interrupt
1454  * @data:	Pointer to interrupt specific data
1455  * @on:		Whether to set or reset the wake-up capability of this irq
1456  *
1457  * Conditional, as the underlying parent chip might not implement it.
1458  */
1459 int irq_chip_set_wake_parent(struct irq_data *data, unsigned int on)
1460 {
1461 	data = data->parent_data;
1462 
1463 	if (data->chip->flags & IRQCHIP_SKIP_SET_WAKE)
1464 		return 0;
1465 
1466 	if (data->chip->irq_set_wake)
1467 		return data->chip->irq_set_wake(data, on);
1468 
1469 	return -ENOSYS;
1470 }
1471 EXPORT_SYMBOL_GPL(irq_chip_set_wake_parent);
1472 
1473 /**
1474  * irq_chip_request_resources_parent - Request resources on the parent interrupt
1475  * @data:	Pointer to interrupt specific data
1476  */
1477 int irq_chip_request_resources_parent(struct irq_data *data)
1478 {
1479 	data = data->parent_data;
1480 
1481 	if (data->chip->irq_request_resources)
1482 		return data->chip->irq_request_resources(data);
1483 
1484 	/* no error on missing optional irq_chip::irq_request_resources */
1485 	return 0;
1486 }
1487 EXPORT_SYMBOL_GPL(irq_chip_request_resources_parent);
1488 
1489 /**
1490  * irq_chip_release_resources_parent - Release resources on the parent interrupt
1491  * @data:	Pointer to interrupt specific data
1492  */
1493 void irq_chip_release_resources_parent(struct irq_data *data)
1494 {
1495 	data = data->parent_data;
1496 	if (data->chip->irq_release_resources)
1497 		data->chip->irq_release_resources(data);
1498 }
1499 EXPORT_SYMBOL_GPL(irq_chip_release_resources_parent);
1500 #endif
1501 
1502 /**
1503  * irq_chip_compose_msi_msg - Compose msi message for a irq chip
1504  * @data:	Pointer to interrupt specific data
1505  * @msg:	Pointer to the MSI message
1506  *
1507  * For hierarchical domains we find the first chip in the hierarchy
1508  * which implements the irq_compose_msi_msg callback. For non
1509  * hierarchical we use the top level chip.
1510  */
1511 int irq_chip_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
1512 {
1513 	struct irq_data *pos;
1514 
1515 	for (pos = NULL; !pos && data; data = irqd_get_parent_data(data)) {
1516 		if (data->chip && data->chip->irq_compose_msi_msg)
1517 			pos = data;
1518 	}
1519 
1520 	if (!pos)
1521 		return -ENOSYS;
1522 
1523 	pos->chip->irq_compose_msi_msg(pos, msg);
1524 	return 0;
1525 }
1526 
1527 static struct device *irq_get_pm_device(struct irq_data *data)
1528 {
1529 	if (data->domain)
1530 		return data->domain->pm_dev;
1531 
1532 	return NULL;
1533 }
1534 
1535 /**
1536  * irq_chip_pm_get - Enable power for an IRQ chip
1537  * @data:	Pointer to interrupt specific data
1538  *
1539  * Enable the power to the IRQ chip referenced by the interrupt data
1540  * structure.
1541  */
1542 int irq_chip_pm_get(struct irq_data *data)
1543 {
1544 	struct device *dev = irq_get_pm_device(data);
1545 	int retval = 0;
1546 
1547 	if (IS_ENABLED(CONFIG_PM) && dev)
1548 		retval = pm_runtime_resume_and_get(dev);
1549 
1550 	return retval;
1551 }
1552 
1553 /**
1554  * irq_chip_pm_put - Disable power for an IRQ chip
1555  * @data:	Pointer to interrupt specific data
1556  *
1557  * Disable the power to the IRQ chip referenced by the interrupt data
1558  * structure, belongs. Note that power will only be disabled, once this
1559  * function has been called for all IRQs that have called irq_chip_pm_get().
1560  */
1561 int irq_chip_pm_put(struct irq_data *data)
1562 {
1563 	struct device *dev = irq_get_pm_device(data);
1564 	int retval = 0;
1565 
1566 	if (IS_ENABLED(CONFIG_PM) && dev)
1567 		retval = pm_runtime_put(dev);
1568 
1569 	return (retval < 0) ? retval : 0;
1570 }
1571