1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2020 - 2022, Google LLC
4 *
5 * MAXIM TCPCI based TCPC driver
6 */
7
8 #include <linux/interrupt.h>
9 #include <linux/i2c.h>
10 #include <linux/kernel.h>
11 #include <linux/module.h>
12 #include <linux/regmap.h>
13 #include <linux/usb/pd.h>
14 #include <linux/usb/tcpci.h>
15 #include <linux/usb/tcpm.h>
16 #include <linux/usb/typec.h>
17
18 #include "tcpci_maxim.h"
19
20 #define PD_ACTIVITY_TIMEOUT_MS 10000
21
22 #define TCPC_VENDOR_ALERT 0x80
23 #define TCPC_VENDOR_USBSW_CTRL 0x93
24 #define TCPC_VENDOR_USBSW_CTRL_ENABLE_USB_DATA 0x9
25 #define TCPC_VENDOR_USBSW_CTRL_DISABLE_USB_DATA 0
26
27 #define TCPC_RECEIVE_BUFFER_COUNT_OFFSET 0
28 #define TCPC_RECEIVE_BUFFER_FRAME_TYPE_OFFSET 1
29 #define TCPC_RECEIVE_BUFFER_RX_BYTE_BUF_OFFSET 2
30
31 /*
32 * LongMessage not supported, hence 32 bytes for buf to be read from RECEIVE_BUFFER.
33 * DEVICE_CAPABILITIES_2.LongMessage = 0, the value in READABLE_BYTE_COUNT reg shall be
34 * less than or equal to 31. Since, RECEIVE_BUFFER len = 31 + 1(READABLE_BYTE_COUNT).
35 */
36 #define TCPC_RECEIVE_BUFFER_LEN 32
37
38 #define MAX_BUCK_BOOST_SID 0x69
39 #define MAX_BUCK_BOOST_OP 0xb9
40 #define MAX_BUCK_BOOST_OFF 0
41 #define MAX_BUCK_BOOST_SOURCE 0xa
42 #define MAX_BUCK_BOOST_SINK 0x5
43
44 static const struct regmap_range max_tcpci_tcpci_range[] = {
45 regmap_reg_range(0x00, 0x95)
46 };
47
48 static const struct regmap_access_table max_tcpci_tcpci_write_table = {
49 .yes_ranges = max_tcpci_tcpci_range,
50 .n_yes_ranges = ARRAY_SIZE(max_tcpci_tcpci_range),
51 };
52
53 static const struct regmap_config max_tcpci_regmap_config = {
54 .reg_bits = 8,
55 .val_bits = 8,
56 .max_register = 0x95,
57 .wr_table = &max_tcpci_tcpci_write_table,
58 };
59
tdata_to_max_tcpci(struct tcpci_data * tdata)60 static struct max_tcpci_chip *tdata_to_max_tcpci(struct tcpci_data *tdata)
61 {
62 return container_of(tdata, struct max_tcpci_chip, data);
63 }
64
max_tcpci_init_regs(struct max_tcpci_chip * chip)65 static void max_tcpci_init_regs(struct max_tcpci_chip *chip)
66 {
67 u16 alert_mask = 0;
68 int ret;
69
70 ret = max_tcpci_write16(chip, TCPC_ALERT, 0xffff);
71 if (ret < 0) {
72 dev_err(chip->dev, "Error writing to TCPC_ALERT ret:%d\n", ret);
73 return;
74 }
75
76 ret = max_tcpci_write16(chip, TCPC_VENDOR_ALERT, 0xffff);
77 if (ret < 0) {
78 dev_err(chip->dev, "Error writing to TCPC_VENDOR_ALERT ret:%d\n", ret);
79 return;
80 }
81
82 ret = max_tcpci_write8(chip, TCPC_ALERT_EXTENDED, 0xff);
83 if (ret < 0) {
84 dev_err(chip->dev, "Unable to clear TCPC_ALERT_EXTENDED ret:%d\n", ret);
85 return;
86 }
87
88 /* Enable VSAFE0V detection */
89 ret = max_tcpci_write8(chip, TCPC_EXTENDED_STATUS_MASK, TCPC_EXTENDED_STATUS_VSAFE0V);
90 if (ret < 0) {
91 dev_err(chip->dev, "Unable to unmask TCPC_EXTENDED_STATUS_VSAFE0V ret:%d\n", ret);
92 return;
93 }
94
95 /* Vconn Over Current Protection */
96 ret = max_tcpci_write8(chip, TCPC_FAULT_STATUS_MASK, TCPC_FAULT_STATUS_MASK_VCONN_OC);
97 if (ret < 0)
98 return;
99
100 alert_mask = (TCPC_ALERT_TX_SUCCESS | TCPC_ALERT_TX_DISCARDED |
101 TCPC_ALERT_TX_FAILED | TCPC_ALERT_RX_HARD_RST |
102 TCPC_ALERT_RX_STATUS | TCPC_ALERT_POWER_STATUS |
103 TCPC_ALERT_CC_STATUS |
104 TCPC_ALERT_EXTND | TCPC_ALERT_EXTENDED_STATUS |
105 TCPC_ALERT_VBUS_DISCNCT | TCPC_ALERT_RX_BUF_OVF |
106 TCPC_ALERT_FAULT);
107
108 ret = max_tcpci_write16(chip, TCPC_ALERT_MASK, alert_mask);
109 if (ret < 0) {
110 dev_err(chip->dev,
111 "Error enabling TCPC_ALERT: TCPC_ALERT_MASK write failed ret:%d\n", ret);
112 return;
113 }
114
115 /* Enable vbus voltage monitoring and voltage alerts */
116 ret = max_tcpci_write8(chip, TCPC_POWER_CTRL, 0);
117 if (ret < 0) {
118 dev_err(chip->dev, "Error writing to TCPC_POWER_CTRL ret:%d\n", ret);
119 return;
120 }
121
122 ret = max_tcpci_write8(chip, TCPC_ALERT_EXTENDED_MASK, TCPC_SINK_FAST_ROLE_SWAP);
123 if (ret < 0)
124 return;
125 }
126
process_rx(struct max_tcpci_chip * chip,u16 status)127 static void process_rx(struct max_tcpci_chip *chip, u16 status)
128 {
129 struct pd_message msg;
130 u8 count, frame_type, rx_buf[TCPC_RECEIVE_BUFFER_LEN];
131 int ret, payload_index;
132 u8 *rx_buf_ptr;
133 enum tcpm_transmit_type rx_type;
134
135 /*
136 * READABLE_BYTE_COUNT: Indicates the number of bytes in the RX_BUF_BYTE_x registers
137 * plus one (for the RX_BUF_FRAME_TYPE) Table 4-36.
138 * Read the count and frame type.
139 */
140 ret = regmap_raw_read(chip->data.regmap, TCPC_RX_BYTE_CNT, rx_buf, 2);
141 if (ret < 0) {
142 dev_err(chip->dev, "TCPC_RX_BYTE_CNT read failed ret:%d\n", ret);
143 return;
144 }
145
146 count = rx_buf[TCPC_RECEIVE_BUFFER_COUNT_OFFSET];
147 frame_type = rx_buf[TCPC_RECEIVE_BUFFER_FRAME_TYPE_OFFSET];
148
149 switch (frame_type) {
150 case TCPC_RX_BUF_FRAME_TYPE_SOP1:
151 rx_type = TCPC_TX_SOP_PRIME;
152 break;
153 case TCPC_RX_BUF_FRAME_TYPE_SOP:
154 rx_type = TCPC_TX_SOP;
155 break;
156 default:
157 rx_type = TCPC_TX_SOP;
158 break;
159 }
160
161 if (count == 0 || (frame_type != TCPC_RX_BUF_FRAME_TYPE_SOP &&
162 frame_type != TCPC_RX_BUF_FRAME_TYPE_SOP1)) {
163 max_tcpci_write16(chip, TCPC_ALERT, TCPC_ALERT_RX_STATUS);
164 dev_err(chip->dev, "%s\n", count == 0 ? "error: count is 0" :
165 "error frame_type is not SOP/SOP'");
166 return;
167 }
168
169 if (count > sizeof(struct pd_message) + 1 ||
170 count + 1 > TCPC_RECEIVE_BUFFER_LEN) {
171 dev_err(chip->dev, "Invalid TCPC_RX_BYTE_CNT %d\n", count);
172 return;
173 }
174
175 /*
176 * Read count + 1 as RX_BUF_BYTE_x is hidden and can only be read through
177 * TCPC_RX_BYTE_CNT
178 */
179 count += 1;
180 ret = regmap_raw_read(chip->data.regmap, TCPC_RX_BYTE_CNT, rx_buf, count);
181 if (ret < 0) {
182 dev_err(chip->dev, "Error: TCPC_RX_BYTE_CNT read failed: %d\n", ret);
183 return;
184 }
185
186 rx_buf_ptr = rx_buf + TCPC_RECEIVE_BUFFER_RX_BYTE_BUF_OFFSET;
187 msg.header = cpu_to_le16(*(u16 *)rx_buf_ptr);
188 rx_buf_ptr = rx_buf_ptr + sizeof(msg.header);
189 for (payload_index = 0; payload_index < pd_header_cnt_le(msg.header); payload_index++,
190 rx_buf_ptr += sizeof(msg.payload[0]))
191 msg.payload[payload_index] = cpu_to_le32(*(u32 *)rx_buf_ptr);
192
193 /*
194 * Read complete, clear RX status alert bit.
195 * Clear overflow as well if set.
196 */
197 ret = max_tcpci_write16(chip, TCPC_ALERT,
198 TCPC_ALERT_RX_STATUS | (status & TCPC_ALERT_RX_BUF_OVF));
199 if (ret < 0)
200 return;
201
202 tcpm_pd_receive(chip->port, &msg, rx_type);
203 }
204
max_tcpci_set_vbus(struct tcpci * tcpci,struct tcpci_data * tdata,bool source,bool sink)205 static int max_tcpci_set_vbus(struct tcpci *tcpci, struct tcpci_data *tdata, bool source, bool sink)
206 {
207 struct max_tcpci_chip *chip = tdata_to_max_tcpci(tdata);
208 u8 buffer_source[2] = {MAX_BUCK_BOOST_OP, MAX_BUCK_BOOST_SOURCE};
209 u8 buffer_sink[2] = {MAX_BUCK_BOOST_OP, MAX_BUCK_BOOST_SINK};
210 u8 buffer_none[2] = {MAX_BUCK_BOOST_OP, MAX_BUCK_BOOST_OFF};
211 struct i2c_client *i2c = chip->client;
212 int ret;
213
214 struct i2c_msg msgs[] = {
215 {
216 .addr = MAX_BUCK_BOOST_SID,
217 .flags = i2c->flags & I2C_M_TEN,
218 .len = 2,
219 .buf = source ? buffer_source : sink ? buffer_sink : buffer_none,
220 },
221 };
222
223 if (source && sink) {
224 dev_err(chip->dev, "Both source and sink set\n");
225 return -EINVAL;
226 }
227
228 ret = i2c_transfer(i2c->adapter, msgs, 1);
229
230 return ret < 0 ? ret : 1;
231 }
232
process_power_status(struct max_tcpci_chip * chip)233 static void process_power_status(struct max_tcpci_chip *chip)
234 {
235 u8 pwr_status;
236 int ret;
237
238 ret = max_tcpci_read8(chip, TCPC_POWER_STATUS, &pwr_status);
239 if (ret < 0)
240 return;
241
242 if (pwr_status == 0xff)
243 max_tcpci_init_regs(chip);
244 else if (pwr_status & TCPC_POWER_STATUS_SOURCING_VBUS)
245 tcpm_sourcing_vbus(chip->port);
246 else
247 tcpm_vbus_change(chip->port);
248 }
249
max_tcpci_frs_sourcing_vbus(struct tcpci * tcpci,struct tcpci_data * tdata)250 static void max_tcpci_frs_sourcing_vbus(struct tcpci *tcpci, struct tcpci_data *tdata)
251 {
252 /*
253 * For Fast Role Swap case, Boost turns on autonomously without
254 * AP intervention, but, needs AP to enable source mode explicitly
255 * for AP to regain control.
256 */
257 max_tcpci_set_vbus(tcpci, tdata, true, false);
258 }
259
process_tx(struct max_tcpci_chip * chip,u16 status)260 static void process_tx(struct max_tcpci_chip *chip, u16 status)
261 {
262 if (status & TCPC_ALERT_TX_SUCCESS)
263 tcpm_pd_transmit_complete(chip->port, TCPC_TX_SUCCESS);
264 else if (status & TCPC_ALERT_TX_DISCARDED)
265 tcpm_pd_transmit_complete(chip->port, TCPC_TX_DISCARDED);
266 else if (status & TCPC_ALERT_TX_FAILED)
267 tcpm_pd_transmit_complete(chip->port, TCPC_TX_FAILED);
268
269 /* Reinit regs as Hard reset sets them to default value */
270 if ((status & TCPC_ALERT_TX_SUCCESS) && (status & TCPC_ALERT_TX_FAILED))
271 max_tcpci_init_regs(chip);
272 }
273
274 /* Enable USB switches when partner is USB communications capable */
max_tcpci_set_partner_usb_comm_capable(struct tcpci * tcpci,struct tcpci_data * data,bool capable)275 static void max_tcpci_set_partner_usb_comm_capable(struct tcpci *tcpci, struct tcpci_data *data,
276 bool capable)
277 {
278 struct max_tcpci_chip *chip = tdata_to_max_tcpci(data);
279 int ret;
280
281 ret = max_tcpci_write8(chip, TCPC_VENDOR_USBSW_CTRL, capable ?
282 TCPC_VENDOR_USBSW_CTRL_ENABLE_USB_DATA :
283 TCPC_VENDOR_USBSW_CTRL_DISABLE_USB_DATA);
284
285 if (ret < 0)
286 dev_err(chip->dev, "Failed to enable USB switches");
287 }
288
_max_tcpci_irq(struct max_tcpci_chip * chip,u16 status)289 static irqreturn_t _max_tcpci_irq(struct max_tcpci_chip *chip, u16 status)
290 {
291 u16 mask;
292 int ret;
293 u8 reg_status;
294
295 /*
296 * Clear alert status for everything except RX_STATUS, which shouldn't
297 * be cleared until we have successfully retrieved message.
298 */
299 if (status & ~TCPC_ALERT_RX_STATUS) {
300 mask = status & ~(TCPC_ALERT_RX_STATUS
301 | (status & TCPC_ALERT_RX_BUF_OVF));
302 ret = max_tcpci_write16(chip, TCPC_ALERT, mask);
303 if (ret < 0) {
304 dev_err(chip->dev, "ALERT clear failed\n");
305 return ret;
306 }
307 }
308
309 if (status & TCPC_ALERT_RX_BUF_OVF && !(status & TCPC_ALERT_RX_STATUS)) {
310 ret = max_tcpci_write16(chip, TCPC_ALERT, (TCPC_ALERT_RX_STATUS |
311 TCPC_ALERT_RX_BUF_OVF));
312 if (ret < 0) {
313 dev_err(chip->dev, "ALERT clear failed\n");
314 return ret;
315 }
316 }
317
318 if (status & TCPC_ALERT_FAULT) {
319 ret = max_tcpci_read8(chip, TCPC_FAULT_STATUS, ®_status);
320 if (ret < 0)
321 return ret;
322
323 ret = max_tcpci_write8(chip, TCPC_FAULT_STATUS, reg_status);
324 if (ret < 0)
325 return ret;
326
327 if (reg_status & TCPC_FAULT_STATUS_VCONN_OC) {
328 chip->veto_vconn_swap = true;
329 tcpm_port_error_recovery(chip->port);
330 }
331 }
332
333 if (status & TCPC_ALERT_EXTND) {
334 ret = max_tcpci_read8(chip, TCPC_ALERT_EXTENDED, ®_status);
335 if (ret < 0)
336 return ret;
337
338 ret = max_tcpci_write8(chip, TCPC_ALERT_EXTENDED, reg_status);
339 if (ret < 0)
340 return ret;
341
342 if (reg_status & TCPC_SINK_FAST_ROLE_SWAP) {
343 dev_info(chip->dev, "FRS Signal\n");
344 tcpm_sink_frs(chip->port);
345 }
346 }
347
348 if (status & TCPC_ALERT_EXTENDED_STATUS) {
349 ret = max_tcpci_read8(chip, TCPC_EXTENDED_STATUS, (u8 *)®_status);
350 if (ret >= 0 && (reg_status & TCPC_EXTENDED_STATUS_VSAFE0V))
351 tcpm_vbus_change(chip->port);
352 }
353
354 if (status & TCPC_ALERT_RX_STATUS)
355 process_rx(chip, status);
356
357 if (status & TCPC_ALERT_VBUS_DISCNCT)
358 tcpm_vbus_change(chip->port);
359
360 if (status & TCPC_ALERT_CC_STATUS) {
361 bool cc_handled = false;
362
363 if (chip->contaminant_state == DETECTED || tcpm_port_is_toggling(chip->port)) {
364 if (!max_contaminant_is_contaminant(chip, false, &cc_handled))
365 tcpm_port_clean(chip->port);
366 }
367 if (!cc_handled)
368 tcpm_cc_change(chip->port);
369 }
370
371 if (status & TCPC_ALERT_POWER_STATUS)
372 process_power_status(chip);
373
374 if (status & TCPC_ALERT_RX_HARD_RST) {
375 tcpm_pd_hard_reset(chip->port);
376 max_tcpci_init_regs(chip);
377 }
378
379 if (status & TCPC_ALERT_TX_SUCCESS || status & TCPC_ALERT_TX_DISCARDED || status &
380 TCPC_ALERT_TX_FAILED)
381 process_tx(chip, status);
382
383 return IRQ_HANDLED;
384 }
385
max_tcpci_irq(int irq,void * dev_id)386 static irqreturn_t max_tcpci_irq(int irq, void *dev_id)
387 {
388 struct max_tcpci_chip *chip = dev_id;
389 u16 status;
390 irqreturn_t irq_return = IRQ_HANDLED;
391 int ret;
392
393 if (!chip->port)
394 return IRQ_HANDLED;
395
396 ret = max_tcpci_read16(chip, TCPC_ALERT, &status);
397 if (ret < 0) {
398 dev_err(chip->dev, "ALERT read failed\n");
399 return ret;
400 }
401 while (status) {
402 irq_return = _max_tcpci_irq(chip, status);
403 /* Do not return if a (new) ALERT is set (again). */
404 ret = max_tcpci_read16(chip, TCPC_ALERT, &status);
405 if (ret < 0)
406 break;
407 }
408
409 return irq_return;
410 }
411
max_tcpci_isr(int irq,void * dev_id)412 static irqreturn_t max_tcpci_isr(int irq, void *dev_id)
413 {
414 struct max_tcpci_chip *chip = dev_id;
415
416 pm_wakeup_event(chip->dev, PD_ACTIVITY_TIMEOUT_MS);
417
418 if (!chip->port)
419 return IRQ_HANDLED;
420
421 return IRQ_WAKE_THREAD;
422 }
423
max_tcpci_init_alert(struct max_tcpci_chip * chip,struct i2c_client * client)424 static int max_tcpci_init_alert(struct max_tcpci_chip *chip, struct i2c_client *client)
425 {
426 int ret;
427
428 ret = devm_request_threaded_irq(chip->dev, client->irq, max_tcpci_isr, max_tcpci_irq,
429 (IRQF_TRIGGER_LOW | IRQF_ONESHOT), dev_name(chip->dev),
430 chip);
431
432 if (ret < 0)
433 return ret;
434
435 enable_irq_wake(client->irq);
436 return 0;
437 }
438
max_tcpci_start_toggling(struct tcpci * tcpci,struct tcpci_data * tdata,enum typec_cc_status cc)439 static int max_tcpci_start_toggling(struct tcpci *tcpci, struct tcpci_data *tdata,
440 enum typec_cc_status cc)
441 {
442 struct max_tcpci_chip *chip = tdata_to_max_tcpci(tdata);
443
444 max_tcpci_init_regs(chip);
445
446 return 0;
447 }
448
tcpci_init(struct tcpci * tcpci,struct tcpci_data * data)449 static int tcpci_init(struct tcpci *tcpci, struct tcpci_data *data)
450 {
451 /*
452 * Generic TCPCI overwrites the regs once this driver initializes
453 * them. Prevent this by returning -1.
454 */
455 return -1;
456 }
457
max_tcpci_check_contaminant(struct tcpci * tcpci,struct tcpci_data * tdata)458 static void max_tcpci_check_contaminant(struct tcpci *tcpci, struct tcpci_data *tdata)
459 {
460 struct max_tcpci_chip *chip = tdata_to_max_tcpci(tdata);
461 bool cc_handled;
462
463 if (!max_contaminant_is_contaminant(chip, true, &cc_handled))
464 tcpm_port_clean(chip->port);
465 }
466
max_tcpci_attempt_vconn_swap_discovery(struct tcpci * tcpci,struct tcpci_data * tdata)467 static bool max_tcpci_attempt_vconn_swap_discovery(struct tcpci *tcpci, struct tcpci_data *tdata)
468 {
469 struct max_tcpci_chip *chip = tdata_to_max_tcpci(tdata);
470
471 if (chip->veto_vconn_swap) {
472 chip->veto_vconn_swap = false;
473 return false;
474 }
475
476 return true;
477 }
478
max_tcpci_unregister_tcpci_port(void * tcpci)479 static void max_tcpci_unregister_tcpci_port(void *tcpci)
480 {
481 tcpci_unregister_port(tcpci);
482 }
483
max_tcpci_probe(struct i2c_client * client)484 static int max_tcpci_probe(struct i2c_client *client)
485 {
486 int ret;
487 struct max_tcpci_chip *chip;
488 u8 power_status;
489
490 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
491 if (!chip)
492 return -ENOMEM;
493
494 chip->client = client;
495 chip->data.regmap = devm_regmap_init_i2c(client, &max_tcpci_regmap_config);
496 if (IS_ERR(chip->data.regmap))
497 return dev_err_probe(&client->dev, PTR_ERR(chip->data.regmap),
498 "Regmap init failed\n");
499
500 chip->dev = &client->dev;
501 i2c_set_clientdata(client, chip);
502
503 ret = max_tcpci_read8(chip, TCPC_POWER_STATUS, &power_status);
504 if (ret < 0)
505 return dev_err_probe(&client->dev, ret,
506 "Failed to read TCPC_POWER_STATUS\n");
507
508 /* Chip level tcpci callbacks */
509 chip->data.set_vbus = max_tcpci_set_vbus;
510 chip->data.start_drp_toggling = max_tcpci_start_toggling;
511 chip->data.TX_BUF_BYTE_x_hidden = true;
512 chip->data.init = tcpci_init;
513 chip->data.frs_sourcing_vbus = max_tcpci_frs_sourcing_vbus;
514 chip->data.auto_discharge_disconnect = true;
515 chip->data.vbus_vsafe0v = true;
516 chip->data.set_partner_usb_comm_capable = max_tcpci_set_partner_usb_comm_capable;
517 chip->data.check_contaminant = max_tcpci_check_contaminant;
518 chip->data.cable_comm_capable = true;
519 chip->data.attempt_vconn_swap_discovery = max_tcpci_attempt_vconn_swap_discovery;
520
521 max_tcpci_init_regs(chip);
522 chip->tcpci = tcpci_register_port(chip->dev, &chip->data);
523 if (IS_ERR(chip->tcpci))
524 return dev_err_probe(&client->dev, PTR_ERR(chip->tcpci),
525 "TCPCI port registration failed\n");
526
527 ret = devm_add_action_or_reset(&client->dev,
528 max_tcpci_unregister_tcpci_port,
529 chip->tcpci);
530 if (ret)
531 return ret;
532
533 chip->port = tcpci_get_tcpm_port(chip->tcpci);
534
535 ret = max_tcpci_init_alert(chip, client);
536 if (ret < 0)
537 return dev_err_probe(&client->dev, ret,
538 "IRQ initialization failed\n");
539
540 ret = devm_device_init_wakeup(chip->dev);
541 if (ret)
542 return dev_err_probe(chip->dev, ret, "Failed to init wakeup\n");
543
544 return 0;
545 }
546
547 static const struct i2c_device_id max_tcpci_id[] = {
548 { "maxtcpc" },
549 { }
550 };
551 MODULE_DEVICE_TABLE(i2c, max_tcpci_id);
552
553 #ifdef CONFIG_OF
554 static const struct of_device_id max_tcpci_of_match[] = {
555 { .compatible = "maxim,max33359", },
556 {},
557 };
558 MODULE_DEVICE_TABLE(of, max_tcpci_of_match);
559 #endif
560
561 static struct i2c_driver max_tcpci_i2c_driver = {
562 .driver = {
563 .name = "maxtcpc",
564 .of_match_table = of_match_ptr(max_tcpci_of_match),
565 },
566 .probe = max_tcpci_probe,
567 .id_table = max_tcpci_id,
568 };
569 module_i2c_driver(max_tcpci_i2c_driver);
570
571 MODULE_AUTHOR("Badhri Jagan Sridharan <badhri@google.com>");
572 MODULE_DESCRIPTION("Maxim TCPCI based USB Type-C Port Controller Interface Driver");
573 MODULE_LICENSE("GPL v2");
574