1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2020 - 2022, Google LLC
4 *
5 * MAXIM TCPCI based TCPC driver
6 */
7
8 #include <linux/interrupt.h>
9 #include <linux/i2c.h>
10 #include <linux/kernel.h>
11 #include <linux/module.h>
12 #include <linux/regmap.h>
13 #include <linux/usb/pd.h>
14 #include <linux/usb/tcpci.h>
15 #include <linux/usb/tcpm.h>
16 #include <linux/usb/typec.h>
17
18 #include "tcpci_maxim.h"
19
20 #define PD_ACTIVITY_TIMEOUT_MS 10000
21
22 #define TCPC_VENDOR_ALERT 0x80
23 #define TCPC_VENDOR_USBSW_CTRL 0x93
24 #define TCPC_VENDOR_USBSW_CTRL_ENABLE_USB_DATA 0x9
25 #define TCPC_VENDOR_USBSW_CTRL_DISABLE_USB_DATA 0
26
27 #define TCPC_RECEIVE_BUFFER_COUNT_OFFSET 0
28 #define TCPC_RECEIVE_BUFFER_FRAME_TYPE_OFFSET 1
29 #define TCPC_RECEIVE_BUFFER_RX_BYTE_BUF_OFFSET 2
30
31 /*
32 * LongMessage not supported, hence 32 bytes for buf to be read from RECEIVE_BUFFER.
33 * DEVICE_CAPABILITIES_2.LongMessage = 0, the value in READABLE_BYTE_COUNT reg shall be
34 * less than or equal to 31. Since, RECEIVE_BUFFER len = 31 + 1(READABLE_BYTE_COUNT).
35 */
36 #define TCPC_RECEIVE_BUFFER_LEN 32
37
38 #define MAX_BUCK_BOOST_SID 0x69
39 #define MAX_BUCK_BOOST_OP 0xb9
40 #define MAX_BUCK_BOOST_OFF 0
41 #define MAX_BUCK_BOOST_SOURCE 0xa
42 #define MAX_BUCK_BOOST_SINK 0x5
43
44 static const struct regmap_range max_tcpci_tcpci_range[] = {
45 regmap_reg_range(0x00, 0x95)
46 };
47
48 static const struct regmap_access_table max_tcpci_tcpci_write_table = {
49 .yes_ranges = max_tcpci_tcpci_range,
50 .n_yes_ranges = ARRAY_SIZE(max_tcpci_tcpci_range),
51 };
52
53 static const struct regmap_config max_tcpci_regmap_config = {
54 .reg_bits = 8,
55 .val_bits = 8,
56 .max_register = 0x95,
57 .wr_table = &max_tcpci_tcpci_write_table,
58 };
59
tdata_to_max_tcpci(struct tcpci_data * tdata)60 static struct max_tcpci_chip *tdata_to_max_tcpci(struct tcpci_data *tdata)
61 {
62 return container_of(tdata, struct max_tcpci_chip, data);
63 }
64
max_tcpci_init_regs(struct max_tcpci_chip * chip)65 static void max_tcpci_init_regs(struct max_tcpci_chip *chip)
66 {
67 u16 alert_mask = 0;
68 int ret;
69
70 ret = max_tcpci_write16(chip, TCPC_ALERT, 0xffff);
71 if (ret < 0) {
72 dev_err(chip->dev, "Error writing to TCPC_ALERT ret:%d\n", ret);
73 return;
74 }
75
76 ret = max_tcpci_write16(chip, TCPC_VENDOR_ALERT, 0xffff);
77 if (ret < 0) {
78 dev_err(chip->dev, "Error writing to TCPC_VENDOR_ALERT ret:%d\n", ret);
79 return;
80 }
81
82 ret = max_tcpci_write8(chip, TCPC_ALERT_EXTENDED, 0xff);
83 if (ret < 0) {
84 dev_err(chip->dev, "Unable to clear TCPC_ALERT_EXTENDED ret:%d\n", ret);
85 return;
86 }
87
88 /* Enable VSAFE0V detection */
89 ret = max_tcpci_write8(chip, TCPC_EXTENDED_STATUS_MASK, TCPC_EXTENDED_STATUS_VSAFE0V);
90 if (ret < 0) {
91 dev_err(chip->dev, "Unable to unmask TCPC_EXTENDED_STATUS_VSAFE0V ret:%d\n", ret);
92 return;
93 }
94
95 /* Vconn Over Current Protection */
96 ret = max_tcpci_write8(chip, TCPC_FAULT_STATUS_MASK, TCPC_FAULT_STATUS_MASK_VCONN_OC);
97 if (ret < 0)
98 return;
99
100 alert_mask = (TCPC_ALERT_TX_SUCCESS | TCPC_ALERT_TX_DISCARDED |
101 TCPC_ALERT_TX_FAILED | TCPC_ALERT_RX_HARD_RST |
102 TCPC_ALERT_RX_STATUS | TCPC_ALERT_POWER_STATUS |
103 TCPC_ALERT_CC_STATUS |
104 TCPC_ALERT_EXTND | TCPC_ALERT_EXTENDED_STATUS |
105 TCPC_ALERT_VBUS_DISCNCT | TCPC_ALERT_RX_BUF_OVF |
106 TCPC_ALERT_FAULT);
107
108 ret = max_tcpci_write16(chip, TCPC_ALERT_MASK, alert_mask);
109 if (ret < 0) {
110 dev_err(chip->dev,
111 "Error enabling TCPC_ALERT: TCPC_ALERT_MASK write failed ret:%d\n", ret);
112 return;
113 }
114
115 /* Enable vbus voltage monitoring and voltage alerts */
116 ret = max_tcpci_write8(chip, TCPC_POWER_CTRL, 0);
117 if (ret < 0) {
118 dev_err(chip->dev, "Error writing to TCPC_POWER_CTRL ret:%d\n", ret);
119 return;
120 }
121
122 ret = max_tcpci_write8(chip, TCPC_ALERT_EXTENDED_MASK, TCPC_SINK_FAST_ROLE_SWAP);
123 if (ret < 0)
124 return;
125 }
126
process_rx(struct max_tcpci_chip * chip,u16 status)127 static void process_rx(struct max_tcpci_chip *chip, u16 status)
128 {
129 struct pd_message msg;
130 u8 count, frame_type, rx_buf[TCPC_RECEIVE_BUFFER_LEN];
131 int ret, payload_index;
132 u8 *rx_buf_ptr;
133 enum tcpm_transmit_type rx_type;
134
135 /*
136 * READABLE_BYTE_COUNT: Indicates the number of bytes in the RX_BUF_BYTE_x registers
137 * plus one (for the RX_BUF_FRAME_TYPE) Table 4-36.
138 * Read the count and frame type.
139 */
140 ret = regmap_raw_read(chip->data.regmap, TCPC_RX_BYTE_CNT, rx_buf, 2);
141 if (ret < 0) {
142 dev_err(chip->dev, "TCPC_RX_BYTE_CNT read failed ret:%d\n", ret);
143 return;
144 }
145
146 count = rx_buf[TCPC_RECEIVE_BUFFER_COUNT_OFFSET];
147 frame_type = rx_buf[TCPC_RECEIVE_BUFFER_FRAME_TYPE_OFFSET];
148
149 switch (frame_type) {
150 case TCPC_RX_BUF_FRAME_TYPE_SOP1:
151 rx_type = TCPC_TX_SOP_PRIME;
152 break;
153 case TCPC_RX_BUF_FRAME_TYPE_SOP:
154 rx_type = TCPC_TX_SOP;
155 break;
156 default:
157 rx_type = TCPC_TX_SOP;
158 break;
159 }
160
161 if (count == 0 || (frame_type != TCPC_RX_BUF_FRAME_TYPE_SOP &&
162 frame_type != TCPC_RX_BUF_FRAME_TYPE_SOP1)) {
163 max_tcpci_write16(chip, TCPC_ALERT, TCPC_ALERT_RX_STATUS);
164 dev_err(chip->dev, "%s\n", count == 0 ? "error: count is 0" :
165 "error frame_type is not SOP/SOP'");
166 return;
167 }
168
169 if (count > sizeof(struct pd_message) || count + 1 > TCPC_RECEIVE_BUFFER_LEN) {
170 dev_err(chip->dev, "Invalid TCPC_RX_BYTE_CNT %d\n", count);
171 return;
172 }
173
174 /*
175 * Read count + 1 as RX_BUF_BYTE_x is hidden and can only be read through
176 * TCPC_RX_BYTE_CNT
177 */
178 count += 1;
179 ret = regmap_raw_read(chip->data.regmap, TCPC_RX_BYTE_CNT, rx_buf, count);
180 if (ret < 0) {
181 dev_err(chip->dev, "Error: TCPC_RX_BYTE_CNT read failed: %d\n", ret);
182 return;
183 }
184
185 rx_buf_ptr = rx_buf + TCPC_RECEIVE_BUFFER_RX_BYTE_BUF_OFFSET;
186 msg.header = cpu_to_le16(*(u16 *)rx_buf_ptr);
187 rx_buf_ptr = rx_buf_ptr + sizeof(msg.header);
188 for (payload_index = 0; payload_index < pd_header_cnt_le(msg.header); payload_index++,
189 rx_buf_ptr += sizeof(msg.payload[0]))
190 msg.payload[payload_index] = cpu_to_le32(*(u32 *)rx_buf_ptr);
191
192 /*
193 * Read complete, clear RX status alert bit.
194 * Clear overflow as well if set.
195 */
196 ret = max_tcpci_write16(chip, TCPC_ALERT,
197 TCPC_ALERT_RX_STATUS | (status & TCPC_ALERT_RX_BUF_OVF));
198 if (ret < 0)
199 return;
200
201 tcpm_pd_receive(chip->port, &msg, rx_type);
202 }
203
max_tcpci_set_vbus(struct tcpci * tcpci,struct tcpci_data * tdata,bool source,bool sink)204 static int max_tcpci_set_vbus(struct tcpci *tcpci, struct tcpci_data *tdata, bool source, bool sink)
205 {
206 struct max_tcpci_chip *chip = tdata_to_max_tcpci(tdata);
207 u8 buffer_source[2] = {MAX_BUCK_BOOST_OP, MAX_BUCK_BOOST_SOURCE};
208 u8 buffer_sink[2] = {MAX_BUCK_BOOST_OP, MAX_BUCK_BOOST_SINK};
209 u8 buffer_none[2] = {MAX_BUCK_BOOST_OP, MAX_BUCK_BOOST_OFF};
210 struct i2c_client *i2c = chip->client;
211 int ret;
212
213 struct i2c_msg msgs[] = {
214 {
215 .addr = MAX_BUCK_BOOST_SID,
216 .flags = i2c->flags & I2C_M_TEN,
217 .len = 2,
218 .buf = source ? buffer_source : sink ? buffer_sink : buffer_none,
219 },
220 };
221
222 if (source && sink) {
223 dev_err(chip->dev, "Both source and sink set\n");
224 return -EINVAL;
225 }
226
227 ret = i2c_transfer(i2c->adapter, msgs, 1);
228
229 return ret < 0 ? ret : 1;
230 }
231
process_power_status(struct max_tcpci_chip * chip)232 static void process_power_status(struct max_tcpci_chip *chip)
233 {
234 u8 pwr_status;
235 int ret;
236
237 ret = max_tcpci_read8(chip, TCPC_POWER_STATUS, &pwr_status);
238 if (ret < 0)
239 return;
240
241 if (pwr_status == 0xff)
242 max_tcpci_init_regs(chip);
243 else if (pwr_status & TCPC_POWER_STATUS_SOURCING_VBUS)
244 tcpm_sourcing_vbus(chip->port);
245 else
246 tcpm_vbus_change(chip->port);
247 }
248
max_tcpci_frs_sourcing_vbus(struct tcpci * tcpci,struct tcpci_data * tdata)249 static void max_tcpci_frs_sourcing_vbus(struct tcpci *tcpci, struct tcpci_data *tdata)
250 {
251 /*
252 * For Fast Role Swap case, Boost turns on autonomously without
253 * AP intervention, but, needs AP to enable source mode explicitly
254 * for AP to regain control.
255 */
256 max_tcpci_set_vbus(tcpci, tdata, true, false);
257 }
258
process_tx(struct max_tcpci_chip * chip,u16 status)259 static void process_tx(struct max_tcpci_chip *chip, u16 status)
260 {
261 if (status & TCPC_ALERT_TX_SUCCESS)
262 tcpm_pd_transmit_complete(chip->port, TCPC_TX_SUCCESS);
263 else if (status & TCPC_ALERT_TX_DISCARDED)
264 tcpm_pd_transmit_complete(chip->port, TCPC_TX_DISCARDED);
265 else if (status & TCPC_ALERT_TX_FAILED)
266 tcpm_pd_transmit_complete(chip->port, TCPC_TX_FAILED);
267
268 /* Reinit regs as Hard reset sets them to default value */
269 if ((status & TCPC_ALERT_TX_SUCCESS) && (status & TCPC_ALERT_TX_FAILED))
270 max_tcpci_init_regs(chip);
271 }
272
273 /* Enable USB switches when partner is USB communications capable */
max_tcpci_set_partner_usb_comm_capable(struct tcpci * tcpci,struct tcpci_data * data,bool capable)274 static void max_tcpci_set_partner_usb_comm_capable(struct tcpci *tcpci, struct tcpci_data *data,
275 bool capable)
276 {
277 struct max_tcpci_chip *chip = tdata_to_max_tcpci(data);
278 int ret;
279
280 ret = max_tcpci_write8(chip, TCPC_VENDOR_USBSW_CTRL, capable ?
281 TCPC_VENDOR_USBSW_CTRL_ENABLE_USB_DATA :
282 TCPC_VENDOR_USBSW_CTRL_DISABLE_USB_DATA);
283
284 if (ret < 0)
285 dev_err(chip->dev, "Failed to enable USB switches");
286 }
287
_max_tcpci_irq(struct max_tcpci_chip * chip,u16 status)288 static irqreturn_t _max_tcpci_irq(struct max_tcpci_chip *chip, u16 status)
289 {
290 u16 mask;
291 int ret;
292 u8 reg_status;
293
294 /*
295 * Clear alert status for everything except RX_STATUS, which shouldn't
296 * be cleared until we have successfully retrieved message.
297 */
298 if (status & ~TCPC_ALERT_RX_STATUS) {
299 mask = status & ~(TCPC_ALERT_RX_STATUS
300 | (status & TCPC_ALERT_RX_BUF_OVF));
301 ret = max_tcpci_write16(chip, TCPC_ALERT, mask);
302 if (ret < 0) {
303 dev_err(chip->dev, "ALERT clear failed\n");
304 return ret;
305 }
306 }
307
308 if (status & TCPC_ALERT_RX_BUF_OVF && !(status & TCPC_ALERT_RX_STATUS)) {
309 ret = max_tcpci_write16(chip, TCPC_ALERT, (TCPC_ALERT_RX_STATUS |
310 TCPC_ALERT_RX_BUF_OVF));
311 if (ret < 0) {
312 dev_err(chip->dev, "ALERT clear failed\n");
313 return ret;
314 }
315 }
316
317 if (status & TCPC_ALERT_FAULT) {
318 ret = max_tcpci_read8(chip, TCPC_FAULT_STATUS, ®_status);
319 if (ret < 0)
320 return ret;
321
322 ret = max_tcpci_write8(chip, TCPC_FAULT_STATUS, reg_status);
323 if (ret < 0)
324 return ret;
325
326 if (reg_status & TCPC_FAULT_STATUS_VCONN_OC) {
327 chip->veto_vconn_swap = true;
328 tcpm_port_error_recovery(chip->port);
329 }
330 }
331
332 if (status & TCPC_ALERT_EXTND) {
333 ret = max_tcpci_read8(chip, TCPC_ALERT_EXTENDED, ®_status);
334 if (ret < 0)
335 return ret;
336
337 ret = max_tcpci_write8(chip, TCPC_ALERT_EXTENDED, reg_status);
338 if (ret < 0)
339 return ret;
340
341 if (reg_status & TCPC_SINK_FAST_ROLE_SWAP) {
342 dev_info(chip->dev, "FRS Signal\n");
343 tcpm_sink_frs(chip->port);
344 }
345 }
346
347 if (status & TCPC_ALERT_EXTENDED_STATUS) {
348 ret = max_tcpci_read8(chip, TCPC_EXTENDED_STATUS, (u8 *)®_status);
349 if (ret >= 0 && (reg_status & TCPC_EXTENDED_STATUS_VSAFE0V))
350 tcpm_vbus_change(chip->port);
351 }
352
353 if (status & TCPC_ALERT_RX_STATUS)
354 process_rx(chip, status);
355
356 if (status & TCPC_ALERT_VBUS_DISCNCT)
357 tcpm_vbus_change(chip->port);
358
359 if (status & TCPC_ALERT_CC_STATUS) {
360 bool cc_handled = false;
361
362 if (chip->contaminant_state == DETECTED || tcpm_port_is_toggling(chip->port)) {
363 if (!max_contaminant_is_contaminant(chip, false, &cc_handled))
364 tcpm_port_clean(chip->port);
365 }
366 if (!cc_handled)
367 tcpm_cc_change(chip->port);
368 }
369
370 if (status & TCPC_ALERT_POWER_STATUS)
371 process_power_status(chip);
372
373 if (status & TCPC_ALERT_RX_HARD_RST) {
374 tcpm_pd_hard_reset(chip->port);
375 max_tcpci_init_regs(chip);
376 }
377
378 if (status & TCPC_ALERT_TX_SUCCESS || status & TCPC_ALERT_TX_DISCARDED || status &
379 TCPC_ALERT_TX_FAILED)
380 process_tx(chip, status);
381
382 return IRQ_HANDLED;
383 }
384
max_tcpci_irq(int irq,void * dev_id)385 static irqreturn_t max_tcpci_irq(int irq, void *dev_id)
386 {
387 struct max_tcpci_chip *chip = dev_id;
388 u16 status;
389 irqreturn_t irq_return = IRQ_HANDLED;
390 int ret;
391
392 if (!chip->port)
393 return IRQ_HANDLED;
394
395 ret = max_tcpci_read16(chip, TCPC_ALERT, &status);
396 if (ret < 0) {
397 dev_err(chip->dev, "ALERT read failed\n");
398 return ret;
399 }
400 while (status) {
401 irq_return = _max_tcpci_irq(chip, status);
402 /* Do not return if a (new) ALERT is set (again). */
403 ret = max_tcpci_read16(chip, TCPC_ALERT, &status);
404 if (ret < 0)
405 break;
406 }
407
408 return irq_return;
409 }
410
max_tcpci_isr(int irq,void * dev_id)411 static irqreturn_t max_tcpci_isr(int irq, void *dev_id)
412 {
413 struct max_tcpci_chip *chip = dev_id;
414
415 pm_wakeup_event(chip->dev, PD_ACTIVITY_TIMEOUT_MS);
416
417 if (!chip->port)
418 return IRQ_HANDLED;
419
420 return IRQ_WAKE_THREAD;
421 }
422
max_tcpci_init_alert(struct max_tcpci_chip * chip,struct i2c_client * client)423 static int max_tcpci_init_alert(struct max_tcpci_chip *chip, struct i2c_client *client)
424 {
425 int ret;
426
427 ret = devm_request_threaded_irq(chip->dev, client->irq, max_tcpci_isr, max_tcpci_irq,
428 (IRQF_TRIGGER_LOW | IRQF_ONESHOT), dev_name(chip->dev),
429 chip);
430
431 if (ret < 0)
432 return ret;
433
434 enable_irq_wake(client->irq);
435 return 0;
436 }
437
max_tcpci_start_toggling(struct tcpci * tcpci,struct tcpci_data * tdata,enum typec_cc_status cc)438 static int max_tcpci_start_toggling(struct tcpci *tcpci, struct tcpci_data *tdata,
439 enum typec_cc_status cc)
440 {
441 struct max_tcpci_chip *chip = tdata_to_max_tcpci(tdata);
442
443 max_tcpci_init_regs(chip);
444
445 return 0;
446 }
447
tcpci_init(struct tcpci * tcpci,struct tcpci_data * data)448 static int tcpci_init(struct tcpci *tcpci, struct tcpci_data *data)
449 {
450 /*
451 * Generic TCPCI overwrites the regs once this driver initializes
452 * them. Prevent this by returning -1.
453 */
454 return -1;
455 }
456
max_tcpci_check_contaminant(struct tcpci * tcpci,struct tcpci_data * tdata)457 static void max_tcpci_check_contaminant(struct tcpci *tcpci, struct tcpci_data *tdata)
458 {
459 struct max_tcpci_chip *chip = tdata_to_max_tcpci(tdata);
460 bool cc_handled;
461
462 if (!max_contaminant_is_contaminant(chip, true, &cc_handled))
463 tcpm_port_clean(chip->port);
464 }
465
max_tcpci_attempt_vconn_swap_discovery(struct tcpci * tcpci,struct tcpci_data * tdata)466 static bool max_tcpci_attempt_vconn_swap_discovery(struct tcpci *tcpci, struct tcpci_data *tdata)
467 {
468 struct max_tcpci_chip *chip = tdata_to_max_tcpci(tdata);
469
470 if (chip->veto_vconn_swap) {
471 chip->veto_vconn_swap = false;
472 return false;
473 }
474
475 return true;
476 }
477
max_tcpci_unregister_tcpci_port(void * tcpci)478 static void max_tcpci_unregister_tcpci_port(void *tcpci)
479 {
480 tcpci_unregister_port(tcpci);
481 }
482
max_tcpci_probe(struct i2c_client * client)483 static int max_tcpci_probe(struct i2c_client *client)
484 {
485 int ret;
486 struct max_tcpci_chip *chip;
487 u8 power_status;
488
489 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
490 if (!chip)
491 return -ENOMEM;
492
493 chip->client = client;
494 chip->data.regmap = devm_regmap_init_i2c(client, &max_tcpci_regmap_config);
495 if (IS_ERR(chip->data.regmap))
496 return dev_err_probe(&client->dev, PTR_ERR(chip->data.regmap),
497 "Regmap init failed\n");
498
499 chip->dev = &client->dev;
500 i2c_set_clientdata(client, chip);
501
502 ret = max_tcpci_read8(chip, TCPC_POWER_STATUS, &power_status);
503 if (ret < 0)
504 return dev_err_probe(&client->dev, ret,
505 "Failed to read TCPC_POWER_STATUS\n");
506
507 /* Chip level tcpci callbacks */
508 chip->data.set_vbus = max_tcpci_set_vbus;
509 chip->data.start_drp_toggling = max_tcpci_start_toggling;
510 chip->data.TX_BUF_BYTE_x_hidden = true;
511 chip->data.init = tcpci_init;
512 chip->data.frs_sourcing_vbus = max_tcpci_frs_sourcing_vbus;
513 chip->data.auto_discharge_disconnect = true;
514 chip->data.vbus_vsafe0v = true;
515 chip->data.set_partner_usb_comm_capable = max_tcpci_set_partner_usb_comm_capable;
516 chip->data.check_contaminant = max_tcpci_check_contaminant;
517 chip->data.cable_comm_capable = true;
518 chip->data.attempt_vconn_swap_discovery = max_tcpci_attempt_vconn_swap_discovery;
519
520 max_tcpci_init_regs(chip);
521 chip->tcpci = tcpci_register_port(chip->dev, &chip->data);
522 if (IS_ERR(chip->tcpci))
523 return dev_err_probe(&client->dev, PTR_ERR(chip->tcpci),
524 "TCPCI port registration failed\n");
525
526 ret = devm_add_action_or_reset(&client->dev,
527 max_tcpci_unregister_tcpci_port,
528 chip->tcpci);
529 if (ret)
530 return ret;
531
532 chip->port = tcpci_get_tcpm_port(chip->tcpci);
533
534 ret = max_tcpci_init_alert(chip, client);
535 if (ret < 0)
536 return dev_err_probe(&client->dev, ret,
537 "IRQ initialization failed\n");
538
539 device_init_wakeup(chip->dev, true);
540 return 0;
541 }
542
543 static const struct i2c_device_id max_tcpci_id[] = {
544 { "maxtcpc" },
545 { }
546 };
547 MODULE_DEVICE_TABLE(i2c, max_tcpci_id);
548
549 #ifdef CONFIG_OF
550 static const struct of_device_id max_tcpci_of_match[] = {
551 { .compatible = "maxim,max33359", },
552 {},
553 };
554 MODULE_DEVICE_TABLE(of, max_tcpci_of_match);
555 #endif
556
557 static struct i2c_driver max_tcpci_i2c_driver = {
558 .driver = {
559 .name = "maxtcpc",
560 .of_match_table = of_match_ptr(max_tcpci_of_match),
561 },
562 .probe = max_tcpci_probe,
563 .id_table = max_tcpci_id,
564 };
565 module_i2c_driver(max_tcpci_i2c_driver);
566
567 MODULE_AUTHOR("Badhri Jagan Sridharan <badhri@google.com>");
568 MODULE_DESCRIPTION("Maxim TCPCI based USB Type-C Port Controller Interface Driver");
569 MODULE_LICENSE("GPL v2");
570