xref: /linux/drivers/infiniband/hw/irdma/verbs.c (revision 55aa394a5ed871208eac11c5f4677cafd258c4dd)
1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
2 /* Copyright (c) 2015 - 2021 Intel Corporation */
3 #include "main.h"
4 
5 /**
6  * irdma_query_device - get device attributes
7  * @ibdev: device pointer from stack
8  * @props: returning device attributes
9  * @udata: user data
10  */
irdma_query_device(struct ib_device * ibdev,struct ib_device_attr * props,struct ib_udata * udata)11 static int irdma_query_device(struct ib_device *ibdev,
12 			      struct ib_device_attr *props,
13 			      struct ib_udata *udata)
14 {
15 	struct irdma_device *iwdev = to_iwdev(ibdev);
16 	struct irdma_pci_f *rf = iwdev->rf;
17 	struct pci_dev *pcidev = iwdev->rf->pcidev;
18 	struct irdma_hw_attrs *hw_attrs = &rf->sc_dev.hw_attrs;
19 
20 	if (udata->inlen || udata->outlen)
21 		return -EINVAL;
22 
23 	memset(props, 0, sizeof(*props));
24 	addrconf_addr_eui48((u8 *)&props->sys_image_guid,
25 			    iwdev->netdev->dev_addr);
26 	props->fw_ver = (u64)irdma_fw_major_ver(&rf->sc_dev) << 32 |
27 			irdma_fw_minor_ver(&rf->sc_dev);
28 	props->device_cap_flags = IB_DEVICE_MEM_WINDOW |
29 				  IB_DEVICE_MEM_MGT_EXTENSIONS;
30 	if (hw_attrs->uk_attrs.hw_rev < IRDMA_GEN_3)
31 		props->kernel_cap_flags = IBK_LOCAL_DMA_LKEY;
32 	props->vendor_id = pcidev->vendor;
33 	props->vendor_part_id = pcidev->device;
34 
35 	props->hw_ver = rf->pcidev->revision;
36 	props->page_size_cap = hw_attrs->page_size_cap;
37 	props->max_mr_size = hw_attrs->max_mr_size;
38 	props->max_qp = rf->max_qp - rf->used_qps;
39 	props->max_qp_wr = hw_attrs->max_qp_wr;
40 	props->max_send_sge = hw_attrs->uk_attrs.max_hw_wq_frags;
41 	props->max_recv_sge = hw_attrs->uk_attrs.max_hw_wq_frags;
42 	props->max_cq = rf->max_cq - rf->used_cqs;
43 	props->max_cqe = rf->max_cqe - 1;
44 	props->max_mr = rf->max_mr - rf->used_mrs;
45 	if (hw_attrs->uk_attrs.hw_rev >= IRDMA_GEN_3)
46 		props->max_mw = props->max_mr;
47 	props->max_pd = rf->max_pd - rf->used_pds;
48 	props->max_sge_rd = hw_attrs->uk_attrs.max_hw_read_sges;
49 	props->max_qp_rd_atom = hw_attrs->max_hw_ird;
50 	props->max_qp_init_rd_atom = hw_attrs->max_hw_ord;
51 	if (rdma_protocol_roce(ibdev, 1)) {
52 		props->device_cap_flags |= IB_DEVICE_RC_RNR_NAK_GEN;
53 		props->max_pkeys = IRDMA_PKEY_TBL_SZ;
54 	}
55 
56 	props->max_ah = rf->max_ah;
57 	props->max_mcast_grp = rf->max_mcg;
58 	props->max_mcast_qp_attach = IRDMA_MAX_MGS_PER_CTX;
59 	props->max_total_mcast_qp_attach = rf->max_qp * IRDMA_MAX_MGS_PER_CTX;
60 	props->max_fast_reg_page_list_len = IRDMA_MAX_PAGES_PER_FMR;
61 	props->max_srq = rf->max_srq - rf->used_srqs;
62 	props->max_srq_wr = IRDMA_MAX_SRQ_WRS;
63 	props->max_srq_sge = hw_attrs->uk_attrs.max_hw_wq_frags;
64 	if (hw_attrs->uk_attrs.feature_flags & IRDMA_FEATURE_ATOMIC_OPS)
65 		props->atomic_cap = IB_ATOMIC_HCA;
66 	else
67 		props->atomic_cap = IB_ATOMIC_NONE;
68 	props->masked_atomic_cap = props->atomic_cap;
69 	if (hw_attrs->uk_attrs.hw_rev >= IRDMA_GEN_3) {
70 #define HCA_CORE_CLOCK_KHZ 1000000UL
71 		props->timestamp_mask = GENMASK(31, 0);
72 		props->hca_core_clock = HCA_CORE_CLOCK_KHZ;
73 	}
74 	if (hw_attrs->uk_attrs.hw_rev >= IRDMA_GEN_3)
75 		props->device_cap_flags |= IB_DEVICE_MEM_WINDOW_TYPE_2B;
76 
77 	return 0;
78 }
79 
80 /**
81  * irdma_query_port - get port attributes
82  * @ibdev: device pointer from stack
83  * @port: port number for query
84  * @props: returning device attributes
85  */
irdma_query_port(struct ib_device * ibdev,u32 port,struct ib_port_attr * props)86 static int irdma_query_port(struct ib_device *ibdev, u32 port,
87 			    struct ib_port_attr *props)
88 {
89 	struct irdma_device *iwdev = to_iwdev(ibdev);
90 	struct net_device *netdev = iwdev->netdev;
91 
92 	/* no need to zero out pros here. done by caller */
93 
94 	props->max_mtu = IB_MTU_4096;
95 	props->active_mtu = ib_mtu_int_to_enum(netdev->mtu);
96 	props->lid = 1;
97 	props->lmc = 0;
98 	props->sm_lid = 0;
99 	props->sm_sl = 0;
100 	if (netif_carrier_ok(netdev) && netif_running(netdev)) {
101 		props->state = IB_PORT_ACTIVE;
102 		props->phys_state = IB_PORT_PHYS_STATE_LINK_UP;
103 	} else {
104 		props->state = IB_PORT_DOWN;
105 		props->phys_state = IB_PORT_PHYS_STATE_DISABLED;
106 	}
107 
108 	ib_get_eth_speed(ibdev, port, &props->active_speed,
109 			 &props->active_width);
110 
111 	if (rdma_protocol_roce(ibdev, 1)) {
112 		props->gid_tbl_len = 32;
113 		props->ip_gids = true;
114 		props->pkey_tbl_len = IRDMA_PKEY_TBL_SZ;
115 	} else {
116 		props->gid_tbl_len = 1;
117 	}
118 	props->qkey_viol_cntr = 0;
119 	props->port_cap_flags |= IB_PORT_CM_SUP | IB_PORT_REINIT_SUP;
120 	props->max_msg_sz = iwdev->rf->sc_dev.hw_attrs.max_hw_outbound_msg_size;
121 
122 	return 0;
123 }
124 
125 /**
126  * irdma_disassociate_ucontext - Disassociate user context
127  * @context: ib user context
128  */
irdma_disassociate_ucontext(struct ib_ucontext * context)129 static void irdma_disassociate_ucontext(struct ib_ucontext *context)
130 {
131 }
132 
irdma_mmap_legacy(struct irdma_ucontext * ucontext,struct vm_area_struct * vma)133 static int irdma_mmap_legacy(struct irdma_ucontext *ucontext,
134 			     struct vm_area_struct *vma)
135 {
136 	u64 pfn;
137 
138 	if (vma->vm_pgoff || vma->vm_end - vma->vm_start != PAGE_SIZE)
139 		return -EINVAL;
140 
141 	vma->vm_private_data = ucontext;
142 	pfn = ((uintptr_t)ucontext->iwdev->rf->sc_dev.hw_regs[IRDMA_DB_ADDR_OFFSET] +
143 	       pci_resource_start(ucontext->iwdev->rf->pcidev, 0)) >> PAGE_SHIFT;
144 
145 	return rdma_user_mmap_io(&ucontext->ibucontext, vma, pfn, PAGE_SIZE,
146 				 pgprot_noncached(vma->vm_page_prot), NULL);
147 }
148 
irdma_mmap_free(struct rdma_user_mmap_entry * rdma_entry)149 static void irdma_mmap_free(struct rdma_user_mmap_entry *rdma_entry)
150 {
151 	struct irdma_user_mmap_entry *entry = to_irdma_mmap_entry(rdma_entry);
152 
153 	kfree(entry);
154 }
155 
156 static struct rdma_user_mmap_entry*
irdma_user_mmap_entry_insert(struct irdma_ucontext * ucontext,u64 bar_offset,enum irdma_mmap_flag mmap_flag,u64 * mmap_offset)157 irdma_user_mmap_entry_insert(struct irdma_ucontext *ucontext, u64 bar_offset,
158 			     enum irdma_mmap_flag mmap_flag, u64 *mmap_offset)
159 {
160 	struct irdma_user_mmap_entry *entry = kzalloc(sizeof(*entry), GFP_KERNEL);
161 	int ret;
162 
163 	if (!entry)
164 		return NULL;
165 
166 	entry->bar_offset = bar_offset;
167 	entry->mmap_flag = mmap_flag;
168 
169 	ret = rdma_user_mmap_entry_insert(&ucontext->ibucontext,
170 					  &entry->rdma_entry, PAGE_SIZE);
171 	if (ret) {
172 		kfree(entry);
173 		return NULL;
174 	}
175 	*mmap_offset = rdma_user_mmap_get_offset(&entry->rdma_entry);
176 
177 	return &entry->rdma_entry;
178 }
179 
180 /**
181  * irdma_mmap - user memory map
182  * @context: context created during alloc
183  * @vma: kernel info for user memory map
184  */
irdma_mmap(struct ib_ucontext * context,struct vm_area_struct * vma)185 static int irdma_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
186 {
187 	struct rdma_user_mmap_entry *rdma_entry;
188 	struct irdma_user_mmap_entry *entry;
189 	struct irdma_ucontext *ucontext;
190 	u64 pfn;
191 	int ret;
192 
193 	ucontext = to_ucontext(context);
194 
195 	/* Legacy support for libi40iw with hard-coded mmap key */
196 	if (ucontext->legacy_mode)
197 		return irdma_mmap_legacy(ucontext, vma);
198 
199 	rdma_entry = rdma_user_mmap_entry_get(&ucontext->ibucontext, vma);
200 	if (!rdma_entry) {
201 		ibdev_dbg(&ucontext->iwdev->ibdev,
202 			  "VERBS: pgoff[0x%lx] does not have valid entry\n",
203 			  vma->vm_pgoff);
204 		return -EINVAL;
205 	}
206 
207 	entry = to_irdma_mmap_entry(rdma_entry);
208 	ibdev_dbg(&ucontext->iwdev->ibdev,
209 		  "VERBS: bar_offset [0x%llx] mmap_flag [%d]\n",
210 		  entry->bar_offset, entry->mmap_flag);
211 
212 	pfn = (entry->bar_offset +
213 	      pci_resource_start(ucontext->iwdev->rf->pcidev, 0)) >> PAGE_SHIFT;
214 
215 	switch (entry->mmap_flag) {
216 	case IRDMA_MMAP_IO_NC:
217 		ret = rdma_user_mmap_io(context, vma, pfn, PAGE_SIZE,
218 					pgprot_noncached(vma->vm_page_prot),
219 					rdma_entry);
220 		break;
221 	case IRDMA_MMAP_IO_WC:
222 		ret = rdma_user_mmap_io(context, vma, pfn, PAGE_SIZE,
223 					pgprot_writecombine(vma->vm_page_prot),
224 					rdma_entry);
225 		break;
226 	default:
227 		ret = -EINVAL;
228 	}
229 
230 	if (ret)
231 		ibdev_dbg(&ucontext->iwdev->ibdev,
232 			  "VERBS: bar_offset [0x%llx] mmap_flag[%d] err[%d]\n",
233 			  entry->bar_offset, entry->mmap_flag, ret);
234 	rdma_user_mmap_entry_put(rdma_entry);
235 
236 	return ret;
237 }
238 
239 /**
240  * irdma_alloc_push_page - allocate a push page for qp
241  * @iwqp: qp pointer
242  */
irdma_alloc_push_page(struct irdma_qp * iwqp)243 static void irdma_alloc_push_page(struct irdma_qp *iwqp)
244 {
245 	struct irdma_cqp_request *cqp_request;
246 	struct cqp_cmds_info *cqp_info;
247 	struct irdma_device *iwdev = iwqp->iwdev;
248 	struct irdma_sc_qp *qp = &iwqp->sc_qp;
249 	int status;
250 
251 	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
252 	if (!cqp_request)
253 		return;
254 
255 	cqp_info = &cqp_request->info;
256 	cqp_info->cqp_cmd = IRDMA_OP_MANAGE_PUSH_PAGE;
257 	cqp_info->post_sq = 1;
258 	cqp_info->in.u.manage_push_page.info.push_idx = 0;
259 	cqp_info->in.u.manage_push_page.info.qs_handle =
260 		qp->vsi->qos[qp->user_pri].qs_handle;
261 	cqp_info->in.u.manage_push_page.info.free_page = 0;
262 	cqp_info->in.u.manage_push_page.info.push_page_type = 0;
263 	cqp_info->in.u.manage_push_page.cqp = &iwdev->rf->cqp.sc_cqp;
264 	cqp_info->in.u.manage_push_page.scratch = (uintptr_t)cqp_request;
265 
266 	status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
267 	if (!status && cqp_request->compl_info.op_ret_val <
268 	    iwdev->rf->sc_dev.hw_attrs.max_hw_device_pages) {
269 		qp->push_idx = cqp_request->compl_info.op_ret_val;
270 		qp->push_offset = 0;
271 	}
272 
273 	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
274 }
275 
276 /**
277  * irdma_alloc_ucontext - Allocate the user context data structure
278  * @uctx: uverbs context pointer
279  * @udata: user data
280  *
281  * This keeps track of all objects associated with a particular
282  * user-mode client.
283  */
irdma_alloc_ucontext(struct ib_ucontext * uctx,struct ib_udata * udata)284 static int irdma_alloc_ucontext(struct ib_ucontext *uctx,
285 				struct ib_udata *udata)
286 {
287 #define IRDMA_ALLOC_UCTX_MIN_REQ_LEN offsetofend(struct irdma_alloc_ucontext_req, rsvd8)
288 #define IRDMA_ALLOC_UCTX_MIN_RESP_LEN offsetofend(struct irdma_alloc_ucontext_resp, rsvd)
289 	struct ib_device *ibdev = uctx->device;
290 	struct irdma_device *iwdev = to_iwdev(ibdev);
291 	struct irdma_alloc_ucontext_req req = {};
292 	struct irdma_alloc_ucontext_resp uresp = {};
293 	struct irdma_ucontext *ucontext = to_ucontext(uctx);
294 	struct irdma_uk_attrs *uk_attrs = &iwdev->rf->sc_dev.hw_attrs.uk_attrs;
295 
296 	if (udata->inlen < IRDMA_ALLOC_UCTX_MIN_REQ_LEN ||
297 	    udata->outlen < IRDMA_ALLOC_UCTX_MIN_RESP_LEN)
298 		return -EINVAL;
299 
300 	if (ib_copy_from_udata(&req, udata, min(sizeof(req), udata->inlen)))
301 		return -EINVAL;
302 
303 	if (req.userspace_ver < 4 || req.userspace_ver > IRDMA_ABI_VER)
304 		goto ver_error;
305 
306 	ucontext->iwdev = iwdev;
307 	ucontext->abi_ver = req.userspace_ver;
308 
309 	if (!(req.comp_mask & IRDMA_SUPPORT_WQE_FORMAT_V2) &&
310 	    uk_attrs->hw_rev >= IRDMA_GEN_3)
311 		return -EOPNOTSUPP;
312 
313 	if (req.comp_mask & IRDMA_ALLOC_UCTX_USE_RAW_ATTR)
314 		ucontext->use_raw_attrs = true;
315 
316 	/* GEN_1 legacy support with libi40iw */
317 	if (udata->outlen == IRDMA_ALLOC_UCTX_MIN_RESP_LEN) {
318 		if (uk_attrs->hw_rev != IRDMA_GEN_1)
319 			return -EOPNOTSUPP;
320 
321 		ucontext->legacy_mode = true;
322 		uresp.max_qps = iwdev->rf->max_qp;
323 		uresp.max_pds = iwdev->rf->sc_dev.hw_attrs.max_hw_pds;
324 		uresp.wq_size = iwdev->rf->sc_dev.hw_attrs.max_qp_wr * 2;
325 		uresp.kernel_ver = req.userspace_ver;
326 		if (ib_copy_to_udata(udata, &uresp,
327 				     min(sizeof(uresp), udata->outlen)))
328 			return -EFAULT;
329 	} else {
330 		u64 bar_off = (uintptr_t)iwdev->rf->sc_dev.hw_regs[IRDMA_DB_ADDR_OFFSET];
331 
332 		ucontext->db_mmap_entry =
333 			irdma_user_mmap_entry_insert(ucontext, bar_off,
334 						     IRDMA_MMAP_IO_NC,
335 						     &uresp.db_mmap_key);
336 		if (!ucontext->db_mmap_entry)
337 			return -ENOMEM;
338 
339 		uresp.kernel_ver = IRDMA_ABI_VER;
340 		uresp.feature_flags = uk_attrs->feature_flags;
341 		uresp.max_hw_wq_frags = uk_attrs->max_hw_wq_frags;
342 		uresp.max_hw_read_sges = uk_attrs->max_hw_read_sges;
343 		uresp.max_hw_inline = uk_attrs->max_hw_inline;
344 		uresp.max_hw_rq_quanta = uk_attrs->max_hw_rq_quanta;
345 		uresp.max_hw_wq_quanta = uk_attrs->max_hw_wq_quanta;
346 		uresp.max_hw_sq_chunk = uk_attrs->max_hw_sq_chunk;
347 		uresp.max_hw_cq_size = uk_attrs->max_hw_cq_size;
348 		uresp.min_hw_cq_size = uk_attrs->min_hw_cq_size;
349 		uresp.hw_rev = uk_attrs->hw_rev;
350 		uresp.comp_mask |= IRDMA_ALLOC_UCTX_USE_RAW_ATTR;
351 		uresp.min_hw_wq_size = uk_attrs->min_hw_wq_size;
352 		uresp.comp_mask |= IRDMA_ALLOC_UCTX_MIN_HW_WQ_SIZE;
353 		uresp.max_hw_srq_quanta = uk_attrs->max_hw_srq_quanta;
354 		uresp.comp_mask |= IRDMA_ALLOC_UCTX_MAX_HW_SRQ_QUANTA;
355 		if (ib_copy_to_udata(udata, &uresp,
356 				     min(sizeof(uresp), udata->outlen))) {
357 			rdma_user_mmap_entry_remove(ucontext->db_mmap_entry);
358 			return -EFAULT;
359 		}
360 	}
361 
362 	INIT_LIST_HEAD(&ucontext->cq_reg_mem_list);
363 	spin_lock_init(&ucontext->cq_reg_mem_list_lock);
364 	INIT_LIST_HEAD(&ucontext->qp_reg_mem_list);
365 	spin_lock_init(&ucontext->qp_reg_mem_list_lock);
366 	INIT_LIST_HEAD(&ucontext->srq_reg_mem_list);
367 	spin_lock_init(&ucontext->srq_reg_mem_list_lock);
368 
369 	return 0;
370 
371 ver_error:
372 	ibdev_err(&iwdev->ibdev,
373 		  "Invalid userspace driver version detected. Detected version %d, should be %d\n",
374 		  req.userspace_ver, IRDMA_ABI_VER);
375 	return -EINVAL;
376 }
377 
378 /**
379  * irdma_dealloc_ucontext - deallocate the user context data structure
380  * @context: user context created during alloc
381  */
irdma_dealloc_ucontext(struct ib_ucontext * context)382 static void irdma_dealloc_ucontext(struct ib_ucontext *context)
383 {
384 	struct irdma_ucontext *ucontext = to_ucontext(context);
385 
386 	rdma_user_mmap_entry_remove(ucontext->db_mmap_entry);
387 }
388 
389 /**
390  * irdma_alloc_pd - allocate protection domain
391  * @pd: PD pointer
392  * @udata: user data
393  */
irdma_alloc_pd(struct ib_pd * pd,struct ib_udata * udata)394 static int irdma_alloc_pd(struct ib_pd *pd, struct ib_udata *udata)
395 {
396 #define IRDMA_ALLOC_PD_MIN_RESP_LEN offsetofend(struct irdma_alloc_pd_resp, rsvd)
397 	struct irdma_pd *iwpd = to_iwpd(pd);
398 	struct irdma_device *iwdev = to_iwdev(pd->device);
399 	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
400 	struct irdma_pci_f *rf = iwdev->rf;
401 	struct irdma_alloc_pd_resp uresp = {};
402 	struct irdma_sc_pd *sc_pd;
403 	u32 pd_id = 0;
404 	int err;
405 
406 	if (udata && udata->outlen < IRDMA_ALLOC_PD_MIN_RESP_LEN)
407 		return -EINVAL;
408 
409 	err = irdma_alloc_rsrc(rf, rf->allocated_pds, rf->max_pd, &pd_id,
410 			       &rf->next_pd);
411 	if (err)
412 		return err;
413 
414 	sc_pd = &iwpd->sc_pd;
415 	if (udata) {
416 		struct irdma_ucontext *ucontext =
417 			rdma_udata_to_drv_context(udata, struct irdma_ucontext,
418 						  ibucontext);
419 		irdma_sc_pd_init(dev, sc_pd, pd_id, ucontext->abi_ver);
420 		uresp.pd_id = pd_id;
421 		if (ib_copy_to_udata(udata, &uresp,
422 				     min(sizeof(uresp), udata->outlen))) {
423 			err = -EFAULT;
424 			goto error;
425 		}
426 	} else {
427 		irdma_sc_pd_init(dev, sc_pd, pd_id, IRDMA_ABI_VER);
428 	}
429 
430 	return 0;
431 error:
432 	irdma_free_rsrc(rf, rf->allocated_pds, pd_id);
433 
434 	return err;
435 }
436 
437 /**
438  * irdma_dealloc_pd - deallocate pd
439  * @ibpd: ptr of pd to be deallocated
440  * @udata: user data
441  */
irdma_dealloc_pd(struct ib_pd * ibpd,struct ib_udata * udata)442 static int irdma_dealloc_pd(struct ib_pd *ibpd, struct ib_udata *udata)
443 {
444 	struct irdma_pd *iwpd = to_iwpd(ibpd);
445 	struct irdma_device *iwdev = to_iwdev(ibpd->device);
446 
447 	irdma_free_rsrc(iwdev->rf, iwdev->rf->allocated_pds, iwpd->sc_pd.pd_id);
448 
449 	return 0;
450 }
451 
452 /**
453  * irdma_get_pbl - Retrieve pbl from a list given a virtual
454  * address
455  * @va: user virtual address
456  * @pbl_list: pbl list to search in (QP's or CQ's)
457  */
irdma_get_pbl(unsigned long va,struct list_head * pbl_list)458 static struct irdma_pbl *irdma_get_pbl(unsigned long va,
459 				       struct list_head *pbl_list)
460 {
461 	struct irdma_pbl *iwpbl;
462 
463 	list_for_each_entry (iwpbl, pbl_list, list) {
464 		if (iwpbl->user_base == va) {
465 			list_del(&iwpbl->list);
466 			iwpbl->on_list = false;
467 			return iwpbl;
468 		}
469 	}
470 
471 	return NULL;
472 }
473 
474 /**
475  * irdma_clean_cqes - clean cq entries for qp
476  * @iwqp: qp ptr (user or kernel)
477  * @iwcq: cq ptr
478  */
irdma_clean_cqes(struct irdma_qp * iwqp,struct irdma_cq * iwcq)479 static void irdma_clean_cqes(struct irdma_qp *iwqp, struct irdma_cq *iwcq)
480 {
481 	struct irdma_cq_uk *ukcq = &iwcq->sc_cq.cq_uk;
482 	unsigned long flags;
483 
484 	spin_lock_irqsave(&iwcq->lock, flags);
485 	irdma_uk_clean_cq(&iwqp->sc_qp.qp_uk, ukcq);
486 	spin_unlock_irqrestore(&iwcq->lock, flags);
487 }
488 
irdma_remove_push_mmap_entries(struct irdma_qp * iwqp)489 static void irdma_remove_push_mmap_entries(struct irdma_qp *iwqp)
490 {
491 	if (iwqp->push_db_mmap_entry) {
492 		rdma_user_mmap_entry_remove(iwqp->push_db_mmap_entry);
493 		iwqp->push_db_mmap_entry = NULL;
494 	}
495 	if (iwqp->push_wqe_mmap_entry) {
496 		rdma_user_mmap_entry_remove(iwqp->push_wqe_mmap_entry);
497 		iwqp->push_wqe_mmap_entry = NULL;
498 	}
499 }
500 
irdma_setup_push_mmap_entries(struct irdma_ucontext * ucontext,struct irdma_qp * iwqp,u64 * push_wqe_mmap_key,u64 * push_db_mmap_key)501 static int irdma_setup_push_mmap_entries(struct irdma_ucontext *ucontext,
502 					 struct irdma_qp *iwqp,
503 					 u64 *push_wqe_mmap_key,
504 					 u64 *push_db_mmap_key)
505 {
506 	struct irdma_device *iwdev = ucontext->iwdev;
507 	u64 rsvd, bar_off;
508 
509 	rsvd = IRDMA_PF_BAR_RSVD;
510 	bar_off = (uintptr_t)iwdev->rf->sc_dev.hw_regs[IRDMA_DB_ADDR_OFFSET];
511 	/* skip over db page */
512 	bar_off += IRDMA_HW_PAGE_SIZE;
513 	/* push wqe page */
514 	bar_off += rsvd + iwqp->sc_qp.push_idx * IRDMA_HW_PAGE_SIZE;
515 	iwqp->push_wqe_mmap_entry = irdma_user_mmap_entry_insert(ucontext,
516 					bar_off, IRDMA_MMAP_IO_WC,
517 					push_wqe_mmap_key);
518 	if (!iwqp->push_wqe_mmap_entry)
519 		return -ENOMEM;
520 
521 	/* push doorbell page */
522 	bar_off += IRDMA_HW_PAGE_SIZE;
523 	iwqp->push_db_mmap_entry = irdma_user_mmap_entry_insert(ucontext,
524 					bar_off, IRDMA_MMAP_IO_NC,
525 					push_db_mmap_key);
526 	if (!iwqp->push_db_mmap_entry) {
527 		rdma_user_mmap_entry_remove(iwqp->push_wqe_mmap_entry);
528 		return -ENOMEM;
529 	}
530 
531 	return 0;
532 }
533 
534 /**
535  * irdma_destroy_qp - destroy qp
536  * @ibqp: qp's ib pointer also to get to device's qp address
537  * @udata: user data
538  */
irdma_destroy_qp(struct ib_qp * ibqp,struct ib_udata * udata)539 static int irdma_destroy_qp(struct ib_qp *ibqp, struct ib_udata *udata)
540 {
541 	struct irdma_qp *iwqp = to_iwqp(ibqp);
542 	struct irdma_device *iwdev = iwqp->iwdev;
543 
544 	iwqp->sc_qp.qp_uk.destroy_pending = true;
545 
546 	if (iwqp->iwarp_state >= IRDMA_QP_STATE_IDLE)
547 		irdma_modify_qp_to_err(&iwqp->sc_qp);
548 
549 	if (!iwqp->user_mode)
550 		cancel_delayed_work_sync(&iwqp->dwork_flush);
551 
552 	if (!iwqp->user_mode) {
553 		if (iwqp->iwscq) {
554 			irdma_clean_cqes(iwqp, iwqp->iwscq);
555 			if (iwqp->iwrcq != iwqp->iwscq)
556 				irdma_clean_cqes(iwqp, iwqp->iwrcq);
557 		}
558 	}
559 
560 	irdma_qp_rem_ref(&iwqp->ibqp);
561 	wait_for_completion(&iwqp->free_qp);
562 	irdma_free_lsmm_rsrc(iwqp);
563 	irdma_cqp_qp_destroy_cmd(&iwdev->rf->sc_dev, &iwqp->sc_qp);
564 
565 	irdma_remove_push_mmap_entries(iwqp);
566 
567 	if (iwqp->sc_qp.qp_uk.qp_id == 1)
568 		iwdev->rf->hwqp1_rsvd = false;
569 	irdma_free_qp_rsrc(iwqp);
570 
571 	return 0;
572 }
573 
574 /**
575  * irdma_setup_virt_qp - setup for allocation of virtual qp
576  * @iwdev: irdma device
577  * @iwqp: qp ptr
578  * @init_info: initialize info to return
579  */
irdma_setup_virt_qp(struct irdma_device * iwdev,struct irdma_qp * iwqp,struct irdma_qp_init_info * init_info)580 static void irdma_setup_virt_qp(struct irdma_device *iwdev,
581 			       struct irdma_qp *iwqp,
582 			       struct irdma_qp_init_info *init_info)
583 {
584 	struct irdma_pbl *iwpbl = iwqp->iwpbl;
585 	struct irdma_qp_mr *qpmr = &iwpbl->qp_mr;
586 
587 	iwqp->page = qpmr->sq_page;
588 	init_info->shadow_area_pa = qpmr->shadow;
589 	if (iwpbl->pbl_allocated) {
590 		init_info->virtual_map = true;
591 		init_info->sq_pa = qpmr->sq_pbl.idx;
592 		/* Need to use contiguous buffer for RQ of QP
593 		 * in case it is associated with SRQ.
594 		 */
595 		init_info->rq_pa = init_info->qp_uk_init_info.srq_uk ?
596 			qpmr->rq_pa : qpmr->rq_pbl.idx;
597 	} else {
598 		init_info->sq_pa = qpmr->sq_pbl.addr;
599 		init_info->rq_pa = qpmr->rq_pbl.addr;
600 	}
601 }
602 
603 /**
604  * irdma_setup_umode_qp - setup sq and rq size in user mode qp
605  * @udata: udata
606  * @iwdev: iwarp device
607  * @iwqp: qp ptr (user or kernel)
608  * @info: initialize info to return
609  * @init_attr: Initial QP create attributes
610  */
irdma_setup_umode_qp(struct ib_udata * udata,struct irdma_device * iwdev,struct irdma_qp * iwqp,struct irdma_qp_init_info * info,struct ib_qp_init_attr * init_attr)611 static int irdma_setup_umode_qp(struct ib_udata *udata,
612 				struct irdma_device *iwdev,
613 				struct irdma_qp *iwqp,
614 				struct irdma_qp_init_info *info,
615 				struct ib_qp_init_attr *init_attr)
616 {
617 	struct irdma_ucontext *ucontext = rdma_udata_to_drv_context(udata,
618 				struct irdma_ucontext, ibucontext);
619 	struct irdma_qp_uk_init_info *ukinfo = &info->qp_uk_init_info;
620 	struct irdma_create_qp_req req;
621 	unsigned long flags;
622 	int ret;
623 
624 	ret = ib_copy_from_udata(&req, udata,
625 				 min(sizeof(req), udata->inlen));
626 	if (ret) {
627 		ibdev_dbg(&iwdev->ibdev, "VERBS: ib_copy_from_data fail\n");
628 		return ret;
629 	}
630 
631 	iwqp->ctx_info.qp_compl_ctx = req.user_compl_ctx;
632 	iwqp->user_mode = 1;
633 	if (req.user_wqe_bufs) {
634 		info->qp_uk_init_info.legacy_mode = ucontext->legacy_mode;
635 		spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
636 		iwqp->iwpbl = irdma_get_pbl((unsigned long)req.user_wqe_bufs,
637 					    &ucontext->qp_reg_mem_list);
638 		spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
639 
640 		if (!iwqp->iwpbl) {
641 			ret = -ENODATA;
642 			ibdev_dbg(&iwdev->ibdev, "VERBS: no pbl info\n");
643 			return ret;
644 		}
645 	}
646 
647 	if (!ucontext->use_raw_attrs) {
648 		/**
649 		 * Maintain backward compat with older ABI which passes sq and
650 		 * rq depth in quanta in cap.max_send_wr and cap.max_recv_wr.
651 		 * There is no way to compute the correct value of
652 		 * iwqp->max_send_wr/max_recv_wr in the kernel.
653 		 */
654 		iwqp->max_send_wr = init_attr->cap.max_send_wr;
655 		iwqp->max_recv_wr = init_attr->cap.max_recv_wr;
656 		ukinfo->sq_size = init_attr->cap.max_send_wr;
657 		ukinfo->rq_size = init_attr->cap.max_recv_wr;
658 		irdma_uk_calc_shift_wq(ukinfo, &ukinfo->sq_shift,
659 				       &ukinfo->rq_shift);
660 	} else {
661 		ret = irdma_uk_calc_depth_shift_sq(ukinfo, &ukinfo->sq_depth,
662 						   &ukinfo->sq_shift);
663 		if (ret)
664 			return ret;
665 
666 		ret = irdma_uk_calc_depth_shift_rq(ukinfo, &ukinfo->rq_depth,
667 						   &ukinfo->rq_shift);
668 		if (ret)
669 			return ret;
670 
671 		iwqp->max_send_wr =
672 			(ukinfo->sq_depth - IRDMA_SQ_RSVD) >> ukinfo->sq_shift;
673 		iwqp->max_recv_wr =
674 			(ukinfo->rq_depth - IRDMA_RQ_RSVD) >> ukinfo->rq_shift;
675 		ukinfo->sq_size = ukinfo->sq_depth >> ukinfo->sq_shift;
676 		ukinfo->rq_size = ukinfo->rq_depth >> ukinfo->rq_shift;
677 	}
678 
679 	irdma_setup_virt_qp(iwdev, iwqp, info);
680 
681 	return 0;
682 }
683 
684 /**
685  * irdma_setup_kmode_qp - setup initialization for kernel mode qp
686  * @iwdev: iwarp device
687  * @iwqp: qp ptr (user or kernel)
688  * @info: initialize info to return
689  * @init_attr: Initial QP create attributes
690  */
irdma_setup_kmode_qp(struct irdma_device * iwdev,struct irdma_qp * iwqp,struct irdma_qp_init_info * info,struct ib_qp_init_attr * init_attr)691 static int irdma_setup_kmode_qp(struct irdma_device *iwdev,
692 				struct irdma_qp *iwqp,
693 				struct irdma_qp_init_info *info,
694 				struct ib_qp_init_attr *init_attr)
695 {
696 	struct irdma_dma_mem *mem = &iwqp->kqp.dma_mem;
697 	u32 size;
698 	int status;
699 	struct irdma_qp_uk_init_info *ukinfo = &info->qp_uk_init_info;
700 
701 	status = irdma_uk_calc_depth_shift_sq(ukinfo, &ukinfo->sq_depth,
702 					      &ukinfo->sq_shift);
703 	if (status)
704 		return status;
705 
706 	status = irdma_uk_calc_depth_shift_rq(ukinfo, &ukinfo->rq_depth,
707 					      &ukinfo->rq_shift);
708 	if (status)
709 		return status;
710 
711 	iwqp->kqp.sq_wrid_mem =
712 		kcalloc(ukinfo->sq_depth, sizeof(*iwqp->kqp.sq_wrid_mem), GFP_KERNEL);
713 	if (!iwqp->kqp.sq_wrid_mem)
714 		return -ENOMEM;
715 
716 	iwqp->kqp.rq_wrid_mem =
717 		kcalloc(ukinfo->rq_depth, sizeof(*iwqp->kqp.rq_wrid_mem), GFP_KERNEL);
718 
719 	if (!iwqp->kqp.rq_wrid_mem) {
720 		kfree(iwqp->kqp.sq_wrid_mem);
721 		iwqp->kqp.sq_wrid_mem = NULL;
722 		return -ENOMEM;
723 	}
724 
725 	ukinfo->sq_wrtrk_array = iwqp->kqp.sq_wrid_mem;
726 	ukinfo->rq_wrid_array = iwqp->kqp.rq_wrid_mem;
727 
728 	size = (ukinfo->sq_depth + ukinfo->rq_depth) * IRDMA_QP_WQE_MIN_SIZE;
729 	size += (IRDMA_SHADOW_AREA_SIZE << 3);
730 
731 	mem->size = ALIGN(size, 256);
732 	mem->va = dma_alloc_coherent(iwdev->rf->hw.device, mem->size,
733 				     &mem->pa, GFP_KERNEL);
734 	if (!mem->va) {
735 		kfree(iwqp->kqp.sq_wrid_mem);
736 		iwqp->kqp.sq_wrid_mem = NULL;
737 		kfree(iwqp->kqp.rq_wrid_mem);
738 		iwqp->kqp.rq_wrid_mem = NULL;
739 		return -ENOMEM;
740 	}
741 
742 	ukinfo->sq = mem->va;
743 	info->sq_pa = mem->pa;
744 	ukinfo->rq = &ukinfo->sq[ukinfo->sq_depth];
745 	info->rq_pa = info->sq_pa + (ukinfo->sq_depth * IRDMA_QP_WQE_MIN_SIZE);
746 	ukinfo->shadow_area = ukinfo->rq[ukinfo->rq_depth].elem;
747 	info->shadow_area_pa =
748 		info->rq_pa + (ukinfo->rq_depth * IRDMA_QP_WQE_MIN_SIZE);
749 	ukinfo->sq_size = ukinfo->sq_depth >> ukinfo->sq_shift;
750 	ukinfo->rq_size = ukinfo->rq_depth >> ukinfo->rq_shift;
751 	ukinfo->qp_id = info->qp_uk_init_info.qp_id;
752 
753 	iwqp->max_send_wr = (ukinfo->sq_depth - IRDMA_SQ_RSVD) >> ukinfo->sq_shift;
754 	iwqp->max_recv_wr = (ukinfo->rq_depth - IRDMA_RQ_RSVD) >> ukinfo->rq_shift;
755 	init_attr->cap.max_send_wr = iwqp->max_send_wr;
756 	init_attr->cap.max_recv_wr = iwqp->max_recv_wr;
757 
758 	return 0;
759 }
760 
irdma_cqp_create_qp_cmd(struct irdma_qp * iwqp)761 static int irdma_cqp_create_qp_cmd(struct irdma_qp *iwqp)
762 {
763 	struct irdma_pci_f *rf = iwqp->iwdev->rf;
764 	struct irdma_cqp_request *cqp_request;
765 	struct cqp_cmds_info *cqp_info;
766 	struct irdma_create_qp_info *qp_info;
767 	int status;
768 
769 	cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
770 	if (!cqp_request)
771 		return -ENOMEM;
772 
773 	cqp_info = &cqp_request->info;
774 	qp_info = &cqp_request->info.in.u.qp_create.info;
775 	qp_info->mac_valid = true;
776 	qp_info->cq_num_valid = true;
777 	qp_info->next_iwarp_state = IRDMA_QP_STATE_IDLE;
778 
779 	cqp_info->cqp_cmd = IRDMA_OP_QP_CREATE;
780 	cqp_info->post_sq = 1;
781 	cqp_info->in.u.qp_create.qp = &iwqp->sc_qp;
782 	cqp_info->in.u.qp_create.scratch = (uintptr_t)cqp_request;
783 	status = irdma_handle_cqp_op(rf, cqp_request);
784 	irdma_put_cqp_request(&rf->cqp, cqp_request);
785 
786 	return status;
787 }
788 
irdma_roce_fill_and_set_qpctx_info(struct irdma_qp * iwqp,struct irdma_qp_host_ctx_info * ctx_info)789 static void irdma_roce_fill_and_set_qpctx_info(struct irdma_qp *iwqp,
790 					       struct irdma_qp_host_ctx_info *ctx_info)
791 {
792 	struct irdma_device *iwdev = iwqp->iwdev;
793 	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
794 	struct irdma_roce_offload_info *roce_info;
795 	struct irdma_udp_offload_info *udp_info;
796 
797 	udp_info = &iwqp->udp_info;
798 	udp_info->snd_mss = ib_mtu_enum_to_int(ib_mtu_int_to_enum(iwdev->vsi.mtu));
799 	udp_info->cwnd = iwdev->roce_cwnd;
800 	udp_info->rexmit_thresh = 2;
801 	udp_info->rnr_nak_thresh = 2;
802 	udp_info->src_port = 0xc000;
803 	udp_info->dst_port = ROCE_V2_UDP_DPORT;
804 	roce_info = &iwqp->roce_info;
805 	ether_addr_copy(roce_info->mac_addr, iwdev->netdev->dev_addr);
806 
807 	if (iwqp->ibqp.qp_type == IB_QPT_GSI && iwqp->ibqp.qp_num != 1)
808 		roce_info->is_qp1 = true;
809 	roce_info->rd_en = true;
810 	roce_info->wr_rdresp_en = true;
811 	if (dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_3)
812 		roce_info->bind_en = true;
813 	roce_info->dcqcn_en = false;
814 	roce_info->rtomin = 5;
815 
816 	roce_info->ack_credits = iwdev->roce_ackcreds;
817 	roce_info->ird_size = dev->hw_attrs.max_hw_ird;
818 	roce_info->ord_size = dev->hw_attrs.max_hw_ord;
819 
820 	if (!iwqp->user_mode) {
821 		roce_info->priv_mode_en = true;
822 		roce_info->fast_reg_en = true;
823 		roce_info->udprivcq_en = true;
824 	}
825 	roce_info->roce_tver = 0;
826 
827 	ctx_info->roce_info = &iwqp->roce_info;
828 	ctx_info->udp_info = &iwqp->udp_info;
829 	irdma_sc_qp_setctx_roce(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info);
830 }
831 
irdma_iw_fill_and_set_qpctx_info(struct irdma_qp * iwqp,struct irdma_qp_host_ctx_info * ctx_info)832 static void irdma_iw_fill_and_set_qpctx_info(struct irdma_qp *iwqp,
833 					     struct irdma_qp_host_ctx_info *ctx_info)
834 {
835 	struct irdma_device *iwdev = iwqp->iwdev;
836 	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
837 	struct irdma_iwarp_offload_info *iwarp_info;
838 
839 	iwarp_info = &iwqp->iwarp_info;
840 	ether_addr_copy(iwarp_info->mac_addr, iwdev->netdev->dev_addr);
841 	iwarp_info->rd_en = true;
842 	iwarp_info->wr_rdresp_en = true;
843 	iwarp_info->ecn_en = true;
844 	iwarp_info->rtomin = 5;
845 
846 	if (dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2)
847 		iwarp_info->ib_rd_en = true;
848 	if (!iwqp->user_mode) {
849 		iwarp_info->priv_mode_en = true;
850 		iwarp_info->fast_reg_en = true;
851 	}
852 	iwarp_info->ddp_ver = 1;
853 	iwarp_info->rdmap_ver = 1;
854 
855 	ctx_info->iwarp_info = &iwqp->iwarp_info;
856 	ctx_info->iwarp_info_valid = true;
857 	irdma_sc_qp_setctx(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info);
858 	ctx_info->iwarp_info_valid = false;
859 }
860 
irdma_validate_qp_attrs(struct ib_qp_init_attr * init_attr,struct irdma_device * iwdev)861 static int irdma_validate_qp_attrs(struct ib_qp_init_attr *init_attr,
862 				   struct irdma_device *iwdev)
863 {
864 	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
865 	struct irdma_uk_attrs *uk_attrs = &dev->hw_attrs.uk_attrs;
866 
867 	if (init_attr->create_flags)
868 		return -EOPNOTSUPP;
869 
870 	if (init_attr->cap.max_inline_data > uk_attrs->max_hw_inline ||
871 	    init_attr->cap.max_send_sge > uk_attrs->max_hw_wq_frags ||
872 	    init_attr->cap.max_recv_sge > uk_attrs->max_hw_wq_frags ||
873 	    init_attr->cap.max_send_wr > uk_attrs->max_hw_wq_quanta ||
874 	    init_attr->cap.max_recv_wr > uk_attrs->max_hw_rq_quanta)
875 		return -EINVAL;
876 
877 	if (rdma_protocol_roce(&iwdev->ibdev, 1)) {
878 		if (init_attr->qp_type != IB_QPT_RC &&
879 		    init_attr->qp_type != IB_QPT_UD &&
880 		    init_attr->qp_type != IB_QPT_GSI)
881 			return -EOPNOTSUPP;
882 	} else {
883 		if (init_attr->qp_type != IB_QPT_RC)
884 			return -EOPNOTSUPP;
885 	}
886 
887 	return 0;
888 }
889 
irdma_flush_worker(struct work_struct * work)890 static void irdma_flush_worker(struct work_struct *work)
891 {
892 	struct delayed_work *dwork = to_delayed_work(work);
893 	struct irdma_qp *iwqp = container_of(dwork, struct irdma_qp, dwork_flush);
894 
895 	irdma_generate_flush_completions(iwqp);
896 }
897 
irdma_setup_gsi_qp_rsrc(struct irdma_qp * iwqp,u32 * qp_num)898 static int irdma_setup_gsi_qp_rsrc(struct irdma_qp *iwqp, u32 *qp_num)
899 {
900 	struct irdma_device *iwdev = iwqp->iwdev;
901 	struct irdma_pci_f *rf = iwdev->rf;
902 	unsigned long flags;
903 	int ret;
904 
905 	if (rf->rdma_ver <= IRDMA_GEN_2) {
906 		*qp_num = 1;
907 		return 0;
908 	}
909 
910 	spin_lock_irqsave(&rf->rsrc_lock, flags);
911 	if (!rf->hwqp1_rsvd) {
912 		*qp_num = 1;
913 		rf->hwqp1_rsvd = true;
914 		spin_unlock_irqrestore(&rf->rsrc_lock, flags);
915 	} else {
916 		spin_unlock_irqrestore(&rf->rsrc_lock, flags);
917 		ret = irdma_alloc_rsrc(rf, rf->allocated_qps, rf->max_qp,
918 				       qp_num, &rf->next_qp);
919 		if (ret)
920 			return ret;
921 	}
922 
923 	ret = irdma_vchnl_req_add_vport(&rf->sc_dev, iwdev->vport_id, *qp_num,
924 					(&iwdev->vsi)->qos);
925 	if (ret) {
926 		if (*qp_num != 1) {
927 			irdma_free_rsrc(rf, rf->allocated_qps, *qp_num);
928 		} else {
929 			spin_lock_irqsave(&rf->rsrc_lock, flags);
930 			rf->hwqp1_rsvd = false;
931 			spin_unlock_irqrestore(&rf->rsrc_lock, flags);
932 		}
933 		return ret;
934 	}
935 
936 	return 0;
937 }
938 
939 /**
940  * irdma_create_qp - create qp
941  * @ibqp: ptr of qp
942  * @init_attr: attributes for qp
943  * @udata: user data for create qp
944  */
irdma_create_qp(struct ib_qp * ibqp,struct ib_qp_init_attr * init_attr,struct ib_udata * udata)945 static int irdma_create_qp(struct ib_qp *ibqp,
946 			   struct ib_qp_init_attr *init_attr,
947 			   struct ib_udata *udata)
948 {
949 #define IRDMA_CREATE_QP_MIN_REQ_LEN offsetofend(struct irdma_create_qp_req, user_compl_ctx)
950 #define IRDMA_CREATE_QP_MIN_RESP_LEN offsetofend(struct irdma_create_qp_resp, rsvd)
951 	struct ib_pd *ibpd = ibqp->pd;
952 	struct irdma_pd *iwpd = to_iwpd(ibpd);
953 	struct irdma_device *iwdev = to_iwdev(ibpd->device);
954 	struct irdma_pci_f *rf = iwdev->rf;
955 	struct irdma_qp *iwqp = to_iwqp(ibqp);
956 	struct irdma_create_qp_resp uresp = {};
957 	u32 qp_num = 0;
958 	int err_code;
959 	struct irdma_sc_qp *qp;
960 	struct irdma_sc_dev *dev = &rf->sc_dev;
961 	struct irdma_uk_attrs *uk_attrs = &dev->hw_attrs.uk_attrs;
962 	struct irdma_qp_init_info init_info = {};
963 	struct irdma_qp_host_ctx_info *ctx_info;
964 	struct irdma_srq *iwsrq;
965 	bool srq_valid = false;
966 	u32 srq_id = 0;
967 
968 	if (init_attr->srq) {
969 		iwsrq = to_iwsrq(init_attr->srq);
970 		srq_valid = true;
971 		srq_id = iwsrq->srq_num;
972 		init_attr->cap.max_recv_sge = uk_attrs->max_hw_wq_frags;
973 		init_attr->cap.max_recv_wr = 4;
974 		init_info.qp_uk_init_info.srq_uk = &iwsrq->sc_srq.srq_uk;
975 	}
976 
977 	err_code = irdma_validate_qp_attrs(init_attr, iwdev);
978 	if (err_code)
979 		return err_code;
980 
981 	if (udata && (udata->inlen < IRDMA_CREATE_QP_MIN_REQ_LEN ||
982 		      udata->outlen < IRDMA_CREATE_QP_MIN_RESP_LEN))
983 		return -EINVAL;
984 
985 	init_info.vsi = &iwdev->vsi;
986 	init_info.qp_uk_init_info.uk_attrs = uk_attrs;
987 	init_info.qp_uk_init_info.sq_size = init_attr->cap.max_send_wr;
988 	init_info.qp_uk_init_info.rq_size = init_attr->cap.max_recv_wr;
989 	init_info.qp_uk_init_info.max_sq_frag_cnt = init_attr->cap.max_send_sge;
990 	init_info.qp_uk_init_info.max_rq_frag_cnt = init_attr->cap.max_recv_sge;
991 	init_info.qp_uk_init_info.max_inline_data = init_attr->cap.max_inline_data;
992 
993 	qp = &iwqp->sc_qp;
994 	qp->qp_uk.back_qp = iwqp;
995 	qp->push_idx = IRDMA_INVALID_PUSH_PAGE_INDEX;
996 
997 	iwqp->iwdev = iwdev;
998 	iwqp->q2_ctx_mem.size = ALIGN(IRDMA_Q2_BUF_SIZE + IRDMA_QP_CTX_SIZE,
999 				      256);
1000 	iwqp->q2_ctx_mem.va = dma_alloc_coherent(dev->hw->device,
1001 						 iwqp->q2_ctx_mem.size,
1002 						 &iwqp->q2_ctx_mem.pa,
1003 						 GFP_KERNEL);
1004 	if (!iwqp->q2_ctx_mem.va)
1005 		return -ENOMEM;
1006 
1007 	init_info.q2 = iwqp->q2_ctx_mem.va;
1008 	init_info.q2_pa = iwqp->q2_ctx_mem.pa;
1009 	init_info.host_ctx = (__le64 *)(init_info.q2 + IRDMA_Q2_BUF_SIZE);
1010 	init_info.host_ctx_pa = init_info.q2_pa + IRDMA_Q2_BUF_SIZE;
1011 
1012 	if (init_attr->qp_type == IB_QPT_GSI) {
1013 		err_code = irdma_setup_gsi_qp_rsrc(iwqp, &qp_num);
1014 		if (err_code)
1015 			goto error;
1016 		iwqp->ibqp.qp_num = 1;
1017 	} else {
1018 		err_code = irdma_alloc_rsrc(rf, rf->allocated_qps, rf->max_qp,
1019 					    &qp_num, &rf->next_qp);
1020 		if (err_code)
1021 			goto error;
1022 		iwqp->ibqp.qp_num = qp_num;
1023 	}
1024 
1025 	iwqp->iwpd = iwpd;
1026 	qp = &iwqp->sc_qp;
1027 	iwqp->iwscq = to_iwcq(init_attr->send_cq);
1028 	iwqp->iwrcq = to_iwcq(init_attr->recv_cq);
1029 	iwqp->host_ctx.va = init_info.host_ctx;
1030 	iwqp->host_ctx.pa = init_info.host_ctx_pa;
1031 	iwqp->host_ctx.size = IRDMA_QP_CTX_SIZE;
1032 
1033 	init_info.pd = &iwpd->sc_pd;
1034 	init_info.qp_uk_init_info.qp_id = qp_num;
1035 	if (!rdma_protocol_roce(&iwdev->ibdev, 1))
1036 		init_info.qp_uk_init_info.first_sq_wq = 1;
1037 	iwqp->ctx_info.qp_compl_ctx = (uintptr_t)qp;
1038 	init_waitqueue_head(&iwqp->waitq);
1039 	init_waitqueue_head(&iwqp->mod_qp_waitq);
1040 
1041 	if (udata) {
1042 		init_info.qp_uk_init_info.abi_ver = iwpd->sc_pd.abi_ver;
1043 		err_code = irdma_setup_umode_qp(udata, iwdev, iwqp, &init_info,
1044 						init_attr);
1045 	} else {
1046 		INIT_DELAYED_WORK(&iwqp->dwork_flush, irdma_flush_worker);
1047 		init_info.qp_uk_init_info.abi_ver = IRDMA_ABI_VER;
1048 		err_code = irdma_setup_kmode_qp(iwdev, iwqp, &init_info, init_attr);
1049 	}
1050 
1051 	if (err_code) {
1052 		ibdev_dbg(&iwdev->ibdev, "VERBS: setup qp failed\n");
1053 		goto error;
1054 	}
1055 
1056 	if (rdma_protocol_roce(&iwdev->ibdev, 1)) {
1057 		if (init_attr->qp_type == IB_QPT_RC) {
1058 			init_info.qp_uk_init_info.type = IRDMA_QP_TYPE_ROCE_RC;
1059 			init_info.qp_uk_init_info.qp_caps = IRDMA_SEND_WITH_IMM |
1060 							    IRDMA_WRITE_WITH_IMM |
1061 							    IRDMA_ROCE;
1062 		} else {
1063 			init_info.qp_uk_init_info.type = IRDMA_QP_TYPE_ROCE_UD;
1064 			init_info.qp_uk_init_info.qp_caps = IRDMA_SEND_WITH_IMM |
1065 							    IRDMA_ROCE;
1066 		}
1067 	} else {
1068 		init_info.qp_uk_init_info.type = IRDMA_QP_TYPE_IWARP;
1069 		init_info.qp_uk_init_info.qp_caps = IRDMA_WRITE_WITH_IMM;
1070 	}
1071 
1072 	if (dev->hw_attrs.uk_attrs.hw_rev > IRDMA_GEN_1)
1073 		init_info.qp_uk_init_info.qp_caps |= IRDMA_PUSH_MODE;
1074 
1075 	err_code = irdma_sc_qp_init(qp, &init_info);
1076 	if (err_code) {
1077 		ibdev_dbg(&iwdev->ibdev, "VERBS: qp_init fail\n");
1078 		goto error;
1079 	}
1080 
1081 	ctx_info = &iwqp->ctx_info;
1082 	ctx_info->srq_valid = srq_valid;
1083 	ctx_info->srq_id = srq_id;
1084 	ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
1085 	ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
1086 
1087 	if (rdma_protocol_roce(&iwdev->ibdev, 1)) {
1088 		if (dev->ws_add(&iwdev->vsi, 0)) {
1089 			irdma_cqp_qp_destroy_cmd(&rf->sc_dev, &iwqp->sc_qp);
1090 			err_code = -EINVAL;
1091 			goto error;
1092 		}
1093 		irdma_qp_add_qos(&iwqp->sc_qp);
1094 		irdma_roce_fill_and_set_qpctx_info(iwqp, ctx_info);
1095 	} else {
1096 		irdma_iw_fill_and_set_qpctx_info(iwqp, ctx_info);
1097 	}
1098 
1099 	err_code = irdma_cqp_create_qp_cmd(iwqp);
1100 	if (err_code)
1101 		goto error;
1102 
1103 	refcount_set(&iwqp->refcnt, 1);
1104 	spin_lock_init(&iwqp->lock);
1105 	spin_lock_init(&iwqp->sc_qp.pfpdu.lock);
1106 	iwqp->sig_all = init_attr->sq_sig_type == IB_SIGNAL_ALL_WR;
1107 	rf->qp_table[qp_num] = iwqp;
1108 
1109 	if (udata) {
1110 		/* GEN_1 legacy support with libi40iw does not have expanded uresp struct */
1111 		if (udata->outlen < sizeof(uresp)) {
1112 			uresp.lsmm = 1;
1113 			uresp.push_idx = IRDMA_INVALID_PUSH_PAGE_INDEX_GEN_1;
1114 		} else {
1115 			if (rdma_protocol_iwarp(&iwdev->ibdev, 1))
1116 				uresp.lsmm = 1;
1117 		}
1118 		uresp.actual_sq_size = init_info.qp_uk_init_info.sq_size;
1119 		uresp.actual_rq_size = init_info.qp_uk_init_info.rq_size;
1120 		uresp.qp_id = qp_num;
1121 		uresp.qp_caps = qp->qp_uk.qp_caps;
1122 
1123 		err_code = ib_copy_to_udata(udata, &uresp,
1124 					    min(sizeof(uresp), udata->outlen));
1125 		if (err_code) {
1126 			ibdev_dbg(&iwdev->ibdev, "VERBS: copy_to_udata failed\n");
1127 			irdma_destroy_qp(&iwqp->ibqp, udata);
1128 			return err_code;
1129 		}
1130 	}
1131 
1132 	init_completion(&iwqp->free_qp);
1133 	return 0;
1134 
1135 error:
1136 	irdma_free_qp_rsrc(iwqp);
1137 	return err_code;
1138 }
1139 
irdma_get_ib_acc_flags(struct irdma_qp * iwqp)1140 static int irdma_get_ib_acc_flags(struct irdma_qp *iwqp)
1141 {
1142 	int acc_flags = 0;
1143 
1144 	if (rdma_protocol_roce(iwqp->ibqp.device, 1)) {
1145 		if (iwqp->roce_info.wr_rdresp_en) {
1146 			acc_flags |= IB_ACCESS_LOCAL_WRITE;
1147 			acc_flags |= IB_ACCESS_REMOTE_WRITE;
1148 		}
1149 		if (iwqp->roce_info.rd_en)
1150 			acc_flags |= IB_ACCESS_REMOTE_READ;
1151 		if (iwqp->roce_info.bind_en)
1152 			acc_flags |= IB_ACCESS_MW_BIND;
1153 		if (iwqp->ctx_info.remote_atomics_en)
1154 			acc_flags |= IB_ACCESS_REMOTE_ATOMIC;
1155 	} else {
1156 		if (iwqp->iwarp_info.wr_rdresp_en) {
1157 			acc_flags |= IB_ACCESS_LOCAL_WRITE;
1158 			acc_flags |= IB_ACCESS_REMOTE_WRITE;
1159 		}
1160 		if (iwqp->iwarp_info.rd_en)
1161 			acc_flags |= IB_ACCESS_REMOTE_READ;
1162 		if (iwqp->ctx_info.remote_atomics_en)
1163 			acc_flags |= IB_ACCESS_REMOTE_ATOMIC;
1164 	}
1165 	return acc_flags;
1166 }
1167 
1168 /**
1169  * irdma_query_qp - query qp attributes
1170  * @ibqp: qp pointer
1171  * @attr: attributes pointer
1172  * @attr_mask: Not used
1173  * @init_attr: qp attributes to return
1174  */
irdma_query_qp(struct ib_qp * ibqp,struct ib_qp_attr * attr,int attr_mask,struct ib_qp_init_attr * init_attr)1175 static int irdma_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1176 			  int attr_mask, struct ib_qp_init_attr *init_attr)
1177 {
1178 	struct irdma_qp *iwqp = to_iwqp(ibqp);
1179 	struct irdma_sc_qp *qp = &iwqp->sc_qp;
1180 
1181 	memset(attr, 0, sizeof(*attr));
1182 	memset(init_attr, 0, sizeof(*init_attr));
1183 
1184 	attr->qp_state = iwqp->ibqp_state;
1185 	attr->cur_qp_state = iwqp->ibqp_state;
1186 	attr->cap.max_send_wr = iwqp->max_send_wr;
1187 	attr->cap.max_recv_wr = iwqp->max_recv_wr;
1188 	attr->cap.max_inline_data = qp->qp_uk.max_inline_data;
1189 	attr->cap.max_send_sge = qp->qp_uk.max_sq_frag_cnt;
1190 	attr->cap.max_recv_sge = qp->qp_uk.max_rq_frag_cnt;
1191 	attr->qp_access_flags = irdma_get_ib_acc_flags(iwqp);
1192 	attr->port_num = 1;
1193 	if (rdma_protocol_roce(ibqp->device, 1)) {
1194 		attr->path_mtu = ib_mtu_int_to_enum(iwqp->udp_info.snd_mss);
1195 		attr->qkey = iwqp->roce_info.qkey;
1196 		attr->rq_psn = iwqp->udp_info.epsn;
1197 		attr->sq_psn = iwqp->udp_info.psn_nxt;
1198 		attr->dest_qp_num = iwqp->roce_info.dest_qp;
1199 		attr->pkey_index = iwqp->roce_info.p_key;
1200 		attr->retry_cnt = iwqp->udp_info.rexmit_thresh;
1201 		attr->rnr_retry = iwqp->udp_info.rnr_nak_thresh;
1202 		attr->min_rnr_timer = iwqp->udp_info.min_rnr_timer;
1203 		attr->max_rd_atomic = iwqp->roce_info.ord_size;
1204 		attr->max_dest_rd_atomic = iwqp->roce_info.ird_size;
1205 	}
1206 
1207 	init_attr->event_handler = iwqp->ibqp.event_handler;
1208 	init_attr->qp_context = iwqp->ibqp.qp_context;
1209 	init_attr->send_cq = iwqp->ibqp.send_cq;
1210 	init_attr->recv_cq = iwqp->ibqp.recv_cq;
1211 	init_attr->srq = iwqp->ibqp.srq;
1212 	init_attr->cap = attr->cap;
1213 
1214 	return 0;
1215 }
1216 
1217 /**
1218  * irdma_query_pkey - Query partition key
1219  * @ibdev: device pointer from stack
1220  * @port: port number
1221  * @index: index of pkey
1222  * @pkey: pointer to store the pkey
1223  */
irdma_query_pkey(struct ib_device * ibdev,u32 port,u16 index,u16 * pkey)1224 static int irdma_query_pkey(struct ib_device *ibdev, u32 port, u16 index,
1225 			    u16 *pkey)
1226 {
1227 	if (index >= IRDMA_PKEY_TBL_SZ)
1228 		return -EINVAL;
1229 
1230 	*pkey = IRDMA_DEFAULT_PKEY;
1231 	return 0;
1232 }
1233 
irdma_roce_get_vlan_prio(const struct ib_gid_attr * attr,u8 prio)1234 static u8 irdma_roce_get_vlan_prio(const struct ib_gid_attr *attr, u8 prio)
1235 {
1236 	struct net_device *ndev;
1237 
1238 	rcu_read_lock();
1239 	ndev = rcu_dereference(attr->ndev);
1240 	if (!ndev)
1241 		goto exit;
1242 	if (is_vlan_dev(ndev)) {
1243 		u16 vlan_qos = vlan_dev_get_egress_qos_mask(ndev, prio);
1244 
1245 		prio = (vlan_qos & VLAN_PRIO_MASK) >> VLAN_PRIO_SHIFT;
1246 	}
1247 exit:
1248 	rcu_read_unlock();
1249 	return prio;
1250 }
1251 
irdma_wait_for_suspend(struct irdma_qp * iwqp)1252 static int irdma_wait_for_suspend(struct irdma_qp *iwqp)
1253 {
1254 	if (!wait_event_timeout(iwqp->iwdev->suspend_wq,
1255 				!iwqp->suspend_pending,
1256 				msecs_to_jiffies(IRDMA_EVENT_TIMEOUT_MS))) {
1257 		iwqp->suspend_pending = false;
1258 		ibdev_warn(&iwqp->iwdev->ibdev,
1259 			   "modify_qp timed out waiting for suspend. qp_id = %d, last_ae = 0x%x\n",
1260 			   iwqp->ibqp.qp_num, iwqp->last_aeq);
1261 		return -EBUSY;
1262 	}
1263 
1264 	return 0;
1265 }
1266 
1267 /**
1268  * irdma_modify_qp_roce - modify qp request
1269  * @ibqp: qp's pointer for modify
1270  * @attr: access attributes
1271  * @attr_mask: state mask
1272  * @udata: user data
1273  */
irdma_modify_qp_roce(struct ib_qp * ibqp,struct ib_qp_attr * attr,int attr_mask,struct ib_udata * udata)1274 int irdma_modify_qp_roce(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1275 			 int attr_mask, struct ib_udata *udata)
1276 {
1277 #define IRDMA_MODIFY_QP_MIN_REQ_LEN offsetofend(struct irdma_modify_qp_req, rq_flush)
1278 #define IRDMA_MODIFY_QP_MIN_RESP_LEN offsetofend(struct irdma_modify_qp_resp, push_valid)
1279 	struct irdma_pd *iwpd = to_iwpd(ibqp->pd);
1280 	struct irdma_qp *iwqp = to_iwqp(ibqp);
1281 	struct irdma_device *iwdev = iwqp->iwdev;
1282 	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
1283 	struct irdma_qp_host_ctx_info *ctx_info;
1284 	struct irdma_roce_offload_info *roce_info;
1285 	struct irdma_udp_offload_info *udp_info;
1286 	struct irdma_modify_qp_info info = {};
1287 	struct irdma_modify_qp_resp uresp = {};
1288 	struct irdma_modify_qp_req ureq = {};
1289 	unsigned long flags;
1290 	u8 issue_modify_qp = 0;
1291 	int ret = 0;
1292 
1293 	ctx_info = &iwqp->ctx_info;
1294 	roce_info = &iwqp->roce_info;
1295 	udp_info = &iwqp->udp_info;
1296 
1297 	if (udata) {
1298 		/* udata inlen/outlen can be 0 when supporting legacy libi40iw */
1299 		if ((udata->inlen && udata->inlen < IRDMA_MODIFY_QP_MIN_REQ_LEN) ||
1300 		    (udata->outlen && udata->outlen < IRDMA_MODIFY_QP_MIN_RESP_LEN))
1301 			return -EINVAL;
1302 	}
1303 
1304 	if (attr_mask & ~IB_QP_ATTR_STANDARD_BITS)
1305 		return -EOPNOTSUPP;
1306 
1307 	if (attr_mask & IB_QP_DEST_QPN)
1308 		roce_info->dest_qp = attr->dest_qp_num;
1309 
1310 	if (attr_mask & IB_QP_PKEY_INDEX) {
1311 		ret = irdma_query_pkey(ibqp->device, 0, attr->pkey_index,
1312 				       &roce_info->p_key);
1313 		if (ret)
1314 			return ret;
1315 	}
1316 
1317 	if (attr_mask & IB_QP_QKEY)
1318 		roce_info->qkey = attr->qkey;
1319 
1320 	if (attr_mask & IB_QP_PATH_MTU)
1321 		udp_info->snd_mss = ib_mtu_enum_to_int(attr->path_mtu);
1322 
1323 	if (attr_mask & IB_QP_SQ_PSN) {
1324 		udp_info->psn_nxt = attr->sq_psn;
1325 		udp_info->lsn =  0xffff;
1326 		udp_info->psn_una = attr->sq_psn;
1327 		udp_info->psn_max = attr->sq_psn;
1328 	}
1329 
1330 	if (attr_mask & IB_QP_RQ_PSN)
1331 		udp_info->epsn = attr->rq_psn;
1332 
1333 	if (attr_mask & IB_QP_RNR_RETRY)
1334 		udp_info->rnr_nak_thresh = attr->rnr_retry;
1335 
1336 	if (attr_mask & IB_QP_MIN_RNR_TIMER &&
1337 	    dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_3)
1338 		udp_info->min_rnr_timer = attr->min_rnr_timer;
1339 
1340 	if (attr_mask & IB_QP_RETRY_CNT)
1341 		udp_info->rexmit_thresh = attr->retry_cnt;
1342 
1343 	ctx_info->roce_info->pd_id = iwpd->sc_pd.pd_id;
1344 
1345 	if (attr_mask & IB_QP_AV) {
1346 		struct irdma_av *av = &iwqp->roce_ah.av;
1347 		const struct ib_gid_attr *sgid_attr =
1348 				attr->ah_attr.grh.sgid_attr;
1349 		u16 vlan_id = VLAN_N_VID;
1350 		u32 local_ip[4];
1351 
1352 		memset(&iwqp->roce_ah, 0, sizeof(iwqp->roce_ah));
1353 		if (attr->ah_attr.ah_flags & IB_AH_GRH) {
1354 			udp_info->ttl = attr->ah_attr.grh.hop_limit;
1355 			udp_info->flow_label = attr->ah_attr.grh.flow_label;
1356 			udp_info->tos = attr->ah_attr.grh.traffic_class;
1357 			udp_info->src_port =
1358 				rdma_get_udp_sport(udp_info->flow_label,
1359 						   ibqp->qp_num,
1360 						   roce_info->dest_qp);
1361 			irdma_qp_rem_qos(&iwqp->sc_qp);
1362 			dev->ws_remove(iwqp->sc_qp.vsi, ctx_info->user_pri);
1363 			if (iwqp->sc_qp.vsi->dscp_mode)
1364 				ctx_info->user_pri =
1365 				iwqp->sc_qp.vsi->dscp_map[irdma_tos2dscp(udp_info->tos)];
1366 			else
1367 				ctx_info->user_pri = rt_tos2priority(udp_info->tos);
1368 		}
1369 		ret = rdma_read_gid_l2_fields(sgid_attr, &vlan_id,
1370 					      ctx_info->roce_info->mac_addr);
1371 		if (ret)
1372 			return ret;
1373 		ctx_info->user_pri = irdma_roce_get_vlan_prio(sgid_attr,
1374 							      ctx_info->user_pri);
1375 		if (dev->ws_add(iwqp->sc_qp.vsi, ctx_info->user_pri))
1376 			return -ENOMEM;
1377 		iwqp->sc_qp.user_pri = ctx_info->user_pri;
1378 		irdma_qp_add_qos(&iwqp->sc_qp);
1379 
1380 		if (vlan_id >= VLAN_N_VID && iwdev->dcb_vlan_mode)
1381 			vlan_id = 0;
1382 		if (vlan_id < VLAN_N_VID) {
1383 			udp_info->insert_vlan_tag = true;
1384 			udp_info->vlan_tag = vlan_id |
1385 				ctx_info->user_pri << VLAN_PRIO_SHIFT;
1386 		} else {
1387 			udp_info->insert_vlan_tag = false;
1388 		}
1389 
1390 		av->attrs = attr->ah_attr;
1391 		rdma_gid2ip((struct sockaddr *)&av->sgid_addr, &sgid_attr->gid);
1392 		rdma_gid2ip((struct sockaddr *)&av->dgid_addr, &attr->ah_attr.grh.dgid);
1393 		av->net_type = rdma_gid_attr_network_type(sgid_attr);
1394 		if (av->net_type == RDMA_NETWORK_IPV6) {
1395 			__be32 *daddr =
1396 				av->dgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32;
1397 			__be32 *saddr =
1398 				av->sgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32;
1399 
1400 			irdma_copy_ip_ntohl(&udp_info->dest_ip_addr[0], daddr);
1401 			irdma_copy_ip_ntohl(&udp_info->local_ipaddr[0], saddr);
1402 
1403 			udp_info->ipv4 = false;
1404 			irdma_copy_ip_ntohl(local_ip, daddr);
1405 
1406 		} else if (av->net_type == RDMA_NETWORK_IPV4) {
1407 			__be32 saddr = av->sgid_addr.saddr_in.sin_addr.s_addr;
1408 			__be32 daddr = av->dgid_addr.saddr_in.sin_addr.s_addr;
1409 
1410 			local_ip[0] = ntohl(daddr);
1411 
1412 			udp_info->ipv4 = true;
1413 			udp_info->dest_ip_addr[0] = 0;
1414 			udp_info->dest_ip_addr[1] = 0;
1415 			udp_info->dest_ip_addr[2] = 0;
1416 			udp_info->dest_ip_addr[3] = local_ip[0];
1417 
1418 			udp_info->local_ipaddr[0] = 0;
1419 			udp_info->local_ipaddr[1] = 0;
1420 			udp_info->local_ipaddr[2] = 0;
1421 			udp_info->local_ipaddr[3] = ntohl(saddr);
1422 		}
1423 		udp_info->arp_idx =
1424 			irdma_add_arp(iwdev->rf, local_ip, udp_info->ipv4,
1425 				      attr->ah_attr.roce.dmac);
1426 	}
1427 
1428 	if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) {
1429 		if (attr->max_rd_atomic > dev->hw_attrs.max_hw_ord) {
1430 			ibdev_err(&iwdev->ibdev,
1431 				  "rd_atomic = %d, above max_hw_ord=%d\n",
1432 				  attr->max_rd_atomic,
1433 				  dev->hw_attrs.max_hw_ord);
1434 			return -EINVAL;
1435 		}
1436 		if (attr->max_rd_atomic)
1437 			roce_info->ord_size = attr->max_rd_atomic;
1438 		info.ord_valid = true;
1439 	}
1440 
1441 	if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) {
1442 		if (attr->max_dest_rd_atomic > dev->hw_attrs.max_hw_ird) {
1443 			ibdev_err(&iwdev->ibdev,
1444 				  "rd_atomic = %d, above max_hw_ird=%d\n",
1445 				   attr->max_dest_rd_atomic,
1446 				   dev->hw_attrs.max_hw_ird);
1447 			return -EINVAL;
1448 		}
1449 		if (attr->max_dest_rd_atomic)
1450 			roce_info->ird_size = attr->max_dest_rd_atomic;
1451 	}
1452 
1453 	if (attr_mask & IB_QP_ACCESS_FLAGS) {
1454 		if (attr->qp_access_flags & IB_ACCESS_LOCAL_WRITE)
1455 			roce_info->wr_rdresp_en = true;
1456 		if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE)
1457 			roce_info->wr_rdresp_en = true;
1458 		if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ)
1459 			roce_info->rd_en = true;
1460 		if (dev->hw_attrs.uk_attrs.feature_flags & IRDMA_FEATURE_ATOMIC_OPS)
1461 			if (attr->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC)
1462 				ctx_info->remote_atomics_en = true;
1463 	}
1464 
1465 	wait_event(iwqp->mod_qp_waitq, !atomic_read(&iwqp->hw_mod_qp_pend));
1466 
1467 	ibdev_dbg(&iwdev->ibdev,
1468 		  "VERBS: caller: %pS qp_id=%d to_ibqpstate=%d ibqpstate=%d irdma_qpstate=%d attr_mask=0x%x\n",
1469 		  __builtin_return_address(0), ibqp->qp_num, attr->qp_state,
1470 		  iwqp->ibqp_state, iwqp->iwarp_state, attr_mask);
1471 
1472 	spin_lock_irqsave(&iwqp->lock, flags);
1473 	if (attr_mask & IB_QP_STATE) {
1474 		if (!ib_modify_qp_is_ok(iwqp->ibqp_state, attr->qp_state,
1475 					iwqp->ibqp.qp_type, attr_mask)) {
1476 			ibdev_warn(&iwdev->ibdev, "modify_qp invalid for qp_id=%d, old_state=0x%x, new_state=0x%x\n",
1477 				   iwqp->ibqp.qp_num, iwqp->ibqp_state,
1478 				   attr->qp_state);
1479 			ret = -EINVAL;
1480 			goto exit;
1481 		}
1482 		info.curr_iwarp_state = iwqp->iwarp_state;
1483 
1484 		switch (attr->qp_state) {
1485 		case IB_QPS_INIT:
1486 			if (iwqp->iwarp_state > IRDMA_QP_STATE_IDLE) {
1487 				ret = -EINVAL;
1488 				goto exit;
1489 			}
1490 
1491 			if (iwqp->iwarp_state == IRDMA_QP_STATE_INVALID) {
1492 				info.next_iwarp_state = IRDMA_QP_STATE_IDLE;
1493 				issue_modify_qp = 1;
1494 			}
1495 			break;
1496 		case IB_QPS_RTR:
1497 			if (iwqp->iwarp_state > IRDMA_QP_STATE_IDLE) {
1498 				ret = -EINVAL;
1499 				goto exit;
1500 			}
1501 			info.arp_cache_idx_valid = true;
1502 			info.cq_num_valid = true;
1503 			info.next_iwarp_state = IRDMA_QP_STATE_RTR;
1504 			issue_modify_qp = 1;
1505 			break;
1506 		case IB_QPS_RTS:
1507 			if (iwqp->ibqp_state < IB_QPS_RTR ||
1508 			    iwqp->ibqp_state == IB_QPS_ERR) {
1509 				ret = -EINVAL;
1510 				goto exit;
1511 			}
1512 
1513 			info.arp_cache_idx_valid = true;
1514 			info.cq_num_valid = true;
1515 			info.ord_valid = true;
1516 			info.next_iwarp_state = IRDMA_QP_STATE_RTS;
1517 			issue_modify_qp = 1;
1518 			if (iwdev->push_mode && udata &&
1519 			    iwqp->sc_qp.push_idx == IRDMA_INVALID_PUSH_PAGE_INDEX &&
1520 			    dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) {
1521 				spin_unlock_irqrestore(&iwqp->lock, flags);
1522 				irdma_alloc_push_page(iwqp);
1523 				spin_lock_irqsave(&iwqp->lock, flags);
1524 			}
1525 			break;
1526 		case IB_QPS_SQD:
1527 			if (iwqp->iwarp_state == IRDMA_QP_STATE_SQD)
1528 				goto exit;
1529 
1530 			if (iwqp->iwarp_state != IRDMA_QP_STATE_RTS) {
1531 				ret = -EINVAL;
1532 				goto exit;
1533 			}
1534 
1535 			info.next_iwarp_state = IRDMA_QP_STATE_SQD;
1536 			issue_modify_qp = 1;
1537 			iwqp->suspend_pending = true;
1538 			break;
1539 		case IB_QPS_SQE:
1540 		case IB_QPS_ERR:
1541 		case IB_QPS_RESET:
1542 			if (iwqp->iwarp_state == IRDMA_QP_STATE_ERROR) {
1543 				spin_unlock_irqrestore(&iwqp->lock, flags);
1544 				if (udata && udata->inlen) {
1545 					if (ib_copy_from_udata(&ureq, udata,
1546 					    min(sizeof(ureq), udata->inlen)))
1547 						return -EINVAL;
1548 
1549 					irdma_flush_wqes(iwqp,
1550 					    (ureq.sq_flush ? IRDMA_FLUSH_SQ : 0) |
1551 					    (ureq.rq_flush ? IRDMA_FLUSH_RQ : 0) |
1552 					    IRDMA_REFLUSH);
1553 				}
1554 				return 0;
1555 			}
1556 
1557 			info.next_iwarp_state = IRDMA_QP_STATE_ERROR;
1558 			issue_modify_qp = 1;
1559 			break;
1560 		default:
1561 			ret = -EINVAL;
1562 			goto exit;
1563 		}
1564 
1565 		iwqp->ibqp_state = attr->qp_state;
1566 	}
1567 
1568 	ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
1569 	ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
1570 	irdma_sc_qp_setctx_roce(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info);
1571 	spin_unlock_irqrestore(&iwqp->lock, flags);
1572 
1573 	if (attr_mask & IB_QP_STATE) {
1574 		if (issue_modify_qp) {
1575 			ctx_info->rem_endpoint_idx = udp_info->arp_idx;
1576 			if (irdma_hw_modify_qp(iwdev, iwqp, &info, true))
1577 				return -EINVAL;
1578 			if (info.next_iwarp_state == IRDMA_QP_STATE_SQD) {
1579 				ret = irdma_wait_for_suspend(iwqp);
1580 				if (ret)
1581 					return ret;
1582 			}
1583 			spin_lock_irqsave(&iwqp->lock, flags);
1584 			if (iwqp->iwarp_state == info.curr_iwarp_state) {
1585 				iwqp->iwarp_state = info.next_iwarp_state;
1586 				iwqp->ibqp_state = attr->qp_state;
1587 			}
1588 			if (iwqp->ibqp_state > IB_QPS_RTS &&
1589 			    !iwqp->flush_issued) {
1590 				spin_unlock_irqrestore(&iwqp->lock, flags);
1591 				irdma_flush_wqes(iwqp, IRDMA_FLUSH_SQ |
1592 						       IRDMA_FLUSH_RQ |
1593 						       IRDMA_FLUSH_WAIT);
1594 				iwqp->flush_issued = 1;
1595 			} else {
1596 				spin_unlock_irqrestore(&iwqp->lock, flags);
1597 			}
1598 		} else {
1599 			iwqp->ibqp_state = attr->qp_state;
1600 		}
1601 		if (udata && udata->outlen && dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) {
1602 			struct irdma_ucontext *ucontext;
1603 
1604 			ucontext = rdma_udata_to_drv_context(udata,
1605 					struct irdma_ucontext, ibucontext);
1606 			if (iwqp->sc_qp.push_idx != IRDMA_INVALID_PUSH_PAGE_INDEX &&
1607 			    !iwqp->push_wqe_mmap_entry &&
1608 			    !irdma_setup_push_mmap_entries(ucontext, iwqp,
1609 				&uresp.push_wqe_mmap_key, &uresp.push_db_mmap_key)) {
1610 				uresp.push_valid = 1;
1611 				uresp.push_offset = iwqp->sc_qp.push_offset;
1612 			}
1613 			ret = ib_copy_to_udata(udata, &uresp, min(sizeof(uresp),
1614 					       udata->outlen));
1615 			if (ret) {
1616 				irdma_remove_push_mmap_entries(iwqp);
1617 				ibdev_dbg(&iwdev->ibdev,
1618 					  "VERBS: copy_to_udata failed\n");
1619 				return ret;
1620 			}
1621 		}
1622 	}
1623 
1624 	return 0;
1625 exit:
1626 	spin_unlock_irqrestore(&iwqp->lock, flags);
1627 
1628 	return ret;
1629 }
1630 
1631 /**
1632  * irdma_modify_qp - modify qp request
1633  * @ibqp: qp's pointer for modify
1634  * @attr: access attributes
1635  * @attr_mask: state mask
1636  * @udata: user data
1637  */
irdma_modify_qp(struct ib_qp * ibqp,struct ib_qp_attr * attr,int attr_mask,struct ib_udata * udata)1638 int irdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask,
1639 		    struct ib_udata *udata)
1640 {
1641 #define IRDMA_MODIFY_QP_MIN_REQ_LEN offsetofend(struct irdma_modify_qp_req, rq_flush)
1642 #define IRDMA_MODIFY_QP_MIN_RESP_LEN offsetofend(struct irdma_modify_qp_resp, push_valid)
1643 	struct irdma_qp *iwqp = to_iwqp(ibqp);
1644 	struct irdma_device *iwdev = iwqp->iwdev;
1645 	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
1646 	struct irdma_qp_host_ctx_info *ctx_info;
1647 	struct irdma_tcp_offload_info *tcp_info;
1648 	struct irdma_iwarp_offload_info *offload_info;
1649 	struct irdma_modify_qp_info info = {};
1650 	struct irdma_modify_qp_resp uresp = {};
1651 	struct irdma_modify_qp_req ureq = {};
1652 	u8 issue_modify_qp = 0;
1653 	u8 dont_wait = 0;
1654 	int err;
1655 	unsigned long flags;
1656 
1657 	if (udata) {
1658 		/* udata inlen/outlen can be 0 when supporting legacy libi40iw */
1659 		if ((udata->inlen && udata->inlen < IRDMA_MODIFY_QP_MIN_REQ_LEN) ||
1660 		    (udata->outlen && udata->outlen < IRDMA_MODIFY_QP_MIN_RESP_LEN))
1661 			return -EINVAL;
1662 	}
1663 
1664 	if (attr_mask & ~IB_QP_ATTR_STANDARD_BITS)
1665 		return -EOPNOTSUPP;
1666 
1667 	ctx_info = &iwqp->ctx_info;
1668 	offload_info = &iwqp->iwarp_info;
1669 	tcp_info = &iwqp->tcp_info;
1670 	wait_event(iwqp->mod_qp_waitq, !atomic_read(&iwqp->hw_mod_qp_pend));
1671 	ibdev_dbg(&iwdev->ibdev,
1672 		  "VERBS: caller: %pS qp_id=%d to_ibqpstate=%d ibqpstate=%d irdma_qpstate=%d last_aeq=%d hw_tcp_state=%d hw_iwarp_state=%d attr_mask=0x%x\n",
1673 		  __builtin_return_address(0), ibqp->qp_num, attr->qp_state,
1674 		  iwqp->ibqp_state, iwqp->iwarp_state, iwqp->last_aeq,
1675 		  iwqp->hw_tcp_state, iwqp->hw_iwarp_state, attr_mask);
1676 
1677 	spin_lock_irqsave(&iwqp->lock, flags);
1678 	if (attr_mask & IB_QP_STATE) {
1679 		info.curr_iwarp_state = iwqp->iwarp_state;
1680 		switch (attr->qp_state) {
1681 		case IB_QPS_INIT:
1682 		case IB_QPS_RTR:
1683 			if (iwqp->iwarp_state > IRDMA_QP_STATE_IDLE) {
1684 				err = -EINVAL;
1685 				goto exit;
1686 			}
1687 
1688 			if (iwqp->iwarp_state == IRDMA_QP_STATE_INVALID) {
1689 				info.next_iwarp_state = IRDMA_QP_STATE_IDLE;
1690 				issue_modify_qp = 1;
1691 			}
1692 			if (iwdev->push_mode && udata &&
1693 			    iwqp->sc_qp.push_idx == IRDMA_INVALID_PUSH_PAGE_INDEX &&
1694 			    dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) {
1695 				spin_unlock_irqrestore(&iwqp->lock, flags);
1696 				irdma_alloc_push_page(iwqp);
1697 				spin_lock_irqsave(&iwqp->lock, flags);
1698 			}
1699 			break;
1700 		case IB_QPS_RTS:
1701 			if (iwqp->iwarp_state > IRDMA_QP_STATE_RTS ||
1702 			    !iwqp->cm_id) {
1703 				err = -EINVAL;
1704 				goto exit;
1705 			}
1706 
1707 			issue_modify_qp = 1;
1708 			iwqp->hw_tcp_state = IRDMA_TCP_STATE_ESTABLISHED;
1709 			iwqp->hte_added = 1;
1710 			info.next_iwarp_state = IRDMA_QP_STATE_RTS;
1711 			info.tcp_ctx_valid = true;
1712 			info.ord_valid = true;
1713 			info.arp_cache_idx_valid = true;
1714 			info.cq_num_valid = true;
1715 			break;
1716 		case IB_QPS_SQD:
1717 			if (iwqp->hw_iwarp_state > IRDMA_QP_STATE_RTS) {
1718 				err = 0;
1719 				goto exit;
1720 			}
1721 
1722 			if (iwqp->iwarp_state == IRDMA_QP_STATE_CLOSING ||
1723 			    iwqp->iwarp_state < IRDMA_QP_STATE_RTS) {
1724 				err = 0;
1725 				goto exit;
1726 			}
1727 
1728 			if (iwqp->iwarp_state > IRDMA_QP_STATE_CLOSING) {
1729 				err = -EINVAL;
1730 				goto exit;
1731 			}
1732 
1733 			info.next_iwarp_state = IRDMA_QP_STATE_CLOSING;
1734 			issue_modify_qp = 1;
1735 			break;
1736 		case IB_QPS_SQE:
1737 			if (iwqp->iwarp_state >= IRDMA_QP_STATE_TERMINATE) {
1738 				err = -EINVAL;
1739 				goto exit;
1740 			}
1741 
1742 			info.next_iwarp_state = IRDMA_QP_STATE_TERMINATE;
1743 			issue_modify_qp = 1;
1744 			break;
1745 		case IB_QPS_ERR:
1746 		case IB_QPS_RESET:
1747 			if (iwqp->iwarp_state == IRDMA_QP_STATE_ERROR) {
1748 				spin_unlock_irqrestore(&iwqp->lock, flags);
1749 				if (udata && udata->inlen) {
1750 					if (ib_copy_from_udata(&ureq, udata,
1751 					    min(sizeof(ureq), udata->inlen)))
1752 						return -EINVAL;
1753 
1754 					irdma_flush_wqes(iwqp,
1755 					    (ureq.sq_flush ? IRDMA_FLUSH_SQ : 0) |
1756 					    (ureq.rq_flush ? IRDMA_FLUSH_RQ : 0) |
1757 					    IRDMA_REFLUSH);
1758 				}
1759 				return 0;
1760 			}
1761 
1762 			if (iwqp->sc_qp.term_flags) {
1763 				spin_unlock_irqrestore(&iwqp->lock, flags);
1764 				irdma_terminate_del_timer(&iwqp->sc_qp);
1765 				spin_lock_irqsave(&iwqp->lock, flags);
1766 			}
1767 			info.next_iwarp_state = IRDMA_QP_STATE_ERROR;
1768 			if (iwqp->hw_tcp_state > IRDMA_TCP_STATE_CLOSED &&
1769 			    iwdev->iw_status &&
1770 			    iwqp->hw_tcp_state != IRDMA_TCP_STATE_TIME_WAIT)
1771 				info.reset_tcp_conn = true;
1772 			else
1773 				dont_wait = 1;
1774 
1775 			issue_modify_qp = 1;
1776 			info.next_iwarp_state = IRDMA_QP_STATE_ERROR;
1777 			break;
1778 		default:
1779 			err = -EINVAL;
1780 			goto exit;
1781 		}
1782 
1783 		iwqp->ibqp_state = attr->qp_state;
1784 	}
1785 	if (attr_mask & IB_QP_ACCESS_FLAGS) {
1786 		ctx_info->iwarp_info_valid = true;
1787 		if (attr->qp_access_flags & IB_ACCESS_LOCAL_WRITE)
1788 			offload_info->wr_rdresp_en = true;
1789 		if (attr->qp_access_flags & IB_ACCESS_REMOTE_WRITE)
1790 			offload_info->wr_rdresp_en = true;
1791 		if (attr->qp_access_flags & IB_ACCESS_REMOTE_READ)
1792 			offload_info->rd_en = true;
1793 	}
1794 
1795 	if (ctx_info->iwarp_info_valid) {
1796 		ctx_info->send_cq_num = iwqp->iwscq->sc_cq.cq_uk.cq_id;
1797 		ctx_info->rcv_cq_num = iwqp->iwrcq->sc_cq.cq_uk.cq_id;
1798 		irdma_sc_qp_setctx(&iwqp->sc_qp, iwqp->host_ctx.va, ctx_info);
1799 	}
1800 	spin_unlock_irqrestore(&iwqp->lock, flags);
1801 
1802 	if (attr_mask & IB_QP_STATE) {
1803 		if (issue_modify_qp) {
1804 			ctx_info->rem_endpoint_idx = tcp_info->arp_idx;
1805 			if (irdma_hw_modify_qp(iwdev, iwqp, &info, true))
1806 				return -EINVAL;
1807 		}
1808 
1809 		spin_lock_irqsave(&iwqp->lock, flags);
1810 		if (iwqp->iwarp_state == info.curr_iwarp_state) {
1811 			iwqp->iwarp_state = info.next_iwarp_state;
1812 			iwqp->ibqp_state = attr->qp_state;
1813 		}
1814 		spin_unlock_irqrestore(&iwqp->lock, flags);
1815 	}
1816 
1817 	if (issue_modify_qp && iwqp->ibqp_state > IB_QPS_RTS) {
1818 		if (dont_wait) {
1819 			if (iwqp->hw_tcp_state) {
1820 				spin_lock_irqsave(&iwqp->lock, flags);
1821 				iwqp->hw_tcp_state = IRDMA_TCP_STATE_CLOSED;
1822 				iwqp->last_aeq = IRDMA_AE_RESET_SENT;
1823 				spin_unlock_irqrestore(&iwqp->lock, flags);
1824 			}
1825 			irdma_cm_disconn(iwqp);
1826 		} else {
1827 			int close_timer_started;
1828 
1829 			spin_lock_irqsave(&iwdev->cm_core.ht_lock, flags);
1830 
1831 			if (iwqp->cm_node) {
1832 				refcount_inc(&iwqp->cm_node->refcnt);
1833 				spin_unlock_irqrestore(&iwdev->cm_core.ht_lock, flags);
1834 				close_timer_started = atomic_inc_return(&iwqp->close_timer_started);
1835 				if (iwqp->cm_id && close_timer_started == 1)
1836 					irdma_schedule_cm_timer(iwqp->cm_node,
1837 						(struct irdma_puda_buf *)iwqp,
1838 						IRDMA_TIMER_TYPE_CLOSE, 1, 0);
1839 
1840 				irdma_rem_ref_cm_node(iwqp->cm_node);
1841 			} else {
1842 				spin_unlock_irqrestore(&iwdev->cm_core.ht_lock, flags);
1843 			}
1844 		}
1845 	}
1846 	if (attr_mask & IB_QP_STATE && udata && udata->outlen &&
1847 	    dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2) {
1848 		struct irdma_ucontext *ucontext;
1849 
1850 		ucontext = rdma_udata_to_drv_context(udata,
1851 					struct irdma_ucontext, ibucontext);
1852 		if (iwqp->sc_qp.push_idx != IRDMA_INVALID_PUSH_PAGE_INDEX &&
1853 		    !iwqp->push_wqe_mmap_entry &&
1854 		    !irdma_setup_push_mmap_entries(ucontext, iwqp,
1855 			&uresp.push_wqe_mmap_key, &uresp.push_db_mmap_key)) {
1856 			uresp.push_valid = 1;
1857 			uresp.push_offset = iwqp->sc_qp.push_offset;
1858 		}
1859 
1860 		err = ib_copy_to_udata(udata, &uresp, min(sizeof(uresp),
1861 				       udata->outlen));
1862 		if (err) {
1863 			irdma_remove_push_mmap_entries(iwqp);
1864 			ibdev_dbg(&iwdev->ibdev,
1865 				  "VERBS: copy_to_udata failed\n");
1866 			return err;
1867 		}
1868 	}
1869 
1870 	return 0;
1871 exit:
1872 	spin_unlock_irqrestore(&iwqp->lock, flags);
1873 
1874 	return err;
1875 }
1876 
1877 /**
1878  * irdma_srq_free_rsrc - free up resources for srq
1879  * @rf: RDMA PCI function
1880  * @iwsrq: srq ptr
1881  */
irdma_srq_free_rsrc(struct irdma_pci_f * rf,struct irdma_srq * iwsrq)1882 static void irdma_srq_free_rsrc(struct irdma_pci_f *rf, struct irdma_srq *iwsrq)
1883 {
1884 	struct irdma_sc_srq *srq = &iwsrq->sc_srq;
1885 
1886 	if (!iwsrq->user_mode) {
1887 		dma_free_coherent(rf->sc_dev.hw->device, iwsrq->kmem.size,
1888 				  iwsrq->kmem.va, iwsrq->kmem.pa);
1889 		iwsrq->kmem.va = NULL;
1890 	}
1891 
1892 	irdma_free_rsrc(rf, rf->allocated_srqs, srq->srq_uk.srq_id);
1893 }
1894 
1895 /**
1896  * irdma_cq_free_rsrc - free up resources for cq
1897  * @rf: RDMA PCI function
1898  * @iwcq: cq ptr
1899  */
irdma_cq_free_rsrc(struct irdma_pci_f * rf,struct irdma_cq * iwcq)1900 static void irdma_cq_free_rsrc(struct irdma_pci_f *rf, struct irdma_cq *iwcq)
1901 {
1902 	struct irdma_sc_cq *cq = &iwcq->sc_cq;
1903 
1904 	if (!iwcq->user_mode) {
1905 		dma_free_coherent(rf->sc_dev.hw->device, iwcq->kmem.size,
1906 				  iwcq->kmem.va, iwcq->kmem.pa);
1907 		iwcq->kmem.va = NULL;
1908 		dma_free_coherent(rf->sc_dev.hw->device,
1909 				  iwcq->kmem_shadow.size,
1910 				  iwcq->kmem_shadow.va, iwcq->kmem_shadow.pa);
1911 		iwcq->kmem_shadow.va = NULL;
1912 	}
1913 
1914 	irdma_free_rsrc(rf, rf->allocated_cqs, cq->cq_uk.cq_id);
1915 }
1916 
1917 /**
1918  * irdma_free_cqbuf - worker to free a cq buffer
1919  * @work: provides access to the cq buffer to free
1920  */
irdma_free_cqbuf(struct work_struct * work)1921 static void irdma_free_cqbuf(struct work_struct *work)
1922 {
1923 	struct irdma_cq_buf *cq_buf = container_of(work, struct irdma_cq_buf, work);
1924 
1925 	dma_free_coherent(cq_buf->hw->device, cq_buf->kmem_buf.size,
1926 			  cq_buf->kmem_buf.va, cq_buf->kmem_buf.pa);
1927 	cq_buf->kmem_buf.va = NULL;
1928 	kfree(cq_buf);
1929 }
1930 
1931 /**
1932  * irdma_process_resize_list - remove resized cq buffers from the resize_list
1933  * @iwcq: cq which owns the resize_list
1934  * @iwdev: irdma device
1935  * @lcqe_buf: the buffer where the last cqe is received
1936  */
irdma_process_resize_list(struct irdma_cq * iwcq,struct irdma_device * iwdev,struct irdma_cq_buf * lcqe_buf)1937 static int irdma_process_resize_list(struct irdma_cq *iwcq,
1938 				     struct irdma_device *iwdev,
1939 				     struct irdma_cq_buf *lcqe_buf)
1940 {
1941 	struct list_head *tmp_node, *list_node;
1942 	struct irdma_cq_buf *cq_buf;
1943 	int cnt = 0;
1944 
1945 	list_for_each_safe(list_node, tmp_node, &iwcq->resize_list) {
1946 		cq_buf = list_entry(list_node, struct irdma_cq_buf, list);
1947 		if (cq_buf == lcqe_buf)
1948 			return cnt;
1949 
1950 		list_del(&cq_buf->list);
1951 		queue_work(iwdev->cleanup_wq, &cq_buf->work);
1952 		cnt++;
1953 	}
1954 
1955 	return cnt;
1956 }
1957 
1958 /**
1959  * irdma_destroy_srq - destroy srq
1960  * @ibsrq: srq pointer
1961  * @udata: user data
1962  */
irdma_destroy_srq(struct ib_srq * ibsrq,struct ib_udata * udata)1963 static int irdma_destroy_srq(struct ib_srq *ibsrq, struct ib_udata *udata)
1964 {
1965 	struct irdma_device *iwdev = to_iwdev(ibsrq->device);
1966 	struct irdma_srq *iwsrq = to_iwsrq(ibsrq);
1967 	struct irdma_sc_srq *srq = &iwsrq->sc_srq;
1968 
1969 	irdma_srq_wq_destroy(iwdev->rf, srq);
1970 	irdma_srq_free_rsrc(iwdev->rf, iwsrq);
1971 	return 0;
1972 }
1973 
1974 /**
1975  * irdma_destroy_cq - destroy cq
1976  * @ib_cq: cq pointer
1977  * @udata: user data
1978  */
irdma_destroy_cq(struct ib_cq * ib_cq,struct ib_udata * udata)1979 static int irdma_destroy_cq(struct ib_cq *ib_cq, struct ib_udata *udata)
1980 {
1981 	struct irdma_device *iwdev = to_iwdev(ib_cq->device);
1982 	struct irdma_cq *iwcq = to_iwcq(ib_cq);
1983 	struct irdma_sc_cq *cq = &iwcq->sc_cq;
1984 	struct irdma_sc_dev *dev = cq->dev;
1985 	struct irdma_sc_ceq *ceq = dev->ceq[cq->ceq_id];
1986 	struct irdma_ceq *iwceq = container_of(ceq, struct irdma_ceq, sc_ceq);
1987 	unsigned long flags;
1988 
1989 	spin_lock_irqsave(&iwcq->lock, flags);
1990 	if (!list_empty(&iwcq->cmpl_generated))
1991 		irdma_remove_cmpls_list(iwcq);
1992 	if (!list_empty(&iwcq->resize_list))
1993 		irdma_process_resize_list(iwcq, iwdev, NULL);
1994 	spin_unlock_irqrestore(&iwcq->lock, flags);
1995 
1996 	irdma_cq_rem_ref(ib_cq);
1997 	wait_for_completion(&iwcq->free_cq);
1998 
1999 	irdma_cq_wq_destroy(iwdev->rf, cq);
2000 
2001 	spin_lock_irqsave(&iwceq->ce_lock, flags);
2002 	irdma_sc_cleanup_ceqes(cq, ceq);
2003 	spin_unlock_irqrestore(&iwceq->ce_lock, flags);
2004 	irdma_cq_free_rsrc(iwdev->rf, iwcq);
2005 
2006 	return 0;
2007 }
2008 
2009 /**
2010  * irdma_resize_cq - resize cq
2011  * @ibcq: cq to be resized
2012  * @entries: desired cq size
2013  * @udata: user data
2014  */
irdma_resize_cq(struct ib_cq * ibcq,int entries,struct ib_udata * udata)2015 static int irdma_resize_cq(struct ib_cq *ibcq, int entries,
2016 			   struct ib_udata *udata)
2017 {
2018 #define IRDMA_RESIZE_CQ_MIN_REQ_LEN offsetofend(struct irdma_resize_cq_req, user_cq_buffer)
2019 	struct irdma_cq *iwcq = to_iwcq(ibcq);
2020 	struct irdma_sc_dev *dev = iwcq->sc_cq.dev;
2021 	struct irdma_cqp_request *cqp_request;
2022 	struct cqp_cmds_info *cqp_info;
2023 	struct irdma_modify_cq_info *m_info;
2024 	struct irdma_modify_cq_info info = {};
2025 	struct irdma_dma_mem kmem_buf;
2026 	struct irdma_cq_mr *cqmr_buf;
2027 	struct irdma_pbl *iwpbl_buf;
2028 	struct irdma_device *iwdev;
2029 	struct irdma_pci_f *rf;
2030 	struct irdma_cq_buf *cq_buf = NULL;
2031 	unsigned long flags;
2032 	u8 cqe_size;
2033 	int ret;
2034 
2035 	iwdev = to_iwdev(ibcq->device);
2036 	rf = iwdev->rf;
2037 
2038 	if (!(rf->sc_dev.hw_attrs.uk_attrs.feature_flags &
2039 	    IRDMA_FEATURE_CQ_RESIZE))
2040 		return -EOPNOTSUPP;
2041 
2042 	if (udata && udata->inlen < IRDMA_RESIZE_CQ_MIN_REQ_LEN)
2043 		return -EINVAL;
2044 
2045 	if (entries > rf->max_cqe)
2046 		return -EINVAL;
2047 
2048 	if (!iwcq->user_mode) {
2049 		entries += 2;
2050 
2051 		if (!iwcq->sc_cq.cq_uk.avoid_mem_cflct &&
2052 		    dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2)
2053 			entries *= 2;
2054 
2055 		if (entries & 1)
2056 			entries += 1; /* cq size must be an even number */
2057 
2058 		cqe_size = iwcq->sc_cq.cq_uk.avoid_mem_cflct ? 64 : 32;
2059 		if (entries * cqe_size == IRDMA_HW_PAGE_SIZE)
2060 			entries += 2;
2061 	}
2062 
2063 	info.cq_size = max(entries, 4);
2064 
2065 	if (info.cq_size == iwcq->sc_cq.cq_uk.cq_size - 1)
2066 		return 0;
2067 
2068 	if (udata) {
2069 		struct irdma_resize_cq_req req = {};
2070 		struct irdma_ucontext *ucontext =
2071 			rdma_udata_to_drv_context(udata, struct irdma_ucontext,
2072 						  ibucontext);
2073 
2074 		/* CQ resize not supported with legacy GEN_1 libi40iw */
2075 		if (ucontext->legacy_mode)
2076 			return -EOPNOTSUPP;
2077 
2078 		if (ib_copy_from_udata(&req, udata,
2079 				       min(sizeof(req), udata->inlen)))
2080 			return -EINVAL;
2081 
2082 		spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
2083 		iwpbl_buf = irdma_get_pbl((unsigned long)req.user_cq_buffer,
2084 					  &ucontext->cq_reg_mem_list);
2085 		spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
2086 
2087 		if (!iwpbl_buf)
2088 			return -ENOMEM;
2089 
2090 		cqmr_buf = &iwpbl_buf->cq_mr;
2091 		if (iwpbl_buf->pbl_allocated) {
2092 			info.virtual_map = true;
2093 			info.pbl_chunk_size = 1;
2094 			info.first_pm_pbl_idx = cqmr_buf->cq_pbl.idx;
2095 		} else {
2096 			info.cq_pa = cqmr_buf->cq_pbl.addr;
2097 		}
2098 	} else {
2099 		/* Kmode CQ resize */
2100 		int rsize;
2101 
2102 		rsize = info.cq_size * sizeof(struct irdma_cqe);
2103 		kmem_buf.size = ALIGN(round_up(rsize, 256), 256);
2104 		kmem_buf.va = dma_alloc_coherent(dev->hw->device,
2105 						 kmem_buf.size, &kmem_buf.pa,
2106 						 GFP_KERNEL);
2107 		if (!kmem_buf.va)
2108 			return -ENOMEM;
2109 
2110 		info.cq_base = kmem_buf.va;
2111 		info.cq_pa = kmem_buf.pa;
2112 		cq_buf = kzalloc(sizeof(*cq_buf), GFP_KERNEL);
2113 		if (!cq_buf) {
2114 			ret = -ENOMEM;
2115 			goto error;
2116 		}
2117 	}
2118 
2119 	cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
2120 	if (!cqp_request) {
2121 		ret = -ENOMEM;
2122 		goto error;
2123 	}
2124 
2125 	info.shadow_read_threshold = iwcq->sc_cq.shadow_read_threshold;
2126 	info.cq_resize = true;
2127 
2128 	cqp_info = &cqp_request->info;
2129 	m_info = &cqp_info->in.u.cq_modify.info;
2130 	memcpy(m_info, &info, sizeof(*m_info));
2131 
2132 	cqp_info->cqp_cmd = IRDMA_OP_CQ_MODIFY;
2133 	cqp_info->in.u.cq_modify.cq = &iwcq->sc_cq;
2134 	cqp_info->in.u.cq_modify.scratch = (uintptr_t)cqp_request;
2135 	cqp_info->post_sq = 1;
2136 	ret = irdma_handle_cqp_op(rf, cqp_request);
2137 	irdma_put_cqp_request(&rf->cqp, cqp_request);
2138 	if (ret)
2139 		goto error;
2140 
2141 	spin_lock_irqsave(&iwcq->lock, flags);
2142 	if (cq_buf) {
2143 		cq_buf->kmem_buf = iwcq->kmem;
2144 		cq_buf->hw = dev->hw;
2145 		memcpy(&cq_buf->cq_uk, &iwcq->sc_cq.cq_uk, sizeof(cq_buf->cq_uk));
2146 		INIT_WORK(&cq_buf->work, irdma_free_cqbuf);
2147 		list_add_tail(&cq_buf->list, &iwcq->resize_list);
2148 		iwcq->kmem = kmem_buf;
2149 	}
2150 
2151 	irdma_sc_cq_resize(&iwcq->sc_cq, &info);
2152 	ibcq->cqe = info.cq_size - 1;
2153 	spin_unlock_irqrestore(&iwcq->lock, flags);
2154 
2155 	return 0;
2156 error:
2157 	if (!udata) {
2158 		dma_free_coherent(dev->hw->device, kmem_buf.size, kmem_buf.va,
2159 				  kmem_buf.pa);
2160 		kmem_buf.va = NULL;
2161 	}
2162 	kfree(cq_buf);
2163 
2164 	return ret;
2165 }
2166 
2167 /**
2168  * irdma_srq_event - event notification for srq limit
2169  * @srq: shared srq struct
2170  */
irdma_srq_event(struct irdma_sc_srq * srq)2171 void irdma_srq_event(struct irdma_sc_srq *srq)
2172 {
2173 	struct irdma_srq *iwsrq = container_of(srq, struct irdma_srq, sc_srq);
2174 	struct ib_srq *ibsrq = &iwsrq->ibsrq;
2175 	struct ib_event event;
2176 
2177 	srq->srq_limit = 0;
2178 
2179 	if (!ibsrq->event_handler)
2180 		return;
2181 
2182 	event.device = ibsrq->device;
2183 	event.element.port_num = 1;
2184 	event.element.srq = ibsrq;
2185 	event.event = IB_EVENT_SRQ_LIMIT_REACHED;
2186 	ibsrq->event_handler(&event, ibsrq->srq_context);
2187 }
2188 
2189 /**
2190  * irdma_modify_srq - modify srq request
2191  * @ibsrq: srq's pointer for modify
2192  * @attr: access attributes
2193  * @attr_mask: state mask
2194  * @udata: user data
2195  */
irdma_modify_srq(struct ib_srq * ibsrq,struct ib_srq_attr * attr,enum ib_srq_attr_mask attr_mask,struct ib_udata * udata)2196 static int irdma_modify_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr,
2197 			    enum ib_srq_attr_mask attr_mask,
2198 			    struct ib_udata *udata)
2199 {
2200 	struct irdma_device *iwdev = to_iwdev(ibsrq->device);
2201 	struct irdma_srq *iwsrq = to_iwsrq(ibsrq);
2202 	struct irdma_cqp_request *cqp_request;
2203 	struct irdma_pci_f *rf = iwdev->rf;
2204 	struct irdma_modify_srq_info *info;
2205 	struct cqp_cmds_info *cqp_info;
2206 	int status;
2207 
2208 	if (attr_mask & IB_SRQ_MAX_WR)
2209 		return -EINVAL;
2210 
2211 	if (!(attr_mask & IB_SRQ_LIMIT))
2212 		return 0;
2213 
2214 	if (attr->srq_limit > iwsrq->sc_srq.srq_uk.srq_size)
2215 		return -EINVAL;
2216 
2217 	/* Execute this cqp op synchronously, so we can update srq_limit
2218 	 * upon successful completion.
2219 	 */
2220 	cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
2221 	if (!cqp_request)
2222 		return -ENOMEM;
2223 
2224 	cqp_info = &cqp_request->info;
2225 	info = &cqp_info->in.u.srq_modify.info;
2226 	info->srq_limit = attr->srq_limit;
2227 	if (info->srq_limit > 0xFFF)
2228 		info->srq_limit = 0xFFF;
2229 	info->arm_limit_event = 1;
2230 
2231 	cqp_info->cqp_cmd = IRDMA_OP_SRQ_MODIFY;
2232 	cqp_info->post_sq = 1;
2233 	cqp_info->in.u.srq_modify.srq = &iwsrq->sc_srq;
2234 	cqp_info->in.u.srq_modify.scratch = (uintptr_t)cqp_request;
2235 	status = irdma_handle_cqp_op(rf, cqp_request);
2236 	irdma_put_cqp_request(&rf->cqp, cqp_request);
2237 	if (status)
2238 		return status;
2239 
2240 	iwsrq->sc_srq.srq_limit = info->srq_limit;
2241 
2242 	return 0;
2243 }
2244 
irdma_setup_umode_srq(struct irdma_device * iwdev,struct irdma_srq * iwsrq,struct irdma_srq_init_info * info,struct ib_udata * udata)2245 static int irdma_setup_umode_srq(struct irdma_device *iwdev,
2246 				 struct irdma_srq *iwsrq,
2247 				 struct irdma_srq_init_info *info,
2248 				 struct ib_udata *udata)
2249 {
2250 #define IRDMA_CREATE_SRQ_MIN_REQ_LEN \
2251 	offsetofend(struct irdma_create_srq_req, user_shadow_area)
2252 	struct irdma_create_srq_req req = {};
2253 	struct irdma_ucontext *ucontext;
2254 	struct irdma_srq_mr *srqmr;
2255 	struct irdma_pbl *iwpbl;
2256 	unsigned long flags;
2257 
2258 	iwsrq->user_mode = true;
2259 	ucontext = rdma_udata_to_drv_context(udata, struct irdma_ucontext,
2260 					     ibucontext);
2261 
2262 	if (udata->inlen < IRDMA_CREATE_SRQ_MIN_REQ_LEN)
2263 		return -EINVAL;
2264 
2265 	if (ib_copy_from_udata(&req, udata,
2266 			       min(sizeof(req), udata->inlen)))
2267 		return -EFAULT;
2268 
2269 	spin_lock_irqsave(&ucontext->srq_reg_mem_list_lock, flags);
2270 	iwpbl = irdma_get_pbl((unsigned long)req.user_srq_buf,
2271 			      &ucontext->srq_reg_mem_list);
2272 	spin_unlock_irqrestore(&ucontext->srq_reg_mem_list_lock, flags);
2273 	if (!iwpbl)
2274 		return -EPROTO;
2275 
2276 	iwsrq->iwpbl = iwpbl;
2277 	srqmr = &iwpbl->srq_mr;
2278 
2279 	if (iwpbl->pbl_allocated) {
2280 		info->virtual_map = true;
2281 		info->pbl_chunk_size = 1;
2282 		info->first_pm_pbl_idx = srqmr->srq_pbl.idx;
2283 		info->leaf_pbl_size = 1;
2284 	} else {
2285 		info->srq_pa = srqmr->srq_pbl.addr;
2286 	}
2287 	info->shadow_area_pa = srqmr->shadow;
2288 
2289 	return 0;
2290 }
2291 
irdma_setup_kmode_srq(struct irdma_device * iwdev,struct irdma_srq * iwsrq,struct irdma_srq_init_info * info,u32 depth,u8 shift)2292 static int irdma_setup_kmode_srq(struct irdma_device *iwdev,
2293 				 struct irdma_srq *iwsrq,
2294 				 struct irdma_srq_init_info *info, u32 depth,
2295 				 u8 shift)
2296 {
2297 	struct irdma_srq_uk_init_info *ukinfo = &info->srq_uk_init_info;
2298 	struct irdma_dma_mem *mem = &iwsrq->kmem;
2299 	u32 size, ring_size;
2300 
2301 	ring_size = depth * IRDMA_QP_WQE_MIN_SIZE;
2302 	size = ring_size + (IRDMA_SHADOW_AREA_SIZE << 3);
2303 
2304 	mem->size = ALIGN(size, 256);
2305 	mem->va = dma_alloc_coherent(iwdev->rf->hw.device, mem->size,
2306 				     &mem->pa, GFP_KERNEL);
2307 	if (!mem->va)
2308 		return -ENOMEM;
2309 
2310 	ukinfo->srq = mem->va;
2311 	ukinfo->srq_size = depth >> shift;
2312 	ukinfo->shadow_area = mem->va + ring_size;
2313 
2314 	info->srq_pa = mem->pa;
2315 	info->shadow_area_pa = info->srq_pa + ring_size;
2316 
2317 	return 0;
2318 }
2319 
2320 /**
2321  * irdma_create_srq - create srq
2322  * @ibsrq: ib's srq pointer
2323  * @initattrs: attributes for srq
2324  * @udata: user data for create srq
2325  */
irdma_create_srq(struct ib_srq * ibsrq,struct ib_srq_init_attr * initattrs,struct ib_udata * udata)2326 static int irdma_create_srq(struct ib_srq *ibsrq,
2327 			    struct ib_srq_init_attr *initattrs,
2328 			    struct ib_udata *udata)
2329 {
2330 	struct irdma_device *iwdev = to_iwdev(ibsrq->device);
2331 	struct ib_srq_attr *attr = &initattrs->attr;
2332 	struct irdma_pd *iwpd = to_iwpd(ibsrq->pd);
2333 	struct irdma_srq *iwsrq = to_iwsrq(ibsrq);
2334 	struct irdma_srq_uk_init_info *ukinfo;
2335 	struct irdma_cqp_request *cqp_request;
2336 	struct irdma_srq_init_info info = {};
2337 	struct irdma_pci_f *rf = iwdev->rf;
2338 	struct irdma_uk_attrs *uk_attrs;
2339 	struct cqp_cmds_info *cqp_info;
2340 	int err_code = 0;
2341 	u32 depth;
2342 	u8 shift;
2343 
2344 	uk_attrs = &rf->sc_dev.hw_attrs.uk_attrs;
2345 	ukinfo = &info.srq_uk_init_info;
2346 
2347 	if (initattrs->srq_type != IB_SRQT_BASIC)
2348 		return -EOPNOTSUPP;
2349 
2350 	if (!(uk_attrs->feature_flags & IRDMA_FEATURE_SRQ) ||
2351 	    attr->max_sge > uk_attrs->max_hw_wq_frags)
2352 		return -EINVAL;
2353 
2354 	refcount_set(&iwsrq->refcnt, 1);
2355 	spin_lock_init(&iwsrq->lock);
2356 	err_code = irdma_alloc_rsrc(rf, rf->allocated_srqs, rf->max_srq,
2357 				    &iwsrq->srq_num, &rf->next_srq);
2358 	if (err_code)
2359 		return err_code;
2360 
2361 	ukinfo->max_srq_frag_cnt = attr->max_sge;
2362 	ukinfo->uk_attrs = uk_attrs;
2363 	ukinfo->srq_id = iwsrq->srq_num;
2364 
2365 	irdma_get_wqe_shift(ukinfo->uk_attrs, ukinfo->max_srq_frag_cnt, 0,
2366 			    &shift);
2367 
2368 	err_code = irdma_get_srqdepth(ukinfo->uk_attrs, attr->max_wr,
2369 				      shift, &depth);
2370 	if (err_code)
2371 		return err_code;
2372 
2373 	/* Actual SRQ size in WRs for ring and HW */
2374 	ukinfo->srq_size = depth >> shift;
2375 
2376 	/* Max postable WRs to SRQ */
2377 	iwsrq->max_wr = (depth - IRDMA_RQ_RSVD) >> shift;
2378 	attr->max_wr = iwsrq->max_wr;
2379 
2380 	if (udata)
2381 		err_code = irdma_setup_umode_srq(iwdev, iwsrq, &info, udata);
2382 	else
2383 		err_code = irdma_setup_kmode_srq(iwdev, iwsrq, &info, depth,
2384 						 shift);
2385 
2386 	if (err_code)
2387 		goto free_rsrc;
2388 
2389 	info.vsi = &iwdev->vsi;
2390 	info.pd = &iwpd->sc_pd;
2391 
2392 	iwsrq->sc_srq.srq_uk.lock = &iwsrq->lock;
2393 	err_code = irdma_sc_srq_init(&iwsrq->sc_srq, &info);
2394 	if (err_code)
2395 		goto free_dmem;
2396 
2397 	cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
2398 	if (!cqp_request) {
2399 		err_code = -ENOMEM;
2400 		goto free_dmem;
2401 	}
2402 
2403 	cqp_info = &cqp_request->info;
2404 	cqp_info->cqp_cmd = IRDMA_OP_SRQ_CREATE;
2405 	cqp_info->post_sq = 1;
2406 	cqp_info->in.u.srq_create.srq = &iwsrq->sc_srq;
2407 	cqp_info->in.u.srq_create.scratch = (uintptr_t)cqp_request;
2408 	err_code = irdma_handle_cqp_op(rf, cqp_request);
2409 	irdma_put_cqp_request(&rf->cqp, cqp_request);
2410 	if (err_code)
2411 		goto free_dmem;
2412 
2413 	if (udata) {
2414 		struct irdma_create_srq_resp resp = {};
2415 
2416 		resp.srq_id = iwsrq->srq_num;
2417 		resp.srq_size = ukinfo->srq_size;
2418 		if (ib_copy_to_udata(udata, &resp,
2419 				     min(sizeof(resp), udata->outlen))) {
2420 			err_code = -EPROTO;
2421 			goto srq_destroy;
2422 		}
2423 	}
2424 
2425 	return 0;
2426 
2427 srq_destroy:
2428 	irdma_srq_wq_destroy(rf, &iwsrq->sc_srq);
2429 
2430 free_dmem:
2431 	if (!iwsrq->user_mode)
2432 		dma_free_coherent(rf->hw.device, iwsrq->kmem.size,
2433 				  iwsrq->kmem.va, iwsrq->kmem.pa);
2434 free_rsrc:
2435 	irdma_free_rsrc(rf, rf->allocated_srqs, iwsrq->srq_num);
2436 	return err_code;
2437 }
2438 
2439 /**
2440  * irdma_query_srq - get SRQ attributes
2441  * @ibsrq: the SRQ to query
2442  * @attr: the attributes of the SRQ
2443  */
irdma_query_srq(struct ib_srq * ibsrq,struct ib_srq_attr * attr)2444 static int irdma_query_srq(struct ib_srq *ibsrq, struct ib_srq_attr *attr)
2445 {
2446 	struct irdma_srq *iwsrq = to_iwsrq(ibsrq);
2447 
2448 	attr->max_wr = iwsrq->max_wr;
2449 	attr->max_sge = iwsrq->sc_srq.srq_uk.max_srq_frag_cnt;
2450 	attr->srq_limit = iwsrq->sc_srq.srq_limit;
2451 
2452 	return 0;
2453 }
2454 
cq_validate_flags(u32 flags,u8 hw_rev)2455 static inline int cq_validate_flags(u32 flags, u8 hw_rev)
2456 {
2457 	/* GEN1/2 does not support CQ create flags */
2458 	if (hw_rev <= IRDMA_GEN_2)
2459 		return flags ? -EOPNOTSUPP : 0;
2460 
2461 	return flags & ~IB_UVERBS_CQ_FLAGS_TIMESTAMP_COMPLETION ? -EOPNOTSUPP : 0;
2462 }
2463 
2464 /**
2465  * irdma_create_cq - create cq
2466  * @ibcq: CQ allocated
2467  * @attr: attributes for cq
2468  * @attrs: uverbs attribute bundle
2469  */
irdma_create_cq(struct ib_cq * ibcq,const struct ib_cq_init_attr * attr,struct uverbs_attr_bundle * attrs)2470 static int irdma_create_cq(struct ib_cq *ibcq,
2471 			   const struct ib_cq_init_attr *attr,
2472 			   struct uverbs_attr_bundle *attrs)
2473 {
2474 #define IRDMA_CREATE_CQ_MIN_REQ_LEN offsetofend(struct irdma_create_cq_req, user_cq_buf)
2475 #define IRDMA_CREATE_CQ_MIN_RESP_LEN offsetofend(struct irdma_create_cq_resp, cq_size)
2476 	struct ib_udata *udata = &attrs->driver_udata;
2477 	struct ib_device *ibdev = ibcq->device;
2478 	struct irdma_device *iwdev = to_iwdev(ibdev);
2479 	struct irdma_pci_f *rf = iwdev->rf;
2480 	struct irdma_cq *iwcq = to_iwcq(ibcq);
2481 	u32 cq_num = 0;
2482 	struct irdma_sc_cq *cq;
2483 	struct irdma_sc_dev *dev = &rf->sc_dev;
2484 	struct irdma_cq_init_info info = {};
2485 	struct irdma_cqp_request *cqp_request;
2486 	struct cqp_cmds_info *cqp_info;
2487 	struct irdma_cq_uk_init_info *ukinfo = &info.cq_uk_init_info;
2488 	unsigned long flags;
2489 	int err_code;
2490 	int entries = attr->cqe;
2491 	bool cqe_64byte_ena;
2492 	u8 cqe_size;
2493 
2494 	err_code = cq_validate_flags(attr->flags, dev->hw_attrs.uk_attrs.hw_rev);
2495 	if (err_code)
2496 		return err_code;
2497 
2498 	if (udata && (udata->inlen < IRDMA_CREATE_CQ_MIN_REQ_LEN ||
2499 		      udata->outlen < IRDMA_CREATE_CQ_MIN_RESP_LEN))
2500 		return -EINVAL;
2501 
2502 	err_code = irdma_alloc_rsrc(rf, rf->allocated_cqs, rf->max_cq, &cq_num,
2503 				    &rf->next_cq);
2504 	if (err_code)
2505 		return err_code;
2506 
2507 	cq = &iwcq->sc_cq;
2508 	cq->back_cq = iwcq;
2509 	refcount_set(&iwcq->refcnt, 1);
2510 	spin_lock_init(&iwcq->lock);
2511 	INIT_LIST_HEAD(&iwcq->resize_list);
2512 	INIT_LIST_HEAD(&iwcq->cmpl_generated);
2513 	iwcq->cq_num = cq_num;
2514 	info.dev = dev;
2515 	ukinfo->cq_size = max(entries, 4);
2516 	ukinfo->cq_id = cq_num;
2517 	cqe_64byte_ena = dev->hw_attrs.uk_attrs.feature_flags & IRDMA_FEATURE_64_BYTE_CQE ?
2518 			 true : false;
2519 	cqe_size = cqe_64byte_ena ? 64 : 32;
2520 	ukinfo->avoid_mem_cflct = cqe_64byte_ena;
2521 	iwcq->ibcq.cqe = info.cq_uk_init_info.cq_size;
2522 	if (attr->comp_vector < rf->ceqs_count)
2523 		info.ceq_id = attr->comp_vector;
2524 	info.ceq_id_valid = true;
2525 	info.ceqe_mask = 1;
2526 	info.type = IRDMA_CQ_TYPE_IWARP;
2527 	info.vsi = &iwdev->vsi;
2528 
2529 	if (udata) {
2530 		struct irdma_ucontext *ucontext;
2531 		struct irdma_create_cq_req req = {};
2532 		struct irdma_cq_mr *cqmr;
2533 		struct irdma_pbl *iwpbl;
2534 		struct irdma_pbl *iwpbl_shadow;
2535 		struct irdma_cq_mr *cqmr_shadow;
2536 
2537 		iwcq->user_mode = true;
2538 		ucontext =
2539 			rdma_udata_to_drv_context(udata, struct irdma_ucontext,
2540 						  ibucontext);
2541 		if (ib_copy_from_udata(&req, udata,
2542 				       min(sizeof(req), udata->inlen))) {
2543 			err_code = -EFAULT;
2544 			goto cq_free_rsrc;
2545 		}
2546 
2547 		spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
2548 		iwpbl = irdma_get_pbl((unsigned long)req.user_cq_buf,
2549 				      &ucontext->cq_reg_mem_list);
2550 		spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
2551 		if (!iwpbl) {
2552 			err_code = -EPROTO;
2553 			goto cq_free_rsrc;
2554 		}
2555 
2556 		cqmr = &iwpbl->cq_mr;
2557 
2558 		if (rf->sc_dev.hw_attrs.uk_attrs.feature_flags &
2559 		    IRDMA_FEATURE_CQ_RESIZE && !ucontext->legacy_mode) {
2560 			spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
2561 			iwpbl_shadow = irdma_get_pbl(
2562 					(unsigned long)req.user_shadow_area,
2563 					&ucontext->cq_reg_mem_list);
2564 			spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
2565 
2566 			if (!iwpbl_shadow) {
2567 				err_code = -EPROTO;
2568 				goto cq_free_rsrc;
2569 			}
2570 			cqmr_shadow = &iwpbl_shadow->cq_mr;
2571 			info.shadow_area_pa = cqmr_shadow->cq_pbl.addr;
2572 			cqmr->split = true;
2573 		} else {
2574 			info.shadow_area_pa = cqmr->shadow;
2575 		}
2576 		if (iwpbl->pbl_allocated) {
2577 			info.virtual_map = true;
2578 			info.pbl_chunk_size = 1;
2579 			info.first_pm_pbl_idx = cqmr->cq_pbl.idx;
2580 		} else {
2581 			info.cq_base_pa = cqmr->cq_pbl.addr;
2582 		}
2583 	} else {
2584 		/* Kmode allocations */
2585 		int rsize;
2586 
2587 		if (entries < 1 || entries > rf->max_cqe) {
2588 			err_code = -EINVAL;
2589 			goto cq_free_rsrc;
2590 		}
2591 
2592 		entries += 2;
2593 		if (!cqe_64byte_ena && dev->hw_attrs.uk_attrs.hw_rev >= IRDMA_GEN_2)
2594 			entries *= 2;
2595 
2596 		if (entries & 1)
2597 			entries += 1; /* cq size must be an even number */
2598 
2599 		if (entries * cqe_size == IRDMA_HW_PAGE_SIZE)
2600 			entries += 2;
2601 
2602 		ukinfo->cq_size = entries;
2603 
2604 		if (cqe_64byte_ena)
2605 			rsize = info.cq_uk_init_info.cq_size * sizeof(struct irdma_extended_cqe);
2606 		else
2607 			rsize = info.cq_uk_init_info.cq_size * sizeof(struct irdma_cqe);
2608 		iwcq->kmem.size = ALIGN(round_up(rsize, 256), 256);
2609 		iwcq->kmem.va = dma_alloc_coherent(dev->hw->device,
2610 						   iwcq->kmem.size,
2611 						   &iwcq->kmem.pa, GFP_KERNEL);
2612 		if (!iwcq->kmem.va) {
2613 			err_code = -ENOMEM;
2614 			goto cq_free_rsrc;
2615 		}
2616 
2617 		iwcq->kmem_shadow.size = ALIGN(IRDMA_SHADOW_AREA_SIZE << 3,
2618 					       64);
2619 		iwcq->kmem_shadow.va = dma_alloc_coherent(dev->hw->device,
2620 							  iwcq->kmem_shadow.size,
2621 							  &iwcq->kmem_shadow.pa,
2622 							  GFP_KERNEL);
2623 		if (!iwcq->kmem_shadow.va) {
2624 			err_code = -ENOMEM;
2625 			goto cq_free_rsrc;
2626 		}
2627 		info.shadow_area_pa = iwcq->kmem_shadow.pa;
2628 		ukinfo->shadow_area = iwcq->kmem_shadow.va;
2629 		ukinfo->cq_base = iwcq->kmem.va;
2630 		info.cq_base_pa = iwcq->kmem.pa;
2631 	}
2632 
2633 	info.shadow_read_threshold = min(info.cq_uk_init_info.cq_size / 2,
2634 					 (u32)IRDMA_MAX_CQ_READ_THRESH);
2635 
2636 	if (irdma_sc_cq_init(cq, &info)) {
2637 		ibdev_dbg(&iwdev->ibdev, "VERBS: init cq fail\n");
2638 		err_code = -EPROTO;
2639 		goto cq_free_rsrc;
2640 	}
2641 
2642 	cqp_request = irdma_alloc_and_get_cqp_request(&rf->cqp, true);
2643 	if (!cqp_request) {
2644 		err_code = -ENOMEM;
2645 		goto cq_free_rsrc;
2646 	}
2647 
2648 	cqp_info = &cqp_request->info;
2649 	cqp_info->cqp_cmd = IRDMA_OP_CQ_CREATE;
2650 	cqp_info->post_sq = 1;
2651 	cqp_info->in.u.cq_create.cq = cq;
2652 	cqp_info->in.u.cq_create.check_overflow = true;
2653 	cqp_info->in.u.cq_create.scratch = (uintptr_t)cqp_request;
2654 	err_code = irdma_handle_cqp_op(rf, cqp_request);
2655 	irdma_put_cqp_request(&rf->cqp, cqp_request);
2656 	if (err_code)
2657 		goto cq_free_rsrc;
2658 
2659 	if (udata) {
2660 		struct irdma_create_cq_resp resp = {};
2661 
2662 		resp.cq_id = info.cq_uk_init_info.cq_id;
2663 		resp.cq_size = info.cq_uk_init_info.cq_size;
2664 		if (ib_copy_to_udata(udata, &resp,
2665 				     min(sizeof(resp), udata->outlen))) {
2666 			ibdev_dbg(&iwdev->ibdev,
2667 				  "VERBS: copy to user data\n");
2668 			err_code = -EPROTO;
2669 			goto cq_destroy;
2670 		}
2671 	}
2672 	rf->cq_table[cq_num] = iwcq;
2673 	init_completion(&iwcq->free_cq);
2674 
2675 	return 0;
2676 cq_destroy:
2677 	irdma_cq_wq_destroy(rf, cq);
2678 cq_free_rsrc:
2679 	irdma_cq_free_rsrc(rf, iwcq);
2680 
2681 	return err_code;
2682 }
2683 
2684 /**
2685  * irdma_get_mr_access - get hw MR access permissions from IB access flags
2686  * @access: IB access flags
2687  * @hw_rev: Hardware version
2688  */
irdma_get_mr_access(int access,u8 hw_rev)2689 static inline u16 irdma_get_mr_access(int access, u8 hw_rev)
2690 {
2691 	u16 hw_access = 0;
2692 
2693 	hw_access |= (access & IB_ACCESS_LOCAL_WRITE) ?
2694 		     IRDMA_ACCESS_FLAGS_LOCALWRITE : 0;
2695 	hw_access |= (access & IB_ACCESS_REMOTE_WRITE) ?
2696 		     IRDMA_ACCESS_FLAGS_REMOTEWRITE : 0;
2697 	hw_access |= (access & IB_ACCESS_REMOTE_READ) ?
2698 		     IRDMA_ACCESS_FLAGS_REMOTEREAD : 0;
2699 	if (hw_rev >= IRDMA_GEN_3) {
2700 		hw_access |= (access & IB_ACCESS_MW_BIND) ?
2701 			     IRDMA_ACCESS_FLAGS_BIND_WINDOW : 0;
2702 	}
2703 	hw_access |= (access & IB_ZERO_BASED) ?
2704 		     IRDMA_ACCESS_FLAGS_ZERO_BASED : 0;
2705 	hw_access |= IRDMA_ACCESS_FLAGS_LOCALREAD;
2706 
2707 	return hw_access;
2708 }
2709 
2710 /**
2711  * irdma_free_stag - free stag resource
2712  * @iwdev: irdma device
2713  * @stag: stag to free
2714  */
irdma_free_stag(struct irdma_device * iwdev,u32 stag)2715 static void irdma_free_stag(struct irdma_device *iwdev, u32 stag)
2716 {
2717 	u32 stag_idx;
2718 
2719 	stag_idx = (stag & iwdev->rf->mr_stagmask) >> IRDMA_CQPSQ_STAG_IDX_S;
2720 	irdma_free_rsrc(iwdev->rf, iwdev->rf->allocated_mrs, stag_idx);
2721 }
2722 
2723 /**
2724  * irdma_create_stag - create random stag
2725  * @iwdev: irdma device
2726  */
irdma_create_stag(struct irdma_device * iwdev)2727 static u32 irdma_create_stag(struct irdma_device *iwdev)
2728 {
2729 	u32 stag = 0;
2730 	u32 stag_index = 0;
2731 	u32 next_stag_index;
2732 	u32 driver_key;
2733 	u32 random;
2734 	u8 consumer_key;
2735 	int ret;
2736 
2737 	get_random_bytes(&random, sizeof(random));
2738 	consumer_key = (u8)random;
2739 
2740 	driver_key = random & ~iwdev->rf->mr_stagmask;
2741 	next_stag_index = (random & iwdev->rf->mr_stagmask) >> 8;
2742 	next_stag_index %= iwdev->rf->max_mr;
2743 
2744 	ret = irdma_alloc_rsrc(iwdev->rf, iwdev->rf->allocated_mrs,
2745 			       iwdev->rf->max_mr, &stag_index,
2746 			       &next_stag_index);
2747 	if (ret)
2748 		return stag;
2749 	stag = stag_index << IRDMA_CQPSQ_STAG_IDX_S;
2750 	stag |= driver_key;
2751 	stag += (u32)consumer_key;
2752 
2753 	return stag;
2754 }
2755 
2756 /**
2757  * irdma_next_pbl_addr - Get next pbl address
2758  * @pbl: pointer to a pble
2759  * @pinfo: info pointer
2760  * @idx: index
2761  */
irdma_next_pbl_addr(u64 * pbl,struct irdma_pble_info ** pinfo,u32 * idx)2762 static inline u64 *irdma_next_pbl_addr(u64 *pbl, struct irdma_pble_info **pinfo,
2763 				       u32 *idx)
2764 {
2765 	*idx += 1;
2766 	if (!(*pinfo) || *idx != (*pinfo)->cnt)
2767 		return ++pbl;
2768 	*idx = 0;
2769 	(*pinfo)++;
2770 
2771 	return (*pinfo)->addr;
2772 }
2773 
2774 /**
2775  * irdma_copy_user_pgaddrs - copy user page address to pble's os locally
2776  * @iwmr: iwmr for IB's user page addresses
2777  * @pbl: ple pointer to save 1 level or 0 level pble
2778  * @level: indicated level 0, 1 or 2
2779  */
irdma_copy_user_pgaddrs(struct irdma_mr * iwmr,u64 * pbl,enum irdma_pble_level level)2780 static void irdma_copy_user_pgaddrs(struct irdma_mr *iwmr, u64 *pbl,
2781 				    enum irdma_pble_level level)
2782 {
2783 	struct ib_umem *region = iwmr->region;
2784 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
2785 	struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
2786 	struct irdma_pble_info *pinfo;
2787 	struct ib_block_iter biter;
2788 	u32 idx = 0;
2789 	u32 pbl_cnt = 0;
2790 
2791 	pinfo = (level == PBLE_LEVEL_1) ? NULL : palloc->level2.leaf;
2792 
2793 	if (iwmr->type == IRDMA_MEMREG_TYPE_QP)
2794 		iwpbl->qp_mr.sq_page = sg_page(region->sgt_append.sgt.sgl);
2795 
2796 	rdma_umem_for_each_dma_block(region, &biter, iwmr->page_size) {
2797 		*pbl = rdma_block_iter_dma_address(&biter);
2798 		if (++pbl_cnt == palloc->total_cnt)
2799 			break;
2800 		pbl = irdma_next_pbl_addr(pbl, &pinfo, &idx);
2801 	}
2802 }
2803 
2804 /**
2805  * irdma_check_mem_contiguous - check if pbls stored in arr are contiguous
2806  * @arr: lvl1 pbl array
2807  * @npages: page count
2808  * @pg_size: page size
2809  *
2810  */
irdma_check_mem_contiguous(u64 * arr,u32 npages,u32 pg_size)2811 static bool irdma_check_mem_contiguous(u64 *arr, u32 npages, u32 pg_size)
2812 {
2813 	u32 pg_idx;
2814 
2815 	for (pg_idx = 0; pg_idx < npages; pg_idx++) {
2816 		if ((*arr + (pg_size * pg_idx)) != arr[pg_idx])
2817 			return false;
2818 	}
2819 
2820 	return true;
2821 }
2822 
2823 /**
2824  * irdma_check_mr_contiguous - check if MR is physically contiguous
2825  * @palloc: pbl allocation struct
2826  * @pg_size: page size
2827  */
irdma_check_mr_contiguous(struct irdma_pble_alloc * palloc,u32 pg_size)2828 static bool irdma_check_mr_contiguous(struct irdma_pble_alloc *palloc,
2829 				      u32 pg_size)
2830 {
2831 	struct irdma_pble_level2 *lvl2 = &palloc->level2;
2832 	struct irdma_pble_info *leaf = lvl2->leaf;
2833 	u64 *arr = NULL;
2834 	u64 *start_addr = NULL;
2835 	int i;
2836 	bool ret;
2837 
2838 	if (palloc->level == PBLE_LEVEL_1) {
2839 		arr = palloc->level1.addr;
2840 		ret = irdma_check_mem_contiguous(arr, palloc->total_cnt,
2841 						 pg_size);
2842 		return ret;
2843 	}
2844 
2845 	start_addr = leaf->addr;
2846 
2847 	for (i = 0; i < lvl2->leaf_cnt; i++, leaf++) {
2848 		arr = leaf->addr;
2849 		if ((*start_addr + (i * pg_size * PBLE_PER_PAGE)) != *arr)
2850 			return false;
2851 		ret = irdma_check_mem_contiguous(arr, leaf->cnt, pg_size);
2852 		if (!ret)
2853 			return false;
2854 	}
2855 
2856 	return true;
2857 }
2858 
2859 /**
2860  * irdma_setup_pbles - copy user pg address to pble's
2861  * @rf: RDMA PCI function
2862  * @iwmr: mr pointer for this memory registration
2863  * @lvl: requested pble levels
2864  */
irdma_setup_pbles(struct irdma_pci_f * rf,struct irdma_mr * iwmr,u8 lvl)2865 static int irdma_setup_pbles(struct irdma_pci_f *rf, struct irdma_mr *iwmr,
2866 			     u8 lvl)
2867 {
2868 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
2869 	struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
2870 	struct irdma_pble_info *pinfo;
2871 	u64 *pbl;
2872 	int status;
2873 	enum irdma_pble_level level = PBLE_LEVEL_1;
2874 
2875 	if (lvl) {
2876 		status = irdma_get_pble(rf->pble_rsrc, palloc, iwmr->page_cnt,
2877 					lvl);
2878 		if (status)
2879 			return status;
2880 
2881 		iwpbl->pbl_allocated = true;
2882 		level = palloc->level;
2883 		pinfo = (level == PBLE_LEVEL_1) ? &palloc->level1 :
2884 						  palloc->level2.leaf;
2885 		pbl = pinfo->addr;
2886 	} else {
2887 		pbl = iwmr->pgaddrmem;
2888 	}
2889 
2890 	irdma_copy_user_pgaddrs(iwmr, pbl, level);
2891 
2892 	if (lvl)
2893 		iwmr->pgaddrmem[0] = *pbl;
2894 
2895 	return 0;
2896 }
2897 
2898 /**
2899  * irdma_handle_q_mem - handle memory for qp and cq
2900  * @iwdev: irdma device
2901  * @req: information for q memory management
2902  * @iwpbl: pble struct
2903  * @lvl: pble level mask
2904  */
irdma_handle_q_mem(struct irdma_device * iwdev,struct irdma_mem_reg_req * req,struct irdma_pbl * iwpbl,u8 lvl)2905 static int irdma_handle_q_mem(struct irdma_device *iwdev,
2906 			      struct irdma_mem_reg_req *req,
2907 			      struct irdma_pbl *iwpbl, u8 lvl)
2908 {
2909 	struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
2910 	struct irdma_mr *iwmr = iwpbl->iwmr;
2911 	struct irdma_qp_mr *qpmr = &iwpbl->qp_mr;
2912 	struct irdma_cq_mr *cqmr = &iwpbl->cq_mr;
2913 	struct irdma_srq_mr *srqmr = &iwpbl->srq_mr;
2914 	struct irdma_hmc_pble *hmc_p;
2915 	u64 *arr = iwmr->pgaddrmem;
2916 	u32 pg_size, total;
2917 	int err = 0;
2918 	bool ret = true;
2919 
2920 	pg_size = iwmr->page_size;
2921 	err = irdma_setup_pbles(iwdev->rf, iwmr, lvl);
2922 	if (err)
2923 		return err;
2924 
2925 	if (lvl)
2926 		arr = palloc->level1.addr;
2927 
2928 	switch (iwmr->type) {
2929 	case IRDMA_MEMREG_TYPE_QP:
2930 		total = req->sq_pages + req->rq_pages;
2931 		hmc_p = &qpmr->sq_pbl;
2932 		qpmr->shadow = (dma_addr_t)arr[total];
2933 		/* Need to use physical address for RQ of QP
2934 		 * in case it is associated with SRQ.
2935 		 */
2936 		qpmr->rq_pa = (dma_addr_t)arr[req->sq_pages];
2937 		if (lvl) {
2938 			ret = irdma_check_mem_contiguous(arr, req->sq_pages,
2939 							 pg_size);
2940 			if (ret)
2941 				ret = irdma_check_mem_contiguous(&arr[req->sq_pages],
2942 								 req->rq_pages,
2943 								 pg_size);
2944 		}
2945 
2946 		if (!ret) {
2947 			hmc_p->idx = palloc->level1.idx;
2948 			hmc_p = &qpmr->rq_pbl;
2949 			hmc_p->idx = palloc->level1.idx + req->sq_pages;
2950 		} else {
2951 			hmc_p->addr = arr[0];
2952 			hmc_p = &qpmr->rq_pbl;
2953 			hmc_p->addr = arr[req->sq_pages];
2954 		}
2955 		break;
2956 	case IRDMA_MEMREG_TYPE_SRQ:
2957 		hmc_p = &srqmr->srq_pbl;
2958 		srqmr->shadow = (dma_addr_t)arr[req->rq_pages];
2959 		if (lvl)
2960 			ret = irdma_check_mem_contiguous(arr, req->rq_pages,
2961 							 pg_size);
2962 
2963 		if (!ret)
2964 			hmc_p->idx = palloc->level1.idx;
2965 		else
2966 			hmc_p->addr = arr[0];
2967 	break;
2968 	case IRDMA_MEMREG_TYPE_CQ:
2969 		hmc_p = &cqmr->cq_pbl;
2970 
2971 		if (!cqmr->split)
2972 			cqmr->shadow = (dma_addr_t)arr[req->cq_pages];
2973 
2974 		if (lvl)
2975 			ret = irdma_check_mem_contiguous(arr, req->cq_pages,
2976 							 pg_size);
2977 
2978 		if (!ret)
2979 			hmc_p->idx = palloc->level1.idx;
2980 		else
2981 			hmc_p->addr = arr[0];
2982 	break;
2983 	default:
2984 		ibdev_dbg(&iwdev->ibdev, "VERBS: MR type error\n");
2985 		err = -EINVAL;
2986 	}
2987 
2988 	if (lvl && ret) {
2989 		irdma_free_pble(iwdev->rf->pble_rsrc, palloc);
2990 		iwpbl->pbl_allocated = false;
2991 	}
2992 
2993 	return err;
2994 }
2995 
2996 /**
2997  * irdma_hw_alloc_mw - create the hw memory window
2998  * @iwdev: irdma device
2999  * @iwmr: pointer to memory window info
3000  */
irdma_hw_alloc_mw(struct irdma_device * iwdev,struct irdma_mr * iwmr)3001 static int irdma_hw_alloc_mw(struct irdma_device *iwdev, struct irdma_mr *iwmr)
3002 {
3003 	struct irdma_mw_alloc_info *info;
3004 	struct irdma_pd *iwpd = to_iwpd(iwmr->ibmr.pd);
3005 	struct irdma_cqp_request *cqp_request;
3006 	struct cqp_cmds_info *cqp_info;
3007 	int status;
3008 
3009 	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
3010 	if (!cqp_request)
3011 		return -ENOMEM;
3012 
3013 	cqp_info = &cqp_request->info;
3014 	info = &cqp_info->in.u.mw_alloc.info;
3015 	memset(info, 0, sizeof(*info));
3016 	if (iwmr->ibmw.type == IB_MW_TYPE_1)
3017 		info->mw_wide = true;
3018 
3019 	info->page_size = PAGE_SIZE;
3020 	info->mw_stag_index = iwmr->stag >> IRDMA_CQPSQ_STAG_IDX_S;
3021 	info->pd_id = iwpd->sc_pd.pd_id;
3022 	info->remote_access = true;
3023 	cqp_info->cqp_cmd = IRDMA_OP_MW_ALLOC;
3024 	cqp_info->post_sq = 1;
3025 	cqp_info->in.u.mw_alloc.dev = &iwdev->rf->sc_dev;
3026 	cqp_info->in.u.mw_alloc.scratch = (uintptr_t)cqp_request;
3027 	status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
3028 	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
3029 
3030 	return status;
3031 }
3032 
3033 /**
3034  * irdma_alloc_mw - Allocate memory window
3035  * @ibmw: Memory Window
3036  * @udata: user data pointer
3037  */
irdma_alloc_mw(struct ib_mw * ibmw,struct ib_udata * udata)3038 static int irdma_alloc_mw(struct ib_mw *ibmw, struct ib_udata *udata)
3039 {
3040 	struct irdma_device *iwdev = to_iwdev(ibmw->device);
3041 	struct irdma_mr *iwmr = to_iwmw(ibmw);
3042 	int err_code;
3043 	u32 stag;
3044 
3045 	stag = irdma_create_stag(iwdev);
3046 	if (!stag)
3047 		return -ENOMEM;
3048 
3049 	iwmr->stag = stag;
3050 	ibmw->rkey = stag;
3051 
3052 	err_code = irdma_hw_alloc_mw(iwdev, iwmr);
3053 	if (err_code) {
3054 		irdma_free_stag(iwdev, stag);
3055 		return err_code;
3056 	}
3057 
3058 	return 0;
3059 }
3060 
3061 /**
3062  * irdma_dealloc_mw - Dealloc memory window
3063  * @ibmw: memory window structure.
3064  */
irdma_dealloc_mw(struct ib_mw * ibmw)3065 static int irdma_dealloc_mw(struct ib_mw *ibmw)
3066 {
3067 	struct ib_pd *ibpd = ibmw->pd;
3068 	struct irdma_pd *iwpd = to_iwpd(ibpd);
3069 	struct irdma_mr *iwmr = to_iwmr((struct ib_mr *)ibmw);
3070 	struct irdma_device *iwdev = to_iwdev(ibmw->device);
3071 	struct irdma_cqp_request *cqp_request;
3072 	struct cqp_cmds_info *cqp_info;
3073 	struct irdma_dealloc_stag_info *info;
3074 
3075 	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
3076 	if (!cqp_request)
3077 		return -ENOMEM;
3078 
3079 	cqp_info = &cqp_request->info;
3080 	info = &cqp_info->in.u.dealloc_stag.info;
3081 	memset(info, 0, sizeof(*info));
3082 	info->pd_id = iwpd->sc_pd.pd_id;
3083 	info->stag_idx = ibmw->rkey >> IRDMA_CQPSQ_STAG_IDX_S;
3084 	info->mr = false;
3085 	cqp_info->cqp_cmd = IRDMA_OP_DEALLOC_STAG;
3086 	cqp_info->post_sq = 1;
3087 	cqp_info->in.u.dealloc_stag.dev = &iwdev->rf->sc_dev;
3088 	cqp_info->in.u.dealloc_stag.scratch = (uintptr_t)cqp_request;
3089 	irdma_handle_cqp_op(iwdev->rf, cqp_request);
3090 	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
3091 	irdma_free_stag(iwdev, iwmr->stag);
3092 
3093 	return 0;
3094 }
3095 
3096 /**
3097  * irdma_hw_alloc_stag - cqp command to allocate stag
3098  * @iwdev: irdma device
3099  * @iwmr: irdma mr pointer
3100  */
irdma_hw_alloc_stag(struct irdma_device * iwdev,struct irdma_mr * iwmr)3101 static int irdma_hw_alloc_stag(struct irdma_device *iwdev,
3102 			       struct irdma_mr *iwmr)
3103 {
3104 	struct irdma_allocate_stag_info *info;
3105 	struct ib_pd *pd = iwmr->ibmr.pd;
3106 	struct irdma_pd *iwpd = to_iwpd(pd);
3107 	int status;
3108 	struct irdma_cqp_request *cqp_request;
3109 	struct cqp_cmds_info *cqp_info;
3110 
3111 	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
3112 	if (!cqp_request)
3113 		return -ENOMEM;
3114 
3115 	cqp_info = &cqp_request->info;
3116 	info = &cqp_info->in.u.alloc_stag.info;
3117 	info->page_size = PAGE_SIZE;
3118 	info->stag_idx = iwmr->stag >> IRDMA_CQPSQ_STAG_IDX_S;
3119 	info->pd_id = iwpd->sc_pd.pd_id;
3120 	info->total_len = iwmr->len;
3121 	info->remote_access = true;
3122 	cqp_info->cqp_cmd = IRDMA_OP_ALLOC_STAG;
3123 	cqp_info->post_sq = 1;
3124 	cqp_info->in.u.alloc_stag.dev = &iwdev->rf->sc_dev;
3125 	cqp_info->in.u.alloc_stag.scratch = (uintptr_t)cqp_request;
3126 	status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
3127 	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
3128 	if (status)
3129 		return status;
3130 
3131 	iwmr->is_hwreg = true;
3132 	return 0;
3133 }
3134 
3135 /**
3136  * irdma_alloc_mr - register stag for fast memory registration
3137  * @pd: ibpd pointer
3138  * @mr_type: memory for stag registrion
3139  * @max_num_sg: man number of pages
3140  */
irdma_alloc_mr(struct ib_pd * pd,enum ib_mr_type mr_type,u32 max_num_sg)3141 static struct ib_mr *irdma_alloc_mr(struct ib_pd *pd, enum ib_mr_type mr_type,
3142 				    u32 max_num_sg)
3143 {
3144 	struct irdma_device *iwdev = to_iwdev(pd->device);
3145 	struct irdma_pble_alloc *palloc;
3146 	struct irdma_pbl *iwpbl;
3147 	struct irdma_mr *iwmr;
3148 	u32 stag;
3149 	int err_code;
3150 
3151 	iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
3152 	if (!iwmr)
3153 		return ERR_PTR(-ENOMEM);
3154 
3155 	stag = irdma_create_stag(iwdev);
3156 	if (!stag) {
3157 		err_code = -ENOMEM;
3158 		goto err;
3159 	}
3160 
3161 	iwmr->stag = stag;
3162 	iwmr->ibmr.rkey = stag;
3163 	iwmr->ibmr.lkey = stag;
3164 	iwmr->ibmr.pd = pd;
3165 	iwmr->ibmr.device = pd->device;
3166 	iwpbl = &iwmr->iwpbl;
3167 	iwpbl->iwmr = iwmr;
3168 	iwmr->type = IRDMA_MEMREG_TYPE_MEM;
3169 	palloc = &iwpbl->pble_alloc;
3170 	iwmr->page_cnt = max_num_sg;
3171 	/* Use system PAGE_SIZE as the sg page sizes are unknown at this point */
3172 	iwmr->len = max_num_sg * PAGE_SIZE;
3173 	err_code = irdma_get_pble(iwdev->rf->pble_rsrc, palloc, iwmr->page_cnt,
3174 				  false);
3175 	if (err_code)
3176 		goto err_get_pble;
3177 
3178 	err_code = irdma_hw_alloc_stag(iwdev, iwmr);
3179 	if (err_code)
3180 		goto err_alloc_stag;
3181 
3182 	iwpbl->pbl_allocated = true;
3183 
3184 	return &iwmr->ibmr;
3185 err_alloc_stag:
3186 	irdma_free_pble(iwdev->rf->pble_rsrc, palloc);
3187 err_get_pble:
3188 	irdma_free_stag(iwdev, stag);
3189 err:
3190 	kfree(iwmr);
3191 
3192 	return ERR_PTR(err_code);
3193 }
3194 
3195 /**
3196  * irdma_set_page - populate pbl list for fmr
3197  * @ibmr: ib mem to access iwarp mr pointer
3198  * @addr: page dma address fro pbl list
3199  */
irdma_set_page(struct ib_mr * ibmr,u64 addr)3200 static int irdma_set_page(struct ib_mr *ibmr, u64 addr)
3201 {
3202 	struct irdma_mr *iwmr = to_iwmr(ibmr);
3203 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
3204 	struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
3205 	u64 *pbl;
3206 
3207 	if (unlikely(iwmr->npages == iwmr->page_cnt))
3208 		return -ENOMEM;
3209 
3210 	if (palloc->level == PBLE_LEVEL_2) {
3211 		struct irdma_pble_info *palloc_info =
3212 			palloc->level2.leaf + (iwmr->npages >> PBLE_512_SHIFT);
3213 
3214 		palloc_info->addr[iwmr->npages & (PBLE_PER_PAGE - 1)] = addr;
3215 	} else {
3216 		pbl = palloc->level1.addr;
3217 		pbl[iwmr->npages] = addr;
3218 	}
3219 	iwmr->npages++;
3220 
3221 	return 0;
3222 }
3223 
3224 /**
3225  * irdma_map_mr_sg - map of sg list for fmr
3226  * @ibmr: ib mem to access iwarp mr pointer
3227  * @sg: scatter gather list
3228  * @sg_nents: number of sg pages
3229  * @sg_offset: scatter gather list for fmr
3230  */
irdma_map_mr_sg(struct ib_mr * ibmr,struct scatterlist * sg,int sg_nents,unsigned int * sg_offset)3231 static int irdma_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg,
3232 			   int sg_nents, unsigned int *sg_offset)
3233 {
3234 	struct irdma_mr *iwmr = to_iwmr(ibmr);
3235 
3236 	iwmr->npages = 0;
3237 
3238 	return ib_sg_to_pages(ibmr, sg, sg_nents, sg_offset, irdma_set_page);
3239 }
3240 
3241 /**
3242  * irdma_hwreg_mr - send cqp command for memory registration
3243  * @iwdev: irdma device
3244  * @iwmr: irdma mr pointer
3245  * @access: access for MR
3246  */
irdma_hwreg_mr(struct irdma_device * iwdev,struct irdma_mr * iwmr,u16 access)3247 static int irdma_hwreg_mr(struct irdma_device *iwdev, struct irdma_mr *iwmr,
3248 			  u16 access)
3249 {
3250 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
3251 	struct irdma_reg_ns_stag_info *stag_info;
3252 	struct ib_pd *pd = iwmr->ibmr.pd;
3253 	struct irdma_pd *iwpd = to_iwpd(pd);
3254 	struct irdma_pble_alloc *palloc = &iwpbl->pble_alloc;
3255 	struct irdma_cqp_request *cqp_request;
3256 	struct cqp_cmds_info *cqp_info;
3257 	int ret;
3258 
3259 	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
3260 	if (!cqp_request)
3261 		return -ENOMEM;
3262 
3263 	cqp_info = &cqp_request->info;
3264 	stag_info = &cqp_info->in.u.mr_reg_non_shared.info;
3265 	stag_info->va = iwpbl->user_base;
3266 	stag_info->stag_idx = iwmr->stag >> IRDMA_CQPSQ_STAG_IDX_S;
3267 	stag_info->stag_key = (u8)iwmr->stag;
3268 	stag_info->total_len = iwmr->len;
3269 	stag_info->access_rights = irdma_get_mr_access(access,
3270 						       iwdev->rf->sc_dev.hw_attrs.uk_attrs.hw_rev);
3271 	if (iwdev->rf->sc_dev.hw_attrs.uk_attrs.feature_flags & IRDMA_FEATURE_ATOMIC_OPS)
3272 		stag_info->remote_atomics_en = (access & IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0;
3273 	stag_info->pd_id = iwpd->sc_pd.pd_id;
3274 	stag_info->all_memory = iwmr->dma_mr;
3275 	if (stag_info->access_rights & IRDMA_ACCESS_FLAGS_ZERO_BASED)
3276 		stag_info->addr_type = IRDMA_ADDR_TYPE_ZERO_BASED;
3277 	else
3278 		stag_info->addr_type = IRDMA_ADDR_TYPE_VA_BASED;
3279 	stag_info->page_size = iwmr->page_size;
3280 
3281 	if (iwpbl->pbl_allocated) {
3282 		if (palloc->level == PBLE_LEVEL_1) {
3283 			stag_info->first_pm_pbl_index = palloc->level1.idx;
3284 			stag_info->chunk_size = 1;
3285 		} else {
3286 			stag_info->first_pm_pbl_index = palloc->level2.root.idx;
3287 			stag_info->chunk_size = 3;
3288 		}
3289 	} else {
3290 		stag_info->reg_addr_pa = iwmr->pgaddrmem[0];
3291 	}
3292 
3293 	cqp_info->cqp_cmd = IRDMA_OP_MR_REG_NON_SHARED;
3294 	cqp_info->post_sq = 1;
3295 	cqp_info->in.u.mr_reg_non_shared.dev = &iwdev->rf->sc_dev;
3296 	cqp_info->in.u.mr_reg_non_shared.scratch = (uintptr_t)cqp_request;
3297 	ret = irdma_handle_cqp_op(iwdev->rf, cqp_request);
3298 	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
3299 
3300 	if (!ret)
3301 		iwmr->is_hwreg = true;
3302 
3303 	return ret;
3304 }
3305 
irdma_reg_user_mr_type_mem(struct irdma_mr * iwmr,int access,bool create_stag)3306 static int irdma_reg_user_mr_type_mem(struct irdma_mr *iwmr, int access,
3307 				      bool create_stag)
3308 {
3309 	struct irdma_device *iwdev = to_iwdev(iwmr->ibmr.device);
3310 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
3311 	u32 stag = 0;
3312 	u8 lvl;
3313 	int err;
3314 
3315 	lvl = iwmr->page_cnt != 1 ? PBLE_LEVEL_1 | PBLE_LEVEL_2 : PBLE_LEVEL_0;
3316 
3317 	err = irdma_setup_pbles(iwdev->rf, iwmr, lvl);
3318 	if (err)
3319 		return err;
3320 
3321 	if (lvl) {
3322 		err = irdma_check_mr_contiguous(&iwpbl->pble_alloc,
3323 						iwmr->page_size);
3324 		if (err) {
3325 			irdma_free_pble(iwdev->rf->pble_rsrc, &iwpbl->pble_alloc);
3326 			iwpbl->pbl_allocated = false;
3327 		}
3328 	}
3329 
3330 	if (create_stag) {
3331 		stag = irdma_create_stag(iwdev);
3332 		if (!stag) {
3333 			err = -ENOMEM;
3334 			goto free_pble;
3335 		}
3336 
3337 		iwmr->stag = stag;
3338 		iwmr->ibmr.rkey = stag;
3339 		iwmr->ibmr.lkey = stag;
3340 	}
3341 
3342 	err = irdma_hwreg_mr(iwdev, iwmr, access);
3343 	if (err)
3344 		goto err_hwreg;
3345 
3346 	return 0;
3347 
3348 err_hwreg:
3349 	if (stag)
3350 		irdma_free_stag(iwdev, stag);
3351 
3352 free_pble:
3353 	if (iwpbl->pble_alloc.level != PBLE_LEVEL_0 && iwpbl->pbl_allocated)
3354 		irdma_free_pble(iwdev->rf->pble_rsrc, &iwpbl->pble_alloc);
3355 
3356 	return err;
3357 }
3358 
irdma_alloc_iwmr(struct ib_umem * region,struct ib_pd * pd,u64 virt,enum irdma_memreg_type reg_type)3359 static struct irdma_mr *irdma_alloc_iwmr(struct ib_umem *region,
3360 					 struct ib_pd *pd, u64 virt,
3361 					 enum irdma_memreg_type reg_type)
3362 {
3363 	struct irdma_device *iwdev = to_iwdev(pd->device);
3364 	struct irdma_pbl *iwpbl;
3365 	struct irdma_mr *iwmr;
3366 	unsigned long pgsz_bitmap;
3367 
3368 	iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
3369 	if (!iwmr)
3370 		return ERR_PTR(-ENOMEM);
3371 
3372 	iwpbl = &iwmr->iwpbl;
3373 	iwpbl->iwmr = iwmr;
3374 	iwmr->region = region;
3375 	iwmr->ibmr.pd = pd;
3376 	iwmr->ibmr.device = pd->device;
3377 	iwmr->ibmr.iova = virt;
3378 	iwmr->type = reg_type;
3379 
3380 	pgsz_bitmap = (reg_type == IRDMA_MEMREG_TYPE_MEM) ?
3381 		iwdev->rf->sc_dev.hw_attrs.page_size_cap : SZ_4K;
3382 
3383 	iwmr->page_size = ib_umem_find_best_pgsz(region, pgsz_bitmap, virt);
3384 	if (unlikely(!iwmr->page_size)) {
3385 		kfree(iwmr);
3386 		return ERR_PTR(-EOPNOTSUPP);
3387 	}
3388 
3389 	iwmr->len = region->length;
3390 	iwpbl->user_base = virt;
3391 	iwmr->page_cnt = ib_umem_num_dma_blocks(region, iwmr->page_size);
3392 
3393 	return iwmr;
3394 }
3395 
irdma_free_iwmr(struct irdma_mr * iwmr)3396 static void irdma_free_iwmr(struct irdma_mr *iwmr)
3397 {
3398 	kfree(iwmr);
3399 }
3400 
irdma_reg_user_mr_type_qp(struct irdma_mem_reg_req req,struct ib_udata * udata,struct irdma_mr * iwmr)3401 static int irdma_reg_user_mr_type_qp(struct irdma_mem_reg_req req,
3402 				     struct ib_udata *udata,
3403 				     struct irdma_mr *iwmr)
3404 {
3405 	struct irdma_device *iwdev = to_iwdev(iwmr->ibmr.device);
3406 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
3407 	struct irdma_ucontext *ucontext = NULL;
3408 	unsigned long flags;
3409 	u32 total;
3410 	int err;
3411 	u8 lvl;
3412 
3413 	/* iWarp: Catch page not starting on OS page boundary */
3414 	if (!rdma_protocol_roce(&iwdev->ibdev, 1) &&
3415 	    ib_umem_offset(iwmr->region))
3416 		return -EINVAL;
3417 
3418 	total = req.sq_pages + req.rq_pages + 1;
3419 	if (total > iwmr->page_cnt)
3420 		return -EINVAL;
3421 
3422 	total = req.sq_pages + req.rq_pages;
3423 	lvl = total > 2 ? PBLE_LEVEL_1 : PBLE_LEVEL_0;
3424 	err = irdma_handle_q_mem(iwdev, &req, iwpbl, lvl);
3425 	if (err)
3426 		return err;
3427 
3428 	ucontext = rdma_udata_to_drv_context(udata, struct irdma_ucontext,
3429 					     ibucontext);
3430 	spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
3431 	list_add_tail(&iwpbl->list, &ucontext->qp_reg_mem_list);
3432 	iwpbl->on_list = true;
3433 	spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
3434 
3435 	return 0;
3436 }
3437 
irdma_reg_user_mr_type_srq(struct irdma_mem_reg_req req,struct ib_udata * udata,struct irdma_mr * iwmr)3438 static int irdma_reg_user_mr_type_srq(struct irdma_mem_reg_req req,
3439 				      struct ib_udata *udata,
3440 				      struct irdma_mr *iwmr)
3441 {
3442 	struct irdma_device *iwdev = to_iwdev(iwmr->ibmr.device);
3443 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
3444 	struct irdma_ucontext *ucontext;
3445 	unsigned long flags;
3446 	u32 total;
3447 	int err;
3448 	u8 lvl;
3449 
3450 	total = req.rq_pages + IRDMA_SHADOW_PGCNT;
3451 	if (total > iwmr->page_cnt)
3452 		return -EINVAL;
3453 
3454 	lvl = req.rq_pages > 1 ? PBLE_LEVEL_1 : PBLE_LEVEL_0;
3455 	err = irdma_handle_q_mem(iwdev, &req, iwpbl, lvl);
3456 	if (err)
3457 		return err;
3458 
3459 	ucontext = rdma_udata_to_drv_context(udata, struct irdma_ucontext,
3460 					     ibucontext);
3461 	spin_lock_irqsave(&ucontext->srq_reg_mem_list_lock, flags);
3462 	list_add_tail(&iwpbl->list, &ucontext->srq_reg_mem_list);
3463 	iwpbl->on_list = true;
3464 	spin_unlock_irqrestore(&ucontext->srq_reg_mem_list_lock, flags);
3465 
3466 	return 0;
3467 }
3468 
irdma_reg_user_mr_type_cq(struct irdma_mem_reg_req req,struct ib_udata * udata,struct irdma_mr * iwmr)3469 static int irdma_reg_user_mr_type_cq(struct irdma_mem_reg_req req,
3470 				     struct ib_udata *udata,
3471 				     struct irdma_mr *iwmr)
3472 {
3473 	struct irdma_device *iwdev = to_iwdev(iwmr->ibmr.device);
3474 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
3475 	struct irdma_ucontext *ucontext = NULL;
3476 	u8 shadow_pgcnt = 1;
3477 	unsigned long flags;
3478 	u32 total;
3479 	int err;
3480 	u8 lvl;
3481 
3482 	if (iwdev->rf->sc_dev.hw_attrs.uk_attrs.feature_flags & IRDMA_FEATURE_CQ_RESIZE)
3483 		shadow_pgcnt = 0;
3484 	total = req.cq_pages + shadow_pgcnt;
3485 	if (total > iwmr->page_cnt)
3486 		return -EINVAL;
3487 
3488 	lvl = req.cq_pages > 1 ? PBLE_LEVEL_1 : PBLE_LEVEL_0;
3489 	err = irdma_handle_q_mem(iwdev, &req, iwpbl, lvl);
3490 	if (err)
3491 		return err;
3492 
3493 	ucontext = rdma_udata_to_drv_context(udata, struct irdma_ucontext,
3494 					     ibucontext);
3495 	spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
3496 	list_add_tail(&iwpbl->list, &ucontext->cq_reg_mem_list);
3497 	iwpbl->on_list = true;
3498 	spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
3499 
3500 	return 0;
3501 }
3502 
3503 /**
3504  * irdma_reg_user_mr - Register a user memory region
3505  * @pd: ptr of pd
3506  * @start: virtual start address
3507  * @len: length of mr
3508  * @virt: virtual address
3509  * @access: access of mr
3510  * @dmah: dma handle
3511  * @udata: user data
3512  */
irdma_reg_user_mr(struct ib_pd * pd,u64 start,u64 len,u64 virt,int access,struct ib_dmah * dmah,struct ib_udata * udata)3513 static struct ib_mr *irdma_reg_user_mr(struct ib_pd *pd, u64 start, u64 len,
3514 				       u64 virt, int access,
3515 				       struct ib_dmah *dmah,
3516 				       struct ib_udata *udata)
3517 {
3518 #define IRDMA_MEM_REG_MIN_REQ_LEN offsetofend(struct irdma_mem_reg_req, sq_pages)
3519 	struct irdma_device *iwdev = to_iwdev(pd->device);
3520 	struct irdma_mem_reg_req req = {};
3521 	struct ib_umem *region = NULL;
3522 	struct irdma_mr *iwmr = NULL;
3523 	int err;
3524 
3525 	if (dmah)
3526 		return ERR_PTR(-EOPNOTSUPP);
3527 
3528 	if (len > iwdev->rf->sc_dev.hw_attrs.max_mr_size)
3529 		return ERR_PTR(-EINVAL);
3530 
3531 	if (udata->inlen < IRDMA_MEM_REG_MIN_REQ_LEN)
3532 		return ERR_PTR(-EINVAL);
3533 
3534 	region = ib_umem_get(pd->device, start, len, access);
3535 
3536 	if (IS_ERR(region)) {
3537 		ibdev_dbg(&iwdev->ibdev,
3538 			  "VERBS: Failed to create ib_umem region\n");
3539 		return (struct ib_mr *)region;
3540 	}
3541 
3542 	if (ib_copy_from_udata(&req, udata, min(sizeof(req), udata->inlen))) {
3543 		ib_umem_release(region);
3544 		return ERR_PTR(-EFAULT);
3545 	}
3546 
3547 	iwmr = irdma_alloc_iwmr(region, pd, virt, req.reg_type);
3548 	if (IS_ERR(iwmr)) {
3549 		ib_umem_release(region);
3550 		return (struct ib_mr *)iwmr;
3551 	}
3552 
3553 	switch (req.reg_type) {
3554 	case IRDMA_MEMREG_TYPE_QP:
3555 		err = irdma_reg_user_mr_type_qp(req, udata, iwmr);
3556 		if (err)
3557 			goto error;
3558 
3559 		break;
3560 	case IRDMA_MEMREG_TYPE_SRQ:
3561 		err = irdma_reg_user_mr_type_srq(req, udata, iwmr);
3562 		if (err)
3563 			goto error;
3564 
3565 		break;
3566 	case IRDMA_MEMREG_TYPE_CQ:
3567 		err = irdma_reg_user_mr_type_cq(req, udata, iwmr);
3568 		if (err)
3569 			goto error;
3570 		break;
3571 	case IRDMA_MEMREG_TYPE_MEM:
3572 		err = irdma_reg_user_mr_type_mem(iwmr, access, true);
3573 		if (err)
3574 			goto error;
3575 
3576 		break;
3577 	default:
3578 		err = -EINVAL;
3579 		goto error;
3580 	}
3581 
3582 	return &iwmr->ibmr;
3583 error:
3584 	ib_umem_release(region);
3585 	irdma_free_iwmr(iwmr);
3586 
3587 	return ERR_PTR(err);
3588 }
3589 
irdma_reg_user_mr_dmabuf(struct ib_pd * pd,u64 start,u64 len,u64 virt,int fd,int access,struct ib_dmah * dmah,struct uverbs_attr_bundle * attrs)3590 static struct ib_mr *irdma_reg_user_mr_dmabuf(struct ib_pd *pd, u64 start,
3591 					      u64 len, u64 virt,
3592 					      int fd, int access,
3593 					      struct ib_dmah *dmah,
3594 					      struct uverbs_attr_bundle *attrs)
3595 {
3596 	struct irdma_device *iwdev = to_iwdev(pd->device);
3597 	struct ib_umem_dmabuf *umem_dmabuf;
3598 	struct irdma_mr *iwmr;
3599 	int err;
3600 
3601 	if (dmah)
3602 		return ERR_PTR(-EOPNOTSUPP);
3603 
3604 	if (len > iwdev->rf->sc_dev.hw_attrs.max_mr_size)
3605 		return ERR_PTR(-EINVAL);
3606 
3607 	umem_dmabuf = ib_umem_dmabuf_get_pinned(pd->device, start, len, fd, access);
3608 	if (IS_ERR(umem_dmabuf)) {
3609 		ibdev_dbg(&iwdev->ibdev, "Failed to get dmabuf umem[%pe]\n",
3610 			  umem_dmabuf);
3611 		return ERR_CAST(umem_dmabuf);
3612 	}
3613 
3614 	iwmr = irdma_alloc_iwmr(&umem_dmabuf->umem, pd, virt, IRDMA_MEMREG_TYPE_MEM);
3615 	if (IS_ERR(iwmr)) {
3616 		err = PTR_ERR(iwmr);
3617 		goto err_release;
3618 	}
3619 
3620 	err = irdma_reg_user_mr_type_mem(iwmr, access, true);
3621 	if (err)
3622 		goto err_iwmr;
3623 
3624 	return &iwmr->ibmr;
3625 
3626 err_iwmr:
3627 	irdma_free_iwmr(iwmr);
3628 
3629 err_release:
3630 	ib_umem_release(&umem_dmabuf->umem);
3631 
3632 	return ERR_PTR(err);
3633 }
3634 
irdma_hwdereg_mr(struct ib_mr * ib_mr)3635 static int irdma_hwdereg_mr(struct ib_mr *ib_mr)
3636 {
3637 	struct irdma_device *iwdev = to_iwdev(ib_mr->device);
3638 	struct irdma_mr *iwmr = to_iwmr(ib_mr);
3639 	struct irdma_pd *iwpd = to_iwpd(ib_mr->pd);
3640 	struct irdma_dealloc_stag_info *info;
3641 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
3642 	struct irdma_cqp_request *cqp_request;
3643 	struct cqp_cmds_info *cqp_info;
3644 	int status;
3645 
3646 	/* Skip HW MR de-register when it is already de-registered
3647 	 * during an MR re-reregister and the re-registration fails
3648 	 */
3649 	if (!iwmr->is_hwreg)
3650 		return 0;
3651 
3652 	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
3653 	if (!cqp_request)
3654 		return -ENOMEM;
3655 
3656 	cqp_info = &cqp_request->info;
3657 	info = &cqp_info->in.u.dealloc_stag.info;
3658 	info->pd_id = iwpd->sc_pd.pd_id;
3659 	info->stag_idx = ib_mr->rkey >> IRDMA_CQPSQ_STAG_IDX_S;
3660 	info->mr = true;
3661 	if (iwpbl->pbl_allocated)
3662 		info->dealloc_pbl = true;
3663 
3664 	cqp_info->cqp_cmd = IRDMA_OP_DEALLOC_STAG;
3665 	cqp_info->post_sq = 1;
3666 	cqp_info->in.u.dealloc_stag.dev = &iwdev->rf->sc_dev;
3667 	cqp_info->in.u.dealloc_stag.scratch = (uintptr_t)cqp_request;
3668 	status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
3669 	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
3670 	if (status)
3671 		return status;
3672 
3673 	iwmr->is_hwreg = false;
3674 	return 0;
3675 }
3676 
3677 /*
3678  * irdma_rereg_mr_trans - Re-register a user MR for a change translation.
3679  * @iwmr: ptr of iwmr
3680  * @start: virtual start address
3681  * @len: length of mr
3682  * @virt: virtual address
3683  *
3684  * Re-register a user memory region when a change translation is requested.
3685  * Re-register a new region while reusing the stag from the original registration.
3686  */
irdma_rereg_mr_trans(struct irdma_mr * iwmr,u64 start,u64 len,u64 virt)3687 static int irdma_rereg_mr_trans(struct irdma_mr *iwmr, u64 start, u64 len,
3688 				u64 virt)
3689 {
3690 	struct irdma_device *iwdev = to_iwdev(iwmr->ibmr.device);
3691 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
3692 	struct ib_pd *pd = iwmr->ibmr.pd;
3693 	struct ib_umem *region;
3694 	int err;
3695 
3696 	region = ib_umem_get(pd->device, start, len, iwmr->access);
3697 	if (IS_ERR(region))
3698 		return PTR_ERR(region);
3699 
3700 	iwmr->region = region;
3701 	iwmr->ibmr.iova = virt;
3702 	iwmr->ibmr.pd = pd;
3703 	iwmr->page_size = ib_umem_find_best_pgsz(region,
3704 				iwdev->rf->sc_dev.hw_attrs.page_size_cap,
3705 				virt);
3706 	if (unlikely(!iwmr->page_size)) {
3707 		err = -EOPNOTSUPP;
3708 		goto err;
3709 	}
3710 
3711 	iwmr->len = region->length;
3712 	iwpbl->user_base = virt;
3713 	iwmr->page_cnt = ib_umem_num_dma_blocks(region, iwmr->page_size);
3714 
3715 	err = irdma_reg_user_mr_type_mem(iwmr, iwmr->access, false);
3716 	if (err)
3717 		goto err;
3718 
3719 	return 0;
3720 
3721 err:
3722 	ib_umem_release(region);
3723 	return err;
3724 }
3725 
3726 /*
3727  *  irdma_rereg_user_mr - Re-Register a user memory region(MR)
3728  *  @ibmr: ib mem to access iwarp mr pointer
3729  *  @flags: bit mask to indicate which of the attr's of MR modified
3730  *  @start: virtual start address
3731  *  @len: length of mr
3732  *  @virt: virtual address
3733  *  @new_access: bit mask of access flags
3734  *  @new_pd: ptr of pd
3735  *  @udata: user data
3736  *
3737  *  Return:
3738  *  NULL - Success, existing MR updated
3739  *  ERR_PTR - error occurred
3740  */
irdma_rereg_user_mr(struct ib_mr * ib_mr,int flags,u64 start,u64 len,u64 virt,int new_access,struct ib_pd * new_pd,struct ib_udata * udata)3741 static struct ib_mr *irdma_rereg_user_mr(struct ib_mr *ib_mr, int flags,
3742 					 u64 start, u64 len, u64 virt,
3743 					 int new_access, struct ib_pd *new_pd,
3744 					 struct ib_udata *udata)
3745 {
3746 	struct irdma_device *iwdev = to_iwdev(ib_mr->device);
3747 	struct irdma_mr *iwmr = to_iwmr(ib_mr);
3748 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
3749 	int ret;
3750 
3751 	if (len > iwdev->rf->sc_dev.hw_attrs.max_mr_size)
3752 		return ERR_PTR(-EINVAL);
3753 
3754 	if (flags & ~(IB_MR_REREG_TRANS | IB_MR_REREG_PD | IB_MR_REREG_ACCESS))
3755 		return ERR_PTR(-EOPNOTSUPP);
3756 
3757 	ret = irdma_hwdereg_mr(ib_mr);
3758 	if (ret)
3759 		return ERR_PTR(ret);
3760 
3761 	if (flags & IB_MR_REREG_ACCESS)
3762 		iwmr->access = new_access;
3763 
3764 	if (flags & IB_MR_REREG_PD) {
3765 		iwmr->ibmr.pd = new_pd;
3766 		iwmr->ibmr.device = new_pd->device;
3767 	}
3768 
3769 	if (flags & IB_MR_REREG_TRANS) {
3770 		if (iwpbl->pbl_allocated) {
3771 			irdma_free_pble(iwdev->rf->pble_rsrc,
3772 					&iwpbl->pble_alloc);
3773 			iwpbl->pbl_allocated = false;
3774 		}
3775 		if (iwmr->region) {
3776 			ib_umem_release(iwmr->region);
3777 			iwmr->region = NULL;
3778 		}
3779 
3780 		ret = irdma_rereg_mr_trans(iwmr, start, len, virt);
3781 	} else
3782 		ret = irdma_hwreg_mr(iwdev, iwmr, iwmr->access);
3783 	if (ret)
3784 		return ERR_PTR(ret);
3785 
3786 	return NULL;
3787 }
3788 
3789 /**
3790  * irdma_reg_phys_mr - register kernel physical memory
3791  * @pd: ibpd pointer
3792  * @addr: physical address of memory to register
3793  * @size: size of memory to register
3794  * @access: Access rights
3795  * @iova_start: start of virtual address for physical buffers
3796  * @dma_mr: Flag indicating whether this region is a PD DMA MR
3797  */
irdma_reg_phys_mr(struct ib_pd * pd,u64 addr,u64 size,int access,u64 * iova_start,bool dma_mr)3798 struct ib_mr *irdma_reg_phys_mr(struct ib_pd *pd, u64 addr, u64 size, int access,
3799 				u64 *iova_start, bool dma_mr)
3800 {
3801 	struct irdma_device *iwdev = to_iwdev(pd->device);
3802 	struct irdma_pbl *iwpbl;
3803 	struct irdma_mr *iwmr;
3804 	u32 stag;
3805 	int ret;
3806 
3807 	iwmr = kzalloc(sizeof(*iwmr), GFP_KERNEL);
3808 	if (!iwmr)
3809 		return ERR_PTR(-ENOMEM);
3810 
3811 	iwmr->ibmr.pd = pd;
3812 	iwmr->ibmr.device = pd->device;
3813 	iwpbl = &iwmr->iwpbl;
3814 	iwpbl->iwmr = iwmr;
3815 	iwmr->type = IRDMA_MEMREG_TYPE_MEM;
3816 	iwmr->dma_mr = dma_mr;
3817 	iwpbl->user_base = *iova_start;
3818 	stag = irdma_create_stag(iwdev);
3819 	if (!stag) {
3820 		ret = -ENOMEM;
3821 		goto err;
3822 	}
3823 
3824 	iwmr->stag = stag;
3825 	iwmr->ibmr.iova = *iova_start;
3826 	iwmr->ibmr.rkey = stag;
3827 	iwmr->ibmr.lkey = stag;
3828 	iwmr->page_cnt = 1;
3829 	iwmr->pgaddrmem[0] = addr;
3830 	iwmr->len = size;
3831 	iwmr->page_size = SZ_4K;
3832 	ret = irdma_hwreg_mr(iwdev, iwmr, access);
3833 	if (ret) {
3834 		irdma_free_stag(iwdev, stag);
3835 		goto err;
3836 	}
3837 
3838 	return &iwmr->ibmr;
3839 
3840 err:
3841 	kfree(iwmr);
3842 
3843 	return ERR_PTR(ret);
3844 }
3845 
3846 /**
3847  * irdma_get_dma_mr - register physical mem
3848  * @pd: ptr of pd
3849  * @acc: access for memory
3850  */
irdma_get_dma_mr(struct ib_pd * pd,int acc)3851 static struct ib_mr *irdma_get_dma_mr(struct ib_pd *pd, int acc)
3852 {
3853 	u64 kva = 0;
3854 
3855 	return irdma_reg_phys_mr(pd, 0, 0, acc, &kva, true);
3856 }
3857 
3858 /**
3859  * irdma_del_memlist - Deleting pbl list entries for CQ/QP
3860  * @iwmr: iwmr for IB's user page addresses
3861  * @ucontext: ptr to user context
3862  */
irdma_del_memlist(struct irdma_mr * iwmr,struct irdma_ucontext * ucontext)3863 static void irdma_del_memlist(struct irdma_mr *iwmr,
3864 			      struct irdma_ucontext *ucontext)
3865 {
3866 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
3867 	unsigned long flags;
3868 
3869 	switch (iwmr->type) {
3870 	case IRDMA_MEMREG_TYPE_CQ:
3871 		spin_lock_irqsave(&ucontext->cq_reg_mem_list_lock, flags);
3872 		if (iwpbl->on_list) {
3873 			iwpbl->on_list = false;
3874 			list_del(&iwpbl->list);
3875 		}
3876 		spin_unlock_irqrestore(&ucontext->cq_reg_mem_list_lock, flags);
3877 		break;
3878 	case IRDMA_MEMREG_TYPE_QP:
3879 		spin_lock_irqsave(&ucontext->qp_reg_mem_list_lock, flags);
3880 		if (iwpbl->on_list) {
3881 			iwpbl->on_list = false;
3882 			list_del(&iwpbl->list);
3883 		}
3884 		spin_unlock_irqrestore(&ucontext->qp_reg_mem_list_lock, flags);
3885 		break;
3886 	case IRDMA_MEMREG_TYPE_SRQ:
3887 		spin_lock_irqsave(&ucontext->srq_reg_mem_list_lock, flags);
3888 		if (iwpbl->on_list) {
3889 			iwpbl->on_list = false;
3890 			list_del(&iwpbl->list);
3891 		}
3892 		spin_unlock_irqrestore(&ucontext->srq_reg_mem_list_lock, flags);
3893 		break;
3894 	default:
3895 		break;
3896 	}
3897 }
3898 
3899 /**
3900  * irdma_dereg_mr - deregister mr
3901  * @ib_mr: mr ptr for dereg
3902  * @udata: user data
3903  */
irdma_dereg_mr(struct ib_mr * ib_mr,struct ib_udata * udata)3904 static int irdma_dereg_mr(struct ib_mr *ib_mr, struct ib_udata *udata)
3905 {
3906 	struct irdma_mr *iwmr = to_iwmr(ib_mr);
3907 	struct irdma_device *iwdev = to_iwdev(ib_mr->device);
3908 	struct irdma_pbl *iwpbl = &iwmr->iwpbl;
3909 	int ret;
3910 
3911 	if (iwmr->type != IRDMA_MEMREG_TYPE_MEM) {
3912 		if (iwmr->region) {
3913 			struct irdma_ucontext *ucontext;
3914 
3915 			ucontext = rdma_udata_to_drv_context(udata,
3916 						struct irdma_ucontext,
3917 						ibucontext);
3918 			irdma_del_memlist(iwmr, ucontext);
3919 		}
3920 		goto done;
3921 	}
3922 
3923 	ret = irdma_hwdereg_mr(ib_mr);
3924 	if (ret)
3925 		return ret;
3926 
3927 	irdma_free_stag(iwdev, iwmr->stag);
3928 done:
3929 	if (iwpbl->pbl_allocated)
3930 		irdma_free_pble(iwdev->rf->pble_rsrc, &iwpbl->pble_alloc);
3931 
3932 	if (iwmr->region)
3933 		ib_umem_release(iwmr->region);
3934 
3935 	kfree(iwmr);
3936 
3937 	return 0;
3938 }
3939 
3940 /**
3941  * irdma_post_send -  kernel application wr
3942  * @ibqp: qp ptr for wr
3943  * @ib_wr: work request ptr
3944  * @bad_wr: return of bad wr if err
3945  */
irdma_post_send(struct ib_qp * ibqp,const struct ib_send_wr * ib_wr,const struct ib_send_wr ** bad_wr)3946 static int irdma_post_send(struct ib_qp *ibqp,
3947 			   const struct ib_send_wr *ib_wr,
3948 			   const struct ib_send_wr **bad_wr)
3949 {
3950 	struct irdma_qp *iwqp;
3951 	struct irdma_qp_uk *ukqp;
3952 	struct irdma_sc_dev *dev;
3953 	struct irdma_post_sq_info info;
3954 	int err = 0;
3955 	unsigned long flags;
3956 	bool inv_stag;
3957 	struct irdma_ah *ah;
3958 
3959 	iwqp = to_iwqp(ibqp);
3960 	ukqp = &iwqp->sc_qp.qp_uk;
3961 	dev = &iwqp->iwdev->rf->sc_dev;
3962 
3963 	spin_lock_irqsave(&iwqp->lock, flags);
3964 	while (ib_wr) {
3965 		memset(&info, 0, sizeof(info));
3966 		inv_stag = false;
3967 		info.wr_id = (ib_wr->wr_id);
3968 		if ((ib_wr->send_flags & IB_SEND_SIGNALED) || iwqp->sig_all)
3969 			info.signaled = true;
3970 		if (ib_wr->send_flags & IB_SEND_FENCE)
3971 			info.read_fence = true;
3972 		switch (ib_wr->opcode) {
3973 		case IB_WR_ATOMIC_CMP_AND_SWP:
3974 			if (unlikely(!(dev->hw_attrs.uk_attrs.feature_flags &
3975 				       IRDMA_FEATURE_ATOMIC_OPS))) {
3976 				err = -EINVAL;
3977 				break;
3978 			}
3979 			info.op_type = IRDMA_OP_TYPE_ATOMIC_COMPARE_AND_SWAP;
3980 			info.op.atomic_compare_swap.tagged_offset = ib_wr->sg_list[0].addr;
3981 			info.op.atomic_compare_swap.remote_tagged_offset =
3982 				atomic_wr(ib_wr)->remote_addr;
3983 			info.op.atomic_compare_swap.swap_data_bytes = atomic_wr(ib_wr)->swap;
3984 			info.op.atomic_compare_swap.compare_data_bytes =
3985 				atomic_wr(ib_wr)->compare_add;
3986 			info.op.atomic_compare_swap.stag = ib_wr->sg_list[0].lkey;
3987 			info.op.atomic_compare_swap.remote_stag = atomic_wr(ib_wr)->rkey;
3988 			err = irdma_uk_atomic_compare_swap(ukqp, &info, false);
3989 			break;
3990 		case IB_WR_ATOMIC_FETCH_AND_ADD:
3991 			if (unlikely(!(dev->hw_attrs.uk_attrs.feature_flags &
3992 				       IRDMA_FEATURE_ATOMIC_OPS))) {
3993 				err = -EINVAL;
3994 				break;
3995 			}
3996 			info.op_type = IRDMA_OP_TYPE_ATOMIC_FETCH_AND_ADD;
3997 			info.op.atomic_fetch_add.tagged_offset = ib_wr->sg_list[0].addr;
3998 			info.op.atomic_fetch_add.remote_tagged_offset =
3999 				atomic_wr(ib_wr)->remote_addr;
4000 			info.op.atomic_fetch_add.fetch_add_data_bytes =
4001 				atomic_wr(ib_wr)->compare_add;
4002 			info.op.atomic_fetch_add.stag = ib_wr->sg_list[0].lkey;
4003 			info.op.atomic_fetch_add.remote_stag =
4004 				atomic_wr(ib_wr)->rkey;
4005 			err = irdma_uk_atomic_fetch_add(ukqp, &info, false);
4006 			break;
4007 		case IB_WR_SEND_WITH_IMM:
4008 			if (ukqp->qp_caps & IRDMA_SEND_WITH_IMM) {
4009 				info.imm_data_valid = true;
4010 				info.imm_data = ntohl(ib_wr->ex.imm_data);
4011 			} else {
4012 				err = -EINVAL;
4013 				break;
4014 			}
4015 			fallthrough;
4016 		case IB_WR_SEND:
4017 		case IB_WR_SEND_WITH_INV:
4018 			if (ib_wr->opcode == IB_WR_SEND ||
4019 			    ib_wr->opcode == IB_WR_SEND_WITH_IMM) {
4020 				if (ib_wr->send_flags & IB_SEND_SOLICITED)
4021 					info.op_type = IRDMA_OP_TYPE_SEND_SOL;
4022 				else
4023 					info.op_type = IRDMA_OP_TYPE_SEND;
4024 			} else {
4025 				if (ib_wr->send_flags & IB_SEND_SOLICITED)
4026 					info.op_type = IRDMA_OP_TYPE_SEND_SOL_INV;
4027 				else
4028 					info.op_type = IRDMA_OP_TYPE_SEND_INV;
4029 				info.stag_to_inv = ib_wr->ex.invalidate_rkey;
4030 			}
4031 
4032 			info.op.send.num_sges = ib_wr->num_sge;
4033 			info.op.send.sg_list = ib_wr->sg_list;
4034 			if (iwqp->ibqp.qp_type == IB_QPT_UD ||
4035 			    iwqp->ibqp.qp_type == IB_QPT_GSI) {
4036 				ah = to_iwah(ud_wr(ib_wr)->ah);
4037 				info.op.send.ah_id = ah->sc_ah.ah_info.ah_idx;
4038 				info.op.send.qkey = ud_wr(ib_wr)->remote_qkey;
4039 				info.op.send.dest_qp = ud_wr(ib_wr)->remote_qpn;
4040 			}
4041 
4042 			if (ib_wr->send_flags & IB_SEND_INLINE)
4043 				err = irdma_uk_inline_send(ukqp, &info, false);
4044 			else
4045 				err = irdma_uk_send(ukqp, &info, false);
4046 			break;
4047 		case IB_WR_RDMA_WRITE_WITH_IMM:
4048 			if (ukqp->qp_caps & IRDMA_WRITE_WITH_IMM) {
4049 				info.imm_data_valid = true;
4050 				info.imm_data = ntohl(ib_wr->ex.imm_data);
4051 			} else {
4052 				err = -EINVAL;
4053 				break;
4054 			}
4055 			fallthrough;
4056 		case IB_WR_RDMA_WRITE:
4057 			if (ib_wr->send_flags & IB_SEND_SOLICITED)
4058 				info.op_type = IRDMA_OP_TYPE_RDMA_WRITE_SOL;
4059 			else
4060 				info.op_type = IRDMA_OP_TYPE_RDMA_WRITE;
4061 
4062 			info.op.rdma_write.num_lo_sges = ib_wr->num_sge;
4063 			info.op.rdma_write.lo_sg_list = ib_wr->sg_list;
4064 			info.op.rdma_write.rem_addr.addr =
4065 				rdma_wr(ib_wr)->remote_addr;
4066 			info.op.rdma_write.rem_addr.lkey = rdma_wr(ib_wr)->rkey;
4067 			if (ib_wr->send_flags & IB_SEND_INLINE)
4068 				err = irdma_uk_inline_rdma_write(ukqp, &info, false);
4069 			else
4070 				err = irdma_uk_rdma_write(ukqp, &info, false);
4071 			break;
4072 		case IB_WR_RDMA_READ_WITH_INV:
4073 			inv_stag = true;
4074 			fallthrough;
4075 		case IB_WR_RDMA_READ:
4076 			if (ib_wr->num_sge >
4077 			    dev->hw_attrs.uk_attrs.max_hw_read_sges) {
4078 				err = -EINVAL;
4079 				break;
4080 			}
4081 			info.op_type = IRDMA_OP_TYPE_RDMA_READ;
4082 			info.op.rdma_read.rem_addr.addr = rdma_wr(ib_wr)->remote_addr;
4083 			info.op.rdma_read.rem_addr.lkey = rdma_wr(ib_wr)->rkey;
4084 			info.op.rdma_read.lo_sg_list = (void *)ib_wr->sg_list;
4085 			info.op.rdma_read.num_lo_sges = ib_wr->num_sge;
4086 			err = irdma_uk_rdma_read(ukqp, &info, inv_stag, false);
4087 			break;
4088 		case IB_WR_LOCAL_INV:
4089 			info.op_type = IRDMA_OP_TYPE_INV_STAG;
4090 			info.local_fence = true;
4091 			info.op.inv_local_stag.target_stag = ib_wr->ex.invalidate_rkey;
4092 			err = irdma_uk_stag_local_invalidate(ukqp, &info, true);
4093 			break;
4094 		case IB_WR_REG_MR: {
4095 			struct irdma_mr *iwmr = to_iwmr(reg_wr(ib_wr)->mr);
4096 			struct irdma_pble_alloc *palloc = &iwmr->iwpbl.pble_alloc;
4097 			struct irdma_fast_reg_stag_info stag_info = {};
4098 
4099 			stag_info.signaled = info.signaled;
4100 			stag_info.read_fence = info.read_fence;
4101 			stag_info.access_rights =
4102 				irdma_get_mr_access(reg_wr(ib_wr)->access,
4103 						    dev->hw_attrs.uk_attrs.hw_rev);
4104 			stag_info.stag_key = reg_wr(ib_wr)->key & 0xff;
4105 			stag_info.stag_idx = reg_wr(ib_wr)->key >> 8;
4106 			stag_info.page_size = reg_wr(ib_wr)->mr->page_size;
4107 			stag_info.wr_id = ib_wr->wr_id;
4108 			stag_info.addr_type = IRDMA_ADDR_TYPE_VA_BASED;
4109 			stag_info.va = (void *)(uintptr_t)iwmr->ibmr.iova;
4110 			stag_info.total_len = iwmr->ibmr.length;
4111 			stag_info.reg_addr_pa = *palloc->level1.addr;
4112 			stag_info.first_pm_pbl_index = palloc->level1.idx;
4113 			stag_info.local_fence = ib_wr->send_flags & IB_SEND_FENCE;
4114 			if (iwmr->npages > IRDMA_MIN_PAGES_PER_FMR)
4115 				stag_info.chunk_size = 1;
4116 			err = irdma_sc_mr_fast_register(&iwqp->sc_qp, &stag_info,
4117 							true);
4118 			break;
4119 		}
4120 		default:
4121 			err = -EINVAL;
4122 			ibdev_dbg(&iwqp->iwdev->ibdev,
4123 				  "VERBS: upost_send bad opcode = 0x%x\n",
4124 				  ib_wr->opcode);
4125 			break;
4126 		}
4127 
4128 		if (err)
4129 			break;
4130 		ib_wr = ib_wr->next;
4131 	}
4132 
4133 	if (!iwqp->flush_issued) {
4134 		if (iwqp->hw_iwarp_state <= IRDMA_QP_STATE_RTS)
4135 			irdma_uk_qp_post_wr(ukqp);
4136 		spin_unlock_irqrestore(&iwqp->lock, flags);
4137 	} else {
4138 		spin_unlock_irqrestore(&iwqp->lock, flags);
4139 		mod_delayed_work(iwqp->iwdev->cleanup_wq, &iwqp->dwork_flush,
4140 				 msecs_to_jiffies(IRDMA_FLUSH_DELAY_MS));
4141 	}
4142 
4143 	if (err)
4144 		*bad_wr = ib_wr;
4145 
4146 	return err;
4147 }
4148 
4149 /**
4150  * irdma_post_srq_recv - post receive wr for kernel application
4151  * @ibsrq: ib srq pointer
4152  * @ib_wr: work request for receive
4153  * @bad_wr: bad wr caused an error
4154  */
irdma_post_srq_recv(struct ib_srq * ibsrq,const struct ib_recv_wr * ib_wr,const struct ib_recv_wr ** bad_wr)4155 static int irdma_post_srq_recv(struct ib_srq *ibsrq,
4156 			       const struct ib_recv_wr *ib_wr,
4157 			       const struct ib_recv_wr **bad_wr)
4158 {
4159 	struct irdma_srq *iwsrq = to_iwsrq(ibsrq);
4160 	struct irdma_srq_uk *uksrq = &iwsrq->sc_srq.srq_uk;
4161 	struct irdma_post_rq_info post_recv = {};
4162 	unsigned long flags;
4163 	int err = 0;
4164 
4165 	spin_lock_irqsave(&iwsrq->lock, flags);
4166 	while (ib_wr) {
4167 		if (ib_wr->num_sge > uksrq->max_srq_frag_cnt) {
4168 			err = -EINVAL;
4169 			goto out;
4170 		}
4171 		post_recv.num_sges = ib_wr->num_sge;
4172 		post_recv.wr_id = ib_wr->wr_id;
4173 		post_recv.sg_list = ib_wr->sg_list;
4174 		err = irdma_uk_srq_post_receive(uksrq, &post_recv);
4175 		if (err)
4176 			goto out;
4177 
4178 		ib_wr = ib_wr->next;
4179 	}
4180 
4181 out:
4182 	spin_unlock_irqrestore(&iwsrq->lock, flags);
4183 
4184 	if (err)
4185 		*bad_wr = ib_wr;
4186 
4187 	return err;
4188 }
4189 
4190 /**
4191  * irdma_post_recv - post receive wr for kernel application
4192  * @ibqp: ib qp pointer
4193  * @ib_wr: work request for receive
4194  * @bad_wr: bad wr caused an error
4195  */
irdma_post_recv(struct ib_qp * ibqp,const struct ib_recv_wr * ib_wr,const struct ib_recv_wr ** bad_wr)4196 static int irdma_post_recv(struct ib_qp *ibqp,
4197 			   const struct ib_recv_wr *ib_wr,
4198 			   const struct ib_recv_wr **bad_wr)
4199 {
4200 	struct irdma_qp *iwqp;
4201 	struct irdma_qp_uk *ukqp;
4202 	struct irdma_post_rq_info post_recv = {};
4203 	unsigned long flags;
4204 	int err = 0;
4205 
4206 	iwqp = to_iwqp(ibqp);
4207 	ukqp = &iwqp->sc_qp.qp_uk;
4208 
4209 	if (ukqp->srq_uk) {
4210 		*bad_wr = ib_wr;
4211 		return -EINVAL;
4212 	}
4213 
4214 	spin_lock_irqsave(&iwqp->lock, flags);
4215 	while (ib_wr) {
4216 		post_recv.num_sges = ib_wr->num_sge;
4217 		post_recv.wr_id = ib_wr->wr_id;
4218 		post_recv.sg_list = ib_wr->sg_list;
4219 		err = irdma_uk_post_receive(ukqp, &post_recv);
4220 		if (err) {
4221 			ibdev_dbg(&iwqp->iwdev->ibdev,
4222 				  "VERBS: post_recv err %d\n", err);
4223 			goto out;
4224 		}
4225 
4226 		ib_wr = ib_wr->next;
4227 	}
4228 
4229 out:
4230 	spin_unlock_irqrestore(&iwqp->lock, flags);
4231 	if (iwqp->flush_issued)
4232 		mod_delayed_work(iwqp->iwdev->cleanup_wq, &iwqp->dwork_flush,
4233 				 msecs_to_jiffies(IRDMA_FLUSH_DELAY_MS));
4234 
4235 	if (err)
4236 		*bad_wr = ib_wr;
4237 
4238 	return err;
4239 }
4240 
4241 /**
4242  * irdma_flush_err_to_ib_wc_status - return change flush error code to IB status
4243  * @opcode: iwarp flush code
4244  */
irdma_flush_err_to_ib_wc_status(enum irdma_flush_opcode opcode)4245 static enum ib_wc_status irdma_flush_err_to_ib_wc_status(enum irdma_flush_opcode opcode)
4246 {
4247 	switch (opcode) {
4248 	case FLUSH_PROT_ERR:
4249 		return IB_WC_LOC_PROT_ERR;
4250 	case FLUSH_REM_ACCESS_ERR:
4251 		return IB_WC_REM_ACCESS_ERR;
4252 	case FLUSH_LOC_QP_OP_ERR:
4253 		return IB_WC_LOC_QP_OP_ERR;
4254 	case FLUSH_REM_OP_ERR:
4255 		return IB_WC_REM_OP_ERR;
4256 	case FLUSH_LOC_LEN_ERR:
4257 		return IB_WC_LOC_LEN_ERR;
4258 	case FLUSH_GENERAL_ERR:
4259 		return IB_WC_WR_FLUSH_ERR;
4260 	case FLUSH_RETRY_EXC_ERR:
4261 		return IB_WC_RETRY_EXC_ERR;
4262 	case FLUSH_MW_BIND_ERR:
4263 		return IB_WC_MW_BIND_ERR;
4264 	case FLUSH_REM_INV_REQ_ERR:
4265 		return IB_WC_REM_INV_REQ_ERR;
4266 	case FLUSH_RNR_RETRY_EXC_ERR:
4267 		return IB_WC_RNR_RETRY_EXC_ERR;
4268 	case FLUSH_FATAL_ERR:
4269 	default:
4270 		return IB_WC_FATAL_ERR;
4271 	}
4272 }
4273 
4274 /**
4275  * irdma_process_cqe - process cqe info
4276  * @entry: processed cqe
4277  * @cq_poll_info: cqe info
4278  */
irdma_process_cqe(struct ib_wc * entry,struct irdma_cq_poll_info * cq_poll_info)4279 static void irdma_process_cqe(struct ib_wc *entry,
4280 			      struct irdma_cq_poll_info *cq_poll_info)
4281 {
4282 	struct irdma_sc_qp *qp;
4283 
4284 	entry->wc_flags = 0;
4285 	entry->pkey_index = 0;
4286 	entry->wr_id = cq_poll_info->wr_id;
4287 
4288 	qp = cq_poll_info->qp_handle;
4289 	entry->qp = qp->qp_uk.back_qp;
4290 
4291 	if (cq_poll_info->error) {
4292 		entry->status = (cq_poll_info->comp_status == IRDMA_COMPL_STATUS_FLUSHED) ?
4293 				irdma_flush_err_to_ib_wc_status(cq_poll_info->minor_err) : IB_WC_GENERAL_ERR;
4294 
4295 		entry->vendor_err = cq_poll_info->major_err << 16 |
4296 				    cq_poll_info->minor_err;
4297 	} else {
4298 		entry->status = IB_WC_SUCCESS;
4299 		if (cq_poll_info->imm_valid) {
4300 			entry->ex.imm_data = htonl(cq_poll_info->imm_data);
4301 			entry->wc_flags |= IB_WC_WITH_IMM;
4302 		}
4303 		if (cq_poll_info->ud_smac_valid) {
4304 			ether_addr_copy(entry->smac, cq_poll_info->ud_smac);
4305 			entry->wc_flags |= IB_WC_WITH_SMAC;
4306 		}
4307 
4308 		if (cq_poll_info->ud_vlan_valid) {
4309 			u16 vlan = cq_poll_info->ud_vlan & VLAN_VID_MASK;
4310 
4311 			entry->sl = cq_poll_info->ud_vlan >> VLAN_PRIO_SHIFT;
4312 			if (vlan) {
4313 				entry->vlan_id = vlan;
4314 				entry->wc_flags |= IB_WC_WITH_VLAN;
4315 			}
4316 		} else {
4317 			entry->sl = 0;
4318 		}
4319 	}
4320 
4321 	if (cq_poll_info->q_type == IRDMA_CQE_QTYPE_SQ) {
4322 		set_ib_wc_op_sq(cq_poll_info, entry);
4323 	} else {
4324 		if (qp->dev->hw_attrs.uk_attrs.hw_rev <= IRDMA_GEN_2)
4325 			set_ib_wc_op_rq(cq_poll_info, entry,
4326 					qp->qp_uk.qp_caps & IRDMA_SEND_WITH_IMM ?
4327 					true : false);
4328 		else
4329 			set_ib_wc_op_rq_gen_3(cq_poll_info, entry);
4330 		if (qp->qp_uk.qp_type != IRDMA_QP_TYPE_ROCE_UD &&
4331 		    cq_poll_info->stag_invalid_set) {
4332 			entry->ex.invalidate_rkey = cq_poll_info->inv_stag;
4333 			entry->wc_flags |= IB_WC_WITH_INVALIDATE;
4334 		}
4335 	}
4336 
4337 	if (qp->qp_uk.qp_type == IRDMA_QP_TYPE_ROCE_UD) {
4338 		entry->src_qp = cq_poll_info->ud_src_qpn;
4339 		entry->slid = 0;
4340 		entry->wc_flags |=
4341 			(IB_WC_GRH | IB_WC_WITH_NETWORK_HDR_TYPE);
4342 		entry->network_hdr_type = cq_poll_info->ipv4 ?
4343 						  RDMA_NETWORK_IPV4 :
4344 						  RDMA_NETWORK_IPV6;
4345 	} else {
4346 		entry->src_qp = cq_poll_info->qp_id;
4347 	}
4348 
4349 	entry->byte_len = cq_poll_info->bytes_xfered;
4350 }
4351 
4352 /**
4353  * irdma_poll_one - poll one entry of the CQ
4354  * @ukcq: ukcq to poll
4355  * @cur_cqe: current CQE info to be filled in
4356  * @entry: ibv_wc object to be filled for non-extended CQ or NULL for extended CQ
4357  *
4358  * Returns the internal irdma device error code or 0 on success
4359  */
irdma_poll_one(struct irdma_cq_uk * ukcq,struct irdma_cq_poll_info * cur_cqe,struct ib_wc * entry)4360 static inline int irdma_poll_one(struct irdma_cq_uk *ukcq,
4361 				 struct irdma_cq_poll_info *cur_cqe,
4362 				 struct ib_wc *entry)
4363 {
4364 	int ret = irdma_uk_cq_poll_cmpl(ukcq, cur_cqe);
4365 
4366 	if (ret)
4367 		return ret;
4368 
4369 	irdma_process_cqe(entry, cur_cqe);
4370 
4371 	return 0;
4372 }
4373 
4374 /**
4375  * __irdma_poll_cq - poll cq for completion (kernel apps)
4376  * @iwcq: cq to poll
4377  * @num_entries: number of entries to poll
4378  * @entry: wr of a completed entry
4379  */
__irdma_poll_cq(struct irdma_cq * iwcq,int num_entries,struct ib_wc * entry)4380 static int __irdma_poll_cq(struct irdma_cq *iwcq, int num_entries, struct ib_wc *entry)
4381 {
4382 	struct list_head *tmp_node, *list_node;
4383 	struct irdma_cq_buf *last_buf = NULL;
4384 	struct irdma_cq_poll_info *cur_cqe = &iwcq->cur_cqe;
4385 	struct irdma_cq_buf *cq_buf;
4386 	int ret;
4387 	struct irdma_device *iwdev;
4388 	struct irdma_cq_uk *ukcq;
4389 	bool cq_new_cqe = false;
4390 	int resized_bufs = 0;
4391 	int npolled = 0;
4392 
4393 	iwdev = to_iwdev(iwcq->ibcq.device);
4394 	ukcq = &iwcq->sc_cq.cq_uk;
4395 
4396 	/* go through the list of previously resized CQ buffers */
4397 	list_for_each_safe(list_node, tmp_node, &iwcq->resize_list) {
4398 		cq_buf = container_of(list_node, struct irdma_cq_buf, list);
4399 		while (npolled < num_entries) {
4400 			ret = irdma_poll_one(&cq_buf->cq_uk, cur_cqe, entry + npolled);
4401 			if (!ret) {
4402 				++npolled;
4403 				cq_new_cqe = true;
4404 				continue;
4405 			}
4406 			if (ret == -ENOENT)
4407 				break;
4408 			 /* QP using the CQ is destroyed. Skip reporting this CQE */
4409 			if (ret == -EFAULT) {
4410 				cq_new_cqe = true;
4411 				continue;
4412 			}
4413 			goto error;
4414 		}
4415 
4416 		/* save the resized CQ buffer which received the last cqe */
4417 		if (cq_new_cqe)
4418 			last_buf = cq_buf;
4419 		cq_new_cqe = false;
4420 	}
4421 
4422 	/* check the current CQ for new cqes */
4423 	while (npolled < num_entries) {
4424 		ret = irdma_poll_one(ukcq, cur_cqe, entry + npolled);
4425 		if (ret == -ENOENT) {
4426 			ret = irdma_generated_cmpls(iwcq, cur_cqe);
4427 			if (!ret)
4428 				irdma_process_cqe(entry + npolled, cur_cqe);
4429 		}
4430 		if (!ret) {
4431 			++npolled;
4432 			cq_new_cqe = true;
4433 			continue;
4434 		}
4435 
4436 		if (ret == -ENOENT)
4437 			break;
4438 		/* QP using the CQ is destroyed. Skip reporting this CQE */
4439 		if (ret == -EFAULT) {
4440 			cq_new_cqe = true;
4441 			continue;
4442 		}
4443 		goto error;
4444 	}
4445 
4446 	if (cq_new_cqe)
4447 		/* all previous CQ resizes are complete */
4448 		resized_bufs = irdma_process_resize_list(iwcq, iwdev, NULL);
4449 	else if (last_buf)
4450 		/* only CQ resizes up to the last_buf are complete */
4451 		resized_bufs = irdma_process_resize_list(iwcq, iwdev, last_buf);
4452 	if (resized_bufs)
4453 		/* report to the HW the number of complete CQ resizes */
4454 		irdma_uk_cq_set_resized_cnt(ukcq, resized_bufs);
4455 
4456 	return npolled;
4457 error:
4458 	ibdev_dbg(&iwdev->ibdev, "%s: Error polling CQ, irdma_err: %d\n",
4459 		  __func__, ret);
4460 
4461 	return ret;
4462 }
4463 
4464 /**
4465  * irdma_poll_cq - poll cq for completion (kernel apps)
4466  * @ibcq: cq to poll
4467  * @num_entries: number of entries to poll
4468  * @entry: wr of a completed entry
4469  */
irdma_poll_cq(struct ib_cq * ibcq,int num_entries,struct ib_wc * entry)4470 static int irdma_poll_cq(struct ib_cq *ibcq, int num_entries,
4471 			 struct ib_wc *entry)
4472 {
4473 	struct irdma_cq *iwcq;
4474 	unsigned long flags;
4475 	int ret;
4476 
4477 	iwcq = to_iwcq(ibcq);
4478 
4479 	spin_lock_irqsave(&iwcq->lock, flags);
4480 	ret = __irdma_poll_cq(iwcq, num_entries, entry);
4481 	spin_unlock_irqrestore(&iwcq->lock, flags);
4482 
4483 	return ret;
4484 }
4485 
4486 /**
4487  * irdma_req_notify_cq - arm cq kernel application
4488  * @ibcq: cq to arm
4489  * @notify_flags: notofication flags
4490  */
irdma_req_notify_cq(struct ib_cq * ibcq,enum ib_cq_notify_flags notify_flags)4491 static int irdma_req_notify_cq(struct ib_cq *ibcq,
4492 			       enum ib_cq_notify_flags notify_flags)
4493 {
4494 	struct irdma_cq *iwcq;
4495 	struct irdma_cq_uk *ukcq;
4496 	unsigned long flags;
4497 	enum irdma_cmpl_notify cq_notify;
4498 	bool promo_event = false;
4499 	int ret = 0;
4500 
4501 	cq_notify = notify_flags == IB_CQ_SOLICITED ?
4502 		    IRDMA_CQ_COMPL_SOLICITED : IRDMA_CQ_COMPL_EVENT;
4503 	iwcq = to_iwcq(ibcq);
4504 	ukcq = &iwcq->sc_cq.cq_uk;
4505 
4506 	spin_lock_irqsave(&iwcq->lock, flags);
4507 	/* Only promote to arm the CQ for any event if the last arm event was solicited. */
4508 	if (iwcq->last_notify == IRDMA_CQ_COMPL_SOLICITED && notify_flags != IB_CQ_SOLICITED)
4509 		promo_event = true;
4510 
4511 	if (!atomic_cmpxchg(&iwcq->armed, 0, 1) || promo_event) {
4512 		iwcq->last_notify = cq_notify;
4513 		irdma_uk_cq_request_notification(ukcq, cq_notify);
4514 	}
4515 
4516 	if ((notify_flags & IB_CQ_REPORT_MISSED_EVENTS) &&
4517 	    (!irdma_uk_cq_empty(ukcq) || !list_empty(&iwcq->cmpl_generated)))
4518 		ret = 1;
4519 	spin_unlock_irqrestore(&iwcq->lock, flags);
4520 
4521 	return ret;
4522 }
4523 
4524 static const struct rdma_stat_desc irdma_hw_stat_descs[] = {
4525 	/* gen1 - 32-bit */
4526 	[IRDMA_HW_STAT_INDEX_IP4RXDISCARD].name		= "ip4InDiscards",
4527 	[IRDMA_HW_STAT_INDEX_IP4RXTRUNC].name		= "ip4InTruncatedPkts",
4528 	[IRDMA_HW_STAT_INDEX_IP4TXNOROUTE].name		= "ip4OutNoRoutes",
4529 	[IRDMA_HW_STAT_INDEX_IP6RXDISCARD].name		= "ip6InDiscards",
4530 	[IRDMA_HW_STAT_INDEX_IP6RXTRUNC].name		= "ip6InTruncatedPkts",
4531 	[IRDMA_HW_STAT_INDEX_IP6TXNOROUTE].name		= "ip6OutNoRoutes",
4532 	[IRDMA_HW_STAT_INDEX_RXVLANERR].name		= "rxVlanErrors",
4533 	/* gen1 - 64-bit */
4534 	[IRDMA_HW_STAT_INDEX_IP4RXOCTS].name		= "ip4InOctets",
4535 	[IRDMA_HW_STAT_INDEX_IP4RXPKTS].name		= "ip4InPkts",
4536 	[IRDMA_HW_STAT_INDEX_IP4RXFRAGS].name		= "ip4InReasmRqd",
4537 	[IRDMA_HW_STAT_INDEX_IP4RXMCPKTS].name		= "ip4InMcastPkts",
4538 	[IRDMA_HW_STAT_INDEX_IP4TXOCTS].name		= "ip4OutOctets",
4539 	[IRDMA_HW_STAT_INDEX_IP4TXPKTS].name		= "ip4OutPkts",
4540 	[IRDMA_HW_STAT_INDEX_IP4TXFRAGS].name		= "ip4OutSegRqd",
4541 	[IRDMA_HW_STAT_INDEX_IP4TXMCPKTS].name		= "ip4OutMcastPkts",
4542 	[IRDMA_HW_STAT_INDEX_IP6RXOCTS].name		= "ip6InOctets",
4543 	[IRDMA_HW_STAT_INDEX_IP6RXPKTS].name		= "ip6InPkts",
4544 	[IRDMA_HW_STAT_INDEX_IP6RXFRAGS].name		= "ip6InReasmRqd",
4545 	[IRDMA_HW_STAT_INDEX_IP6RXMCPKTS].name		= "ip6InMcastPkts",
4546 	[IRDMA_HW_STAT_INDEX_IP6TXOCTS].name		= "ip6OutOctets",
4547 	[IRDMA_HW_STAT_INDEX_IP6TXPKTS].name		= "ip6OutPkts",
4548 	[IRDMA_HW_STAT_INDEX_IP6TXFRAGS].name		= "ip6OutSegRqd",
4549 	[IRDMA_HW_STAT_INDEX_IP6TXMCPKTS].name		= "ip6OutMcastPkts",
4550 	[IRDMA_HW_STAT_INDEX_RDMARXRDS].name		= "InRdmaReads",
4551 	[IRDMA_HW_STAT_INDEX_RDMARXSNDS].name		= "InRdmaSends",
4552 	[IRDMA_HW_STAT_INDEX_RDMARXWRS].name		= "InRdmaWrites",
4553 	[IRDMA_HW_STAT_INDEX_RDMATXRDS].name		= "OutRdmaReads",
4554 	[IRDMA_HW_STAT_INDEX_RDMATXSNDS].name		= "OutRdmaSends",
4555 	[IRDMA_HW_STAT_INDEX_RDMATXWRS].name		= "OutRdmaWrites",
4556 	[IRDMA_HW_STAT_INDEX_RDMAVBND].name		= "RdmaBnd",
4557 	[IRDMA_HW_STAT_INDEX_RDMAVINV].name		= "RdmaInv",
4558 
4559 	/* gen2 - 32-bit */
4560 	[IRDMA_HW_STAT_INDEX_RXRPCNPHANDLED].name	= "cnpHandled",
4561 	[IRDMA_HW_STAT_INDEX_RXRPCNPIGNORED].name	= "cnpIgnored",
4562 	[IRDMA_HW_STAT_INDEX_TXNPCNPSENT].name		= "cnpSent",
4563 	/* gen2 - 64-bit */
4564 	[IRDMA_HW_STAT_INDEX_IP4RXMCOCTS].name		= "ip4InMcastOctets",
4565 	[IRDMA_HW_STAT_INDEX_IP4TXMCOCTS].name		= "ip4OutMcastOctets",
4566 	[IRDMA_HW_STAT_INDEX_IP6RXMCOCTS].name		= "ip6InMcastOctets",
4567 	[IRDMA_HW_STAT_INDEX_IP6TXMCOCTS].name		= "ip6OutMcastOctets",
4568 	[IRDMA_HW_STAT_INDEX_UDPRXPKTS].name		= "RxUDP",
4569 	[IRDMA_HW_STAT_INDEX_UDPTXPKTS].name		= "TxUDP",
4570 	[IRDMA_HW_STAT_INDEX_RXNPECNMARKEDPKTS].name	= "RxECNMrkd",
4571 	[IRDMA_HW_STAT_INDEX_TCPRTXSEG].name		= "RetransSegs",
4572 	[IRDMA_HW_STAT_INDEX_TCPRXOPTERR].name		= "InOptErrors",
4573 	[IRDMA_HW_STAT_INDEX_TCPRXPROTOERR].name	= "InProtoErrors",
4574 	[IRDMA_HW_STAT_INDEX_TCPRXSEGS].name		= "InSegs",
4575 	[IRDMA_HW_STAT_INDEX_TCPTXSEG].name		= "OutSegs",
4576 
4577 	/* gen3 */
4578 	[IRDMA_HW_STAT_INDEX_RNR_SENT].name		= "RNR sent",
4579 	[IRDMA_HW_STAT_INDEX_RNR_RCVD].name		= "RNR received",
4580 	[IRDMA_HW_STAT_INDEX_RDMAORDLMTCNT].name	= "ord limit count",
4581 	[IRDMA_HW_STAT_INDEX_RDMAIRDLMTCNT].name	= "ird limit count",
4582 	[IRDMA_HW_STAT_INDEX_RDMARXATS].name		= "Rx atomics",
4583 	[IRDMA_HW_STAT_INDEX_RDMATXATS].name		= "Tx atomics",
4584 	[IRDMA_HW_STAT_INDEX_NAKSEQERR].name		= "Nak Sequence Error",
4585 	[IRDMA_HW_STAT_INDEX_NAKSEQERR_IMPLIED].name	= "Nak Sequence Error Implied",
4586 	[IRDMA_HW_STAT_INDEX_RTO].name			= "RTO",
4587 	[IRDMA_HW_STAT_INDEX_RXOOOPKTS].name		= "Rcvd Out of order packets",
4588 	[IRDMA_HW_STAT_INDEX_ICRCERR].name		= "CRC errors",
4589 };
4590 
irdma_roce_port_immutable(struct ib_device * ibdev,u32 port_num,struct ib_port_immutable * immutable)4591 static int irdma_roce_port_immutable(struct ib_device *ibdev, u32 port_num,
4592 				     struct ib_port_immutable *immutable)
4593 {
4594 	struct ib_port_attr attr;
4595 	int err;
4596 
4597 	immutable->core_cap_flags = RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP;
4598 	err = ib_query_port(ibdev, port_num, &attr);
4599 	if (err)
4600 		return err;
4601 
4602 	immutable->max_mad_size = IB_MGMT_MAD_SIZE;
4603 	immutable->pkey_tbl_len = attr.pkey_tbl_len;
4604 	immutable->gid_tbl_len = attr.gid_tbl_len;
4605 
4606 	return 0;
4607 }
4608 
irdma_iw_port_immutable(struct ib_device * ibdev,u32 port_num,struct ib_port_immutable * immutable)4609 static int irdma_iw_port_immutable(struct ib_device *ibdev, u32 port_num,
4610 				   struct ib_port_immutable *immutable)
4611 {
4612 	struct ib_port_attr attr;
4613 	int err;
4614 
4615 	immutable->core_cap_flags = RDMA_CORE_PORT_IWARP;
4616 	err = ib_query_port(ibdev, port_num, &attr);
4617 	if (err)
4618 		return err;
4619 	immutable->gid_tbl_len = attr.gid_tbl_len;
4620 
4621 	return 0;
4622 }
4623 
irdma_get_dev_fw_str(struct ib_device * dev,char * str)4624 static void irdma_get_dev_fw_str(struct ib_device *dev, char *str)
4625 {
4626 	struct irdma_device *iwdev = to_iwdev(dev);
4627 
4628 	snprintf(str, IB_FW_VERSION_NAME_MAX, "%u.%u",
4629 		 irdma_fw_major_ver(&iwdev->rf->sc_dev),
4630 		 irdma_fw_minor_ver(&iwdev->rf->sc_dev));
4631 }
4632 
4633 /**
4634  * irdma_alloc_hw_port_stats - Allocate a hw stats structure
4635  * @ibdev: device pointer from stack
4636  * @port_num: port number
4637  */
irdma_alloc_hw_port_stats(struct ib_device * ibdev,u32 port_num)4638 static struct rdma_hw_stats *irdma_alloc_hw_port_stats(struct ib_device *ibdev,
4639 						       u32 port_num)
4640 {
4641 	struct irdma_device *iwdev = to_iwdev(ibdev);
4642 	struct irdma_sc_dev *dev = &iwdev->rf->sc_dev;
4643 
4644 	int num_counters = dev->hw_attrs.max_stat_idx;
4645 	unsigned long lifespan = RDMA_HW_STATS_DEFAULT_LIFESPAN;
4646 
4647 	return rdma_alloc_hw_stats_struct(irdma_hw_stat_descs, num_counters,
4648 					  lifespan);
4649 }
4650 
4651 /**
4652  * irdma_get_hw_stats - Populates the rdma_hw_stats structure
4653  * @ibdev: device pointer from stack
4654  * @stats: stats pointer from stack
4655  * @port_num: port number
4656  * @index: which hw counter the stack is requesting we update
4657  */
irdma_get_hw_stats(struct ib_device * ibdev,struct rdma_hw_stats * stats,u32 port_num,int index)4658 static int irdma_get_hw_stats(struct ib_device *ibdev,
4659 			      struct rdma_hw_stats *stats, u32 port_num,
4660 			      int index)
4661 {
4662 	struct irdma_device *iwdev = to_iwdev(ibdev);
4663 	struct irdma_dev_hw_stats *hw_stats = &iwdev->vsi.pestat->hw_stats;
4664 
4665 	if (iwdev->rf->rdma_ver >= IRDMA_GEN_2)
4666 		irdma_cqp_gather_stats_cmd(&iwdev->rf->sc_dev, iwdev->vsi.pestat, true);
4667 	else
4668 		irdma_cqp_gather_stats_gen1(&iwdev->rf->sc_dev, iwdev->vsi.pestat);
4669 
4670 	memcpy(&stats->value[0], hw_stats, sizeof(u64) * stats->num_counters);
4671 
4672 	return stats->num_counters;
4673 }
4674 
4675 /**
4676  * irdma_query_gid - Query port GID
4677  * @ibdev: device pointer from stack
4678  * @port: port number
4679  * @index: Entry index
4680  * @gid: Global ID
4681  */
irdma_query_gid(struct ib_device * ibdev,u32 port,int index,union ib_gid * gid)4682 static int irdma_query_gid(struct ib_device *ibdev, u32 port, int index,
4683 			   union ib_gid *gid)
4684 {
4685 	struct irdma_device *iwdev = to_iwdev(ibdev);
4686 
4687 	memset(gid->raw, 0, sizeof(gid->raw));
4688 	ether_addr_copy(gid->raw, iwdev->netdev->dev_addr);
4689 
4690 	return 0;
4691 }
4692 
4693 /**
4694  * mcast_list_add -  Add a new mcast item to list
4695  * @rf: RDMA PCI function
4696  * @new_elem: pointer to element to add
4697  */
mcast_list_add(struct irdma_pci_f * rf,struct mc_table_list * new_elem)4698 static void mcast_list_add(struct irdma_pci_f *rf,
4699 			   struct mc_table_list *new_elem)
4700 {
4701 	list_add(&new_elem->list, &rf->mc_qht_list.list);
4702 }
4703 
4704 /**
4705  * mcast_list_del - Remove an mcast item from list
4706  * @mc_qht_elem: pointer to mcast table list element
4707  */
mcast_list_del(struct mc_table_list * mc_qht_elem)4708 static void mcast_list_del(struct mc_table_list *mc_qht_elem)
4709 {
4710 	if (mc_qht_elem)
4711 		list_del(&mc_qht_elem->list);
4712 }
4713 
4714 /**
4715  * mcast_list_lookup_ip - Search mcast list for address
4716  * @rf: RDMA PCI function
4717  * @ip_mcast: pointer to mcast IP address
4718  */
mcast_list_lookup_ip(struct irdma_pci_f * rf,u32 * ip_mcast)4719 static struct mc_table_list *mcast_list_lookup_ip(struct irdma_pci_f *rf,
4720 						  u32 *ip_mcast)
4721 {
4722 	struct mc_table_list *mc_qht_el;
4723 	struct list_head *pos, *q;
4724 
4725 	list_for_each_safe (pos, q, &rf->mc_qht_list.list) {
4726 		mc_qht_el = list_entry(pos, struct mc_table_list, list);
4727 		if (!memcmp(mc_qht_el->mc_info.dest_ip, ip_mcast,
4728 			    sizeof(mc_qht_el->mc_info.dest_ip)))
4729 			return mc_qht_el;
4730 	}
4731 
4732 	return NULL;
4733 }
4734 
4735 /**
4736  * irdma_mcast_cqp_op - perform a mcast cqp operation
4737  * @iwdev: irdma device
4738  * @mc_grp_ctx: mcast group info
4739  * @op: operation
4740  *
4741  * returns error status
4742  */
irdma_mcast_cqp_op(struct irdma_device * iwdev,struct irdma_mcast_grp_info * mc_grp_ctx,u8 op)4743 static int irdma_mcast_cqp_op(struct irdma_device *iwdev,
4744 			      struct irdma_mcast_grp_info *mc_grp_ctx, u8 op)
4745 {
4746 	struct cqp_cmds_info *cqp_info;
4747 	struct irdma_cqp_request *cqp_request;
4748 	int status;
4749 
4750 	cqp_request = irdma_alloc_and_get_cqp_request(&iwdev->rf->cqp, true);
4751 	if (!cqp_request)
4752 		return -ENOMEM;
4753 
4754 	cqp_request->info.in.u.mc_create.info = *mc_grp_ctx;
4755 	cqp_info = &cqp_request->info;
4756 	cqp_info->cqp_cmd = op;
4757 	cqp_info->post_sq = 1;
4758 	cqp_info->in.u.mc_create.scratch = (uintptr_t)cqp_request;
4759 	cqp_info->in.u.mc_create.cqp = &iwdev->rf->cqp.sc_cqp;
4760 	status = irdma_handle_cqp_op(iwdev->rf, cqp_request);
4761 	irdma_put_cqp_request(&iwdev->rf->cqp, cqp_request);
4762 
4763 	return status;
4764 }
4765 
4766 /**
4767  * irdma_mcast_mac - Get the multicast MAC for an IP address
4768  * @ip_addr: IPv4 or IPv6 address
4769  * @mac: pointer to result MAC address
4770  * @ipv4: flag indicating IPv4 or IPv6
4771  *
4772  */
irdma_mcast_mac(u32 * ip_addr,u8 * mac,bool ipv4)4773 void irdma_mcast_mac(u32 *ip_addr, u8 *mac, bool ipv4)
4774 {
4775 	u8 *ip = (u8 *)ip_addr;
4776 
4777 	if (ipv4) {
4778 		unsigned char mac4[ETH_ALEN] = {0x01, 0x00, 0x5E, 0x00,
4779 						0x00, 0x00};
4780 
4781 		mac4[3] = ip[2] & 0x7F;
4782 		mac4[4] = ip[1];
4783 		mac4[5] = ip[0];
4784 		ether_addr_copy(mac, mac4);
4785 	} else {
4786 		unsigned char mac6[ETH_ALEN] = {0x33, 0x33, 0x00, 0x00,
4787 						0x00, 0x00};
4788 
4789 		mac6[2] = ip[3];
4790 		mac6[3] = ip[2];
4791 		mac6[4] = ip[1];
4792 		mac6[5] = ip[0];
4793 		ether_addr_copy(mac, mac6);
4794 	}
4795 }
4796 
4797 /**
4798  * irdma_attach_mcast - attach a qp to a multicast group
4799  * @ibqp: ptr to qp
4800  * @ibgid: pointer to global ID
4801  * @lid: local ID
4802  *
4803  * returns error status
4804  */
irdma_attach_mcast(struct ib_qp * ibqp,union ib_gid * ibgid,u16 lid)4805 static int irdma_attach_mcast(struct ib_qp *ibqp, union ib_gid *ibgid, u16 lid)
4806 {
4807 	struct irdma_qp *iwqp = to_iwqp(ibqp);
4808 	struct irdma_device *iwdev = iwqp->iwdev;
4809 	struct irdma_pci_f *rf = iwdev->rf;
4810 	struct mc_table_list *mc_qht_elem;
4811 	struct irdma_mcast_grp_ctx_entry_info mcg_info = {};
4812 	unsigned long flags;
4813 	u32 ip_addr[4] = {};
4814 	u32 mgn;
4815 	u32 no_mgs;
4816 	int ret = 0;
4817 	bool ipv4;
4818 	u16 vlan_id;
4819 	union irdma_sockaddr sgid_addr;
4820 	unsigned char dmac[ETH_ALEN];
4821 
4822 	rdma_gid2ip((struct sockaddr *)&sgid_addr, ibgid);
4823 
4824 	if (!ipv6_addr_v4mapped((struct in6_addr *)ibgid)) {
4825 		irdma_copy_ip_ntohl(ip_addr,
4826 				    sgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32);
4827 		irdma_get_vlan_mac_ipv6(ip_addr, &vlan_id, NULL);
4828 		ipv4 = false;
4829 		ibdev_dbg(&iwdev->ibdev,
4830 			  "VERBS: qp_id=%d, IP6address=%pI6\n", ibqp->qp_num,
4831 			  ip_addr);
4832 		irdma_mcast_mac(ip_addr, dmac, false);
4833 	} else {
4834 		ip_addr[0] = ntohl(sgid_addr.saddr_in.sin_addr.s_addr);
4835 		ipv4 = true;
4836 		vlan_id = irdma_get_vlan_ipv4(ip_addr);
4837 		irdma_mcast_mac(ip_addr, dmac, true);
4838 		ibdev_dbg(&iwdev->ibdev,
4839 			  "VERBS: qp_id=%d, IP4address=%pI4, MAC=%pM\n",
4840 			  ibqp->qp_num, ip_addr, dmac);
4841 	}
4842 
4843 	spin_lock_irqsave(&rf->qh_list_lock, flags);
4844 	mc_qht_elem = mcast_list_lookup_ip(rf, ip_addr);
4845 	if (!mc_qht_elem) {
4846 		struct irdma_dma_mem *dma_mem_mc;
4847 
4848 		spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4849 		mc_qht_elem = kzalloc(sizeof(*mc_qht_elem), GFP_KERNEL);
4850 		if (!mc_qht_elem)
4851 			return -ENOMEM;
4852 
4853 		mc_qht_elem->mc_info.ipv4_valid = ipv4;
4854 		memcpy(mc_qht_elem->mc_info.dest_ip, ip_addr,
4855 		       sizeof(mc_qht_elem->mc_info.dest_ip));
4856 		ret = irdma_alloc_rsrc(rf, rf->allocated_mcgs, rf->max_mcg,
4857 				       &mgn, &rf->next_mcg);
4858 		if (ret) {
4859 			kfree(mc_qht_elem);
4860 			return -ENOMEM;
4861 		}
4862 
4863 		mc_qht_elem->mc_info.mgn = mgn;
4864 		dma_mem_mc = &mc_qht_elem->mc_grp_ctx.dma_mem_mc;
4865 		dma_mem_mc->size = ALIGN(sizeof(u64) * IRDMA_MAX_MGS_PER_CTX,
4866 					 IRDMA_HW_PAGE_SIZE);
4867 		dma_mem_mc->va = dma_alloc_coherent(rf->hw.device,
4868 						    dma_mem_mc->size,
4869 						    &dma_mem_mc->pa,
4870 						    GFP_KERNEL);
4871 		if (!dma_mem_mc->va) {
4872 			irdma_free_rsrc(rf, rf->allocated_mcgs, mgn);
4873 			kfree(mc_qht_elem);
4874 			return -ENOMEM;
4875 		}
4876 
4877 		mc_qht_elem->mc_grp_ctx.mg_id = (u16)mgn;
4878 		memcpy(mc_qht_elem->mc_grp_ctx.dest_ip_addr, ip_addr,
4879 		       sizeof(mc_qht_elem->mc_grp_ctx.dest_ip_addr));
4880 		mc_qht_elem->mc_grp_ctx.ipv4_valid = ipv4;
4881 		mc_qht_elem->mc_grp_ctx.vlan_id = vlan_id;
4882 		if (vlan_id < VLAN_N_VID)
4883 			mc_qht_elem->mc_grp_ctx.vlan_valid = true;
4884 		mc_qht_elem->mc_grp_ctx.hmc_fcn_id = iwdev->rf->sc_dev.hmc_fn_id;
4885 		mc_qht_elem->mc_grp_ctx.qs_handle =
4886 			iwqp->sc_qp.vsi->qos[iwqp->sc_qp.user_pri].qs_handle;
4887 		ether_addr_copy(mc_qht_elem->mc_grp_ctx.dest_mac_addr, dmac);
4888 
4889 		spin_lock_irqsave(&rf->qh_list_lock, flags);
4890 		mcast_list_add(rf, mc_qht_elem);
4891 	} else {
4892 		if (mc_qht_elem->mc_grp_ctx.no_of_mgs ==
4893 		    IRDMA_MAX_MGS_PER_CTX) {
4894 			spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4895 			return -ENOMEM;
4896 		}
4897 	}
4898 
4899 	mcg_info.qp_id = iwqp->ibqp.qp_num;
4900 	no_mgs = mc_qht_elem->mc_grp_ctx.no_of_mgs;
4901 	irdma_sc_add_mcast_grp(&mc_qht_elem->mc_grp_ctx, &mcg_info);
4902 	spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4903 
4904 	/* Only if there is a change do we need to modify or create */
4905 	if (!no_mgs) {
4906 		ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx,
4907 					 IRDMA_OP_MC_CREATE);
4908 	} else if (no_mgs != mc_qht_elem->mc_grp_ctx.no_of_mgs) {
4909 		ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx,
4910 					 IRDMA_OP_MC_MODIFY);
4911 	} else {
4912 		return 0;
4913 	}
4914 
4915 	if (ret)
4916 		goto error;
4917 
4918 	return 0;
4919 
4920 error:
4921 	irdma_sc_del_mcast_grp(&mc_qht_elem->mc_grp_ctx, &mcg_info);
4922 	if (!mc_qht_elem->mc_grp_ctx.no_of_mgs) {
4923 		mcast_list_del(mc_qht_elem);
4924 		dma_free_coherent(rf->hw.device,
4925 				  mc_qht_elem->mc_grp_ctx.dma_mem_mc.size,
4926 				  mc_qht_elem->mc_grp_ctx.dma_mem_mc.va,
4927 				  mc_qht_elem->mc_grp_ctx.dma_mem_mc.pa);
4928 		mc_qht_elem->mc_grp_ctx.dma_mem_mc.va = NULL;
4929 		irdma_free_rsrc(rf, rf->allocated_mcgs,
4930 				mc_qht_elem->mc_grp_ctx.mg_id);
4931 		kfree(mc_qht_elem);
4932 	}
4933 
4934 	return ret;
4935 }
4936 
4937 /**
4938  * irdma_detach_mcast - detach a qp from a multicast group
4939  * @ibqp: ptr to qp
4940  * @ibgid: pointer to global ID
4941  * @lid: local ID
4942  *
4943  * returns error status
4944  */
irdma_detach_mcast(struct ib_qp * ibqp,union ib_gid * ibgid,u16 lid)4945 static int irdma_detach_mcast(struct ib_qp *ibqp, union ib_gid *ibgid, u16 lid)
4946 {
4947 	struct irdma_qp *iwqp = to_iwqp(ibqp);
4948 	struct irdma_device *iwdev = iwqp->iwdev;
4949 	struct irdma_pci_f *rf = iwdev->rf;
4950 	u32 ip_addr[4] = {};
4951 	struct mc_table_list *mc_qht_elem;
4952 	struct irdma_mcast_grp_ctx_entry_info mcg_info = {};
4953 	int ret;
4954 	unsigned long flags;
4955 	union irdma_sockaddr sgid_addr;
4956 
4957 	rdma_gid2ip((struct sockaddr *)&sgid_addr, ibgid);
4958 	if (!ipv6_addr_v4mapped((struct in6_addr *)ibgid))
4959 		irdma_copy_ip_ntohl(ip_addr,
4960 				    sgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32);
4961 	else
4962 		ip_addr[0] = ntohl(sgid_addr.saddr_in.sin_addr.s_addr);
4963 
4964 	spin_lock_irqsave(&rf->qh_list_lock, flags);
4965 	mc_qht_elem = mcast_list_lookup_ip(rf, ip_addr);
4966 	if (!mc_qht_elem) {
4967 		spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4968 		ibdev_dbg(&iwdev->ibdev,
4969 			  "VERBS: address not found MCG\n");
4970 		return 0;
4971 	}
4972 
4973 	mcg_info.qp_id = iwqp->ibqp.qp_num;
4974 	irdma_sc_del_mcast_grp(&mc_qht_elem->mc_grp_ctx, &mcg_info);
4975 	if (!mc_qht_elem->mc_grp_ctx.no_of_mgs) {
4976 		mcast_list_del(mc_qht_elem);
4977 		spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4978 		ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx,
4979 					 IRDMA_OP_MC_DESTROY);
4980 		if (ret) {
4981 			ibdev_dbg(&iwdev->ibdev,
4982 				  "VERBS: failed MC_DESTROY MCG\n");
4983 			spin_lock_irqsave(&rf->qh_list_lock, flags);
4984 			mcast_list_add(rf, mc_qht_elem);
4985 			spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4986 			return -EAGAIN;
4987 		}
4988 
4989 		dma_free_coherent(rf->hw.device,
4990 				  mc_qht_elem->mc_grp_ctx.dma_mem_mc.size,
4991 				  mc_qht_elem->mc_grp_ctx.dma_mem_mc.va,
4992 				  mc_qht_elem->mc_grp_ctx.dma_mem_mc.pa);
4993 		mc_qht_elem->mc_grp_ctx.dma_mem_mc.va = NULL;
4994 		irdma_free_rsrc(rf, rf->allocated_mcgs,
4995 				mc_qht_elem->mc_grp_ctx.mg_id);
4996 		kfree(mc_qht_elem);
4997 	} else {
4998 		spin_unlock_irqrestore(&rf->qh_list_lock, flags);
4999 		ret = irdma_mcast_cqp_op(iwdev, &mc_qht_elem->mc_grp_ctx,
5000 					 IRDMA_OP_MC_MODIFY);
5001 		if (ret) {
5002 			ibdev_dbg(&iwdev->ibdev,
5003 				  "VERBS: failed Modify MCG\n");
5004 			return ret;
5005 		}
5006 	}
5007 
5008 	return 0;
5009 }
5010 
irdma_create_hw_ah(struct irdma_device * iwdev,struct irdma_ah * ah,bool sleep)5011 static int irdma_create_hw_ah(struct irdma_device *iwdev, struct irdma_ah *ah, bool sleep)
5012 {
5013 	struct irdma_pci_f *rf = iwdev->rf;
5014 	int err;
5015 
5016 	err = irdma_alloc_rsrc(rf, rf->allocated_ahs, rf->max_ah, &ah->sc_ah.ah_info.ah_idx,
5017 			       &rf->next_ah);
5018 	if (err)
5019 		return err;
5020 
5021 	err = irdma_ah_cqp_op(rf, &ah->sc_ah, IRDMA_OP_AH_CREATE, sleep,
5022 			      irdma_gsi_ud_qp_ah_cb, &ah->sc_ah);
5023 
5024 	if (err) {
5025 		ibdev_dbg(&iwdev->ibdev, "VERBS: CQP-OP Create AH fail");
5026 		goto err_ah_create;
5027 	}
5028 
5029 	if (!sleep) {
5030 		int cnt = CQP_COMPL_WAIT_TIME_MS * CQP_TIMEOUT_THRESHOLD;
5031 
5032 		do {
5033 			irdma_cqp_ce_handler(rf, &rf->ccq.sc_cq);
5034 			mdelay(1);
5035 		} while (!ah->sc_ah.ah_info.ah_valid && --cnt);
5036 
5037 		if (!cnt) {
5038 			ibdev_dbg(&iwdev->ibdev, "VERBS: CQP create AH timed out");
5039 			err = -ETIMEDOUT;
5040 			goto err_ah_create;
5041 		}
5042 	}
5043 	return 0;
5044 
5045 err_ah_create:
5046 	irdma_free_rsrc(iwdev->rf, iwdev->rf->allocated_ahs, ah->sc_ah.ah_info.ah_idx);
5047 
5048 	return err;
5049 }
5050 
irdma_setup_ah(struct ib_ah * ibah,struct rdma_ah_init_attr * attr)5051 static int irdma_setup_ah(struct ib_ah *ibah, struct rdma_ah_init_attr *attr)
5052 {
5053 	struct irdma_pd *pd = to_iwpd(ibah->pd);
5054 	struct irdma_ah *ah = container_of(ibah, struct irdma_ah, ibah);
5055 	struct rdma_ah_attr *ah_attr = attr->ah_attr;
5056 	const struct ib_gid_attr *sgid_attr;
5057 	struct irdma_device *iwdev = to_iwdev(ibah->pd->device);
5058 	struct irdma_pci_f *rf = iwdev->rf;
5059 	struct irdma_sc_ah *sc_ah;
5060 	struct irdma_ah_info *ah_info;
5061 	union irdma_sockaddr sgid_addr, dgid_addr;
5062 	int err;
5063 	u8 dmac[ETH_ALEN];
5064 
5065 	ah->pd = pd;
5066 	sc_ah = &ah->sc_ah;
5067 	sc_ah->ah_info.vsi = &iwdev->vsi;
5068 	irdma_sc_init_ah(&rf->sc_dev, sc_ah);
5069 	ah->sgid_index = ah_attr->grh.sgid_index;
5070 	sgid_attr = ah_attr->grh.sgid_attr;
5071 	memcpy(&ah->dgid, &ah_attr->grh.dgid, sizeof(ah->dgid));
5072 	rdma_gid2ip((struct sockaddr *)&sgid_addr, &sgid_attr->gid);
5073 	rdma_gid2ip((struct sockaddr *)&dgid_addr, &ah_attr->grh.dgid);
5074 	ah->av.attrs = *ah_attr;
5075 	ah->av.net_type = rdma_gid_attr_network_type(sgid_attr);
5076 	ah_info = &sc_ah->ah_info;
5077 	ah_info->pd_idx = pd->sc_pd.pd_id;
5078 	if (ah_attr->ah_flags & IB_AH_GRH) {
5079 		ah_info->flow_label = ah_attr->grh.flow_label;
5080 		ah_info->hop_ttl = ah_attr->grh.hop_limit;
5081 		ah_info->tc_tos = ah_attr->grh.traffic_class;
5082 	}
5083 
5084 	ether_addr_copy(dmac, ah_attr->roce.dmac);
5085 	if (ah->av.net_type == RDMA_NETWORK_IPV4) {
5086 		ah_info->ipv4_valid = true;
5087 		ah_info->dest_ip_addr[0] =
5088 			ntohl(dgid_addr.saddr_in.sin_addr.s_addr);
5089 		ah_info->src_ip_addr[0] =
5090 			ntohl(sgid_addr.saddr_in.sin_addr.s_addr);
5091 		ah_info->do_lpbk = irdma_ipv4_is_lpb(ah_info->src_ip_addr[0],
5092 						     ah_info->dest_ip_addr[0]);
5093 		if (ipv4_is_multicast(dgid_addr.saddr_in.sin_addr.s_addr)) {
5094 			ah_info->do_lpbk = true;
5095 			irdma_mcast_mac(ah_info->dest_ip_addr, dmac, true);
5096 		}
5097 	} else {
5098 		irdma_copy_ip_ntohl(ah_info->dest_ip_addr,
5099 				    dgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32);
5100 		irdma_copy_ip_ntohl(ah_info->src_ip_addr,
5101 				    sgid_addr.saddr_in6.sin6_addr.in6_u.u6_addr32);
5102 		ah_info->do_lpbk = irdma_ipv6_is_lpb(ah_info->src_ip_addr,
5103 						     ah_info->dest_ip_addr);
5104 		if (rdma_is_multicast_addr(&dgid_addr.saddr_in6.sin6_addr)) {
5105 			ah_info->do_lpbk = true;
5106 			irdma_mcast_mac(ah_info->dest_ip_addr, dmac, false);
5107 		}
5108 	}
5109 
5110 	err = rdma_read_gid_l2_fields(sgid_attr, &ah_info->vlan_tag,
5111 				      ah_info->mac_addr);
5112 	if (err)
5113 		return err;
5114 
5115 	ah_info->dst_arpindex = irdma_add_arp(iwdev->rf, ah_info->dest_ip_addr,
5116 					      ah_info->ipv4_valid, dmac);
5117 
5118 	if (ah_info->dst_arpindex == -1)
5119 		return -EINVAL;
5120 
5121 	if (ah_info->vlan_tag >= VLAN_N_VID && iwdev->dcb_vlan_mode)
5122 		ah_info->vlan_tag = 0;
5123 
5124 	if (ah_info->vlan_tag < VLAN_N_VID) {
5125 		u8 prio = rt_tos2priority(ah_info->tc_tos);
5126 
5127 		prio = irdma_roce_get_vlan_prio(sgid_attr, prio);
5128 
5129 		ah_info->vlan_tag |= (u16)prio << VLAN_PRIO_SHIFT;
5130 		ah_info->insert_vlan_tag = true;
5131 	}
5132 
5133 	return 0;
5134 }
5135 
5136 /**
5137  * irdma_ah_exists - Check for existing identical AH
5138  * @iwdev: irdma device
5139  * @new_ah: AH to check for
5140  *
5141  * returns true if AH is found, false if not found.
5142  */
irdma_ah_exists(struct irdma_device * iwdev,struct irdma_ah * new_ah)5143 static bool irdma_ah_exists(struct irdma_device *iwdev,
5144 			    struct irdma_ah *new_ah)
5145 {
5146 	struct irdma_ah *ah;
5147 	u32 key = new_ah->sc_ah.ah_info.dest_ip_addr[0] ^
5148 		  new_ah->sc_ah.ah_info.dest_ip_addr[1] ^
5149 		  new_ah->sc_ah.ah_info.dest_ip_addr[2] ^
5150 		  new_ah->sc_ah.ah_info.dest_ip_addr[3];
5151 
5152 	hash_for_each_possible(iwdev->rf->ah_hash_tbl, ah, list, key) {
5153 		/* Set ah_valid and ah_id the same so memcmp can work */
5154 		new_ah->sc_ah.ah_info.ah_idx = ah->sc_ah.ah_info.ah_idx;
5155 		new_ah->sc_ah.ah_info.ah_valid = ah->sc_ah.ah_info.ah_valid;
5156 		if (!memcmp(&ah->sc_ah.ah_info, &new_ah->sc_ah.ah_info,
5157 			    sizeof(ah->sc_ah.ah_info))) {
5158 			refcount_inc(&ah->refcnt);
5159 			new_ah->parent_ah = ah;
5160 			return true;
5161 		}
5162 	}
5163 
5164 	return false;
5165 }
5166 
5167 /**
5168  * irdma_destroy_ah - Destroy address handle
5169  * @ibah: pointer to address handle
5170  * @ah_flags: flags for sleepable
5171  */
irdma_destroy_ah(struct ib_ah * ibah,u32 ah_flags)5172 static int irdma_destroy_ah(struct ib_ah *ibah, u32 ah_flags)
5173 {
5174 	struct irdma_device *iwdev = to_iwdev(ibah->device);
5175 	struct irdma_ah *ah = to_iwah(ibah);
5176 
5177 	if ((ah_flags & RDMA_DESTROY_AH_SLEEPABLE) && ah->parent_ah) {
5178 		mutex_lock(&iwdev->rf->ah_tbl_lock);
5179 		if (!refcount_dec_and_test(&ah->parent_ah->refcnt)) {
5180 			mutex_unlock(&iwdev->rf->ah_tbl_lock);
5181 			return 0;
5182 		}
5183 		hash_del(&ah->parent_ah->list);
5184 		kfree(ah->parent_ah);
5185 		mutex_unlock(&iwdev->rf->ah_tbl_lock);
5186 	}
5187 
5188 	irdma_ah_cqp_op(iwdev->rf, &ah->sc_ah, IRDMA_OP_AH_DESTROY,
5189 			false, NULL, ah);
5190 
5191 	irdma_free_rsrc(iwdev->rf, iwdev->rf->allocated_ahs,
5192 			ah->sc_ah.ah_info.ah_idx);
5193 
5194 	return 0;
5195 }
5196 
5197 /**
5198  * irdma_create_user_ah - create user address handle
5199  * @ibah: address handle
5200  * @attr: address handle attributes
5201  * @udata: User data
5202  *
5203  * returns 0 on success, error otherwise
5204  */
irdma_create_user_ah(struct ib_ah * ibah,struct rdma_ah_init_attr * attr,struct ib_udata * udata)5205 static int irdma_create_user_ah(struct ib_ah *ibah,
5206 				struct rdma_ah_init_attr *attr,
5207 				struct ib_udata *udata)
5208 {
5209 #define IRDMA_CREATE_AH_MIN_RESP_LEN offsetofend(struct irdma_create_ah_resp, rsvd)
5210 	struct irdma_ah *ah = container_of(ibah, struct irdma_ah, ibah);
5211 	struct irdma_device *iwdev = to_iwdev(ibah->pd->device);
5212 	struct irdma_create_ah_resp uresp;
5213 	struct irdma_ah *parent_ah;
5214 	int err;
5215 
5216 	if (udata->outlen < IRDMA_CREATE_AH_MIN_RESP_LEN)
5217 		return -EINVAL;
5218 
5219 	err = irdma_setup_ah(ibah, attr);
5220 	if (err)
5221 		return err;
5222 	mutex_lock(&iwdev->rf->ah_tbl_lock);
5223 	if (!irdma_ah_exists(iwdev, ah)) {
5224 		err = irdma_create_hw_ah(iwdev, ah, true);
5225 		if (err) {
5226 			mutex_unlock(&iwdev->rf->ah_tbl_lock);
5227 			return err;
5228 		}
5229 		/* Add new AH to list */
5230 		parent_ah = kmemdup(ah, sizeof(*ah), GFP_KERNEL);
5231 		if (parent_ah) {
5232 			u32 key = parent_ah->sc_ah.ah_info.dest_ip_addr[0] ^
5233 				  parent_ah->sc_ah.ah_info.dest_ip_addr[1] ^
5234 				  parent_ah->sc_ah.ah_info.dest_ip_addr[2] ^
5235 				  parent_ah->sc_ah.ah_info.dest_ip_addr[3];
5236 
5237 			ah->parent_ah = parent_ah;
5238 			hash_add(iwdev->rf->ah_hash_tbl, &parent_ah->list, key);
5239 			refcount_set(&parent_ah->refcnt, 1);
5240 		}
5241 	}
5242 	mutex_unlock(&iwdev->rf->ah_tbl_lock);
5243 
5244 	uresp.ah_id = ah->sc_ah.ah_info.ah_idx;
5245 	err = ib_copy_to_udata(udata, &uresp, min(sizeof(uresp), udata->outlen));
5246 	if (err)
5247 		irdma_destroy_ah(ibah, attr->flags);
5248 
5249 	return err;
5250 }
5251 
5252 /**
5253  * irdma_create_ah - create address handle
5254  * @ibah: address handle
5255  * @attr: address handle attributes
5256  * @udata: NULL
5257  *
5258  * returns 0 on success, error otherwise
5259  */
irdma_create_ah(struct ib_ah * ibah,struct rdma_ah_init_attr * attr,struct ib_udata * udata)5260 static int irdma_create_ah(struct ib_ah *ibah, struct rdma_ah_init_attr *attr,
5261 			   struct ib_udata *udata)
5262 {
5263 	struct irdma_ah *ah = container_of(ibah, struct irdma_ah, ibah);
5264 	struct irdma_device *iwdev = to_iwdev(ibah->pd->device);
5265 	int err;
5266 
5267 	err = irdma_setup_ah(ibah, attr);
5268 	if (err)
5269 		return err;
5270 	err = irdma_create_hw_ah(iwdev, ah, attr->flags & RDMA_CREATE_AH_SLEEPABLE);
5271 
5272 	return err;
5273 }
5274 
5275 /**
5276  * irdma_query_ah - Query address handle
5277  * @ibah: pointer to address handle
5278  * @ah_attr: address handle attributes
5279  */
irdma_query_ah(struct ib_ah * ibah,struct rdma_ah_attr * ah_attr)5280 static int irdma_query_ah(struct ib_ah *ibah, struct rdma_ah_attr *ah_attr)
5281 {
5282 	struct irdma_ah *ah = to_iwah(ibah);
5283 
5284 	memset(ah_attr, 0, sizeof(*ah_attr));
5285 	if (ah->av.attrs.ah_flags & IB_AH_GRH) {
5286 		ah_attr->ah_flags = IB_AH_GRH;
5287 		ah_attr->grh.flow_label = ah->sc_ah.ah_info.flow_label;
5288 		ah_attr->grh.traffic_class = ah->sc_ah.ah_info.tc_tos;
5289 		ah_attr->grh.hop_limit = ah->sc_ah.ah_info.hop_ttl;
5290 		ah_attr->grh.sgid_index = ah->sgid_index;
5291 		memcpy(&ah_attr->grh.dgid, &ah->dgid,
5292 		       sizeof(ah_attr->grh.dgid));
5293 	}
5294 
5295 	return 0;
5296 }
5297 
irdma_get_link_layer(struct ib_device * ibdev,u32 port_num)5298 static enum rdma_link_layer irdma_get_link_layer(struct ib_device *ibdev,
5299 						 u32 port_num)
5300 {
5301 	return IB_LINK_LAYER_ETHERNET;
5302 }
5303 
5304 static const struct ib_device_ops irdma_gen1_dev_ops = {
5305 	.dealloc_driver = irdma_ib_dealloc_device,
5306 };
5307 
5308 static const struct ib_device_ops irdma_gen3_dev_ops = {
5309 	.alloc_mw = irdma_alloc_mw,
5310 	.create_srq = irdma_create_srq,
5311 	.dealloc_mw = irdma_dealloc_mw,
5312 	.destroy_srq = irdma_destroy_srq,
5313 	.modify_srq = irdma_modify_srq,
5314 	.post_srq_recv = irdma_post_srq_recv,
5315 	.query_srq = irdma_query_srq,
5316 };
5317 
5318 static const struct ib_device_ops irdma_roce_dev_ops = {
5319 	.attach_mcast = irdma_attach_mcast,
5320 	.create_ah = irdma_create_ah,
5321 	.create_user_ah = irdma_create_user_ah,
5322 	.destroy_ah = irdma_destroy_ah,
5323 	.detach_mcast = irdma_detach_mcast,
5324 	.get_link_layer = irdma_get_link_layer,
5325 	.get_port_immutable = irdma_roce_port_immutable,
5326 	.modify_qp = irdma_modify_qp_roce,
5327 	.query_ah = irdma_query_ah,
5328 	.query_pkey = irdma_query_pkey,
5329 };
5330 
5331 static const struct ib_device_ops irdma_iw_dev_ops = {
5332 	.get_port_immutable = irdma_iw_port_immutable,
5333 	.iw_accept = irdma_accept,
5334 	.iw_add_ref = irdma_qp_add_ref,
5335 	.iw_connect = irdma_connect,
5336 	.iw_create_listen = irdma_create_listen,
5337 	.iw_destroy_listen = irdma_destroy_listen,
5338 	.iw_get_qp = irdma_get_qp,
5339 	.iw_reject = irdma_reject,
5340 	.iw_rem_ref = irdma_qp_rem_ref,
5341 	.modify_qp = irdma_modify_qp,
5342 	.query_gid = irdma_query_gid,
5343 };
5344 
5345 static const struct ib_device_ops irdma_dev_ops = {
5346 	.owner = THIS_MODULE,
5347 	.driver_id = RDMA_DRIVER_IRDMA,
5348 	.uverbs_abi_ver = IRDMA_ABI_VER,
5349 
5350 	.alloc_hw_port_stats = irdma_alloc_hw_port_stats,
5351 	.alloc_mr = irdma_alloc_mr,
5352 	.alloc_pd = irdma_alloc_pd,
5353 	.alloc_ucontext = irdma_alloc_ucontext,
5354 	.create_cq = irdma_create_cq,
5355 	.create_qp = irdma_create_qp,
5356 	.dealloc_driver = irdma_ib_dealloc_device,
5357 	.dealloc_mw = irdma_dealloc_mw,
5358 	.dealloc_pd = irdma_dealloc_pd,
5359 	.dealloc_ucontext = irdma_dealloc_ucontext,
5360 	.dereg_mr = irdma_dereg_mr,
5361 	.destroy_cq = irdma_destroy_cq,
5362 	.destroy_qp = irdma_destroy_qp,
5363 	.disassociate_ucontext = irdma_disassociate_ucontext,
5364 	.get_dev_fw_str = irdma_get_dev_fw_str,
5365 	.get_dma_mr = irdma_get_dma_mr,
5366 	.get_hw_stats = irdma_get_hw_stats,
5367 	.map_mr_sg = irdma_map_mr_sg,
5368 	.mmap = irdma_mmap,
5369 	.mmap_free = irdma_mmap_free,
5370 	.poll_cq = irdma_poll_cq,
5371 	.post_recv = irdma_post_recv,
5372 	.post_send = irdma_post_send,
5373 	.query_device = irdma_query_device,
5374 	.query_port = irdma_query_port,
5375 	.query_qp = irdma_query_qp,
5376 	.reg_user_mr = irdma_reg_user_mr,
5377 	.reg_user_mr_dmabuf = irdma_reg_user_mr_dmabuf,
5378 	.rereg_user_mr = irdma_rereg_user_mr,
5379 	.req_notify_cq = irdma_req_notify_cq,
5380 	.resize_cq = irdma_resize_cq,
5381 	INIT_RDMA_OBJ_SIZE(ib_pd, irdma_pd, ibpd),
5382 	INIT_RDMA_OBJ_SIZE(ib_ucontext, irdma_ucontext, ibucontext),
5383 	INIT_RDMA_OBJ_SIZE(ib_ah, irdma_ah, ibah),
5384 	INIT_RDMA_OBJ_SIZE(ib_cq, irdma_cq, ibcq),
5385 	INIT_RDMA_OBJ_SIZE(ib_mw, irdma_mr, ibmw),
5386 	INIT_RDMA_OBJ_SIZE(ib_qp, irdma_qp, ibqp),
5387 	INIT_RDMA_OBJ_SIZE(ib_srq, irdma_srq, ibsrq),
5388 };
5389 
5390 /**
5391  * irdma_init_roce_device - initialization of roce rdma device
5392  * @iwdev: irdma device
5393  */
irdma_init_roce_device(struct irdma_device * iwdev)5394 static void irdma_init_roce_device(struct irdma_device *iwdev)
5395 {
5396 	iwdev->ibdev.node_type = RDMA_NODE_IB_CA;
5397 	addrconf_addr_eui48((u8 *)&iwdev->ibdev.node_guid,
5398 			    iwdev->netdev->dev_addr);
5399 	ib_set_device_ops(&iwdev->ibdev, &irdma_roce_dev_ops);
5400 }
5401 
5402 /**
5403  * irdma_init_iw_device - initialization of iwarp rdma device
5404  * @iwdev: irdma device
5405  */
irdma_init_iw_device(struct irdma_device * iwdev)5406 static void irdma_init_iw_device(struct irdma_device *iwdev)
5407 {
5408 	struct net_device *netdev = iwdev->netdev;
5409 
5410 	iwdev->ibdev.node_type = RDMA_NODE_RNIC;
5411 	addrconf_addr_eui48((u8 *)&iwdev->ibdev.node_guid,
5412 			    netdev->dev_addr);
5413 	memcpy(iwdev->ibdev.iw_ifname, netdev->name,
5414 	       sizeof(iwdev->ibdev.iw_ifname));
5415 	ib_set_device_ops(&iwdev->ibdev, &irdma_iw_dev_ops);
5416 }
5417 
5418 /**
5419  * irdma_init_rdma_device - initialization of rdma device
5420  * @iwdev: irdma device
5421  */
irdma_init_rdma_device(struct irdma_device * iwdev)5422 static void irdma_init_rdma_device(struct irdma_device *iwdev)
5423 {
5424 	struct pci_dev *pcidev = iwdev->rf->pcidev;
5425 
5426 	if (iwdev->roce_mode)
5427 		irdma_init_roce_device(iwdev);
5428 	else
5429 		irdma_init_iw_device(iwdev);
5430 
5431 	iwdev->ibdev.phys_port_cnt = 1;
5432 	iwdev->ibdev.num_comp_vectors = iwdev->rf->ceqs_count;
5433 	iwdev->ibdev.dev.parent = &pcidev->dev;
5434 	ib_set_device_ops(&iwdev->ibdev, &irdma_dev_ops);
5435 	if (iwdev->rf->rdma_ver == IRDMA_GEN_1)
5436 		ib_set_device_ops(&iwdev->ibdev, &irdma_gen1_dev_ops);
5437 	if (iwdev->rf->rdma_ver >= IRDMA_GEN_3)
5438 		ib_set_device_ops(&iwdev->ibdev, &irdma_gen3_dev_ops);
5439 }
5440 
5441 /**
5442  * irdma_port_ibevent - indicate port event
5443  * @iwdev: irdma device
5444  */
irdma_port_ibevent(struct irdma_device * iwdev)5445 void irdma_port_ibevent(struct irdma_device *iwdev)
5446 {
5447 	struct ib_event event;
5448 
5449 	event.device = &iwdev->ibdev;
5450 	event.element.port_num = 1;
5451 	event.event =
5452 		iwdev->iw_status ? IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR;
5453 	ib_dispatch_event(&event);
5454 }
5455 
5456 /**
5457  * irdma_ib_unregister_device - unregister rdma device from IB
5458  * core
5459  * @iwdev: irdma device
5460  */
irdma_ib_unregister_device(struct irdma_device * iwdev)5461 void irdma_ib_unregister_device(struct irdma_device *iwdev)
5462 {
5463 	iwdev->iw_status = 0;
5464 	irdma_port_ibevent(iwdev);
5465 	ib_unregister_device(&iwdev->ibdev);
5466 }
5467 
5468 /**
5469  * irdma_ib_register_device - register irdma device to IB core
5470  * @iwdev: irdma device
5471  */
irdma_ib_register_device(struct irdma_device * iwdev)5472 int irdma_ib_register_device(struct irdma_device *iwdev)
5473 {
5474 	int ret;
5475 
5476 	irdma_init_rdma_device(iwdev);
5477 
5478 	ret = ib_device_set_netdev(&iwdev->ibdev, iwdev->netdev, 1);
5479 	if (ret)
5480 		goto error;
5481 	dma_set_max_seg_size(iwdev->rf->hw.device, UINT_MAX);
5482 	ret = ib_register_device(&iwdev->ibdev, "irdma%d", iwdev->rf->hw.device);
5483 	if (ret)
5484 		goto error;
5485 
5486 	iwdev->iw_status = 1;
5487 	irdma_port_ibevent(iwdev);
5488 
5489 	return 0;
5490 
5491 error:
5492 	if (ret)
5493 		ibdev_dbg(&iwdev->ibdev, "VERBS: Register RDMA device fail\n");
5494 
5495 	return ret;
5496 }
5497 
5498 /**
5499  * irdma_ib_dealloc_device
5500  * @ibdev: ib device
5501  *
5502  * callback from ibdev dealloc_driver to deallocate resources
5503  * unber irdma device
5504  */
irdma_ib_dealloc_device(struct ib_device * ibdev)5505 void irdma_ib_dealloc_device(struct ib_device *ibdev)
5506 {
5507 	struct irdma_device *iwdev = to_iwdev(ibdev);
5508 
5509 	irdma_rt_deinit_hw(iwdev);
5510 	if (!iwdev->is_vport) {
5511 		irdma_ctrl_deinit_hw(iwdev->rf);
5512 		if (iwdev->rf->vchnl_wq) {
5513 			destroy_workqueue(iwdev->rf->vchnl_wq);
5514 			mutex_destroy(&iwdev->rf->sc_dev.vchnl_mutex);
5515 		}
5516 	}
5517 }
5518